Update README.md
diff --git a/verilog/dv/caravel/user_proj_example/README.md b/verilog/dv/caravel/user_proj_example/README.md
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--- a/verilog/dv/caravel/user_proj_example/README.md
+++ b/verilog/dv/caravel/user_proj_example/README.md
@@ -4,7 +4,7 @@
1) IO Ports Test:
- * Configures the Mega-project lower 8 IO pins as outputs
+ * Configures the user space lower 8 IO pins as outputs
* Observes the counter value through the configured pins in the testbench
2) Logic Analyzer Test 1:
