blob: 8f5ae605abb22c0bbef686f794b0c7dcf095ee7e [file] [log] [blame]
Startpoint: COLUMN[0].RAMCOLS/B_0_3/WORD[17].W/B1/BIT[3].FF
(rising edge-triggered flip-flop clocked by CLK)
Endpoint: COLUMN[0].RAMCOLS/B_0_3/OUT[11].FF
(rising edge-triggered flip-flop clocked by CLK)
Path Group: CLK
Path Type: min
Delay Time Description
---------------------------------------------------------
0.00 0.00 clock CLK (rise edge)
0.00 0.00 clock network delay (ideal)
0.00 0.00 ^ COLUMN[0].RAMCOLS/B_0_3/WORD[17].W/B1/BIT[3].FF/CLK (sky130_fd_sc_hd__dfxtp_1)
0.17 0.17 ^ COLUMN[0].RAMCOLS/B_0_3/WORD[17].W/B1/BIT[3].FF/Q (sky130_fd_sc_hd__dfxtp_1)
0.04 0.21 ^ COLUMN[0].RAMCOLS/B_0_3/WORD[17].W/B1/BIT[3].OBUF/Z (sky130_fd_sc_hd__ebufn_2)
0.00 0.21 ^ COLUMN[0].RAMCOLS/B_0_3/OUT[11].FF/D (sky130_fd_sc_hd__dfxtp_1)
0.21 data arrival time
0.00 0.00 clock CLK (rise edge)
0.00 0.00 clock network delay (ideal)
0.00 0.00 clock reconvergence pessimism
0.00 ^ COLUMN[0].RAMCOLS/B_0_3/OUT[11].FF/CLK (sky130_fd_sc_hd__dfxtp_1)
-0.02 -0.02 library hold time
-0.02 data required time
---------------------------------------------------------
-0.02 data required time
-0.21 data arrival time
---------------------------------------------------------
0.23 slack (MET)
Startpoint: EN (input port clocked by CLK)
Endpoint: COLUMN[0].RAMCOLS/B_0_0/OUT[25].FF
(rising edge-triggered flip-flop clocked by CLK)
Path Group: CLK
Path Type: max
Delay Time Description
---------------------------------------------------------
0.00 0.00 clock CLK (rise edge)
0.00 0.00 clock network delay (ideal)
2.00 2.00 ^ input external delay
0.00 2.00 ^ EN (in)
0.47 2.47 ^ ENBUF/X (sky130_fd_sc_hd__clkbuf_4)
0.66 3.13 ^ COLUMN[0].RAMCOLS/DEC/AND0/Y (sky130_fd_sc_hd__nor3b_4)
0.69 3.81 ^ COLUMN[0].RAMCOLS/B_0_0/DEC/DEC_L0/AND1/X (sky130_fd_sc_hd__and4bb_2)
1.75 5.57 ^ COLUMN[0].RAMCOLS/B_0_0/DEC/DEC_L1[1].U/AND0/Y (sky130_fd_sc_hd__nor4b_2)
1.05 6.62 v COLUMN[0].RAMCOLS/B_0_0/WORD[8].W/B3/INV/Y (sky130_fd_sc_hd__inv_1)
0.39 7.01 v COLUMN[0].RAMCOLS/B_0_0/WORD[8].W/B3/BIT[1].OBUF/Z (sky130_fd_sc_hd__ebufn_2)
0.04 7.05 v COLUMN[0].RAMCOLS/B_0_0/OUT[25].FF/D (sky130_fd_sc_hd__dfxtp_1)
7.05 data arrival time
10.00 10.00 clock CLK (rise edge)
0.00 10.00 clock network delay (ideal)
0.00 10.00 clock reconvergence pessimism
10.00 ^ COLUMN[0].RAMCOLS/B_0_0/OUT[25].FF/CLK (sky130_fd_sc_hd__dfxtp_1)
-0.26 9.74 library setup time
9.74 data required time
---------------------------------------------------------
9.74 data required time
-7.05 data arrival time
---------------------------------------------------------
2.69 slack (MET)