| Notice 0: Reading LEF file: /project/openlane/DFFRAM/runs/DFFRAM/tmp/merged.lef |
| Notice 0: Created 13 technology layers |
| Notice 0: Created 25 technology vias |
| Notice 0: Created 438 library cells |
| Notice 0: Finished LEF file: /project/openlane/DFFRAM/runs/DFFRAM/tmp/merged.lef |
| Notice 0: |
| Reading DEF file: /project/openlane/DFFRAM/runs/DFFRAM/tmp/floorplan/verilog2def_openroad.def |
| Notice 0: Design: DFFRAM |
| Notice 0: Created 78 pins. |
| Notice 0: Created 20277 components and 141382 component-terminals. |
| Notice 0: Created 12163 nets and 60270 connections. |
| Notice 0: Finished DEF file: /project/openlane/DFFRAM/runs/DFFRAM/tmp/floorplan/verilog2def_openroad.def |
| Top-level design name: DFFRAM |
| Block boundaries: 0 0 750000 525000 |
| Writing /project/openlane/DFFRAM/runs/DFFRAM/tmp/floorplan/ioPlacer.def |
