| set_global_assignment -name DEVICE ep4ce40f29c7 | |
| set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files | |
| set_global_assignment -name TOP_LEVEL_ENTITY top_regular | |
| set_global_assignment -name VERILOG_FILE ../synth_area_top.v | |
| set_global_assignment -name VERILOG_FILE ../../../picorv32.v | |
| set_global_assignment -name SDC_FILE ../synth_area.sdc |