| Netgen 1.5.158 compiled on Sat Dec 5 19:50:01 UTC 2020 |
| Warning: netgen command 'format' use fully-qualified name '::netgen::format' |
| Warning: netgen command 'global' use fully-qualified name '::netgen::global' |
| Generating JSON file result |
| Reading netlist file /project/openlane/user_project_wrapper/runs/user_project_wrapper/results/magic/user_project_wrapper.spice |
| Reading netlist file /project/openlane/user_project_wrapper/runs/user_project_wrapper/results/lvs/user_project_wrapper.lvs.powered.v |
| Warning: A case-insensitive file has been read and so the verilog file must be treated case-insensitive to match. |
| Creating placeholder cell definition for module user_proj_example. |
| Reading setup file /mnt/data/workspace/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl |
| Comparison output logged to file /project/openlane/user_project_wrapper/runs/user_project_wrapper/results/lvs/user_project_wrapper.lvs.log |
| Logging to file "/project/openlane/user_project_wrapper/runs/user_project_wrapper/results/lvs/user_project_wrapper.lvs.log" enabled |
| Contents of circuit 1: Circuit: 'user_proj_example' |
| Circuit user_proj_example contains 0 device instances. |
| Circuit contains 0 nets, and 606 disconnected pins. |
| Contents of circuit 2: Circuit: 'user_proj_example' |
| Circuit user_proj_example contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit user_proj_example contains no devices. |
| Contents of circuit 1: Circuit: 'user_project_wrapper' |
| Circuit user_project_wrapper contains 1 device instances. |
| Class: user_proj_example instances: 1 |
| Circuit contains 606 nets, and 38 disconnected pins. |
| Contents of circuit 2: Circuit: 'user_project_wrapper' |
| Circuit user_project_wrapper contains 1 device instances. |
| Class: user_proj_example instances: 1 |
| Circuit contains 606 nets, and 38 disconnected pins. |
| |
| Circuit 1 contains 1 devices, Circuit 2 contains 1 devices. |
| Circuit 1 contains 606 nets, Circuit 2 contains 606 nets. |
| |
| Netlists match uniquely. |
| Result: Circuits match uniquely. |
| Logging to file "/project/openlane/user_project_wrapper/runs/user_project_wrapper/results/lvs/user_project_wrapper.lvs.log" disabled |
| LVS Done. |
