caravel_fix
diff --git a/gds/caravel_00010002.gds.gz b/gds/caravel_00010002.gds.gz
deleted file mode 100644
index 86ca324..0000000
--- a/gds/caravel_00010002.gds.gz
+++ /dev/null
Binary files differ
diff --git a/signoff/caravel_fix b/signoff/caravel_fix
new file mode 100644
index 0000000..23302a6
--- /dev/null
+++ b/signoff/caravel_fix
@@ -0,0 +1 @@
+47d7a89c18ea885d831eade1db61d5ae47fe2337  ./gds/caravel_00010002_b.gds
diff --git a/signoff/run_metal_fix.out b/signoff/run_metal_fix.out
new file mode 100644
index 0000000..56d259b
--- /dev/null
+++ b/signoff/run_metal_fix.out
@@ -0,0 +1,65 @@
+Finding the prefix used for caravel subcells in the user GDS.
+User prefix is 7k_
+Replacing cell caravel in the user GDS file.
+Reading GDS file for alternate cell caravel
+Cell caravel found at position 235669746
+Cell caravel ends at position 247680056
+Reading GDS file for original source ./gds/caravel_00010002.gds
+Cell caravel found at position 2286545438
+Cell caravel ends at position 2298555290
+Cell caravel checksum is 12009824
+Info:  Structure caravel matches checksum 12009824
+Info:  Structure caravel at 2286545438 to 2298555290 will be replaced by alternate data.
+Prefixing caravel subcells in the user GDS
+Running:  /usr/share/pdk/bin/change_gds_string.py user_id_textblock 7k_user_id_textblock copyright_block 7k_copyright_block open_source 7k_open_source storage 7k_storage sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped 7k_sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped user_id_programming 7k_user_id_programming simple_por 7k_simple_por gpio_control_block 7k_gpio_control_block mgmt_core 7k_mgmt_core mgmt_protect 7k_mgmt_protect chip_io 7k_chip_io user_project_wrapper 7k_user_project_wrapper ./gds/caravel_00010002_b.gds -debug -verbatim
+Original data length = 2298556012
+Replaced b'open_source\x00' with b'7k_open_source'
+Replaced b'user_id_textblock\x00' with b'7k_user_id_textblock'
+Replaced b'copyright_block\x00' with b'7k_copyright_block'
+Replaced b'storage\x00' with b'7k_storage'
+Replaced b'sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped' with b'7k_sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped\x00'
+Replaced b'user_id_programming\x00' with b'7k_user_id_programming'
+Replaced b'simple_por' with b'7k_simple_por\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'mgmt_core\x00' with b'7k_mgmt_core'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'mgmt_protect' with b'7k_mgmt_protect\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'gpio_control_block' with b'7k_gpio_control_block\x00'
+Replaced b'chip_io\x00' with b'7k_chip_io'
+Replaced b'user_project_wrapper' with b'7k_user_project_wrapper\x00'
+Finished.