"Medium speed" digital standard cells provided by the SkyWater foundry.

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  1. ae1b7f6 Fix `CLASS` for fill_diode LEF files. by Tim 'mithro' Ansell · 8 days ago branch-0.0.2 master
  2. 14d70b1 Fix `CLASS` for fill_diode LEF files. by Tim 'mithro' Ansell · 8 days ago branch-0.0.1
  3. 390bbc9 Fix JSON for muxes using udp_mux_4to2. by Tim 'mithro' Ansell · 3 weeks ago
  4. e1bcbf8 Fix JSON for muxes using udp_mux_4to2. by Tim 'mithro' Ansell · 3 weeks ago
  5. fa42f38 Improve diode LEF files. by Tim 'mithro' Ansell · 3 weeks ago
  6. 2fbf638 Improve diode LEF files. by Tim 'mithro' Ansell · 3 weeks ago
  7. 175daa5 lef: Fixing VNB/VPB properties in .magic.lef files. by Tim 'mithro' Ansell · 4 weeks ago
  8. a2ecab1 lef: Fixing VNB/VPB properties in .magic.lef files. by Tim 'mithro' Ansell · 4 weeks ago
  9. f01d332 verilog: Fixing power pins usage in non-powerpin mode. by Tim 'mithro' Ansell · 4 weeks ago
  10. e905472 verilog: Fixing power pins usage in non-powerpin mode. by Tim 'mithro' Ansell · 4 weeks ago
  11. c0c9162 cdl: Fixing missing terminals. by Tim 'mithro' Ansell · 4 weeks ago
  12. cb2b65a cdl: Fixing missing terminals. by Tim 'mithro' Ansell · 4 weeks ago
  13. ec746c6 verilog: Fixing ordering of ports in primitives. by Tim 'mithro' Ansell · 8 weeks ago
  14. e9d513d verilog: Fixing ordering of ports in primitives. by Tim 'mithro' Ansell · 8 weeks ago
  15. 1cd268a verilog: Fixing usage of cell reserved word. by Tim 'mithro' Ansell · 8 weeks ago
  16. c3d24b3 verilog: Fixing usage of cell reserved word. by Tim 'mithro' Ansell · 8 weeks ago
  17. d94c220 verilog: Fixing include path. by Tim 'mithro' Ansell · 8 weeks ago
  18. ab46bca verilog: Fixing include path. by Tim 'mithro' Ansell · 8 weeks ago
  19. 89f626b Fixing the technology LEF file. by Tim 'mithro' Ansell · 8 weeks ago
  20. 684a797 Fixing the technology LEF file. by Tim 'mithro' Ansell · 8 weeks ago