timing: Fixing case of `internal_node` pin name.
Updating sky130_fd_sc_hdll 0.1.0.
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_100C_1v65.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_100C_1v65.lib.json
index 2937458..4767b59 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_100C_1v65.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_100C_1v65.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_100C_1v95.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_100C_1v95.lib.json
index 6383f21..eae8e0c 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_100C_1v95.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_100C_1v95.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v56.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v56.lib.json
index 0743b63..64f0823 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v56.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v56.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v65.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v65.lib.json
index ca05f09..040092f 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v65.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v65.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v95.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v95.lib.json
index 8745b82..d8cea53 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v95.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ff_n40C_1v95.lib.json
@@ -22596,7 +22596,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_100C_1v60.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_100C_1v60.lib.json
index b91ff6b..454e6b2 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_100C_1v60.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_100C_1v60.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v28.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v28.lib.json
index 7e4b0c5..2552700 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v28.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v28.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v44.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v44.lib.json
index d466a1a..e64d286 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v44.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v44.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v60.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v60.lib.json
index d2ccb26..ae18d4e 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v60.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v60.lib.json
@@ -22596,7 +22596,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v76.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v76.lib.json
index e510cf0..19f4d09 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v76.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__ss_n40C_1v76.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__tt_025C_1v80.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__tt_025C_1v80.lib.json
index b5beb49..9c5fa0c 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__tt_025C_1v80.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1__tt_025C_1v80.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_100C_1v65.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_100C_1v65.lib.json
index b5a4d30..7e152ab 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_100C_1v65.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_100C_1v65.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_100C_1v95.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_100C_1v95.lib.json
index 60be397..d42da15 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_100C_1v95.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_100C_1v95.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v56.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v56.lib.json
index 478a46b..6cf6a59 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v56.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v56.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v65.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v65.lib.json
index d725eb8..cee5f2d 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v65.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v65.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v95.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v95.lib.json
index 8fd4905..44c3071 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v95.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ff_n40C_1v95.lib.json
@@ -22596,7 +22596,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_100C_1v60.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_100C_1v60.lib.json
index d145c9a..bf19f5f 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_100C_1v60.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_100C_1v60.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v28.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v28.lib.json
index 7c98226..1028e66 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v28.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v28.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v44.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v44.lib.json
index d7d174f..d0bcaca 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v44.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v44.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v60.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v60.lib.json
index 79d94dd..396f2b7 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v60.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v60.lib.json
@@ -22596,7 +22596,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v76.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v76.lib.json
index 010c079..83bb471 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v76.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__ss_n40C_1v76.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__tt_025C_1v80.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__tt_025C_1v80.lib.json
index 7ad1b2b..a6b866e 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__tt_025C_1v80.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2__tt_025C_1v80.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_100C_1v65.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_100C_1v65.lib.json
index 9b56a65..85f4a9a 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_100C_1v65.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_100C_1v65.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_100C_1v95.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_100C_1v95.lib.json
index 764455e..003d9b1 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_100C_1v95.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_100C_1v95.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v56.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v56.lib.json
index e521b65..76106b1 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v56.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v56.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v65.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v65.lib.json
index c1b2e2b..984ffb9 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v65.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v65.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v95.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v95.lib.json
index b4a290f..5f05c9e 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v95.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ff_n40C_1v95.lib.json
@@ -22596,7 +22596,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_100C_1v60.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_100C_1v60.lib.json
index a57a323..809f2ff 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_100C_1v60.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_100C_1v60.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v28.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v28.lib.json
index 96bee10..f806ba3 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v28.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v28.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v44.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v44.lib.json
index 0c3a04c..1faabb7 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v44.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v44.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v60.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v60.lib.json
index 640b37e..6eb1914 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v60.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v60.lib.json
@@ -22596,7 +22596,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v76.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v76.lib.json
index 50f3dcd..91ebf49 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v76.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__ss_n40C_1v76.lib.json
@@ -2125,7 +2125,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__tt_025C_1v80.lib.json b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__tt_025C_1v80.lib.json
index 4363567..6d2aebf 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__tt_025C_1v80.lib.json
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4__tt_025C_1v80.lib.json
@@ -2175,7 +2175,7 @@
},
"pin M0": {
"direction": "internal",
- "internal_node": "m0",
+ "internal_node": "M0",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR"
},
