commit 431afa2d5192ed775e6f2d524e517666cb600cbe
author Jeff DiCorpo <jeffdi@efabless.com> Fri Mar 24 16:08:38 2023 -0700
committer Jeff DiCorpo <jeffdi@efabless.com> Fri Mar 24 16:08:38 2023 -0700
tree d9d0195284b3a2a84989c0be09f309a9a5a61537

final gds oasis

gds/user_proj_example.gds.gz

diff --git a/gds/user_proj_example.gds.gz b/gds/user_proj_example.gds.gz
new file mode 100644
index 0000000..2f99ef2
--- /dev/null
+++ b/gds/user_proj_example.gds.gz
Binary files differ

gds/user_project_wrapper.gds.gz

diff --git a/gds/user_project_wrapper.gds.gz b/gds/user_project_wrapper.gds.gz
new file mode 100644
index 0000000..3186890
--- /dev/null
+++ b/gds/user_project_wrapper.gds.gz
Binary files differ

mpw_precheck/logs/gds.info

diff --git a/mpw_precheck/logs/gds.info b/mpw_precheck/logs/gds.info
new file mode 100644
index 0000000..d0d021a
--- /dev/null
+++ b/mpw_precheck/logs/gds.info
@@ -0,0 +1 @@
+user_project_wrapper.gds: bf7ee72cd8e936579febc9ad9e572e4716383a43
\ No newline at end of file

mpw_precheck/logs/git.info

diff --git a/mpw_precheck/logs/git.info b/mpw_precheck/logs/git.info
new file mode 100644
index 0000000..dd3ce57
--- /dev/null
+++ b/mpw_precheck/logs/git.info
@@ -0,0 +1,3 @@
+Repository: https://github.com/adityan18/BW_mul_foundary.git
+Branch: main
+Commit: c20e407b5dd4364047d05a1dbd71eb67548b999c

mpw_precheck/logs/klayout_beol_check.log

diff --git a/mpw_precheck/logs/klayout_beol_check.log b/mpw_precheck/logs/klayout_beol_check.log
new file mode 100644
index 0000000..f94dd34
--- /dev/null
+++ b/mpw_precheck/logs/klayout_beol_check.log
@@ -0,0 +1,1005 @@
+/opt/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/checks/tech-files/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:54: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/checks/tech-files/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/checks/tech-files/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/checks/tech-files/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/checks/tech-files/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
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+Writing report database: /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_beol_check.xml ..
+Total elapsed: 81.870s  Memory: 1387.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07

mpw_precheck/logs/klayout_beol_check.total

diff --git a/mpw_precheck/logs/klayout_beol_check.total b/mpw_precheck/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file

mpw_precheck/logs/klayout_feol_check.log

diff --git a/mpw_precheck/logs/klayout_feol_check.log b/mpw_precheck/logs/klayout_feol_check.log
new file mode 100644
index 0000000..0397c20
--- /dev/null
+++ b/mpw_precheck/logs/klayout_feol_check.log
@@ -0,0 +1,817 @@
+/opt/checks/tech-files/sky130A_mr.drc:48: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/checks/tech-files/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/checks/tech-files/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/checks/tech-files/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/checks/tech-files/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/checks/tech-files/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
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+END: 89/44 (capm)
+START: 97/44 (cap2m)
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+END: 97/44 (cap2m)
+FEOL section
+START: 75/20 (hvi)
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+END: 75/20 (hvi)
+START: 125/20 (hvntm)
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+    Edge pairs: 0 (flat)  0 (hierarchical)
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+END: 125/20 (hvntm)
+Writing report database: /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_feol_check.xml ..
+Total elapsed: 14.050s  Memory: 1130.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07

mpw_precheck/logs/klayout_feol_check.total

diff --git a/mpw_precheck/logs/klayout_feol_check.total b/mpw_precheck/logs/klayout_feol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_feol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file

mpw_precheck/logs/klayout_met_min_ca_density_check.log

diff --git a/mpw_precheck/logs/klayout_met_min_ca_density_check.log b/mpw_precheck/logs/klayout_met_min_ca_density_check.log
new file mode 100644
index 0000000..11f315e
--- /dev/null
+++ b/mpw_precheck/logs/klayout_met_min_ca_density_check.log
@@ -0,0 +1,79 @@
+"polygons" in: met_min_ca_density.lydrc:35
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+    Elapsed: 0.020s  Memory: 566.00M
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+    Elapsed: 0.020s  Memory: 566.00M
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+    Elapsed: 0.030s  Memory: 566.00M
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+    Elapsed: 0.010s  Memory: 566.00M
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+    Elapsed: 0.000s  Memory: 566.00M
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+    Elapsed: 0.020s  Memory: 569.00M
+"area" in: met_min_ca_density.lydrc:59
+    Elapsed: 1.840s  Memory: 599.00M
+li1_ca_density is 0.9751239562188667
+"polygons" in: met_min_ca_density.lydrc:69
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+    Elapsed: 0.020s  Memory: 599.00M
+"area" in: met_min_ca_density.lydrc:69
+    Elapsed: 1.710s  Memory: 597.00M
+m1_ca_density is 0.9905665973619435
+"polygons" in: met_min_ca_density.lydrc:79
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+    Elapsed: 0.020s  Memory: 597.00M
+"area" in: met_min_ca_density.lydrc:79
+    Elapsed: 0.050s  Memory: 598.00M
+m2_ca_density is 0.9990092497567715
+"polygons" in: met_min_ca_density.lydrc:89
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+    Elapsed: 0.020s  Memory: 598.00M
+"area" in: met_min_ca_density.lydrc:89
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+m3_ca_density is 0.9998445243009613
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+    Elapsed: 0.020s  Memory: 598.00M
+"area" in: met_min_ca_density.lydrc:99
+    Elapsed: 0.040s  Memory: 598.00M
+m4_ca_density is 0.8412686293586551
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+    Polygons (raw): 344 (flat)  344 (hierarchical)
+    Elapsed: 0.000s  Memory: 598.00M
+"area" in: met_min_ca_density.lydrc:109
+    Elapsed: 0.020s  Memory: 598.00M
+m5_ca_density is 0.844177901618929
+Writing report database: /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_met_min_ca_density_check.xml ..
+Total elapsed: 4.470s  Memory: 598.00M

mpw_precheck/logs/klayout_met_min_ca_density_check.total

diff --git a/mpw_precheck/logs/klayout_met_min_ca_density_check.total b/mpw_precheck/logs/klayout_met_min_ca_density_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_met_min_ca_density_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file

mpw_precheck/logs/klayout_offgrid_check.log

diff --git a/mpw_precheck/logs/klayout_offgrid_check.log b/mpw_precheck/logs/klayout_offgrid_check.log
new file mode 100644
index 0000000..2da67bd
--- /dev/null
+++ b/mpw_precheck/logs/klayout_offgrid_check.log
@@ -0,0 +1,765 @@
+/opt/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/checks/tech-files/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:60: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/checks/tech-files/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/checks/tech-files/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/checks/tech-files/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/checks/tech-files/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:124
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+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:752
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.050s  Memory: 806.00M
+"output" in: sky130A_mr.drc:752
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:753
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:753
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:754
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.070s  Memory: 806.00M
+"output" in: sky130A_mr.drc:754
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:755
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:755
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:756
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.040s  Memory: 806.00M
+"output" in: sky130A_mr.drc:756
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:757
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:757
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:758
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.060s  Memory: 806.00M
+"output" in: sky130A_mr.drc:758
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:759
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:759
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:760
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 806.00M
+"output" in: sky130A_mr.drc:760
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:761
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:761
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:762
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.040s  Memory: 806.00M
+"output" in: sky130A_mr.drc:762
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:763
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:763
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:764
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.110s  Memory: 806.00M
+"output" in: sky130A_mr.drc:764
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:765
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.020s  Memory: 806.00M
+"output" in: sky130A_mr.drc:765
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:766
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 806.00M
+"output" in: sky130A_mr.drc:766
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:767
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:767
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:768
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 806.00M
+"output" in: sky130A_mr.drc:768
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:769
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:769
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:770
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 806.00M
+"output" in: sky130A_mr.drc:770
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:771
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:771
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:772
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 806.00M
+"output" in: sky130A_mr.drc:772
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:773
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:773
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+"ongrid" in: sky130A_mr.drc:774
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+"output" in: sky130A_mr.drc:774
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:775
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:775
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:776
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 806.00M
+"output" in: sky130A_mr.drc:776
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:777
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"output" in: sky130A_mr.drc:777
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:778
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 806.00M
+"output" in: sky130A_mr.drc:778
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:779
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"output" in: sky130A_mr.drc:779
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:780
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 806.00M
+"output" in: sky130A_mr.drc:780
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+"with_angle" in: sky130A_mr.drc:781
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"output" in: sky130A_mr.drc:781
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 806.00M
+"ongrid" in: sky130A_mr.drc:782
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 806.00M
+"output" in: sky130A_mr.drc:782
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 806.00M
+Writing report database: /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 18.440s  Memory: 600.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07

mpw_precheck/logs/klayout_offgrid_check.total

diff --git a/mpw_precheck/logs/klayout_offgrid_check.total b/mpw_precheck/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file

mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log

diff --git a/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..e8fe30d
--- /dev/null
+++ b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/root/modified_baugh_wooley_multiplier/gds/user_project_wrapper.gds, topcell=user_project_wrapper, output to /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+  deep:true tiled:false threads:16
+--- #err|description, table for cell: user_project_wrapper
+NO-Check ----        pwell:64/44/EMP   122/16/dat    64/59/EMP    44/16/EMP     44/5/EMP
+         ----        nwell:64/20/dat    64/16/dat     64/5/EMP
+         ----         diff:65/20/dat    65/16/EMP     65/6/EMP
+         ----          tap:65/44/dat    65/48/EMP     65/5/EMP
+         ----         poly:66/20/dat    66/16/EMP     66/5/EMP
+         ----       licon1:66/44/dat    66/58/EMP
+         ----          li1:67/20/dat    67/16/dat     67/5/EMP
+         ----         mcon:67/44/dat    67/48/EMP
+         ----         met1:68/20/dat    68/16/dat     68/5/EMP
+         ----          via:68/44/dat    68/58/EMP
+         ----         met2:69/20/dat    69/16/dat     69/5/EMP
+         ----         via2:69/44/dat    69/58/EMP
+         ----         met3:70/20/dat    70/16/dat     70/5/EMP
+         ----         via3:70/44/dat    70/48/EMP
+         ----         met4:71/20/dat    71/16/dat     71/5/EMP
+         ----         via4:71/44/dat    71/48/EMP
+         ----         met5:72/20/dat    72/16/dat     72/5/EMP
+         ----          pad:76/20/EMP     76/5/EMP    76/16/EMP
+         ----          pnp:82/44/EMP    82/59/EMP
+         ----          npn:82/20/EMP     82/5/EMP
+         ----          rdl:74/20/EMP    74/16/EMP     74/5/EMP
+         ----     inductor:82/24/EMP    82/25/EMP
+       0 total error(s) among 0 error type(s), 33 checks, cell: user_project_wrapper
+Writing report...
+VmPeak:	 3070944 kB
+VmHWM:	  337128 kB

mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total

diff --git a/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file

mpw_precheck/logs/klayout_zeroarea_check.log

diff --git a/mpw_precheck/logs/klayout_zeroarea_check.log b/mpw_precheck/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..627e290
--- /dev/null
+++ b/mpw_precheck/logs/klayout_zeroarea_check.log
@@ -0,0 +1,6 @@
+writing to /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/user_project_wrapper_no_zero_areas.gds
+0 zero-area shapes
+0 zero-length paths,  0 zero-length paths deleted.
+0 total zero-area objects,  0 total objects deleted.
+VmPeak:	  622068 kB
+VmHWM:	  340940 kB

mpw_precheck/logs/klayout_zeroarea_check.total

diff --git a/mpw_precheck/logs/klayout_zeroarea_check.total b/mpw_precheck/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file

mpw_precheck/logs/magic_drc_check.log

diff --git a/mpw_precheck/logs/magic_drc_check.log b/mpw_precheck/logs/magic_drc_check.log
new file mode 100644
index 0000000..bf1433e
--- /dev/null
+++ b/mpw_precheck/logs/magic_drc_check.log
@@ -0,0 +1,28 @@
+
+Magic 8.3 revision 340 - Compiled on Thu Nov 17 13:45:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Error parsing "/opt/checks/tech-files/sky130A.magicrc": can't read "::env(PDK_PATH)": no such variable
+Bad local startup file "/opt/checks/tech-files/sky130A.magicrc", continuing without.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Don't know how to read GDS-II:
+Nothing in "cifinput" section of tech file.
+[INFO]: Loading user_project_wrapper
+
+File user_project_wrapper.mag couldn't be read
+No such file or directory
+Creating new cell
+"drc(full)" is not one of the DRC styles Magic knows.
+The current style is "default".
+The DRC styles are: default.
+No errors found.
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/user_project_wrapper.magic.drc.mag)
+[INFO]: Saved

mpw_precheck/logs/magic_drc_check.total

diff --git a/mpw_precheck/logs/magic_drc_check.total b/mpw_precheck/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file

mpw_precheck/logs/pdks.info

diff --git a/mpw_precheck/logs/pdks.info b/mpw_precheck/logs/pdks.info
new file mode 100644
index 0000000..f65aecb
--- /dev/null
+++ b/mpw_precheck/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 0059588eebfc704681dc2368bd1d33d96281d10f
+SKY130A PDK f70d8ca46961ff92719d8870a18a076370b85f6c
\ No newline at end of file

mpw_precheck/logs/precheck.log

diff --git a/mpw_precheck/logs/precheck.log b/mpw_precheck/logs/precheck.log
new file mode 100644
index 0000000..934ecd4
--- /dev/null
+++ b/mpw_precheck/logs/precheck.log
@@ -0,0 +1,76 @@
+2023-01-01 08:16:25 - [INFO] - {{Project Git Info}} Repository: https://github.com/adityan18/BW_mul_foundary.git | Branch: main | Commit: c20e407b5dd4364047d05a1dbd71eb67548b999c
+2023-01-01 08:16:25 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: modified_baugh_wooley_multiplier
+2023-01-01 08:16:25 - [INFO] - {{Project Type Info}} digital
+2023-01-01 08:16:25 - [INFO] - {{Project GDS Info}} user_project_wrapper: bf7ee72cd8e936579febc9ad9e572e4716383a43
+2023-01-01 08:16:25 - [INFO] - {{Tools Info}} KLayout: v0.27.12 | Magic: v8.3.340
+2023-01-01 08:16:25 - [INFO] - {{PDKs Info}} SKY130A: f70d8ca46961ff92719d8870a18a076370b85f6c | Open PDKs: 0059588eebfc704681dc2368bd1d33d96281d10f
+2023-01-01 08:16:25 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in 'modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/logs'
+2023-01-01 08:16:25 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, GPIO-Defines, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2023-01-01 08:16:25 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 14: License
+2023-01-01 08:16:26 - [INFO] - An approved LICENSE (Apache-2.0) was found in modified_baugh_wooley_multiplier.
+2023-01-01 08:16:26 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2023-01-01 08:16:27 - [INFO] - An approved LICENSE (Apache-2.0) was found in modified_baugh_wooley_multiplier.
+2023-01-01 08:16:27 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2023-01-01 08:16:39 - [WARNING] - {{SPDX COMPLIANCE CHECK FAILED}} Found 9519 non-compliant file(s) with the SPDX Standard.
+2023-01-01 08:16:39 - [INFO] - SPDX COMPLIANCE: NON-COMPLIANT FILE(S) PREVIEW: ['modified_baugh_wooley_multiplier/.gitattributes', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/current', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/SOURCES', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/.config/nodeinfo.json', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/cdl/sky130_ef_io.cdl', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_tt_tt_025C_1v80_3v30.lib', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ff_ff_100C_1v95_5v50.lib', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ff_ff_n40C_1v95_5v50.lib', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ff_ff_n40C_1v95_5v50_nointpwr.lib', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ff_ss_100C_1v65_1v65.lib', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ff_ss_100C_1v95_1v65.lib', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ff_ss_100C_1v95_1v95.lib', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ff_ss_n40C_1v65_1v65.lib', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ff_ss_n40C_1v95_1v65.lib', 'modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/lib/sky130_ef_io__gpiov2_pad_wrapped_ff_ss_n40C_1v95_1v95.lib']
+2023-01-01 08:16:39 - [INFO] - For the full SPDX compliance report check: modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/logs/spdx_compliance_report.log
+2023-01-01 08:16:39 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 14: Makefile
+2023-01-01 08:16:39 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2023-01-01 08:16:39 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 14: Default
+2023-01-01 08:16:39 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2023-01-01 08:16:39 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2023-01-01 08:16:39 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 14: Documentation
+2023-01-01 08:16:39 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2023-01-01 08:16:39 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 14: Consistency
+2023-01-01 08:16:44 - [INFO] - POWER CONNECTIONS CHECK PASSED: All instances in caravel are connected to power
+2023-01-01 08:16:44 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravel netlist passed all consistency checks.
+2023-01-01 08:16:44 - [INFO] - PORTS CHECK PASSED: Netlist user_project_wrapper ports match the golden wrapper ports
+2023-01-01 08:16:44 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_project_wrapper contains at least 1 instances (1 instances). 
+2023-01-01 08:16:44 - [INFO] - MODELING CHECK PASSED: Netlist user_project_wrapper is structural.
+2023-01-01 08:16:44 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_project_wrapper matches the provided structural netlist.
+2023-01-01 08:16:44 - [INFO] - POWER CONNECTIONS CHECK PASSED: All instances in user_project_wrapper are connected to power
+2023-01-01 08:16:44 - [INFO] - PORT TYPES CHECK PASSED: Netlist user_project_wrapper port types match the golden wrapper port types.
+2023-01-01 08:16:44 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_project_wrapper netlist passed all consistency checks.
+2023-01-01 08:16:44 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2023-01-01 08:16:44 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 14: GPIO-Defines
+2023-01-01 08:16:44 - [INFO] - GPIO-DEFINES: Checking verilog/rtl/user_defines.v, parsing files: ['/opt/checks/gpio_defines_check/verilog_assets/gpio_modes_base.v', 'modified_baugh_wooley_multiplier/verilog/rtl/user_defines.v', '/opt/checks/gpio_defines_check/verilog_assets/gpio_modes_observe.v']
+2023-01-01 08:16:45 - [INFO] - GPIO-DEFINES report path: modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/gpio_defines.report
+2023-01-01 08:16:45 - [INFO] - {{GPIO-DEFINES CHECK PASSED}} The user verilog/rtl/user_defines.v is valid.
+2023-01-01 08:16:45 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 14: XOR
+2023-01-01 08:16:51 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 0, for more details view modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/user_project_wrapper.xor.gds
+2023-01-01 08:16:51 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2023-01-01 08:16:51 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 14: Magic DRC
+2023-01-01 08:16:51 - [INFO] - 0 DRC violations
+2023-01-01 08:16:51 - [INFO] - {{MAGIC DRC CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2023-01-01 08:16:51 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 14: Klayout FEOL
+2023-01-01 08:16:51 - [INFO] - in CUSTOM klayout_gds_drc_check
+2023-01-01 08:16:51 - [INFO] - run: klayout -b -r /opt/checks/tech-files/sky130A_mr.drc -rd input=modified_baugh_wooley_multiplier/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_feol_check.xml -rd feol=true >& modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/logs/klayout_feol_check.log
+2023-01-01 08:17:06 - [INFO] - No DRC Violations found
+2023-01-01 08:17:06 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2023-01-01 08:17:06 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 14: Klayout BEOL
+2023-01-01 08:17:06 - [INFO] - in CUSTOM klayout_gds_drc_check
+2023-01-01 08:17:06 - [INFO] - run: klayout -b -r /opt/checks/tech-files/sky130A_mr.drc -rd input=modified_baugh_wooley_multiplier/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_beol_check.xml -rd beol=true >& modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/logs/klayout_beol_check.log
+2023-01-01 08:18:28 - [INFO] - No DRC Violations found
+2023-01-01 08:18:28 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2023-01-01 08:18:28 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 14: Klayout Offgrid
+2023-01-01 08:18:28 - [INFO] - in CUSTOM klayout_gds_drc_check
+2023-01-01 08:18:28 - [INFO] - run: klayout -b -r /opt/checks/tech-files/sky130A_mr.drc -rd input=modified_baugh_wooley_multiplier/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_offgrid_check.xml -rd offgrid=true >& modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/logs/klayout_offgrid_check.log
+2023-01-01 08:18:48 - [INFO] - No DRC Violations found
+2023-01-01 08:18:48 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2023-01-01 08:18:48 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 14: Klayout Metal Minimum Clear Area Density
+2023-01-01 08:18:48 - [INFO] - in CUSTOM klayout_gds_drc_check
+2023-01-01 08:18:48 - [INFO] - run: klayout -b -r /opt/checks/drc_checks/klayout/met_min_ca_density.lydrc -rd input=modified_baugh_wooley_multiplier/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_met_min_ca_density_check.xml >& modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/logs/klayout_met_min_ca_density_check.log
+2023-01-01 08:18:53 - [INFO] - No DRC Violations found
+2023-01-01 08:18:53 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2023-01-01 08:18:53 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 14: Klayout Pin Label Purposes Overlapping Drawing
+2023-01-01 08:18:53 - [INFO] - in CUSTOM klayout_gds_drc_check
+2023-01-01 08:18:53 - [INFO] - run: klayout -b -r /opt/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc -rd input=modified_baugh_wooley_multiplier/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml -rd top_cell_name=user_project_wrapper >& modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
+2023-01-01 08:18:58 - [INFO] - No DRC Violations found
+2023-01-01 08:18:58 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2023-01-01 08:18:58 - [INFO] - {{STEP UPDATE}} Executing Check 14 of 14: Klayout ZeroArea
+2023-01-01 08:18:58 - [INFO] - in CUSTOM klayout_gds_drc_check
+2023-01-01 08:18:58 - [INFO] - run: klayout -b -r /opt/checks/drc_checks/klayout/zeroarea.rb.drc -rd input=modified_baugh_wooley_multiplier/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/reports/klayout_zeroarea_check.xml -rd cleaned_output=modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/user_project_wrapper_no_zero_areas.gds >& modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/logs/klayout_zeroarea_check.log
+2023-01-01 08:19:00 - [INFO] - No DRC Violations found
+2023-01-01 08:19:00 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2023-01-01 08:19:00 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in 'modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/logs'
+2023-01-01 08:19:00 - [INFO] - {{SUCCESS}} All Checks Passed !!!

mpw_precheck/logs/spdx_compliance_report.log

diff --git a/mpw_precheck/logs/spdx_compliance_report.log b/mpw_precheck/logs/spdx_compliance_report.log
new file mode 100644
index 0000000..0506ab3
--- /dev/null
+++ b/mpw_precheck/logs/spdx_compliance_report.log
@@ -0,0 +1,9519 @@
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+/root/modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/SOURCES
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+/root/modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130B/libs.tech/xschem/xschem_verilog_import/sky130_fd_sc_hvl__lsbuflv2hv_1.sch
+/root/modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130B/libs.tech/xschem/xschem_verilog_import/sky130_fd_sc_hvl__lsbuflv2hv_1.sym
+/root/modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130B/libs.tech/xschem/xschem_verilog_import/sky130_fd_sc_hvl__lsbuflv2hv_1_redraw.sch
+/root/modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130B/libs.tech/xschem/xschem_verilog_import/sky130_fd_sc_hvl__lsbuflv2hv_1_redraw_fix.sch
+/root/modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130B/libs.tech/xschem/xschem_verilog_import/spm.sch
+/root/modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130B/libs.tech/xschem/xschem_verilog_import/spm.sym
+/root/modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130B/libs.tech/xschem/xschem_verilog_import/spm.v
+/root/modified_baugh_wooley_multiplier/dependencies/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130B/libs.tech/xschem/xschem_verilog_import/xschemrc
+/root/modified_baugh_wooley_multiplier/env/spef-mapping.tcl
+/root/modified_baugh_wooley_multiplier/lib/user_proj_example.lib
+/root/modified_baugh_wooley_multiplier/lib/user_project_wrapper.lib
+/root/modified_baugh_wooley_multiplier/openlane/user_proj_example/config.json
+/root/modified_baugh_wooley_multiplier/openlane/user_project_wrapper/config.json
+/root/modified_baugh_wooley_multiplier/sdc/user_proj_example.sdc
+/root/modified_baugh_wooley_multiplier/sdc/user_project_wrapper.sdc
+/root/modified_baugh_wooley_multiplier/sdf/user_proj_example.sdf
+/root/modified_baugh_wooley_multiplier/sdf/user_project_wrapper.sdf
+/root/modified_baugh_wooley_multiplier/sdf/multicorner/max/user_project_wrapper.ff.sdf
+/root/modified_baugh_wooley_multiplier/sdf/multicorner/max/user_project_wrapper.ss.sdf
+/root/modified_baugh_wooley_multiplier/sdf/multicorner/max/user_project_wrapper.tt.sdf
+/root/modified_baugh_wooley_multiplier/sdf/multicorner/min/user_project_wrapper.ff.sdf
+/root/modified_baugh_wooley_multiplier/sdf/multicorner/min/user_project_wrapper.ss.sdf
+/root/modified_baugh_wooley_multiplier/sdf/multicorner/min/user_project_wrapper.tt.sdf
+/root/modified_baugh_wooley_multiplier/sdf/multicorner/nom/user_project_wrapper.ff.sdf
+/root/modified_baugh_wooley_multiplier/sdf/multicorner/nom/user_project_wrapper.ss.sdf
+/root/modified_baugh_wooley_multiplier/sdf/multicorner/nom/user_project_wrapper.tt.sdf
+/root/modified_baugh_wooley_multiplier/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.max.spef
+/root/modified_baugh_wooley_multiplier/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.min.spef
+/root/modified_baugh_wooley_multiplier/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.nom.spef
+/root/modified_baugh_wooley_multiplier/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.max.spef
+/root/modified_baugh_wooley_multiplier/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.min.spef
+/root/modified_baugh_wooley_multiplier/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.nom.spef
+/root/modified_baugh_wooley_multiplier/spef/user_proj_example.spef
+/root/modified_baugh_wooley_multiplier/spef/user_project_wrapper.spef
+/root/modified_baugh_wooley_multiplier/spef/multicorner/user_project_wrapper.max.spef
+/root/modified_baugh_wooley_multiplier/spef/multicorner/user_project_wrapper.min.spef
+/root/modified_baugh_wooley_multiplier/spef/multicorner/user_project_wrapper.nom.spef
+/root/modified_baugh_wooley_multiplier/verilog/includes/includes.gl+sdf.caravel_user_project
+/root/modified_baugh_wooley_multiplier/verilog/includes/includes.gl.caravel_user_project
+/root/modified_baugh_wooley_multiplier/verilog/includes/includes.rtl.caravel_user_project
+/root/modified_baugh_wooley_multiplier/verilog/rtl/bw_mul.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/carry_adder.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/counter.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/fa.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/gray.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/ha.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/latch_map.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/ram2.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/serial_in.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/sgd_v3.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/sum_adder_gray.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/sum_adder_white.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/top.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/user_proj_example.v
+/root/modified_baugh_wooley_multiplier/verilog/rtl/white.v

mpw_precheck/logs/tools.info

diff --git a/mpw_precheck/logs/tools.info b/mpw_precheck/logs/tools.info
new file mode 100644
index 0000000..4056146
--- /dev/null
+++ b/mpw_precheck/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.12
+Magic: 8.3.340
\ No newline at end of file

mpw_precheck/logs/xor_check.log

diff --git a/mpw_precheck/logs/xor_check.log b/mpw_precheck/logs/xor_check.log
new file mode 100644
index 0000000..838bced
--- /dev/null
+++ b/mpw_precheck/logs/xor_check.log
@@ -0,0 +1,256 @@
+Reading file /root/modified_baugh_wooley_multiplier/gds/user_project_wrapper.gds for cell user_project_wrapper
+dbu=0.001
+cell user_project_wrapper dbu-bbox(ll;ur)=(-43630,-38270;2963250,3557950)
+cell user_project_wrapper dbu-bbox(left,bottom,right,top)=(-43630,-38270,2963250,3557950)
+cell user_project_wrapper dbu-size(width,height)=(3006880,3596220)
+cell user_project_wrapper micron-bbox(left,bottom,right,top)=(-43.63,-38.27,2963.25,3557.9500000000003)
+cell user_project_wrapper micron-size(width,height)=(3006.88,3596.2200000000003)
+Done.
+
+Magic 8.3 revision 340 - Compiled on Thu Nov 17 13:45:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__xnor2_4".
+Reading "sky130_fd_sc_hd__xor2_4".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__or2b_1".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a22oi_2".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "user_proj_example".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+Reading "user_project_wrapper".
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+
+Magic 8.3 revision 340 - Compiled on Thu Nov 17 13:45:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "user_project_wrapper".
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+Reading /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/user_project_wrapper_erased.gds ..
+Reading /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/user_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 530 (flat)  530 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 530 (flat)  530 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 107 (flat)  107 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 107 (flat)  107 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+--- Running XOR for 71/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+--- Running XOR for 71/44 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 116 (flat)  116 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 116 (flat)  116 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+Writing layout file: /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/mpw_precheck/17844675-af5a-41c3-8673-aaee202395c1/outputs/user_project_wrapper.xor.gds ..
+Total elapsed: 0.120s  Memory: 524.00M

mpw_precheck/logs/xor_check.total

diff --git a/mpw_precheck/logs/xor_check.total b/mpw_precheck/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file

mpw_precheck/outputs/reports/gpio_defines.report

diff --git a/mpw_precheck/outputs/reports/gpio_defines.report b/mpw_precheck/outputs/reports/gpio_defines.report
new file mode 100644
index 0000000..07461af
--- /dev/null
+++ b/mpw_precheck/outputs/reports/gpio_defines.report
@@ -0,0 +1,33 @@
+USER_CONFIG_GPIO_5_INIT    13'h1801
+USER_CONFIG_GPIO_6_INIT    13'h1801
+USER_CONFIG_GPIO_7_INIT    13'h1801
+USER_CONFIG_GPIO_8_INIT    13'h1801
+USER_CONFIG_GPIO_9_INIT    13'h1801
+USER_CONFIG_GPIO_10_INIT   13'h1801
+USER_CONFIG_GPIO_11_INIT   13'h1801
+USER_CONFIG_GPIO_12_INIT   13'h1801
+USER_CONFIG_GPIO_13_INIT   13'h1801
+USER_CONFIG_GPIO_14_INIT   13'h1801
+USER_CONFIG_GPIO_15_INIT   13'h1801
+USER_CONFIG_GPIO_16_INIT   13'h1801
+USER_CONFIG_GPIO_17_INIT   13'h1801
+USER_CONFIG_GPIO_18_INIT   13'h1801
+USER_CONFIG_GPIO_19_INIT   13'h1801
+USER_CONFIG_GPIO_20_INIT   13'h1801
+USER_CONFIG_GPIO_21_INIT   13'h1801
+USER_CONFIG_GPIO_22_INIT   13'h1801
+USER_CONFIG_GPIO_23_INIT   13'h1801
+USER_CONFIG_GPIO_24_INIT   13'h1801
+USER_CONFIG_GPIO_25_INIT   13'h1801
+USER_CONFIG_GPIO_26_INIT   13'h1801
+USER_CONFIG_GPIO_27_INIT   13'h1801
+USER_CONFIG_GPIO_28_INIT   13'h1801
+USER_CONFIG_GPIO_29_INIT   13'h1801
+USER_CONFIG_GPIO_30_INIT   13'h1801
+USER_CONFIG_GPIO_31_INIT   13'h1801
+USER_CONFIG_GPIO_32_INIT   13'h1801
+USER_CONFIG_GPIO_33_INIT   13'h1801
+USER_CONFIG_GPIO_34_INIT   13'h1801
+USER_CONFIG_GPIO_35_INIT   13'h1801
+USER_CONFIG_GPIO_36_INIT   13'h1801
+USER_CONFIG_GPIO_37_INIT   13'h1801

mpw_precheck/outputs/reports/klayout_beol_check.xml

diff --git a/mpw_precheck/outputs/reports/klayout_beol_check.xml b/mpw_precheck/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..5ffd971
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>li.1</name>
+   <description>li.1 : min. li width : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.3</name>
+   <description>li.3 : min. li spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.5</name>
+   <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.6</name>
+   <description>li.6 : min. li area : 0.0561um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1</name>
+   <description>ct.1: non-ring mcon should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_a</name>
+   <description>ct.1_a : minimum width of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_b</name>
+   <description>ct.1_b : maximum length of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.2</name>
+   <description>ct.2 : min. mcon spacing : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.4</name>
+   <description>ct.4 : mcon should covered by li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.1</name>
+   <description>m1.1 : min. m1 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.2</name>
+   <description>m1.2 : min. m1 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.3ab</name>
+   <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>791_m1.4</name>
+   <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4</name>
+   <description>m1.4 : mcon periphery must be enclosed by m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a</name>
+   <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a_a</name>
+   <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.6</name>
+   <description>m1.6 : min. m1 area : 0.083um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.7</name>
+   <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.5</name>
+   <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a</name>
+   <description>via.1a : via outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_a</name>
+   <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_b</name>
+   <description>via.1a_b : maximum length of via : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.2</name>
+   <description>via.2 : min. via spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a</name>
+   <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a_a</name>
+   <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.5a</name>
+   <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.1</name>
+   <description>m2.1 : min. m2 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.2</name>
+   <description>m2.2 : min. m2 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.3ab</name>
+   <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.6</name>
+   <description>m2.6 : min. m2 area : 0.0676um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.7</name>
+   <description>m2.7 : min. m2 holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4</name>
+   <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4_a</name>
+   <description>m2.4_a : via in periphery must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.5</name>
+   <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a</name>
+   <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_a</name>
+   <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_b</name>
+   <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.2</name>
+   <description>via2.2 : min. via2 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4</name>
+   <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4_a</name>
+   <description>via2.4_a : via must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.5</name>
+   <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.1</name>
+   <description>m3.1 : min. m3 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.2</name>
+   <description>m3.2 : min. m3 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.3cd</name>
+   <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4</name>
+   <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4_a</name>
+   <description>m3.4_a : via2 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1</name>
+   <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_a</name>
+   <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_b</name>
+   <description>via3.1_b : maximum length of via3 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.2</name>
+   <description>via3.2 : min. via3 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4</name>
+   <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4_a</name>
+   <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.5</name>
+   <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.1</name>
+   <description>m4.1 : min. m4 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.2</name>
+   <description>m4.2 : min. m4 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.4a</name>
+   <description>m4.4a : min. m4 area : 0.240um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.5ab</name>
+   <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3</name>
+   <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3_a</name>
+   <description>m4.3_a : via3 must be enclosed by met4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1</name>
+   <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_a</name>
+   <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_b</name>
+   <description>via4.1_b : maximum length of via4 : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.2</name>
+   <description>via4.2 : min. via4 spacing : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4</name>
+   <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4_a</name>
+   <description>via4.4_a : m4 must enclose all via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.1</name>
+   <description>m5.1 : min. m5 width : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.2</name>
+   <description>m5.2 : min. m5 spacing : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3</name>
+   <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3_a</name>
+   <description>m5.3_a : via must be enclosed by m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.4</name>
+   <description>m5.4 : min. m5 area : 4.0um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad.2</name>
+   <description>pad.2 : min. pad spacing : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

mpw_precheck/outputs/reports/klayout_feol_check.xml

diff --git a/mpw_precheck/outputs/reports/klayout_feol_check.xml b/mpw_precheck/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..71b30a8
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,375 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell.2</name>
+   <description>dnwell.2 : min. dnwell width : 3.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.1</name>
+   <description>nwell.1 : min. nwell width : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.2a</name>
+   <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.6</name>
+   <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.1</name>
+   <description>hvtp.1 : min. hvtp width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.2</name>
+   <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.1</name>
+   <description>hvtr.1 : min. hvtr width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2</name>
+   <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2_a</name>
+   <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.1a</name>
+   <description>lvtn.1a : min. lvtn width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.2</name>
+   <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.1</name>
+   <description>ncm.1 : min. ncm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.2a</name>
+   <description>ncm.2a : min. ncm spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1</name>
+   <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_a</name>
+   <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_b</name>
+   <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_c</name>
+   <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.3</name>
+   <description>difftap.3 : min. difftap spacing : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.1</name>
+   <description>tunm.1 : min. tunm width : 0.41um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.2</name>
+   <description>tunm.2 : min. tunm spacing : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.1a</name>
+   <description>poly.1a : min. poly width : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.2</name>
+   <description>poly.2 : min. poly spacing : 0.21um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.1a</name>
+   <description>rpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.2</name>
+   <description>rpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.1a</name>
+   <description>urpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.2</name>
+   <description>urpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.1</name>
+   <description>npc.1 : min. npc width : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.2</name>
+   <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.1</name>
+   <description>nsd.1 : min. nsdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.2</name>
+   <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.1</name>
+   <description>psd.1 : min. psdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.2</name>
+   <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1</name>
+   <description>licon.1 : licon should be rectangle</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1_a/b</name>
+   <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13</name>
+   <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13_a</name>
+   <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.17</name>
+   <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.1</name>
+   <description>capm.1 : min. capm width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2a</name>
+   <description>capm.2a : min. capm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b</name>
+   <description>capm.2b : min. capm spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b_a</name>
+   <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3</name>
+   <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3_a</name>
+   <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.4</name>
+   <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.5</name>
+   <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.11</name>
+   <description>capm.11 : Min spacing of capm and met3 not overlapping capm : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.1</name>
+   <description>cap2m.1 : min. cap2m width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2a</name>
+   <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b</name>
+   <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b_a</name>
+   <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3</name>
+   <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3_a</name>
+   <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.4</name>
+   <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.5</name>
+   <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.11</name>
+   <description>cap2m.11 : Min spacing of cap2m and met4 not overlapping cap2m : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.1</name>
+   <description>hvi.1 : min. hvi width : 0.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.2a</name>
+   <description>hvi.2a : min. hvi spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.1</name>
+   <description>hvntm.1 : min. hvntm width : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.2</name>
+   <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml

diff --git a/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml b/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..698a39a
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

mpw_precheck/outputs/reports/klayout_offgrid_check.xml

diff --git a/mpw_precheck/outputs/reports/klayout_offgrid_check.xml b/mpw_precheck/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..95ebbc9
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>dnwell_angle</name>
+   <description>x.3a : non 45 degree angle dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_angle</name>
+   <description>x.3a : non 45 degree angle nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_angle</name>
+   <description>x.3a : non 45 degree angle pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_angle</name>
+   <description>x.3a : non 45 degree angle pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_angle</name>
+   <description>x.3a : non 45 degree angle hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_angle</name>
+   <description>x.3a : non 45 degree angle hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_angle</name>
+   <description>x.3a : non 45 degree angle lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_angle</name>
+   <description>x.3a : non 45 degree angle ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2 : non 90 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2c : non 45 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2 : non 90 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2c : non 45 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_angle</name>
+   <description>x.3a : non 45 degree angle tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_angle</name>
+   <description>x.2 : non 90 degree angle poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_angle</name>
+   <description>x.3a : non 45 degree angle rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_angle</name>
+   <description>x.3a : non 45 degree angle npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_angle</name>
+   <description>x.3a : non 45 degree angle nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_angle</name>
+   <description>x.3a : non 45 degree angle psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_angle</name>
+   <description>x.2 : non 90 degree angle licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_angle</name>
+   <description>x.3a : non 45 degree angle li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on mcon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_angle</name>
+   <description>x.2 : non 90 degree angle mcon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vpp_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on vpp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vpp_angle</name>
+   <description>x.3a : non 45 degree angle vpp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1_angle</name>
+   <description>x.3a : non 45 degree angle m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via_angle</name>
+   <description>x.2 : non 90 degree angle via</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2_angle</name>
+   <description>x.3a : non 45 degree angle m2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2_angle</name>
+   <description>x.2 : non 90 degree angle via2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3_angle</name>
+   <description>x.3a : non 45 degree angle m3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3_angle</name>
+   <description>x.2 : non 90 degree angle via3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nsm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsm_angle</name>
+   <description>x.3a : non 45 degree angle nsm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4_angle</name>
+   <description>x.3a : non 45 degree angle m4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4_angle</name>
+   <description>x.2 : non 90 degree angle via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5_angle</name>
+   <description>x.3a : non 45 degree angle m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pad</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad_angle</name>
+   <description>x.3a : non 45 degree angle pad</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>mf_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on mf</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>mf_angle</name>
+   <description>x.2 : non 90 degree angle mf</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_angle</name>
+   <description>x.3a : non 45 degree angle hvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvntm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm_angle</name>
+   <description>x.3a : non 45 degree angle hvntm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_angle</name>
+   <description>x.3a : non 45 degree angle vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_angle</name>
+   <description>x.3a : non 45 degree angle uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_angle</name>
+   <description>x.3a : non 45 degree angle pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>areaid_re_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on areaid.re</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml

diff --git a/mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..e5a1682
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/root/modified_baugh_wooley_multiplier/gds/user_project_wrapper.gds, topcell=user_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

mpw_precheck/outputs/reports/klayout_zeroarea_check.xml

diff --git a/mpw_precheck/outputs/reports/klayout_zeroarea_check.xml b/mpw_precheck/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..7f95f69
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

mpw_precheck/outputs/reports/magic_drc_check.drc.report

diff --git a/mpw_precheck/outputs/reports/magic_drc_check.drc.report b/mpw_precheck/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..46ca7f3
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,5 @@
+user_project_wrapper
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+

mpw_precheck/outputs/reports/magic_drc_check.rdb

diff --git a/mpw_precheck/outputs/reports/magic_drc_check.rdb b/mpw_precheck/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..ac5b3c4
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,2 @@
+$user_project_wrapper
+ 100

mpw_precheck/outputs/reports/magic_drc_check.tcl

diff --git a/mpw_precheck/outputs/reports/magic_drc_check.tcl b/mpw_precheck/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.tcl

mpw_precheck/outputs/reports/magic_drc_check.tr

diff --git a/mpw_precheck/outputs/reports/magic_drc_check.tr b/mpw_precheck/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.tr

mpw_precheck/outputs/reports/magic_drc_check.xml

diff --git a/mpw_precheck/outputs/reports/magic_drc_check.xml b/mpw_precheck/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..0eff265
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" ?>
+<report-database>
+    <categories/>
+    <cells>
+        <cell>
+            <name>user_project_wrapper</name>
+        </cell>
+    </cells>
+    <items/>
+</report-database>

mpw_precheck/outputs/user_project_wrapper.filtered.v

diff --git a/mpw_precheck/outputs/user_project_wrapper.filtered.v b/mpw_precheck/outputs/user_project_wrapper.filtered.v
new file mode 100644
index 0000000..f05154d
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.filtered.v
@@ -0,0 +1,83 @@
+module user_project_wrapper (user_clock2,
+    wb_clk_i,
+    wb_rst_i,
+    wbs_ack_o,
+    wbs_cyc_i,
+    wbs_stb_i,
+    wbs_we_i,
+    vssa2,
+    vdda2,
+    vssa1,
+    vdda1,
+    vssd2,
+    vccd2,
+    vssd1,
+    vccd1,
+    analog_io,
+    io_in,
+    io_oeb,
+    io_out,
+    la_data_in,
+    la_data_out,
+    la_oenb,
+    user_irq,
+    wbs_adr_i,
+    wbs_dat_i,
+    wbs_dat_o,
+    wbs_sel_i);
+ input user_clock2;
+ input wb_clk_i;
+ input wb_rst_i;
+ output wbs_ack_o;
+ input wbs_cyc_i;
+ input wbs_stb_i;
+ input wbs_we_i;
+ input vssa2;
+ input vdda2;
+ input vssa1;
+ input vdda1;
+ input vssd2;
+ input vccd2;
+ input vssd1;
+ input vccd1;
+ inout [28:0] analog_io;
+ input [37:0] io_in;
+ output [37:0] io_oeb;
+ output [37:0] io_out;
+ input [127:0] la_data_in;
+ output [127:0] la_data_out;
+ input [127:0] la_oenb;
+ output [2:0] user_irq;
+ input [31:0] wbs_adr_i;
+ input [31:0] wbs_dat_i;
+ output [31:0] wbs_dat_o;
+ input [3:0] wbs_sel_i;
+
+
+ user_proj_example mprj (.vccd1(vccd1),
+    .vssd1(vssd1),
+    .a({wbs_dat_i[7],
+    wbs_dat_i[6],
+    wbs_dat_i[5],
+    wbs_dat_i[4],
+    wbs_dat_i[3],
+    wbs_dat_i[2],
+    wbs_dat_i[1],
+    wbs_dat_i[0]}),
+    .b({wbs_dat_i[15],
+    wbs_dat_i[14],
+    wbs_dat_i[13],
+    wbs_dat_i[12],
+    wbs_dat_i[11],
+    wbs_dat_i[10],
+    wbs_dat_i[9],
+    wbs_dat_i[8]}),
+    .p({wbs_dat_o[7],
+    wbs_dat_o[6],
+    wbs_dat_o[5],
+    wbs_dat_o[4],
+    wbs_dat_o[3],
+    wbs_dat_o[2],
+    wbs_dat_o[1],
+    wbs_dat_o[0]}));
+endmodule

mpw_precheck/outputs/user_project_wrapper.magic.drc.mag

diff --git a/mpw_precheck/outputs/user_project_wrapper.magic.drc.mag b/mpw_precheck/outputs/user_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..bc7865b
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.magic.drc.mag
@@ -0,0 +1,7 @@
+magic
+tech minimum
+magscale 1 2
+timestamp 0
+<< checkpaint >>
+rect 0 0 1 1
+<< end >>

mpw_precheck/outputs/user_project_wrapper.xor.gds

diff --git a/mpw_precheck/outputs/user_project_wrapper.xor.gds b/mpw_precheck/outputs/user_project_wrapper.xor.gds
new file mode 100644
index 0000000..51f7e19
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.xor.gds
Binary files differ

mpw_precheck/outputs/user_project_wrapper_empty_erased.gds

diff --git a/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds b/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..09eb346
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds
Binary files differ

mpw_precheck/outputs/user_project_wrapper_erased.gds

diff --git a/mpw_precheck/outputs/user_project_wrapper_erased.gds b/mpw_precheck/outputs/user_project_wrapper_erased.gds
new file mode 100644
index 0000000..193a171
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_erased.gds
Binary files differ

mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds

diff --git a/mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds b/mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds
new file mode 100644
index 0000000..e8c09e7
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds
Binary files differ

signoff/.gitignore

diff --git a/signoff/.gitignore b/signoff/.gitignore
new file mode 100644
index 0000000..6407046
--- /dev/null
+++ b/signoff/.gitignore
@@ -0,0 +1 @@
+cdrcpost/*

signoff/assigned_slot

diff --git a/signoff/assigned_slot b/signoff/assigned_slot
new file mode 100644
index 0000000..e9a0226
--- /dev/null
+++ b/signoff/assigned_slot
@@ -0,0 +1 @@
+038

signoff/caravel/openlane-signoff/timing/max/f-clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-clk-max.rpt b/signoff/caravel/openlane-signoff/timing/max/f-clk-max.rpt
new file mode 100644
index 0000000..cb6ccad
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:3870af0baa045efeaaf79629db49d4095032786508f93788d6f826657b2687a0
+size 28366871

signoff/caravel/openlane-signoff/timing/max/f-clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-clk-min.rpt b/signoff/caravel/openlane-signoff/timing/max/f-clk-min.rpt
new file mode 100644
index 0000000..23c0c49
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:7ce7f17f3fbd3becc9e87316f74fe87d30fb18b8b08267cdfa2c1373a912134c
+size 18809774

signoff/caravel/openlane-signoff/timing/max/f-hk_serial_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-hk_serial_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/max/f-hk_serial_clk-max.rpt
new file mode 100644
index 0000000..59d461e
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-hk_serial_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:9b1f97c5c5dce48caeff7f1cdce45db2c6ec829f3bfeb6faa82fa0ffcd706d50
+size 345

signoff/caravel/openlane-signoff/timing/max/f-hk_serial_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-hk_serial_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/max/f-hk_serial_clk-min.rpt
new file mode 100644
index 0000000..a9f695e
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-hk_serial_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:28f4bb77768854357aab824326dfa2b247094e8e378ff36d4f027efdfd555cb9
+size 11323365

signoff/caravel/openlane-signoff/timing/max/f-hkspi_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-hkspi_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/max/f-hkspi_clk-max.rpt
new file mode 100644
index 0000000..ff84cbf
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-hkspi_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:b603bc0c6102b5cf59599d4017ae186699beb5115d81c19a93ac5ba55b2da0db
+size 341

signoff/caravel/openlane-signoff/timing/max/f-hkspi_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-hkspi_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/max/f-hkspi_clk-min.rpt
new file mode 100644
index 0000000..b72c0b9
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-hkspi_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:296010231ecfdb82290f9040ba3f5533ce3f0570aac12c37ffe5936992f92964
+size 6168678

signoff/caravel/openlane-signoff/timing/max/f-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-max.rpt b/signoff/caravel/openlane-signoff/timing/max/f-max.rpt
new file mode 100644
index 0000000..df85d52
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:073113131c0a54aacf483b0fd0174f57437c316895882f577d4952dfc7773ad2
+size 284330539

signoff/caravel/openlane-signoff/timing/max/f-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-min.rpt b/signoff/caravel/openlane-signoff/timing/max/f-min.rpt
new file mode 100644
index 0000000..deba6fe
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:aa0e6d7298e2ba046c1d775e65aee1680b399b8e8fadcd323b40fbe2c71d56d5
+size 263183818

signoff/caravel/openlane-signoff/timing/max/f-mprj-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-mprj-max.rpt b/signoff/caravel/openlane-signoff/timing/max/f-mprj-max.rpt
new file mode 100644
index 0000000..e41d706
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-mprj-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:1106bcfde48e8d9360b2b23578f4738aa923239e90d37e44bd691d36331baecb
+size 533321

signoff/caravel/openlane-signoff/timing/max/f-mprj-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-mprj-min.rpt b/signoff/caravel/openlane-signoff/timing/max/f-mprj-min.rpt
new file mode 100644
index 0000000..f71decd
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-mprj-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ae8cd57d1ac253895951adfd81307bf0d8ad859a04e98395ef38ccd2f048d7c4
+size 450777

signoff/caravel/openlane-signoff/timing/max/f-soc-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-soc-max.rpt b/signoff/caravel/openlane-signoff/timing/max/f-soc-max.rpt
new file mode 100644
index 0000000..800547a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-soc-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:f85d097314bd1b49b8ef1dce1498c8ceddc65ea250c7f980d5d262abbac91ea2
+size 357

signoff/caravel/openlane-signoff/timing/max/f-soc-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-soc-min.rpt b/signoff/caravel/openlane-signoff/timing/max/f-soc-min.rpt
new file mode 100644
index 0000000..b7d7f26
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-soc-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:b7014fb11b44742a193db45b31026f6315c99405ccd616558c045718355f9276
+size 18069598

signoff/caravel/openlane-signoff/timing/max/f-summary.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-summary.rpt b/signoff/caravel/openlane-signoff/timing/max/f-summary.rpt
new file mode 100644
index 0000000..1c78d5a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-summary.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:c872dde6d6c278716cc9e2c63ff45ecfc44f7e3cf4a6370b649e58177510af30
+size 3068945

signoff/caravel/openlane-signoff/timing/max/f-unannotated.log

diff --git a/signoff/caravel/openlane-signoff/timing/max/f-unannotated.log b/signoff/caravel/openlane-signoff/timing/max/f-unannotated.log
new file mode 100644
index 0000000..8dc7700
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/f-unannotated.log
@@ -0,0 +1,4179 @@
+Found 2894 unannotated nets.
+ padframe/flash_clk
+ padframe/mprj_analog_io[26]
+ mprj_io[28]
+ vssa2
+ vssa1
+ vdda1
+ mprj_io[4]
+ mprj_io[5]
+ mprj_io[19]
+ vssa1_2
+ vdda2
+ mprj_io[2]
+ mprj_io[3]
+ mprj_io[14]
+ mprj_io[33]
+ mprj_io[34]
+ resetb
+ mprj_io[1]
+ mprj_io[8]
+ mprj_io[9]
+ mprj_io[6]
+ mprj_io[11]
+ mprj_io[13]
+ mprj_io[15]
+ mprj_io[17]
+ mprj_io[18]
+ mprj_io[20]
+ mprj_io[23]
+ mprj_io[16]
+ mprj_io[27]
+ mprj_io[29]
+ mprj_io[32]
+ vssd2
+ vccd1
+ clock
+ gpio
+ vssd
+ vdda
+ mprj_io[37]
+ vccd
+ vssa
+ vssio
+ mprj_io[30]
+ vssd1
+ vssio_2
+ vddio
+ mprj_io[36]
+ vddio_2
+ mprj_io[31]
+ vccd2
+ vdda1_2
+ mprj_io[21]
+ mprj_io[26]
+ mprj_io[35]
+ mprj_io[0]
+ mprj_io[22]
+ mprj_io[24]
+ mprj_io[25]
+ mprj_io[7]
+ mprj_io[12]
+ mprj_io[10]
+ gpio_control_bidir_2\[2\]/_053_
+ gpio_control_bidir_2\[2\]/_052_
+ gpio_control_bidir_2\[2\]/_051_
+ gpio_control_bidir_2\[2\]/_050_
+ gpio_control_bidir_2\[2\]/_049_
+ gpio_control_bidir_2\[2\]/_048_
+ gpio_control_bidir_2\[2\]/_047_
+ gpio_control_bidir_2\[2\]/_046_
+ gpio_control_bidir_2\[2\]/_057_
+ gpio_control_bidir_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[7\]/_052_
+ gpio_control_in_1\[7\]/_056_
+ gpio_control_in_1\[7\]/_055_
+ gpio_control_in_1\[7\]/_054_
+ gpio_control_in_1\[7\]/_053_
+ gpio_control_in_1\[7\]/_051_
+ gpio_control_in_1\[7\]/_050_
+ gpio_control_in_1\[7\]/_049_
+ gpio_control_in_1\[7\]/_048_
+ gpio_control_in_1\[7\]/_047_
+ gpio_control_in_1\[7\]/_046_
+ gpio_control_in_1\[7\]/_057_
+ gpio_control_in_1\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_047_
+ gpio_control_in_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_049_
+ gpio_control_in_2\[0\]/_048_
+ gpio_control_in_2\[0\]/_046_
+ gpio_control_in_2\[0\]/_057_
+ gpio_control_in_2\[3\]/_047_
+ gpio_control_in_2\[3\]/_052_
+ gpio_control_in_2\[3\]/_051_
+ gpio_control_in_2\[3\]/_050_
+ gpio_control_in_2\[3\]/_049_
+ gpio_control_in_2\[3\]/_048_
+ gpio_control_in_2\[3\]/_046_
+ gpio_control_in_2\[3\]/_057_
+ gpio_control_in_2\[3\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_20/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[2\]
+ gpio_defaults_block_21/gpio_defaults_low\[6\]
+ gpio_defaults_block_21/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[3\]
+ gpio_defaults_block_20/gpio_defaults_high\[11\]
+ gpio_defaults_block_20/gpio_defaults_low\[11\]
+ gpio_defaults_block_20/gpio_defaults_high\[12\]
+ gpio_defaults_block_20/gpio_defaults_low\[12\]
+ gpio_defaults_block_20/gpio_defaults_high\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[2\]
+ gpio_defaults_block_20/gpio_defaults_low\[2\]
+ gpio_defaults_block_20/gpio_defaults_high\[4\]
+ gpio_defaults_block_20/gpio_defaults_low\[4\]
+ gpio_defaults_block_20/gpio_defaults_high\[5\]
+ gpio_defaults_block_20/gpio_defaults_low\[5\]
+ gpio_defaults_block_20/gpio_defaults_high\[6\]
+ gpio_defaults_block_20/gpio_defaults_low\[6\]
+ gpio_defaults_block_20/gpio_defaults_high\[7\]
+ gpio_defaults_block_20/gpio_defaults_low\[7\]
+ gpio_defaults_block_20/gpio_defaults_high\[8\]
+ gpio_defaults_block_20/gpio_defaults_low\[8\]
+ gpio_defaults_block_20/gpio_defaults_high\[9\]
+ gpio_defaults_block_20/gpio_defaults_low\[9\]
+ gpio_defaults_block_21/gpio_defaults_high\[0\]
+ gpio_defaults_block_21/gpio_defaults_low\[0\]
+ gpio_defaults_block_21/gpio_defaults_high\[10\]
+ gpio_defaults_block_21/gpio_defaults_low\[10\]
+ gpio_defaults_block_21/gpio_defaults_high\[11\]
+ gpio_defaults_block_21/gpio_defaults_low\[11\]
+ gpio_defaults_block_21/gpio_defaults_high\[12\]
+ gpio_defaults_block_21/gpio_defaults_low\[12\]
+ gpio_defaults_block_21/gpio_defaults_high\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[2\]
+ gpio_defaults_block_21/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_low\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[4\]
+ gpio_defaults_block_21/gpio_defaults_low\[4\]
+ gpio_defaults_block_21/gpio_defaults_high\[5\]
+ gpio_defaults_block_21/gpio_defaults_low\[5\]
+ gpio_defaults_block_21/gpio_defaults_high\[6\]
+ gpio_defaults_block_21/gpio_defaults_high\[7\]
+ gpio_defaults_block_21/gpio_defaults_high\[8\]
+ gpio_defaults_block_21/gpio_defaults_low\[8\]
+ gpio_defaults_block_21/gpio_defaults_high\[9\]
+ gpio_defaults_block_21/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[2\]
+ gpio_defaults_block_19/gpio_defaults_high\[3\]
+ gpio_defaults_block_19/gpio_defaults_low\[3\]
+ gpio_defaults_block_19/gpio_defaults_high\[4\]
+ gpio_defaults_block_19/gpio_defaults_low\[4\]
+ gpio_defaults_block_19/gpio_defaults_high\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[6\]
+ gpio_defaults_block_19/gpio_defaults_high\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[8\]
+ gpio_defaults_block_19/gpio_defaults_low\[8\]
+ gpio_defaults_block_19/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[9\]
+ gpio_defaults_block_2/gpio_defaults_high\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[10\]
+ gpio_defaults_block_2/gpio_defaults_low\[10\]
+ gpio_defaults_block_2/gpio_defaults_high\[11\]
+ gpio_defaults_block_2/gpio_defaults_low\[11\]
+ gpio_defaults_block_2/gpio_defaults_high\[12\]
+ gpio_defaults_block_2/gpio_defaults_low\[12\]
+ gpio_defaults_block_2/gpio_defaults_high\[1\]
+ gpio_defaults_block_2/gpio_defaults_high\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_high\[4\]
+ gpio_defaults_block_2/gpio_defaults_low\[4\]
+ gpio_defaults_block_2/gpio_defaults_high\[5\]
+ gpio_defaults_block_2/gpio_defaults_low\[5\]
+ gpio_defaults_block_2/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[7\]
+ gpio_defaults_block_2/gpio_defaults_low\[7\]
+ gpio_defaults_block_2/gpio_defaults_high\[8\]
+ gpio_defaults_block_2/gpio_defaults_low\[8\]
+ gpio_defaults_block_2/gpio_defaults_high\[9\]
+ gpio_defaults_block_2/gpio_defaults_low\[9\]
+ gpio_defaults_block_20/gpio_defaults_high\[0\]
+ gpio_defaults_block_20/gpio_defaults_low\[0\]
+ gpio_defaults_block_20/gpio_defaults_high\[10\]
+ gpio_defaults_block_20/gpio_defaults_low\[10\]
+ padframe/mprj_analog_io[7]
+ padframe/flash_io0
+ padframe/flash_io0_di_core
+ gpio_control_bidir_1\[0\]/_056_
+ gpio_control_bidir_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_1\[0\]/_051_
+ gpio_control_bidir_1\[0\]/_055_
+ gpio_control_bidir_1\[0\]/_054_
+ gpio_control_bidir_1\[0\]/_053_
+ gpio_control_bidir_1\[0\]/_052_
+ gpio_control_bidir_1\[0\]/_050_
+ gpio_control_bidir_1\[0\]/_049_
+ gpio_control_bidir_1\[0\]/_048_
+ gpio_control_bidir_1\[0\]/_047_
+ gpio_control_bidir_1\[0\]/_046_
+ gpio_control_bidir_1\[0\]/_057_
+ gpio_control_bidir_1\[1\]/_051_
+ gpio_control_bidir_1\[1\]/_057_
+ gpio_control_bidir_1\[1\]/_056_
+ gpio_control_bidir_1\[1\]/_055_
+ gpio_control_bidir_1\[1\]/_054_
+ gpio_control_bidir_1\[1\]/_053_
+ gpio_control_bidir_1\[1\]/_052_
+ gpio_control_bidir_1\[1\]/_050_
+ gpio_control_bidir_1\[1\]/_049_
+ gpio_control_bidir_1\[1\]/_048_
+ gpio_control_bidir_1\[1\]/_047_
+ gpio_control_bidir_1\[1\]/_046_
+ gpio_control_bidir_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_047_
+ gpio_control_bidir_2\[0\]/_049_
+ gpio_control_bidir_2\[0\]/_056_
+ gpio_control_bidir_2\[0\]/_051_
+ gpio_control_bidir_2\[0\]/_050_
+ gpio_control_bidir_2\[0\]/_048_
+ gpio_control_bidir_2\[0\]/_046_
+ gpio_control_bidir_2\[0\]/_057_
+ gpio_control_bidir_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_055_
+ gpio_control_bidir_2\[0\]/_054_
+ gpio_control_bidir_2\[0\]/_053_
+ gpio_control_bidir_2\[0\]/_052_
+ gpio_control_bidir_2\[1\]/_050_
+ gpio_control_bidir_2\[1\]/_056_
+ gpio_control_bidir_2\[1\]/_055_
+ gpio_control_bidir_2\[1\]/_054_
+ gpio_control_bidir_2\[1\]/_053_
+ gpio_control_bidir_2\[1\]/_052_
+ gpio_control_bidir_2\[1\]/_051_
+ gpio_control_bidir_2\[1\]/_049_
+ gpio_control_bidir_2\[1\]/_048_
+ gpio_control_bidir_2\[1\]/_047_
+ gpio_control_bidir_2\[1\]/_046_
+ gpio_control_bidir_2\[1\]/_057_
+ gpio_control_bidir_2\[2\]/_056_
+ gpio_control_bidir_2\[2\]/_055_
+ gpio_control_bidir_2\[2\]/_054_
+ gpio_control_bidir_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[0\]/_055_
+ gpio_control_in_1\[0\]/_056_
+ gpio_control_in_1\[0\]/_054_
+ gpio_control_in_1\[0\]/_053_
+ gpio_control_in_1\[0\]/_052_
+ gpio_control_in_1\[0\]/_051_
+ gpio_control_in_1\[0\]/_050_
+ gpio_control_in_1\[0\]/_049_
+ gpio_control_in_1\[0\]/_048_
+ gpio_control_in_1\[0\]/_047_
+ gpio_control_in_1\[0\]/_046_
+ gpio_control_in_1\[0\]/_057_
+ gpio_control_in_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[10\]/_057_
+ gpio_control_in_1\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[10\]/_047_
+ gpio_control_in_1\[10\]/_046_
+ gpio_control_in_1\[10\]/_056_
+ gpio_control_in_1\[10\]/_055_
+ gpio_control_in_1\[10\]/_054_
+ gpio_control_in_1\[10\]/_053_
+ gpio_control_in_1\[10\]/_052_
+ gpio_control_in_1\[10\]/_051_
+ gpio_control_in_1\[10\]/_050_
+ gpio_control_in_1\[10\]/_049_
+ gpio_control_in_1\[10\]/_048_
+ gpio_control_in_1\[1\]/_056_
+ gpio_control_in_1\[1\]/_055_
+ gpio_control_in_1\[1\]/_054_
+ gpio_control_in_1\[1\]/_053_
+ gpio_control_in_1\[1\]/_052_
+ gpio_control_in_1\[1\]/_051_
+ gpio_control_in_1\[1\]/_050_
+ gpio_control_in_1\[1\]/_049_
+ gpio_control_in_1\[1\]/_048_
+ gpio_control_in_1\[1\]/_047_
+ gpio_control_in_1\[1\]/_046_
+ gpio_control_in_1\[1\]/_057_
+ gpio_control_in_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[2\]/_056_
+ gpio_control_in_1\[2\]/_055_
+ gpio_control_in_1\[2\]/_054_
+ gpio_control_in_1\[2\]/_053_
+ gpio_control_in_1\[2\]/_052_
+ gpio_control_in_1\[2\]/_051_
+ gpio_control_in_1\[2\]/_050_
+ gpio_control_in_1\[2\]/_049_
+ gpio_control_in_1\[2\]/_048_
+ gpio_control_in_1\[2\]/_047_
+ gpio_control_in_1\[2\]/_046_
+ gpio_control_in_1\[2\]/_057_
+ gpio_control_in_1\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[3\]/_052_
+ gpio_control_in_1\[3\]/_047_
+ gpio_control_in_1\[3\]/_056_
+ gpio_control_in_1\[3\]/_055_
+ gpio_control_in_1\[3\]/_054_
+ gpio_control_in_1\[3\]/_053_
+ gpio_control_in_1\[3\]/_051_
+ gpio_control_in_1\[3\]/_050_
+ gpio_control_in_1\[3\]/_049_
+ gpio_control_in_1\[3\]/_048_
+ gpio_control_in_1\[3\]/_046_
+ gpio_control_in_1\[3\]/_057_
+ gpio_control_in_1\[3\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[4\]/_056_
+ gpio_control_in_1\[4\]/_055_
+ gpio_control_in_1\[4\]/_054_
+ gpio_control_in_1\[4\]/_053_
+ gpio_control_in_1\[4\]/_052_
+ gpio_control_in_1\[4\]/_051_
+ gpio_control_in_1\[4\]/_050_
+ gpio_control_in_1\[4\]/_049_
+ gpio_control_in_1\[4\]/_048_
+ gpio_control_in_1\[4\]/_047_
+ gpio_control_in_1\[4\]/_046_
+ gpio_control_in_1\[4\]/_057_
+ gpio_control_in_1\[5\]/_054_
+ gpio_control_in_1\[5\]/_049_
+ gpio_control_in_1\[5\]/_056_
+ gpio_control_in_1\[5\]/_055_
+ gpio_control_in_1\[5\]/_053_
+ gpio_control_in_1\[5\]/_052_
+ gpio_control_in_1\[5\]/_051_
+ gpio_control_in_1\[5\]/_050_
+ gpio_control_in_1\[5\]/_048_
+ gpio_control_in_1\[5\]/_047_
+ gpio_control_in_1\[5\]/_046_
+ gpio_control_in_1\[5\]/_057_
+ gpio_control_in_1\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[6\]/_056_
+ gpio_control_in_1\[6\]/_055_
+ gpio_control_in_1\[6\]/_054_
+ gpio_control_in_1\[6\]/_053_
+ gpio_control_in_1\[6\]/_052_
+ gpio_control_in_1\[6\]/_051_
+ gpio_control_in_1\[6\]/_050_
+ gpio_control_in_1\[6\]/_049_
+ gpio_control_in_1\[6\]/_048_
+ gpio_control_in_1\[6\]/_047_
+ gpio_control_in_1\[6\]/_046_
+ gpio_control_in_1\[6\]/_057_
+ gpio_control_in_1\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[8\]/_050_
+ gpio_control_in_1\[8\]/_055_
+ gpio_control_in_1\[8\]/_054_
+ gpio_control_in_1\[8\]/_056_
+ gpio_control_in_1\[8\]/_053_
+ gpio_control_in_1\[8\]/_052_
+ gpio_control_in_1\[8\]/_051_
+ gpio_control_in_1\[8\]/_049_
+ gpio_control_in_1\[8\]/_048_
+ gpio_control_in_1\[8\]/_047_
+ gpio_control_in_1\[8\]/_046_
+ gpio_control_in_1\[8\]/_057_
+ gpio_control_in_1\[8\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[9\]/_056_
+ gpio_control_in_1\[9\]/_046_
+ gpio_control_in_1\[9\]/_057_
+ gpio_control_in_1\[9\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[9\]/_055_
+ gpio_control_in_1\[9\]/_054_
+ gpio_control_in_1\[9\]/_053_
+ gpio_control_in_1\[9\]/_052_
+ gpio_control_in_1\[9\]/_051_
+ gpio_control_in_1\[9\]/_050_
+ gpio_control_in_1\[9\]/_049_
+ gpio_control_in_1\[9\]/_048_
+ gpio_control_in_1\[9\]/_047_
+ gpio_control_in_1a\[0\]/_049_
+ gpio_control_in_1a\[0\]/_056_
+ gpio_control_in_1a\[0\]/_055_
+ gpio_control_in_1a\[0\]/_054_
+ gpio_control_in_1a\[0\]/_053_
+ gpio_control_in_1a\[0\]/_052_
+ gpio_control_in_1a\[0\]/_051_
+ gpio_control_in_1a\[0\]/_050_
+ gpio_control_in_1a\[0\]/_048_
+ gpio_control_in_1a\[0\]/_047_
+ gpio_control_in_1a\[0\]/_046_
+ gpio_control_in_1a\[0\]/_057_
+ gpio_control_in_1a\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[1\]/_047_
+ gpio_control_in_1a\[1\]/_056_
+ gpio_control_in_1a\[1\]/_055_
+ gpio_control_in_1a\[1\]/_054_
+ gpio_control_in_1a\[1\]/_053_
+ gpio_control_in_1a\[1\]/_052_
+ gpio_control_in_1a\[1\]/_051_
+ gpio_control_in_1a\[1\]/_050_
+ gpio_control_in_1a\[1\]/_049_
+ gpio_control_in_1a\[1\]/_048_
+ gpio_control_in_1a\[1\]/_046_
+ gpio_control_in_1a\[1\]/_057_
+ gpio_control_in_1a\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[2\]/_055_
+ gpio_control_in_1a\[2\]/_049_
+ gpio_control_in_1a\[2\]/_056_
+ gpio_control_in_1a\[2\]/_054_
+ gpio_control_in_1a\[2\]/_053_
+ gpio_control_in_1a\[2\]/_052_
+ gpio_control_in_1a\[2\]/_051_
+ gpio_control_in_1a\[2\]/_050_
+ gpio_control_in_1a\[2\]/_048_
+ gpio_control_in_1a\[2\]/_047_
+ gpio_control_in_1a\[2\]/_046_
+ gpio_control_in_1a\[2\]/_057_
+ gpio_control_in_1a\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/_056_
+ gpio_control_in_1a\[3\]/_055_
+ gpio_control_in_1a\[3\]/_054_
+ gpio_control_in_1a\[3\]/_053_
+ gpio_control_in_1a\[3\]/_052_
+ gpio_control_in_1a\[3\]/_051_
+ gpio_control_in_1a\[3\]/_050_
+ gpio_control_in_1a\[3\]/_049_
+ gpio_control_in_1a\[3\]/_048_
+ gpio_control_in_1a\[3\]/_047_
+ gpio_control_in_1a\[3\]/_046_
+ gpio_control_in_1a\[3\]/_057_
+ gpio_control_in_1a\[4\]/_047_
+ gpio_control_in_1a\[4\]/_049_
+ gpio_control_in_1a\[4\]/_056_
+ gpio_control_in_1a\[4\]/_051_
+ gpio_control_in_1a\[4\]/_050_
+ gpio_control_in_1a\[4\]/_048_
+ gpio_control_in_1a\[4\]/_046_
+ gpio_control_in_1a\[4\]/_057_
+ gpio_control_in_1a\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[4\]/_055_
+ gpio_control_in_1a\[4\]/_054_
+ gpio_control_in_1a\[4\]/_053_
+ gpio_control_in_1a\[4\]/_052_
+ gpio_control_in_1a\[5\]/_047_
+ gpio_control_in_1a\[5\]/_056_
+ gpio_control_in_1a\[5\]/_055_
+ gpio_control_in_1a\[5\]/_054_
+ gpio_control_in_1a\[5\]/_053_
+ gpio_control_in_1a\[5\]/_052_
+ gpio_control_in_1a\[5\]/_051_
+ gpio_control_in_1a\[5\]/_050_
+ gpio_control_in_1a\[5\]/_049_
+ gpio_control_in_1a\[5\]/_048_
+ gpio_control_in_1a\[5\]/_046_
+ gpio_control_in_1a\[5\]/_057_
+ gpio_control_in_1a\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_056_
+ gpio_control_in_2\[0\]/_055_
+ gpio_control_in_2\[0\]/_054_
+ gpio_control_in_2\[0\]/_053_
+ gpio_control_in_2\[0\]/_052_
+ gpio_control_in_2\[0\]/_051_
+ gpio_control_in_2\[0\]/_050_
+ gpio_control_in_2\[10\]/_047_
+ gpio_control_in_2\[10\]/_052_
+ gpio_control_in_2\[10\]/_051_
+ gpio_control_in_2\[10\]/_046_
+ gpio_control_in_2\[10\]/_056_
+ gpio_control_in_2\[10\]/_055_
+ gpio_control_in_2\[10\]/_054_
+ gpio_control_in_2\[10\]/_053_
+ gpio_control_in_2\[10\]/_050_
+ gpio_control_in_2\[10\]/_049_
+ gpio_control_in_2\[10\]/_048_
+ gpio_control_in_2\[10\]/_057_
+ gpio_control_in_2\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_056_
+ gpio_control_in_2\[11\]/_057_
+ gpio_control_in_2\[11\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_055_
+ gpio_control_in_2\[11\]/_054_
+ gpio_control_in_2\[11\]/_053_
+ gpio_control_in_2\[11\]/_052_
+ gpio_control_in_2\[11\]/_051_
+ gpio_control_in_2\[11\]/_050_
+ gpio_control_in_2\[11\]/_049_
+ gpio_control_in_2\[11\]/_048_
+ gpio_control_in_2\[11\]/_047_
+ gpio_control_in_2\[11\]/_046_
+ gpio_control_in_2\[12\]/_056_
+ gpio_control_in_2\[12\]/_055_
+ gpio_control_in_2\[12\]/_054_
+ gpio_control_in_2\[12\]/_053_
+ gpio_control_in_2\[12\]/_052_
+ gpio_control_in_2\[12\]/_051_
+ gpio_control_in_2\[12\]/_050_
+ gpio_control_in_2\[12\]/_049_
+ gpio_control_in_2\[12\]/_048_
+ gpio_control_in_2\[12\]/_047_
+ gpio_control_in_2\[12\]/_046_
+ gpio_control_in_2\[12\]/_057_
+ gpio_control_in_2\[12\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[13\]/_056_
+ gpio_control_in_2\[13\]/_055_
+ gpio_control_in_2\[13\]/_054_
+ gpio_control_in_2\[13\]/_053_
+ gpio_control_in_2\[13\]/_052_
+ gpio_control_in_2\[13\]/_051_
+ gpio_control_in_2\[13\]/_050_
+ gpio_control_in_2\[13\]/_049_
+ gpio_control_in_2\[13\]/_048_
+ gpio_control_in_2\[13\]/_047_
+ gpio_control_in_2\[13\]/_046_
+ gpio_control_in_2\[13\]/_057_
+ gpio_control_in_2\[13\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[14\]/_056_
+ gpio_control_in_2\[14\]/_055_
+ gpio_control_in_2\[14\]/_054_
+ gpio_control_in_2\[14\]/_053_
+ gpio_control_in_2\[14\]/_052_
+ gpio_control_in_2\[14\]/_051_
+ gpio_control_in_2\[14\]/_050_
+ gpio_control_in_2\[14\]/_049_
+ gpio_control_in_2\[14\]/_048_
+ gpio_control_in_2\[14\]/_047_
+ gpio_control_in_2\[14\]/_046_
+ gpio_control_in_2\[14\]/_057_
+ gpio_control_in_2\[14\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/_056_
+ gpio_control_in_2\[15\]/_055_
+ gpio_control_in_2\[15\]/_054_
+ gpio_control_in_2\[15\]/_053_
+ gpio_control_in_2\[15\]/_052_
+ gpio_control_in_2\[15\]/_051_
+ gpio_control_in_2\[15\]/_050_
+ gpio_control_in_2\[15\]/_049_
+ gpio_control_in_2\[15\]/_048_
+ gpio_control_in_2\[15\]/_047_
+ gpio_control_in_2\[15\]/_046_
+ gpio_control_in_2\[15\]/_057_
+ gpio_control_in_2\[1\]/_049_
+ gpio_control_in_2\[1\]/_053_
+ gpio_control_in_2\[1\]/_052_
+ gpio_control_in_2\[1\]/_051_
+ gpio_control_in_2\[1\]/_050_
+ gpio_control_in_2\[1\]/_048_
+ gpio_control_in_2\[1\]/_047_
+ gpio_control_in_2\[1\]/_046_
+ gpio_control_in_2\[1\]/_057_
+ gpio_control_in_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[1\]/_056_
+ gpio_control_in_2\[1\]/_055_
+ gpio_control_in_2\[1\]/_054_
+ gpio_control_in_2\[2\]/_056_
+ gpio_control_in_2\[2\]/_051_
+ gpio_control_in_2\[2\]/_046_
+ gpio_control_in_2\[2\]/_055_
+ gpio_control_in_2\[2\]/_054_
+ gpio_control_in_2\[2\]/_053_
+ gpio_control_in_2\[2\]/_052_
+ gpio_control_in_2\[2\]/_050_
+ gpio_control_in_2\[2\]/_049_
+ gpio_control_in_2\[2\]/_048_
+ gpio_control_in_2\[2\]/_047_
+ gpio_control_in_2\[2\]/_057_
+ gpio_control_in_2\[3\]/_055_
+ gpio_control_in_2\[3\]/_056_
+ gpio_control_in_2\[3\]/_054_
+ gpio_control_in_2\[3\]/_053_
+ gpio_control_in_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[4\]/_049_
+ gpio_control_in_2\[4\]/_056_
+ gpio_control_in_2\[4\]/_055_
+ gpio_control_in_2\[4\]/_054_
+ gpio_control_in_2\[4\]/_053_
+ gpio_control_in_2\[4\]/_052_
+ gpio_control_in_2\[4\]/_051_
+ gpio_control_in_2\[4\]/_050_
+ gpio_control_in_2\[4\]/_048_
+ gpio_control_in_2\[4\]/_047_
+ gpio_control_in_2\[4\]/_046_
+ gpio_control_in_2\[4\]/_057_
+ gpio_control_in_2\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_057_
+ gpio_control_in_2\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_047_
+ gpio_control_in_2\[5\]/_046_
+ gpio_control_in_2\[5\]/_056_
+ gpio_control_in_2\[5\]/_055_
+ gpio_control_in_2\[5\]/_054_
+ gpio_control_in_2\[5\]/_053_
+ gpio_control_in_2\[5\]/_052_
+ gpio_control_in_2\[5\]/_051_
+ gpio_control_in_2\[5\]/_050_
+ gpio_control_in_2\[5\]/_049_
+ gpio_control_in_2\[5\]/_048_
+ gpio_control_in_2\[6\]/_056_
+ gpio_control_in_2\[6\]/_055_
+ gpio_control_in_2\[6\]/_054_
+ gpio_control_in_2\[6\]/_053_
+ gpio_control_in_2\[6\]/_052_
+ gpio_control_in_2\[6\]/_051_
+ gpio_control_in_2\[6\]/_050_
+ gpio_control_in_2\[6\]/_049_
+ gpio_control_in_2\[6\]/_048_
+ gpio_control_in_2\[6\]/_047_
+ gpio_control_in_2\[6\]/_046_
+ gpio_control_in_2\[6\]/_057_
+ gpio_control_in_2\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[7\]/_054_
+ gpio_control_in_2\[7\]/_056_
+ gpio_control_in_2\[7\]/_055_
+ gpio_control_in_2\[7\]/_053_
+ gpio_control_in_2\[7\]/_052_
+ gpio_control_in_2\[7\]/_051_
+ gpio_control_in_2\[7\]/_050_
+ gpio_control_in_2\[7\]/_049_
+ gpio_control_in_2\[7\]/_048_
+ gpio_control_in_2\[7\]/_047_
+ gpio_control_in_2\[7\]/_046_
+ gpio_control_in_2\[7\]/_057_
+ gpio_control_in_2\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[8\]/_052_
+ gpio_control_in_2\[8\]/_047_
+ gpio_control_in_2\[8\]/_056_
+ gpio_control_in_2\[8\]/_055_
+ gpio_control_in_2\[8\]/_054_
+ gpio_control_in_2\[8\]/_053_
+ gpio_control_in_2\[8\]/_051_
+ gpio_control_in_2\[8\]/_050_
+ gpio_control_in_2\[8\]/_049_
+ gpio_control_in_2\[8\]/_048_
+ gpio_control_in_2\[8\]/_046_
+ gpio_control_in_2\[8\]/_057_
+ gpio_control_in_2\[8\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[4\]
+ gpio_defaults_block_0/gpio_defaults_low\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[9\]
+ gpio_control_in_2\[9\]/_051_
+ gpio_control_in_2\[9\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[0\]
+ gpio_defaults_block_0/gpio_defaults_low\[0\]
+ gpio_defaults_block_0/gpio_defaults_high\[10\]
+ gpio_defaults_block_0/gpio_defaults_low\[10\]
+ gpio_defaults_block_0/gpio_defaults_high\[11\]
+ gpio_defaults_block_0/gpio_defaults_low\[11\]
+ gpio_defaults_block_0/gpio_defaults_high\[12\]
+ gpio_defaults_block_0/gpio_defaults_low\[12\]
+ gpio_defaults_block_0/gpio_defaults_high\[1\]
+ gpio_defaults_block_0/gpio_defaults_low\[1\]
+ gpio_defaults_block_0/gpio_defaults_high\[2\]
+ gpio_defaults_block_0/gpio_defaults_low\[2\]
+ gpio_defaults_block_0/gpio_defaults_high\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[4\]
+ gpio_defaults_block_0/gpio_defaults_high\[5\]
+ gpio_defaults_block_0/gpio_defaults_low\[5\]
+ gpio_defaults_block_0/gpio_defaults_high\[6\]
+ gpio_defaults_block_0/gpio_defaults_low\[6\]
+ gpio_defaults_block_0/gpio_defaults_high\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[9\]
+ gpio_control_in_2\[9\]/_056_
+ gpio_control_in_2\[9\]/_055_
+ gpio_control_in_2\[9\]/_054_
+ gpio_control_in_2\[9\]/_053_
+ gpio_control_in_2\[9\]/_052_
+ gpio_control_in_2\[9\]/_050_
+ gpio_control_in_2\[9\]/_049_
+ gpio_control_in_2\[9\]/_048_
+ gpio_control_in_2\[9\]/_047_
+ gpio_control_in_2\[9\]/_046_
+ gpio_control_in_2\[9\]/_057_
+ gpio_defaults_block_11/gpio_defaults_low\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[0\]
+ gpio_defaults_block_11/gpio_defaults_low\[0\]
+ gpio_defaults_block_11/gpio_defaults_high\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[11\]
+ gpio_defaults_block_11/gpio_defaults_low\[11\]
+ gpio_defaults_block_11/gpio_defaults_high\[12\]
+ gpio_defaults_block_11/gpio_defaults_low\[12\]
+ gpio_defaults_block_11/gpio_defaults_high\[1\]
+ gpio_defaults_block_11/gpio_defaults_low\[1\]
+ gpio_defaults_block_11/gpio_defaults_high\[2\]
+ gpio_defaults_block_11/gpio_defaults_low\[2\]
+ gpio_defaults_block_11/gpio_defaults_high\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[9\]
+ gpio_defaults_block_11/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[0\]
+ gpio_defaults_block_12/gpio_defaults_low\[0\]
+ gpio_defaults_block_12/gpio_defaults_high\[10\]
+ gpio_defaults_block_12/gpio_defaults_low\[10\]
+ gpio_defaults_block_12/gpio_defaults_high\[11\]
+ gpio_defaults_block_12/gpio_defaults_low\[11\]
+ gpio_defaults_block_12/gpio_defaults_high\[12\]
+ gpio_defaults_block_12/gpio_defaults_low\[12\]
+ gpio_defaults_block_12/gpio_defaults_high\[1\]
+ gpio_defaults_block_12/gpio_defaults_low\[1\]
+ gpio_defaults_block_12/gpio_defaults_high\[2\]
+ gpio_defaults_block_12/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[0\]
+ gpio_defaults_block_1/gpio_defaults_low\[0\]
+ gpio_defaults_block_1/gpio_defaults_high\[10\]
+ gpio_defaults_block_1/gpio_defaults_low\[10\]
+ gpio_defaults_block_1/gpio_defaults_high\[11\]
+ gpio_defaults_block_1/gpio_defaults_low\[11\]
+ gpio_defaults_block_1/gpio_defaults_high\[12\]
+ gpio_defaults_block_1/gpio_defaults_low\[12\]
+ gpio_defaults_block_1/gpio_defaults_high\[1\]
+ gpio_defaults_block_1/gpio_defaults_low\[1\]
+ gpio_defaults_block_1/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[4\]
+ gpio_defaults_block_1/gpio_defaults_high\[5\]
+ gpio_defaults_block_1/gpio_defaults_low\[5\]
+ gpio_defaults_block_1/gpio_defaults_high\[6\]
+ gpio_defaults_block_1/gpio_defaults_low\[6\]
+ gpio_defaults_block_1/gpio_defaults_high\[7\]
+ gpio_defaults_block_1/gpio_defaults_low\[7\]
+ gpio_defaults_block_1/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_low\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[9\]
+ gpio_defaults_block_1/gpio_defaults_low\[9\]
+ gpio_defaults_block_10/gpio_defaults_high\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[11\]
+ gpio_defaults_block_10/gpio_defaults_low\[11\]
+ gpio_defaults_block_10/gpio_defaults_high\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[2\]
+ gpio_defaults_block_10/gpio_defaults_low\[2\]
+ gpio_defaults_block_10/gpio_defaults_high\[3\]
+ gpio_defaults_block_10/gpio_defaults_low\[3\]
+ gpio_defaults_block_10/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_low\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[5\]
+ gpio_defaults_block_10/gpio_defaults_low\[5\]
+ gpio_defaults_block_10/gpio_defaults_high\[6\]
+ gpio_defaults_block_10/gpio_defaults_low\[6\]
+ gpio_defaults_block_10/gpio_defaults_high\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[8\]
+ gpio_defaults_block_10/gpio_defaults_high\[9\]
+ gpio_defaults_block_10/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[10\]
+ gpio_defaults_block_15/gpio_defaults_low\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[7\]
+ gpio_defaults_block_15/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[11\]
+ gpio_defaults_block_13/gpio_defaults_low\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[10\]
+ gpio_defaults_block_14/gpio_defaults_low\[11\]
+ gpio_defaults_block_14/gpio_defaults_high\[12\]
+ gpio_defaults_block_14/gpio_defaults_low\[12\]
+ gpio_defaults_block_14/gpio_defaults_high\[1\]
+ gpio_defaults_block_14/gpio_defaults_low\[1\]
+ gpio_defaults_block_14/gpio_defaults_high\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[5\]
+ gpio_defaults_block_14/gpio_defaults_high\[6\]
+ gpio_defaults_block_14/gpio_defaults_low\[6\]
+ gpio_defaults_block_14/gpio_defaults_high\[7\]
+ gpio_defaults_block_14/gpio_defaults_low\[7\]
+ gpio_defaults_block_14/gpio_defaults_high\[8\]
+ gpio_defaults_block_14/gpio_defaults_low\[8\]
+ gpio_defaults_block_14/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_low\[9\]
+ gpio_defaults_block_15/gpio_defaults_high\[0\]
+ gpio_defaults_block_15/gpio_defaults_low\[0\]
+ gpio_defaults_block_15/gpio_defaults_high\[10\]
+ gpio_defaults_block_15/gpio_defaults_high\[11\]
+ gpio_defaults_block_15/gpio_defaults_low\[11\]
+ gpio_defaults_block_15/gpio_defaults_high\[12\]
+ gpio_defaults_block_15/gpio_defaults_low\[12\]
+ gpio_defaults_block_15/gpio_defaults_high\[1\]
+ gpio_defaults_block_15/gpio_defaults_low\[1\]
+ gpio_defaults_block_15/gpio_defaults_high\[2\]
+ gpio_defaults_block_15/gpio_defaults_low\[2\]
+ gpio_defaults_block_15/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_high\[5\]
+ gpio_defaults_block_15/gpio_defaults_low\[5\]
+ gpio_defaults_block_15/gpio_defaults_high\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[7\]
+ gpio_defaults_block_15/gpio_defaults_high\[8\]
+ gpio_defaults_block_15/gpio_defaults_high\[9\]
+ gpio_defaults_block_15/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[3\]
+ gpio_defaults_block_12/gpio_defaults_low\[3\]
+ gpio_defaults_block_12/gpio_defaults_high\[4\]
+ gpio_defaults_block_12/gpio_defaults_low\[4\]
+ gpio_defaults_block_12/gpio_defaults_high\[5\]
+ gpio_defaults_block_12/gpio_defaults_low\[5\]
+ gpio_defaults_block_12/gpio_defaults_high\[6\]
+ gpio_defaults_block_12/gpio_defaults_low\[6\]
+ gpio_defaults_block_12/gpio_defaults_high\[7\]
+ gpio_defaults_block_12/gpio_defaults_high\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_low\[9\]
+ gpio_defaults_block_13/gpio_defaults_high\[0\]
+ gpio_defaults_block_13/gpio_defaults_low\[0\]
+ gpio_defaults_block_13/gpio_defaults_high\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[11\]
+ gpio_defaults_block_13/gpio_defaults_high\[12\]
+ gpio_defaults_block_13/gpio_defaults_low\[12\]
+ gpio_defaults_block_13/gpio_defaults_high\[1\]
+ gpio_defaults_block_13/gpio_defaults_low\[1\]
+ gpio_defaults_block_13/gpio_defaults_high\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[3\]
+ gpio_defaults_block_13/gpio_defaults_high\[4\]
+ gpio_defaults_block_13/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_low\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[6\]
+ gpio_defaults_block_13/gpio_defaults_low\[6\]
+ gpio_defaults_block_13/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[8\]
+ gpio_defaults_block_13/gpio_defaults_low\[8\]
+ gpio_defaults_block_13/gpio_defaults_high\[9\]
+ gpio_defaults_block_13/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[0\]
+ gpio_defaults_block_14/gpio_defaults_low\[0\]
+ gpio_defaults_block_14/gpio_defaults_high\[10\]
+ gpio_defaults_block_14/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[3\]
+ gpio_defaults_block_18/gpio_defaults_low\[5\]
+ gpio_defaults_block_18/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[0\]
+ gpio_defaults_block_16/gpio_defaults_low\[10\]
+ gpio_defaults_block_16/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[11\]
+ gpio_defaults_block_17/gpio_defaults_low\[12\]
+ gpio_defaults_block_17/gpio_defaults_low\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[0\]
+ gpio_defaults_block_18/gpio_defaults_low\[0\]
+ gpio_defaults_block_18/gpio_defaults_high\[10\]
+ gpio_defaults_block_18/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[11\]
+ gpio_defaults_block_18/gpio_defaults_high\[12\]
+ gpio_defaults_block_18/gpio_defaults_low\[12\]
+ gpio_defaults_block_18/gpio_defaults_high\[1\]
+ gpio_defaults_block_18/gpio_defaults_low\[1\]
+ gpio_defaults_block_18/gpio_defaults_high\[2\]
+ gpio_defaults_block_18/gpio_defaults_low\[2\]
+ gpio_defaults_block_18/gpio_defaults_high\[3\]
+ gpio_defaults_block_18/gpio_defaults_high\[4\]
+ gpio_defaults_block_18/gpio_defaults_low\[4\]
+ gpio_defaults_block_18/gpio_defaults_high\[5\]
+ gpio_defaults_block_18/gpio_defaults_high\[6\]
+ gpio_defaults_block_18/gpio_defaults_low\[6\]
+ gpio_defaults_block_18/gpio_defaults_high\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[8\]
+ gpio_defaults_block_18/gpio_defaults_low\[8\]
+ gpio_defaults_block_18/gpio_defaults_high\[9\]
+ gpio_defaults_block_18/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[0\]
+ gpio_defaults_block_19/gpio_defaults_low\[0\]
+ gpio_defaults_block_19/gpio_defaults_high\[10\]
+ gpio_defaults_block_19/gpio_defaults_low\[10\]
+ gpio_defaults_block_19/gpio_defaults_high\[11\]
+ gpio_defaults_block_19/gpio_defaults_high\[12\]
+ gpio_defaults_block_19/gpio_defaults_low\[12\]
+ gpio_defaults_block_19/gpio_defaults_high\[1\]
+ gpio_defaults_block_19/gpio_defaults_low\[1\]
+ gpio_defaults_block_19/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[0\]
+ gpio_defaults_block_16/gpio_defaults_high\[10\]
+ gpio_defaults_block_16/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_high\[12\]
+ gpio_defaults_block_16/gpio_defaults_low\[12\]
+ gpio_defaults_block_16/gpio_defaults_high\[1\]
+ gpio_defaults_block_16/gpio_defaults_low\[1\]
+ gpio_defaults_block_16/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_low\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[3\]
+ gpio_defaults_block_16/gpio_defaults_high\[4\]
+ gpio_defaults_block_16/gpio_defaults_low\[4\]
+ gpio_defaults_block_16/gpio_defaults_high\[5\]
+ gpio_defaults_block_16/gpio_defaults_low\[5\]
+ gpio_defaults_block_16/gpio_defaults_high\[6\]
+ gpio_defaults_block_16/gpio_defaults_low\[6\]
+ gpio_defaults_block_16/gpio_defaults_high\[7\]
+ gpio_defaults_block_16/gpio_defaults_low\[7\]
+ gpio_defaults_block_16/gpio_defaults_high\[8\]
+ gpio_defaults_block_16/gpio_defaults_low\[8\]
+ gpio_defaults_block_16/gpio_defaults_high\[9\]
+ gpio_defaults_block_16/gpio_defaults_low\[9\]
+ gpio_defaults_block_17/gpio_defaults_high\[0\]
+ gpio_defaults_block_17/gpio_defaults_low\[0\]
+ gpio_defaults_block_17/gpio_defaults_high\[10\]
+ gpio_defaults_block_17/gpio_defaults_low\[10\]
+ gpio_defaults_block_17/gpio_defaults_high\[11\]
+ gpio_defaults_block_17/gpio_defaults_high\[12\]
+ gpio_defaults_block_17/gpio_defaults_high\[1\]
+ gpio_defaults_block_17/gpio_defaults_low\[1\]
+ gpio_defaults_block_17/gpio_defaults_high\[2\]
+ gpio_defaults_block_17/gpio_defaults_low\[2\]
+ gpio_defaults_block_17/gpio_defaults_high\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_high\[4\]
+ gpio_defaults_block_17/gpio_defaults_low\[4\]
+ gpio_defaults_block_17/gpio_defaults_high\[5\]
+ gpio_defaults_block_17/gpio_defaults_low\[5\]
+ gpio_defaults_block_17/gpio_defaults_high\[6\]
+ gpio_defaults_block_17/gpio_defaults_low\[6\]
+ gpio_defaults_block_17/gpio_defaults_high\[7\]
+ gpio_defaults_block_17/gpio_defaults_high\[8\]
+ gpio_defaults_block_17/gpio_defaults_low\[8\]
+ gpio_defaults_block_17/gpio_defaults_high\[9\]
+ gpio_defaults_block_17/gpio_defaults_low\[9\]
+ gpio_defaults_block_24/gpio_defaults_high\[10\]
+ gpio_defaults_block_24/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[6\]
+ gpio_defaults_block_22/gpio_defaults_low\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[10\]
+ gpio_defaults_block_24/gpio_defaults_high\[11\]
+ gpio_defaults_block_24/gpio_defaults_low\[11\]
+ gpio_defaults_block_24/gpio_defaults_high\[12\]
+ gpio_defaults_block_24/gpio_defaults_low\[12\]
+ gpio_defaults_block_24/gpio_defaults_high\[1\]
+ gpio_defaults_block_24/gpio_defaults_low\[1\]
+ gpio_defaults_block_24/gpio_defaults_high\[2\]
+ gpio_defaults_block_24/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_low\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[4\]
+ gpio_defaults_block_24/gpio_defaults_low\[4\]
+ gpio_defaults_block_24/gpio_defaults_high\[5\]
+ gpio_defaults_block_24/gpio_defaults_low\[5\]
+ gpio_defaults_block_24/gpio_defaults_high\[6\]
+ gpio_defaults_block_24/gpio_defaults_low\[6\]
+ gpio_defaults_block_24/gpio_defaults_high\[7\]
+ gpio_defaults_block_24/gpio_defaults_low\[7\]
+ gpio_defaults_block_24/gpio_defaults_high\[8\]
+ gpio_defaults_block_24/gpio_defaults_low\[8\]
+ gpio_defaults_block_24/gpio_defaults_high\[9\]
+ gpio_defaults_block_24/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_high\[0\]
+ gpio_defaults_block_25/gpio_defaults_low\[0\]
+ gpio_defaults_block_25/gpio_defaults_high\[10\]
+ gpio_defaults_block_25/gpio_defaults_low\[10\]
+ gpio_defaults_block_25/gpio_defaults_high\[11\]
+ gpio_defaults_block_25/gpio_defaults_low\[11\]
+ gpio_defaults_block_25/gpio_defaults_high\[12\]
+ gpio_defaults_block_25/gpio_defaults_low\[12\]
+ gpio_defaults_block_25/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[0\]
+ gpio_defaults_block_22/gpio_defaults_low\[0\]
+ gpio_defaults_block_22/gpio_defaults_high\[10\]
+ gpio_defaults_block_22/gpio_defaults_low\[10\]
+ gpio_defaults_block_22/gpio_defaults_high\[11\]
+ gpio_defaults_block_22/gpio_defaults_low\[11\]
+ gpio_defaults_block_22/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_low\[12\]
+ gpio_defaults_block_22/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_low\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[2\]
+ gpio_defaults_block_22/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[3\]
+ gpio_defaults_block_22/gpio_defaults_low\[3\]
+ gpio_defaults_block_22/gpio_defaults_high\[4\]
+ gpio_defaults_block_22/gpio_defaults_low\[4\]
+ gpio_defaults_block_22/gpio_defaults_high\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[6\]
+ gpio_defaults_block_22/gpio_defaults_high\[7\]
+ gpio_defaults_block_22/gpio_defaults_low\[7\]
+ gpio_defaults_block_22/gpio_defaults_high\[8\]
+ gpio_defaults_block_22/gpio_defaults_low\[8\]
+ gpio_defaults_block_22/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[11\]
+ gpio_defaults_block_23/gpio_defaults_low\[11\]
+ gpio_defaults_block_23/gpio_defaults_high\[12\]
+ gpio_defaults_block_23/gpio_defaults_low\[12\]
+ gpio_defaults_block_23/gpio_defaults_high\[1\]
+ gpio_defaults_block_23/gpio_defaults_low\[1\]
+ gpio_defaults_block_23/gpio_defaults_high\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[3\]
+ gpio_defaults_block_23/gpio_defaults_high\[4\]
+ gpio_defaults_block_23/gpio_defaults_low\[4\]
+ gpio_defaults_block_23/gpio_defaults_high\[5\]
+ gpio_defaults_block_23/gpio_defaults_low\[5\]
+ gpio_defaults_block_23/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_low\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[7\]
+ gpio_defaults_block_23/gpio_defaults_low\[7\]
+ gpio_defaults_block_23/gpio_defaults_high\[8\]
+ gpio_defaults_block_23/gpio_defaults_low\[8\]
+ gpio_defaults_block_23/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_low\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[11\]
+ gpio_defaults_block_28/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_low\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[11\]
+ gpio_defaults_block_27/gpio_defaults_high\[12\]
+ gpio_defaults_block_27/gpio_defaults_low\[12\]
+ gpio_defaults_block_27/gpio_defaults_high\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[3\]
+ gpio_defaults_block_27/gpio_defaults_low\[3\]
+ gpio_defaults_block_27/gpio_defaults_high\[4\]
+ gpio_defaults_block_27/gpio_defaults_high\[5\]
+ gpio_defaults_block_27/gpio_defaults_low\[5\]
+ gpio_defaults_block_27/gpio_defaults_high\[6\]
+ gpio_defaults_block_27/gpio_defaults_low\[6\]
+ gpio_defaults_block_27/gpio_defaults_high\[7\]
+ gpio_defaults_block_27/gpio_defaults_low\[7\]
+ gpio_defaults_block_27/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_high\[0\]
+ gpio_defaults_block_28/gpio_defaults_low\[0\]
+ gpio_defaults_block_28/gpio_defaults_high\[10\]
+ gpio_defaults_block_28/gpio_defaults_low\[10\]
+ gpio_defaults_block_28/gpio_defaults_high\[11\]
+ gpio_defaults_block_28/gpio_defaults_high\[12\]
+ gpio_defaults_block_28/gpio_defaults_low\[12\]
+ gpio_defaults_block_28/gpio_defaults_high\[1\]
+ gpio_defaults_block_28/gpio_defaults_low\[1\]
+ gpio_defaults_block_28/gpio_defaults_high\[2\]
+ gpio_defaults_block_28/gpio_defaults_low\[2\]
+ gpio_defaults_block_28/gpio_defaults_high\[3\]
+ gpio_defaults_block_28/gpio_defaults_low\[3\]
+ gpio_defaults_block_28/gpio_defaults_high\[4\]
+ gpio_defaults_block_28/gpio_defaults_low\[4\]
+ gpio_defaults_block_28/gpio_defaults_high\[5\]
+ gpio_defaults_block_28/gpio_defaults_high\[6\]
+ gpio_defaults_block_28/gpio_defaults_low\[6\]
+ gpio_defaults_block_28/gpio_defaults_high\[7\]
+ gpio_defaults_block_28/gpio_defaults_low\[7\]
+ gpio_defaults_block_28/gpio_defaults_high\[8\]
+ gpio_defaults_block_28/gpio_defaults_low\[8\]
+ gpio_defaults_block_28/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[1\]
+ gpio_defaults_block_25/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_low\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[3\]
+ gpio_defaults_block_25/gpio_defaults_low\[3\]
+ gpio_defaults_block_25/gpio_defaults_high\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_high\[6\]
+ gpio_defaults_block_25/gpio_defaults_low\[6\]
+ gpio_defaults_block_25/gpio_defaults_high\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[8\]
+ gpio_defaults_block_25/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[10\]
+ gpio_defaults_block_26/gpio_defaults_low\[10\]
+ gpio_defaults_block_26/gpio_defaults_high\[11\]
+ gpio_defaults_block_26/gpio_defaults_low\[11\]
+ gpio_defaults_block_26/gpio_defaults_high\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[2\]
+ gpio_defaults_block_26/gpio_defaults_high\[3\]
+ gpio_defaults_block_26/gpio_defaults_low\[3\]
+ gpio_defaults_block_26/gpio_defaults_high\[4\]
+ gpio_defaults_block_26/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[5\]
+ gpio_defaults_block_26/gpio_defaults_low\[5\]
+ gpio_defaults_block_26/gpio_defaults_high\[6\]
+ gpio_defaults_block_26/gpio_defaults_low\[6\]
+ gpio_defaults_block_26/gpio_defaults_high\[7\]
+ gpio_defaults_block_26/gpio_defaults_low\[7\]
+ gpio_defaults_block_26/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_high\[0\]
+ gpio_defaults_block_27/gpio_defaults_low\[0\]
+ gpio_defaults_block_27/gpio_defaults_high\[10\]
+ gpio_defaults_block_27/gpio_defaults_low\[10\]
+ gpio_defaults_block_27/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[2\]
+ gpio_defaults_block_30/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[9\]
+ gpio_defaults_block_3/gpio_defaults_low\[2\]
+ gpio_defaults_block_3/gpio_defaults_low\[9\]
+ gpio_defaults_block_30/gpio_defaults_high\[0\]
+ gpio_defaults_block_30/gpio_defaults_low\[0\]
+ gpio_defaults_block_30/gpio_defaults_high\[10\]
+ gpio_defaults_block_30/gpio_defaults_low\[10\]
+ gpio_defaults_block_30/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_low\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[12\]
+ gpio_defaults_block_30/gpio_defaults_low\[12\]
+ gpio_defaults_block_30/gpio_defaults_high\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[2\]
+ gpio_defaults_block_30/gpio_defaults_high\[3\]
+ gpio_defaults_block_30/gpio_defaults_low\[3\]
+ gpio_defaults_block_30/gpio_defaults_high\[4\]
+ gpio_defaults_block_30/gpio_defaults_low\[4\]
+ gpio_defaults_block_30/gpio_defaults_high\[5\]
+ gpio_defaults_block_30/gpio_defaults_low\[5\]
+ gpio_defaults_block_30/gpio_defaults_high\[6\]
+ gpio_defaults_block_30/gpio_defaults_low\[6\]
+ gpio_defaults_block_30/gpio_defaults_high\[7\]
+ gpio_defaults_block_30/gpio_defaults_low\[7\]
+ gpio_defaults_block_30/gpio_defaults_high\[8\]
+ gpio_defaults_block_30/gpio_defaults_low\[8\]
+ gpio_defaults_block_30/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[0\]
+ gpio_defaults_block_31/gpio_defaults_low\[0\]
+ gpio_defaults_block_31/gpio_defaults_high\[10\]
+ gpio_defaults_block_31/gpio_defaults_low\[10\]
+ gpio_defaults_block_31/gpio_defaults_high\[11\]
+ gpio_defaults_block_31/gpio_defaults_high\[12\]
+ gpio_defaults_block_31/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[0\]
+ gpio_defaults_block_29/gpio_defaults_low\[0\]
+ gpio_defaults_block_29/gpio_defaults_high\[10\]
+ gpio_defaults_block_29/gpio_defaults_low\[10\]
+ gpio_defaults_block_29/gpio_defaults_high\[11\]
+ gpio_defaults_block_29/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[1\]
+ gpio_defaults_block_29/gpio_defaults_low\[1\]
+ gpio_defaults_block_29/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_low\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[3\]
+ gpio_defaults_block_29/gpio_defaults_low\[3\]
+ gpio_defaults_block_29/gpio_defaults_high\[4\]
+ gpio_defaults_block_29/gpio_defaults_low\[4\]
+ gpio_defaults_block_29/gpio_defaults_high\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[6\]
+ gpio_defaults_block_29/gpio_defaults_low\[6\]
+ gpio_defaults_block_29/gpio_defaults_high\[7\]
+ gpio_defaults_block_29/gpio_defaults_low\[7\]
+ gpio_defaults_block_29/gpio_defaults_high\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[9\]
+ gpio_defaults_block_3/gpio_defaults_high\[0\]
+ gpio_defaults_block_3/gpio_defaults_low\[0\]
+ gpio_defaults_block_3/gpio_defaults_high\[10\]
+ gpio_defaults_block_3/gpio_defaults_low\[10\]
+ gpio_defaults_block_3/gpio_defaults_high\[11\]
+ gpio_defaults_block_3/gpio_defaults_low\[11\]
+ gpio_defaults_block_3/gpio_defaults_high\[12\]
+ gpio_defaults_block_3/gpio_defaults_low\[12\]
+ gpio_defaults_block_3/gpio_defaults_high\[1\]
+ gpio_defaults_block_3/gpio_defaults_low\[1\]
+ gpio_defaults_block_3/gpio_defaults_high\[2\]
+ gpio_defaults_block_3/gpio_defaults_high\[3\]
+ gpio_defaults_block_3/gpio_defaults_low\[3\]
+ gpio_defaults_block_3/gpio_defaults_high\[4\]
+ gpio_defaults_block_3/gpio_defaults_low\[4\]
+ gpio_defaults_block_3/gpio_defaults_high\[5\]
+ gpio_defaults_block_3/gpio_defaults_low\[5\]
+ gpio_defaults_block_3/gpio_defaults_high\[6\]
+ gpio_defaults_block_3/gpio_defaults_low\[6\]
+ gpio_defaults_block_3/gpio_defaults_high\[7\]
+ gpio_defaults_block_3/gpio_defaults_low\[7\]
+ gpio_defaults_block_3/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_low\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[4\]
+ gpio_defaults_block_31/gpio_defaults_low\[7\]
+ gpio_defaults_block_31/gpio_defaults_low\[9\]
+ gpio_defaults_block_32/gpio_defaults_high\[0\]
+ gpio_defaults_block_32/gpio_defaults_low\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_high\[11\]
+ gpio_defaults_block_33/gpio_defaults_low\[11\]
+ gpio_defaults_block_33/gpio_defaults_high\[12\]
+ gpio_defaults_block_33/gpio_defaults_low\[12\]
+ gpio_defaults_block_33/gpio_defaults_high\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[2\]
+ gpio_defaults_block_33/gpio_defaults_low\[2\]
+ gpio_defaults_block_33/gpio_defaults_high\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[4\]
+ gpio_defaults_block_33/gpio_defaults_high\[5\]
+ gpio_defaults_block_33/gpio_defaults_low\[5\]
+ gpio_defaults_block_33/gpio_defaults_high\[6\]
+ gpio_defaults_block_33/gpio_defaults_low\[6\]
+ gpio_defaults_block_33/gpio_defaults_high\[7\]
+ gpio_defaults_block_33/gpio_defaults_low\[7\]
+ gpio_defaults_block_33/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[0\]
+ gpio_defaults_block_34/gpio_defaults_low\[0\]
+ gpio_defaults_block_34/gpio_defaults_high\[10\]
+ gpio_defaults_block_34/gpio_defaults_low\[10\]
+ gpio_defaults_block_34/gpio_defaults_high\[11\]
+ gpio_defaults_block_34/gpio_defaults_low\[11\]
+ gpio_defaults_block_34/gpio_defaults_high\[12\]
+ gpio_defaults_block_34/gpio_defaults_low\[12\]
+ gpio_defaults_block_34/gpio_defaults_high\[1\]
+ gpio_defaults_block_34/gpio_defaults_low\[1\]
+ gpio_defaults_block_34/gpio_defaults_high\[2\]
+ gpio_defaults_block_34/gpio_defaults_low\[2\]
+ gpio_defaults_block_34/gpio_defaults_high\[3\]
+ gpio_defaults_block_34/gpio_defaults_low\[3\]
+ gpio_defaults_block_34/gpio_defaults_high\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[5\]
+ gpio_defaults_block_34/gpio_defaults_high\[6\]
+ gpio_defaults_block_34/gpio_defaults_low\[6\]
+ gpio_defaults_block_34/gpio_defaults_high\[7\]
+ gpio_defaults_block_34/gpio_defaults_low\[7\]
+ gpio_defaults_block_34/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_low\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[1\]
+ gpio_defaults_block_31/gpio_defaults_low\[1\]
+ gpio_defaults_block_31/gpio_defaults_high\[2\]
+ gpio_defaults_block_31/gpio_defaults_low\[2\]
+ gpio_defaults_block_31/gpio_defaults_high\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[4\]
+ gpio_defaults_block_31/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_low\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[6\]
+ gpio_defaults_block_31/gpio_defaults_low\[6\]
+ gpio_defaults_block_31/gpio_defaults_high\[7\]
+ gpio_defaults_block_31/gpio_defaults_high\[8\]
+ gpio_defaults_block_31/gpio_defaults_low\[8\]
+ gpio_defaults_block_31/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[0\]
+ gpio_defaults_block_32/gpio_defaults_high\[10\]
+ gpio_defaults_block_32/gpio_defaults_low\[10\]
+ gpio_defaults_block_32/gpio_defaults_high\[11\]
+ gpio_defaults_block_32/gpio_defaults_low\[11\]
+ gpio_defaults_block_32/gpio_defaults_high\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[1\]
+ gpio_defaults_block_32/gpio_defaults_high\[2\]
+ gpio_defaults_block_32/gpio_defaults_low\[2\]
+ gpio_defaults_block_32/gpio_defaults_high\[3\]
+ gpio_defaults_block_32/gpio_defaults_low\[3\]
+ gpio_defaults_block_32/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[5\]
+ gpio_defaults_block_32/gpio_defaults_low\[5\]
+ gpio_defaults_block_32/gpio_defaults_high\[6\]
+ gpio_defaults_block_32/gpio_defaults_low\[6\]
+ gpio_defaults_block_32/gpio_defaults_high\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[8\]
+ gpio_defaults_block_32/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[0\]
+ gpio_defaults_block_33/gpio_defaults_low\[0\]
+ gpio_defaults_block_33/gpio_defaults_high\[10\]
+ gpio_defaults_block_33/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[0\]
+ gpio_defaults_block_37/gpio_defaults_low\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_high\[5\]
+ gpio_defaults_block_35/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[9\]
+ gpio_defaults_block_37/gpio_defaults_high\[0\]
+ gpio_defaults_block_37/gpio_defaults_high\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_high\[11\]
+ gpio_defaults_block_37/gpio_defaults_low\[11\]
+ gpio_defaults_block_37/gpio_defaults_high\[12\]
+ gpio_defaults_block_37/gpio_defaults_low\[12\]
+ gpio_defaults_block_37/gpio_defaults_high\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[2\]
+ gpio_defaults_block_37/gpio_defaults_low\[2\]
+ gpio_defaults_block_37/gpio_defaults_high\[3\]
+ gpio_defaults_block_37/gpio_defaults_low\[3\]
+ gpio_defaults_block_37/gpio_defaults_high\[4\]
+ gpio_defaults_block_37/gpio_defaults_low\[4\]
+ gpio_defaults_block_37/gpio_defaults_high\[5\]
+ gpio_defaults_block_37/gpio_defaults_low\[5\]
+ gpio_defaults_block_37/gpio_defaults_high\[6\]
+ gpio_defaults_block_37/gpio_defaults_low\[6\]
+ gpio_defaults_block_37/gpio_defaults_high\[7\]
+ gpio_defaults_block_37/gpio_defaults_low\[7\]
+ gpio_defaults_block_37/gpio_defaults_high\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_high\[0\]
+ gpio_defaults_block_4/gpio_defaults_low\[0\]
+ gpio_defaults_block_4/gpio_defaults_high\[10\]
+ gpio_defaults_block_4/gpio_defaults_low\[10\]
+ gpio_defaults_block_4/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_low\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[0\]
+ gpio_defaults_block_35/gpio_defaults_low\[0\]
+ gpio_defaults_block_35/gpio_defaults_high\[10\]
+ gpio_defaults_block_35/gpio_defaults_low\[10\]
+ gpio_defaults_block_35/gpio_defaults_high\[11\]
+ gpio_defaults_block_35/gpio_defaults_low\[11\]
+ gpio_defaults_block_35/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_low\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[1\]
+ gpio_defaults_block_35/gpio_defaults_low\[1\]
+ gpio_defaults_block_35/gpio_defaults_high\[2\]
+ gpio_defaults_block_35/gpio_defaults_low\[2\]
+ gpio_defaults_block_35/gpio_defaults_high\[3\]
+ gpio_defaults_block_35/gpio_defaults_low\[3\]
+ gpio_defaults_block_35/gpio_defaults_high\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[5\]
+ gpio_defaults_block_35/gpio_defaults_high\[6\]
+ gpio_defaults_block_35/gpio_defaults_low\[6\]
+ gpio_defaults_block_35/gpio_defaults_high\[7\]
+ gpio_defaults_block_35/gpio_defaults_low\[7\]
+ gpio_defaults_block_35/gpio_defaults_high\[8\]
+ gpio_defaults_block_35/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_low\[9\]
+ gpio_defaults_block_36/gpio_defaults_high\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[10\]
+ gpio_defaults_block_36/gpio_defaults_low\[10\]
+ gpio_defaults_block_36/gpio_defaults_high\[11\]
+ gpio_defaults_block_36/gpio_defaults_low\[11\]
+ gpio_defaults_block_36/gpio_defaults_high\[12\]
+ gpio_defaults_block_36/gpio_defaults_low\[12\]
+ gpio_defaults_block_36/gpio_defaults_high\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[3\]
+ gpio_defaults_block_36/gpio_defaults_low\[3\]
+ gpio_defaults_block_36/gpio_defaults_high\[4\]
+ gpio_defaults_block_36/gpio_defaults_low\[4\]
+ gpio_defaults_block_36/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_low\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[6\]
+ gpio_defaults_block_36/gpio_defaults_low\[6\]
+ gpio_defaults_block_36/gpio_defaults_high\[7\]
+ gpio_defaults_block_36/gpio_defaults_low\[7\]
+ gpio_defaults_block_36/gpio_defaults_high\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[11\]
+ gpio_defaults_block_7/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[11\]
+ gpio_defaults_block_6/gpio_defaults_low\[11\]
+ gpio_defaults_block_6/gpio_defaults_high\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[2\]
+ gpio_defaults_block_6/gpio_defaults_low\[2\]
+ gpio_defaults_block_6/gpio_defaults_high\[3\]
+ gpio_defaults_block_6/gpio_defaults_high\[4\]
+ gpio_defaults_block_6/gpio_defaults_low\[4\]
+ gpio_defaults_block_6/gpio_defaults_high\[5\]
+ gpio_defaults_block_6/gpio_defaults_low\[5\]
+ gpio_defaults_block_6/gpio_defaults_high\[6\]
+ gpio_defaults_block_6/gpio_defaults_low\[6\]
+ gpio_defaults_block_6/gpio_defaults_high\[7\]
+ gpio_defaults_block_6/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[8\]
+ gpio_defaults_block_6/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[9\]
+ gpio_defaults_block_7/gpio_defaults_high\[0\]
+ gpio_defaults_block_7/gpio_defaults_low\[0\]
+ gpio_defaults_block_7/gpio_defaults_high\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[11\]
+ gpio_defaults_block_7/gpio_defaults_high\[12\]
+ gpio_defaults_block_7/gpio_defaults_low\[12\]
+ gpio_defaults_block_7/gpio_defaults_high\[1\]
+ gpio_defaults_block_7/gpio_defaults_low\[1\]
+ gpio_defaults_block_7/gpio_defaults_high\[2\]
+ gpio_defaults_block_7/gpio_defaults_low\[2\]
+ gpio_defaults_block_7/gpio_defaults_high\[3\]
+ gpio_defaults_block_7/gpio_defaults_low\[3\]
+ gpio_defaults_block_7/gpio_defaults_high\[4\]
+ gpio_defaults_block_7/gpio_defaults_high\[5\]
+ gpio_defaults_block_7/gpio_defaults_low\[5\]
+ gpio_defaults_block_7/gpio_defaults_high\[6\]
+ gpio_defaults_block_7/gpio_defaults_low\[6\]
+ gpio_defaults_block_7/gpio_defaults_high\[7\]
+ gpio_defaults_block_7/gpio_defaults_low\[7\]
+ gpio_defaults_block_7/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[9\]
+ gpio_defaults_block_7/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_low\[12\]
+ gpio_defaults_block_4/gpio_defaults_high\[1\]
+ gpio_defaults_block_4/gpio_defaults_low\[1\]
+ gpio_defaults_block_4/gpio_defaults_high\[2\]
+ gpio_defaults_block_4/gpio_defaults_low\[2\]
+ gpio_defaults_block_4/gpio_defaults_high\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_high\[5\]
+ gpio_defaults_block_4/gpio_defaults_low\[5\]
+ gpio_defaults_block_4/gpio_defaults_high\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[9\]
+ gpio_defaults_block_5/gpio_defaults_high\[0\]
+ gpio_defaults_block_5/gpio_defaults_low\[0\]
+ gpio_defaults_block_5/gpio_defaults_high\[10\]
+ gpio_defaults_block_5/gpio_defaults_low\[10\]
+ gpio_defaults_block_5/gpio_defaults_high\[11\]
+ gpio_defaults_block_5/gpio_defaults_low\[11\]
+ gpio_defaults_block_5/gpio_defaults_high\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[1\]
+ gpio_defaults_block_5/gpio_defaults_high\[2\]
+ gpio_defaults_block_5/gpio_defaults_low\[2\]
+ gpio_defaults_block_5/gpio_defaults_high\[3\]
+ gpio_defaults_block_5/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[4\]
+ gpio_defaults_block_5/gpio_defaults_low\[4\]
+ gpio_defaults_block_5/gpio_defaults_high\[5\]
+ gpio_defaults_block_5/gpio_defaults_low\[5\]
+ gpio_defaults_block_5/gpio_defaults_high\[6\]
+ gpio_defaults_block_5/gpio_defaults_low\[6\]
+ gpio_defaults_block_5/gpio_defaults_high\[7\]
+ gpio_defaults_block_5/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_low\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[0\]
+ gpio_defaults_block_6/gpio_defaults_low\[0\]
+ gpio_defaults_block_6/gpio_defaults_high\[10\]
+ gpio_defaults_block_6/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[11\]
+ gpio_defaults_block_8/gpio_defaults_low\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[8\]
+ gpio_defaults_block_8/gpio_defaults_low\[9\]
+ gpio_defaults_block_9/gpio_defaults_high\[0\]
+ gpio_defaults_block_9/gpio_defaults_low\[1\]
+ gpio_defaults_block_9/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[0\]
+ gpio_defaults_block_8/gpio_defaults_low\[0\]
+ gpio_defaults_block_8/gpio_defaults_high\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[11\]
+ gpio_defaults_block_8/gpio_defaults_high\[12\]
+ gpio_defaults_block_8/gpio_defaults_low\[12\]
+ gpio_defaults_block_8/gpio_defaults_high\[1\]
+ gpio_defaults_block_8/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[2\]
+ gpio_defaults_block_8/gpio_defaults_low\[2\]
+ gpio_defaults_block_8/gpio_defaults_high\[3\]
+ gpio_defaults_block_8/gpio_defaults_low\[3\]
+ gpio_defaults_block_8/gpio_defaults_high\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[5\]
+ gpio_defaults_block_8/gpio_defaults_low\[5\]
+ gpio_defaults_block_8/gpio_defaults_high\[6\]
+ gpio_defaults_block_8/gpio_defaults_low\[6\]
+ gpio_defaults_block_8/gpio_defaults_high\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[0\]
+ gpio_defaults_block_9/gpio_defaults_high\[10\]
+ gpio_defaults_block_9/gpio_defaults_low\[10\]
+ gpio_defaults_block_9/gpio_defaults_high\[11\]
+ gpio_defaults_block_9/gpio_defaults_low\[11\]
+ gpio_defaults_block_9/gpio_defaults_high\[12\]
+ gpio_defaults_block_9/gpio_defaults_low\[12\]
+ gpio_defaults_block_9/gpio_defaults_high\[1\]
+ gpio_defaults_block_9/gpio_defaults_high\[2\]
+ gpio_defaults_block_9/gpio_defaults_low\[2\]
+ gpio_defaults_block_9/gpio_defaults_high\[3\]
+ gpio_defaults_block_9/gpio_defaults_low\[3\]
+ gpio_defaults_block_9/gpio_defaults_high\[4\]
+ gpio_defaults_block_9/gpio_defaults_low\[4\]
+ gpio_defaults_block_9/gpio_defaults_high\[5\]
+ gpio_defaults_block_9/gpio_defaults_low\[5\]
+ gpio_defaults_block_9/gpio_defaults_high\[6\]
+ gpio_defaults_block_9/gpio_defaults_low\[6\]
+ gpio_defaults_block_9/gpio_defaults_high\[7\]
+ gpio_defaults_block_9/gpio_defaults_low\[7\]
+ gpio_defaults_block_9/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[9\]
+ padframe/flash_io1_di_core
+ padframe/clock_core
+ padframe/mprj_analog_io[6]
+ padframe/gpio_in_core
+ padframe/flash_io1
+ padframe/mprj_analog_io[27]
+ padframe/mprj_analog_io[28]
+ padframe/mprj_analog_io[24]
+ padframe/mprj_analog_io[25]
+ padframe/mprj_analog_io[5]
+ padframe/mprj_analog_io[8]
+ padframe/mprj_analog_io[12]
+ padframe/mprj_analog_io[11]
+ padframe/mprj_analog_io[10]
+ padframe/mprj_analog_io[14]
+ padframe/mprj_analog_io[16]
+ padframe/mprj_analog_io[15]
+ padframe/mprj_analog_io[17]
+ padframe/mprj_analog_io[19]
+ padframe/mprj_analog_io[21]
+ padframe/mprj_analog_io[22]
+ padframe/mprj_analog_io[23]
+ padframe/mprj_io[28]
+ padframe/gpio
+ padframe/mprj_io[34]
+ padframe/flash_csb
+ padframe/mprj_analog_io[18]
+ padframe/mprj_analog_io[13]
+ padframe/mprj_io[8]
+ padframe/mprj_io[10]
+ padframe/mprj_io[21]
+ padframe/mprj_io[22]
+ padframe/clock
+ padframe/mprj_io[25]
+ padframe/mprj_analog_io[2]
+ padframe/mprj_io[17]
+ mprj/mprj/p[5]
+ padframe/mprj_io[0]
+ mprj/mprj/p[7]
+ mprj/mprj/p[6]
+ mprj/mprj/p[4]
+ padframe/mprj_io[9]
+ padframe/mprj_io[11]
+ padframe/mprj_io[33]
+ mgmt_buffers/mprj2_logic_high_inst/HI
+ mgmt_buffers/mprj_logic_high_inst/HI[462]
+ mgmt_buffers/mprj_logic_high_inst/HI[461]
+ mgmt_buffers/mprj_logic_high_inst/HI[460]
+ mgmt_buffers/mprj_logic_high_inst/HI[459]
+ mgmt_buffers/mprj_logic_high_inst/HI[458]
+ mgmt_buffers/mprj_logic_high_inst/HI[457]
+ mgmt_buffers/mprj_logic_high_inst/HI[456]
+ mgmt_buffers/mprj_logic_high_inst/HI[455]
+ mgmt_buffers/mprj_logic_high_inst/HI[454]
+ mgmt_buffers/mprj_logic_high_inst/HI[453]
+ mgmt_buffers/mprj_logic_high_inst/HI[452]
+ mgmt_buffers/mprj_logic_high_inst/HI[451]
+ mgmt_buffers/mprj_logic_high_inst/HI[450]
+ mgmt_buffers/mprj_logic_high_inst/HI[449]
+ mgmt_buffers/mprj_logic_high_inst/HI[448]
+ mgmt_buffers/mprj_logic_high_inst/HI[447]
+ mgmt_buffers/mprj_logic_high_inst/HI[446]
+ mgmt_buffers/mprj_logic_high_inst/HI[445]
+ mgmt_buffers/mprj_logic_high_inst/HI[444]
+ padframe/mprj_io[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[443]
+ mgmt_buffers/mprj_logic_high_inst/HI[442]
+ mgmt_buffers/mprj_logic_high_inst/HI[441]
+ mgmt_buffers/mprj_logic_high_inst/HI[440]
+ mgmt_buffers/mprj_logic_high_inst/HI[439]
+ mgmt_buffers/mprj_logic_high_inst/HI[438]
+ mgmt_buffers/mprj_logic_high_inst/HI[437]
+ mgmt_buffers/mprj_logic_high_inst/HI[436]
+ mgmt_buffers/mprj_logic_high_inst/HI[435]
+ mgmt_buffers/mprj_logic_high_inst/HI[434]
+ mgmt_buffers/mprj_logic_high_inst/HI[433]
+ mgmt_buffers/mprj_logic_high_inst/HI[432]
+ mgmt_buffers/mprj_logic_high_inst/HI[431]
+ mgmt_buffers/mprj_logic_high_inst/HI[430]
+ mgmt_buffers/mprj_logic_high_inst/HI[429]
+ mgmt_buffers/mprj_logic_high_inst/HI[428]
+ mgmt_buffers/mprj_logic_high_inst/HI[427]
+ mgmt_buffers/mprj_logic_high_inst/HI[426]
+ padframe/mprj_io[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[425]
+ mgmt_buffers/mprj_logic_high_inst/HI[424]
+ mgmt_buffers/mprj_logic_high_inst/HI[423]
+ mgmt_buffers/mprj_logic_high_inst/HI[422]
+ mgmt_buffers/mprj_logic_high_inst/HI[421]
+ mgmt_buffers/mprj_logic_high_inst/HI[420]
+ mgmt_buffers/mprj_logic_high_inst/HI[419]
+ mgmt_buffers/mprj_logic_high_inst/HI[418]
+ mgmt_buffers/mprj_logic_high_inst/HI[417]
+ mgmt_buffers/mprj_logic_high_inst/HI[416]
+ mgmt_buffers/mprj_logic_high_inst/HI[415]
+ mgmt_buffers/mprj_logic_high_inst/HI[414]
+ mgmt_buffers/mprj_logic_high_inst/HI[413]
+ mgmt_buffers/mprj_logic_high_inst/HI[412]
+ mgmt_buffers/mprj_logic_high_inst/HI[411]
+ mgmt_buffers/mprj_logic_high_inst/HI[410]
+ mgmt_buffers/mprj_logic_high_inst/HI[409]
+ mgmt_buffers/mprj_logic_high_inst/HI[408]
+ mgmt_buffers/mprj_logic_high_inst/HI[407]
+ mgmt_buffers/mprj_logic_high_inst/HI[406]
+ mgmt_buffers/mprj_logic_high_inst/HI[405]
+ mgmt_buffers/mprj_logic_high_inst/HI[404]
+ mgmt_buffers/mprj_logic_high_inst/HI[403]
+ mgmt_buffers/mprj_logic_high_inst/HI[402]
+ mgmt_buffers/mprj_logic_high_inst/HI[401]
+ mgmt_buffers/mprj_logic_high_inst/HI[400]
+ mgmt_buffers/mprj_logic_high_inst/HI[399]
+ mgmt_buffers/mprj_logic_high_inst/HI[398]
+ mgmt_buffers/mprj_logic_high_inst/HI[397]
+ mgmt_buffers/mprj_logic_high_inst/HI[396]
+ mgmt_buffers/mprj_logic_high_inst/HI[395]
+ mgmt_buffers/mprj_logic_high_inst/HI[394]
+ mgmt_buffers/mprj_logic_high_inst/HI[393]
+ mgmt_buffers/mprj_logic_high_inst/HI[392]
+ mgmt_buffers/mprj_logic_high_inst/HI[391]
+ mgmt_buffers/mprj_logic_high_inst/HI[390]
+ mgmt_buffers/mprj_logic_high_inst/HI[389]
+ mgmt_buffers/mprj_logic_high_inst/HI[388]
+ mgmt_buffers/mprj_logic_high_inst/HI[387]
+ mgmt_buffers/mprj_logic_high_inst/HI[386]
+ mgmt_buffers/mprj_logic_high_inst/HI[385]
+ mgmt_buffers/mprj_logic_high_inst/HI[384]
+ mgmt_buffers/mprj_logic_high_inst/HI[383]
+ mgmt_buffers/mprj_logic_high_inst/HI[382]
+ mgmt_buffers/mprj_logic_high_inst/HI[381]
+ mgmt_buffers/mprj_logic_high_inst/HI[380]
+ mgmt_buffers/mprj_logic_high_inst/HI[379]
+ mgmt_buffers/mprj_logic_high_inst/HI[378]
+ mgmt_buffers/mprj_logic_high_inst/HI[377]
+ mgmt_buffers/mprj_logic_high_inst/HI[376]
+ mgmt_buffers/mprj_logic_high_inst/HI[375]
+ mgmt_buffers/mprj_logic_high_inst/HI[374]
+ mgmt_buffers/mprj_logic_high_inst/HI[373]
+ mgmt_buffers/mprj_logic_high_inst/HI[372]
+ mgmt_buffers/mprj_logic_high_inst/HI[371]
+ mgmt_buffers/mprj_logic_high_inst/HI[370]
+ mgmt_buffers/mprj_logic_high_inst/HI[369]
+ mgmt_buffers/mprj_logic_high_inst/HI[368]
+ mgmt_buffers/mprj_logic_high_inst/HI[367]
+ mgmt_buffers/mprj_logic_high_inst/HI[366]
+ mgmt_buffers/mprj_logic_high_inst/HI[365]
+ mgmt_buffers/mprj_logic_high_inst/HI[364]
+ mgmt_buffers/mprj_logic_high_inst/HI[363]
+ padframe/mprj_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[362]
+ mgmt_buffers/mprj_logic_high_inst/HI[361]
+ mgmt_buffers/mprj_logic_high_inst/HI[360]
+ mgmt_buffers/mprj_logic_high_inst/HI[359]
+ mgmt_buffers/mprj_logic_high_inst/HI[358]
+ mgmt_buffers/mprj_logic_high_inst/HI[357]
+ mgmt_buffers/mprj_logic_high_inst/HI[356]
+ mgmt_buffers/mprj_logic_high_inst/HI[355]
+ mgmt_buffers/mprj_logic_high_inst/HI[354]
+ mgmt_buffers/mprj_logic_high_inst/HI[353]
+ mgmt_buffers/mprj_logic_high_inst/HI[352]
+ mgmt_buffers/mprj_logic_high_inst/HI[351]
+ mgmt_buffers/mprj_logic_high_inst/HI[350]
+ mgmt_buffers/mprj_logic_high_inst/HI[349]
+ mgmt_buffers/mprj_logic_high_inst/HI[348]
+ mgmt_buffers/mprj_logic_high_inst/HI[347]
+ mgmt_buffers/mprj_logic_high_inst/HI[346]
+ mgmt_buffers/mprj_logic_high_inst/HI[345]
+ mgmt_buffers/mprj_logic_high_inst/HI[344]
+ mgmt_buffers/mprj_logic_high_inst/HI[343]
+ mgmt_buffers/mprj_logic_high_inst/HI[342]
+ mgmt_buffers/mprj_logic_high_inst/HI[341]
+ mgmt_buffers/mprj_logic_high_inst/HI[340]
+ mgmt_buffers/mprj_logic_high_inst/HI[339]
+ mgmt_buffers/mprj_logic_high_inst/HI[338]
+ mgmt_buffers/mprj_logic_high_inst/HI[337]
+ mgmt_buffers/mprj_logic_high_inst/HI[336]
+ mgmt_buffers/mprj_logic_high_inst/HI[335]
+ mgmt_buffers/mprj_logic_high_inst/HI[334]
+ mgmt_buffers/mprj_logic_high_inst/HI[333]
+ mgmt_buffers/mprj_logic_high_inst/HI[332]
+ mgmt_buffers/mprj_logic_high_inst/HI[331]
+ mgmt_buffers/mprj_logic_high_inst/HI[330]
+ mgmt_buffers/mprj_logic_high_inst/HI[329]
+ mgmt_buffers/mprj_logic_high_inst/HI[328]
+ mgmt_buffers/mprj_logic_high_inst/HI[327]
+ mgmt_buffers/mprj_logic_high_inst/HI[326]
+ mgmt_buffers/mprj_logic_high_inst/HI[325]
+ mgmt_buffers/mprj_logic_high_inst/HI[324]
+ mgmt_buffers/mprj_logic_high_inst/HI[323]
+ mgmt_buffers/mprj_logic_high_inst/HI[322]
+ padframe/mprj_io[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[321]
+ mgmt_buffers/mprj_logic_high_inst/HI[320]
+ mgmt_buffers/mprj_logic_high_inst/HI[319]
+ mgmt_buffers/mprj_logic_high_inst/HI[318]
+ mgmt_buffers/mprj_logic_high_inst/HI[317]
+ mgmt_buffers/mprj_logic_high_inst/HI[316]
+ mgmt_buffers/mprj_logic_high_inst/HI[315]
+ mgmt_buffers/mprj_logic_high_inst/HI[314]
+ mgmt_buffers/mprj_logic_high_inst/HI[313]
+ mgmt_buffers/mprj_logic_high_inst/HI[312]
+ mgmt_buffers/mprj_logic_high_inst/HI[311]
+ mgmt_buffers/mprj_logic_high_inst/HI[310]
+ mgmt_buffers/mprj_logic_high_inst/HI[309]
+ mgmt_buffers/mprj_logic_high_inst/HI[308]
+ mgmt_buffers/mprj_logic_high_inst/HI[307]
+ mgmt_buffers/mprj_logic_high_inst/HI[306]
+ mgmt_buffers/mprj_logic_high_inst/HI[305]
+ mgmt_buffers/mprj_logic_high_inst/HI[304]
+ mgmt_buffers/mprj_logic_high_inst/HI[303]
+ mgmt_buffers/mprj_logic_high_inst/HI[302]
+ mgmt_buffers/mprj_logic_high_inst/HI[301]
+ mgmt_buffers/mprj_logic_high_inst/HI[300]
+ mgmt_buffers/mprj_logic_high_inst/HI[299]
+ mgmt_buffers/mprj_logic_high_inst/HI[298]
+ mgmt_buffers/mprj_logic_high_inst/HI[297]
+ mgmt_buffers/mprj_logic_high_inst/HI[296]
+ mgmt_buffers/mprj_logic_high_inst/HI[295]
+ mgmt_buffers/mprj_logic_high_inst/HI[294]
+ mgmt_buffers/mprj_logic_high_inst/HI[293]
+ mgmt_buffers/mprj_logic_high_inst/HI[292]
+ mgmt_buffers/mprj_logic_high_inst/HI[291]
+ padframe/mprj_analog_io[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[290]
+ mgmt_buffers/mprj_logic_high_inst/HI[289]
+ mgmt_buffers/mprj_logic_high_inst/HI[288]
+ mgmt_buffers/mprj_logic_high_inst/HI[287]
+ mgmt_buffers/mprj_logic_high_inst/HI[286]
+ mgmt_buffers/mprj_logic_high_inst/HI[285]
+ mgmt_buffers/mprj_logic_high_inst/HI[284]
+ mgmt_buffers/mprj_logic_high_inst/HI[283]
+ mgmt_buffers/mprj_logic_high_inst/HI[282]
+ mgmt_buffers/mprj_logic_high_inst/HI[281]
+ mgmt_buffers/mprj_logic_high_inst/HI[280]
+ mgmt_buffers/mprj_logic_high_inst/HI[279]
+ mgmt_buffers/mprj_logic_high_inst/HI[278]
+ mgmt_buffers/mprj_logic_high_inst/HI[277]
+ mgmt_buffers/mprj_logic_high_inst/HI[276]
+ mgmt_buffers/mprj_logic_high_inst/HI[275]
+ mgmt_buffers/mprj_logic_high_inst/HI[274]
+ mgmt_buffers/mprj_logic_high_inst/HI[273]
+ mgmt_buffers/mprj_logic_high_inst/HI[272]
+ mgmt_buffers/mprj_logic_high_inst/HI[271]
+ mgmt_buffers/mprj_logic_high_inst/HI[270]
+ mgmt_buffers/mprj_logic_high_inst/HI[269]
+ padframe/mprj_analog_io[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[268]
+ mgmt_buffers/mprj_logic_high_inst/HI[267]
+ mgmt_buffers/mprj_logic_high_inst/HI[266]
+ mgmt_buffers/mprj_logic_high_inst/HI[265]
+ mgmt_buffers/mprj_logic_high_inst/HI[264]
+ mgmt_buffers/mprj_logic_high_inst/HI[263]
+ mgmt_buffers/mprj_logic_high_inst/HI[262]
+ mgmt_buffers/mprj_logic_high_inst/HI[261]
+ mgmt_buffers/mprj_logic_high_inst/HI[260]
+ mgmt_buffers/mprj_logic_high_inst/HI[259]
+ mgmt_buffers/mprj_logic_high_inst/HI[258]
+ mgmt_buffers/mprj_logic_high_inst/HI[257]
+ mgmt_buffers/mprj_logic_high_inst/HI[256]
+ mgmt_buffers/mprj_logic_high_inst/HI[255]
+ mgmt_buffers/mprj_logic_high_inst/HI[254]
+ mgmt_buffers/mprj_logic_high_inst/HI[253]
+ mgmt_buffers/mprj_logic_high_inst/HI[252]
+ mgmt_buffers/mprj_logic_high_inst/HI[251]
+ mgmt_buffers/mprj_logic_high_inst/HI[250]
+ mgmt_buffers/mprj_logic_high_inst/HI[249]
+ mgmt_buffers/mprj_logic_high_inst/HI[248]
+ mgmt_buffers/mprj_logic_high_inst/HI[247]
+ mgmt_buffers/mprj_logic_high_inst/HI[246]
+ mgmt_buffers/mprj_logic_high_inst/HI[245]
+ mgmt_buffers/mprj_logic_high_inst/HI[244]
+ mgmt_buffers/mprj_logic_high_inst/HI[243]
+ mgmt_buffers/mprj_logic_high_inst/HI[242]
+ mgmt_buffers/mprj_logic_high_inst/HI[241]
+ mgmt_buffers/mprj_logic_high_inst/HI[240]
+ mgmt_buffers/mprj_logic_high_inst/HI[239]
+ mgmt_buffers/mprj_logic_high_inst/HI[238]
+ mgmt_buffers/mprj_logic_high_inst/HI[237]
+ mgmt_buffers/mprj_logic_high_inst/HI[236]
+ mgmt_buffers/mprj_logic_high_inst/HI[235]
+ mgmt_buffers/mprj_logic_high_inst/HI[234]
+ mgmt_buffers/mprj_logic_high_inst/HI[233]
+ mgmt_buffers/mprj_logic_high_inst/HI[232]
+ mgmt_buffers/mprj_logic_high_inst/HI[231]
+ mgmt_buffers/mprj_logic_high_inst/HI[230]
+ mgmt_buffers/mprj_logic_high_inst/HI[229]
+ mgmt_buffers/mprj_logic_high_inst/HI[228]
+ padframe/mprj_analog_io[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[227]
+ mgmt_buffers/mprj_logic_high_inst/HI[226]
+ mgmt_buffers/mprj_logic_high_inst/HI[225]
+ mgmt_buffers/mprj_logic_high_inst/HI[224]
+ mgmt_buffers/mprj_logic_high_inst/HI[223]
+ mgmt_buffers/mprj_logic_high_inst/HI[222]
+ mgmt_buffers/mprj_logic_high_inst/HI[221]
+ mgmt_buffers/mprj_logic_high_inst/HI[220]
+ mgmt_buffers/mprj_logic_high_inst/HI[219]
+ mgmt_buffers/mprj_logic_high_inst/HI[218]
+ mgmt_buffers/mprj_logic_high_inst/HI[217]
+ mgmt_buffers/mprj_logic_high_inst/HI[216]
+ mgmt_buffers/mprj_logic_high_inst/HI[215]
+ mgmt_buffers/mprj_logic_high_inst/HI[214]
+ mgmt_buffers/mprj_logic_high_inst/HI[213]
+ mgmt_buffers/mprj_logic_high_inst/HI[212]
+ mgmt_buffers/mprj_logic_high_inst/HI[211]
+ mgmt_buffers/mprj_logic_high_inst/HI[210]
+ mgmt_buffers/mprj_logic_high_inst/HI[209]
+ mgmt_buffers/mprj_logic_high_inst/HI[208]
+ mgmt_buffers/mprj_logic_high_inst/HI[207]
+ mgmt_buffers/mprj_logic_high_inst/HI[206]
+ mgmt_buffers/mprj_logic_high_inst/HI[205]
+ mgmt_buffers/mprj_logic_high_inst/HI[204]
+ mgmt_buffers/mprj_logic_high_inst/HI[203]
+ mgmt_buffers/mprj_logic_high_inst/HI[202]
+ mgmt_buffers/mprj_logic_high_inst/HI[201]
+ mgmt_buffers/mprj_logic_high_inst/HI[200]
+ mgmt_buffers/mprj_logic_high_inst/HI[199]
+ mgmt_buffers/mprj_logic_high_inst/HI[198]
+ mgmt_buffers/mprj_logic_high_inst/HI[197]
+ mgmt_buffers/mprj_logic_high_inst/HI[196]
+ mgmt_buffers/mprj_logic_high_inst/HI[195]
+ mgmt_buffers/mprj_logic_high_inst/HI[194]
+ mgmt_buffers/mprj_logic_high_inst/HI[193]
+ mgmt_buffers/mprj_logic_high_inst/HI[192]
+ mgmt_buffers/mprj_logic_high_inst/HI[191]
+ mgmt_buffers/mprj_logic_high_inst/HI[190]
+ mgmt_buffers/mprj_logic_high_inst/HI[189]
+ mgmt_buffers/mprj_logic_high_inst/HI[188]
+ padframe/mprj_io[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[187]
+ mgmt_buffers/mprj_logic_high_inst/HI[186]
+ mgmt_buffers/mprj_logic_high_inst/HI[185]
+ mgmt_buffers/mprj_logic_high_inst/HI[184]
+ mgmt_buffers/mprj_logic_high_inst/HI[183]
+ mgmt_buffers/mprj_logic_high_inst/HI[182]
+ mgmt_buffers/mprj_logic_high_inst/HI[181]
+ mgmt_buffers/mprj_logic_high_inst/HI[180]
+ mgmt_buffers/mprj_logic_high_inst/HI[179]
+ mgmt_buffers/mprj_logic_high_inst/HI[178]
+ mgmt_buffers/mprj_logic_high_inst/HI[177]
+ mgmt_buffers/mprj_logic_high_inst/HI[176]
+ mgmt_buffers/mprj_logic_high_inst/HI[175]
+ mgmt_buffers/mprj_logic_high_inst/HI[174]
+ mgmt_buffers/mprj_logic_high_inst/HI[173]
+ mgmt_buffers/mprj_logic_high_inst/HI[172]
+ mgmt_buffers/mprj_logic_high_inst/HI[171]
+ mgmt_buffers/mprj_logic_high_inst/HI[170]
+ mgmt_buffers/mprj_logic_high_inst/HI[169]
+ mgmt_buffers/mprj_logic_high_inst/HI[168]
+ mgmt_buffers/mprj_logic_high_inst/HI[167]
+ mgmt_buffers/mprj_logic_high_inst/HI[166]
+ mgmt_buffers/mprj_logic_high_inst/HI[165]
+ mgmt_buffers/mprj_logic_high_inst/HI[164]
+ mgmt_buffers/mprj_logic_high_inst/HI[163]
+ mgmt_buffers/mprj_logic_high_inst/HI[162]
+ mgmt_buffers/mprj_logic_high_inst/HI[161]
+ mgmt_buffers/mprj_logic_high_inst/HI[160]
+ mgmt_buffers/mprj_logic_high_inst/HI[159]
+ mgmt_buffers/mprj_logic_high_inst/HI[158]
+ mgmt_buffers/mprj_logic_high_inst/HI[157]
+ mgmt_buffers/mprj_logic_high_inst/HI[156]
+ mgmt_buffers/mprj_logic_high_inst/HI[155]
+ mgmt_buffers/mprj_logic_high_inst/HI[154]
+ mgmt_buffers/mprj_logic_high_inst/HI[153]
+ mgmt_buffers/mprj_logic_high_inst/HI[152]
+ mgmt_buffers/mprj_logic_high_inst/HI[151]
+ mgmt_buffers/mprj_logic_high_inst/HI[150]
+ mgmt_buffers/mprj_logic_high_inst/HI[149]
+ mgmt_buffers/mprj_logic_high_inst/HI[148]
+ mgmt_buffers/mprj_logic_high_inst/HI[147]
+ mgmt_buffers/mprj_logic_high_inst/HI[146]
+ mgmt_buffers/mprj_logic_high_inst/HI[145]
+ mgmt_buffers/mprj_logic_high_inst/HI[144]
+ mgmt_buffers/mprj_logic_high_inst/HI[143]
+ mgmt_buffers/mprj_logic_high_inst/HI[142]
+ mgmt_buffers/mprj_logic_high_inst/HI[141]
+ mgmt_buffers/mprj_logic_high_inst/HI[140]
+ mgmt_buffers/mprj_logic_high_inst/HI[139]
+ mgmt_buffers/mprj_logic_high_inst/HI[138]
+ padframe/mprj_analog_io[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[137]
+ mgmt_buffers/mprj_logic_high_inst/HI[136]
+ mgmt_buffers/mprj_logic_high_inst/HI[135]
+ mgmt_buffers/mprj_logic_high_inst/HI[134]
+ mgmt_buffers/mprj_logic_high_inst/HI[133]
+ mgmt_buffers/mprj_logic_high_inst/HI[132]
+ mgmt_buffers/mprj_logic_high_inst/HI[131]
+ mgmt_buffers/mprj_logic_high_inst/HI[130]
+ mgmt_buffers/mprj_logic_high_inst/HI[129]
+ mgmt_buffers/mprj_logic_high_inst/HI[128]
+ mgmt_buffers/mprj_logic_high_inst/HI[127]
+ mgmt_buffers/mprj_logic_high_inst/HI[126]
+ mgmt_buffers/mprj_logic_high_inst/HI[125]
+ mgmt_buffers/mprj_logic_high_inst/HI[124]
+ mgmt_buffers/mprj_logic_high_inst/HI[123]
+ mgmt_buffers/mprj_logic_high_inst/HI[122]
+ mgmt_buffers/mprj_logic_high_inst/HI[121]
+ mgmt_buffers/mprj_logic_high_inst/HI[120]
+ mgmt_buffers/mprj_logic_high_inst/HI[119]
+ mgmt_buffers/mprj_logic_high_inst/HI[118]
+ mgmt_buffers/mprj_logic_high_inst/HI[117]
+ mgmt_buffers/mprj_logic_high_inst/HI[116]
+ mgmt_buffers/mprj_logic_high_inst/HI[115]
+ mgmt_buffers/mprj_logic_high_inst/HI[114]
+ mgmt_buffers/mprj_logic_high_inst/HI[113]
+ mgmt_buffers/mprj_logic_high_inst/HI[112]
+ mgmt_buffers/mprj_logic_high_inst/HI[111]
+ mgmt_buffers/mprj_logic_high_inst/HI[110]
+ mgmt_buffers/mprj_logic_high_inst/HI[109]
+ mgmt_buffers/mprj_logic_high_inst/HI[108]
+ mgmt_buffers/mprj_logic_high_inst/HI[107]
+ mgmt_buffers/mprj_logic_high_inst/HI[106]
+ mgmt_buffers/mprj_logic_high_inst/HI[105]
+ mgmt_buffers/mprj_logic_high_inst/HI[104]
+ mgmt_buffers/mprj_logic_high_inst/HI[103]
+ mgmt_buffers/mprj_logic_high_inst/HI[102]
+ mgmt_buffers/mprj_logic_high_inst/HI[101]
+ mgmt_buffers/mprj_logic_high_inst/HI[100]
+ mgmt_buffers/mprj_logic_high_inst/HI[99]
+ mgmt_buffers/mprj_logic_high_inst/HI[98]
+ mgmt_buffers/mprj_logic_high_inst/HI[97]
+ mgmt_buffers/mprj_logic_high_inst/HI[96]
+ mgmt_buffers/mprj_logic_high_inst/HI[95]
+ mgmt_buffers/mprj_logic_high_inst/HI[94]
+ mgmt_buffers/mprj_logic_high_inst/HI[93]
+ mgmt_buffers/mprj_logic_high_inst/HI[92]
+ mgmt_buffers/mprj_logic_high_inst/HI[91]
+ padframe/mprj_io[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[90]
+ mgmt_buffers/mprj_logic_high_inst/HI[89]
+ mgmt_buffers/mprj_logic_high_inst/HI[88]
+ mgmt_buffers/mprj_logic_high_inst/HI[87]
+ mgmt_buffers/mprj_logic_high_inst/HI[86]
+ mgmt_buffers/mprj_logic_high_inst/HI[85]
+ mgmt_buffers/mprj_logic_high_inst/HI[84]
+ mgmt_buffers/mprj_logic_high_inst/HI[83]
+ mgmt_buffers/mprj_logic_high_inst/HI[82]
+ mgmt_buffers/mprj_logic_high_inst/HI[81]
+ mgmt_buffers/mprj_logic_high_inst/HI[80]
+ mgmt_buffers/mprj_logic_high_inst/HI[79]
+ mgmt_buffers/mprj_logic_high_inst/HI[78]
+ mgmt_buffers/mprj_logic_high_inst/HI[77]
+ mgmt_buffers/mprj_logic_high_inst/HI[76]
+ mgmt_buffers/mprj_logic_high_inst/HI[75]
+ mgmt_buffers/mprj_logic_high_inst/HI[74]
+ mgmt_buffers/mprj_logic_high_inst/HI[73]
+ mgmt_buffers/mprj_logic_high_inst/HI[72]
+ mgmt_buffers/mprj_logic_high_inst/HI[71]
+ mgmt_buffers/mprj_logic_high_inst/HI[70]
+ mgmt_buffers/mprj_logic_high_inst/HI[69]
+ padframe/mprj_io[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[68]
+ mgmt_buffers/mprj_logic_high_inst/HI[67]
+ mgmt_buffers/mprj_logic_high_inst/HI[66]
+ mgmt_buffers/mprj_logic_high_inst/HI[65]
+ mgmt_buffers/mprj_logic_high_inst/HI[64]
+ mgmt_buffers/mprj_logic_high_inst/HI[63]
+ mgmt_buffers/mprj_logic_high_inst/HI[62]
+ mgmt_buffers/mprj_logic_high_inst/HI[61]
+ mgmt_buffers/mprj_logic_high_inst/HI[60]
+ mgmt_buffers/mprj_logic_high_inst/HI[59]
+ mgmt_buffers/mprj_logic_high_inst/HI[58]
+ mgmt_buffers/mprj_logic_high_inst/HI[57]
+ mgmt_buffers/mprj_logic_high_inst/HI[56]
+ mgmt_buffers/mprj_logic_high_inst/HI[55]
+ mgmt_buffers/mprj_logic_high_inst/HI[54]
+ mgmt_buffers/mprj_logic_high_inst/HI[53]
+ mgmt_buffers/mprj_logic_high_inst/HI[52]
+ mgmt_buffers/mprj_logic_high_inst/HI[51]
+ mgmt_buffers/mprj_logic_high_inst/HI[50]
+ mgmt_buffers/mprj_logic_high_inst/HI[49]
+ mgmt_buffers/mprj_logic_high_inst/HI[48]
+ mgmt_buffers/mprj_logic_high_inst/HI[47]
+ mgmt_buffers/mprj_logic_high_inst/HI[46]
+ mgmt_buffers/mprj_logic_high_inst/HI[45]
+ mgmt_buffers/mprj_logic_high_inst/HI[44]
+ mgmt_buffers/mprj_logic_high_inst/HI[43]
+ mgmt_buffers/mprj_logic_high_inst/HI[42]
+ mgmt_buffers/mprj_logic_high_inst/HI[41]
+ mgmt_buffers/mprj_logic_high_inst/HI[40]
+ mgmt_buffers/mprj_logic_high_inst/HI[39]
+ mgmt_buffers/mprj_logic_high_inst/HI[38]
+ mgmt_buffers/mprj_logic_high_inst/HI[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[36]
+ mgmt_buffers/mprj_logic_high_inst/HI[35]
+ mgmt_buffers/mprj_logic_high_inst/HI[34]
+ mgmt_buffers/mprj_logic_high_inst/HI[33]
+ mgmt_buffers/mprj_logic_high_inst/HI[32]
+ mgmt_buffers/mprj_logic_high_inst/HI[31]
+ mgmt_buffers/mprj_logic_high_inst/HI[30]
+ mgmt_buffers/mprj_logic_high_inst/HI[29]
+ mgmt_buffers/mprj_logic_high_inst/HI[28]
+ mgmt_buffers/mprj_logic_high_inst/HI[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[25]
+ mgmt_buffers/mprj_logic_high_inst/HI[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[22]
+ mgmt_buffers/mprj_logic_high_inst/HI[21]
+ mgmt_buffers/mprj_logic_high_inst/HI[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[19]
+ mgmt_buffers/mprj_logic_high_inst/HI[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[17]
+ mgmt_buffers/mprj_logic_high_inst/HI[16]
+ padframe/mprj_analog_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[15]
+ mgmt_buffers/mprj_logic_high_inst/HI[14]
+ mgmt_buffers/mprj_logic_high_inst/HI[13]
+ mgmt_buffers/mprj_logic_high_inst/HI[12]
+ mgmt_buffers/mprj_logic_high_inst/HI[11]
+ mgmt_buffers/mprj_logic_high_inst/HI[10]
+ mgmt_buffers/mprj_logic_high_inst/HI[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[8]
+ mgmt_buffers/mprj_logic_high_inst/HI[7]
+ mgmt_buffers/mprj_logic_high_inst/HI[6]
+ mgmt_buffers/mprj_logic_high_inst/HI[5]
+ mgmt_buffers/mprj_logic_high_inst/HI[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[2]
+ mgmt_buffers/mprj_logic_high_inst/HI[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[0]
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1
+ mgmt_buffers/powergood_check/mprj_vdd_logic1
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1_h
+ mgmt_buffers/powergood_check/mprj_vdd_logic1_h
+ padframe/mprj_io[35]
+ mprj/mprj/p[3]
+ mprj/mprj/p[2]
+ mprj/mprj/p[1]
+ mprj/mprj/p[0]
+ padframe/mprj_io[30]
+ padframe/mprj_io[14]
+ padframe/mprj_io[13]
+ padframe/mprj_io[12]
+ padframe/mprj_io[19]
+ padframe/mprj_analog_io[0]
+ padframe/mprj_io[36]
+ padframe/mprj_io[32]
+ padframe/mprj_io[29]
+ padframe/mprj_io[31]
+ padframe/mprj_io[15]
+ padframe/mprj_io[16]
+ padframe/mprj_io[1]
+ padframe/mprj_io[2]
+ padframe/mprj_io[3]
+ padframe/mprj_io[4]
+ padframe/mprj_io[5]
+ padframe/mprj_io[6]
+ padframe/mprj_io[7]
+ padframe/mprj_pads.loop0_io\[36\]
+ padframe/resetb
+ padframe/resetb_core_h
+ padframe/vccd1_pad
+ padframe/vccd2_pad
+ padframe/vccd_pad
+ padframe/vdda1_pad
+ padframe/vdda1_pad2
+ padframe/vdda2_pad
+ padframe/vdda_pad
+ padframe/vddio_pad
+ padframe/vddio_pad2
+ padframe/vssa1_pad
+ padframe/vssa1_pad2
+ padframe/vssa2_pad
+ padframe/vssa_pad
+ padframe/vssd1_pad
+ padframe/vssd2_pad
+ padframe/vssd_pad
+ padframe/vssio_pad
+ padframe/vssio_pad2
+ padframe/mprj_pads.analog_a
+ padframe/mprj_pads.analog_b
+ padframe/loop_zero_clock
+ padframe/loop_one_clock
+ padframe/constant_value_inst\[0\]/one
+ padframe/constant_value_inst\[0\]/zero
+ padframe/constant_value_inst\[0\]/one_unbuf
+ padframe/constant_value_inst\[0\]/zero_unbuf
+ padframe/constant_value_inst\[1\]/one
+ padframe/constant_value_inst\[1\]/zero
+ padframe/constant_value_inst\[1\]/one_unbuf
+ padframe/constant_value_inst\[1\]/zero_unbuf
+ padframe/constant_value_inst\[2\]/one
+ padframe/constant_value_inst\[2\]/zero
+ padframe/constant_value_inst\[2\]/one_unbuf
+ padframe/constant_value_inst\[2\]/zero_unbuf
+ padframe/constant_value_inst\[3\]/one
+ padframe/constant_value_inst\[3\]/zero
+ padframe/constant_value_inst\[3\]/one_unbuf
+ padframe/constant_value_inst\[3\]/zero_unbuf
+ padframe/constant_value_inst\[4\]/one
+ padframe/constant_value_inst\[4\]/zero
+ padframe/constant_value_inst\[4\]/one_unbuf
+ padframe/constant_value_inst\[4\]/zero_unbuf
+ padframe/constant_value_inst\[5\]/one
+ padframe/constant_value_inst\[5\]/zero
+ padframe/constant_value_inst\[5\]/one_unbuf
+ padframe/constant_value_inst\[5\]/zero_unbuf
+ padframe/constant_value_inst\[6\]/one
+ padframe/constant_value_inst\[6\]/zero
+ padframe/constant_value_inst\[6\]/one_unbuf
+ padframe/constant_value_inst\[6\]/zero_unbuf
+ padframe/loop_zero_flash_clk
+ padframe/loop_one_flash_clk
+ padframe/loop_zero_flash_csb
+ padframe/loop_one_flash_csb
+ padframe/loop_zero_flash_io0
+ padframe/loop_one_flash_io0
+ padframe/loop_zero_flash_io1
+ padframe/loop_one_flash_io1
+ padframe/loop_zero_gpio
+ padframe/loop_one_gpio
+ padframe/mprj_pads.loop0_io\[0\]
+ padframe/mprj_pads.loop1_io\[0\]
+ padframe/mprj_pads.io_in\[0\]
+ padframe/mprj_pads.io_in_3v3\[0\]
+ padframe/mprj_pads.no_connect_1b\[0\]
+ padframe/mprj_pads.no_connect_1a\[0\]
+ padframe/mprj_pads.loop0_io\[10\]
+ padframe/mprj_pads.loop1_io\[10\]
+ padframe/mprj_pads.io_in\[10\]
+ padframe/mprj_pads.io_in_3v3\[10\]
+ padframe/mprj_pads.analog_noesd_io\[3\]
+ padframe/mprj_pads.loop0_io\[11\]
+ padframe/mprj_pads.loop1_io\[11\]
+ padframe/mprj_pads.io_in\[11\]
+ padframe/mprj_pads.io_in_3v3\[11\]
+ padframe/mprj_pads.analog_noesd_io\[4\]
+ padframe/mprj_pads.loop0_io\[12\]
+ padframe/mprj_pads.loop1_io\[12\]
+ padframe/mprj_pads.io_in\[12\]
+ padframe/mprj_pads.io_in_3v3\[12\]
+ padframe/mprj_pads.analog_noesd_io\[5\]
+ padframe/mprj_pads.loop0_io\[13\]
+ padframe/mprj_pads.loop1_io\[13\]
+ padframe/mprj_pads.io_in\[13\]
+ padframe/mprj_pads.io_in_3v3\[13\]
+ padframe/mprj_pads.analog_noesd_io\[6\]
+ padframe/mprj_pads.loop0_io\[14\]
+ padframe/mprj_pads.loop1_io\[14\]
+ padframe/mprj_pads.io_in\[14\]
+ padframe/mprj_pads.io_in_3v3\[14\]
+ padframe/mprj_pads.analog_noesd_io\[7\]
+ padframe/mprj_pads.loop0_io\[15\]
+ padframe/mprj_pads.loop1_io\[15\]
+ padframe/mprj_pads.io_in\[15\]
+ padframe/mprj_pads.io_in_3v3\[15\]
+ padframe/mprj_pads.analog_noesd_io\[8\]
+ padframe/mprj_pads.loop0_io\[16\]
+ padframe/mprj_pads.loop1_io\[16\]
+ padframe/mprj_pads.io_in\[16\]
+ padframe/mprj_pads.io_in_3v3\[16\]
+ padframe/mprj_pads.analog_noesd_io\[9\]
+ padframe/mprj_pads.loop0_io\[17\]
+ padframe/mprj_pads.loop1_io\[17\]
+ padframe/mprj_pads.io_in\[17\]
+ padframe/mprj_pads.io_in_3v3\[17\]
+ padframe/mprj_pads.analog_noesd_io\[10\]
+ padframe/mprj_pads.loop0_io\[18\]
+ padframe/mprj_pads.loop1_io\[18\]
+ padframe/mprj_pads.io_in\[18\]
+ padframe/mprj_pads.io_in_3v3\[18\]
+ padframe/mprj_pads.analog_noesd_io\[11\]
+ padframe/mprj_pads.loop0_io\[1\]
+ padframe/mprj_pads.loop1_io\[1\]
+ padframe/mprj_pads.io_in\[1\]
+ padframe/mprj_pads.io_in_3v3\[1\]
+ padframe/mprj_pads.no_connect_1b\[1\]
+ padframe/mprj_pads.no_connect_1a\[1\]
+ padframe/mprj_pads.loop0_io\[2\]
+ padframe/mprj_pads.loop1_io\[2\]
+ padframe/mprj_pads.io_in\[2\]
+ padframe/mprj_pads.io_in_3v3\[2\]
+ padframe/mprj_pads.no_connect_1b\[2\]
+ padframe/mprj_pads.no_connect_1a\[2\]
+ padframe/mprj_pads.loop0_io\[3\]
+ padframe/mprj_pads.loop1_io\[3\]
+ padframe/mprj_pads.io_in\[3\]
+ padframe/mprj_pads.io_in_3v3\[3\]
+ padframe/mprj_pads.no_connect_1b\[3\]
+ padframe/mprj_pads.no_connect_1a\[3\]
+ padframe/mprj_pads.loop0_io\[4\]
+ padframe/mprj_pads.loop1_io\[4\]
+ padframe/mprj_pads.io_in\[4\]
+ padframe/mprj_pads.io_in_3v3\[4\]
+ padframe/mprj_pads.no_connect_1b\[4\]
+ padframe/mprj_pads.no_connect_1a\[4\]
+ padframe/mprj_pads.loop0_io\[5\]
+ padframe/mprj_pads.loop1_io\[5\]
+ padframe/mprj_pads.io_in\[5\]
+ padframe/mprj_pads.io_in_3v3\[5\]
+ padframe/mprj_pads.no_connect_1b\[5\]
+ padframe/mprj_pads.no_connect_1a\[5\]
+ padframe/mprj_pads.loop0_io\[6\]
+ padframe/mprj_pads.loop1_io\[6\]
+ padframe/mprj_pads.io_in\[6\]
+ padframe/mprj_pads.io_in_3v3\[6\]
+ padframe/mprj_pads.no_connect_1b\[6\]
+ padframe/mprj_pads.no_connect_1a\[6\]
+ padframe/mprj_pads.loop0_io\[7\]
+ padframe/mprj_pads.loop1_io\[7\]
+ padframe/mprj_pads.io_in\[7\]
+ padframe/mprj_pads.io_in_3v3\[7\]
+ padframe/mprj_pads.analog_noesd_io\[0\]
+ padframe/mprj_pads.loop0_io\[8\]
+ padframe/mprj_pads.loop1_io\[8\]
+ padframe/mprj_pads.io_in\[8\]
+ padframe/mprj_pads.io_in_3v3\[8\]
+ padframe/mprj_pads.analog_noesd_io\[1\]
+ padframe/mprj_pads.loop0_io\[9\]
+ padframe/mprj_pads.loop1_io\[9\]
+ padframe/mprj_pads.io_in\[9\]
+ padframe/mprj_pads.io_in_3v3\[9\]
+ padframe/mprj_pads.analog_noesd_io\[2\]
+ padframe/mprj_pads.loop0_io\[19\]
+ padframe/mprj_pads.loop1_io\[19\]
+ padframe/mprj_pads.io_in\[19\]
+ padframe/mprj_pads.io_in_3v3\[19\]
+ padframe/mprj_pads.analog_noesd_io\[12\]
+ padframe/mprj_pads.loop0_io\[29\]
+ padframe/mprj_pads.loop1_io\[29\]
+ padframe/mprj_pads.io_in\[29\]
+ padframe/mprj_pads.io_in_3v3\[29\]
+ padframe/mprj_pads.analog_noesd_io\[22\]
+ padframe/mprj_pads.loop0_io\[30\]
+ padframe/mprj_pads.loop1_io\[30\]
+ padframe/mprj_pads.io_in\[30\]
+ padframe/mprj_pads.io_in_3v3\[30\]
+ padframe/mprj_pads.analog_noesd_io\[23\]
+ padframe/mprj_pads.loop0_io\[31\]
+ padframe/mprj_pads.loop1_io\[31\]
+ padframe/mprj_pads.io_in\[31\]
+ padframe/mprj_pads.io_in_3v3\[31\]
+ padframe/mprj_pads.analog_noesd_io\[24\]
+ padframe/mprj_pads.loop0_io\[32\]
+ padframe/mprj_pads.loop1_io\[32\]
+ padframe/mprj_pads.io_in\[32\]
+ padframe/mprj_pads.io_in_3v3\[32\]
+ padframe/mprj_pads.analog_noesd_io\[25\]
+ padframe/mprj_pads.loop0_io\[33\]
+ padframe/mprj_pads.loop1_io\[33\]
+ padframe/mprj_pads.io_in\[33\]
+ padframe/mprj_pads.io_in_3v3\[33\]
+ padframe/mprj_pads.analog_noesd_io\[26\]
+ padframe/mprj_pads.loop0_io\[34\]
+ padframe/mprj_pads.loop1_io\[34\]
+ padframe/mprj_pads.io_in\[34\]
+ padframe/mprj_pads.io_in_3v3\[34\]
+ padframe/mprj_pads.analog_noesd_io\[27\]
+ padframe/mprj_pads.loop0_io\[35\]
+ padframe/mprj_pads.loop1_io\[35\]
+ padframe/mprj_pads.io_in\[35\]
+ padframe/mprj_pads.io_in_3v3\[35\]
+ padframe/mprj_pads.analog_noesd_io\[28\]
+ padframe/mprj_pads.loop1_io\[36\]
+ padframe/mprj_pads.io_in\[36\]
+ padframe/mprj_pads.io_in_3v3\[36\]
+ padframe/mprj_pads.no_connect_2b\[0\]
+ padframe/mprj_pads.no_connect_2a\[0\]
+ padframe/mprj_pads.loop0_io\[37\]
+ padframe/mprj_pads.loop1_io\[37\]
+ padframe/mprj_pads.io_in\[37\]
+ padframe/mprj_pads.io_in_3v3\[37\]
+ padframe/mprj_pads.no_connect_2b\[1\]
+ padframe/mprj_pads.no_connect_2a\[1\]
+ padframe/mprj_pads.loop0_io\[20\]
+ padframe/mprj_pads.loop1_io\[20\]
+ padframe/mprj_pads.io_in\[20\]
+ padframe/mprj_pads.io_in_3v3\[20\]
+ padframe/mprj_pads.analog_noesd_io\[13\]
+ padframe/mprj_pads.loop0_io\[21\]
+ padframe/mprj_pads.loop1_io\[21\]
+ padframe/mprj_pads.io_in\[21\]
+ padframe/mprj_pads.io_in_3v3\[21\]
+ padframe/mprj_pads.analog_noesd_io\[14\]
+ padframe/mprj_pads.loop0_io\[22\]
+ padframe/mprj_pads.loop1_io\[22\]
+ padframe/mprj_pads.io_in\[22\]
+ padframe/mprj_pads.io_in_3v3\[22\]
+ padframe/mprj_pads.analog_noesd_io\[15\]
+ padframe/mprj_pads.loop0_io\[23\]
+ padframe/mprj_pads.loop1_io\[23\]
+ padframe/mprj_pads.io_in\[23\]
+ padframe/mprj_pads.io_in_3v3\[23\]
+ padframe/mprj_pads.analog_noesd_io\[16\]
+ padframe/mprj_pads.loop0_io\[24\]
+ padframe/mprj_pads.loop1_io\[24\]
+ padframe/mprj_pads.io_in\[24\]
+ padframe/mprj_pads.io_in_3v3\[24\]
+ padframe/mprj_pads.analog_noesd_io\[17\]
+ padframe/mprj_pads.loop0_io\[25\]
+ padframe/mprj_pads.loop1_io\[25\]
+ padframe/mprj_pads.io_in\[25\]
+ padframe/mprj_pads.io_in_3v3\[25\]
+ padframe/mprj_pads.analog_noesd_io\[18\]
+ padframe/mprj_pads.loop0_io\[26\]
+ padframe/mprj_pads.loop1_io\[26\]
+ padframe/mprj_pads.io_in\[26\]
+ padframe/mprj_pads.io_in_3v3\[26\]
+ padframe/mprj_pads.analog_noesd_io\[19\]
+ padframe/mprj_pads.loop0_io\[27\]
+ padframe/mprj_pads.loop1_io\[27\]
+ padframe/mprj_pads.io_in\[27\]
+ padframe/mprj_pads.io_in_3v3\[27\]
+ padframe/mprj_pads.analog_noesd_io\[20\]
+ padframe/mprj_pads.loop0_io\[28\]
+ padframe/mprj_pads.loop1_io\[28\]
+ padframe/mprj_pads.io_in\[28\]
+ padframe/mprj_pads.io_in_3v3\[28\]
+ padframe/mprj_pads.analog_noesd_io\[21\]
+ padframe/xres_vss_loop
+ padframe/xresloop
+ rstb_level/X
+ sigbuf/buf_out\[0\]
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+ sigbuf/buf_in\[106\]
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+ sigbuf/buf_out\[99\]
+ sigbuf/buf_out\[9\]
+ user_id_value/mask_rev[15]
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+ user_id_value/mask_rev[10]
+ user_id_value/mask_rev[9]
+ user_id_value/mask_rev[8]
+ user_id_value/mask_rev[7]
+ user_id_value/mask_rev[6]
+ user_id_value/mask_rev[5]
+ user_id_value/mask_rev[4]
+ user_id_value/mask_rev[3]
+ user_id_value/mask_rev[2]
+ user_id_value/mask_rev[1]
+ user_id_value/mask_rev[0]
+ user_id_value/user_proj_id_high\[0\]
+ user_id_value/user_proj_id_high\[10\]
+ user_id_value/user_proj_id_high\[11\]
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+ user_id_value/user_proj_id_high\[13\]
+ user_id_value/user_proj_id_high\[14\]
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+ user_id_value/user_proj_id_high\[16\]
+ user_id_value/user_proj_id_high\[17\]
+ user_id_value/user_proj_id_high\[18\]
+ user_id_value/user_proj_id_high\[19\]
+ user_id_value/user_proj_id_high\[1\]
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+ user_id_value/user_proj_id_high\[22\]
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+ user_id_value/user_proj_id_high\[9\]
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+ spare_logic\[0\]/spare_xna[1]
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+ spare_logic\[0\]/spare_xz[26]
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+ spare_logic\[1\]/spare_xi[2]
+ spare_logic\[1\]/spare_xi[1]
+ spare_logic\[1\]/spare_xi[0]
+ spare_logic\[1\]/spare_xib
+ spare_logic\[1\]/spare_xmx[1]
+ spare_logic\[1\]/spare_xmx[0]
+ spare_logic\[1\]/spare_xna[1]
+ spare_logic\[1\]/spare_xna[0]
+ spare_logic\[1\]/spare_xno[1]
+ spare_logic\[1\]/spare_xno[0]
+ spare_logic\[1\]/spare_xz[26]
+ spare_logic\[1\]/spare_xz[25]
+ spare_logic\[1\]/spare_xz[24]
+ spare_logic\[1\]/spare_xz[23]
+ spare_logic\[1\]/spare_xz[22]
+ spare_logic\[1\]/spare_xz[21]
+ spare_logic\[1\]/spare_xz[20]
+ spare_logic\[1\]/spare_xz[19]
+ spare_logic\[1\]/spare_xz[18]
+ spare_logic\[1\]/spare_xz[17]
+ spare_logic\[1\]/spare_xz[16]
+ spare_logic\[1\]/spare_xz[15]
+ spare_logic\[1\]/spare_xz[14]
+ spare_logic\[1\]/spare_xz[13]
+ spare_logic\[1\]/spare_xz[12]
+ spare_logic\[1\]/spare_xz[11]
+ spare_logic\[1\]/spare_xz[10]
+ spare_logic\[1\]/spare_xz[9]
+ spare_logic\[1\]/spare_xz[8]
+ spare_logic\[1\]/spare_xz[7]
+ spare_logic\[1\]/spare_xz[6]
+ spare_logic\[1\]/spare_xz[5]
+ spare_logic\[1\]/spare_xz[4]
+ spare_logic\[1\]/spare_xz[3]
+ spare_logic\[1\]/spare_xz[2]
+ spare_logic\[1\]/spare_xz[1]
+ spare_logic\[1\]/spare_xz[0]
+ spare_logic\[1\]/spare_logic1\[0\]
+ spare_logic\[1\]/spare_logic1\[10\]
+ spare_logic\[1\]/spare_logic1\[11\]
+ spare_logic\[1\]/spare_logic1\[12\]
+ spare_logic\[1\]/spare_logic1\[13\]
+ spare_logic\[1\]/spare_logic1\[14\]
+ spare_logic\[1\]/spare_logic1\[15\]
+ spare_logic\[1\]/spare_logic1\[16\]
+ spare_logic\[1\]/spare_logic1\[17\]
+ spare_logic\[1\]/spare_logic1\[18\]
+ spare_logic\[1\]/spare_logic1\[19\]
+ spare_logic\[1\]/spare_logic1\[1\]
+ spare_logic\[1\]/spare_logic1\[20\]
+ spare_logic\[1\]/spare_logic1\[21\]
+ spare_logic\[1\]/spare_logic1\[22\]
+ spare_logic\[1\]/spare_logic1\[23\]
+ spare_logic\[1\]/spare_logic1\[24\]
+ spare_logic\[1\]/spare_logic1\[25\]
+ spare_logic\[1\]/spare_logic1\[26\]
+ spare_logic\[1\]/spare_logic1\[2\]
+ spare_logic\[1\]/spare_logic1\[3\]
+ spare_logic\[1\]/spare_logic1\[4\]
+ spare_logic\[1\]/spare_logic1\[5\]
+ spare_logic\[1\]/spare_logic1\[6\]
+ spare_logic\[1\]/spare_logic1\[7\]
+ spare_logic\[1\]/spare_logic1\[8\]
+ spare_logic\[1\]/spare_logic1\[9\]
+ spare_logic\[2\]/spare_xfq[1]
+ spare_logic\[2\]/spare_xfq[0]
+ spare_logic\[2\]/spare_xfqn[1]
+ spare_logic\[2\]/spare_xfqn[0]
+ spare_logic\[2\]/spare_xi[3]
+ spare_logic\[2\]/spare_xi[2]
+ spare_logic\[2\]/spare_xi[1]
+ spare_logic\[2\]/spare_xi[0]
+ spare_logic\[2\]/spare_xib
+ spare_logic\[2\]/spare_xmx[1]
+ spare_logic\[2\]/spare_xmx[0]
+ spare_logic\[2\]/spare_xna[1]
+ spare_logic\[2\]/spare_xna[0]
+ spare_logic\[2\]/spare_xno[1]
+ spare_logic\[2\]/spare_xno[0]
+ spare_logic\[2\]/spare_xz[26]
+ spare_logic\[2\]/spare_xz[25]
+ spare_logic\[2\]/spare_xz[24]
+ spare_logic\[2\]/spare_xz[23]
+ spare_logic\[2\]/spare_xz[22]
+ spare_logic\[2\]/spare_xz[21]
+ spare_logic\[2\]/spare_xz[20]
+ spare_logic\[2\]/spare_xz[19]
+ spare_logic\[2\]/spare_xz[18]
+ spare_logic\[2\]/spare_xz[17]
+ spare_logic\[2\]/spare_xz[16]
+ spare_logic\[2\]/spare_xz[15]
+ spare_logic\[2\]/spare_xz[14]
+ spare_logic\[2\]/spare_xz[13]
+ spare_logic\[2\]/spare_xz[12]
+ spare_logic\[2\]/spare_xz[11]
+ spare_logic\[2\]/spare_xz[10]
+ spare_logic\[2\]/spare_xz[9]
+ spare_logic\[2\]/spare_xz[8]
+ spare_logic\[2\]/spare_xz[7]
+ spare_logic\[2\]/spare_xz[6]
+ spare_logic\[2\]/spare_xz[5]
+ spare_logic\[2\]/spare_xz[4]
+ spare_logic\[2\]/spare_xz[3]
+ spare_logic\[2\]/spare_xz[2]
+ spare_logic\[2\]/spare_xz[1]
+ spare_logic\[2\]/spare_xz[0]
+ spare_logic\[2\]/spare_logic1\[0\]
+ spare_logic\[2\]/spare_logic1\[10\]
+ spare_logic\[2\]/spare_logic1\[11\]
+ spare_logic\[2\]/spare_logic1\[12\]
+ spare_logic\[2\]/spare_logic1\[13\]
+ spare_logic\[2\]/spare_logic1\[14\]
+ spare_logic\[2\]/spare_logic1\[15\]
+ spare_logic\[2\]/spare_logic1\[16\]
+ spare_logic\[2\]/spare_logic1\[17\]
+ spare_logic\[2\]/spare_logic1\[18\]
+ spare_logic\[2\]/spare_logic1\[19\]
+ spare_logic\[2\]/spare_logic1\[1\]
+ spare_logic\[2\]/spare_logic1\[20\]
+ spare_logic\[2\]/spare_logic1\[21\]
+ spare_logic\[2\]/spare_logic1\[22\]
+ spare_logic\[2\]/spare_logic1\[23\]
+ spare_logic\[2\]/spare_logic1\[24\]
+ spare_logic\[2\]/spare_logic1\[25\]
+ spare_logic\[2\]/spare_logic1\[26\]
+ spare_logic\[2\]/spare_logic1\[2\]
+ spare_logic\[2\]/spare_logic1\[3\]
+ spare_logic\[2\]/spare_logic1\[4\]
+ spare_logic\[2\]/spare_logic1\[5\]
+ spare_logic\[2\]/spare_logic1\[6\]
+ spare_logic\[2\]/spare_logic1\[7\]
+ spare_logic\[2\]/spare_logic1\[8\]
+ spare_logic\[2\]/spare_logic1\[9\]
+ spare_logic\[3\]/spare_xfq[1]
+ spare_logic\[3\]/spare_xfq[0]
+ spare_logic\[3\]/spare_xfqn[1]
+ spare_logic\[3\]/spare_xfqn[0]
+ spare_logic\[3\]/spare_xi[3]
+ spare_logic\[3\]/spare_xi[2]
+ spare_logic\[3\]/spare_xi[1]
+ spare_logic\[3\]/spare_xi[0]
+ spare_logic\[3\]/spare_xib
+ spare_logic\[3\]/spare_xmx[1]
+ spare_logic\[3\]/spare_xmx[0]
+ spare_logic\[3\]/spare_xna[1]
+ spare_logic\[3\]/spare_xna[0]
+ spare_logic\[3\]/spare_xno[1]
+ spare_logic\[3\]/spare_xno[0]
+ spare_logic\[3\]/spare_xz[26]
+ spare_logic\[3\]/spare_xz[25]
+ spare_logic\[3\]/spare_xz[24]
+ spare_logic\[3\]/spare_xz[23]
+ spare_logic\[3\]/spare_xz[22]
+ spare_logic\[3\]/spare_xz[21]
+ spare_logic\[3\]/spare_xz[20]
+ spare_logic\[3\]/spare_xz[19]
+ spare_logic\[3\]/spare_xz[18]
+ spare_logic\[3\]/spare_xz[17]
+ spare_logic\[3\]/spare_xz[16]
+ spare_logic\[3\]/spare_xz[15]
+ spare_logic\[3\]/spare_xz[14]
+ spare_logic\[3\]/spare_xz[13]
+ spare_logic\[3\]/spare_xz[12]
+ spare_logic\[3\]/spare_xz[11]
+ spare_logic\[3\]/spare_xz[10]
+ spare_logic\[3\]/spare_xz[9]
+ spare_logic\[3\]/spare_xz[8]
+ spare_logic\[3\]/spare_xz[7]
+ spare_logic\[3\]/spare_xz[6]
+ spare_logic\[3\]/spare_xz[5]
+ spare_logic\[3\]/spare_xz[4]
+ spare_logic\[3\]/spare_xz[3]
+ spare_logic\[3\]/spare_xz[2]
+ spare_logic\[3\]/spare_xz[1]
+ spare_logic\[3\]/spare_xz[0]
+ spare_logic\[3\]/spare_logic1\[0\]
+ spare_logic\[3\]/spare_logic1\[10\]
+ spare_logic\[3\]/spare_logic1\[11\]
+ spare_logic\[3\]/spare_logic1\[12\]
+ spare_logic\[3\]/spare_logic1\[13\]
+ spare_logic\[3\]/spare_logic1\[14\]
+ spare_logic\[3\]/spare_logic1\[15\]
+ spare_logic\[3\]/spare_logic1\[16\]
+ spare_logic\[3\]/spare_logic1\[17\]
+ spare_logic\[3\]/spare_logic1\[18\]
+ spare_logic\[3\]/spare_logic1\[19\]
+ spare_logic\[3\]/spare_logic1\[1\]
+ spare_logic\[3\]/spare_logic1\[20\]
+ spare_logic\[3\]/spare_logic1\[21\]
+ spare_logic\[3\]/spare_logic1\[22\]
+ spare_logic\[3\]/spare_logic1\[23\]
+ spare_logic\[3\]/spare_logic1\[24\]
+ spare_logic\[3\]/spare_logic1\[25\]
+ spare_logic\[3\]/spare_logic1\[26\]
+ spare_logic\[3\]/spare_logic1\[2\]
+ spare_logic\[3\]/spare_logic1\[3\]
+ spare_logic\[3\]/spare_logic1\[4\]
+ spare_logic\[3\]/spare_logic1\[5\]
+ spare_logic\[3\]/spare_logic1\[6\]
+ spare_logic\[3\]/spare_logic1\[7\]
+ spare_logic\[3\]/spare_logic1\[8\]
+ spare_logic\[3\]/spare_logic1\[9\]
+ user_id_value/mask_rev[31]
+ user_id_value/mask_rev[30]
+ user_id_value/mask_rev[29]
+ user_id_value/mask_rev[28]
+ user_id_value/mask_rev[27]
+ user_id_value/mask_rev[26]
+ user_id_value/mask_rev[25]
+ user_id_value/mask_rev[24]
+ user_id_value/mask_rev[23]
+ user_id_value/mask_rev[22]
+ user_id_value/mask_rev[21]
+ user_id_value/mask_rev[20]
+ user_id_value/mask_rev[19]
+ user_id_value/mask_rev[18]
+ user_id_value/mask_rev[17]
+ user_id_value/mask_rev[16]
+Found 629 partially unannotated nets.
+ flash_clkrst_buffers/out_s[7]
+  padframe/flash_clk_pad/OE_N
+ flash_clkrst_buffers/out_s[8]
+  padframe/flash_csb_pad/OUT
+ flash_clkrst_buffers/out_s[9]
+  padframe/flash_clk_pad/OUT
+ flash_clkrst_buffers/out_s[0]
+  padframe/flash_io1_pad/OUT
+ flash_clkrst_buffers/out_s[1]
+  padframe/flash_io0_pad/OUT
+ flash_clkrst_buffers/out_s[2]
+  padframe/flash_io1_pad/DM[2]
+  padframe/flash_io1_pad/DM[1]
+  padframe/flash_io1_pad/INP_DIS
+ flash_clkrst_buffers/out_s[3]
+  padframe/flash_io0_pad/DM[2]
+  padframe/flash_io0_pad/DM[1]
+  padframe/flash_io0_pad/INP_DIS
+ flash_clkrst_buffers/out_s[4]
+  padframe/flash_io1_pad/DM[0]
+  padframe/flash_io1_pad/OE_N
+ flash_clkrst_buffers/out_s[5]
+  padframe/flash_io0_pad/DM[0]
+  padframe/flash_io0_pad/OE_N
+ flash_clkrst_buffers/out_s[6]
+  padframe/flash_csb_pad/OE_N
+ gpio_control_bidir_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[0]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[1]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[2]
+ gpio_control_bidir_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[0\]/HLD_OVR
+ gpio_control_bidir_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[0\]/INP_DIS
+ gpio_control_bidir_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[0\]/OUT
+ gpio_control_bidir_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[0\]/OE_N
+ gpio_control_bidir_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/SLOW
+ gpio_control_bidir_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/VTRIP_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_EN
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_POL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_SEL
+ gpio_control_bidir_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[0]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[1]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[2]
+ gpio_control_bidir_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[1\]/HLD_OVR
+ gpio_control_bidir_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[1\]/INP_DIS
+ gpio_control_bidir_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[1\]/OUT
+ gpio_control_bidir_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[1\]/OE_N
+ gpio_control_bidir_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/SLOW
+ gpio_control_bidir_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/VTRIP_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_EN
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_POL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_SEL
+ gpio_control_bidir_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[0]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[1]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[2]
+ gpio_control_bidir_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[16\]/HLD_OVR
+ gpio_control_bidir_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_bidir_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[16\]/INP_DIS
+ gpio_control_bidir_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[16\]/OUT
+ gpio_control_bidir_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[16\]/OE_N
+ gpio_control_bidir_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/SLOW
+ gpio_control_bidir_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/VTRIP_SEL
+ gpio_control_bidir_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[89\]/A
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_EN
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_POL
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_SEL
+ gpio_control_bidir_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[0]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[1]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[2]
+ gpio_control_bidir_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[17\]/HLD_OVR
+ gpio_control_bidir_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_bidir_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[17\]/INP_DIS
+ gpio_control_bidir_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[17\]/OUT
+ gpio_control_bidir_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[17\]/OE_N
+ gpio_control_bidir_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/SLOW
+ gpio_control_bidir_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/VTRIP_SEL
+ gpio_control_bidir_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[91\]/A
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_EN
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_POL
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_SEL
+ gpio_control_bidir_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[0]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[1]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[2]
+ gpio_control_bidir_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[18\]/HLD_OVR
+ gpio_control_bidir_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_bidir_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[18\]/INP_DIS
+ gpio_control_bidir_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[18\]/OUT
+ gpio_control_bidir_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[18\]/OE_N
+ gpio_control_bidir_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/SLOW
+ gpio_control_bidir_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/VTRIP_SEL
+ gpio_control_bidir_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[93\]/A
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_EN
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_POL
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[0]
+ gpio_control_in_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[1]
+ gpio_control_in_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[2]
+ gpio_control_in_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[8\]/HLD_OVR
+ gpio_control_in_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[8\]/INP_DIS
+ gpio_control_in_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[8\]/OUT
+ gpio_control_in_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[8\]/OE_N
+ gpio_control_in_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/SLOW
+ gpio_control_in_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_1\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[1\]/A
+ gpio_control_in_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_1\[10\]/one
+  padframe/mprj_pads.area1_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_in_1\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[0]
+ gpio_control_in_1\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[1]
+ gpio_control_in_1\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[2]
+ gpio_control_in_1\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[18\]/HLD_OVR
+ gpio_control_in_1\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_in_1\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[18\]/INP_DIS
+ gpio_control_in_1\[10\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[18\]/OUT
+ gpio_control_in_1\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[18\]/OE_N
+ gpio_control_in_1\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/SLOW
+ gpio_control_in_1\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/VTRIP_SEL
+ gpio_control_in_1\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[19\]/A
+ gpio_control_in_1\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_EN
+ gpio_control_in_1\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_POL
+ gpio_control_in_1\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[0]
+ gpio_control_in_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[1]
+ gpio_control_in_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[2]
+ gpio_control_in_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[9\]/HLD_OVR
+ gpio_control_in_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[9\]/INP_DIS
+ gpio_control_in_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[9\]/OUT
+ gpio_control_in_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[9\]/OE_N
+ gpio_control_in_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/SLOW
+ gpio_control_in_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_1\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[2\]/A
+ gpio_control_in_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_SEL
+ gpio_control_in_1\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_1\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[0]
+ gpio_control_in_1\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[1]
+ gpio_control_in_1\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[2]
+ gpio_control_in_1\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[10\]/HLD_OVR
+ gpio_control_in_1\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_1\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[10\]/INP_DIS
+ gpio_control_in_1\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[10\]/OUT
+ gpio_control_in_1\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[10\]/OE_N
+ gpio_control_in_1\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/SLOW
+ gpio_control_in_1\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_1\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[3\]/A
+ gpio_control_in_1\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_1\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_1\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_1\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_1\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[0]
+ gpio_control_in_1\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[1]
+ gpio_control_in_1\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[2]
+ gpio_control_in_1\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[11\]/HLD_OVR
+ gpio_control_in_1\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_1\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[11\]/INP_DIS
+ gpio_control_in_1\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[11\]/OUT
+ gpio_control_in_1\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[11\]/OE_N
+ gpio_control_in_1\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/SLOW
+ gpio_control_in_1\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_1\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[4\]/A
+ gpio_control_in_1\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_1\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_1\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_1\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_1\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[0]
+ gpio_control_in_1\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[1]
+ gpio_control_in_1\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[2]
+ gpio_control_in_1\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[12\]/HLD_OVR
+ gpio_control_in_1\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_1\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[12\]/INP_DIS
+ gpio_control_in_1\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[12\]/OUT
+ gpio_control_in_1\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[12\]/OE_N
+ gpio_control_in_1\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/SLOW
+ gpio_control_in_1\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_1\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[5\]/A
+ gpio_control_in_1\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_1\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_1\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_1\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_1\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[0]
+ gpio_control_in_1\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[1]
+ gpio_control_in_1\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[2]
+ gpio_control_in_1\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[13\]/HLD_OVR
+ gpio_control_in_1\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_1\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[13\]/INP_DIS
+ gpio_control_in_1\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[13\]/OUT
+ gpio_control_in_1\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[13\]/OE_N
+ gpio_control_in_1\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/SLOW
+ gpio_control_in_1\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_1\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[6\]/A
+ gpio_control_in_1\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_1\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_1\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_1\[6\]/one
+  padframe/mprj_pads.area1_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_1\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[0]
+ gpio_control_in_1\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[1]
+ gpio_control_in_1\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[2]
+ gpio_control_in_1\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[14\]/HLD_OVR
+ gpio_control_in_1\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_1\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[14\]/INP_DIS
+ gpio_control_in_1\[6\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[14\]/OUT
+ gpio_control_in_1\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[14\]/OE_N
+ gpio_control_in_1\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/SLOW
+ gpio_control_in_1\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_1\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[8\]/A
+ gpio_control_in_1\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_1\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_1\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_1\[7\]/one
+  padframe/mprj_pads.area1_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_1\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[0]
+ gpio_control_in_1\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[1]
+ gpio_control_in_1\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[2]
+ gpio_control_in_1\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[15\]/HLD_OVR
+ gpio_control_in_1\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_1\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[15\]/INP_DIS
+ gpio_control_in_1\[7\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[15\]/OUT
+ gpio_control_in_1\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[15\]/OE_N
+ gpio_control_in_1\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/SLOW
+ gpio_control_in_1\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_1\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[10\]/A
+ gpio_control_in_1\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_1\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_1\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_1\[8\]/one
+  padframe/mprj_pads.area1_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_in_1\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[0]
+ gpio_control_in_1\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[1]
+ gpio_control_in_1\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[2]
+ gpio_control_in_1\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[16\]/HLD_OVR
+ gpio_control_in_1\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_in_1\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[16\]/INP_DIS
+ gpio_control_in_1\[8\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[16\]/OUT
+ gpio_control_in_1\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[16\]/OE_N
+ gpio_control_in_1\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/SLOW
+ gpio_control_in_1\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/VTRIP_SEL
+ gpio_control_in_1\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[13\]/A
+ gpio_control_in_1\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_EN
+ gpio_control_in_1\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_POL
+ gpio_control_in_1\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_SEL
+ gpio_control_in_1\[9\]/one
+  padframe/mprj_pads.area1_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_in_1\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[0]
+ gpio_control_in_1\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[1]
+ gpio_control_in_1\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[2]
+ gpio_control_in_1\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[17\]/HLD_OVR
+ gpio_control_in_1\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_in_1\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[17\]/INP_DIS
+ gpio_control_in_1\[9\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[17\]/OUT
+ gpio_control_in_1\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[17\]/OE_N
+ gpio_control_in_1\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/SLOW
+ gpio_control_in_1\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/VTRIP_SEL
+ gpio_control_in_1\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[16\]/A
+ gpio_control_in_1\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_EN
+ gpio_control_in_1\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_POL
+ gpio_control_in_1\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_SEL
+ gpio_control_in_1a\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_1a\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[0]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[1]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[2]
+ gpio_control_in_1a\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[2\]/HLD_OVR
+ gpio_control_in_1a\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[2\]/INP_DIS
+ gpio_control_in_1a\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[2\]/OUT
+ gpio_control_in_1a\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[2\]/OE_N
+ gpio_control_in_1a\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/SLOW
+ gpio_control_in_1a\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_1a\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_1a\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_1a\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[0]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[1]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[2]
+ gpio_control_in_1a\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[3\]/HLD_OVR
+ gpio_control_in_1a\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[3\]/INP_DIS
+ gpio_control_in_1a\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[3\]/OUT
+ gpio_control_in_1a\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[3\]/OE_N
+ gpio_control_in_1a\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/SLOW
+ gpio_control_in_1a\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_1a\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_1a\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_1a\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[0]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[1]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[2]
+ gpio_control_in_1a\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[4\]/HLD_OVR
+ gpio_control_in_1a\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[4\]/INP_DIS
+ gpio_control_in_1a\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[4\]/OUT
+ gpio_control_in_1a\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[4\]/OE_N
+ gpio_control_in_1a\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/SLOW
+ gpio_control_in_1a\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_1a\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_1a\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_1a\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[0]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[1]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[2]
+ gpio_control_in_1a\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[5\]/HLD_OVR
+ gpio_control_in_1a\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[5\]/INP_DIS
+ gpio_control_in_1a\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[5\]/OUT
+ gpio_control_in_1a\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[5\]/OE_N
+ gpio_control_in_1a\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/SLOW
+ gpio_control_in_1a\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_1a\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_1a\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_1a\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[0]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[1]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[2]
+ gpio_control_in_1a\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[6\]/HLD_OVR
+ gpio_control_in_1a\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[6\]/INP_DIS
+ gpio_control_in_1a\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[6\]/OUT
+ gpio_control_in_1a\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[6\]/OE_N
+ gpio_control_in_1a\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/SLOW
+ gpio_control_in_1a\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_1a\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_1a\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_1a\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[0]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[1]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[2]
+ gpio_control_in_1a\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[7\]/HLD_OVR
+ gpio_control_in_1a\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_1a\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[7\]/INP_DIS
+ gpio_control_in_1a\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[7\]/OUT
+ gpio_control_in_1a\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[7\]/OE_N
+ gpio_control_in_1a\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/SLOW
+ gpio_control_in_1a\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_1a\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[0\]/A
+ gpio_control_in_1a\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_1a\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_1a\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_in_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[0]
+ gpio_control_in_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[1]
+ gpio_control_in_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[2]
+ gpio_control_in_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[0\]/HLD_OVR
+ gpio_control_in_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_in_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[0\]/INP_DIS
+ gpio_control_in_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[0\]/OUT
+ gpio_control_in_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[0\]/OE_N
+ gpio_control_in_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/SLOW
+ gpio_control_in_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/VTRIP_SEL
+ gpio_control_in_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[23\]/A
+ gpio_control_in_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_EN
+ gpio_control_in_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_POL
+ gpio_control_in_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_SEL
+ gpio_control_in_2\[10\]/one
+  padframe/mprj_pads.area2_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_2\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[0]
+ gpio_control_in_2\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[1]
+ gpio_control_in_2\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[2]
+ gpio_control_in_2\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[10\]/HLD_OVR
+ gpio_control_in_2\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_2\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[10\]/INP_DIS
+ gpio_control_in_2\[10\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[10\]/OUT
+ gpio_control_in_2\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[10\]/OE_N
+ gpio_control_in_2\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/SLOW
+ gpio_control_in_2\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_2\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[71\]/A
+ gpio_control_in_2\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_2\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_2\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_2\[11\]/one
+  padframe/mprj_pads.area2_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_2\[11\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[0]
+ gpio_control_in_2\[11\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[1]
+ gpio_control_in_2\[11\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[2]
+ gpio_control_in_2\[11\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[11\]/HLD_OVR
+ gpio_control_in_2\[11\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_2\[11\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[11\]/INP_DIS
+ gpio_control_in_2\[11\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[11\]/OUT
+ gpio_control_in_2\[11\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[11\]/OE_N
+ gpio_control_in_2\[11\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/SLOW
+ gpio_control_in_2\[11\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_2\[11\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[75\]/A
+ gpio_control_in_2\[11\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_2\[11\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_2\[11\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_2\[12\]/one
+  padframe/mprj_pads.area2_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_2\[12\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[0]
+ gpio_control_in_2\[12\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[1]
+ gpio_control_in_2\[12\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[2]
+ gpio_control_in_2\[12\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[12\]/HLD_OVR
+ gpio_control_in_2\[12\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_2\[12\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[12\]/INP_DIS
+ gpio_control_in_2\[12\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[12\]/OUT
+ gpio_control_in_2\[12\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[12\]/OE_N
+ gpio_control_in_2\[12\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/SLOW
+ gpio_control_in_2\[12\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_2\[12\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[78\]/A
+ gpio_control_in_2\[12\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_2\[12\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_2\[12\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_2\[13\]/one
+  padframe/mprj_pads.area2_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_2\[13\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[0]
+ gpio_control_in_2\[13\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[1]
+ gpio_control_in_2\[13\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[2]
+ gpio_control_in_2\[13\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[13\]/HLD_OVR
+ gpio_control_in_2\[13\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_2\[13\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[13\]/INP_DIS
+ gpio_control_in_2\[13\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[13\]/OUT
+ gpio_control_in_2\[13\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[13\]/OE_N
+ gpio_control_in_2\[13\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/SLOW
+ gpio_control_in_2\[13\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_2\[13\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[81\]/A
+ gpio_control_in_2\[13\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_2\[13\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_2\[13\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_2\[14\]/one
+  padframe/mprj_pads.area2_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_2\[14\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[0]
+ gpio_control_in_2\[14\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[1]
+ gpio_control_in_2\[14\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[2]
+ gpio_control_in_2\[14\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[14\]/HLD_OVR
+ gpio_control_in_2\[14\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_2\[14\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[14\]/INP_DIS
+ gpio_control_in_2\[14\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[14\]/OUT
+ gpio_control_in_2\[14\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[14\]/OE_N
+ gpio_control_in_2\[14\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/SLOW
+ gpio_control_in_2\[14\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_2\[14\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[84\]/A
+ gpio_control_in_2\[14\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_2\[14\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_2\[14\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_2\[15\]/one
+  padframe/mprj_pads.area2_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_2\[15\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[0]
+ gpio_control_in_2\[15\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[1]
+ gpio_control_in_2\[15\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[2]
+ gpio_control_in_2\[15\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[15\]/HLD_OVR
+ gpio_control_in_2\[15\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_2\[15\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[15\]/INP_DIS
+ gpio_control_in_2\[15\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[15\]/OUT
+ gpio_control_in_2\[15\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[15\]/OE_N
+ gpio_control_in_2\[15\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/SLOW
+ gpio_control_in_2\[15\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_2\[15\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[87\]/A
+ gpio_control_in_2\[15\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_2\[15\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_2\[15\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_in_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[0]
+ gpio_control_in_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[1]
+ gpio_control_in_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[2]
+ gpio_control_in_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[1\]/HLD_OVR
+ gpio_control_in_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_in_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[1\]/INP_DIS
+ gpio_control_in_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[1\]/OUT
+ gpio_control_in_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[1\]/OE_N
+ gpio_control_in_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/SLOW
+ gpio_control_in_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/VTRIP_SEL
+ gpio_control_in_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[29\]/A
+ gpio_control_in_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_EN
+ gpio_control_in_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_POL
+ gpio_control_in_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_SEL
+ gpio_control_in_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[0]
+ gpio_control_in_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[1]
+ gpio_control_in_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[2]
+ gpio_control_in_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[2\]/HLD_OVR
+ gpio_control_in_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[2\]/INP_DIS
+ gpio_control_in_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[2\]/OUT
+ gpio_control_in_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[2\]/OE_N
+ gpio_control_in_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/SLOW
+ gpio_control_in_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[35\]/A
+ gpio_control_in_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_2\[3\]/one
+  padframe/mprj_pads.area2_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_2\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[0]
+ gpio_control_in_2\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[1]
+ gpio_control_in_2\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[2]
+ gpio_control_in_2\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[3\]/HLD_OVR
+ gpio_control_in_2\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_2\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[3\]/INP_DIS
+ gpio_control_in_2\[3\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[3\]/OUT
+ gpio_control_in_2\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[3\]/OE_N
+ gpio_control_in_2\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/SLOW
+ gpio_control_in_2\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_2\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[41\]/A
+ gpio_control_in_2\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_2\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_2\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_2\[4\]/one
+  padframe/mprj_pads.area2_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_2\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[0]
+ gpio_control_in_2\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[1]
+ gpio_control_in_2\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[2]
+ gpio_control_in_2\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[4\]/HLD_OVR
+ gpio_control_in_2\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_2\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[4\]/INP_DIS
+ gpio_control_in_2\[4\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[4\]/OUT
+ gpio_control_in_2\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[4\]/OE_N
+ gpio_control_in_2\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/SLOW
+ gpio_control_in_2\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_2\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[46\]/A
+ gpio_control_in_2\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_2\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_2\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_2\[5\]/one
+  padframe/mprj_pads.area2_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_2\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[0]
+ gpio_control_in_2\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[1]
+ gpio_control_in_2\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[2]
+ gpio_control_in_2\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[5\]/HLD_OVR
+ gpio_control_in_2\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_2\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[5\]/INP_DIS
+ gpio_control_in_2\[5\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[5\]/OUT
+ gpio_control_in_2\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[5\]/OE_N
+ gpio_control_in_2\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/SLOW
+ gpio_control_in_2\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_2\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[51\]/A
+ gpio_control_in_2\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_2\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_2\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_2\[6\]/one
+  padframe/mprj_pads.area2_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_2\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[0]
+ gpio_control_in_2\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[1]
+ gpio_control_in_2\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[2]
+ gpio_control_in_2\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[6\]/HLD_OVR
+ gpio_control_in_2\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_2\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[6\]/INP_DIS
+ gpio_control_in_2\[6\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[6\]/OUT
+ gpio_control_in_2\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[6\]/OE_N
+ gpio_control_in_2\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/SLOW
+ gpio_control_in_2\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_2\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[55\]/A
+ gpio_control_in_2\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_2\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_2\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_2\[7\]/one
+  padframe/mprj_pads.area2_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_2\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[0]
+ gpio_control_in_2\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[1]
+ gpio_control_in_2\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[2]
+ gpio_control_in_2\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[7\]/HLD_OVR
+ gpio_control_in_2\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_2\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[7\]/INP_DIS
+ gpio_control_in_2\[7\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[7\]/OUT
+ gpio_control_in_2\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[7\]/OE_N
+ gpio_control_in_2\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/SLOW
+ gpio_control_in_2\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_2\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[59\]/A
+ gpio_control_in_2\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_2\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_2\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[8\]/one
+  gpio_control_in_2\[8\]/ANTENNA_input1_A/DIODE
+  gpio_control_in_2\[8\]/input1/A
+  padframe/mprj_pads.area2_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_2\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[0]
+ gpio_control_in_2\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[1]
+ gpio_control_in_2\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[2]
+ gpio_control_in_2\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[8\]/HLD_OVR
+ gpio_control_in_2\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_2\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[8\]/INP_DIS
+ gpio_control_in_2\[8\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[8\]/OUT
+ gpio_control_in_2\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[8\]/OE_N
+ gpio_control_in_2\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/SLOW
+ gpio_control_in_2\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_2\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[63\]/A
+ gpio_control_in_2\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_2\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_2\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_2\[9\]/one
+  padframe/mprj_pads.area2_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_2\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[0]
+ gpio_control_in_2\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[1]
+ gpio_control_in_2\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[2]
+ gpio_control_in_2\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[9\]/HLD_OVR
+ gpio_control_in_2\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_2\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[9\]/INP_DIS
+ gpio_control_in_2\[9\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[9\]/OUT
+ gpio_control_in_2\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[9\]/OE_N
+ gpio_control_in_2\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/SLOW
+ gpio_control_in_2\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_2\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[67\]/A
+ gpio_control_in_2\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_2\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_2\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_SEL
+ housekeeping/mgmt_gpio_out[14]
+  sigbuf/signal_buffers\[103\]/A
+ housekeeping/mgmt_gpio_out[15]
+  sigbuf/signal_buffers\[105\]/A
+ housekeeping/mgmt_gpio_out[9]
+  sigbuf/signal_buffers\[97\]/A
+ housekeeping/mgmt_gpio_oeb[35]
+  sigbuf/signal_buffers\[190\]/A
+ housekeeping/mgmt_gpio_oeb[36]
+  sigbuf/signal_buffers\[192\]/A
+ housekeeping/mgmt_gpio_oeb[37]
+  sigbuf/signal_buffers\[194\]/A
+ housekeeping/mgmt_gpio_out[10]
+  sigbuf/signal_buffers\[98\]/A
+ housekeeping/mgmt_gpio_out[11]
+  sigbuf/signal_buffers\[99\]/A
+ housekeeping/mgmt_gpio_out[12]
+  sigbuf/signal_buffers\[100\]/A
+ housekeeping/mgmt_gpio_out[13]
+  sigbuf/signal_buffers\[101\]/A
+ housekeeping/mgmt_gpio_out[16]
+  sigbuf/signal_buffers\[108\]/A
+ housekeeping/mgmt_gpio_out[17]
+  sigbuf/signal_buffers\[111\]/A
+ housekeeping/mgmt_gpio_out[18]
+  sigbuf/signal_buffers\[114\]/A
+ housekeeping/mgmt_gpio_out[19]
+  sigbuf/signal_buffers\[118\]/A
+ housekeeping/mgmt_gpio_out[20]
+  sigbuf/signal_buffers\[124\]/A
+ housekeeping/mgmt_gpio_out[21]
+  sigbuf/signal_buffers\[130\]/A
+ housekeeping/mgmt_gpio_out[22]
+  sigbuf/signal_buffers\[136\]/A
+ housekeeping/mgmt_gpio_out[23]
+  sigbuf/signal_buffers\[141\]/A
+ housekeeping/mgmt_gpio_out[24]
+  sigbuf/signal_buffers\[146\]/A
+ housekeeping/mgmt_gpio_out[25]
+  sigbuf/signal_buffers\[150\]/A
+ housekeeping/mgmt_gpio_out[26]
+  sigbuf/signal_buffers\[154\]/A
+ housekeeping/mgmt_gpio_out[27]
+  sigbuf/signal_buffers\[158\]/A
+ housekeeping/mgmt_gpio_out[28]
+  sigbuf/signal_buffers\[162\]/A
+ housekeeping/mgmt_gpio_out[29]
+  sigbuf/signal_buffers\[166\]/A
+ housekeeping/mgmt_gpio_out[30]
+  sigbuf/signal_buffers\[170\]/A
+ housekeeping/mgmt_gpio_out[31]
+  sigbuf/signal_buffers\[173\]/A
+ housekeeping/mgmt_gpio_out[32]
+  sigbuf/signal_buffers\[176\]/A
+ housekeeping/mgmt_gpio_out[33]
+  sigbuf/signal_buffers\[179\]/A
+ housekeeping/mgmt_gpio_out[34]
+  sigbuf/signal_buffers\[182\]/A
+ housekeeping/mgmt_gpio_out[35]
+  sigbuf/signal_buffers\[184\]/A
+ housekeeping/mgmt_gpio_out[36]
+  sigbuf/signal_buffers\[186\]/A
+ housekeeping/mgmt_gpio_out[37]
+  sigbuf/signal_buffers\[188\]/A
+ housekeeping/mgmt_gpio_out[7]
+  sigbuf/signal_buffers\[95\]/A
+ housekeeping/mgmt_gpio_out[8]
+  sigbuf/signal_buffers\[96\]/A
+ mgmt_buffers/mprj_dat_o_user[0]
+  mprj/mprj/input1/A
+  mprj/mprj/ANTENNA_input1_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[10]
+  mprj/mprj/input11/A
+  mprj/mprj/ANTENNA_input11_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[11]
+  mprj/mprj/input12/A
+  mprj/mprj/ANTENNA_input12_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[12]
+  mprj/mprj/input13/A
+  mprj/mprj/ANTENNA_input13_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[13]
+  mprj/mprj/input14/A
+  mprj/mprj/ANTENNA_input14_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[14]
+  mprj/mprj/input15/A
+  mprj/mprj/ANTENNA_input15_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[15]
+  mprj/mprj/input16/A
+  mprj/mprj/ANTENNA_input16_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[1]
+  mprj/mprj/input2/A
+  mprj/mprj/ANTENNA_input2_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[2]
+  mprj/mprj/input3/A
+  mprj/mprj/ANTENNA_input3_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[3]
+  mprj/mprj/input4/A
+  mprj/mprj/ANTENNA_input4_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[4]
+  mprj/mprj/input5/A
+  mprj/mprj/ANTENNA_input5_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[5]
+  mprj/mprj/input6/A
+  mprj/mprj/ANTENNA_input6_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[6]
+  mprj/mprj/input7/A
+  mprj/mprj/ANTENNA_input7_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[7]
+  mprj/mprj/input8/A
+  mprj/mprj/ANTENNA_input8_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[8]
+  mprj/mprj/input9/A
+  mprj/mprj/ANTENNA_input9_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[9]
+  mprj/mprj/input10/A
+  mprj/mprj/ANTENNA_input10_A/DIODE
+ soc/gpio_inenb_pad
+  padframe/gpio_pad/INP_DIS
+ soc/gpio_mode0_pad
+  padframe/gpio_pad/DM[0]
+ soc/gpio_mode1_pad
+  padframe/gpio_pad/DM[2]
+  padframe/gpio_pad/DM[1]
+ soc/gpio_out_pad
+  padframe/gpio_pad/OUT
+ soc/gpio_outenb_pad
+  padframe/gpio_pad/OE_N
+ soc/por_l_out
+  padframe/clock_pad/INP_DIS

signoff/caravel/openlane-signoff/timing/max/s-clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-clk-max.rpt b/signoff/caravel/openlane-signoff/timing/max/s-clk-max.rpt
new file mode 100644
index 0000000..46c639d
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ae2dc74f2f1217706bf3adb2ca7aa6c28735884b0bcc28b31f475bf29c48fec8
+size 28275008

signoff/caravel/openlane-signoff/timing/max/s-clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-clk-min.rpt b/signoff/caravel/openlane-signoff/timing/max/s-clk-min.rpt
new file mode 100644
index 0000000..9879038
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:d5a9a6d619e5a99e72b65307d6a5c9602955889e1f372b2ff99735276347759f
+size 18809713

signoff/caravel/openlane-signoff/timing/max/s-hk_serial_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-hk_serial_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/max/s-hk_serial_clk-max.rpt
new file mode 100644
index 0000000..9a184db
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-hk_serial_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:e40a21135c97c8ac2e68991ebee6b714a621b5eccf8813d691ca80b062e5c3f3
+size 345

signoff/caravel/openlane-signoff/timing/max/s-hk_serial_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-hk_serial_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/max/s-hk_serial_clk-min.rpt
new file mode 100644
index 0000000..737a270
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-hk_serial_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:18974ffad1c463bfd6f110179ff1b82e2a458358ab1d7e1ae1620518a120f929
+size 11323365

signoff/caravel/openlane-signoff/timing/max/s-hkspi_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-hkspi_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/max/s-hkspi_clk-max.rpt
new file mode 100644
index 0000000..62a1df4
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-hkspi_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:3068689b24b2ab1476fdb5fd19c91c04c6a82d8c1f00f45a94c457b3778efcb8
+size 341

signoff/caravel/openlane-signoff/timing/max/s-hkspi_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-hkspi_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/max/s-hkspi_clk-min.rpt
new file mode 100644
index 0000000..111d6d7
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-hkspi_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:84a2439d3e75f5d5f0f586258a9b959cee37b7a132ccb0b76a7a95a97ff46052
+size 6164065

signoff/caravel/openlane-signoff/timing/max/s-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-max.rpt b/signoff/caravel/openlane-signoff/timing/max/s-max.rpt
new file mode 100644
index 0000000..711492a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0eab0f7647b9774aa3bb8342ad26eae068eef23318362174a80dd76ee515367c
+size 287133231

signoff/caravel/openlane-signoff/timing/max/s-min.rpt

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new file mode 100644
index 0000000..62f68c3
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:e412a4674e8e6d31560f5efdfc4e13924d7b813a7aab34a4abe79b0a600d20fb
+size 264657343

signoff/caravel/openlane-signoff/timing/max/s-mprj-max.rpt

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new file mode 100644
index 0000000..ed8d120
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-mprj-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:9e83e73c419e173b29a8f7d5b640090461566d6119ad7876795ef4b505eebf5e
+size 532296

signoff/caravel/openlane-signoff/timing/max/s-mprj-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-mprj-min.rpt b/signoff/caravel/openlane-signoff/timing/max/s-mprj-min.rpt
new file mode 100644
index 0000000..d98cab3
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-mprj-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:02b1394bc7c89f15f9621fdfcbb6d806f4c154554f3b928ec5fd6e17abf88787
+size 453875

signoff/caravel/openlane-signoff/timing/max/s-soc-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-soc-max.rpt b/signoff/caravel/openlane-signoff/timing/max/s-soc-max.rpt
new file mode 100644
index 0000000..19982b6
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-soc-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:033c3b62b3d47acf2952869822c314595aa6a59552e6feb0d7b2d62b99e41e65
+size 18750676

signoff/caravel/openlane-signoff/timing/max/s-soc-min.rpt

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new file mode 100644
index 0000000..4fda39d
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-soc-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:08143fa9d5faf748b4dd418fb2cd6193dfea19b83bd5e26b9c9ac69e1f368d34
+size 9922196

signoff/caravel/openlane-signoff/timing/max/s-summary.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-summary.rpt b/signoff/caravel/openlane-signoff/timing/max/s-summary.rpt
new file mode 100644
index 0000000..56e2146
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-summary.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:21e6ecb73f6f96a58e2ff2de41ccee55b0b8b65e16be0192ac31d7dac805f930
+size 3583397

signoff/caravel/openlane-signoff/timing/max/s-unannotated.log

diff --git a/signoff/caravel/openlane-signoff/timing/max/s-unannotated.log b/signoff/caravel/openlane-signoff/timing/max/s-unannotated.log
new file mode 100644
index 0000000..2939c48
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/s-unannotated.log
@@ -0,0 +1,4179 @@
+Found 2894 unannotated nets.
+ padframe/flash_clk
+ padframe/mprj_analog_io[26]
+ mprj_io[28]
+ vssa2
+ vssa1
+ vdda1
+ mprj_io[4]
+ mprj_io[5]
+ mprj_io[19]
+ vssa1_2
+ vdda2
+ mprj_io[2]
+ mprj_io[3]
+ mprj_io[14]
+ mprj_io[33]
+ mprj_io[34]
+ resetb
+ mprj_io[1]
+ mprj_io[8]
+ mprj_io[9]
+ mprj_io[6]
+ mprj_io[11]
+ mprj_io[13]
+ mprj_io[15]
+ mprj_io[17]
+ mprj_io[18]
+ mprj_io[20]
+ mprj_io[23]
+ mprj_io[16]
+ mprj_io[27]
+ mprj_io[29]
+ mprj_io[32]
+ vssd2
+ vccd1
+ clock
+ gpio
+ vssd
+ vdda
+ mprj_io[37]
+ vccd
+ vssa
+ vssio
+ mprj_io[30]
+ vssd1
+ vssio_2
+ vddio
+ mprj_io[36]
+ vddio_2
+ mprj_io[31]
+ vccd2
+ vdda1_2
+ mprj_io[21]
+ mprj_io[26]
+ mprj_io[35]
+ mprj_io[0]
+ mprj_io[22]
+ mprj_io[24]
+ mprj_io[25]
+ mprj_io[7]
+ mprj_io[12]
+ mprj_io[10]
+ gpio_control_bidir_2\[2\]/_053_
+ gpio_control_bidir_2\[2\]/_052_
+ gpio_control_bidir_2\[2\]/_051_
+ gpio_control_bidir_2\[2\]/_050_
+ gpio_control_bidir_2\[2\]/_049_
+ gpio_control_bidir_2\[2\]/_048_
+ gpio_control_bidir_2\[2\]/_047_
+ gpio_control_bidir_2\[2\]/_046_
+ gpio_control_bidir_2\[2\]/_057_
+ gpio_control_bidir_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[7\]/_052_
+ gpio_control_in_1\[7\]/_056_
+ gpio_control_in_1\[7\]/_055_
+ gpio_control_in_1\[7\]/_054_
+ gpio_control_in_1\[7\]/_053_
+ gpio_control_in_1\[7\]/_051_
+ gpio_control_in_1\[7\]/_050_
+ gpio_control_in_1\[7\]/_049_
+ gpio_control_in_1\[7\]/_048_
+ gpio_control_in_1\[7\]/_047_
+ gpio_control_in_1\[7\]/_046_
+ gpio_control_in_1\[7\]/_057_
+ gpio_control_in_1\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_047_
+ gpio_control_in_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_049_
+ gpio_control_in_2\[0\]/_048_
+ gpio_control_in_2\[0\]/_046_
+ gpio_control_in_2\[0\]/_057_
+ gpio_control_in_2\[3\]/_047_
+ gpio_control_in_2\[3\]/_052_
+ gpio_control_in_2\[3\]/_051_
+ gpio_control_in_2\[3\]/_050_
+ gpio_control_in_2\[3\]/_049_
+ gpio_control_in_2\[3\]/_048_
+ gpio_control_in_2\[3\]/_046_
+ gpio_control_in_2\[3\]/_057_
+ gpio_control_in_2\[3\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_20/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[2\]
+ gpio_defaults_block_21/gpio_defaults_low\[6\]
+ gpio_defaults_block_21/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[3\]
+ gpio_defaults_block_20/gpio_defaults_high\[11\]
+ gpio_defaults_block_20/gpio_defaults_low\[11\]
+ gpio_defaults_block_20/gpio_defaults_high\[12\]
+ gpio_defaults_block_20/gpio_defaults_low\[12\]
+ gpio_defaults_block_20/gpio_defaults_high\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[2\]
+ gpio_defaults_block_20/gpio_defaults_low\[2\]
+ gpio_defaults_block_20/gpio_defaults_high\[4\]
+ gpio_defaults_block_20/gpio_defaults_low\[4\]
+ gpio_defaults_block_20/gpio_defaults_high\[5\]
+ gpio_defaults_block_20/gpio_defaults_low\[5\]
+ gpio_defaults_block_20/gpio_defaults_high\[6\]
+ gpio_defaults_block_20/gpio_defaults_low\[6\]
+ gpio_defaults_block_20/gpio_defaults_high\[7\]
+ gpio_defaults_block_20/gpio_defaults_low\[7\]
+ gpio_defaults_block_20/gpio_defaults_high\[8\]
+ gpio_defaults_block_20/gpio_defaults_low\[8\]
+ gpio_defaults_block_20/gpio_defaults_high\[9\]
+ gpio_defaults_block_20/gpio_defaults_low\[9\]
+ gpio_defaults_block_21/gpio_defaults_high\[0\]
+ gpio_defaults_block_21/gpio_defaults_low\[0\]
+ gpio_defaults_block_21/gpio_defaults_high\[10\]
+ gpio_defaults_block_21/gpio_defaults_low\[10\]
+ gpio_defaults_block_21/gpio_defaults_high\[11\]
+ gpio_defaults_block_21/gpio_defaults_low\[11\]
+ gpio_defaults_block_21/gpio_defaults_high\[12\]
+ gpio_defaults_block_21/gpio_defaults_low\[12\]
+ gpio_defaults_block_21/gpio_defaults_high\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[2\]
+ gpio_defaults_block_21/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_low\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[4\]
+ gpio_defaults_block_21/gpio_defaults_low\[4\]
+ gpio_defaults_block_21/gpio_defaults_high\[5\]
+ gpio_defaults_block_21/gpio_defaults_low\[5\]
+ gpio_defaults_block_21/gpio_defaults_high\[6\]
+ gpio_defaults_block_21/gpio_defaults_high\[7\]
+ gpio_defaults_block_21/gpio_defaults_high\[8\]
+ gpio_defaults_block_21/gpio_defaults_low\[8\]
+ gpio_defaults_block_21/gpio_defaults_high\[9\]
+ gpio_defaults_block_21/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[2\]
+ gpio_defaults_block_19/gpio_defaults_high\[3\]
+ gpio_defaults_block_19/gpio_defaults_low\[3\]
+ gpio_defaults_block_19/gpio_defaults_high\[4\]
+ gpio_defaults_block_19/gpio_defaults_low\[4\]
+ gpio_defaults_block_19/gpio_defaults_high\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[6\]
+ gpio_defaults_block_19/gpio_defaults_high\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[8\]
+ gpio_defaults_block_19/gpio_defaults_low\[8\]
+ gpio_defaults_block_19/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[9\]
+ gpio_defaults_block_2/gpio_defaults_high\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[10\]
+ gpio_defaults_block_2/gpio_defaults_low\[10\]
+ gpio_defaults_block_2/gpio_defaults_high\[11\]
+ gpio_defaults_block_2/gpio_defaults_low\[11\]
+ gpio_defaults_block_2/gpio_defaults_high\[12\]
+ gpio_defaults_block_2/gpio_defaults_low\[12\]
+ gpio_defaults_block_2/gpio_defaults_high\[1\]
+ gpio_defaults_block_2/gpio_defaults_high\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_high\[4\]
+ gpio_defaults_block_2/gpio_defaults_low\[4\]
+ gpio_defaults_block_2/gpio_defaults_high\[5\]
+ gpio_defaults_block_2/gpio_defaults_low\[5\]
+ gpio_defaults_block_2/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[7\]
+ gpio_defaults_block_2/gpio_defaults_low\[7\]
+ gpio_defaults_block_2/gpio_defaults_high\[8\]
+ gpio_defaults_block_2/gpio_defaults_low\[8\]
+ gpio_defaults_block_2/gpio_defaults_high\[9\]
+ gpio_defaults_block_2/gpio_defaults_low\[9\]
+ gpio_defaults_block_20/gpio_defaults_high\[0\]
+ gpio_defaults_block_20/gpio_defaults_low\[0\]
+ gpio_defaults_block_20/gpio_defaults_high\[10\]
+ gpio_defaults_block_20/gpio_defaults_low\[10\]
+ padframe/mprj_analog_io[7]
+ padframe/flash_io0
+ padframe/flash_io0_di_core
+ gpio_control_bidir_1\[0\]/_056_
+ gpio_control_bidir_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_1\[0\]/_051_
+ gpio_control_bidir_1\[0\]/_055_
+ gpio_control_bidir_1\[0\]/_054_
+ gpio_control_bidir_1\[0\]/_053_
+ gpio_control_bidir_1\[0\]/_052_
+ gpio_control_bidir_1\[0\]/_050_
+ gpio_control_bidir_1\[0\]/_049_
+ gpio_control_bidir_1\[0\]/_048_
+ gpio_control_bidir_1\[0\]/_047_
+ gpio_control_bidir_1\[0\]/_046_
+ gpio_control_bidir_1\[0\]/_057_
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+ gpio_control_in_2\[8\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[4\]
+ gpio_defaults_block_0/gpio_defaults_low\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[9\]
+ gpio_control_in_2\[9\]/_051_
+ gpio_control_in_2\[9\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[0\]
+ gpio_defaults_block_0/gpio_defaults_low\[0\]
+ gpio_defaults_block_0/gpio_defaults_high\[10\]
+ gpio_defaults_block_0/gpio_defaults_low\[10\]
+ gpio_defaults_block_0/gpio_defaults_high\[11\]
+ gpio_defaults_block_0/gpio_defaults_low\[11\]
+ gpio_defaults_block_0/gpio_defaults_high\[12\]
+ gpio_defaults_block_0/gpio_defaults_low\[12\]
+ gpio_defaults_block_0/gpio_defaults_high\[1\]
+ gpio_defaults_block_0/gpio_defaults_low\[1\]
+ gpio_defaults_block_0/gpio_defaults_high\[2\]
+ gpio_defaults_block_0/gpio_defaults_low\[2\]
+ gpio_defaults_block_0/gpio_defaults_high\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[4\]
+ gpio_defaults_block_0/gpio_defaults_high\[5\]
+ gpio_defaults_block_0/gpio_defaults_low\[5\]
+ gpio_defaults_block_0/gpio_defaults_high\[6\]
+ gpio_defaults_block_0/gpio_defaults_low\[6\]
+ gpio_defaults_block_0/gpio_defaults_high\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[9\]
+ gpio_control_in_2\[9\]/_056_
+ gpio_control_in_2\[9\]/_055_
+ gpio_control_in_2\[9\]/_054_
+ gpio_control_in_2\[9\]/_053_
+ gpio_control_in_2\[9\]/_052_
+ gpio_control_in_2\[9\]/_050_
+ gpio_control_in_2\[9\]/_049_
+ gpio_control_in_2\[9\]/_048_
+ gpio_control_in_2\[9\]/_047_
+ gpio_control_in_2\[9\]/_046_
+ gpio_control_in_2\[9\]/_057_
+ gpio_defaults_block_11/gpio_defaults_low\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[0\]
+ gpio_defaults_block_11/gpio_defaults_low\[0\]
+ gpio_defaults_block_11/gpio_defaults_high\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[11\]
+ gpio_defaults_block_11/gpio_defaults_low\[11\]
+ gpio_defaults_block_11/gpio_defaults_high\[12\]
+ gpio_defaults_block_11/gpio_defaults_low\[12\]
+ gpio_defaults_block_11/gpio_defaults_high\[1\]
+ gpio_defaults_block_11/gpio_defaults_low\[1\]
+ gpio_defaults_block_11/gpio_defaults_high\[2\]
+ gpio_defaults_block_11/gpio_defaults_low\[2\]
+ gpio_defaults_block_11/gpio_defaults_high\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[9\]
+ gpio_defaults_block_11/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[0\]
+ gpio_defaults_block_12/gpio_defaults_low\[0\]
+ gpio_defaults_block_12/gpio_defaults_high\[10\]
+ gpio_defaults_block_12/gpio_defaults_low\[10\]
+ gpio_defaults_block_12/gpio_defaults_high\[11\]
+ gpio_defaults_block_12/gpio_defaults_low\[11\]
+ gpio_defaults_block_12/gpio_defaults_high\[12\]
+ gpio_defaults_block_12/gpio_defaults_low\[12\]
+ gpio_defaults_block_12/gpio_defaults_high\[1\]
+ gpio_defaults_block_12/gpio_defaults_low\[1\]
+ gpio_defaults_block_12/gpio_defaults_high\[2\]
+ gpio_defaults_block_12/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[0\]
+ gpio_defaults_block_1/gpio_defaults_low\[0\]
+ gpio_defaults_block_1/gpio_defaults_high\[10\]
+ gpio_defaults_block_1/gpio_defaults_low\[10\]
+ gpio_defaults_block_1/gpio_defaults_high\[11\]
+ gpio_defaults_block_1/gpio_defaults_low\[11\]
+ gpio_defaults_block_1/gpio_defaults_high\[12\]
+ gpio_defaults_block_1/gpio_defaults_low\[12\]
+ gpio_defaults_block_1/gpio_defaults_high\[1\]
+ gpio_defaults_block_1/gpio_defaults_low\[1\]
+ gpio_defaults_block_1/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[4\]
+ gpio_defaults_block_1/gpio_defaults_high\[5\]
+ gpio_defaults_block_1/gpio_defaults_low\[5\]
+ gpio_defaults_block_1/gpio_defaults_high\[6\]
+ gpio_defaults_block_1/gpio_defaults_low\[6\]
+ gpio_defaults_block_1/gpio_defaults_high\[7\]
+ gpio_defaults_block_1/gpio_defaults_low\[7\]
+ gpio_defaults_block_1/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_low\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[9\]
+ gpio_defaults_block_1/gpio_defaults_low\[9\]
+ gpio_defaults_block_10/gpio_defaults_high\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[11\]
+ gpio_defaults_block_10/gpio_defaults_low\[11\]
+ gpio_defaults_block_10/gpio_defaults_high\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[2\]
+ gpio_defaults_block_10/gpio_defaults_low\[2\]
+ gpio_defaults_block_10/gpio_defaults_high\[3\]
+ gpio_defaults_block_10/gpio_defaults_low\[3\]
+ gpio_defaults_block_10/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_low\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[5\]
+ gpio_defaults_block_10/gpio_defaults_low\[5\]
+ gpio_defaults_block_10/gpio_defaults_high\[6\]
+ gpio_defaults_block_10/gpio_defaults_low\[6\]
+ gpio_defaults_block_10/gpio_defaults_high\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[8\]
+ gpio_defaults_block_10/gpio_defaults_high\[9\]
+ gpio_defaults_block_10/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[10\]
+ gpio_defaults_block_15/gpio_defaults_low\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[7\]
+ gpio_defaults_block_15/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[11\]
+ gpio_defaults_block_13/gpio_defaults_low\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[10\]
+ gpio_defaults_block_14/gpio_defaults_low\[11\]
+ gpio_defaults_block_14/gpio_defaults_high\[12\]
+ gpio_defaults_block_14/gpio_defaults_low\[12\]
+ gpio_defaults_block_14/gpio_defaults_high\[1\]
+ gpio_defaults_block_14/gpio_defaults_low\[1\]
+ gpio_defaults_block_14/gpio_defaults_high\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[5\]
+ gpio_defaults_block_14/gpio_defaults_high\[6\]
+ gpio_defaults_block_14/gpio_defaults_low\[6\]
+ gpio_defaults_block_14/gpio_defaults_high\[7\]
+ gpio_defaults_block_14/gpio_defaults_low\[7\]
+ gpio_defaults_block_14/gpio_defaults_high\[8\]
+ gpio_defaults_block_14/gpio_defaults_low\[8\]
+ gpio_defaults_block_14/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_low\[9\]
+ gpio_defaults_block_15/gpio_defaults_high\[0\]
+ gpio_defaults_block_15/gpio_defaults_low\[0\]
+ gpio_defaults_block_15/gpio_defaults_high\[10\]
+ gpio_defaults_block_15/gpio_defaults_high\[11\]
+ gpio_defaults_block_15/gpio_defaults_low\[11\]
+ gpio_defaults_block_15/gpio_defaults_high\[12\]
+ gpio_defaults_block_15/gpio_defaults_low\[12\]
+ gpio_defaults_block_15/gpio_defaults_high\[1\]
+ gpio_defaults_block_15/gpio_defaults_low\[1\]
+ gpio_defaults_block_15/gpio_defaults_high\[2\]
+ gpio_defaults_block_15/gpio_defaults_low\[2\]
+ gpio_defaults_block_15/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_high\[5\]
+ gpio_defaults_block_15/gpio_defaults_low\[5\]
+ gpio_defaults_block_15/gpio_defaults_high\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[7\]
+ gpio_defaults_block_15/gpio_defaults_high\[8\]
+ gpio_defaults_block_15/gpio_defaults_high\[9\]
+ gpio_defaults_block_15/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[3\]
+ gpio_defaults_block_12/gpio_defaults_low\[3\]
+ gpio_defaults_block_12/gpio_defaults_high\[4\]
+ gpio_defaults_block_12/gpio_defaults_low\[4\]
+ gpio_defaults_block_12/gpio_defaults_high\[5\]
+ gpio_defaults_block_12/gpio_defaults_low\[5\]
+ gpio_defaults_block_12/gpio_defaults_high\[6\]
+ gpio_defaults_block_12/gpio_defaults_low\[6\]
+ gpio_defaults_block_12/gpio_defaults_high\[7\]
+ gpio_defaults_block_12/gpio_defaults_high\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_low\[9\]
+ gpio_defaults_block_13/gpio_defaults_high\[0\]
+ gpio_defaults_block_13/gpio_defaults_low\[0\]
+ gpio_defaults_block_13/gpio_defaults_high\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[11\]
+ gpio_defaults_block_13/gpio_defaults_high\[12\]
+ gpio_defaults_block_13/gpio_defaults_low\[12\]
+ gpio_defaults_block_13/gpio_defaults_high\[1\]
+ gpio_defaults_block_13/gpio_defaults_low\[1\]
+ gpio_defaults_block_13/gpio_defaults_high\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[3\]
+ gpio_defaults_block_13/gpio_defaults_high\[4\]
+ gpio_defaults_block_13/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_low\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[6\]
+ gpio_defaults_block_13/gpio_defaults_low\[6\]
+ gpio_defaults_block_13/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[8\]
+ gpio_defaults_block_13/gpio_defaults_low\[8\]
+ gpio_defaults_block_13/gpio_defaults_high\[9\]
+ gpio_defaults_block_13/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[0\]
+ gpio_defaults_block_14/gpio_defaults_low\[0\]
+ gpio_defaults_block_14/gpio_defaults_high\[10\]
+ gpio_defaults_block_14/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[3\]
+ gpio_defaults_block_18/gpio_defaults_low\[5\]
+ gpio_defaults_block_18/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[0\]
+ gpio_defaults_block_16/gpio_defaults_low\[10\]
+ gpio_defaults_block_16/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[11\]
+ gpio_defaults_block_17/gpio_defaults_low\[12\]
+ gpio_defaults_block_17/gpio_defaults_low\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[0\]
+ gpio_defaults_block_18/gpio_defaults_low\[0\]
+ gpio_defaults_block_18/gpio_defaults_high\[10\]
+ gpio_defaults_block_18/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[11\]
+ gpio_defaults_block_18/gpio_defaults_high\[12\]
+ gpio_defaults_block_18/gpio_defaults_low\[12\]
+ gpio_defaults_block_18/gpio_defaults_high\[1\]
+ gpio_defaults_block_18/gpio_defaults_low\[1\]
+ gpio_defaults_block_18/gpio_defaults_high\[2\]
+ gpio_defaults_block_18/gpio_defaults_low\[2\]
+ gpio_defaults_block_18/gpio_defaults_high\[3\]
+ gpio_defaults_block_18/gpio_defaults_high\[4\]
+ gpio_defaults_block_18/gpio_defaults_low\[4\]
+ gpio_defaults_block_18/gpio_defaults_high\[5\]
+ gpio_defaults_block_18/gpio_defaults_high\[6\]
+ gpio_defaults_block_18/gpio_defaults_low\[6\]
+ gpio_defaults_block_18/gpio_defaults_high\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[8\]
+ gpio_defaults_block_18/gpio_defaults_low\[8\]
+ gpio_defaults_block_18/gpio_defaults_high\[9\]
+ gpio_defaults_block_18/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[0\]
+ gpio_defaults_block_19/gpio_defaults_low\[0\]
+ gpio_defaults_block_19/gpio_defaults_high\[10\]
+ gpio_defaults_block_19/gpio_defaults_low\[10\]
+ gpio_defaults_block_19/gpio_defaults_high\[11\]
+ gpio_defaults_block_19/gpio_defaults_high\[12\]
+ gpio_defaults_block_19/gpio_defaults_low\[12\]
+ gpio_defaults_block_19/gpio_defaults_high\[1\]
+ gpio_defaults_block_19/gpio_defaults_low\[1\]
+ gpio_defaults_block_19/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[0\]
+ gpio_defaults_block_16/gpio_defaults_high\[10\]
+ gpio_defaults_block_16/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_high\[12\]
+ gpio_defaults_block_16/gpio_defaults_low\[12\]
+ gpio_defaults_block_16/gpio_defaults_high\[1\]
+ gpio_defaults_block_16/gpio_defaults_low\[1\]
+ gpio_defaults_block_16/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_low\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[3\]
+ gpio_defaults_block_16/gpio_defaults_high\[4\]
+ gpio_defaults_block_16/gpio_defaults_low\[4\]
+ gpio_defaults_block_16/gpio_defaults_high\[5\]
+ gpio_defaults_block_16/gpio_defaults_low\[5\]
+ gpio_defaults_block_16/gpio_defaults_high\[6\]
+ gpio_defaults_block_16/gpio_defaults_low\[6\]
+ gpio_defaults_block_16/gpio_defaults_high\[7\]
+ gpio_defaults_block_16/gpio_defaults_low\[7\]
+ gpio_defaults_block_16/gpio_defaults_high\[8\]
+ gpio_defaults_block_16/gpio_defaults_low\[8\]
+ gpio_defaults_block_16/gpio_defaults_high\[9\]
+ gpio_defaults_block_16/gpio_defaults_low\[9\]
+ gpio_defaults_block_17/gpio_defaults_high\[0\]
+ gpio_defaults_block_17/gpio_defaults_low\[0\]
+ gpio_defaults_block_17/gpio_defaults_high\[10\]
+ gpio_defaults_block_17/gpio_defaults_low\[10\]
+ gpio_defaults_block_17/gpio_defaults_high\[11\]
+ gpio_defaults_block_17/gpio_defaults_high\[12\]
+ gpio_defaults_block_17/gpio_defaults_high\[1\]
+ gpio_defaults_block_17/gpio_defaults_low\[1\]
+ gpio_defaults_block_17/gpio_defaults_high\[2\]
+ gpio_defaults_block_17/gpio_defaults_low\[2\]
+ gpio_defaults_block_17/gpio_defaults_high\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_high\[4\]
+ gpio_defaults_block_17/gpio_defaults_low\[4\]
+ gpio_defaults_block_17/gpio_defaults_high\[5\]
+ gpio_defaults_block_17/gpio_defaults_low\[5\]
+ gpio_defaults_block_17/gpio_defaults_high\[6\]
+ gpio_defaults_block_17/gpio_defaults_low\[6\]
+ gpio_defaults_block_17/gpio_defaults_high\[7\]
+ gpio_defaults_block_17/gpio_defaults_high\[8\]
+ gpio_defaults_block_17/gpio_defaults_low\[8\]
+ gpio_defaults_block_17/gpio_defaults_high\[9\]
+ gpio_defaults_block_17/gpio_defaults_low\[9\]
+ gpio_defaults_block_24/gpio_defaults_high\[10\]
+ gpio_defaults_block_24/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[6\]
+ gpio_defaults_block_22/gpio_defaults_low\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[10\]
+ gpio_defaults_block_24/gpio_defaults_high\[11\]
+ gpio_defaults_block_24/gpio_defaults_low\[11\]
+ gpio_defaults_block_24/gpio_defaults_high\[12\]
+ gpio_defaults_block_24/gpio_defaults_low\[12\]
+ gpio_defaults_block_24/gpio_defaults_high\[1\]
+ gpio_defaults_block_24/gpio_defaults_low\[1\]
+ gpio_defaults_block_24/gpio_defaults_high\[2\]
+ gpio_defaults_block_24/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_low\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[4\]
+ gpio_defaults_block_24/gpio_defaults_low\[4\]
+ gpio_defaults_block_24/gpio_defaults_high\[5\]
+ gpio_defaults_block_24/gpio_defaults_low\[5\]
+ gpio_defaults_block_24/gpio_defaults_high\[6\]
+ gpio_defaults_block_24/gpio_defaults_low\[6\]
+ gpio_defaults_block_24/gpio_defaults_high\[7\]
+ gpio_defaults_block_24/gpio_defaults_low\[7\]
+ gpio_defaults_block_24/gpio_defaults_high\[8\]
+ gpio_defaults_block_24/gpio_defaults_low\[8\]
+ gpio_defaults_block_24/gpio_defaults_high\[9\]
+ gpio_defaults_block_24/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_high\[0\]
+ gpio_defaults_block_25/gpio_defaults_low\[0\]
+ gpio_defaults_block_25/gpio_defaults_high\[10\]
+ gpio_defaults_block_25/gpio_defaults_low\[10\]
+ gpio_defaults_block_25/gpio_defaults_high\[11\]
+ gpio_defaults_block_25/gpio_defaults_low\[11\]
+ gpio_defaults_block_25/gpio_defaults_high\[12\]
+ gpio_defaults_block_25/gpio_defaults_low\[12\]
+ gpio_defaults_block_25/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[0\]
+ gpio_defaults_block_22/gpio_defaults_low\[0\]
+ gpio_defaults_block_22/gpio_defaults_high\[10\]
+ gpio_defaults_block_22/gpio_defaults_low\[10\]
+ gpio_defaults_block_22/gpio_defaults_high\[11\]
+ gpio_defaults_block_22/gpio_defaults_low\[11\]
+ gpio_defaults_block_22/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_low\[12\]
+ gpio_defaults_block_22/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_low\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[2\]
+ gpio_defaults_block_22/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[3\]
+ gpio_defaults_block_22/gpio_defaults_low\[3\]
+ gpio_defaults_block_22/gpio_defaults_high\[4\]
+ gpio_defaults_block_22/gpio_defaults_low\[4\]
+ gpio_defaults_block_22/gpio_defaults_high\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[6\]
+ gpio_defaults_block_22/gpio_defaults_high\[7\]
+ gpio_defaults_block_22/gpio_defaults_low\[7\]
+ gpio_defaults_block_22/gpio_defaults_high\[8\]
+ gpio_defaults_block_22/gpio_defaults_low\[8\]
+ gpio_defaults_block_22/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[11\]
+ gpio_defaults_block_23/gpio_defaults_low\[11\]
+ gpio_defaults_block_23/gpio_defaults_high\[12\]
+ gpio_defaults_block_23/gpio_defaults_low\[12\]
+ gpio_defaults_block_23/gpio_defaults_high\[1\]
+ gpio_defaults_block_23/gpio_defaults_low\[1\]
+ gpio_defaults_block_23/gpio_defaults_high\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[3\]
+ gpio_defaults_block_23/gpio_defaults_high\[4\]
+ gpio_defaults_block_23/gpio_defaults_low\[4\]
+ gpio_defaults_block_23/gpio_defaults_high\[5\]
+ gpio_defaults_block_23/gpio_defaults_low\[5\]
+ gpio_defaults_block_23/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_low\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[7\]
+ gpio_defaults_block_23/gpio_defaults_low\[7\]
+ gpio_defaults_block_23/gpio_defaults_high\[8\]
+ gpio_defaults_block_23/gpio_defaults_low\[8\]
+ gpio_defaults_block_23/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_low\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[11\]
+ gpio_defaults_block_28/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_low\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[11\]
+ gpio_defaults_block_27/gpio_defaults_high\[12\]
+ gpio_defaults_block_27/gpio_defaults_low\[12\]
+ gpio_defaults_block_27/gpio_defaults_high\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[3\]
+ gpio_defaults_block_27/gpio_defaults_low\[3\]
+ gpio_defaults_block_27/gpio_defaults_high\[4\]
+ gpio_defaults_block_27/gpio_defaults_high\[5\]
+ gpio_defaults_block_27/gpio_defaults_low\[5\]
+ gpio_defaults_block_27/gpio_defaults_high\[6\]
+ gpio_defaults_block_27/gpio_defaults_low\[6\]
+ gpio_defaults_block_27/gpio_defaults_high\[7\]
+ gpio_defaults_block_27/gpio_defaults_low\[7\]
+ gpio_defaults_block_27/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_high\[0\]
+ gpio_defaults_block_28/gpio_defaults_low\[0\]
+ gpio_defaults_block_28/gpio_defaults_high\[10\]
+ gpio_defaults_block_28/gpio_defaults_low\[10\]
+ gpio_defaults_block_28/gpio_defaults_high\[11\]
+ gpio_defaults_block_28/gpio_defaults_high\[12\]
+ gpio_defaults_block_28/gpio_defaults_low\[12\]
+ gpio_defaults_block_28/gpio_defaults_high\[1\]
+ gpio_defaults_block_28/gpio_defaults_low\[1\]
+ gpio_defaults_block_28/gpio_defaults_high\[2\]
+ gpio_defaults_block_28/gpio_defaults_low\[2\]
+ gpio_defaults_block_28/gpio_defaults_high\[3\]
+ gpio_defaults_block_28/gpio_defaults_low\[3\]
+ gpio_defaults_block_28/gpio_defaults_high\[4\]
+ gpio_defaults_block_28/gpio_defaults_low\[4\]
+ gpio_defaults_block_28/gpio_defaults_high\[5\]
+ gpio_defaults_block_28/gpio_defaults_high\[6\]
+ gpio_defaults_block_28/gpio_defaults_low\[6\]
+ gpio_defaults_block_28/gpio_defaults_high\[7\]
+ gpio_defaults_block_28/gpio_defaults_low\[7\]
+ gpio_defaults_block_28/gpio_defaults_high\[8\]
+ gpio_defaults_block_28/gpio_defaults_low\[8\]
+ gpio_defaults_block_28/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[1\]
+ gpio_defaults_block_25/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_low\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[3\]
+ gpio_defaults_block_25/gpio_defaults_low\[3\]
+ gpio_defaults_block_25/gpio_defaults_high\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_high\[6\]
+ gpio_defaults_block_25/gpio_defaults_low\[6\]
+ gpio_defaults_block_25/gpio_defaults_high\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[8\]
+ gpio_defaults_block_25/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[10\]
+ gpio_defaults_block_26/gpio_defaults_low\[10\]
+ gpio_defaults_block_26/gpio_defaults_high\[11\]
+ gpio_defaults_block_26/gpio_defaults_low\[11\]
+ gpio_defaults_block_26/gpio_defaults_high\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[2\]
+ gpio_defaults_block_26/gpio_defaults_high\[3\]
+ gpio_defaults_block_26/gpio_defaults_low\[3\]
+ gpio_defaults_block_26/gpio_defaults_high\[4\]
+ gpio_defaults_block_26/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[5\]
+ gpio_defaults_block_26/gpio_defaults_low\[5\]
+ gpio_defaults_block_26/gpio_defaults_high\[6\]
+ gpio_defaults_block_26/gpio_defaults_low\[6\]
+ gpio_defaults_block_26/gpio_defaults_high\[7\]
+ gpio_defaults_block_26/gpio_defaults_low\[7\]
+ gpio_defaults_block_26/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_high\[0\]
+ gpio_defaults_block_27/gpio_defaults_low\[0\]
+ gpio_defaults_block_27/gpio_defaults_high\[10\]
+ gpio_defaults_block_27/gpio_defaults_low\[10\]
+ gpio_defaults_block_27/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[2\]
+ gpio_defaults_block_30/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[9\]
+ gpio_defaults_block_3/gpio_defaults_low\[2\]
+ gpio_defaults_block_3/gpio_defaults_low\[9\]
+ gpio_defaults_block_30/gpio_defaults_high\[0\]
+ gpio_defaults_block_30/gpio_defaults_low\[0\]
+ gpio_defaults_block_30/gpio_defaults_high\[10\]
+ gpio_defaults_block_30/gpio_defaults_low\[10\]
+ gpio_defaults_block_30/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_low\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[12\]
+ gpio_defaults_block_30/gpio_defaults_low\[12\]
+ gpio_defaults_block_30/gpio_defaults_high\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[2\]
+ gpio_defaults_block_30/gpio_defaults_high\[3\]
+ gpio_defaults_block_30/gpio_defaults_low\[3\]
+ gpio_defaults_block_30/gpio_defaults_high\[4\]
+ gpio_defaults_block_30/gpio_defaults_low\[4\]
+ gpio_defaults_block_30/gpio_defaults_high\[5\]
+ gpio_defaults_block_30/gpio_defaults_low\[5\]
+ gpio_defaults_block_30/gpio_defaults_high\[6\]
+ gpio_defaults_block_30/gpio_defaults_low\[6\]
+ gpio_defaults_block_30/gpio_defaults_high\[7\]
+ gpio_defaults_block_30/gpio_defaults_low\[7\]
+ gpio_defaults_block_30/gpio_defaults_high\[8\]
+ gpio_defaults_block_30/gpio_defaults_low\[8\]
+ gpio_defaults_block_30/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[0\]
+ gpio_defaults_block_31/gpio_defaults_low\[0\]
+ gpio_defaults_block_31/gpio_defaults_high\[10\]
+ gpio_defaults_block_31/gpio_defaults_low\[10\]
+ gpio_defaults_block_31/gpio_defaults_high\[11\]
+ gpio_defaults_block_31/gpio_defaults_high\[12\]
+ gpio_defaults_block_31/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[0\]
+ gpio_defaults_block_29/gpio_defaults_low\[0\]
+ gpio_defaults_block_29/gpio_defaults_high\[10\]
+ gpio_defaults_block_29/gpio_defaults_low\[10\]
+ gpio_defaults_block_29/gpio_defaults_high\[11\]
+ gpio_defaults_block_29/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[1\]
+ gpio_defaults_block_29/gpio_defaults_low\[1\]
+ gpio_defaults_block_29/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_low\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[3\]
+ gpio_defaults_block_29/gpio_defaults_low\[3\]
+ gpio_defaults_block_29/gpio_defaults_high\[4\]
+ gpio_defaults_block_29/gpio_defaults_low\[4\]
+ gpio_defaults_block_29/gpio_defaults_high\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[6\]
+ gpio_defaults_block_29/gpio_defaults_low\[6\]
+ gpio_defaults_block_29/gpio_defaults_high\[7\]
+ gpio_defaults_block_29/gpio_defaults_low\[7\]
+ gpio_defaults_block_29/gpio_defaults_high\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[9\]
+ gpio_defaults_block_3/gpio_defaults_high\[0\]
+ gpio_defaults_block_3/gpio_defaults_low\[0\]
+ gpio_defaults_block_3/gpio_defaults_high\[10\]
+ gpio_defaults_block_3/gpio_defaults_low\[10\]
+ gpio_defaults_block_3/gpio_defaults_high\[11\]
+ gpio_defaults_block_3/gpio_defaults_low\[11\]
+ gpio_defaults_block_3/gpio_defaults_high\[12\]
+ gpio_defaults_block_3/gpio_defaults_low\[12\]
+ gpio_defaults_block_3/gpio_defaults_high\[1\]
+ gpio_defaults_block_3/gpio_defaults_low\[1\]
+ gpio_defaults_block_3/gpio_defaults_high\[2\]
+ gpio_defaults_block_3/gpio_defaults_high\[3\]
+ gpio_defaults_block_3/gpio_defaults_low\[3\]
+ gpio_defaults_block_3/gpio_defaults_high\[4\]
+ gpio_defaults_block_3/gpio_defaults_low\[4\]
+ gpio_defaults_block_3/gpio_defaults_high\[5\]
+ gpio_defaults_block_3/gpio_defaults_low\[5\]
+ gpio_defaults_block_3/gpio_defaults_high\[6\]
+ gpio_defaults_block_3/gpio_defaults_low\[6\]
+ gpio_defaults_block_3/gpio_defaults_high\[7\]
+ gpio_defaults_block_3/gpio_defaults_low\[7\]
+ gpio_defaults_block_3/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_low\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[4\]
+ gpio_defaults_block_31/gpio_defaults_low\[7\]
+ gpio_defaults_block_31/gpio_defaults_low\[9\]
+ gpio_defaults_block_32/gpio_defaults_high\[0\]
+ gpio_defaults_block_32/gpio_defaults_low\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_high\[11\]
+ gpio_defaults_block_33/gpio_defaults_low\[11\]
+ gpio_defaults_block_33/gpio_defaults_high\[12\]
+ gpio_defaults_block_33/gpio_defaults_low\[12\]
+ gpio_defaults_block_33/gpio_defaults_high\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[2\]
+ gpio_defaults_block_33/gpio_defaults_low\[2\]
+ gpio_defaults_block_33/gpio_defaults_high\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[4\]
+ gpio_defaults_block_33/gpio_defaults_high\[5\]
+ gpio_defaults_block_33/gpio_defaults_low\[5\]
+ gpio_defaults_block_33/gpio_defaults_high\[6\]
+ gpio_defaults_block_33/gpio_defaults_low\[6\]
+ gpio_defaults_block_33/gpio_defaults_high\[7\]
+ gpio_defaults_block_33/gpio_defaults_low\[7\]
+ gpio_defaults_block_33/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[0\]
+ gpio_defaults_block_34/gpio_defaults_low\[0\]
+ gpio_defaults_block_34/gpio_defaults_high\[10\]
+ gpio_defaults_block_34/gpio_defaults_low\[10\]
+ gpio_defaults_block_34/gpio_defaults_high\[11\]
+ gpio_defaults_block_34/gpio_defaults_low\[11\]
+ gpio_defaults_block_34/gpio_defaults_high\[12\]
+ gpio_defaults_block_34/gpio_defaults_low\[12\]
+ gpio_defaults_block_34/gpio_defaults_high\[1\]
+ gpio_defaults_block_34/gpio_defaults_low\[1\]
+ gpio_defaults_block_34/gpio_defaults_high\[2\]
+ gpio_defaults_block_34/gpio_defaults_low\[2\]
+ gpio_defaults_block_34/gpio_defaults_high\[3\]
+ gpio_defaults_block_34/gpio_defaults_low\[3\]
+ gpio_defaults_block_34/gpio_defaults_high\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[5\]
+ gpio_defaults_block_34/gpio_defaults_high\[6\]
+ gpio_defaults_block_34/gpio_defaults_low\[6\]
+ gpio_defaults_block_34/gpio_defaults_high\[7\]
+ gpio_defaults_block_34/gpio_defaults_low\[7\]
+ gpio_defaults_block_34/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_low\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[1\]
+ gpio_defaults_block_31/gpio_defaults_low\[1\]
+ gpio_defaults_block_31/gpio_defaults_high\[2\]
+ gpio_defaults_block_31/gpio_defaults_low\[2\]
+ gpio_defaults_block_31/gpio_defaults_high\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[4\]
+ gpio_defaults_block_31/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_low\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[6\]
+ gpio_defaults_block_31/gpio_defaults_low\[6\]
+ gpio_defaults_block_31/gpio_defaults_high\[7\]
+ gpio_defaults_block_31/gpio_defaults_high\[8\]
+ gpio_defaults_block_31/gpio_defaults_low\[8\]
+ gpio_defaults_block_31/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[0\]
+ gpio_defaults_block_32/gpio_defaults_high\[10\]
+ gpio_defaults_block_32/gpio_defaults_low\[10\]
+ gpio_defaults_block_32/gpio_defaults_high\[11\]
+ gpio_defaults_block_32/gpio_defaults_low\[11\]
+ gpio_defaults_block_32/gpio_defaults_high\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[1\]
+ gpio_defaults_block_32/gpio_defaults_high\[2\]
+ gpio_defaults_block_32/gpio_defaults_low\[2\]
+ gpio_defaults_block_32/gpio_defaults_high\[3\]
+ gpio_defaults_block_32/gpio_defaults_low\[3\]
+ gpio_defaults_block_32/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[5\]
+ gpio_defaults_block_32/gpio_defaults_low\[5\]
+ gpio_defaults_block_32/gpio_defaults_high\[6\]
+ gpio_defaults_block_32/gpio_defaults_low\[6\]
+ gpio_defaults_block_32/gpio_defaults_high\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[8\]
+ gpio_defaults_block_32/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[0\]
+ gpio_defaults_block_33/gpio_defaults_low\[0\]
+ gpio_defaults_block_33/gpio_defaults_high\[10\]
+ gpio_defaults_block_33/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[0\]
+ gpio_defaults_block_37/gpio_defaults_low\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_high\[5\]
+ gpio_defaults_block_35/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[9\]
+ gpio_defaults_block_37/gpio_defaults_high\[0\]
+ gpio_defaults_block_37/gpio_defaults_high\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_high\[11\]
+ gpio_defaults_block_37/gpio_defaults_low\[11\]
+ gpio_defaults_block_37/gpio_defaults_high\[12\]
+ gpio_defaults_block_37/gpio_defaults_low\[12\]
+ gpio_defaults_block_37/gpio_defaults_high\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[2\]
+ gpio_defaults_block_37/gpio_defaults_low\[2\]
+ gpio_defaults_block_37/gpio_defaults_high\[3\]
+ gpio_defaults_block_37/gpio_defaults_low\[3\]
+ gpio_defaults_block_37/gpio_defaults_high\[4\]
+ gpio_defaults_block_37/gpio_defaults_low\[4\]
+ gpio_defaults_block_37/gpio_defaults_high\[5\]
+ gpio_defaults_block_37/gpio_defaults_low\[5\]
+ gpio_defaults_block_37/gpio_defaults_high\[6\]
+ gpio_defaults_block_37/gpio_defaults_low\[6\]
+ gpio_defaults_block_37/gpio_defaults_high\[7\]
+ gpio_defaults_block_37/gpio_defaults_low\[7\]
+ gpio_defaults_block_37/gpio_defaults_high\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_high\[0\]
+ gpio_defaults_block_4/gpio_defaults_low\[0\]
+ gpio_defaults_block_4/gpio_defaults_high\[10\]
+ gpio_defaults_block_4/gpio_defaults_low\[10\]
+ gpio_defaults_block_4/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_low\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[0\]
+ gpio_defaults_block_35/gpio_defaults_low\[0\]
+ gpio_defaults_block_35/gpio_defaults_high\[10\]
+ gpio_defaults_block_35/gpio_defaults_low\[10\]
+ gpio_defaults_block_35/gpio_defaults_high\[11\]
+ gpio_defaults_block_35/gpio_defaults_low\[11\]
+ gpio_defaults_block_35/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_low\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[1\]
+ gpio_defaults_block_35/gpio_defaults_low\[1\]
+ gpio_defaults_block_35/gpio_defaults_high\[2\]
+ gpio_defaults_block_35/gpio_defaults_low\[2\]
+ gpio_defaults_block_35/gpio_defaults_high\[3\]
+ gpio_defaults_block_35/gpio_defaults_low\[3\]
+ gpio_defaults_block_35/gpio_defaults_high\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[5\]
+ gpio_defaults_block_35/gpio_defaults_high\[6\]
+ gpio_defaults_block_35/gpio_defaults_low\[6\]
+ gpio_defaults_block_35/gpio_defaults_high\[7\]
+ gpio_defaults_block_35/gpio_defaults_low\[7\]
+ gpio_defaults_block_35/gpio_defaults_high\[8\]
+ gpio_defaults_block_35/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_low\[9\]
+ gpio_defaults_block_36/gpio_defaults_high\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[10\]
+ gpio_defaults_block_36/gpio_defaults_low\[10\]
+ gpio_defaults_block_36/gpio_defaults_high\[11\]
+ gpio_defaults_block_36/gpio_defaults_low\[11\]
+ gpio_defaults_block_36/gpio_defaults_high\[12\]
+ gpio_defaults_block_36/gpio_defaults_low\[12\]
+ gpio_defaults_block_36/gpio_defaults_high\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[3\]
+ gpio_defaults_block_36/gpio_defaults_low\[3\]
+ gpio_defaults_block_36/gpio_defaults_high\[4\]
+ gpio_defaults_block_36/gpio_defaults_low\[4\]
+ gpio_defaults_block_36/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_low\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[6\]
+ gpio_defaults_block_36/gpio_defaults_low\[6\]
+ gpio_defaults_block_36/gpio_defaults_high\[7\]
+ gpio_defaults_block_36/gpio_defaults_low\[7\]
+ gpio_defaults_block_36/gpio_defaults_high\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[11\]
+ gpio_defaults_block_7/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[11\]
+ gpio_defaults_block_6/gpio_defaults_low\[11\]
+ gpio_defaults_block_6/gpio_defaults_high\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[2\]
+ gpio_defaults_block_6/gpio_defaults_low\[2\]
+ gpio_defaults_block_6/gpio_defaults_high\[3\]
+ gpio_defaults_block_6/gpio_defaults_high\[4\]
+ gpio_defaults_block_6/gpio_defaults_low\[4\]
+ gpio_defaults_block_6/gpio_defaults_high\[5\]
+ gpio_defaults_block_6/gpio_defaults_low\[5\]
+ gpio_defaults_block_6/gpio_defaults_high\[6\]
+ gpio_defaults_block_6/gpio_defaults_low\[6\]
+ gpio_defaults_block_6/gpio_defaults_high\[7\]
+ gpio_defaults_block_6/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[8\]
+ gpio_defaults_block_6/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[9\]
+ gpio_defaults_block_7/gpio_defaults_high\[0\]
+ gpio_defaults_block_7/gpio_defaults_low\[0\]
+ gpio_defaults_block_7/gpio_defaults_high\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[11\]
+ gpio_defaults_block_7/gpio_defaults_high\[12\]
+ gpio_defaults_block_7/gpio_defaults_low\[12\]
+ gpio_defaults_block_7/gpio_defaults_high\[1\]
+ gpio_defaults_block_7/gpio_defaults_low\[1\]
+ gpio_defaults_block_7/gpio_defaults_high\[2\]
+ gpio_defaults_block_7/gpio_defaults_low\[2\]
+ gpio_defaults_block_7/gpio_defaults_high\[3\]
+ gpio_defaults_block_7/gpio_defaults_low\[3\]
+ gpio_defaults_block_7/gpio_defaults_high\[4\]
+ gpio_defaults_block_7/gpio_defaults_high\[5\]
+ gpio_defaults_block_7/gpio_defaults_low\[5\]
+ gpio_defaults_block_7/gpio_defaults_high\[6\]
+ gpio_defaults_block_7/gpio_defaults_low\[6\]
+ gpio_defaults_block_7/gpio_defaults_high\[7\]
+ gpio_defaults_block_7/gpio_defaults_low\[7\]
+ gpio_defaults_block_7/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[9\]
+ gpio_defaults_block_7/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_low\[12\]
+ gpio_defaults_block_4/gpio_defaults_high\[1\]
+ gpio_defaults_block_4/gpio_defaults_low\[1\]
+ gpio_defaults_block_4/gpio_defaults_high\[2\]
+ gpio_defaults_block_4/gpio_defaults_low\[2\]
+ gpio_defaults_block_4/gpio_defaults_high\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_high\[5\]
+ gpio_defaults_block_4/gpio_defaults_low\[5\]
+ gpio_defaults_block_4/gpio_defaults_high\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[9\]
+ gpio_defaults_block_5/gpio_defaults_high\[0\]
+ gpio_defaults_block_5/gpio_defaults_low\[0\]
+ gpio_defaults_block_5/gpio_defaults_high\[10\]
+ gpio_defaults_block_5/gpio_defaults_low\[10\]
+ gpio_defaults_block_5/gpio_defaults_high\[11\]
+ gpio_defaults_block_5/gpio_defaults_low\[11\]
+ gpio_defaults_block_5/gpio_defaults_high\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[1\]
+ gpio_defaults_block_5/gpio_defaults_high\[2\]
+ gpio_defaults_block_5/gpio_defaults_low\[2\]
+ gpio_defaults_block_5/gpio_defaults_high\[3\]
+ gpio_defaults_block_5/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[4\]
+ gpio_defaults_block_5/gpio_defaults_low\[4\]
+ gpio_defaults_block_5/gpio_defaults_high\[5\]
+ gpio_defaults_block_5/gpio_defaults_low\[5\]
+ gpio_defaults_block_5/gpio_defaults_high\[6\]
+ gpio_defaults_block_5/gpio_defaults_low\[6\]
+ gpio_defaults_block_5/gpio_defaults_high\[7\]
+ gpio_defaults_block_5/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_low\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[0\]
+ gpio_defaults_block_6/gpio_defaults_low\[0\]
+ gpio_defaults_block_6/gpio_defaults_high\[10\]
+ gpio_defaults_block_6/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[11\]
+ gpio_defaults_block_8/gpio_defaults_low\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[8\]
+ gpio_defaults_block_8/gpio_defaults_low\[9\]
+ gpio_defaults_block_9/gpio_defaults_high\[0\]
+ gpio_defaults_block_9/gpio_defaults_low\[1\]
+ gpio_defaults_block_9/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[0\]
+ gpio_defaults_block_8/gpio_defaults_low\[0\]
+ gpio_defaults_block_8/gpio_defaults_high\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[11\]
+ gpio_defaults_block_8/gpio_defaults_high\[12\]
+ gpio_defaults_block_8/gpio_defaults_low\[12\]
+ gpio_defaults_block_8/gpio_defaults_high\[1\]
+ gpio_defaults_block_8/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[2\]
+ gpio_defaults_block_8/gpio_defaults_low\[2\]
+ gpio_defaults_block_8/gpio_defaults_high\[3\]
+ gpio_defaults_block_8/gpio_defaults_low\[3\]
+ gpio_defaults_block_8/gpio_defaults_high\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[5\]
+ gpio_defaults_block_8/gpio_defaults_low\[5\]
+ gpio_defaults_block_8/gpio_defaults_high\[6\]
+ gpio_defaults_block_8/gpio_defaults_low\[6\]
+ gpio_defaults_block_8/gpio_defaults_high\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[0\]
+ gpio_defaults_block_9/gpio_defaults_high\[10\]
+ gpio_defaults_block_9/gpio_defaults_low\[10\]
+ gpio_defaults_block_9/gpio_defaults_high\[11\]
+ gpio_defaults_block_9/gpio_defaults_low\[11\]
+ gpio_defaults_block_9/gpio_defaults_high\[12\]
+ gpio_defaults_block_9/gpio_defaults_low\[12\]
+ gpio_defaults_block_9/gpio_defaults_high\[1\]
+ gpio_defaults_block_9/gpio_defaults_high\[2\]
+ gpio_defaults_block_9/gpio_defaults_low\[2\]
+ gpio_defaults_block_9/gpio_defaults_high\[3\]
+ gpio_defaults_block_9/gpio_defaults_low\[3\]
+ gpio_defaults_block_9/gpio_defaults_high\[4\]
+ gpio_defaults_block_9/gpio_defaults_low\[4\]
+ gpio_defaults_block_9/gpio_defaults_high\[5\]
+ gpio_defaults_block_9/gpio_defaults_low\[5\]
+ gpio_defaults_block_9/gpio_defaults_high\[6\]
+ gpio_defaults_block_9/gpio_defaults_low\[6\]
+ gpio_defaults_block_9/gpio_defaults_high\[7\]
+ gpio_defaults_block_9/gpio_defaults_low\[7\]
+ gpio_defaults_block_9/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[9\]
+ padframe/flash_io1_di_core
+ padframe/clock_core
+ padframe/mprj_analog_io[6]
+ padframe/gpio_in_core
+ padframe/flash_io1
+ padframe/mprj_analog_io[27]
+ padframe/mprj_analog_io[28]
+ padframe/mprj_analog_io[24]
+ padframe/mprj_analog_io[25]
+ padframe/mprj_analog_io[5]
+ padframe/mprj_analog_io[8]
+ padframe/mprj_analog_io[12]
+ padframe/mprj_analog_io[11]
+ padframe/mprj_analog_io[10]
+ padframe/mprj_analog_io[14]
+ padframe/mprj_analog_io[16]
+ padframe/mprj_analog_io[15]
+ padframe/mprj_analog_io[17]
+ padframe/mprj_analog_io[19]
+ padframe/mprj_analog_io[21]
+ padframe/mprj_analog_io[22]
+ padframe/mprj_analog_io[23]
+ padframe/mprj_io[28]
+ padframe/gpio
+ padframe/mprj_io[34]
+ padframe/flash_csb
+ padframe/mprj_analog_io[18]
+ padframe/mprj_analog_io[13]
+ padframe/mprj_io[8]
+ padframe/mprj_io[10]
+ padframe/mprj_io[21]
+ padframe/mprj_io[22]
+ padframe/clock
+ padframe/mprj_io[25]
+ padframe/mprj_analog_io[2]
+ padframe/mprj_io[17]
+ mprj/mprj/p[5]
+ padframe/mprj_io[0]
+ mprj/mprj/p[7]
+ mprj/mprj/p[6]
+ mprj/mprj/p[4]
+ padframe/mprj_io[9]
+ padframe/mprj_io[11]
+ padframe/mprj_io[33]
+ mgmt_buffers/mprj2_logic_high_inst/HI
+ mgmt_buffers/mprj_logic_high_inst/HI[462]
+ mgmt_buffers/mprj_logic_high_inst/HI[461]
+ mgmt_buffers/mprj_logic_high_inst/HI[460]
+ mgmt_buffers/mprj_logic_high_inst/HI[459]
+ mgmt_buffers/mprj_logic_high_inst/HI[458]
+ mgmt_buffers/mprj_logic_high_inst/HI[457]
+ mgmt_buffers/mprj_logic_high_inst/HI[456]
+ mgmt_buffers/mprj_logic_high_inst/HI[455]
+ mgmt_buffers/mprj_logic_high_inst/HI[454]
+ mgmt_buffers/mprj_logic_high_inst/HI[453]
+ mgmt_buffers/mprj_logic_high_inst/HI[452]
+ mgmt_buffers/mprj_logic_high_inst/HI[451]
+ mgmt_buffers/mprj_logic_high_inst/HI[450]
+ mgmt_buffers/mprj_logic_high_inst/HI[449]
+ mgmt_buffers/mprj_logic_high_inst/HI[448]
+ mgmt_buffers/mprj_logic_high_inst/HI[447]
+ mgmt_buffers/mprj_logic_high_inst/HI[446]
+ mgmt_buffers/mprj_logic_high_inst/HI[445]
+ mgmt_buffers/mprj_logic_high_inst/HI[444]
+ padframe/mprj_io[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[443]
+ mgmt_buffers/mprj_logic_high_inst/HI[442]
+ mgmt_buffers/mprj_logic_high_inst/HI[441]
+ mgmt_buffers/mprj_logic_high_inst/HI[440]
+ mgmt_buffers/mprj_logic_high_inst/HI[439]
+ mgmt_buffers/mprj_logic_high_inst/HI[438]
+ mgmt_buffers/mprj_logic_high_inst/HI[437]
+ mgmt_buffers/mprj_logic_high_inst/HI[436]
+ mgmt_buffers/mprj_logic_high_inst/HI[435]
+ mgmt_buffers/mprj_logic_high_inst/HI[434]
+ mgmt_buffers/mprj_logic_high_inst/HI[433]
+ mgmt_buffers/mprj_logic_high_inst/HI[432]
+ mgmt_buffers/mprj_logic_high_inst/HI[431]
+ mgmt_buffers/mprj_logic_high_inst/HI[430]
+ mgmt_buffers/mprj_logic_high_inst/HI[429]
+ mgmt_buffers/mprj_logic_high_inst/HI[428]
+ mgmt_buffers/mprj_logic_high_inst/HI[427]
+ mgmt_buffers/mprj_logic_high_inst/HI[426]
+ padframe/mprj_io[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[425]
+ mgmt_buffers/mprj_logic_high_inst/HI[424]
+ mgmt_buffers/mprj_logic_high_inst/HI[423]
+ mgmt_buffers/mprj_logic_high_inst/HI[422]
+ mgmt_buffers/mprj_logic_high_inst/HI[421]
+ mgmt_buffers/mprj_logic_high_inst/HI[420]
+ mgmt_buffers/mprj_logic_high_inst/HI[419]
+ mgmt_buffers/mprj_logic_high_inst/HI[418]
+ mgmt_buffers/mprj_logic_high_inst/HI[417]
+ mgmt_buffers/mprj_logic_high_inst/HI[416]
+ mgmt_buffers/mprj_logic_high_inst/HI[415]
+ mgmt_buffers/mprj_logic_high_inst/HI[414]
+ mgmt_buffers/mprj_logic_high_inst/HI[413]
+ mgmt_buffers/mprj_logic_high_inst/HI[412]
+ mgmt_buffers/mprj_logic_high_inst/HI[411]
+ mgmt_buffers/mprj_logic_high_inst/HI[410]
+ mgmt_buffers/mprj_logic_high_inst/HI[409]
+ mgmt_buffers/mprj_logic_high_inst/HI[408]
+ mgmt_buffers/mprj_logic_high_inst/HI[407]
+ mgmt_buffers/mprj_logic_high_inst/HI[406]
+ mgmt_buffers/mprj_logic_high_inst/HI[405]
+ mgmt_buffers/mprj_logic_high_inst/HI[404]
+ mgmt_buffers/mprj_logic_high_inst/HI[403]
+ mgmt_buffers/mprj_logic_high_inst/HI[402]
+ mgmt_buffers/mprj_logic_high_inst/HI[401]
+ mgmt_buffers/mprj_logic_high_inst/HI[400]
+ mgmt_buffers/mprj_logic_high_inst/HI[399]
+ mgmt_buffers/mprj_logic_high_inst/HI[398]
+ mgmt_buffers/mprj_logic_high_inst/HI[397]
+ mgmt_buffers/mprj_logic_high_inst/HI[396]
+ mgmt_buffers/mprj_logic_high_inst/HI[395]
+ mgmt_buffers/mprj_logic_high_inst/HI[394]
+ mgmt_buffers/mprj_logic_high_inst/HI[393]
+ mgmt_buffers/mprj_logic_high_inst/HI[392]
+ mgmt_buffers/mprj_logic_high_inst/HI[391]
+ mgmt_buffers/mprj_logic_high_inst/HI[390]
+ mgmt_buffers/mprj_logic_high_inst/HI[389]
+ mgmt_buffers/mprj_logic_high_inst/HI[388]
+ mgmt_buffers/mprj_logic_high_inst/HI[387]
+ mgmt_buffers/mprj_logic_high_inst/HI[386]
+ mgmt_buffers/mprj_logic_high_inst/HI[385]
+ mgmt_buffers/mprj_logic_high_inst/HI[384]
+ mgmt_buffers/mprj_logic_high_inst/HI[383]
+ mgmt_buffers/mprj_logic_high_inst/HI[382]
+ mgmt_buffers/mprj_logic_high_inst/HI[381]
+ mgmt_buffers/mprj_logic_high_inst/HI[380]
+ mgmt_buffers/mprj_logic_high_inst/HI[379]
+ mgmt_buffers/mprj_logic_high_inst/HI[378]
+ mgmt_buffers/mprj_logic_high_inst/HI[377]
+ mgmt_buffers/mprj_logic_high_inst/HI[376]
+ mgmt_buffers/mprj_logic_high_inst/HI[375]
+ mgmt_buffers/mprj_logic_high_inst/HI[374]
+ mgmt_buffers/mprj_logic_high_inst/HI[373]
+ mgmt_buffers/mprj_logic_high_inst/HI[372]
+ mgmt_buffers/mprj_logic_high_inst/HI[371]
+ mgmt_buffers/mprj_logic_high_inst/HI[370]
+ mgmt_buffers/mprj_logic_high_inst/HI[369]
+ mgmt_buffers/mprj_logic_high_inst/HI[368]
+ mgmt_buffers/mprj_logic_high_inst/HI[367]
+ mgmt_buffers/mprj_logic_high_inst/HI[366]
+ mgmt_buffers/mprj_logic_high_inst/HI[365]
+ mgmt_buffers/mprj_logic_high_inst/HI[364]
+ mgmt_buffers/mprj_logic_high_inst/HI[363]
+ padframe/mprj_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[362]
+ mgmt_buffers/mprj_logic_high_inst/HI[361]
+ mgmt_buffers/mprj_logic_high_inst/HI[360]
+ mgmt_buffers/mprj_logic_high_inst/HI[359]
+ mgmt_buffers/mprj_logic_high_inst/HI[358]
+ mgmt_buffers/mprj_logic_high_inst/HI[357]
+ mgmt_buffers/mprj_logic_high_inst/HI[356]
+ mgmt_buffers/mprj_logic_high_inst/HI[355]
+ mgmt_buffers/mprj_logic_high_inst/HI[354]
+ mgmt_buffers/mprj_logic_high_inst/HI[353]
+ mgmt_buffers/mprj_logic_high_inst/HI[352]
+ mgmt_buffers/mprj_logic_high_inst/HI[351]
+ mgmt_buffers/mprj_logic_high_inst/HI[350]
+ mgmt_buffers/mprj_logic_high_inst/HI[349]
+ mgmt_buffers/mprj_logic_high_inst/HI[348]
+ mgmt_buffers/mprj_logic_high_inst/HI[347]
+ mgmt_buffers/mprj_logic_high_inst/HI[346]
+ mgmt_buffers/mprj_logic_high_inst/HI[345]
+ mgmt_buffers/mprj_logic_high_inst/HI[344]
+ mgmt_buffers/mprj_logic_high_inst/HI[343]
+ mgmt_buffers/mprj_logic_high_inst/HI[342]
+ mgmt_buffers/mprj_logic_high_inst/HI[341]
+ mgmt_buffers/mprj_logic_high_inst/HI[340]
+ mgmt_buffers/mprj_logic_high_inst/HI[339]
+ mgmt_buffers/mprj_logic_high_inst/HI[338]
+ mgmt_buffers/mprj_logic_high_inst/HI[337]
+ mgmt_buffers/mprj_logic_high_inst/HI[336]
+ mgmt_buffers/mprj_logic_high_inst/HI[335]
+ mgmt_buffers/mprj_logic_high_inst/HI[334]
+ mgmt_buffers/mprj_logic_high_inst/HI[333]
+ mgmt_buffers/mprj_logic_high_inst/HI[332]
+ mgmt_buffers/mprj_logic_high_inst/HI[331]
+ mgmt_buffers/mprj_logic_high_inst/HI[330]
+ mgmt_buffers/mprj_logic_high_inst/HI[329]
+ mgmt_buffers/mprj_logic_high_inst/HI[328]
+ mgmt_buffers/mprj_logic_high_inst/HI[327]
+ mgmt_buffers/mprj_logic_high_inst/HI[326]
+ mgmt_buffers/mprj_logic_high_inst/HI[325]
+ mgmt_buffers/mprj_logic_high_inst/HI[324]
+ mgmt_buffers/mprj_logic_high_inst/HI[323]
+ mgmt_buffers/mprj_logic_high_inst/HI[322]
+ padframe/mprj_io[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[321]
+ mgmt_buffers/mprj_logic_high_inst/HI[320]
+ mgmt_buffers/mprj_logic_high_inst/HI[319]
+ mgmt_buffers/mprj_logic_high_inst/HI[318]
+ mgmt_buffers/mprj_logic_high_inst/HI[317]
+ mgmt_buffers/mprj_logic_high_inst/HI[316]
+ mgmt_buffers/mprj_logic_high_inst/HI[315]
+ mgmt_buffers/mprj_logic_high_inst/HI[314]
+ mgmt_buffers/mprj_logic_high_inst/HI[313]
+ mgmt_buffers/mprj_logic_high_inst/HI[312]
+ mgmt_buffers/mprj_logic_high_inst/HI[311]
+ mgmt_buffers/mprj_logic_high_inst/HI[310]
+ mgmt_buffers/mprj_logic_high_inst/HI[309]
+ mgmt_buffers/mprj_logic_high_inst/HI[308]
+ mgmt_buffers/mprj_logic_high_inst/HI[307]
+ mgmt_buffers/mprj_logic_high_inst/HI[306]
+ mgmt_buffers/mprj_logic_high_inst/HI[305]
+ mgmt_buffers/mprj_logic_high_inst/HI[304]
+ mgmt_buffers/mprj_logic_high_inst/HI[303]
+ mgmt_buffers/mprj_logic_high_inst/HI[302]
+ mgmt_buffers/mprj_logic_high_inst/HI[301]
+ mgmt_buffers/mprj_logic_high_inst/HI[300]
+ mgmt_buffers/mprj_logic_high_inst/HI[299]
+ mgmt_buffers/mprj_logic_high_inst/HI[298]
+ mgmt_buffers/mprj_logic_high_inst/HI[297]
+ mgmt_buffers/mprj_logic_high_inst/HI[296]
+ mgmt_buffers/mprj_logic_high_inst/HI[295]
+ mgmt_buffers/mprj_logic_high_inst/HI[294]
+ mgmt_buffers/mprj_logic_high_inst/HI[293]
+ mgmt_buffers/mprj_logic_high_inst/HI[292]
+ mgmt_buffers/mprj_logic_high_inst/HI[291]
+ padframe/mprj_analog_io[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[290]
+ mgmt_buffers/mprj_logic_high_inst/HI[289]
+ mgmt_buffers/mprj_logic_high_inst/HI[288]
+ mgmt_buffers/mprj_logic_high_inst/HI[287]
+ mgmt_buffers/mprj_logic_high_inst/HI[286]
+ mgmt_buffers/mprj_logic_high_inst/HI[285]
+ mgmt_buffers/mprj_logic_high_inst/HI[284]
+ mgmt_buffers/mprj_logic_high_inst/HI[283]
+ mgmt_buffers/mprj_logic_high_inst/HI[282]
+ mgmt_buffers/mprj_logic_high_inst/HI[281]
+ mgmt_buffers/mprj_logic_high_inst/HI[280]
+ mgmt_buffers/mprj_logic_high_inst/HI[279]
+ mgmt_buffers/mprj_logic_high_inst/HI[278]
+ mgmt_buffers/mprj_logic_high_inst/HI[277]
+ mgmt_buffers/mprj_logic_high_inst/HI[276]
+ mgmt_buffers/mprj_logic_high_inst/HI[275]
+ mgmt_buffers/mprj_logic_high_inst/HI[274]
+ mgmt_buffers/mprj_logic_high_inst/HI[273]
+ mgmt_buffers/mprj_logic_high_inst/HI[272]
+ mgmt_buffers/mprj_logic_high_inst/HI[271]
+ mgmt_buffers/mprj_logic_high_inst/HI[270]
+ mgmt_buffers/mprj_logic_high_inst/HI[269]
+ padframe/mprj_analog_io[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[268]
+ mgmt_buffers/mprj_logic_high_inst/HI[267]
+ mgmt_buffers/mprj_logic_high_inst/HI[266]
+ mgmt_buffers/mprj_logic_high_inst/HI[265]
+ mgmt_buffers/mprj_logic_high_inst/HI[264]
+ mgmt_buffers/mprj_logic_high_inst/HI[263]
+ mgmt_buffers/mprj_logic_high_inst/HI[262]
+ mgmt_buffers/mprj_logic_high_inst/HI[261]
+ mgmt_buffers/mprj_logic_high_inst/HI[260]
+ mgmt_buffers/mprj_logic_high_inst/HI[259]
+ mgmt_buffers/mprj_logic_high_inst/HI[258]
+ mgmt_buffers/mprj_logic_high_inst/HI[257]
+ mgmt_buffers/mprj_logic_high_inst/HI[256]
+ mgmt_buffers/mprj_logic_high_inst/HI[255]
+ mgmt_buffers/mprj_logic_high_inst/HI[254]
+ mgmt_buffers/mprj_logic_high_inst/HI[253]
+ mgmt_buffers/mprj_logic_high_inst/HI[252]
+ mgmt_buffers/mprj_logic_high_inst/HI[251]
+ mgmt_buffers/mprj_logic_high_inst/HI[250]
+ mgmt_buffers/mprj_logic_high_inst/HI[249]
+ mgmt_buffers/mprj_logic_high_inst/HI[248]
+ mgmt_buffers/mprj_logic_high_inst/HI[247]
+ mgmt_buffers/mprj_logic_high_inst/HI[246]
+ mgmt_buffers/mprj_logic_high_inst/HI[245]
+ mgmt_buffers/mprj_logic_high_inst/HI[244]
+ mgmt_buffers/mprj_logic_high_inst/HI[243]
+ mgmt_buffers/mprj_logic_high_inst/HI[242]
+ mgmt_buffers/mprj_logic_high_inst/HI[241]
+ mgmt_buffers/mprj_logic_high_inst/HI[240]
+ mgmt_buffers/mprj_logic_high_inst/HI[239]
+ mgmt_buffers/mprj_logic_high_inst/HI[238]
+ mgmt_buffers/mprj_logic_high_inst/HI[237]
+ mgmt_buffers/mprj_logic_high_inst/HI[236]
+ mgmt_buffers/mprj_logic_high_inst/HI[235]
+ mgmt_buffers/mprj_logic_high_inst/HI[234]
+ mgmt_buffers/mprj_logic_high_inst/HI[233]
+ mgmt_buffers/mprj_logic_high_inst/HI[232]
+ mgmt_buffers/mprj_logic_high_inst/HI[231]
+ mgmt_buffers/mprj_logic_high_inst/HI[230]
+ mgmt_buffers/mprj_logic_high_inst/HI[229]
+ mgmt_buffers/mprj_logic_high_inst/HI[228]
+ padframe/mprj_analog_io[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[227]
+ mgmt_buffers/mprj_logic_high_inst/HI[226]
+ mgmt_buffers/mprj_logic_high_inst/HI[225]
+ mgmt_buffers/mprj_logic_high_inst/HI[224]
+ mgmt_buffers/mprj_logic_high_inst/HI[223]
+ mgmt_buffers/mprj_logic_high_inst/HI[222]
+ mgmt_buffers/mprj_logic_high_inst/HI[221]
+ mgmt_buffers/mprj_logic_high_inst/HI[220]
+ mgmt_buffers/mprj_logic_high_inst/HI[219]
+ mgmt_buffers/mprj_logic_high_inst/HI[218]
+ mgmt_buffers/mprj_logic_high_inst/HI[217]
+ mgmt_buffers/mprj_logic_high_inst/HI[216]
+ mgmt_buffers/mprj_logic_high_inst/HI[215]
+ mgmt_buffers/mprj_logic_high_inst/HI[214]
+ mgmt_buffers/mprj_logic_high_inst/HI[213]
+ mgmt_buffers/mprj_logic_high_inst/HI[212]
+ mgmt_buffers/mprj_logic_high_inst/HI[211]
+ mgmt_buffers/mprj_logic_high_inst/HI[210]
+ mgmt_buffers/mprj_logic_high_inst/HI[209]
+ mgmt_buffers/mprj_logic_high_inst/HI[208]
+ mgmt_buffers/mprj_logic_high_inst/HI[207]
+ mgmt_buffers/mprj_logic_high_inst/HI[206]
+ mgmt_buffers/mprj_logic_high_inst/HI[205]
+ mgmt_buffers/mprj_logic_high_inst/HI[204]
+ mgmt_buffers/mprj_logic_high_inst/HI[203]
+ mgmt_buffers/mprj_logic_high_inst/HI[202]
+ mgmt_buffers/mprj_logic_high_inst/HI[201]
+ mgmt_buffers/mprj_logic_high_inst/HI[200]
+ mgmt_buffers/mprj_logic_high_inst/HI[199]
+ mgmt_buffers/mprj_logic_high_inst/HI[198]
+ mgmt_buffers/mprj_logic_high_inst/HI[197]
+ mgmt_buffers/mprj_logic_high_inst/HI[196]
+ mgmt_buffers/mprj_logic_high_inst/HI[195]
+ mgmt_buffers/mprj_logic_high_inst/HI[194]
+ mgmt_buffers/mprj_logic_high_inst/HI[193]
+ mgmt_buffers/mprj_logic_high_inst/HI[192]
+ mgmt_buffers/mprj_logic_high_inst/HI[191]
+ mgmt_buffers/mprj_logic_high_inst/HI[190]
+ mgmt_buffers/mprj_logic_high_inst/HI[189]
+ mgmt_buffers/mprj_logic_high_inst/HI[188]
+ padframe/mprj_io[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[187]
+ mgmt_buffers/mprj_logic_high_inst/HI[186]
+ mgmt_buffers/mprj_logic_high_inst/HI[185]
+ mgmt_buffers/mprj_logic_high_inst/HI[184]
+ mgmt_buffers/mprj_logic_high_inst/HI[183]
+ mgmt_buffers/mprj_logic_high_inst/HI[182]
+ mgmt_buffers/mprj_logic_high_inst/HI[181]
+ mgmt_buffers/mprj_logic_high_inst/HI[180]
+ mgmt_buffers/mprj_logic_high_inst/HI[179]
+ mgmt_buffers/mprj_logic_high_inst/HI[178]
+ mgmt_buffers/mprj_logic_high_inst/HI[177]
+ mgmt_buffers/mprj_logic_high_inst/HI[176]
+ mgmt_buffers/mprj_logic_high_inst/HI[175]
+ mgmt_buffers/mprj_logic_high_inst/HI[174]
+ mgmt_buffers/mprj_logic_high_inst/HI[173]
+ mgmt_buffers/mprj_logic_high_inst/HI[172]
+ mgmt_buffers/mprj_logic_high_inst/HI[171]
+ mgmt_buffers/mprj_logic_high_inst/HI[170]
+ mgmt_buffers/mprj_logic_high_inst/HI[169]
+ mgmt_buffers/mprj_logic_high_inst/HI[168]
+ mgmt_buffers/mprj_logic_high_inst/HI[167]
+ mgmt_buffers/mprj_logic_high_inst/HI[166]
+ mgmt_buffers/mprj_logic_high_inst/HI[165]
+ mgmt_buffers/mprj_logic_high_inst/HI[164]
+ mgmt_buffers/mprj_logic_high_inst/HI[163]
+ mgmt_buffers/mprj_logic_high_inst/HI[162]
+ mgmt_buffers/mprj_logic_high_inst/HI[161]
+ mgmt_buffers/mprj_logic_high_inst/HI[160]
+ mgmt_buffers/mprj_logic_high_inst/HI[159]
+ mgmt_buffers/mprj_logic_high_inst/HI[158]
+ mgmt_buffers/mprj_logic_high_inst/HI[157]
+ mgmt_buffers/mprj_logic_high_inst/HI[156]
+ mgmt_buffers/mprj_logic_high_inst/HI[155]
+ mgmt_buffers/mprj_logic_high_inst/HI[154]
+ mgmt_buffers/mprj_logic_high_inst/HI[153]
+ mgmt_buffers/mprj_logic_high_inst/HI[152]
+ mgmt_buffers/mprj_logic_high_inst/HI[151]
+ mgmt_buffers/mprj_logic_high_inst/HI[150]
+ mgmt_buffers/mprj_logic_high_inst/HI[149]
+ mgmt_buffers/mprj_logic_high_inst/HI[148]
+ mgmt_buffers/mprj_logic_high_inst/HI[147]
+ mgmt_buffers/mprj_logic_high_inst/HI[146]
+ mgmt_buffers/mprj_logic_high_inst/HI[145]
+ mgmt_buffers/mprj_logic_high_inst/HI[144]
+ mgmt_buffers/mprj_logic_high_inst/HI[143]
+ mgmt_buffers/mprj_logic_high_inst/HI[142]
+ mgmt_buffers/mprj_logic_high_inst/HI[141]
+ mgmt_buffers/mprj_logic_high_inst/HI[140]
+ mgmt_buffers/mprj_logic_high_inst/HI[139]
+ mgmt_buffers/mprj_logic_high_inst/HI[138]
+ padframe/mprj_analog_io[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[137]
+ mgmt_buffers/mprj_logic_high_inst/HI[136]
+ mgmt_buffers/mprj_logic_high_inst/HI[135]
+ mgmt_buffers/mprj_logic_high_inst/HI[134]
+ mgmt_buffers/mprj_logic_high_inst/HI[133]
+ mgmt_buffers/mprj_logic_high_inst/HI[132]
+ mgmt_buffers/mprj_logic_high_inst/HI[131]
+ mgmt_buffers/mprj_logic_high_inst/HI[130]
+ mgmt_buffers/mprj_logic_high_inst/HI[129]
+ mgmt_buffers/mprj_logic_high_inst/HI[128]
+ mgmt_buffers/mprj_logic_high_inst/HI[127]
+ mgmt_buffers/mprj_logic_high_inst/HI[126]
+ mgmt_buffers/mprj_logic_high_inst/HI[125]
+ mgmt_buffers/mprj_logic_high_inst/HI[124]
+ mgmt_buffers/mprj_logic_high_inst/HI[123]
+ mgmt_buffers/mprj_logic_high_inst/HI[122]
+ mgmt_buffers/mprj_logic_high_inst/HI[121]
+ mgmt_buffers/mprj_logic_high_inst/HI[120]
+ mgmt_buffers/mprj_logic_high_inst/HI[119]
+ mgmt_buffers/mprj_logic_high_inst/HI[118]
+ mgmt_buffers/mprj_logic_high_inst/HI[117]
+ mgmt_buffers/mprj_logic_high_inst/HI[116]
+ mgmt_buffers/mprj_logic_high_inst/HI[115]
+ mgmt_buffers/mprj_logic_high_inst/HI[114]
+ mgmt_buffers/mprj_logic_high_inst/HI[113]
+ mgmt_buffers/mprj_logic_high_inst/HI[112]
+ mgmt_buffers/mprj_logic_high_inst/HI[111]
+ mgmt_buffers/mprj_logic_high_inst/HI[110]
+ mgmt_buffers/mprj_logic_high_inst/HI[109]
+ mgmt_buffers/mprj_logic_high_inst/HI[108]
+ mgmt_buffers/mprj_logic_high_inst/HI[107]
+ mgmt_buffers/mprj_logic_high_inst/HI[106]
+ mgmt_buffers/mprj_logic_high_inst/HI[105]
+ mgmt_buffers/mprj_logic_high_inst/HI[104]
+ mgmt_buffers/mprj_logic_high_inst/HI[103]
+ mgmt_buffers/mprj_logic_high_inst/HI[102]
+ mgmt_buffers/mprj_logic_high_inst/HI[101]
+ mgmt_buffers/mprj_logic_high_inst/HI[100]
+ mgmt_buffers/mprj_logic_high_inst/HI[99]
+ mgmt_buffers/mprj_logic_high_inst/HI[98]
+ mgmt_buffers/mprj_logic_high_inst/HI[97]
+ mgmt_buffers/mprj_logic_high_inst/HI[96]
+ mgmt_buffers/mprj_logic_high_inst/HI[95]
+ mgmt_buffers/mprj_logic_high_inst/HI[94]
+ mgmt_buffers/mprj_logic_high_inst/HI[93]
+ mgmt_buffers/mprj_logic_high_inst/HI[92]
+ mgmt_buffers/mprj_logic_high_inst/HI[91]
+ padframe/mprj_io[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[90]
+ mgmt_buffers/mprj_logic_high_inst/HI[89]
+ mgmt_buffers/mprj_logic_high_inst/HI[88]
+ mgmt_buffers/mprj_logic_high_inst/HI[87]
+ mgmt_buffers/mprj_logic_high_inst/HI[86]
+ mgmt_buffers/mprj_logic_high_inst/HI[85]
+ mgmt_buffers/mprj_logic_high_inst/HI[84]
+ mgmt_buffers/mprj_logic_high_inst/HI[83]
+ mgmt_buffers/mprj_logic_high_inst/HI[82]
+ mgmt_buffers/mprj_logic_high_inst/HI[81]
+ mgmt_buffers/mprj_logic_high_inst/HI[80]
+ mgmt_buffers/mprj_logic_high_inst/HI[79]
+ mgmt_buffers/mprj_logic_high_inst/HI[78]
+ mgmt_buffers/mprj_logic_high_inst/HI[77]
+ mgmt_buffers/mprj_logic_high_inst/HI[76]
+ mgmt_buffers/mprj_logic_high_inst/HI[75]
+ mgmt_buffers/mprj_logic_high_inst/HI[74]
+ mgmt_buffers/mprj_logic_high_inst/HI[73]
+ mgmt_buffers/mprj_logic_high_inst/HI[72]
+ mgmt_buffers/mprj_logic_high_inst/HI[71]
+ mgmt_buffers/mprj_logic_high_inst/HI[70]
+ mgmt_buffers/mprj_logic_high_inst/HI[69]
+ padframe/mprj_io[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[68]
+ mgmt_buffers/mprj_logic_high_inst/HI[67]
+ mgmt_buffers/mprj_logic_high_inst/HI[66]
+ mgmt_buffers/mprj_logic_high_inst/HI[65]
+ mgmt_buffers/mprj_logic_high_inst/HI[64]
+ mgmt_buffers/mprj_logic_high_inst/HI[63]
+ mgmt_buffers/mprj_logic_high_inst/HI[62]
+ mgmt_buffers/mprj_logic_high_inst/HI[61]
+ mgmt_buffers/mprj_logic_high_inst/HI[60]
+ mgmt_buffers/mprj_logic_high_inst/HI[59]
+ mgmt_buffers/mprj_logic_high_inst/HI[58]
+ mgmt_buffers/mprj_logic_high_inst/HI[57]
+ mgmt_buffers/mprj_logic_high_inst/HI[56]
+ mgmt_buffers/mprj_logic_high_inst/HI[55]
+ mgmt_buffers/mprj_logic_high_inst/HI[54]
+ mgmt_buffers/mprj_logic_high_inst/HI[53]
+ mgmt_buffers/mprj_logic_high_inst/HI[52]
+ mgmt_buffers/mprj_logic_high_inst/HI[51]
+ mgmt_buffers/mprj_logic_high_inst/HI[50]
+ mgmt_buffers/mprj_logic_high_inst/HI[49]
+ mgmt_buffers/mprj_logic_high_inst/HI[48]
+ mgmt_buffers/mprj_logic_high_inst/HI[47]
+ mgmt_buffers/mprj_logic_high_inst/HI[46]
+ mgmt_buffers/mprj_logic_high_inst/HI[45]
+ mgmt_buffers/mprj_logic_high_inst/HI[44]
+ mgmt_buffers/mprj_logic_high_inst/HI[43]
+ mgmt_buffers/mprj_logic_high_inst/HI[42]
+ mgmt_buffers/mprj_logic_high_inst/HI[41]
+ mgmt_buffers/mprj_logic_high_inst/HI[40]
+ mgmt_buffers/mprj_logic_high_inst/HI[39]
+ mgmt_buffers/mprj_logic_high_inst/HI[38]
+ mgmt_buffers/mprj_logic_high_inst/HI[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[36]
+ mgmt_buffers/mprj_logic_high_inst/HI[35]
+ mgmt_buffers/mprj_logic_high_inst/HI[34]
+ mgmt_buffers/mprj_logic_high_inst/HI[33]
+ mgmt_buffers/mprj_logic_high_inst/HI[32]
+ mgmt_buffers/mprj_logic_high_inst/HI[31]
+ mgmt_buffers/mprj_logic_high_inst/HI[30]
+ mgmt_buffers/mprj_logic_high_inst/HI[29]
+ mgmt_buffers/mprj_logic_high_inst/HI[28]
+ mgmt_buffers/mprj_logic_high_inst/HI[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[25]
+ mgmt_buffers/mprj_logic_high_inst/HI[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[22]
+ mgmt_buffers/mprj_logic_high_inst/HI[21]
+ mgmt_buffers/mprj_logic_high_inst/HI[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[19]
+ mgmt_buffers/mprj_logic_high_inst/HI[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[17]
+ mgmt_buffers/mprj_logic_high_inst/HI[16]
+ padframe/mprj_analog_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[15]
+ mgmt_buffers/mprj_logic_high_inst/HI[14]
+ mgmt_buffers/mprj_logic_high_inst/HI[13]
+ mgmt_buffers/mprj_logic_high_inst/HI[12]
+ mgmt_buffers/mprj_logic_high_inst/HI[11]
+ mgmt_buffers/mprj_logic_high_inst/HI[10]
+ mgmt_buffers/mprj_logic_high_inst/HI[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[8]
+ mgmt_buffers/mprj_logic_high_inst/HI[7]
+ mgmt_buffers/mprj_logic_high_inst/HI[6]
+ mgmt_buffers/mprj_logic_high_inst/HI[5]
+ mgmt_buffers/mprj_logic_high_inst/HI[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[2]
+ mgmt_buffers/mprj_logic_high_inst/HI[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[0]
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1
+ mgmt_buffers/powergood_check/mprj_vdd_logic1
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1_h
+ mgmt_buffers/powergood_check/mprj_vdd_logic1_h
+ padframe/mprj_io[35]
+ mprj/mprj/p[3]
+ mprj/mprj/p[2]
+ mprj/mprj/p[1]
+ mprj/mprj/p[0]
+ padframe/mprj_io[30]
+ padframe/mprj_io[14]
+ padframe/mprj_io[13]
+ padframe/mprj_io[12]
+ padframe/mprj_io[19]
+ padframe/mprj_analog_io[0]
+ padframe/mprj_io[36]
+ padframe/mprj_io[32]
+ padframe/mprj_io[29]
+ padframe/mprj_io[31]
+ padframe/mprj_io[15]
+ padframe/mprj_io[16]
+ padframe/mprj_io[1]
+ padframe/mprj_io[2]
+ padframe/mprj_io[3]
+ padframe/mprj_io[4]
+ padframe/mprj_io[5]
+ padframe/mprj_io[6]
+ padframe/mprj_io[7]
+ padframe/resetb
+ padframe/resetb_core_h
+ padframe/vccd1_pad
+ padframe/vccd2_pad
+ padframe/vccd_pad
+ padframe/vdda1_pad
+ padframe/vdda1_pad2
+ padframe/vdda2_pad
+ padframe/vdda_pad
+ padframe/vddio_pad
+ padframe/vddio_pad2
+ padframe/vssa1_pad
+ padframe/vssa1_pad2
+ padframe/vssa2_pad
+ padframe/vssa_pad
+ padframe/vssd1_pad
+ padframe/vssd2_pad
+ padframe/vssd_pad
+ padframe/vssio_pad
+ padframe/vssio_pad2
+ padframe/mprj_pads.analog_a
+ padframe/mprj_pads.analog_b
+ padframe/loop_zero_clock
+ padframe/loop_one_clock
+ padframe/constant_value_inst\[0\]/one
+ padframe/constant_value_inst\[0\]/zero
+ padframe/constant_value_inst\[0\]/one_unbuf
+ padframe/constant_value_inst\[0\]/zero_unbuf
+ padframe/constant_value_inst\[1\]/one
+ padframe/constant_value_inst\[1\]/zero
+ padframe/constant_value_inst\[1\]/one_unbuf
+ padframe/constant_value_inst\[1\]/zero_unbuf
+ padframe/constant_value_inst\[2\]/one
+ padframe/constant_value_inst\[2\]/zero
+ padframe/constant_value_inst\[2\]/one_unbuf
+ padframe/constant_value_inst\[2\]/zero_unbuf
+ padframe/constant_value_inst\[3\]/one
+ padframe/constant_value_inst\[3\]/zero
+ padframe/constant_value_inst\[3\]/one_unbuf
+ padframe/constant_value_inst\[3\]/zero_unbuf
+ padframe/constant_value_inst\[4\]/one
+ padframe/constant_value_inst\[4\]/zero
+ padframe/constant_value_inst\[4\]/one_unbuf
+ padframe/constant_value_inst\[4\]/zero_unbuf
+ padframe/constant_value_inst\[5\]/one
+ padframe/constant_value_inst\[5\]/zero
+ padframe/constant_value_inst\[5\]/one_unbuf
+ padframe/constant_value_inst\[5\]/zero_unbuf
+ padframe/constant_value_inst\[6\]/one
+ padframe/constant_value_inst\[6\]/zero
+ padframe/constant_value_inst\[6\]/one_unbuf
+ padframe/constant_value_inst\[6\]/zero_unbuf
+ padframe/loop_zero_flash_clk
+ padframe/loop_one_flash_clk
+ padframe/loop_zero_flash_csb
+ padframe/loop_one_flash_csb
+ padframe/loop_zero_flash_io0
+ padframe/loop_one_flash_io0
+ padframe/loop_zero_flash_io1
+ padframe/loop_one_flash_io1
+ padframe/loop_zero_gpio
+ padframe/loop_one_gpio
+ padframe/mprj_pads.loop0_io\[0\]
+ padframe/mprj_pads.loop1_io\[0\]
+ padframe/mprj_pads.io_in\[0\]
+ padframe/mprj_pads.io_in_3v3\[0\]
+ padframe/mprj_pads.no_connect_1b\[0\]
+ padframe/mprj_pads.no_connect_1a\[0\]
+ padframe/mprj_pads.loop0_io\[10\]
+ padframe/mprj_pads.loop1_io\[10\]
+ padframe/mprj_pads.io_in\[10\]
+ padframe/mprj_pads.io_in_3v3\[10\]
+ padframe/mprj_pads.analog_noesd_io\[3\]
+ padframe/mprj_pads.loop0_io\[11\]
+ padframe/mprj_pads.loop1_io\[11\]
+ padframe/mprj_pads.io_in\[11\]
+ padframe/mprj_pads.io_in_3v3\[11\]
+ padframe/mprj_pads.analog_noesd_io\[4\]
+ padframe/mprj_pads.loop0_io\[12\]
+ padframe/mprj_pads.loop1_io\[12\]
+ padframe/mprj_pads.io_in\[12\]
+ padframe/mprj_pads.io_in_3v3\[12\]
+ padframe/mprj_pads.analog_noesd_io\[5\]
+ padframe/mprj_pads.loop0_io\[13\]
+ padframe/mprj_pads.loop1_io\[13\]
+ padframe/mprj_pads.io_in\[13\]
+ padframe/mprj_pads.io_in_3v3\[13\]
+ padframe/mprj_pads.analog_noesd_io\[6\]
+ padframe/mprj_pads.loop0_io\[14\]
+ padframe/mprj_pads.loop1_io\[14\]
+ padframe/mprj_pads.io_in\[14\]
+ padframe/mprj_pads.io_in_3v3\[14\]
+ padframe/mprj_pads.analog_noesd_io\[7\]
+ padframe/mprj_pads.loop0_io\[15\]
+ padframe/mprj_pads.loop1_io\[15\]
+ padframe/mprj_pads.io_in\[15\]
+ padframe/mprj_pads.io_in_3v3\[15\]
+ padframe/mprj_pads.analog_noesd_io\[8\]
+ padframe/mprj_pads.loop0_io\[16\]
+ padframe/mprj_pads.loop1_io\[16\]
+ padframe/mprj_pads.io_in\[16\]
+ padframe/mprj_pads.io_in_3v3\[16\]
+ padframe/mprj_pads.analog_noesd_io\[9\]
+ padframe/mprj_pads.loop0_io\[17\]
+ padframe/mprj_pads.loop1_io\[17\]
+ padframe/mprj_pads.io_in\[17\]
+ padframe/mprj_pads.io_in_3v3\[17\]
+ padframe/mprj_pads.analog_noesd_io\[10\]
+ padframe/mprj_pads.loop0_io\[18\]
+ padframe/mprj_pads.loop1_io\[18\]
+ padframe/mprj_pads.io_in\[18\]
+ padframe/mprj_pads.io_in_3v3\[18\]
+ padframe/mprj_pads.analog_noesd_io\[11\]
+ padframe/mprj_pads.loop0_io\[1\]
+ padframe/mprj_pads.loop1_io\[1\]
+ padframe/mprj_pads.io_in\[1\]
+ padframe/mprj_pads.io_in_3v3\[1\]
+ padframe/mprj_pads.no_connect_1b\[1\]
+ padframe/mprj_pads.no_connect_1a\[1\]
+ padframe/mprj_pads.loop0_io\[2\]
+ padframe/mprj_pads.loop1_io\[2\]
+ padframe/mprj_pads.io_in\[2\]
+ padframe/mprj_pads.io_in_3v3\[2\]
+ padframe/mprj_pads.no_connect_1b\[2\]
+ padframe/mprj_pads.no_connect_1a\[2\]
+ padframe/mprj_pads.loop0_io\[3\]
+ padframe/mprj_pads.loop1_io\[3\]
+ padframe/mprj_pads.io_in\[3\]
+ padframe/mprj_pads.io_in_3v3\[3\]
+ padframe/mprj_pads.no_connect_1b\[3\]
+ padframe/mprj_pads.no_connect_1a\[3\]
+ padframe/mprj_pads.loop0_io\[4\]
+ padframe/mprj_pads.loop1_io\[4\]
+ padframe/mprj_pads.io_in\[4\]
+ padframe/mprj_pads.io_in_3v3\[4\]
+ padframe/mprj_pads.no_connect_1b\[4\]
+ padframe/mprj_pads.no_connect_1a\[4\]
+ padframe/mprj_pads.loop0_io\[5\]
+ padframe/mprj_pads.loop1_io\[5\]
+ padframe/mprj_pads.io_in\[5\]
+ padframe/mprj_pads.io_in_3v3\[5\]
+ padframe/mprj_pads.no_connect_1b\[5\]
+ padframe/mprj_pads.no_connect_1a\[5\]
+ padframe/mprj_pads.loop0_io\[6\]
+ padframe/mprj_pads.loop1_io\[6\]
+ padframe/mprj_pads.io_in\[6\]
+ padframe/mprj_pads.io_in_3v3\[6\]
+ padframe/mprj_pads.no_connect_1b\[6\]
+ padframe/mprj_pads.no_connect_1a\[6\]
+ padframe/mprj_pads.loop0_io\[7\]
+ padframe/mprj_pads.loop1_io\[7\]
+ padframe/mprj_pads.io_in\[7\]
+ padframe/mprj_pads.io_in_3v3\[7\]
+ padframe/mprj_pads.analog_noesd_io\[0\]
+ padframe/mprj_pads.loop0_io\[8\]
+ padframe/mprj_pads.loop1_io\[8\]
+ padframe/mprj_pads.io_in\[8\]
+ padframe/mprj_pads.io_in_3v3\[8\]
+ padframe/mprj_pads.analog_noesd_io\[1\]
+ padframe/mprj_pads.loop0_io\[9\]
+ padframe/mprj_pads.loop1_io\[9\]
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+ padframe/mprj_pads.no_connect_2b\[1\]
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+ padframe/mprj_pads.analog_noesd_io\[21\]
+ padframe/xres_vss_loop
+ padframe/xresloop
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+ user_id_value/user_proj_id_high\[18\]
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+ spare_logic\[1\]/spare_logic1\[9\]
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+ spare_logic\[2\]/spare_xi[3]
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+ spare_logic\[2\]/spare_xi[1]
+ spare_logic\[2\]/spare_xi[0]
+ spare_logic\[2\]/spare_xib
+ spare_logic\[2\]/spare_xmx[1]
+ spare_logic\[2\]/spare_xmx[0]
+ spare_logic\[2\]/spare_xna[1]
+ spare_logic\[2\]/spare_xna[0]
+ spare_logic\[2\]/spare_xno[1]
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+ spare_logic\[2\]/spare_xz[24]
+ spare_logic\[2\]/spare_xz[23]
+ spare_logic\[2\]/spare_xz[22]
+ spare_logic\[2\]/spare_xz[21]
+ spare_logic\[2\]/spare_xz[20]
+ spare_logic\[2\]/spare_xz[19]
+ spare_logic\[2\]/spare_xz[18]
+ spare_logic\[2\]/spare_xz[17]
+ spare_logic\[2\]/spare_xz[16]
+ spare_logic\[2\]/spare_xz[15]
+ spare_logic\[2\]/spare_xz[14]
+ spare_logic\[2\]/spare_xz[13]
+ spare_logic\[2\]/spare_xz[12]
+ spare_logic\[2\]/spare_xz[11]
+ spare_logic\[2\]/spare_xz[10]
+ spare_logic\[2\]/spare_xz[9]
+ spare_logic\[2\]/spare_xz[8]
+ spare_logic\[2\]/spare_xz[7]
+ spare_logic\[2\]/spare_xz[6]
+ spare_logic\[2\]/spare_xz[5]
+ spare_logic\[2\]/spare_xz[4]
+ spare_logic\[2\]/spare_xz[3]
+ spare_logic\[2\]/spare_xz[2]
+ spare_logic\[2\]/spare_xz[1]
+ spare_logic\[2\]/spare_xz[0]
+ spare_logic\[2\]/spare_logic1\[0\]
+ spare_logic\[2\]/spare_logic1\[10\]
+ spare_logic\[2\]/spare_logic1\[11\]
+ spare_logic\[2\]/spare_logic1\[12\]
+ spare_logic\[2\]/spare_logic1\[13\]
+ spare_logic\[2\]/spare_logic1\[14\]
+ spare_logic\[2\]/spare_logic1\[15\]
+ spare_logic\[2\]/spare_logic1\[16\]
+ spare_logic\[2\]/spare_logic1\[17\]
+ spare_logic\[2\]/spare_logic1\[18\]
+ spare_logic\[2\]/spare_logic1\[19\]
+ spare_logic\[2\]/spare_logic1\[1\]
+ spare_logic\[2\]/spare_logic1\[20\]
+ spare_logic\[2\]/spare_logic1\[21\]
+ spare_logic\[2\]/spare_logic1\[22\]
+ spare_logic\[2\]/spare_logic1\[23\]
+ spare_logic\[2\]/spare_logic1\[24\]
+ spare_logic\[2\]/spare_logic1\[25\]
+ spare_logic\[2\]/spare_logic1\[26\]
+ spare_logic\[2\]/spare_logic1\[2\]
+ spare_logic\[2\]/spare_logic1\[3\]
+ spare_logic\[2\]/spare_logic1\[4\]
+ spare_logic\[2\]/spare_logic1\[5\]
+ spare_logic\[2\]/spare_logic1\[6\]
+ spare_logic\[2\]/spare_logic1\[7\]
+ spare_logic\[2\]/spare_logic1\[8\]
+ spare_logic\[2\]/spare_logic1\[9\]
+ spare_logic\[3\]/spare_xfq[1]
+ spare_logic\[3\]/spare_xfq[0]
+ spare_logic\[3\]/spare_xfqn[1]
+ spare_logic\[3\]/spare_xfqn[0]
+ spare_logic\[3\]/spare_xi[3]
+ spare_logic\[3\]/spare_xi[2]
+ spare_logic\[3\]/spare_xi[1]
+ spare_logic\[3\]/spare_xi[0]
+ spare_logic\[3\]/spare_xib
+ spare_logic\[3\]/spare_xmx[1]
+ spare_logic\[3\]/spare_xmx[0]
+ spare_logic\[3\]/spare_xna[1]
+ spare_logic\[3\]/spare_xna[0]
+ spare_logic\[3\]/spare_xno[1]
+ spare_logic\[3\]/spare_xno[0]
+ spare_logic\[3\]/spare_xz[26]
+ spare_logic\[3\]/spare_xz[25]
+ spare_logic\[3\]/spare_xz[24]
+ spare_logic\[3\]/spare_xz[23]
+ spare_logic\[3\]/spare_xz[22]
+ spare_logic\[3\]/spare_xz[21]
+ spare_logic\[3\]/spare_xz[20]
+ spare_logic\[3\]/spare_xz[19]
+ spare_logic\[3\]/spare_xz[18]
+ spare_logic\[3\]/spare_xz[17]
+ spare_logic\[3\]/spare_xz[16]
+ spare_logic\[3\]/spare_xz[15]
+ spare_logic\[3\]/spare_xz[14]
+ spare_logic\[3\]/spare_xz[13]
+ spare_logic\[3\]/spare_xz[12]
+ spare_logic\[3\]/spare_xz[11]
+ spare_logic\[3\]/spare_xz[10]
+ spare_logic\[3\]/spare_xz[9]
+ spare_logic\[3\]/spare_xz[8]
+ spare_logic\[3\]/spare_xz[7]
+ spare_logic\[3\]/spare_xz[6]
+ spare_logic\[3\]/spare_xz[5]
+ spare_logic\[3\]/spare_xz[4]
+ spare_logic\[3\]/spare_xz[3]
+ spare_logic\[3\]/spare_xz[2]
+ spare_logic\[3\]/spare_xz[1]
+ spare_logic\[3\]/spare_xz[0]
+ spare_logic\[3\]/spare_logic1\[0\]
+ spare_logic\[3\]/spare_logic1\[10\]
+ spare_logic\[3\]/spare_logic1\[11\]
+ spare_logic\[3\]/spare_logic1\[12\]
+ spare_logic\[3\]/spare_logic1\[13\]
+ spare_logic\[3\]/spare_logic1\[14\]
+ spare_logic\[3\]/spare_logic1\[15\]
+ spare_logic\[3\]/spare_logic1\[16\]
+ spare_logic\[3\]/spare_logic1\[17\]
+ spare_logic\[3\]/spare_logic1\[18\]
+ spare_logic\[3\]/spare_logic1\[19\]
+ spare_logic\[3\]/spare_logic1\[1\]
+ spare_logic\[3\]/spare_logic1\[20\]
+ spare_logic\[3\]/spare_logic1\[21\]
+ spare_logic\[3\]/spare_logic1\[22\]
+ spare_logic\[3\]/spare_logic1\[23\]
+ spare_logic\[3\]/spare_logic1\[24\]
+ spare_logic\[3\]/spare_logic1\[25\]
+ spare_logic\[3\]/spare_logic1\[26\]
+ spare_logic\[3\]/spare_logic1\[2\]
+ spare_logic\[3\]/spare_logic1\[3\]
+ spare_logic\[3\]/spare_logic1\[4\]
+ spare_logic\[3\]/spare_logic1\[5\]
+ spare_logic\[3\]/spare_logic1\[6\]
+ spare_logic\[3\]/spare_logic1\[7\]
+ spare_logic\[3\]/spare_logic1\[8\]
+ spare_logic\[3\]/spare_logic1\[9\]
+ user_id_value/mask_rev[31]
+ user_id_value/mask_rev[30]
+ user_id_value/mask_rev[29]
+ user_id_value/mask_rev[28]
+ user_id_value/mask_rev[27]
+ user_id_value/mask_rev[26]
+ user_id_value/mask_rev[25]
+ user_id_value/mask_rev[24]
+ user_id_value/mask_rev[23]
+ user_id_value/mask_rev[22]
+ user_id_value/mask_rev[21]
+ user_id_value/mask_rev[20]
+ user_id_value/mask_rev[19]
+ user_id_value/mask_rev[18]
+ user_id_value/mask_rev[17]
+ user_id_value/mask_rev[16]
+ user_id_value/mask_rev[15]
+ user_id_value/mask_rev[14]
+ user_id_value/mask_rev[13]
+ user_id_value/mask_rev[12]
+ user_id_value/mask_rev[11]
+ user_id_value/mask_rev[10]
+ user_id_value/mask_rev[9]
+ user_id_value/mask_rev[8]
+ user_id_value/mask_rev[7]
+ user_id_value/mask_rev[6]
+ user_id_value/mask_rev[5]
+ user_id_value/mask_rev[4]
+ user_id_value/mask_rev[3]
+ user_id_value/mask_rev[2]
+ user_id_value/mask_rev[1]
+ user_id_value/mask_rev[0]
+Found 629 partially unannotated nets.
+ flash_clkrst_buffers/out_s[7]
+  padframe/flash_clk_pad/OE_N
+ flash_clkrst_buffers/out_s[8]
+  padframe/flash_csb_pad/OUT
+ flash_clkrst_buffers/out_s[9]
+  padframe/flash_clk_pad/OUT
+ flash_clkrst_buffers/out_s[0]
+  padframe/flash_io1_pad/OUT
+ flash_clkrst_buffers/out_s[1]
+  padframe/flash_io0_pad/OUT
+ flash_clkrst_buffers/out_s[2]
+  padframe/flash_io1_pad/DM[2]
+  padframe/flash_io1_pad/DM[1]
+  padframe/flash_io1_pad/INP_DIS
+ flash_clkrst_buffers/out_s[3]
+  padframe/flash_io0_pad/DM[2]
+  padframe/flash_io0_pad/DM[1]
+  padframe/flash_io0_pad/INP_DIS
+ flash_clkrst_buffers/out_s[4]
+  padframe/flash_io1_pad/DM[0]
+  padframe/flash_io1_pad/OE_N
+ flash_clkrst_buffers/out_s[5]
+  padframe/flash_io0_pad/DM[0]
+  padframe/flash_io0_pad/OE_N
+ flash_clkrst_buffers/out_s[6]
+  padframe/flash_csb_pad/OE_N
+ gpio_control_bidir_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[0]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[1]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[2]
+ gpio_control_bidir_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[0\]/HLD_OVR
+ gpio_control_bidir_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[0\]/INP_DIS
+ gpio_control_bidir_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[0\]/OUT
+ gpio_control_bidir_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[0\]/OE_N
+ gpio_control_bidir_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/SLOW
+ gpio_control_bidir_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/VTRIP_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_EN
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_POL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_SEL
+ gpio_control_bidir_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[0]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[1]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[2]
+ gpio_control_bidir_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[1\]/HLD_OVR
+ gpio_control_bidir_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[1\]/INP_DIS
+ gpio_control_bidir_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[1\]/OUT
+ gpio_control_bidir_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[1\]/OE_N
+ gpio_control_bidir_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/SLOW
+ gpio_control_bidir_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/VTRIP_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_EN
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_POL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_SEL
+ gpio_control_bidir_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[0]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[1]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[2]
+ gpio_control_bidir_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[16\]/HLD_OVR
+ gpio_control_bidir_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_bidir_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[16\]/INP_DIS
+ gpio_control_bidir_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[16\]/OUT
+ gpio_control_bidir_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[16\]/OE_N
+ gpio_control_bidir_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/SLOW
+ gpio_control_bidir_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/VTRIP_SEL
+ gpio_control_bidir_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[89\]/A
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_EN
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_POL
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_SEL
+ gpio_control_bidir_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[0]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[1]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[2]
+ gpio_control_bidir_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[17\]/HLD_OVR
+ gpio_control_bidir_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_bidir_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[17\]/INP_DIS
+ gpio_control_bidir_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[17\]/OUT
+ gpio_control_bidir_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[17\]/OE_N
+ gpio_control_bidir_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/SLOW
+ gpio_control_bidir_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/VTRIP_SEL
+ gpio_control_bidir_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[91\]/A
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_EN
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_POL
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_SEL
+ gpio_control_bidir_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[0]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[1]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[2]
+ gpio_control_bidir_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[18\]/HLD_OVR
+ gpio_control_bidir_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_bidir_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[18\]/INP_DIS
+ gpio_control_bidir_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[18\]/OUT
+ gpio_control_bidir_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[18\]/OE_N
+ gpio_control_bidir_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/SLOW
+ gpio_control_bidir_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/VTRIP_SEL
+ gpio_control_bidir_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[93\]/A
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_EN
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_POL
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[0]
+ gpio_control_in_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[1]
+ gpio_control_in_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[2]
+ gpio_control_in_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[8\]/HLD_OVR
+ gpio_control_in_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[8\]/INP_DIS
+ gpio_control_in_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[8\]/OUT
+ gpio_control_in_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[8\]/OE_N
+ gpio_control_in_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/SLOW
+ gpio_control_in_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_1\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[1\]/A
+ gpio_control_in_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_1\[10\]/one
+  padframe/mprj_pads.area1_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_in_1\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[0]
+ gpio_control_in_1\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[1]
+ gpio_control_in_1\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[2]
+ gpio_control_in_1\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[18\]/HLD_OVR
+ gpio_control_in_1\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_in_1\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[18\]/INP_DIS
+ gpio_control_in_1\[10\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[18\]/OUT
+ gpio_control_in_1\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[18\]/OE_N
+ gpio_control_in_1\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/SLOW
+ gpio_control_in_1\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/VTRIP_SEL
+ gpio_control_in_1\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[19\]/A
+ gpio_control_in_1\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_EN
+ gpio_control_in_1\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_POL
+ gpio_control_in_1\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[0]
+ gpio_control_in_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[1]
+ gpio_control_in_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[2]
+ gpio_control_in_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[9\]/HLD_OVR
+ gpio_control_in_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[9\]/INP_DIS
+ gpio_control_in_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[9\]/OUT
+ gpio_control_in_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[9\]/OE_N
+ gpio_control_in_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/SLOW
+ gpio_control_in_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_1\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[2\]/A
+ gpio_control_in_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_SEL
+ gpio_control_in_1\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_1\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[0]
+ gpio_control_in_1\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[1]
+ gpio_control_in_1\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[2]
+ gpio_control_in_1\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[10\]/HLD_OVR
+ gpio_control_in_1\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_1\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[10\]/INP_DIS
+ gpio_control_in_1\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[10\]/OUT
+ gpio_control_in_1\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[10\]/OE_N
+ gpio_control_in_1\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/SLOW
+ gpio_control_in_1\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_1\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[3\]/A
+ gpio_control_in_1\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_1\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_1\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_1\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_1\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[0]
+ gpio_control_in_1\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[1]
+ gpio_control_in_1\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[2]
+ gpio_control_in_1\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[11\]/HLD_OVR
+ gpio_control_in_1\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_1\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[11\]/INP_DIS
+ gpio_control_in_1\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[11\]/OUT
+ gpio_control_in_1\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[11\]/OE_N
+ gpio_control_in_1\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/SLOW
+ gpio_control_in_1\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_1\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[4\]/A
+ gpio_control_in_1\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_1\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_1\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_1\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_1\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[0]
+ gpio_control_in_1\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[1]
+ gpio_control_in_1\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[2]
+ gpio_control_in_1\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[12\]/HLD_OVR
+ gpio_control_in_1\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_1\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[12\]/INP_DIS
+ gpio_control_in_1\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[12\]/OUT
+ gpio_control_in_1\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[12\]/OE_N
+ gpio_control_in_1\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/SLOW
+ gpio_control_in_1\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_1\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[5\]/A
+ gpio_control_in_1\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_1\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_1\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_1\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_1\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[0]
+ gpio_control_in_1\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[1]
+ gpio_control_in_1\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[2]
+ gpio_control_in_1\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[13\]/HLD_OVR
+ gpio_control_in_1\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_1\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[13\]/INP_DIS
+ gpio_control_in_1\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[13\]/OUT
+ gpio_control_in_1\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[13\]/OE_N
+ gpio_control_in_1\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/SLOW
+ gpio_control_in_1\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_1\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[6\]/A
+ gpio_control_in_1\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_1\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_1\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_1\[6\]/one
+  padframe/mprj_pads.area1_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_1\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[0]
+ gpio_control_in_1\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[1]
+ gpio_control_in_1\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[2]
+ gpio_control_in_1\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[14\]/HLD_OVR
+ gpio_control_in_1\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_1\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[14\]/INP_DIS
+ gpio_control_in_1\[6\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[14\]/OUT
+ gpio_control_in_1\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[14\]/OE_N
+ gpio_control_in_1\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/SLOW
+ gpio_control_in_1\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_1\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[8\]/A
+ gpio_control_in_1\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_1\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_1\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_1\[7\]/one
+  padframe/mprj_pads.area1_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_1\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[0]
+ gpio_control_in_1\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[1]
+ gpio_control_in_1\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[2]
+ gpio_control_in_1\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[15\]/HLD_OVR
+ gpio_control_in_1\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_1\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[15\]/INP_DIS
+ gpio_control_in_1\[7\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[15\]/OUT
+ gpio_control_in_1\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[15\]/OE_N
+ gpio_control_in_1\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/SLOW
+ gpio_control_in_1\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_1\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[10\]/A
+ gpio_control_in_1\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_1\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_1\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_1\[8\]/one
+  padframe/mprj_pads.area1_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_in_1\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[0]
+ gpio_control_in_1\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[1]
+ gpio_control_in_1\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[2]
+ gpio_control_in_1\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[16\]/HLD_OVR
+ gpio_control_in_1\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_in_1\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[16\]/INP_DIS
+ gpio_control_in_1\[8\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[16\]/OUT
+ gpio_control_in_1\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[16\]/OE_N
+ gpio_control_in_1\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/SLOW
+ gpio_control_in_1\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/VTRIP_SEL
+ gpio_control_in_1\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[13\]/A
+ gpio_control_in_1\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_EN
+ gpio_control_in_1\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_POL
+ gpio_control_in_1\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_SEL
+ gpio_control_in_1\[9\]/one
+  padframe/mprj_pads.area1_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_in_1\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[0]
+ gpio_control_in_1\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[1]
+ gpio_control_in_1\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[2]
+ gpio_control_in_1\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[17\]/HLD_OVR
+ gpio_control_in_1\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_in_1\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[17\]/INP_DIS
+ gpio_control_in_1\[9\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[17\]/OUT
+ gpio_control_in_1\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[17\]/OE_N
+ gpio_control_in_1\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/SLOW
+ gpio_control_in_1\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/VTRIP_SEL
+ gpio_control_in_1\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[16\]/A
+ gpio_control_in_1\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_EN
+ gpio_control_in_1\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_POL
+ gpio_control_in_1\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_SEL
+ gpio_control_in_1a\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_1a\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[0]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[1]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[2]
+ gpio_control_in_1a\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[2\]/HLD_OVR
+ gpio_control_in_1a\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[2\]/INP_DIS
+ gpio_control_in_1a\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[2\]/OUT
+ gpio_control_in_1a\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[2\]/OE_N
+ gpio_control_in_1a\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/SLOW
+ gpio_control_in_1a\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_1a\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_1a\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_1a\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[0]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[1]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[2]
+ gpio_control_in_1a\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[3\]/HLD_OVR
+ gpio_control_in_1a\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[3\]/INP_DIS
+ gpio_control_in_1a\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[3\]/OUT
+ gpio_control_in_1a\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[3\]/OE_N
+ gpio_control_in_1a\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/SLOW
+ gpio_control_in_1a\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_1a\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_1a\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_1a\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[0]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[1]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[2]
+ gpio_control_in_1a\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[4\]/HLD_OVR
+ gpio_control_in_1a\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[4\]/INP_DIS
+ gpio_control_in_1a\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[4\]/OUT
+ gpio_control_in_1a\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[4\]/OE_N
+ gpio_control_in_1a\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/SLOW
+ gpio_control_in_1a\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_1a\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_1a\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_1a\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[0]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[1]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[2]
+ gpio_control_in_1a\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[5\]/HLD_OVR
+ gpio_control_in_1a\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[5\]/INP_DIS
+ gpio_control_in_1a\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[5\]/OUT
+ gpio_control_in_1a\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[5\]/OE_N
+ gpio_control_in_1a\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/SLOW
+ gpio_control_in_1a\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_1a\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_1a\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_1a\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[0]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[1]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[2]
+ gpio_control_in_1a\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[6\]/HLD_OVR
+ gpio_control_in_1a\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[6\]/INP_DIS
+ gpio_control_in_1a\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[6\]/OUT
+ gpio_control_in_1a\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[6\]/OE_N
+ gpio_control_in_1a\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/SLOW
+ gpio_control_in_1a\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_1a\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_1a\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_1a\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[0]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[1]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[2]
+ gpio_control_in_1a\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[7\]/HLD_OVR
+ gpio_control_in_1a\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_1a\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[7\]/INP_DIS
+ gpio_control_in_1a\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[7\]/OUT
+ gpio_control_in_1a\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[7\]/OE_N
+ gpio_control_in_1a\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/SLOW
+ gpio_control_in_1a\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_1a\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[0\]/A
+ gpio_control_in_1a\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_1a\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_1a\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_in_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[0]
+ gpio_control_in_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[1]
+ gpio_control_in_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[2]
+ gpio_control_in_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[0\]/HLD_OVR
+ gpio_control_in_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_in_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[0\]/INP_DIS
+ gpio_control_in_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[0\]/OUT
+ gpio_control_in_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[0\]/OE_N
+ gpio_control_in_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/SLOW
+ gpio_control_in_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/VTRIP_SEL
+ gpio_control_in_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[23\]/A
+ gpio_control_in_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_EN
+ gpio_control_in_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_POL
+ gpio_control_in_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_SEL
+ gpio_control_in_2\[10\]/one
+  padframe/mprj_pads.area2_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_2\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[0]
+ gpio_control_in_2\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[1]
+ gpio_control_in_2\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[2]
+ gpio_control_in_2\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[10\]/HLD_OVR
+ gpio_control_in_2\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_2\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[10\]/INP_DIS
+ gpio_control_in_2\[10\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[10\]/OUT
+ gpio_control_in_2\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[10\]/OE_N
+ gpio_control_in_2\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/SLOW
+ gpio_control_in_2\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_2\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[71\]/A
+ gpio_control_in_2\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_2\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_2\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_2\[11\]/one
+  padframe/mprj_pads.area2_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_2\[11\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[0]
+ gpio_control_in_2\[11\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[1]
+ gpio_control_in_2\[11\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[2]
+ gpio_control_in_2\[11\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[11\]/HLD_OVR
+ gpio_control_in_2\[11\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_2\[11\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[11\]/INP_DIS
+ gpio_control_in_2\[11\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[11\]/OUT
+ gpio_control_in_2\[11\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[11\]/OE_N
+ gpio_control_in_2\[11\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/SLOW
+ gpio_control_in_2\[11\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_2\[11\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[75\]/A
+ gpio_control_in_2\[11\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_2\[11\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_2\[11\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_2\[12\]/one
+  padframe/mprj_pads.area2_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_2\[12\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[0]
+ gpio_control_in_2\[12\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[1]
+ gpio_control_in_2\[12\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[2]
+ gpio_control_in_2\[12\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[12\]/HLD_OVR
+ gpio_control_in_2\[12\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_2\[12\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[12\]/INP_DIS
+ gpio_control_in_2\[12\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[12\]/OUT
+ gpio_control_in_2\[12\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[12\]/OE_N
+ gpio_control_in_2\[12\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/SLOW
+ gpio_control_in_2\[12\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_2\[12\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[78\]/A
+ gpio_control_in_2\[12\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_2\[12\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_2\[12\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_2\[13\]/one
+  padframe/mprj_pads.area2_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_2\[13\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[0]
+ gpio_control_in_2\[13\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[1]
+ gpio_control_in_2\[13\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[2]
+ gpio_control_in_2\[13\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[13\]/HLD_OVR
+ gpio_control_in_2\[13\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_2\[13\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[13\]/INP_DIS
+ gpio_control_in_2\[13\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[13\]/OUT
+ gpio_control_in_2\[13\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[13\]/OE_N
+ gpio_control_in_2\[13\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/SLOW
+ gpio_control_in_2\[13\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_2\[13\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[81\]/A
+ gpio_control_in_2\[13\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_2\[13\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_2\[13\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_2\[14\]/one
+  padframe/mprj_pads.area2_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_2\[14\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[0]
+ gpio_control_in_2\[14\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[1]
+ gpio_control_in_2\[14\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[2]
+ gpio_control_in_2\[14\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[14\]/HLD_OVR
+ gpio_control_in_2\[14\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_2\[14\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[14\]/INP_DIS
+ gpio_control_in_2\[14\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[14\]/OUT
+ gpio_control_in_2\[14\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[14\]/OE_N
+ gpio_control_in_2\[14\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/SLOW
+ gpio_control_in_2\[14\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_2\[14\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[84\]/A
+ gpio_control_in_2\[14\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_2\[14\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_2\[14\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_2\[15\]/one
+  padframe/mprj_pads.area2_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_2\[15\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[0]
+ gpio_control_in_2\[15\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[1]
+ gpio_control_in_2\[15\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[2]
+ gpio_control_in_2\[15\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[15\]/HLD_OVR
+ gpio_control_in_2\[15\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_2\[15\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[15\]/INP_DIS
+ gpio_control_in_2\[15\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[15\]/OUT
+ gpio_control_in_2\[15\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[15\]/OE_N
+ gpio_control_in_2\[15\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/SLOW
+ gpio_control_in_2\[15\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_2\[15\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[87\]/A
+ gpio_control_in_2\[15\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_2\[15\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_2\[15\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_in_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[0]
+ gpio_control_in_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[1]
+ gpio_control_in_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[2]
+ gpio_control_in_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[1\]/HLD_OVR
+ gpio_control_in_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_in_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[1\]/INP_DIS
+ gpio_control_in_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[1\]/OUT
+ gpio_control_in_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[1\]/OE_N
+ gpio_control_in_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/SLOW
+ gpio_control_in_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/VTRIP_SEL
+ gpio_control_in_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[29\]/A
+ gpio_control_in_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_EN
+ gpio_control_in_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_POL
+ gpio_control_in_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_SEL
+ gpio_control_in_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[0]
+ gpio_control_in_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[1]
+ gpio_control_in_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[2]
+ gpio_control_in_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[2\]/HLD_OVR
+ gpio_control_in_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[2\]/INP_DIS
+ gpio_control_in_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[2\]/OUT
+ gpio_control_in_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[2\]/OE_N
+ gpio_control_in_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/SLOW
+ gpio_control_in_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[35\]/A
+ gpio_control_in_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_2\[3\]/one
+  padframe/mprj_pads.area2_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_2\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[0]
+ gpio_control_in_2\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[1]
+ gpio_control_in_2\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[2]
+ gpio_control_in_2\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[3\]/HLD_OVR
+ gpio_control_in_2\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_2\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[3\]/INP_DIS
+ gpio_control_in_2\[3\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[3\]/OUT
+ gpio_control_in_2\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[3\]/OE_N
+ gpio_control_in_2\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/SLOW
+ gpio_control_in_2\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_2\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[41\]/A
+ gpio_control_in_2\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_2\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_2\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_2\[4\]/one
+  padframe/mprj_pads.area2_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_2\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[0]
+ gpio_control_in_2\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[1]
+ gpio_control_in_2\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[2]
+ gpio_control_in_2\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[4\]/HLD_OVR
+ gpio_control_in_2\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_2\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[4\]/INP_DIS
+ gpio_control_in_2\[4\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[4\]/OUT
+ gpio_control_in_2\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[4\]/OE_N
+ gpio_control_in_2\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/SLOW
+ gpio_control_in_2\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_2\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[46\]/A
+ gpio_control_in_2\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_2\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_2\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_2\[5\]/one
+  padframe/mprj_pads.area2_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_2\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[0]
+ gpio_control_in_2\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[1]
+ gpio_control_in_2\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[2]
+ gpio_control_in_2\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[5\]/HLD_OVR
+ gpio_control_in_2\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_2\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[5\]/INP_DIS
+ gpio_control_in_2\[5\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[5\]/OUT
+ gpio_control_in_2\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[5\]/OE_N
+ gpio_control_in_2\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/SLOW
+ gpio_control_in_2\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_2\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[51\]/A
+ gpio_control_in_2\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_2\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_2\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_2\[6\]/one
+  padframe/mprj_pads.area2_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_2\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[0]
+ gpio_control_in_2\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[1]
+ gpio_control_in_2\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[2]
+ gpio_control_in_2\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[6\]/HLD_OVR
+ gpio_control_in_2\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_2\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[6\]/INP_DIS
+ gpio_control_in_2\[6\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[6\]/OUT
+ gpio_control_in_2\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[6\]/OE_N
+ gpio_control_in_2\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/SLOW
+ gpio_control_in_2\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_2\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[55\]/A
+ gpio_control_in_2\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_2\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_2\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_2\[7\]/one
+  padframe/mprj_pads.area2_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_2\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[0]
+ gpio_control_in_2\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[1]
+ gpio_control_in_2\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[2]
+ gpio_control_in_2\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[7\]/HLD_OVR
+ gpio_control_in_2\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_2\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[7\]/INP_DIS
+ gpio_control_in_2\[7\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[7\]/OUT
+ gpio_control_in_2\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[7\]/OE_N
+ gpio_control_in_2\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/SLOW
+ gpio_control_in_2\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_2\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[59\]/A
+ gpio_control_in_2\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_2\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_2\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[8\]/one
+  gpio_control_in_2\[8\]/ANTENNA_input1_A/DIODE
+  gpio_control_in_2\[8\]/input1/A
+  padframe/mprj_pads.area2_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_2\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[0]
+ gpio_control_in_2\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[1]
+ gpio_control_in_2\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[2]
+ gpio_control_in_2\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[8\]/HLD_OVR
+ gpio_control_in_2\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_2\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[8\]/INP_DIS
+ gpio_control_in_2\[8\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[8\]/OUT
+ gpio_control_in_2\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[8\]/OE_N
+ gpio_control_in_2\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/SLOW
+ gpio_control_in_2\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_2\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[63\]/A
+ gpio_control_in_2\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_2\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_2\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_2\[9\]/one
+  padframe/mprj_pads.area2_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_2\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[0]
+ gpio_control_in_2\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[1]
+ gpio_control_in_2\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[2]
+ gpio_control_in_2\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[9\]/HLD_OVR
+ gpio_control_in_2\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_2\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[9\]/INP_DIS
+ gpio_control_in_2\[9\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[9\]/OUT
+ gpio_control_in_2\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[9\]/OE_N
+ gpio_control_in_2\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/SLOW
+ gpio_control_in_2\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_2\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[67\]/A
+ gpio_control_in_2\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_2\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_2\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_SEL
+ housekeeping/mgmt_gpio_out[14]
+  sigbuf/signal_buffers\[103\]/A
+ housekeeping/mgmt_gpio_out[15]
+  sigbuf/signal_buffers\[105\]/A
+ housekeeping/mgmt_gpio_out[9]
+  sigbuf/signal_buffers\[97\]/A
+ housekeeping/mgmt_gpio_oeb[35]
+  sigbuf/signal_buffers\[190\]/A
+ housekeeping/mgmt_gpio_oeb[36]
+  sigbuf/signal_buffers\[192\]/A
+ housekeeping/mgmt_gpio_oeb[37]
+  sigbuf/signal_buffers\[194\]/A
+ housekeeping/mgmt_gpio_out[10]
+  sigbuf/signal_buffers\[98\]/A
+ housekeeping/mgmt_gpio_out[11]
+  sigbuf/signal_buffers\[99\]/A
+ housekeeping/mgmt_gpio_out[12]
+  sigbuf/signal_buffers\[100\]/A
+ housekeeping/mgmt_gpio_out[13]
+  sigbuf/signal_buffers\[101\]/A
+ housekeeping/mgmt_gpio_out[16]
+  sigbuf/signal_buffers\[108\]/A
+ housekeeping/mgmt_gpio_out[17]
+  sigbuf/signal_buffers\[111\]/A
+ housekeeping/mgmt_gpio_out[18]
+  sigbuf/signal_buffers\[114\]/A
+ housekeeping/mgmt_gpio_out[19]
+  sigbuf/signal_buffers\[118\]/A
+ housekeeping/mgmt_gpio_out[20]
+  sigbuf/signal_buffers\[124\]/A
+ housekeeping/mgmt_gpio_out[21]
+  sigbuf/signal_buffers\[130\]/A
+ housekeeping/mgmt_gpio_out[22]
+  sigbuf/signal_buffers\[136\]/A
+ housekeeping/mgmt_gpio_out[23]
+  sigbuf/signal_buffers\[141\]/A
+ housekeeping/mgmt_gpio_out[24]
+  sigbuf/signal_buffers\[146\]/A
+ housekeeping/mgmt_gpio_out[25]
+  sigbuf/signal_buffers\[150\]/A
+ housekeeping/mgmt_gpio_out[26]
+  sigbuf/signal_buffers\[154\]/A
+ housekeeping/mgmt_gpio_out[27]
+  sigbuf/signal_buffers\[158\]/A
+ housekeeping/mgmt_gpio_out[28]
+  sigbuf/signal_buffers\[162\]/A
+ housekeeping/mgmt_gpio_out[29]
+  sigbuf/signal_buffers\[166\]/A
+ housekeeping/mgmt_gpio_out[30]
+  sigbuf/signal_buffers\[170\]/A
+ housekeeping/mgmt_gpio_out[31]
+  sigbuf/signal_buffers\[173\]/A
+ housekeeping/mgmt_gpio_out[32]
+  sigbuf/signal_buffers\[176\]/A
+ housekeeping/mgmt_gpio_out[33]
+  sigbuf/signal_buffers\[179\]/A
+ housekeeping/mgmt_gpio_out[34]
+  sigbuf/signal_buffers\[182\]/A
+ housekeeping/mgmt_gpio_out[35]
+  sigbuf/signal_buffers\[184\]/A
+ housekeeping/mgmt_gpio_out[36]
+  sigbuf/signal_buffers\[186\]/A
+ housekeeping/mgmt_gpio_out[37]
+  sigbuf/signal_buffers\[188\]/A
+ housekeeping/mgmt_gpio_out[7]
+  sigbuf/signal_buffers\[95\]/A
+ housekeeping/mgmt_gpio_out[8]
+  sigbuf/signal_buffers\[96\]/A
+ mgmt_buffers/mprj_dat_o_user[0]
+  mprj/mprj/input1/A
+  mprj/mprj/ANTENNA_input1_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[10]
+  mprj/mprj/input11/A
+  mprj/mprj/ANTENNA_input11_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[11]
+  mprj/mprj/input12/A
+  mprj/mprj/ANTENNA_input12_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[12]
+  mprj/mprj/input13/A
+  mprj/mprj/ANTENNA_input13_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[13]
+  mprj/mprj/input14/A
+  mprj/mprj/ANTENNA_input14_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[14]
+  mprj/mprj/input15/A
+  mprj/mprj/ANTENNA_input15_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[15]
+  mprj/mprj/input16/A
+  mprj/mprj/ANTENNA_input16_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[1]
+  mprj/mprj/input2/A
+  mprj/mprj/ANTENNA_input2_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[2]
+  mprj/mprj/input3/A
+  mprj/mprj/ANTENNA_input3_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[3]
+  mprj/mprj/input4/A
+  mprj/mprj/ANTENNA_input4_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[4]
+  mprj/mprj/input5/A
+  mprj/mprj/ANTENNA_input5_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[5]
+  mprj/mprj/input6/A
+  mprj/mprj/ANTENNA_input6_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[6]
+  mprj/mprj/input7/A
+  mprj/mprj/ANTENNA_input7_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[7]
+  mprj/mprj/input8/A
+  mprj/mprj/ANTENNA_input8_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[8]
+  mprj/mprj/input9/A
+  mprj/mprj/ANTENNA_input9_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[9]
+  mprj/mprj/input10/A
+  mprj/mprj/ANTENNA_input10_A/DIODE
+ soc/gpio_inenb_pad
+  padframe/gpio_pad/INP_DIS
+ soc/gpio_mode0_pad
+  padframe/gpio_pad/DM[0]
+ soc/gpio_mode1_pad
+  padframe/gpio_pad/DM[2]
+  padframe/gpio_pad/DM[1]
+ soc/gpio_out_pad
+  padframe/gpio_pad/OUT
+ soc/gpio_outenb_pad
+  padframe/gpio_pad/OE_N
+ soc/por_l_out
+  padframe/clock_pad/INP_DIS

signoff/caravel/openlane-signoff/timing/max/t-clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/t-clk-max.rpt b/signoff/caravel/openlane-signoff/timing/max/t-clk-max.rpt
new file mode 100644
index 0000000..a7913d3
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:846b96365717efdee76f81d6b175d9f1acd3435c093b0c4fb2176c16b788528f
+size 28012833

signoff/caravel/openlane-signoff/timing/max/t-clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/t-clk-min.rpt b/signoff/caravel/openlane-signoff/timing/max/t-clk-min.rpt
new file mode 100644
index 0000000..9d0188c
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:4f183f8ef78230278444a8ed68647201cd1287cfbdf9816b87f33e82965f4e94
+size 18827707

signoff/caravel/openlane-signoff/timing/max/t-hk_serial_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/t-hk_serial_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/max/t-hk_serial_clk-max.rpt
new file mode 100644
index 0000000..958c852
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-hk_serial_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0a83480cdf70f23f9a716015c8ea44318d47593b488435d5c7ff0b83f1bc13be
+size 345

signoff/caravel/openlane-signoff/timing/max/t-hk_serial_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/t-hk_serial_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/max/t-hk_serial_clk-min.rpt
new file mode 100644
index 0000000..c962a69
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-hk_serial_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:83dbc49f387b497c07880cc4de231913e9740ee3d544f90121df20391bb3163f
+size 11323365

signoff/caravel/openlane-signoff/timing/max/t-hkspi_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/t-hkspi_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/max/t-hkspi_clk-max.rpt
new file mode 100644
index 0000000..0475ecc
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-hkspi_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:34e70a9be45915019d0cb93a5d7b6f4f839bb220603a03668c4d42023cc2eb5c
+size 341

signoff/caravel/openlane-signoff/timing/max/t-hkspi_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/t-hkspi_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/max/t-hkspi_clk-min.rpt
new file mode 100644
index 0000000..ae42f73
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-hkspi_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:d16def9eae4cbee7e84f7d4cd11334c70dbb0dd74edd46d14e0810ed7113029c
+size 6164812

signoff/caravel/openlane-signoff/timing/max/t-max.rpt

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new file mode 100644
index 0000000..0d64600
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:c3188611f785e5773a217345b53e0238a5f77fcb93398330686bfcbaafa242f4
+size 284414698

signoff/caravel/openlane-signoff/timing/max/t-min.rpt

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new file mode 100644
index 0000000..29fbe89
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:3e5a14d695447e56b84fa5720a379d4c31625b3e60280f2e3bba227ec1f18b8d
+size 264195964

signoff/caravel/openlane-signoff/timing/max/t-mprj-max.rpt

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new file mode 100644
index 0000000..47e8a0a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-mprj-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:d574f1016584547de520bd3e18fd9de5f65dcd4eb011dea116dac503eeeea34d
+size 533321

signoff/caravel/openlane-signoff/timing/max/t-mprj-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/max/t-mprj-min.rpt b/signoff/caravel/openlane-signoff/timing/max/t-mprj-min.rpt
new file mode 100644
index 0000000..068ce3a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-mprj-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:017dd111a61f93fa33c311a876743db985d5beeb83410255f2c6da95f0f2e708
+size 452494

signoff/caravel/openlane-signoff/timing/max/t-soc-max.rpt

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new file mode 100644
index 0000000..89fb82f
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-soc-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:42c48e390f8b9176c07877b638a5e37c7a4a914f93336dfe3b13e2b3855cdc32
+size 408012

signoff/caravel/openlane-signoff/timing/max/t-soc-min.rpt

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new file mode 100644
index 0000000..3b85429
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-soc-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:84bc48c08d07d69227bf81150168c3f0f9d4b8f3b34b846265078e0ac9f451d1
+size 18067731

signoff/caravel/openlane-signoff/timing/max/t-summary.rpt

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new file mode 100644
index 0000000..8f3cc90
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-summary.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:5b01bfc129a56aa6b7aa9cf2ee4582dd4194037e2e40691dd5d9dac48f17330c
+size 3297454

signoff/caravel/openlane-signoff/timing/max/t-unannotated.log

diff --git a/signoff/caravel/openlane-signoff/timing/max/t-unannotated.log b/signoff/caravel/openlane-signoff/timing/max/t-unannotated.log
new file mode 100644
index 0000000..aba1759
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/max/t-unannotated.log
@@ -0,0 +1,4179 @@
+Found 2894 unannotated nets.
+ padframe/flash_clk
+ padframe/mprj_analog_io[26]
+ mprj_io[28]
+ vssa2
+ vssa1
+ vdda1
+ mprj_io[4]
+ mprj_io[5]
+ mprj_io[19]
+ vssa1_2
+ vdda2
+ mprj_io[2]
+ mprj_io[3]
+ mprj_io[14]
+ mprj_io[33]
+ mprj_io[34]
+ resetb
+ mprj_io[1]
+ mprj_io[8]
+ mprj_io[9]
+ mprj_io[6]
+ mprj_io[11]
+ mprj_io[13]
+ mprj_io[15]
+ mprj_io[17]
+ mprj_io[18]
+ mprj_io[20]
+ mprj_io[23]
+ mprj_io[16]
+ mprj_io[27]
+ mprj_io[29]
+ mprj_io[32]
+ vssd2
+ vccd1
+ clock
+ gpio
+ vssd
+ vdda
+ mprj_io[37]
+ vccd
+ vssa
+ vssio
+ mprj_io[30]
+ vssd1
+ vssio_2
+ vddio
+ mprj_io[36]
+ vddio_2
+ mprj_io[31]
+ vccd2
+ vdda1_2
+ mprj_io[21]
+ mprj_io[26]
+ mprj_io[35]
+ mprj_io[0]
+ mprj_io[22]
+ mprj_io[24]
+ mprj_io[25]
+ mprj_io[7]
+ mprj_io[12]
+ mprj_io[10]
+ gpio_control_bidir_2\[2\]/_053_
+ gpio_control_bidir_2\[2\]/_052_
+ gpio_control_bidir_2\[2\]/_051_
+ gpio_control_bidir_2\[2\]/_050_
+ gpio_control_bidir_2\[2\]/_049_
+ gpio_control_bidir_2\[2\]/_048_
+ gpio_control_bidir_2\[2\]/_047_
+ gpio_control_bidir_2\[2\]/_046_
+ gpio_control_bidir_2\[2\]/_057_
+ gpio_control_bidir_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[7\]/_052_
+ gpio_control_in_1\[7\]/_056_
+ gpio_control_in_1\[7\]/_055_
+ gpio_control_in_1\[7\]/_054_
+ gpio_control_in_1\[7\]/_053_
+ gpio_control_in_1\[7\]/_051_
+ gpio_control_in_1\[7\]/_050_
+ gpio_control_in_1\[7\]/_049_
+ gpio_control_in_1\[7\]/_048_
+ gpio_control_in_1\[7\]/_047_
+ gpio_control_in_1\[7\]/_046_
+ gpio_control_in_1\[7\]/_057_
+ gpio_control_in_1\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_047_
+ gpio_control_in_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_049_
+ gpio_control_in_2\[0\]/_048_
+ gpio_control_in_2\[0\]/_046_
+ gpio_control_in_2\[0\]/_057_
+ gpio_control_in_2\[3\]/_047_
+ gpio_control_in_2\[3\]/_052_
+ gpio_control_in_2\[3\]/_051_
+ gpio_control_in_2\[3\]/_050_
+ gpio_control_in_2\[3\]/_049_
+ gpio_control_in_2\[3\]/_048_
+ gpio_control_in_2\[3\]/_046_
+ gpio_control_in_2\[3\]/_057_
+ gpio_control_in_2\[3\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_20/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[2\]
+ gpio_defaults_block_21/gpio_defaults_low\[6\]
+ gpio_defaults_block_21/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[3\]
+ gpio_defaults_block_20/gpio_defaults_high\[11\]
+ gpio_defaults_block_20/gpio_defaults_low\[11\]
+ gpio_defaults_block_20/gpio_defaults_high\[12\]
+ gpio_defaults_block_20/gpio_defaults_low\[12\]
+ gpio_defaults_block_20/gpio_defaults_high\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[2\]
+ gpio_defaults_block_20/gpio_defaults_low\[2\]
+ gpio_defaults_block_20/gpio_defaults_high\[4\]
+ gpio_defaults_block_20/gpio_defaults_low\[4\]
+ gpio_defaults_block_20/gpio_defaults_high\[5\]
+ gpio_defaults_block_20/gpio_defaults_low\[5\]
+ gpio_defaults_block_20/gpio_defaults_high\[6\]
+ gpio_defaults_block_20/gpio_defaults_low\[6\]
+ gpio_defaults_block_20/gpio_defaults_high\[7\]
+ gpio_defaults_block_20/gpio_defaults_low\[7\]
+ gpio_defaults_block_20/gpio_defaults_high\[8\]
+ gpio_defaults_block_20/gpio_defaults_low\[8\]
+ gpio_defaults_block_20/gpio_defaults_high\[9\]
+ gpio_defaults_block_20/gpio_defaults_low\[9\]
+ gpio_defaults_block_21/gpio_defaults_high\[0\]
+ gpio_defaults_block_21/gpio_defaults_low\[0\]
+ gpio_defaults_block_21/gpio_defaults_high\[10\]
+ gpio_defaults_block_21/gpio_defaults_low\[10\]
+ gpio_defaults_block_21/gpio_defaults_high\[11\]
+ gpio_defaults_block_21/gpio_defaults_low\[11\]
+ gpio_defaults_block_21/gpio_defaults_high\[12\]
+ gpio_defaults_block_21/gpio_defaults_low\[12\]
+ gpio_defaults_block_21/gpio_defaults_high\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[2\]
+ gpio_defaults_block_21/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_low\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[4\]
+ gpio_defaults_block_21/gpio_defaults_low\[4\]
+ gpio_defaults_block_21/gpio_defaults_high\[5\]
+ gpio_defaults_block_21/gpio_defaults_low\[5\]
+ gpio_defaults_block_21/gpio_defaults_high\[6\]
+ gpio_defaults_block_21/gpio_defaults_high\[7\]
+ gpio_defaults_block_21/gpio_defaults_high\[8\]
+ gpio_defaults_block_21/gpio_defaults_low\[8\]
+ gpio_defaults_block_21/gpio_defaults_high\[9\]
+ gpio_defaults_block_21/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[2\]
+ gpio_defaults_block_19/gpio_defaults_high\[3\]
+ gpio_defaults_block_19/gpio_defaults_low\[3\]
+ gpio_defaults_block_19/gpio_defaults_high\[4\]
+ gpio_defaults_block_19/gpio_defaults_low\[4\]
+ gpio_defaults_block_19/gpio_defaults_high\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[6\]
+ gpio_defaults_block_19/gpio_defaults_high\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[8\]
+ gpio_defaults_block_19/gpio_defaults_low\[8\]
+ gpio_defaults_block_19/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[9\]
+ gpio_defaults_block_2/gpio_defaults_high\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[10\]
+ gpio_defaults_block_2/gpio_defaults_low\[10\]
+ gpio_defaults_block_2/gpio_defaults_high\[11\]
+ gpio_defaults_block_2/gpio_defaults_low\[11\]
+ gpio_defaults_block_2/gpio_defaults_high\[12\]
+ gpio_defaults_block_2/gpio_defaults_low\[12\]
+ gpio_defaults_block_2/gpio_defaults_high\[1\]
+ gpio_defaults_block_2/gpio_defaults_high\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_high\[4\]
+ gpio_defaults_block_2/gpio_defaults_low\[4\]
+ gpio_defaults_block_2/gpio_defaults_high\[5\]
+ gpio_defaults_block_2/gpio_defaults_low\[5\]
+ gpio_defaults_block_2/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[7\]
+ gpio_defaults_block_2/gpio_defaults_low\[7\]
+ gpio_defaults_block_2/gpio_defaults_high\[8\]
+ gpio_defaults_block_2/gpio_defaults_low\[8\]
+ gpio_defaults_block_2/gpio_defaults_high\[9\]
+ gpio_defaults_block_2/gpio_defaults_low\[9\]
+ gpio_defaults_block_20/gpio_defaults_high\[0\]
+ gpio_defaults_block_20/gpio_defaults_low\[0\]
+ gpio_defaults_block_20/gpio_defaults_high\[10\]
+ gpio_defaults_block_20/gpio_defaults_low\[10\]
+ padframe/mprj_analog_io[7]
+ padframe/flash_io0
+ padframe/flash_io0_di_core
+ gpio_control_bidir_1\[0\]/_056_
+ gpio_control_bidir_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_1\[0\]/_051_
+ gpio_control_bidir_1\[0\]/_055_
+ gpio_control_bidir_1\[0\]/_054_
+ gpio_control_bidir_1\[0\]/_053_
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+ gpio_control_bidir_2\[2\]/_054_
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+ gpio_control_in_2\[8\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[4\]
+ gpio_defaults_block_0/gpio_defaults_low\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[9\]
+ gpio_control_in_2\[9\]/_051_
+ gpio_control_in_2\[9\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[0\]
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+ gpio_defaults_block_0/gpio_defaults_high\[10\]
+ gpio_defaults_block_0/gpio_defaults_low\[10\]
+ gpio_defaults_block_0/gpio_defaults_high\[11\]
+ gpio_defaults_block_0/gpio_defaults_low\[11\]
+ gpio_defaults_block_0/gpio_defaults_high\[12\]
+ gpio_defaults_block_0/gpio_defaults_low\[12\]
+ gpio_defaults_block_0/gpio_defaults_high\[1\]
+ gpio_defaults_block_0/gpio_defaults_low\[1\]
+ gpio_defaults_block_0/gpio_defaults_high\[2\]
+ gpio_defaults_block_0/gpio_defaults_low\[2\]
+ gpio_defaults_block_0/gpio_defaults_high\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[4\]
+ gpio_defaults_block_0/gpio_defaults_high\[5\]
+ gpio_defaults_block_0/gpio_defaults_low\[5\]
+ gpio_defaults_block_0/gpio_defaults_high\[6\]
+ gpio_defaults_block_0/gpio_defaults_low\[6\]
+ gpio_defaults_block_0/gpio_defaults_high\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[9\]
+ gpio_control_in_2\[9\]/_056_
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+ gpio_control_in_2\[9\]/_057_
+ gpio_defaults_block_11/gpio_defaults_low\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[0\]
+ gpio_defaults_block_11/gpio_defaults_low\[0\]
+ gpio_defaults_block_11/gpio_defaults_high\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[11\]
+ gpio_defaults_block_11/gpio_defaults_low\[11\]
+ gpio_defaults_block_11/gpio_defaults_high\[12\]
+ gpio_defaults_block_11/gpio_defaults_low\[12\]
+ gpio_defaults_block_11/gpio_defaults_high\[1\]
+ gpio_defaults_block_11/gpio_defaults_low\[1\]
+ gpio_defaults_block_11/gpio_defaults_high\[2\]
+ gpio_defaults_block_11/gpio_defaults_low\[2\]
+ gpio_defaults_block_11/gpio_defaults_high\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[9\]
+ gpio_defaults_block_11/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[0\]
+ gpio_defaults_block_12/gpio_defaults_low\[0\]
+ gpio_defaults_block_12/gpio_defaults_high\[10\]
+ gpio_defaults_block_12/gpio_defaults_low\[10\]
+ gpio_defaults_block_12/gpio_defaults_high\[11\]
+ gpio_defaults_block_12/gpio_defaults_low\[11\]
+ gpio_defaults_block_12/gpio_defaults_high\[12\]
+ gpio_defaults_block_12/gpio_defaults_low\[12\]
+ gpio_defaults_block_12/gpio_defaults_high\[1\]
+ gpio_defaults_block_12/gpio_defaults_low\[1\]
+ gpio_defaults_block_12/gpio_defaults_high\[2\]
+ gpio_defaults_block_12/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[0\]
+ gpio_defaults_block_1/gpio_defaults_low\[0\]
+ gpio_defaults_block_1/gpio_defaults_high\[10\]
+ gpio_defaults_block_1/gpio_defaults_low\[10\]
+ gpio_defaults_block_1/gpio_defaults_high\[11\]
+ gpio_defaults_block_1/gpio_defaults_low\[11\]
+ gpio_defaults_block_1/gpio_defaults_high\[12\]
+ gpio_defaults_block_1/gpio_defaults_low\[12\]
+ gpio_defaults_block_1/gpio_defaults_high\[1\]
+ gpio_defaults_block_1/gpio_defaults_low\[1\]
+ gpio_defaults_block_1/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[4\]
+ gpio_defaults_block_1/gpio_defaults_high\[5\]
+ gpio_defaults_block_1/gpio_defaults_low\[5\]
+ gpio_defaults_block_1/gpio_defaults_high\[6\]
+ gpio_defaults_block_1/gpio_defaults_low\[6\]
+ gpio_defaults_block_1/gpio_defaults_high\[7\]
+ gpio_defaults_block_1/gpio_defaults_low\[7\]
+ gpio_defaults_block_1/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_low\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[9\]
+ gpio_defaults_block_1/gpio_defaults_low\[9\]
+ gpio_defaults_block_10/gpio_defaults_high\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[11\]
+ gpio_defaults_block_10/gpio_defaults_low\[11\]
+ gpio_defaults_block_10/gpio_defaults_high\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[2\]
+ gpio_defaults_block_10/gpio_defaults_low\[2\]
+ gpio_defaults_block_10/gpio_defaults_high\[3\]
+ gpio_defaults_block_10/gpio_defaults_low\[3\]
+ gpio_defaults_block_10/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_low\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[5\]
+ gpio_defaults_block_10/gpio_defaults_low\[5\]
+ gpio_defaults_block_10/gpio_defaults_high\[6\]
+ gpio_defaults_block_10/gpio_defaults_low\[6\]
+ gpio_defaults_block_10/gpio_defaults_high\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[8\]
+ gpio_defaults_block_10/gpio_defaults_high\[9\]
+ gpio_defaults_block_10/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[10\]
+ gpio_defaults_block_15/gpio_defaults_low\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[7\]
+ gpio_defaults_block_15/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[11\]
+ gpio_defaults_block_13/gpio_defaults_low\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[10\]
+ gpio_defaults_block_14/gpio_defaults_low\[11\]
+ gpio_defaults_block_14/gpio_defaults_high\[12\]
+ gpio_defaults_block_14/gpio_defaults_low\[12\]
+ gpio_defaults_block_14/gpio_defaults_high\[1\]
+ gpio_defaults_block_14/gpio_defaults_low\[1\]
+ gpio_defaults_block_14/gpio_defaults_high\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[5\]
+ gpio_defaults_block_14/gpio_defaults_high\[6\]
+ gpio_defaults_block_14/gpio_defaults_low\[6\]
+ gpio_defaults_block_14/gpio_defaults_high\[7\]
+ gpio_defaults_block_14/gpio_defaults_low\[7\]
+ gpio_defaults_block_14/gpio_defaults_high\[8\]
+ gpio_defaults_block_14/gpio_defaults_low\[8\]
+ gpio_defaults_block_14/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_low\[9\]
+ gpio_defaults_block_15/gpio_defaults_high\[0\]
+ gpio_defaults_block_15/gpio_defaults_low\[0\]
+ gpio_defaults_block_15/gpio_defaults_high\[10\]
+ gpio_defaults_block_15/gpio_defaults_high\[11\]
+ gpio_defaults_block_15/gpio_defaults_low\[11\]
+ gpio_defaults_block_15/gpio_defaults_high\[12\]
+ gpio_defaults_block_15/gpio_defaults_low\[12\]
+ gpio_defaults_block_15/gpio_defaults_high\[1\]
+ gpio_defaults_block_15/gpio_defaults_low\[1\]
+ gpio_defaults_block_15/gpio_defaults_high\[2\]
+ gpio_defaults_block_15/gpio_defaults_low\[2\]
+ gpio_defaults_block_15/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_high\[5\]
+ gpio_defaults_block_15/gpio_defaults_low\[5\]
+ gpio_defaults_block_15/gpio_defaults_high\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[7\]
+ gpio_defaults_block_15/gpio_defaults_high\[8\]
+ gpio_defaults_block_15/gpio_defaults_high\[9\]
+ gpio_defaults_block_15/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[3\]
+ gpio_defaults_block_12/gpio_defaults_low\[3\]
+ gpio_defaults_block_12/gpio_defaults_high\[4\]
+ gpio_defaults_block_12/gpio_defaults_low\[4\]
+ gpio_defaults_block_12/gpio_defaults_high\[5\]
+ gpio_defaults_block_12/gpio_defaults_low\[5\]
+ gpio_defaults_block_12/gpio_defaults_high\[6\]
+ gpio_defaults_block_12/gpio_defaults_low\[6\]
+ gpio_defaults_block_12/gpio_defaults_high\[7\]
+ gpio_defaults_block_12/gpio_defaults_high\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_low\[9\]
+ gpio_defaults_block_13/gpio_defaults_high\[0\]
+ gpio_defaults_block_13/gpio_defaults_low\[0\]
+ gpio_defaults_block_13/gpio_defaults_high\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[11\]
+ gpio_defaults_block_13/gpio_defaults_high\[12\]
+ gpio_defaults_block_13/gpio_defaults_low\[12\]
+ gpio_defaults_block_13/gpio_defaults_high\[1\]
+ gpio_defaults_block_13/gpio_defaults_low\[1\]
+ gpio_defaults_block_13/gpio_defaults_high\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[3\]
+ gpio_defaults_block_13/gpio_defaults_high\[4\]
+ gpio_defaults_block_13/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_low\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[6\]
+ gpio_defaults_block_13/gpio_defaults_low\[6\]
+ gpio_defaults_block_13/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[8\]
+ gpio_defaults_block_13/gpio_defaults_low\[8\]
+ gpio_defaults_block_13/gpio_defaults_high\[9\]
+ gpio_defaults_block_13/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[0\]
+ gpio_defaults_block_14/gpio_defaults_low\[0\]
+ gpio_defaults_block_14/gpio_defaults_high\[10\]
+ gpio_defaults_block_14/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[3\]
+ gpio_defaults_block_18/gpio_defaults_low\[5\]
+ gpio_defaults_block_18/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[0\]
+ gpio_defaults_block_16/gpio_defaults_low\[10\]
+ gpio_defaults_block_16/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[11\]
+ gpio_defaults_block_17/gpio_defaults_low\[12\]
+ gpio_defaults_block_17/gpio_defaults_low\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[0\]
+ gpio_defaults_block_18/gpio_defaults_low\[0\]
+ gpio_defaults_block_18/gpio_defaults_high\[10\]
+ gpio_defaults_block_18/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[11\]
+ gpio_defaults_block_18/gpio_defaults_high\[12\]
+ gpio_defaults_block_18/gpio_defaults_low\[12\]
+ gpio_defaults_block_18/gpio_defaults_high\[1\]
+ gpio_defaults_block_18/gpio_defaults_low\[1\]
+ gpio_defaults_block_18/gpio_defaults_high\[2\]
+ gpio_defaults_block_18/gpio_defaults_low\[2\]
+ gpio_defaults_block_18/gpio_defaults_high\[3\]
+ gpio_defaults_block_18/gpio_defaults_high\[4\]
+ gpio_defaults_block_18/gpio_defaults_low\[4\]
+ gpio_defaults_block_18/gpio_defaults_high\[5\]
+ gpio_defaults_block_18/gpio_defaults_high\[6\]
+ gpio_defaults_block_18/gpio_defaults_low\[6\]
+ gpio_defaults_block_18/gpio_defaults_high\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[8\]
+ gpio_defaults_block_18/gpio_defaults_low\[8\]
+ gpio_defaults_block_18/gpio_defaults_high\[9\]
+ gpio_defaults_block_18/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[0\]
+ gpio_defaults_block_19/gpio_defaults_low\[0\]
+ gpio_defaults_block_19/gpio_defaults_high\[10\]
+ gpio_defaults_block_19/gpio_defaults_low\[10\]
+ gpio_defaults_block_19/gpio_defaults_high\[11\]
+ gpio_defaults_block_19/gpio_defaults_high\[12\]
+ gpio_defaults_block_19/gpio_defaults_low\[12\]
+ gpio_defaults_block_19/gpio_defaults_high\[1\]
+ gpio_defaults_block_19/gpio_defaults_low\[1\]
+ gpio_defaults_block_19/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[0\]
+ gpio_defaults_block_16/gpio_defaults_high\[10\]
+ gpio_defaults_block_16/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_high\[12\]
+ gpio_defaults_block_16/gpio_defaults_low\[12\]
+ gpio_defaults_block_16/gpio_defaults_high\[1\]
+ gpio_defaults_block_16/gpio_defaults_low\[1\]
+ gpio_defaults_block_16/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_low\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[3\]
+ gpio_defaults_block_16/gpio_defaults_high\[4\]
+ gpio_defaults_block_16/gpio_defaults_low\[4\]
+ gpio_defaults_block_16/gpio_defaults_high\[5\]
+ gpio_defaults_block_16/gpio_defaults_low\[5\]
+ gpio_defaults_block_16/gpio_defaults_high\[6\]
+ gpio_defaults_block_16/gpio_defaults_low\[6\]
+ gpio_defaults_block_16/gpio_defaults_high\[7\]
+ gpio_defaults_block_16/gpio_defaults_low\[7\]
+ gpio_defaults_block_16/gpio_defaults_high\[8\]
+ gpio_defaults_block_16/gpio_defaults_low\[8\]
+ gpio_defaults_block_16/gpio_defaults_high\[9\]
+ gpio_defaults_block_16/gpio_defaults_low\[9\]
+ gpio_defaults_block_17/gpio_defaults_high\[0\]
+ gpio_defaults_block_17/gpio_defaults_low\[0\]
+ gpio_defaults_block_17/gpio_defaults_high\[10\]
+ gpio_defaults_block_17/gpio_defaults_low\[10\]
+ gpio_defaults_block_17/gpio_defaults_high\[11\]
+ gpio_defaults_block_17/gpio_defaults_high\[12\]
+ gpio_defaults_block_17/gpio_defaults_high\[1\]
+ gpio_defaults_block_17/gpio_defaults_low\[1\]
+ gpio_defaults_block_17/gpio_defaults_high\[2\]
+ gpio_defaults_block_17/gpio_defaults_low\[2\]
+ gpio_defaults_block_17/gpio_defaults_high\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_high\[4\]
+ gpio_defaults_block_17/gpio_defaults_low\[4\]
+ gpio_defaults_block_17/gpio_defaults_high\[5\]
+ gpio_defaults_block_17/gpio_defaults_low\[5\]
+ gpio_defaults_block_17/gpio_defaults_high\[6\]
+ gpio_defaults_block_17/gpio_defaults_low\[6\]
+ gpio_defaults_block_17/gpio_defaults_high\[7\]
+ gpio_defaults_block_17/gpio_defaults_high\[8\]
+ gpio_defaults_block_17/gpio_defaults_low\[8\]
+ gpio_defaults_block_17/gpio_defaults_high\[9\]
+ gpio_defaults_block_17/gpio_defaults_low\[9\]
+ gpio_defaults_block_24/gpio_defaults_high\[10\]
+ gpio_defaults_block_24/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[6\]
+ gpio_defaults_block_22/gpio_defaults_low\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[10\]
+ gpio_defaults_block_24/gpio_defaults_high\[11\]
+ gpio_defaults_block_24/gpio_defaults_low\[11\]
+ gpio_defaults_block_24/gpio_defaults_high\[12\]
+ gpio_defaults_block_24/gpio_defaults_low\[12\]
+ gpio_defaults_block_24/gpio_defaults_high\[1\]
+ gpio_defaults_block_24/gpio_defaults_low\[1\]
+ gpio_defaults_block_24/gpio_defaults_high\[2\]
+ gpio_defaults_block_24/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_low\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[4\]
+ gpio_defaults_block_24/gpio_defaults_low\[4\]
+ gpio_defaults_block_24/gpio_defaults_high\[5\]
+ gpio_defaults_block_24/gpio_defaults_low\[5\]
+ gpio_defaults_block_24/gpio_defaults_high\[6\]
+ gpio_defaults_block_24/gpio_defaults_low\[6\]
+ gpio_defaults_block_24/gpio_defaults_high\[7\]
+ gpio_defaults_block_24/gpio_defaults_low\[7\]
+ gpio_defaults_block_24/gpio_defaults_high\[8\]
+ gpio_defaults_block_24/gpio_defaults_low\[8\]
+ gpio_defaults_block_24/gpio_defaults_high\[9\]
+ gpio_defaults_block_24/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_high\[0\]
+ gpio_defaults_block_25/gpio_defaults_low\[0\]
+ gpio_defaults_block_25/gpio_defaults_high\[10\]
+ gpio_defaults_block_25/gpio_defaults_low\[10\]
+ gpio_defaults_block_25/gpio_defaults_high\[11\]
+ gpio_defaults_block_25/gpio_defaults_low\[11\]
+ gpio_defaults_block_25/gpio_defaults_high\[12\]
+ gpio_defaults_block_25/gpio_defaults_low\[12\]
+ gpio_defaults_block_25/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[0\]
+ gpio_defaults_block_22/gpio_defaults_low\[0\]
+ gpio_defaults_block_22/gpio_defaults_high\[10\]
+ gpio_defaults_block_22/gpio_defaults_low\[10\]
+ gpio_defaults_block_22/gpio_defaults_high\[11\]
+ gpio_defaults_block_22/gpio_defaults_low\[11\]
+ gpio_defaults_block_22/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_low\[12\]
+ gpio_defaults_block_22/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_low\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[2\]
+ gpio_defaults_block_22/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[3\]
+ gpio_defaults_block_22/gpio_defaults_low\[3\]
+ gpio_defaults_block_22/gpio_defaults_high\[4\]
+ gpio_defaults_block_22/gpio_defaults_low\[4\]
+ gpio_defaults_block_22/gpio_defaults_high\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[6\]
+ gpio_defaults_block_22/gpio_defaults_high\[7\]
+ gpio_defaults_block_22/gpio_defaults_low\[7\]
+ gpio_defaults_block_22/gpio_defaults_high\[8\]
+ gpio_defaults_block_22/gpio_defaults_low\[8\]
+ gpio_defaults_block_22/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[11\]
+ gpio_defaults_block_23/gpio_defaults_low\[11\]
+ gpio_defaults_block_23/gpio_defaults_high\[12\]
+ gpio_defaults_block_23/gpio_defaults_low\[12\]
+ gpio_defaults_block_23/gpio_defaults_high\[1\]
+ gpio_defaults_block_23/gpio_defaults_low\[1\]
+ gpio_defaults_block_23/gpio_defaults_high\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[3\]
+ gpio_defaults_block_23/gpio_defaults_high\[4\]
+ gpio_defaults_block_23/gpio_defaults_low\[4\]
+ gpio_defaults_block_23/gpio_defaults_high\[5\]
+ gpio_defaults_block_23/gpio_defaults_low\[5\]
+ gpio_defaults_block_23/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_low\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[7\]
+ gpio_defaults_block_23/gpio_defaults_low\[7\]
+ gpio_defaults_block_23/gpio_defaults_high\[8\]
+ gpio_defaults_block_23/gpio_defaults_low\[8\]
+ gpio_defaults_block_23/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_low\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[11\]
+ gpio_defaults_block_28/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_low\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[11\]
+ gpio_defaults_block_27/gpio_defaults_high\[12\]
+ gpio_defaults_block_27/gpio_defaults_low\[12\]
+ gpio_defaults_block_27/gpio_defaults_high\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[3\]
+ gpio_defaults_block_27/gpio_defaults_low\[3\]
+ gpio_defaults_block_27/gpio_defaults_high\[4\]
+ gpio_defaults_block_27/gpio_defaults_high\[5\]
+ gpio_defaults_block_27/gpio_defaults_low\[5\]
+ gpio_defaults_block_27/gpio_defaults_high\[6\]
+ gpio_defaults_block_27/gpio_defaults_low\[6\]
+ gpio_defaults_block_27/gpio_defaults_high\[7\]
+ gpio_defaults_block_27/gpio_defaults_low\[7\]
+ gpio_defaults_block_27/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_high\[0\]
+ gpio_defaults_block_28/gpio_defaults_low\[0\]
+ gpio_defaults_block_28/gpio_defaults_high\[10\]
+ gpio_defaults_block_28/gpio_defaults_low\[10\]
+ gpio_defaults_block_28/gpio_defaults_high\[11\]
+ gpio_defaults_block_28/gpio_defaults_high\[12\]
+ gpio_defaults_block_28/gpio_defaults_low\[12\]
+ gpio_defaults_block_28/gpio_defaults_high\[1\]
+ gpio_defaults_block_28/gpio_defaults_low\[1\]
+ gpio_defaults_block_28/gpio_defaults_high\[2\]
+ gpio_defaults_block_28/gpio_defaults_low\[2\]
+ gpio_defaults_block_28/gpio_defaults_high\[3\]
+ gpio_defaults_block_28/gpio_defaults_low\[3\]
+ gpio_defaults_block_28/gpio_defaults_high\[4\]
+ gpio_defaults_block_28/gpio_defaults_low\[4\]
+ gpio_defaults_block_28/gpio_defaults_high\[5\]
+ gpio_defaults_block_28/gpio_defaults_high\[6\]
+ gpio_defaults_block_28/gpio_defaults_low\[6\]
+ gpio_defaults_block_28/gpio_defaults_high\[7\]
+ gpio_defaults_block_28/gpio_defaults_low\[7\]
+ gpio_defaults_block_28/gpio_defaults_high\[8\]
+ gpio_defaults_block_28/gpio_defaults_low\[8\]
+ gpio_defaults_block_28/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[1\]
+ gpio_defaults_block_25/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_low\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[3\]
+ gpio_defaults_block_25/gpio_defaults_low\[3\]
+ gpio_defaults_block_25/gpio_defaults_high\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_high\[6\]
+ gpio_defaults_block_25/gpio_defaults_low\[6\]
+ gpio_defaults_block_25/gpio_defaults_high\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[8\]
+ gpio_defaults_block_25/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[10\]
+ gpio_defaults_block_26/gpio_defaults_low\[10\]
+ gpio_defaults_block_26/gpio_defaults_high\[11\]
+ gpio_defaults_block_26/gpio_defaults_low\[11\]
+ gpio_defaults_block_26/gpio_defaults_high\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[2\]
+ gpio_defaults_block_26/gpio_defaults_high\[3\]
+ gpio_defaults_block_26/gpio_defaults_low\[3\]
+ gpio_defaults_block_26/gpio_defaults_high\[4\]
+ gpio_defaults_block_26/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[5\]
+ gpio_defaults_block_26/gpio_defaults_low\[5\]
+ gpio_defaults_block_26/gpio_defaults_high\[6\]
+ gpio_defaults_block_26/gpio_defaults_low\[6\]
+ gpio_defaults_block_26/gpio_defaults_high\[7\]
+ gpio_defaults_block_26/gpio_defaults_low\[7\]
+ gpio_defaults_block_26/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_high\[0\]
+ gpio_defaults_block_27/gpio_defaults_low\[0\]
+ gpio_defaults_block_27/gpio_defaults_high\[10\]
+ gpio_defaults_block_27/gpio_defaults_low\[10\]
+ gpio_defaults_block_27/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[2\]
+ gpio_defaults_block_30/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[9\]
+ gpio_defaults_block_3/gpio_defaults_low\[2\]
+ gpio_defaults_block_3/gpio_defaults_low\[9\]
+ gpio_defaults_block_30/gpio_defaults_high\[0\]
+ gpio_defaults_block_30/gpio_defaults_low\[0\]
+ gpio_defaults_block_30/gpio_defaults_high\[10\]
+ gpio_defaults_block_30/gpio_defaults_low\[10\]
+ gpio_defaults_block_30/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_low\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[12\]
+ gpio_defaults_block_30/gpio_defaults_low\[12\]
+ gpio_defaults_block_30/gpio_defaults_high\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[2\]
+ gpio_defaults_block_30/gpio_defaults_high\[3\]
+ gpio_defaults_block_30/gpio_defaults_low\[3\]
+ gpio_defaults_block_30/gpio_defaults_high\[4\]
+ gpio_defaults_block_30/gpio_defaults_low\[4\]
+ gpio_defaults_block_30/gpio_defaults_high\[5\]
+ gpio_defaults_block_30/gpio_defaults_low\[5\]
+ gpio_defaults_block_30/gpio_defaults_high\[6\]
+ gpio_defaults_block_30/gpio_defaults_low\[6\]
+ gpio_defaults_block_30/gpio_defaults_high\[7\]
+ gpio_defaults_block_30/gpio_defaults_low\[7\]
+ gpio_defaults_block_30/gpio_defaults_high\[8\]
+ gpio_defaults_block_30/gpio_defaults_low\[8\]
+ gpio_defaults_block_30/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[0\]
+ gpio_defaults_block_31/gpio_defaults_low\[0\]
+ gpio_defaults_block_31/gpio_defaults_high\[10\]
+ gpio_defaults_block_31/gpio_defaults_low\[10\]
+ gpio_defaults_block_31/gpio_defaults_high\[11\]
+ gpio_defaults_block_31/gpio_defaults_high\[12\]
+ gpio_defaults_block_31/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[0\]
+ gpio_defaults_block_29/gpio_defaults_low\[0\]
+ gpio_defaults_block_29/gpio_defaults_high\[10\]
+ gpio_defaults_block_29/gpio_defaults_low\[10\]
+ gpio_defaults_block_29/gpio_defaults_high\[11\]
+ gpio_defaults_block_29/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[1\]
+ gpio_defaults_block_29/gpio_defaults_low\[1\]
+ gpio_defaults_block_29/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_low\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[3\]
+ gpio_defaults_block_29/gpio_defaults_low\[3\]
+ gpio_defaults_block_29/gpio_defaults_high\[4\]
+ gpio_defaults_block_29/gpio_defaults_low\[4\]
+ gpio_defaults_block_29/gpio_defaults_high\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[6\]
+ gpio_defaults_block_29/gpio_defaults_low\[6\]
+ gpio_defaults_block_29/gpio_defaults_high\[7\]
+ gpio_defaults_block_29/gpio_defaults_low\[7\]
+ gpio_defaults_block_29/gpio_defaults_high\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[9\]
+ gpio_defaults_block_3/gpio_defaults_high\[0\]
+ gpio_defaults_block_3/gpio_defaults_low\[0\]
+ gpio_defaults_block_3/gpio_defaults_high\[10\]
+ gpio_defaults_block_3/gpio_defaults_low\[10\]
+ gpio_defaults_block_3/gpio_defaults_high\[11\]
+ gpio_defaults_block_3/gpio_defaults_low\[11\]
+ gpio_defaults_block_3/gpio_defaults_high\[12\]
+ gpio_defaults_block_3/gpio_defaults_low\[12\]
+ gpio_defaults_block_3/gpio_defaults_high\[1\]
+ gpio_defaults_block_3/gpio_defaults_low\[1\]
+ gpio_defaults_block_3/gpio_defaults_high\[2\]
+ gpio_defaults_block_3/gpio_defaults_high\[3\]
+ gpio_defaults_block_3/gpio_defaults_low\[3\]
+ gpio_defaults_block_3/gpio_defaults_high\[4\]
+ gpio_defaults_block_3/gpio_defaults_low\[4\]
+ gpio_defaults_block_3/gpio_defaults_high\[5\]
+ gpio_defaults_block_3/gpio_defaults_low\[5\]
+ gpio_defaults_block_3/gpio_defaults_high\[6\]
+ gpio_defaults_block_3/gpio_defaults_low\[6\]
+ gpio_defaults_block_3/gpio_defaults_high\[7\]
+ gpio_defaults_block_3/gpio_defaults_low\[7\]
+ gpio_defaults_block_3/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_low\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[4\]
+ gpio_defaults_block_31/gpio_defaults_low\[7\]
+ gpio_defaults_block_31/gpio_defaults_low\[9\]
+ gpio_defaults_block_32/gpio_defaults_high\[0\]
+ gpio_defaults_block_32/gpio_defaults_low\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_high\[11\]
+ gpio_defaults_block_33/gpio_defaults_low\[11\]
+ gpio_defaults_block_33/gpio_defaults_high\[12\]
+ gpio_defaults_block_33/gpio_defaults_low\[12\]
+ gpio_defaults_block_33/gpio_defaults_high\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[2\]
+ gpio_defaults_block_33/gpio_defaults_low\[2\]
+ gpio_defaults_block_33/gpio_defaults_high\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[4\]
+ gpio_defaults_block_33/gpio_defaults_high\[5\]
+ gpio_defaults_block_33/gpio_defaults_low\[5\]
+ gpio_defaults_block_33/gpio_defaults_high\[6\]
+ gpio_defaults_block_33/gpio_defaults_low\[6\]
+ gpio_defaults_block_33/gpio_defaults_high\[7\]
+ gpio_defaults_block_33/gpio_defaults_low\[7\]
+ gpio_defaults_block_33/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[0\]
+ gpio_defaults_block_34/gpio_defaults_low\[0\]
+ gpio_defaults_block_34/gpio_defaults_high\[10\]
+ gpio_defaults_block_34/gpio_defaults_low\[10\]
+ gpio_defaults_block_34/gpio_defaults_high\[11\]
+ gpio_defaults_block_34/gpio_defaults_low\[11\]
+ gpio_defaults_block_34/gpio_defaults_high\[12\]
+ gpio_defaults_block_34/gpio_defaults_low\[12\]
+ gpio_defaults_block_34/gpio_defaults_high\[1\]
+ gpio_defaults_block_34/gpio_defaults_low\[1\]
+ gpio_defaults_block_34/gpio_defaults_high\[2\]
+ gpio_defaults_block_34/gpio_defaults_low\[2\]
+ gpio_defaults_block_34/gpio_defaults_high\[3\]
+ gpio_defaults_block_34/gpio_defaults_low\[3\]
+ gpio_defaults_block_34/gpio_defaults_high\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[5\]
+ gpio_defaults_block_34/gpio_defaults_high\[6\]
+ gpio_defaults_block_34/gpio_defaults_low\[6\]
+ gpio_defaults_block_34/gpio_defaults_high\[7\]
+ gpio_defaults_block_34/gpio_defaults_low\[7\]
+ gpio_defaults_block_34/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_low\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[1\]
+ gpio_defaults_block_31/gpio_defaults_low\[1\]
+ gpio_defaults_block_31/gpio_defaults_high\[2\]
+ gpio_defaults_block_31/gpio_defaults_low\[2\]
+ gpio_defaults_block_31/gpio_defaults_high\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[4\]
+ gpio_defaults_block_31/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_low\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[6\]
+ gpio_defaults_block_31/gpio_defaults_low\[6\]
+ gpio_defaults_block_31/gpio_defaults_high\[7\]
+ gpio_defaults_block_31/gpio_defaults_high\[8\]
+ gpio_defaults_block_31/gpio_defaults_low\[8\]
+ gpio_defaults_block_31/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[0\]
+ gpio_defaults_block_32/gpio_defaults_high\[10\]
+ gpio_defaults_block_32/gpio_defaults_low\[10\]
+ gpio_defaults_block_32/gpio_defaults_high\[11\]
+ gpio_defaults_block_32/gpio_defaults_low\[11\]
+ gpio_defaults_block_32/gpio_defaults_high\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[1\]
+ gpio_defaults_block_32/gpio_defaults_high\[2\]
+ gpio_defaults_block_32/gpio_defaults_low\[2\]
+ gpio_defaults_block_32/gpio_defaults_high\[3\]
+ gpio_defaults_block_32/gpio_defaults_low\[3\]
+ gpio_defaults_block_32/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[5\]
+ gpio_defaults_block_32/gpio_defaults_low\[5\]
+ gpio_defaults_block_32/gpio_defaults_high\[6\]
+ gpio_defaults_block_32/gpio_defaults_low\[6\]
+ gpio_defaults_block_32/gpio_defaults_high\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[8\]
+ gpio_defaults_block_32/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[0\]
+ gpio_defaults_block_33/gpio_defaults_low\[0\]
+ gpio_defaults_block_33/gpio_defaults_high\[10\]
+ gpio_defaults_block_33/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[0\]
+ gpio_defaults_block_37/gpio_defaults_low\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_high\[5\]
+ gpio_defaults_block_35/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[9\]
+ gpio_defaults_block_37/gpio_defaults_high\[0\]
+ gpio_defaults_block_37/gpio_defaults_high\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_high\[11\]
+ gpio_defaults_block_37/gpio_defaults_low\[11\]
+ gpio_defaults_block_37/gpio_defaults_high\[12\]
+ gpio_defaults_block_37/gpio_defaults_low\[12\]
+ gpio_defaults_block_37/gpio_defaults_high\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[2\]
+ gpio_defaults_block_37/gpio_defaults_low\[2\]
+ gpio_defaults_block_37/gpio_defaults_high\[3\]
+ gpio_defaults_block_37/gpio_defaults_low\[3\]
+ gpio_defaults_block_37/gpio_defaults_high\[4\]
+ gpio_defaults_block_37/gpio_defaults_low\[4\]
+ gpio_defaults_block_37/gpio_defaults_high\[5\]
+ gpio_defaults_block_37/gpio_defaults_low\[5\]
+ gpio_defaults_block_37/gpio_defaults_high\[6\]
+ gpio_defaults_block_37/gpio_defaults_low\[6\]
+ gpio_defaults_block_37/gpio_defaults_high\[7\]
+ gpio_defaults_block_37/gpio_defaults_low\[7\]
+ gpio_defaults_block_37/gpio_defaults_high\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_high\[0\]
+ gpio_defaults_block_4/gpio_defaults_low\[0\]
+ gpio_defaults_block_4/gpio_defaults_high\[10\]
+ gpio_defaults_block_4/gpio_defaults_low\[10\]
+ gpio_defaults_block_4/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_low\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[0\]
+ gpio_defaults_block_35/gpio_defaults_low\[0\]
+ gpio_defaults_block_35/gpio_defaults_high\[10\]
+ gpio_defaults_block_35/gpio_defaults_low\[10\]
+ gpio_defaults_block_35/gpio_defaults_high\[11\]
+ gpio_defaults_block_35/gpio_defaults_low\[11\]
+ gpio_defaults_block_35/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_low\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[1\]
+ gpio_defaults_block_35/gpio_defaults_low\[1\]
+ gpio_defaults_block_35/gpio_defaults_high\[2\]
+ gpio_defaults_block_35/gpio_defaults_low\[2\]
+ gpio_defaults_block_35/gpio_defaults_high\[3\]
+ gpio_defaults_block_35/gpio_defaults_low\[3\]
+ gpio_defaults_block_35/gpio_defaults_high\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[5\]
+ gpio_defaults_block_35/gpio_defaults_high\[6\]
+ gpio_defaults_block_35/gpio_defaults_low\[6\]
+ gpio_defaults_block_35/gpio_defaults_high\[7\]
+ gpio_defaults_block_35/gpio_defaults_low\[7\]
+ gpio_defaults_block_35/gpio_defaults_high\[8\]
+ gpio_defaults_block_35/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_low\[9\]
+ gpio_defaults_block_36/gpio_defaults_high\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[10\]
+ gpio_defaults_block_36/gpio_defaults_low\[10\]
+ gpio_defaults_block_36/gpio_defaults_high\[11\]
+ gpio_defaults_block_36/gpio_defaults_low\[11\]
+ gpio_defaults_block_36/gpio_defaults_high\[12\]
+ gpio_defaults_block_36/gpio_defaults_low\[12\]
+ gpio_defaults_block_36/gpio_defaults_high\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[3\]
+ gpio_defaults_block_36/gpio_defaults_low\[3\]
+ gpio_defaults_block_36/gpio_defaults_high\[4\]
+ gpio_defaults_block_36/gpio_defaults_low\[4\]
+ gpio_defaults_block_36/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_low\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[6\]
+ gpio_defaults_block_36/gpio_defaults_low\[6\]
+ gpio_defaults_block_36/gpio_defaults_high\[7\]
+ gpio_defaults_block_36/gpio_defaults_low\[7\]
+ gpio_defaults_block_36/gpio_defaults_high\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[11\]
+ gpio_defaults_block_7/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[11\]
+ gpio_defaults_block_6/gpio_defaults_low\[11\]
+ gpio_defaults_block_6/gpio_defaults_high\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[2\]
+ gpio_defaults_block_6/gpio_defaults_low\[2\]
+ gpio_defaults_block_6/gpio_defaults_high\[3\]
+ gpio_defaults_block_6/gpio_defaults_high\[4\]
+ gpio_defaults_block_6/gpio_defaults_low\[4\]
+ gpio_defaults_block_6/gpio_defaults_high\[5\]
+ gpio_defaults_block_6/gpio_defaults_low\[5\]
+ gpio_defaults_block_6/gpio_defaults_high\[6\]
+ gpio_defaults_block_6/gpio_defaults_low\[6\]
+ gpio_defaults_block_6/gpio_defaults_high\[7\]
+ gpio_defaults_block_6/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[8\]
+ gpio_defaults_block_6/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[9\]
+ gpio_defaults_block_7/gpio_defaults_high\[0\]
+ gpio_defaults_block_7/gpio_defaults_low\[0\]
+ gpio_defaults_block_7/gpio_defaults_high\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[11\]
+ gpio_defaults_block_7/gpio_defaults_high\[12\]
+ gpio_defaults_block_7/gpio_defaults_low\[12\]
+ gpio_defaults_block_7/gpio_defaults_high\[1\]
+ gpio_defaults_block_7/gpio_defaults_low\[1\]
+ gpio_defaults_block_7/gpio_defaults_high\[2\]
+ gpio_defaults_block_7/gpio_defaults_low\[2\]
+ gpio_defaults_block_7/gpio_defaults_high\[3\]
+ gpio_defaults_block_7/gpio_defaults_low\[3\]
+ gpio_defaults_block_7/gpio_defaults_high\[4\]
+ gpio_defaults_block_7/gpio_defaults_high\[5\]
+ gpio_defaults_block_7/gpio_defaults_low\[5\]
+ gpio_defaults_block_7/gpio_defaults_high\[6\]
+ gpio_defaults_block_7/gpio_defaults_low\[6\]
+ gpio_defaults_block_7/gpio_defaults_high\[7\]
+ gpio_defaults_block_7/gpio_defaults_low\[7\]
+ gpio_defaults_block_7/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[9\]
+ gpio_defaults_block_7/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_low\[12\]
+ gpio_defaults_block_4/gpio_defaults_high\[1\]
+ gpio_defaults_block_4/gpio_defaults_low\[1\]
+ gpio_defaults_block_4/gpio_defaults_high\[2\]
+ gpio_defaults_block_4/gpio_defaults_low\[2\]
+ gpio_defaults_block_4/gpio_defaults_high\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_high\[5\]
+ gpio_defaults_block_4/gpio_defaults_low\[5\]
+ gpio_defaults_block_4/gpio_defaults_high\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[9\]
+ gpio_defaults_block_5/gpio_defaults_high\[0\]
+ gpio_defaults_block_5/gpio_defaults_low\[0\]
+ gpio_defaults_block_5/gpio_defaults_high\[10\]
+ gpio_defaults_block_5/gpio_defaults_low\[10\]
+ gpio_defaults_block_5/gpio_defaults_high\[11\]
+ gpio_defaults_block_5/gpio_defaults_low\[11\]
+ gpio_defaults_block_5/gpio_defaults_high\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[1\]
+ gpio_defaults_block_5/gpio_defaults_high\[2\]
+ gpio_defaults_block_5/gpio_defaults_low\[2\]
+ gpio_defaults_block_5/gpio_defaults_high\[3\]
+ gpio_defaults_block_5/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[4\]
+ gpio_defaults_block_5/gpio_defaults_low\[4\]
+ gpio_defaults_block_5/gpio_defaults_high\[5\]
+ gpio_defaults_block_5/gpio_defaults_low\[5\]
+ gpio_defaults_block_5/gpio_defaults_high\[6\]
+ gpio_defaults_block_5/gpio_defaults_low\[6\]
+ gpio_defaults_block_5/gpio_defaults_high\[7\]
+ gpio_defaults_block_5/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_low\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[0\]
+ gpio_defaults_block_6/gpio_defaults_low\[0\]
+ gpio_defaults_block_6/gpio_defaults_high\[10\]
+ gpio_defaults_block_6/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[11\]
+ gpio_defaults_block_8/gpio_defaults_low\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[8\]
+ gpio_defaults_block_8/gpio_defaults_low\[9\]
+ gpio_defaults_block_9/gpio_defaults_high\[0\]
+ gpio_defaults_block_9/gpio_defaults_low\[1\]
+ gpio_defaults_block_9/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[0\]
+ gpio_defaults_block_8/gpio_defaults_low\[0\]
+ gpio_defaults_block_8/gpio_defaults_high\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[11\]
+ gpio_defaults_block_8/gpio_defaults_high\[12\]
+ gpio_defaults_block_8/gpio_defaults_low\[12\]
+ gpio_defaults_block_8/gpio_defaults_high\[1\]
+ gpio_defaults_block_8/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[2\]
+ gpio_defaults_block_8/gpio_defaults_low\[2\]
+ gpio_defaults_block_8/gpio_defaults_high\[3\]
+ gpio_defaults_block_8/gpio_defaults_low\[3\]
+ gpio_defaults_block_8/gpio_defaults_high\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[5\]
+ gpio_defaults_block_8/gpio_defaults_low\[5\]
+ gpio_defaults_block_8/gpio_defaults_high\[6\]
+ gpio_defaults_block_8/gpio_defaults_low\[6\]
+ gpio_defaults_block_8/gpio_defaults_high\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[0\]
+ gpio_defaults_block_9/gpio_defaults_high\[10\]
+ gpio_defaults_block_9/gpio_defaults_low\[10\]
+ gpio_defaults_block_9/gpio_defaults_high\[11\]
+ gpio_defaults_block_9/gpio_defaults_low\[11\]
+ gpio_defaults_block_9/gpio_defaults_high\[12\]
+ gpio_defaults_block_9/gpio_defaults_low\[12\]
+ gpio_defaults_block_9/gpio_defaults_high\[1\]
+ gpio_defaults_block_9/gpio_defaults_high\[2\]
+ gpio_defaults_block_9/gpio_defaults_low\[2\]
+ gpio_defaults_block_9/gpio_defaults_high\[3\]
+ gpio_defaults_block_9/gpio_defaults_low\[3\]
+ gpio_defaults_block_9/gpio_defaults_high\[4\]
+ gpio_defaults_block_9/gpio_defaults_low\[4\]
+ gpio_defaults_block_9/gpio_defaults_high\[5\]
+ gpio_defaults_block_9/gpio_defaults_low\[5\]
+ gpio_defaults_block_9/gpio_defaults_high\[6\]
+ gpio_defaults_block_9/gpio_defaults_low\[6\]
+ gpio_defaults_block_9/gpio_defaults_high\[7\]
+ gpio_defaults_block_9/gpio_defaults_low\[7\]
+ gpio_defaults_block_9/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[9\]
+ padframe/flash_io1_di_core
+ padframe/clock_core
+ padframe/mprj_analog_io[6]
+ padframe/gpio_in_core
+ padframe/flash_io1
+ padframe/mprj_analog_io[27]
+ padframe/mprj_analog_io[28]
+ padframe/mprj_analog_io[24]
+ padframe/mprj_analog_io[25]
+ padframe/mprj_analog_io[5]
+ padframe/mprj_analog_io[8]
+ padframe/mprj_analog_io[12]
+ padframe/mprj_analog_io[11]
+ padframe/mprj_analog_io[10]
+ padframe/mprj_analog_io[14]
+ padframe/mprj_analog_io[16]
+ padframe/mprj_analog_io[15]
+ padframe/mprj_analog_io[17]
+ padframe/mprj_analog_io[19]
+ padframe/mprj_analog_io[21]
+ padframe/mprj_analog_io[22]
+ padframe/mprj_analog_io[23]
+ padframe/mprj_io[28]
+ padframe/gpio
+ padframe/mprj_io[34]
+ padframe/flash_csb
+ padframe/mprj_analog_io[18]
+ padframe/mprj_analog_io[13]
+ padframe/mprj_io[8]
+ padframe/mprj_io[10]
+ padframe/mprj_io[21]
+ padframe/mprj_io[22]
+ padframe/clock
+ padframe/mprj_io[25]
+ padframe/mprj_analog_io[2]
+ padframe/mprj_io[17]
+ mprj/mprj/p[5]
+ padframe/mprj_io[0]
+ mprj/mprj/p[7]
+ mprj/mprj/p[6]
+ mprj/mprj/p[4]
+ padframe/mprj_io[9]
+ padframe/mprj_io[11]
+ padframe/mprj_io[33]
+ mgmt_buffers/mprj2_logic_high_inst/HI
+ mgmt_buffers/mprj_logic_high_inst/HI[462]
+ mgmt_buffers/mprj_logic_high_inst/HI[461]
+ mgmt_buffers/mprj_logic_high_inst/HI[460]
+ mgmt_buffers/mprj_logic_high_inst/HI[459]
+ mgmt_buffers/mprj_logic_high_inst/HI[458]
+ mgmt_buffers/mprj_logic_high_inst/HI[457]
+ mgmt_buffers/mprj_logic_high_inst/HI[456]
+ mgmt_buffers/mprj_logic_high_inst/HI[455]
+ mgmt_buffers/mprj_logic_high_inst/HI[454]
+ mgmt_buffers/mprj_logic_high_inst/HI[453]
+ mgmt_buffers/mprj_logic_high_inst/HI[452]
+ mgmt_buffers/mprj_logic_high_inst/HI[451]
+ mgmt_buffers/mprj_logic_high_inst/HI[450]
+ mgmt_buffers/mprj_logic_high_inst/HI[449]
+ mgmt_buffers/mprj_logic_high_inst/HI[448]
+ mgmt_buffers/mprj_logic_high_inst/HI[447]
+ mgmt_buffers/mprj_logic_high_inst/HI[446]
+ mgmt_buffers/mprj_logic_high_inst/HI[445]
+ mgmt_buffers/mprj_logic_high_inst/HI[444]
+ padframe/mprj_io[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[443]
+ mgmt_buffers/mprj_logic_high_inst/HI[442]
+ mgmt_buffers/mprj_logic_high_inst/HI[441]
+ mgmt_buffers/mprj_logic_high_inst/HI[440]
+ mgmt_buffers/mprj_logic_high_inst/HI[439]
+ mgmt_buffers/mprj_logic_high_inst/HI[438]
+ mgmt_buffers/mprj_logic_high_inst/HI[437]
+ mgmt_buffers/mprj_logic_high_inst/HI[436]
+ mgmt_buffers/mprj_logic_high_inst/HI[435]
+ mgmt_buffers/mprj_logic_high_inst/HI[434]
+ mgmt_buffers/mprj_logic_high_inst/HI[433]
+ mgmt_buffers/mprj_logic_high_inst/HI[432]
+ mgmt_buffers/mprj_logic_high_inst/HI[431]
+ mgmt_buffers/mprj_logic_high_inst/HI[430]
+ mgmt_buffers/mprj_logic_high_inst/HI[429]
+ mgmt_buffers/mprj_logic_high_inst/HI[428]
+ mgmt_buffers/mprj_logic_high_inst/HI[427]
+ mgmt_buffers/mprj_logic_high_inst/HI[426]
+ padframe/mprj_io[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[425]
+ mgmt_buffers/mprj_logic_high_inst/HI[424]
+ mgmt_buffers/mprj_logic_high_inst/HI[423]
+ mgmt_buffers/mprj_logic_high_inst/HI[422]
+ mgmt_buffers/mprj_logic_high_inst/HI[421]
+ mgmt_buffers/mprj_logic_high_inst/HI[420]
+ mgmt_buffers/mprj_logic_high_inst/HI[419]
+ mgmt_buffers/mprj_logic_high_inst/HI[418]
+ mgmt_buffers/mprj_logic_high_inst/HI[417]
+ mgmt_buffers/mprj_logic_high_inst/HI[416]
+ mgmt_buffers/mprj_logic_high_inst/HI[415]
+ mgmt_buffers/mprj_logic_high_inst/HI[414]
+ mgmt_buffers/mprj_logic_high_inst/HI[413]
+ mgmt_buffers/mprj_logic_high_inst/HI[412]
+ mgmt_buffers/mprj_logic_high_inst/HI[411]
+ mgmt_buffers/mprj_logic_high_inst/HI[410]
+ mgmt_buffers/mprj_logic_high_inst/HI[409]
+ mgmt_buffers/mprj_logic_high_inst/HI[408]
+ mgmt_buffers/mprj_logic_high_inst/HI[407]
+ mgmt_buffers/mprj_logic_high_inst/HI[406]
+ mgmt_buffers/mprj_logic_high_inst/HI[405]
+ mgmt_buffers/mprj_logic_high_inst/HI[404]
+ mgmt_buffers/mprj_logic_high_inst/HI[403]
+ mgmt_buffers/mprj_logic_high_inst/HI[402]
+ mgmt_buffers/mprj_logic_high_inst/HI[401]
+ mgmt_buffers/mprj_logic_high_inst/HI[400]
+ mgmt_buffers/mprj_logic_high_inst/HI[399]
+ mgmt_buffers/mprj_logic_high_inst/HI[398]
+ mgmt_buffers/mprj_logic_high_inst/HI[397]
+ mgmt_buffers/mprj_logic_high_inst/HI[396]
+ mgmt_buffers/mprj_logic_high_inst/HI[395]
+ mgmt_buffers/mprj_logic_high_inst/HI[394]
+ mgmt_buffers/mprj_logic_high_inst/HI[393]
+ mgmt_buffers/mprj_logic_high_inst/HI[392]
+ mgmt_buffers/mprj_logic_high_inst/HI[391]
+ mgmt_buffers/mprj_logic_high_inst/HI[390]
+ mgmt_buffers/mprj_logic_high_inst/HI[389]
+ mgmt_buffers/mprj_logic_high_inst/HI[388]
+ mgmt_buffers/mprj_logic_high_inst/HI[387]
+ mgmt_buffers/mprj_logic_high_inst/HI[386]
+ mgmt_buffers/mprj_logic_high_inst/HI[385]
+ mgmt_buffers/mprj_logic_high_inst/HI[384]
+ mgmt_buffers/mprj_logic_high_inst/HI[383]
+ mgmt_buffers/mprj_logic_high_inst/HI[382]
+ mgmt_buffers/mprj_logic_high_inst/HI[381]
+ mgmt_buffers/mprj_logic_high_inst/HI[380]
+ mgmt_buffers/mprj_logic_high_inst/HI[379]
+ mgmt_buffers/mprj_logic_high_inst/HI[378]
+ mgmt_buffers/mprj_logic_high_inst/HI[377]
+ mgmt_buffers/mprj_logic_high_inst/HI[376]
+ mgmt_buffers/mprj_logic_high_inst/HI[375]
+ mgmt_buffers/mprj_logic_high_inst/HI[374]
+ mgmt_buffers/mprj_logic_high_inst/HI[373]
+ mgmt_buffers/mprj_logic_high_inst/HI[372]
+ mgmt_buffers/mprj_logic_high_inst/HI[371]
+ mgmt_buffers/mprj_logic_high_inst/HI[370]
+ mgmt_buffers/mprj_logic_high_inst/HI[369]
+ mgmt_buffers/mprj_logic_high_inst/HI[368]
+ mgmt_buffers/mprj_logic_high_inst/HI[367]
+ mgmt_buffers/mprj_logic_high_inst/HI[366]
+ mgmt_buffers/mprj_logic_high_inst/HI[365]
+ mgmt_buffers/mprj_logic_high_inst/HI[364]
+ mgmt_buffers/mprj_logic_high_inst/HI[363]
+ padframe/mprj_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[362]
+ mgmt_buffers/mprj_logic_high_inst/HI[361]
+ mgmt_buffers/mprj_logic_high_inst/HI[360]
+ mgmt_buffers/mprj_logic_high_inst/HI[359]
+ mgmt_buffers/mprj_logic_high_inst/HI[358]
+ mgmt_buffers/mprj_logic_high_inst/HI[357]
+ mgmt_buffers/mprj_logic_high_inst/HI[356]
+ mgmt_buffers/mprj_logic_high_inst/HI[355]
+ mgmt_buffers/mprj_logic_high_inst/HI[354]
+ mgmt_buffers/mprj_logic_high_inst/HI[353]
+ mgmt_buffers/mprj_logic_high_inst/HI[352]
+ mgmt_buffers/mprj_logic_high_inst/HI[351]
+ mgmt_buffers/mprj_logic_high_inst/HI[350]
+ mgmt_buffers/mprj_logic_high_inst/HI[349]
+ mgmt_buffers/mprj_logic_high_inst/HI[348]
+ mgmt_buffers/mprj_logic_high_inst/HI[347]
+ mgmt_buffers/mprj_logic_high_inst/HI[346]
+ mgmt_buffers/mprj_logic_high_inst/HI[345]
+ mgmt_buffers/mprj_logic_high_inst/HI[344]
+ mgmt_buffers/mprj_logic_high_inst/HI[343]
+ mgmt_buffers/mprj_logic_high_inst/HI[342]
+ mgmt_buffers/mprj_logic_high_inst/HI[341]
+ mgmt_buffers/mprj_logic_high_inst/HI[340]
+ mgmt_buffers/mprj_logic_high_inst/HI[339]
+ mgmt_buffers/mprj_logic_high_inst/HI[338]
+ mgmt_buffers/mprj_logic_high_inst/HI[337]
+ mgmt_buffers/mprj_logic_high_inst/HI[336]
+ mgmt_buffers/mprj_logic_high_inst/HI[335]
+ mgmt_buffers/mprj_logic_high_inst/HI[334]
+ mgmt_buffers/mprj_logic_high_inst/HI[333]
+ mgmt_buffers/mprj_logic_high_inst/HI[332]
+ mgmt_buffers/mprj_logic_high_inst/HI[331]
+ mgmt_buffers/mprj_logic_high_inst/HI[330]
+ mgmt_buffers/mprj_logic_high_inst/HI[329]
+ mgmt_buffers/mprj_logic_high_inst/HI[328]
+ mgmt_buffers/mprj_logic_high_inst/HI[327]
+ mgmt_buffers/mprj_logic_high_inst/HI[326]
+ mgmt_buffers/mprj_logic_high_inst/HI[325]
+ mgmt_buffers/mprj_logic_high_inst/HI[324]
+ mgmt_buffers/mprj_logic_high_inst/HI[323]
+ mgmt_buffers/mprj_logic_high_inst/HI[322]
+ padframe/mprj_io[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[321]
+ mgmt_buffers/mprj_logic_high_inst/HI[320]
+ mgmt_buffers/mprj_logic_high_inst/HI[319]
+ mgmt_buffers/mprj_logic_high_inst/HI[318]
+ mgmt_buffers/mprj_logic_high_inst/HI[317]
+ mgmt_buffers/mprj_logic_high_inst/HI[316]
+ mgmt_buffers/mprj_logic_high_inst/HI[315]
+ mgmt_buffers/mprj_logic_high_inst/HI[314]
+ mgmt_buffers/mprj_logic_high_inst/HI[313]
+ mgmt_buffers/mprj_logic_high_inst/HI[312]
+ mgmt_buffers/mprj_logic_high_inst/HI[311]
+ mgmt_buffers/mprj_logic_high_inst/HI[310]
+ mgmt_buffers/mprj_logic_high_inst/HI[309]
+ mgmt_buffers/mprj_logic_high_inst/HI[308]
+ mgmt_buffers/mprj_logic_high_inst/HI[307]
+ mgmt_buffers/mprj_logic_high_inst/HI[306]
+ mgmt_buffers/mprj_logic_high_inst/HI[305]
+ mgmt_buffers/mprj_logic_high_inst/HI[304]
+ mgmt_buffers/mprj_logic_high_inst/HI[303]
+ mgmt_buffers/mprj_logic_high_inst/HI[302]
+ mgmt_buffers/mprj_logic_high_inst/HI[301]
+ mgmt_buffers/mprj_logic_high_inst/HI[300]
+ mgmt_buffers/mprj_logic_high_inst/HI[299]
+ mgmt_buffers/mprj_logic_high_inst/HI[298]
+ mgmt_buffers/mprj_logic_high_inst/HI[297]
+ mgmt_buffers/mprj_logic_high_inst/HI[296]
+ mgmt_buffers/mprj_logic_high_inst/HI[295]
+ mgmt_buffers/mprj_logic_high_inst/HI[294]
+ mgmt_buffers/mprj_logic_high_inst/HI[293]
+ mgmt_buffers/mprj_logic_high_inst/HI[292]
+ mgmt_buffers/mprj_logic_high_inst/HI[291]
+ padframe/mprj_analog_io[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[290]
+ mgmt_buffers/mprj_logic_high_inst/HI[289]
+ mgmt_buffers/mprj_logic_high_inst/HI[288]
+ mgmt_buffers/mprj_logic_high_inst/HI[287]
+ mgmt_buffers/mprj_logic_high_inst/HI[286]
+ mgmt_buffers/mprj_logic_high_inst/HI[285]
+ mgmt_buffers/mprj_logic_high_inst/HI[284]
+ mgmt_buffers/mprj_logic_high_inst/HI[283]
+ mgmt_buffers/mprj_logic_high_inst/HI[282]
+ mgmt_buffers/mprj_logic_high_inst/HI[281]
+ mgmt_buffers/mprj_logic_high_inst/HI[280]
+ mgmt_buffers/mprj_logic_high_inst/HI[279]
+ mgmt_buffers/mprj_logic_high_inst/HI[278]
+ mgmt_buffers/mprj_logic_high_inst/HI[277]
+ mgmt_buffers/mprj_logic_high_inst/HI[276]
+ mgmt_buffers/mprj_logic_high_inst/HI[275]
+ mgmt_buffers/mprj_logic_high_inst/HI[274]
+ mgmt_buffers/mprj_logic_high_inst/HI[273]
+ mgmt_buffers/mprj_logic_high_inst/HI[272]
+ mgmt_buffers/mprj_logic_high_inst/HI[271]
+ mgmt_buffers/mprj_logic_high_inst/HI[270]
+ mgmt_buffers/mprj_logic_high_inst/HI[269]
+ padframe/mprj_analog_io[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[268]
+ mgmt_buffers/mprj_logic_high_inst/HI[267]
+ mgmt_buffers/mprj_logic_high_inst/HI[266]
+ mgmt_buffers/mprj_logic_high_inst/HI[265]
+ mgmt_buffers/mprj_logic_high_inst/HI[264]
+ mgmt_buffers/mprj_logic_high_inst/HI[263]
+ mgmt_buffers/mprj_logic_high_inst/HI[262]
+ mgmt_buffers/mprj_logic_high_inst/HI[261]
+ mgmt_buffers/mprj_logic_high_inst/HI[260]
+ mgmt_buffers/mprj_logic_high_inst/HI[259]
+ mgmt_buffers/mprj_logic_high_inst/HI[258]
+ mgmt_buffers/mprj_logic_high_inst/HI[257]
+ mgmt_buffers/mprj_logic_high_inst/HI[256]
+ mgmt_buffers/mprj_logic_high_inst/HI[255]
+ mgmt_buffers/mprj_logic_high_inst/HI[254]
+ mgmt_buffers/mprj_logic_high_inst/HI[253]
+ mgmt_buffers/mprj_logic_high_inst/HI[252]
+ mgmt_buffers/mprj_logic_high_inst/HI[251]
+ mgmt_buffers/mprj_logic_high_inst/HI[250]
+ mgmt_buffers/mprj_logic_high_inst/HI[249]
+ mgmt_buffers/mprj_logic_high_inst/HI[248]
+ mgmt_buffers/mprj_logic_high_inst/HI[247]
+ mgmt_buffers/mprj_logic_high_inst/HI[246]
+ mgmt_buffers/mprj_logic_high_inst/HI[245]
+ mgmt_buffers/mprj_logic_high_inst/HI[244]
+ mgmt_buffers/mprj_logic_high_inst/HI[243]
+ mgmt_buffers/mprj_logic_high_inst/HI[242]
+ mgmt_buffers/mprj_logic_high_inst/HI[241]
+ mgmt_buffers/mprj_logic_high_inst/HI[240]
+ mgmt_buffers/mprj_logic_high_inst/HI[239]
+ mgmt_buffers/mprj_logic_high_inst/HI[238]
+ mgmt_buffers/mprj_logic_high_inst/HI[237]
+ mgmt_buffers/mprj_logic_high_inst/HI[236]
+ mgmt_buffers/mprj_logic_high_inst/HI[235]
+ mgmt_buffers/mprj_logic_high_inst/HI[234]
+ mgmt_buffers/mprj_logic_high_inst/HI[233]
+ mgmt_buffers/mprj_logic_high_inst/HI[232]
+ mgmt_buffers/mprj_logic_high_inst/HI[231]
+ mgmt_buffers/mprj_logic_high_inst/HI[230]
+ mgmt_buffers/mprj_logic_high_inst/HI[229]
+ mgmt_buffers/mprj_logic_high_inst/HI[228]
+ padframe/mprj_analog_io[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[227]
+ mgmt_buffers/mprj_logic_high_inst/HI[226]
+ mgmt_buffers/mprj_logic_high_inst/HI[225]
+ mgmt_buffers/mprj_logic_high_inst/HI[224]
+ mgmt_buffers/mprj_logic_high_inst/HI[223]
+ mgmt_buffers/mprj_logic_high_inst/HI[222]
+ mgmt_buffers/mprj_logic_high_inst/HI[221]
+ mgmt_buffers/mprj_logic_high_inst/HI[220]
+ mgmt_buffers/mprj_logic_high_inst/HI[219]
+ mgmt_buffers/mprj_logic_high_inst/HI[218]
+ mgmt_buffers/mprj_logic_high_inst/HI[217]
+ mgmt_buffers/mprj_logic_high_inst/HI[216]
+ mgmt_buffers/mprj_logic_high_inst/HI[215]
+ mgmt_buffers/mprj_logic_high_inst/HI[214]
+ mgmt_buffers/mprj_logic_high_inst/HI[213]
+ mgmt_buffers/mprj_logic_high_inst/HI[212]
+ mgmt_buffers/mprj_logic_high_inst/HI[211]
+ mgmt_buffers/mprj_logic_high_inst/HI[210]
+ mgmt_buffers/mprj_logic_high_inst/HI[209]
+ mgmt_buffers/mprj_logic_high_inst/HI[208]
+ mgmt_buffers/mprj_logic_high_inst/HI[207]
+ mgmt_buffers/mprj_logic_high_inst/HI[206]
+ mgmt_buffers/mprj_logic_high_inst/HI[205]
+ mgmt_buffers/mprj_logic_high_inst/HI[204]
+ mgmt_buffers/mprj_logic_high_inst/HI[203]
+ mgmt_buffers/mprj_logic_high_inst/HI[202]
+ mgmt_buffers/mprj_logic_high_inst/HI[201]
+ mgmt_buffers/mprj_logic_high_inst/HI[200]
+ mgmt_buffers/mprj_logic_high_inst/HI[199]
+ mgmt_buffers/mprj_logic_high_inst/HI[198]
+ mgmt_buffers/mprj_logic_high_inst/HI[197]
+ mgmt_buffers/mprj_logic_high_inst/HI[196]
+ mgmt_buffers/mprj_logic_high_inst/HI[195]
+ mgmt_buffers/mprj_logic_high_inst/HI[194]
+ mgmt_buffers/mprj_logic_high_inst/HI[193]
+ mgmt_buffers/mprj_logic_high_inst/HI[192]
+ mgmt_buffers/mprj_logic_high_inst/HI[191]
+ mgmt_buffers/mprj_logic_high_inst/HI[190]
+ mgmt_buffers/mprj_logic_high_inst/HI[189]
+ mgmt_buffers/mprj_logic_high_inst/HI[188]
+ padframe/mprj_io[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[187]
+ mgmt_buffers/mprj_logic_high_inst/HI[186]
+ mgmt_buffers/mprj_logic_high_inst/HI[185]
+ mgmt_buffers/mprj_logic_high_inst/HI[184]
+ mgmt_buffers/mprj_logic_high_inst/HI[183]
+ mgmt_buffers/mprj_logic_high_inst/HI[182]
+ mgmt_buffers/mprj_logic_high_inst/HI[181]
+ mgmt_buffers/mprj_logic_high_inst/HI[180]
+ mgmt_buffers/mprj_logic_high_inst/HI[179]
+ mgmt_buffers/mprj_logic_high_inst/HI[178]
+ mgmt_buffers/mprj_logic_high_inst/HI[177]
+ mgmt_buffers/mprj_logic_high_inst/HI[176]
+ mgmt_buffers/mprj_logic_high_inst/HI[175]
+ mgmt_buffers/mprj_logic_high_inst/HI[174]
+ mgmt_buffers/mprj_logic_high_inst/HI[173]
+ mgmt_buffers/mprj_logic_high_inst/HI[172]
+ mgmt_buffers/mprj_logic_high_inst/HI[171]
+ mgmt_buffers/mprj_logic_high_inst/HI[170]
+ mgmt_buffers/mprj_logic_high_inst/HI[169]
+ mgmt_buffers/mprj_logic_high_inst/HI[168]
+ mgmt_buffers/mprj_logic_high_inst/HI[167]
+ mgmt_buffers/mprj_logic_high_inst/HI[166]
+ mgmt_buffers/mprj_logic_high_inst/HI[165]
+ mgmt_buffers/mprj_logic_high_inst/HI[164]
+ mgmt_buffers/mprj_logic_high_inst/HI[163]
+ mgmt_buffers/mprj_logic_high_inst/HI[162]
+ mgmt_buffers/mprj_logic_high_inst/HI[161]
+ mgmt_buffers/mprj_logic_high_inst/HI[160]
+ mgmt_buffers/mprj_logic_high_inst/HI[159]
+ mgmt_buffers/mprj_logic_high_inst/HI[158]
+ mgmt_buffers/mprj_logic_high_inst/HI[157]
+ mgmt_buffers/mprj_logic_high_inst/HI[156]
+ mgmt_buffers/mprj_logic_high_inst/HI[155]
+ mgmt_buffers/mprj_logic_high_inst/HI[154]
+ mgmt_buffers/mprj_logic_high_inst/HI[153]
+ mgmt_buffers/mprj_logic_high_inst/HI[152]
+ mgmt_buffers/mprj_logic_high_inst/HI[151]
+ mgmt_buffers/mprj_logic_high_inst/HI[150]
+ mgmt_buffers/mprj_logic_high_inst/HI[149]
+ mgmt_buffers/mprj_logic_high_inst/HI[148]
+ mgmt_buffers/mprj_logic_high_inst/HI[147]
+ mgmt_buffers/mprj_logic_high_inst/HI[146]
+ mgmt_buffers/mprj_logic_high_inst/HI[145]
+ mgmt_buffers/mprj_logic_high_inst/HI[144]
+ mgmt_buffers/mprj_logic_high_inst/HI[143]
+ mgmt_buffers/mprj_logic_high_inst/HI[142]
+ mgmt_buffers/mprj_logic_high_inst/HI[141]
+ mgmt_buffers/mprj_logic_high_inst/HI[140]
+ mgmt_buffers/mprj_logic_high_inst/HI[139]
+ mgmt_buffers/mprj_logic_high_inst/HI[138]
+ padframe/mprj_analog_io[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[137]
+ mgmt_buffers/mprj_logic_high_inst/HI[136]
+ mgmt_buffers/mprj_logic_high_inst/HI[135]
+ mgmt_buffers/mprj_logic_high_inst/HI[134]
+ mgmt_buffers/mprj_logic_high_inst/HI[133]
+ mgmt_buffers/mprj_logic_high_inst/HI[132]
+ mgmt_buffers/mprj_logic_high_inst/HI[131]
+ mgmt_buffers/mprj_logic_high_inst/HI[130]
+ mgmt_buffers/mprj_logic_high_inst/HI[129]
+ mgmt_buffers/mprj_logic_high_inst/HI[128]
+ mgmt_buffers/mprj_logic_high_inst/HI[127]
+ mgmt_buffers/mprj_logic_high_inst/HI[126]
+ mgmt_buffers/mprj_logic_high_inst/HI[125]
+ mgmt_buffers/mprj_logic_high_inst/HI[124]
+ mgmt_buffers/mprj_logic_high_inst/HI[123]
+ mgmt_buffers/mprj_logic_high_inst/HI[122]
+ mgmt_buffers/mprj_logic_high_inst/HI[121]
+ mgmt_buffers/mprj_logic_high_inst/HI[120]
+ mgmt_buffers/mprj_logic_high_inst/HI[119]
+ mgmt_buffers/mprj_logic_high_inst/HI[118]
+ mgmt_buffers/mprj_logic_high_inst/HI[117]
+ mgmt_buffers/mprj_logic_high_inst/HI[116]
+ mgmt_buffers/mprj_logic_high_inst/HI[115]
+ mgmt_buffers/mprj_logic_high_inst/HI[114]
+ mgmt_buffers/mprj_logic_high_inst/HI[113]
+ mgmt_buffers/mprj_logic_high_inst/HI[112]
+ mgmt_buffers/mprj_logic_high_inst/HI[111]
+ mgmt_buffers/mprj_logic_high_inst/HI[110]
+ mgmt_buffers/mprj_logic_high_inst/HI[109]
+ mgmt_buffers/mprj_logic_high_inst/HI[108]
+ mgmt_buffers/mprj_logic_high_inst/HI[107]
+ mgmt_buffers/mprj_logic_high_inst/HI[106]
+ mgmt_buffers/mprj_logic_high_inst/HI[105]
+ mgmt_buffers/mprj_logic_high_inst/HI[104]
+ mgmt_buffers/mprj_logic_high_inst/HI[103]
+ mgmt_buffers/mprj_logic_high_inst/HI[102]
+ mgmt_buffers/mprj_logic_high_inst/HI[101]
+ mgmt_buffers/mprj_logic_high_inst/HI[100]
+ mgmt_buffers/mprj_logic_high_inst/HI[99]
+ mgmt_buffers/mprj_logic_high_inst/HI[98]
+ mgmt_buffers/mprj_logic_high_inst/HI[97]
+ mgmt_buffers/mprj_logic_high_inst/HI[96]
+ mgmt_buffers/mprj_logic_high_inst/HI[95]
+ mgmt_buffers/mprj_logic_high_inst/HI[94]
+ mgmt_buffers/mprj_logic_high_inst/HI[93]
+ mgmt_buffers/mprj_logic_high_inst/HI[92]
+ mgmt_buffers/mprj_logic_high_inst/HI[91]
+ padframe/mprj_io[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[90]
+ mgmt_buffers/mprj_logic_high_inst/HI[89]
+ mgmt_buffers/mprj_logic_high_inst/HI[88]
+ mgmt_buffers/mprj_logic_high_inst/HI[87]
+ mgmt_buffers/mprj_logic_high_inst/HI[86]
+ mgmt_buffers/mprj_logic_high_inst/HI[85]
+ mgmt_buffers/mprj_logic_high_inst/HI[84]
+ mgmt_buffers/mprj_logic_high_inst/HI[83]
+ mgmt_buffers/mprj_logic_high_inst/HI[82]
+ mgmt_buffers/mprj_logic_high_inst/HI[81]
+ mgmt_buffers/mprj_logic_high_inst/HI[80]
+ mgmt_buffers/mprj_logic_high_inst/HI[79]
+ mgmt_buffers/mprj_logic_high_inst/HI[78]
+ mgmt_buffers/mprj_logic_high_inst/HI[77]
+ mgmt_buffers/mprj_logic_high_inst/HI[76]
+ mgmt_buffers/mprj_logic_high_inst/HI[75]
+ mgmt_buffers/mprj_logic_high_inst/HI[74]
+ mgmt_buffers/mprj_logic_high_inst/HI[73]
+ mgmt_buffers/mprj_logic_high_inst/HI[72]
+ mgmt_buffers/mprj_logic_high_inst/HI[71]
+ mgmt_buffers/mprj_logic_high_inst/HI[70]
+ mgmt_buffers/mprj_logic_high_inst/HI[69]
+ padframe/mprj_io[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[68]
+ mgmt_buffers/mprj_logic_high_inst/HI[67]
+ mgmt_buffers/mprj_logic_high_inst/HI[66]
+ mgmt_buffers/mprj_logic_high_inst/HI[65]
+ mgmt_buffers/mprj_logic_high_inst/HI[64]
+ mgmt_buffers/mprj_logic_high_inst/HI[63]
+ mgmt_buffers/mprj_logic_high_inst/HI[62]
+ mgmt_buffers/mprj_logic_high_inst/HI[61]
+ mgmt_buffers/mprj_logic_high_inst/HI[60]
+ mgmt_buffers/mprj_logic_high_inst/HI[59]
+ mgmt_buffers/mprj_logic_high_inst/HI[58]
+ mgmt_buffers/mprj_logic_high_inst/HI[57]
+ mgmt_buffers/mprj_logic_high_inst/HI[56]
+ mgmt_buffers/mprj_logic_high_inst/HI[55]
+ mgmt_buffers/mprj_logic_high_inst/HI[54]
+ mgmt_buffers/mprj_logic_high_inst/HI[53]
+ mgmt_buffers/mprj_logic_high_inst/HI[52]
+ mgmt_buffers/mprj_logic_high_inst/HI[51]
+ mgmt_buffers/mprj_logic_high_inst/HI[50]
+ mgmt_buffers/mprj_logic_high_inst/HI[49]
+ mgmt_buffers/mprj_logic_high_inst/HI[48]
+ mgmt_buffers/mprj_logic_high_inst/HI[47]
+ mgmt_buffers/mprj_logic_high_inst/HI[46]
+ mgmt_buffers/mprj_logic_high_inst/HI[45]
+ mgmt_buffers/mprj_logic_high_inst/HI[44]
+ mgmt_buffers/mprj_logic_high_inst/HI[43]
+ mgmt_buffers/mprj_logic_high_inst/HI[42]
+ mgmt_buffers/mprj_logic_high_inst/HI[41]
+ mgmt_buffers/mprj_logic_high_inst/HI[40]
+ mgmt_buffers/mprj_logic_high_inst/HI[39]
+ mgmt_buffers/mprj_logic_high_inst/HI[38]
+ mgmt_buffers/mprj_logic_high_inst/HI[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[36]
+ mgmt_buffers/mprj_logic_high_inst/HI[35]
+ mgmt_buffers/mprj_logic_high_inst/HI[34]
+ mgmt_buffers/mprj_logic_high_inst/HI[33]
+ mgmt_buffers/mprj_logic_high_inst/HI[32]
+ mgmt_buffers/mprj_logic_high_inst/HI[31]
+ mgmt_buffers/mprj_logic_high_inst/HI[30]
+ mgmt_buffers/mprj_logic_high_inst/HI[29]
+ mgmt_buffers/mprj_logic_high_inst/HI[28]
+ mgmt_buffers/mprj_logic_high_inst/HI[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[25]
+ mgmt_buffers/mprj_logic_high_inst/HI[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[22]
+ mgmt_buffers/mprj_logic_high_inst/HI[21]
+ mgmt_buffers/mprj_logic_high_inst/HI[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[19]
+ mgmt_buffers/mprj_logic_high_inst/HI[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[17]
+ mgmt_buffers/mprj_logic_high_inst/HI[16]
+ padframe/mprj_analog_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[15]
+ mgmt_buffers/mprj_logic_high_inst/HI[14]
+ mgmt_buffers/mprj_logic_high_inst/HI[13]
+ mgmt_buffers/mprj_logic_high_inst/HI[12]
+ mgmt_buffers/mprj_logic_high_inst/HI[11]
+ mgmt_buffers/mprj_logic_high_inst/HI[10]
+ mgmt_buffers/mprj_logic_high_inst/HI[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[8]
+ mgmt_buffers/mprj_logic_high_inst/HI[7]
+ mgmt_buffers/mprj_logic_high_inst/HI[6]
+ mgmt_buffers/mprj_logic_high_inst/HI[5]
+ mgmt_buffers/mprj_logic_high_inst/HI[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[2]
+ mgmt_buffers/mprj_logic_high_inst/HI[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[0]
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1
+ mgmt_buffers/powergood_check/mprj_vdd_logic1
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1_h
+ mgmt_buffers/powergood_check/mprj_vdd_logic1_h
+ padframe/mprj_io[35]
+ mprj/mprj/p[3]
+ mprj/mprj/p[2]
+ mprj/mprj/p[1]
+ mprj/mprj/p[0]
+ padframe/mprj_io[30]
+ padframe/mprj_io[14]
+ padframe/mprj_io[13]
+ padframe/mprj_io[12]
+ padframe/mprj_io[19]
+ padframe/mprj_analog_io[0]
+ padframe/mprj_io[36]
+ padframe/mprj_io[32]
+ padframe/mprj_io[29]
+ padframe/mprj_io[31]
+ padframe/mprj_io[15]
+ padframe/mprj_io[16]
+ padframe/mprj_io[1]
+ padframe/mprj_io[2]
+ padframe/mprj_io[3]
+ padframe/mprj_io[4]
+ padframe/mprj_io[5]
+ padframe/mprj_io[6]
+ padframe/mprj_io[7]
+ padframe/resetb
+ padframe/resetb_core_h
+ padframe/vccd1_pad
+ padframe/vccd2_pad
+ padframe/vccd_pad
+ padframe/vdda1_pad
+ padframe/vdda1_pad2
+ padframe/vdda2_pad
+ padframe/vdda_pad
+ padframe/vddio_pad
+ padframe/vddio_pad2
+ padframe/vssa1_pad
+ padframe/vssa1_pad2
+ padframe/vssa2_pad
+ padframe/vssa_pad
+ padframe/vssd1_pad
+ padframe/vssd2_pad
+ padframe/vssd_pad
+ padframe/vssio_pad
+ padframe/vssio_pad2
+ padframe/mprj_pads.analog_a
+ padframe/mprj_pads.analog_b
+ padframe/loop_zero_clock
+ padframe/loop_one_clock
+ padframe/constant_value_inst\[0\]/one
+ padframe/constant_value_inst\[0\]/zero
+ padframe/constant_value_inst\[0\]/one_unbuf
+ padframe/constant_value_inst\[0\]/zero_unbuf
+ padframe/constant_value_inst\[1\]/one
+ padframe/constant_value_inst\[1\]/zero
+ padframe/constant_value_inst\[1\]/one_unbuf
+ padframe/constant_value_inst\[1\]/zero_unbuf
+ padframe/constant_value_inst\[2\]/one
+ padframe/constant_value_inst\[2\]/zero
+ padframe/constant_value_inst\[2\]/one_unbuf
+ padframe/constant_value_inst\[2\]/zero_unbuf
+ padframe/constant_value_inst\[3\]/one
+ padframe/constant_value_inst\[3\]/zero
+ padframe/constant_value_inst\[3\]/one_unbuf
+ padframe/constant_value_inst\[3\]/zero_unbuf
+ padframe/constant_value_inst\[4\]/one
+ padframe/constant_value_inst\[4\]/zero
+ padframe/constant_value_inst\[4\]/one_unbuf
+ padframe/constant_value_inst\[4\]/zero_unbuf
+ padframe/constant_value_inst\[5\]/one
+ padframe/constant_value_inst\[5\]/zero
+ padframe/constant_value_inst\[5\]/one_unbuf
+ padframe/constant_value_inst\[5\]/zero_unbuf
+ padframe/constant_value_inst\[6\]/one
+ padframe/constant_value_inst\[6\]/zero
+ padframe/constant_value_inst\[6\]/one_unbuf
+ padframe/constant_value_inst\[6\]/zero_unbuf
+ padframe/loop_zero_flash_clk
+ padframe/loop_one_flash_clk
+ padframe/loop_zero_flash_csb
+ padframe/loop_one_flash_csb
+ padframe/loop_zero_flash_io0
+ padframe/loop_one_flash_io0
+ padframe/loop_zero_flash_io1
+ padframe/loop_one_flash_io1
+ padframe/loop_zero_gpio
+ padframe/loop_one_gpio
+ padframe/mprj_pads.loop0_io\[0\]
+ padframe/mprj_pads.loop1_io\[0\]
+ padframe/mprj_pads.io_in\[0\]
+ padframe/mprj_pads.io_in_3v3\[0\]
+ padframe/mprj_pads.no_connect_1b\[0\]
+ padframe/mprj_pads.no_connect_1a\[0\]
+ padframe/mprj_pads.loop0_io\[10\]
+ padframe/mprj_pads.loop1_io\[10\]
+ padframe/mprj_pads.io_in\[10\]
+ padframe/mprj_pads.io_in_3v3\[10\]
+ padframe/mprj_pads.analog_noesd_io\[3\]
+ padframe/mprj_pads.loop0_io\[11\]
+ padframe/mprj_pads.loop1_io\[11\]
+ padframe/mprj_pads.io_in\[11\]
+ padframe/mprj_pads.io_in_3v3\[11\]
+ padframe/mprj_pads.analog_noesd_io\[4\]
+ padframe/mprj_pads.loop0_io\[12\]
+ padframe/mprj_pads.loop1_io\[12\]
+ padframe/mprj_pads.io_in\[12\]
+ padframe/mprj_pads.io_in_3v3\[12\]
+ padframe/mprj_pads.analog_noesd_io\[5\]
+ padframe/mprj_pads.loop0_io\[13\]
+ padframe/mprj_pads.loop1_io\[13\]
+ padframe/mprj_pads.io_in\[13\]
+ padframe/mprj_pads.io_in_3v3\[13\]
+ padframe/mprj_pads.analog_noesd_io\[6\]
+ padframe/mprj_pads.loop0_io\[14\]
+ padframe/mprj_pads.loop1_io\[14\]
+ padframe/mprj_pads.io_in\[14\]
+ padframe/mprj_pads.io_in_3v3\[14\]
+ padframe/mprj_pads.analog_noesd_io\[7\]
+ padframe/mprj_pads.loop0_io\[15\]
+ padframe/mprj_pads.loop1_io\[15\]
+ padframe/mprj_pads.io_in\[15\]
+ padframe/mprj_pads.io_in_3v3\[15\]
+ padframe/mprj_pads.analog_noesd_io\[8\]
+ padframe/mprj_pads.loop0_io\[16\]
+ padframe/mprj_pads.loop1_io\[16\]
+ padframe/mprj_pads.io_in\[16\]
+ padframe/mprj_pads.io_in_3v3\[16\]
+ padframe/mprj_pads.analog_noesd_io\[9\]
+ padframe/mprj_pads.loop0_io\[17\]
+ padframe/mprj_pads.loop1_io\[17\]
+ padframe/mprj_pads.io_in\[17\]
+ padframe/mprj_pads.io_in_3v3\[17\]
+ padframe/mprj_pads.analog_noesd_io\[10\]
+ padframe/mprj_pads.loop0_io\[18\]
+ padframe/mprj_pads.loop1_io\[18\]
+ padframe/mprj_pads.io_in\[18\]
+ padframe/mprj_pads.io_in_3v3\[18\]
+ padframe/mprj_pads.analog_noesd_io\[11\]
+ padframe/mprj_pads.loop0_io\[1\]
+ padframe/mprj_pads.loop1_io\[1\]
+ padframe/mprj_pads.io_in\[1\]
+ padframe/mprj_pads.io_in_3v3\[1\]
+ padframe/mprj_pads.no_connect_1b\[1\]
+ padframe/mprj_pads.no_connect_1a\[1\]
+ padframe/mprj_pads.loop0_io\[2\]
+ padframe/mprj_pads.loop1_io\[2\]
+ padframe/mprj_pads.io_in\[2\]
+ padframe/mprj_pads.io_in_3v3\[2\]
+ padframe/mprj_pads.no_connect_1b\[2\]
+ padframe/mprj_pads.no_connect_1a\[2\]
+ padframe/mprj_pads.loop0_io\[3\]
+ padframe/mprj_pads.loop1_io\[3\]
+ padframe/mprj_pads.io_in\[3\]
+ padframe/mprj_pads.io_in_3v3\[3\]
+ padframe/mprj_pads.no_connect_1b\[3\]
+ padframe/mprj_pads.no_connect_1a\[3\]
+ padframe/mprj_pads.loop0_io\[4\]
+ padframe/mprj_pads.loop1_io\[4\]
+ padframe/mprj_pads.io_in\[4\]
+ padframe/mprj_pads.io_in_3v3\[4\]
+ padframe/mprj_pads.no_connect_1b\[4\]
+ padframe/mprj_pads.no_connect_1a\[4\]
+ padframe/mprj_pads.loop0_io\[5\]
+ padframe/mprj_pads.loop1_io\[5\]
+ padframe/mprj_pads.io_in\[5\]
+ padframe/mprj_pads.io_in_3v3\[5\]
+ padframe/mprj_pads.no_connect_1b\[5\]
+ padframe/mprj_pads.no_connect_1a\[5\]
+ padframe/mprj_pads.loop0_io\[6\]
+ padframe/mprj_pads.loop1_io\[6\]
+ padframe/mprj_pads.io_in\[6\]
+ padframe/mprj_pads.io_in_3v3\[6\]
+ padframe/mprj_pads.no_connect_1b\[6\]
+ padframe/mprj_pads.no_connect_1a\[6\]
+ padframe/mprj_pads.loop0_io\[7\]
+ padframe/mprj_pads.loop1_io\[7\]
+ padframe/mprj_pads.io_in\[7\]
+ padframe/mprj_pads.io_in_3v3\[7\]
+ padframe/mprj_pads.analog_noesd_io\[0\]
+ padframe/mprj_pads.loop0_io\[8\]
+ padframe/mprj_pads.loop1_io\[8\]
+ padframe/mprj_pads.io_in\[8\]
+ padframe/mprj_pads.io_in_3v3\[8\]
+ padframe/mprj_pads.analog_noesd_io\[1\]
+ padframe/mprj_pads.loop0_io\[9\]
+ padframe/mprj_pads.loop1_io\[9\]
+ padframe/mprj_pads.io_in\[9\]
+ padframe/mprj_pads.io_in_3v3\[9\]
+ padframe/mprj_pads.analog_noesd_io\[2\]
+ padframe/mprj_pads.loop0_io\[19\]
+ padframe/mprj_pads.loop1_io\[19\]
+ padframe/mprj_pads.io_in\[19\]
+ padframe/mprj_pads.io_in_3v3\[19\]
+ padframe/mprj_pads.analog_noesd_io\[12\]
+ padframe/mprj_pads.loop0_io\[29\]
+ padframe/mprj_pads.loop1_io\[29\]
+ padframe/mprj_pads.io_in\[29\]
+ padframe/mprj_pads.io_in_3v3\[29\]
+ padframe/mprj_pads.analog_noesd_io\[22\]
+ padframe/mprj_pads.loop0_io\[30\]
+ padframe/mprj_pads.loop1_io\[30\]
+ padframe/mprj_pads.io_in\[30\]
+ padframe/mprj_pads.io_in_3v3\[30\]
+ padframe/mprj_pads.analog_noesd_io\[23\]
+ padframe/mprj_pads.loop0_io\[31\]
+ padframe/mprj_pads.loop1_io\[31\]
+ padframe/mprj_pads.io_in\[31\]
+ padframe/mprj_pads.io_in_3v3\[31\]
+ padframe/mprj_pads.analog_noesd_io\[24\]
+ padframe/mprj_pads.loop0_io\[32\]
+ padframe/mprj_pads.loop1_io\[32\]
+ padframe/mprj_pads.io_in\[32\]
+ padframe/mprj_pads.io_in_3v3\[32\]
+ padframe/mprj_pads.analog_noesd_io\[25\]
+ padframe/mprj_pads.loop0_io\[33\]
+ padframe/mprj_pads.loop1_io\[33\]
+ padframe/mprj_pads.io_in\[33\]
+ padframe/mprj_pads.io_in_3v3\[33\]
+ padframe/mprj_pads.analog_noesd_io\[26\]
+ padframe/mprj_pads.loop0_io\[34\]
+ padframe/mprj_pads.loop1_io\[34\]
+ padframe/mprj_pads.io_in\[34\]
+ padframe/mprj_pads.io_in_3v3\[34\]
+ padframe/mprj_pads.analog_noesd_io\[27\]
+ padframe/mprj_pads.loop0_io\[35\]
+ padframe/mprj_pads.loop1_io\[35\]
+ padframe/mprj_pads.io_in\[35\]
+ padframe/mprj_pads.io_in_3v3\[35\]
+ padframe/mprj_pads.analog_noesd_io\[28\]
+ padframe/mprj_pads.loop0_io\[36\]
+ padframe/mprj_pads.loop1_io\[36\]
+ padframe/mprj_pads.io_in\[36\]
+ padframe/mprj_pads.io_in_3v3\[36\]
+ padframe/mprj_pads.no_connect_2b\[0\]
+ padframe/mprj_pads.no_connect_2a\[0\]
+ padframe/mprj_pads.loop0_io\[37\]
+ padframe/mprj_pads.loop1_io\[37\]
+ padframe/mprj_pads.io_in\[37\]
+ padframe/mprj_pads.io_in_3v3\[37\]
+ padframe/mprj_pads.no_connect_2b\[1\]
+ padframe/mprj_pads.no_connect_2a\[1\]
+ padframe/mprj_pads.loop0_io\[20\]
+ padframe/mprj_pads.loop1_io\[20\]
+ padframe/mprj_pads.io_in\[20\]
+ padframe/mprj_pads.io_in_3v3\[20\]
+ padframe/mprj_pads.analog_noesd_io\[13\]
+ padframe/mprj_pads.loop0_io\[21\]
+ padframe/mprj_pads.loop1_io\[21\]
+ padframe/mprj_pads.io_in\[21\]
+ padframe/mprj_pads.io_in_3v3\[21\]
+ padframe/mprj_pads.analog_noesd_io\[14\]
+ padframe/mprj_pads.loop0_io\[22\]
+ padframe/mprj_pads.loop1_io\[22\]
+ padframe/mprj_pads.io_in\[22\]
+ padframe/mprj_pads.io_in_3v3\[22\]
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+ padframe/mprj_pads.loop1_io\[23\]
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+ padframe/mprj_pads.analog_noesd_io\[16\]
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+ padframe/mprj_pads.loop1_io\[24\]
+ padframe/mprj_pads.io_in\[24\]
+ padframe/mprj_pads.io_in_3v3\[24\]
+ padframe/mprj_pads.analog_noesd_io\[17\]
+ padframe/mprj_pads.loop0_io\[25\]
+ padframe/mprj_pads.loop1_io\[25\]
+ padframe/mprj_pads.io_in\[25\]
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+ padframe/mprj_pads.analog_noesd_io\[18\]
+ padframe/mprj_pads.loop0_io\[26\]
+ padframe/mprj_pads.loop1_io\[26\]
+ padframe/mprj_pads.io_in\[26\]
+ padframe/mprj_pads.io_in_3v3\[26\]
+ padframe/mprj_pads.analog_noesd_io\[19\]
+ padframe/mprj_pads.loop0_io\[27\]
+ padframe/mprj_pads.loop1_io\[27\]
+ padframe/mprj_pads.io_in\[27\]
+ padframe/mprj_pads.io_in_3v3\[27\]
+ padframe/mprj_pads.analog_noesd_io\[20\]
+ padframe/mprj_pads.loop0_io\[28\]
+ padframe/mprj_pads.loop1_io\[28\]
+ padframe/mprj_pads.io_in\[28\]
+ padframe/mprj_pads.io_in_3v3\[28\]
+ padframe/mprj_pads.analog_noesd_io\[21\]
+ padframe/xres_vss_loop
+ padframe/xresloop
+ rstb_level/X
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+ sigbuf/buf_out\[96\]
+ sigbuf/buf_out\[97\]
+ sigbuf/buf_out\[98\]
+ sigbuf/buf_out\[99\]
+ sigbuf/buf_out\[9\]
+ user_id_value/mask_rev[10]
+ user_id_value/mask_rev[9]
+ user_id_value/mask_rev[8]
+ user_id_value/mask_rev[7]
+ user_id_value/mask_rev[6]
+ user_id_value/mask_rev[5]
+ user_id_value/mask_rev[4]
+ user_id_value/mask_rev[3]
+ user_id_value/mask_rev[2]
+ user_id_value/mask_rev[1]
+ user_id_value/mask_rev[0]
+ user_id_value/user_proj_id_high\[0\]
+ user_id_value/user_proj_id_high\[10\]
+ user_id_value/user_proj_id_high\[11\]
+ user_id_value/user_proj_id_high\[12\]
+ user_id_value/user_proj_id_high\[13\]
+ user_id_value/user_proj_id_high\[14\]
+ user_id_value/user_proj_id_high\[15\]
+ user_id_value/user_proj_id_high\[16\]
+ user_id_value/user_proj_id_high\[17\]
+ user_id_value/user_proj_id_high\[18\]
+ user_id_value/user_proj_id_high\[19\]
+ user_id_value/user_proj_id_high\[1\]
+ user_id_value/user_proj_id_high\[20\]
+ user_id_value/user_proj_id_high\[21\]
+ user_id_value/user_proj_id_high\[22\]
+ user_id_value/user_proj_id_high\[23\]
+ user_id_value/user_proj_id_high\[24\]
+ user_id_value/user_proj_id_high\[25\]
+ user_id_value/user_proj_id_high\[26\]
+ user_id_value/user_proj_id_high\[27\]
+ user_id_value/user_proj_id_high\[28\]
+ user_id_value/user_proj_id_high\[29\]
+ user_id_value/user_proj_id_high\[2\]
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+ user_id_value/user_proj_id_high\[31\]
+ user_id_value/user_proj_id_high\[3\]
+ user_id_value/user_proj_id_high\[4\]
+ user_id_value/user_proj_id_high\[5\]
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+ user_id_value/user_proj_id_high\[7\]
+ user_id_value/user_proj_id_high\[8\]
+ user_id_value/user_proj_id_high\[9\]
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+ spare_logic\[0\]/spare_xna[1]
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+ spare_logic\[1\]/spare_logic1\[9\]
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+ spare_logic\[2\]/spare_xi[3]
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+ spare_logic\[2\]/spare_xi[1]
+ spare_logic\[2\]/spare_xi[0]
+ spare_logic\[2\]/spare_xib
+ spare_logic\[2\]/spare_xmx[1]
+ spare_logic\[2\]/spare_xmx[0]
+ spare_logic\[2\]/spare_xna[1]
+ spare_logic\[2\]/spare_xna[0]
+ spare_logic\[2\]/spare_xno[1]
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+ spare_logic\[2\]/spare_xz[26]
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+ spare_logic\[2\]/spare_xz[24]
+ spare_logic\[2\]/spare_xz[23]
+ spare_logic\[2\]/spare_xz[22]
+ spare_logic\[2\]/spare_xz[21]
+ spare_logic\[2\]/spare_xz[20]
+ spare_logic\[2\]/spare_xz[19]
+ spare_logic\[2\]/spare_xz[18]
+ spare_logic\[2\]/spare_xz[17]
+ spare_logic\[2\]/spare_xz[16]
+ spare_logic\[2\]/spare_xz[15]
+ spare_logic\[2\]/spare_xz[14]
+ spare_logic\[2\]/spare_xz[13]
+ spare_logic\[2\]/spare_xz[12]
+ spare_logic\[2\]/spare_xz[11]
+ spare_logic\[2\]/spare_xz[10]
+ spare_logic\[2\]/spare_xz[9]
+ spare_logic\[2\]/spare_xz[8]
+ spare_logic\[2\]/spare_xz[7]
+ spare_logic\[2\]/spare_xz[6]
+ spare_logic\[2\]/spare_xz[5]
+ spare_logic\[2\]/spare_xz[4]
+ spare_logic\[2\]/spare_xz[3]
+ spare_logic\[2\]/spare_xz[2]
+ spare_logic\[2\]/spare_xz[1]
+ spare_logic\[2\]/spare_xz[0]
+ spare_logic\[2\]/spare_logic1\[0\]
+ spare_logic\[2\]/spare_logic1\[10\]
+ spare_logic\[2\]/spare_logic1\[11\]
+ spare_logic\[2\]/spare_logic1\[12\]
+ spare_logic\[2\]/spare_logic1\[13\]
+ spare_logic\[2\]/spare_logic1\[14\]
+ spare_logic\[2\]/spare_logic1\[15\]
+ spare_logic\[2\]/spare_logic1\[16\]
+ spare_logic\[2\]/spare_logic1\[17\]
+ spare_logic\[2\]/spare_logic1\[18\]
+ spare_logic\[2\]/spare_logic1\[19\]
+ spare_logic\[2\]/spare_logic1\[1\]
+ spare_logic\[2\]/spare_logic1\[20\]
+ spare_logic\[2\]/spare_logic1\[21\]
+ spare_logic\[2\]/spare_logic1\[22\]
+ spare_logic\[2\]/spare_logic1\[23\]
+ spare_logic\[2\]/spare_logic1\[24\]
+ spare_logic\[2\]/spare_logic1\[25\]
+ spare_logic\[2\]/spare_logic1\[26\]
+ spare_logic\[2\]/spare_logic1\[2\]
+ spare_logic\[2\]/spare_logic1\[3\]
+ spare_logic\[2\]/spare_logic1\[4\]
+ spare_logic\[2\]/spare_logic1\[5\]
+ spare_logic\[2\]/spare_logic1\[6\]
+ spare_logic\[2\]/spare_logic1\[7\]
+ spare_logic\[2\]/spare_logic1\[8\]
+ spare_logic\[2\]/spare_logic1\[9\]
+ spare_logic\[3\]/spare_xfq[1]
+ spare_logic\[3\]/spare_xfq[0]
+ spare_logic\[3\]/spare_xfqn[1]
+ spare_logic\[3\]/spare_xfqn[0]
+ spare_logic\[3\]/spare_xi[3]
+ spare_logic\[3\]/spare_xi[2]
+ spare_logic\[3\]/spare_xi[1]
+ spare_logic\[3\]/spare_xi[0]
+ spare_logic\[3\]/spare_xib
+ spare_logic\[3\]/spare_xmx[1]
+ spare_logic\[3\]/spare_xmx[0]
+ spare_logic\[3\]/spare_xna[1]
+ spare_logic\[3\]/spare_xna[0]
+ spare_logic\[3\]/spare_xno[1]
+ spare_logic\[3\]/spare_xno[0]
+ spare_logic\[3\]/spare_xz[26]
+ spare_logic\[3\]/spare_xz[25]
+ spare_logic\[3\]/spare_xz[24]
+ spare_logic\[3\]/spare_xz[23]
+ spare_logic\[3\]/spare_xz[22]
+ spare_logic\[3\]/spare_xz[21]
+ spare_logic\[3\]/spare_xz[20]
+ spare_logic\[3\]/spare_xz[19]
+ spare_logic\[3\]/spare_xz[18]
+ spare_logic\[3\]/spare_xz[17]
+ spare_logic\[3\]/spare_xz[16]
+ spare_logic\[3\]/spare_xz[15]
+ spare_logic\[3\]/spare_xz[14]
+ spare_logic\[3\]/spare_xz[13]
+ spare_logic\[3\]/spare_xz[12]
+ spare_logic\[3\]/spare_xz[11]
+ spare_logic\[3\]/spare_xz[10]
+ spare_logic\[3\]/spare_xz[9]
+ spare_logic\[3\]/spare_xz[8]
+ spare_logic\[3\]/spare_xz[7]
+ spare_logic\[3\]/spare_xz[6]
+ spare_logic\[3\]/spare_xz[5]
+ spare_logic\[3\]/spare_xz[4]
+ spare_logic\[3\]/spare_xz[3]
+ spare_logic\[3\]/spare_xz[2]
+ spare_logic\[3\]/spare_xz[1]
+ spare_logic\[3\]/spare_xz[0]
+ spare_logic\[3\]/spare_logic1\[0\]
+ spare_logic\[3\]/spare_logic1\[10\]
+ spare_logic\[3\]/spare_logic1\[11\]
+ spare_logic\[3\]/spare_logic1\[12\]
+ spare_logic\[3\]/spare_logic1\[13\]
+ spare_logic\[3\]/spare_logic1\[14\]
+ spare_logic\[3\]/spare_logic1\[15\]
+ spare_logic\[3\]/spare_logic1\[16\]
+ spare_logic\[3\]/spare_logic1\[17\]
+ spare_logic\[3\]/spare_logic1\[18\]
+ spare_logic\[3\]/spare_logic1\[19\]
+ spare_logic\[3\]/spare_logic1\[1\]
+ spare_logic\[3\]/spare_logic1\[20\]
+ spare_logic\[3\]/spare_logic1\[21\]
+ spare_logic\[3\]/spare_logic1\[22\]
+ spare_logic\[3\]/spare_logic1\[23\]
+ spare_logic\[3\]/spare_logic1\[24\]
+ spare_logic\[3\]/spare_logic1\[25\]
+ spare_logic\[3\]/spare_logic1\[26\]
+ spare_logic\[3\]/spare_logic1\[2\]
+ spare_logic\[3\]/spare_logic1\[3\]
+ spare_logic\[3\]/spare_logic1\[4\]
+ spare_logic\[3\]/spare_logic1\[5\]
+ spare_logic\[3\]/spare_logic1\[6\]
+ spare_logic\[3\]/spare_logic1\[7\]
+ spare_logic\[3\]/spare_logic1\[8\]
+ spare_logic\[3\]/spare_logic1\[9\]
+ user_id_value/mask_rev[31]
+ user_id_value/mask_rev[30]
+ user_id_value/mask_rev[29]
+ user_id_value/mask_rev[28]
+ user_id_value/mask_rev[27]
+ user_id_value/mask_rev[26]
+ user_id_value/mask_rev[25]
+ user_id_value/mask_rev[24]
+ user_id_value/mask_rev[23]
+ user_id_value/mask_rev[22]
+ user_id_value/mask_rev[21]
+ user_id_value/mask_rev[20]
+ user_id_value/mask_rev[19]
+ user_id_value/mask_rev[18]
+ user_id_value/mask_rev[17]
+ user_id_value/mask_rev[16]
+ user_id_value/mask_rev[15]
+ user_id_value/mask_rev[14]
+ user_id_value/mask_rev[13]
+ user_id_value/mask_rev[12]
+ user_id_value/mask_rev[11]
+Found 629 partially unannotated nets.
+ flash_clkrst_buffers/out_s[7]
+  padframe/flash_clk_pad/OE_N
+ flash_clkrst_buffers/out_s[8]
+  padframe/flash_csb_pad/OUT
+ flash_clkrst_buffers/out_s[9]
+  padframe/flash_clk_pad/OUT
+ flash_clkrst_buffers/out_s[0]
+  padframe/flash_io1_pad/OUT
+ flash_clkrst_buffers/out_s[1]
+  padframe/flash_io0_pad/OUT
+ flash_clkrst_buffers/out_s[2]
+  padframe/flash_io1_pad/DM[2]
+  padframe/flash_io1_pad/DM[1]
+  padframe/flash_io1_pad/INP_DIS
+ flash_clkrst_buffers/out_s[3]
+  padframe/flash_io0_pad/DM[2]
+  padframe/flash_io0_pad/DM[1]
+  padframe/flash_io0_pad/INP_DIS
+ flash_clkrst_buffers/out_s[4]
+  padframe/flash_io1_pad/DM[0]
+  padframe/flash_io1_pad/OE_N
+ flash_clkrst_buffers/out_s[5]
+  padframe/flash_io0_pad/DM[0]
+  padframe/flash_io0_pad/OE_N
+ flash_clkrst_buffers/out_s[6]
+  padframe/flash_csb_pad/OE_N
+ gpio_control_bidir_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[0]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[1]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[2]
+ gpio_control_bidir_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[0\]/HLD_OVR
+ gpio_control_bidir_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[0\]/INP_DIS
+ gpio_control_bidir_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[0\]/OUT
+ gpio_control_bidir_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[0\]/OE_N
+ gpio_control_bidir_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/SLOW
+ gpio_control_bidir_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/VTRIP_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_EN
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_POL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_SEL
+ gpio_control_bidir_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[0]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[1]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[2]
+ gpio_control_bidir_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[1\]/HLD_OVR
+ gpio_control_bidir_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[1\]/INP_DIS
+ gpio_control_bidir_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[1\]/OUT
+ gpio_control_bidir_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[1\]/OE_N
+ gpio_control_bidir_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/SLOW
+ gpio_control_bidir_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/VTRIP_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_EN
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_POL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_SEL
+ gpio_control_bidir_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[0]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[1]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[2]
+ gpio_control_bidir_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[16\]/HLD_OVR
+ gpio_control_bidir_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_bidir_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[16\]/INP_DIS
+ gpio_control_bidir_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[16\]/OUT
+ gpio_control_bidir_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[16\]/OE_N
+ gpio_control_bidir_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/SLOW
+ gpio_control_bidir_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/VTRIP_SEL
+ gpio_control_bidir_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[89\]/A
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_EN
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_POL
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_SEL
+ gpio_control_bidir_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[0]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[1]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[2]
+ gpio_control_bidir_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[17\]/HLD_OVR
+ gpio_control_bidir_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_bidir_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[17\]/INP_DIS
+ gpio_control_bidir_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[17\]/OUT
+ gpio_control_bidir_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[17\]/OE_N
+ gpio_control_bidir_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/SLOW
+ gpio_control_bidir_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/VTRIP_SEL
+ gpio_control_bidir_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[91\]/A
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_EN
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_POL
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_SEL
+ gpio_control_bidir_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[0]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[1]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[2]
+ gpio_control_bidir_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[18\]/HLD_OVR
+ gpio_control_bidir_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_bidir_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[18\]/INP_DIS
+ gpio_control_bidir_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[18\]/OUT
+ gpio_control_bidir_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[18\]/OE_N
+ gpio_control_bidir_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/SLOW
+ gpio_control_bidir_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/VTRIP_SEL
+ gpio_control_bidir_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[93\]/A
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_EN
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_POL
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[0]
+ gpio_control_in_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[1]
+ gpio_control_in_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[2]
+ gpio_control_in_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[8\]/HLD_OVR
+ gpio_control_in_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[8\]/INP_DIS
+ gpio_control_in_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[8\]/OUT
+ gpio_control_in_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[8\]/OE_N
+ gpio_control_in_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/SLOW
+ gpio_control_in_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_1\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[1\]/A
+ gpio_control_in_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_1\[10\]/one
+  padframe/mprj_pads.area1_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_in_1\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[0]
+ gpio_control_in_1\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[1]
+ gpio_control_in_1\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[2]
+ gpio_control_in_1\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[18\]/HLD_OVR
+ gpio_control_in_1\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_in_1\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[18\]/INP_DIS
+ gpio_control_in_1\[10\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[18\]/OUT
+ gpio_control_in_1\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[18\]/OE_N
+ gpio_control_in_1\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/SLOW
+ gpio_control_in_1\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/VTRIP_SEL
+ gpio_control_in_1\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[19\]/A
+ gpio_control_in_1\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_EN
+ gpio_control_in_1\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_POL
+ gpio_control_in_1\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[0]
+ gpio_control_in_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[1]
+ gpio_control_in_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[2]
+ gpio_control_in_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[9\]/HLD_OVR
+ gpio_control_in_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[9\]/INP_DIS
+ gpio_control_in_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[9\]/OUT
+ gpio_control_in_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[9\]/OE_N
+ gpio_control_in_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/SLOW
+ gpio_control_in_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_1\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[2\]/A
+ gpio_control_in_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_SEL
+ gpio_control_in_1\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_1\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[0]
+ gpio_control_in_1\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[1]
+ gpio_control_in_1\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[2]
+ gpio_control_in_1\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[10\]/HLD_OVR
+ gpio_control_in_1\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_1\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[10\]/INP_DIS
+ gpio_control_in_1\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[10\]/OUT
+ gpio_control_in_1\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[10\]/OE_N
+ gpio_control_in_1\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/SLOW
+ gpio_control_in_1\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_1\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[3\]/A
+ gpio_control_in_1\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_1\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_1\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_1\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_1\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[0]
+ gpio_control_in_1\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[1]
+ gpio_control_in_1\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[2]
+ gpio_control_in_1\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[11\]/HLD_OVR
+ gpio_control_in_1\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_1\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[11\]/INP_DIS
+ gpio_control_in_1\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[11\]/OUT
+ gpio_control_in_1\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[11\]/OE_N
+ gpio_control_in_1\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/SLOW
+ gpio_control_in_1\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_1\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[4\]/A
+ gpio_control_in_1\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_1\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_1\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_1\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_1\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[0]
+ gpio_control_in_1\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[1]
+ gpio_control_in_1\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[2]
+ gpio_control_in_1\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[12\]/HLD_OVR
+ gpio_control_in_1\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_1\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[12\]/INP_DIS
+ gpio_control_in_1\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[12\]/OUT
+ gpio_control_in_1\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[12\]/OE_N
+ gpio_control_in_1\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/SLOW
+ gpio_control_in_1\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_1\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[5\]/A
+ gpio_control_in_1\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_1\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_1\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_1\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_1\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[0]
+ gpio_control_in_1\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[1]
+ gpio_control_in_1\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[2]
+ gpio_control_in_1\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[13\]/HLD_OVR
+ gpio_control_in_1\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_1\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[13\]/INP_DIS
+ gpio_control_in_1\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[13\]/OUT
+ gpio_control_in_1\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[13\]/OE_N
+ gpio_control_in_1\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/SLOW
+ gpio_control_in_1\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_1\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[6\]/A
+ gpio_control_in_1\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_1\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_1\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_1\[6\]/one
+  padframe/mprj_pads.area1_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_1\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[0]
+ gpio_control_in_1\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[1]
+ gpio_control_in_1\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[2]
+ gpio_control_in_1\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[14\]/HLD_OVR
+ gpio_control_in_1\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_1\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[14\]/INP_DIS
+ gpio_control_in_1\[6\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[14\]/OUT
+ gpio_control_in_1\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[14\]/OE_N
+ gpio_control_in_1\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/SLOW
+ gpio_control_in_1\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_1\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[8\]/A
+ gpio_control_in_1\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_1\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_1\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_1\[7\]/one
+  padframe/mprj_pads.area1_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_1\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[0]
+ gpio_control_in_1\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[1]
+ gpio_control_in_1\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[2]
+ gpio_control_in_1\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[15\]/HLD_OVR
+ gpio_control_in_1\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_1\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[15\]/INP_DIS
+ gpio_control_in_1\[7\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[15\]/OUT
+ gpio_control_in_1\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[15\]/OE_N
+ gpio_control_in_1\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/SLOW
+ gpio_control_in_1\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_1\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[10\]/A
+ gpio_control_in_1\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_1\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_1\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_1\[8\]/one
+  padframe/mprj_pads.area1_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_in_1\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[0]
+ gpio_control_in_1\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[1]
+ gpio_control_in_1\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[2]
+ gpio_control_in_1\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[16\]/HLD_OVR
+ gpio_control_in_1\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_in_1\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[16\]/INP_DIS
+ gpio_control_in_1\[8\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[16\]/OUT
+ gpio_control_in_1\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[16\]/OE_N
+ gpio_control_in_1\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/SLOW
+ gpio_control_in_1\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/VTRIP_SEL
+ gpio_control_in_1\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[13\]/A
+ gpio_control_in_1\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_EN
+ gpio_control_in_1\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_POL
+ gpio_control_in_1\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_SEL
+ gpio_control_in_1\[9\]/one
+  padframe/mprj_pads.area1_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_in_1\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[0]
+ gpio_control_in_1\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[1]
+ gpio_control_in_1\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[2]
+ gpio_control_in_1\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[17\]/HLD_OVR
+ gpio_control_in_1\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_in_1\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[17\]/INP_DIS
+ gpio_control_in_1\[9\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[17\]/OUT
+ gpio_control_in_1\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[17\]/OE_N
+ gpio_control_in_1\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/SLOW
+ gpio_control_in_1\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/VTRIP_SEL
+ gpio_control_in_1\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[16\]/A
+ gpio_control_in_1\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_EN
+ gpio_control_in_1\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_POL
+ gpio_control_in_1\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_SEL
+ gpio_control_in_1a\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_1a\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[0]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[1]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[2]
+ gpio_control_in_1a\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[2\]/HLD_OVR
+ gpio_control_in_1a\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[2\]/INP_DIS
+ gpio_control_in_1a\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[2\]/OUT
+ gpio_control_in_1a\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[2\]/OE_N
+ gpio_control_in_1a\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/SLOW
+ gpio_control_in_1a\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_1a\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_1a\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_1a\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[0]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[1]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[2]
+ gpio_control_in_1a\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[3\]/HLD_OVR
+ gpio_control_in_1a\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[3\]/INP_DIS
+ gpio_control_in_1a\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[3\]/OUT
+ gpio_control_in_1a\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[3\]/OE_N
+ gpio_control_in_1a\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/SLOW
+ gpio_control_in_1a\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_1a\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_1a\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_1a\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[0]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[1]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[2]
+ gpio_control_in_1a\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[4\]/HLD_OVR
+ gpio_control_in_1a\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[4\]/INP_DIS
+ gpio_control_in_1a\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[4\]/OUT
+ gpio_control_in_1a\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[4\]/OE_N
+ gpio_control_in_1a\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/SLOW
+ gpio_control_in_1a\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_1a\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_1a\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_1a\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[0]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[1]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[2]
+ gpio_control_in_1a\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[5\]/HLD_OVR
+ gpio_control_in_1a\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[5\]/INP_DIS
+ gpio_control_in_1a\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[5\]/OUT
+ gpio_control_in_1a\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[5\]/OE_N
+ gpio_control_in_1a\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/SLOW
+ gpio_control_in_1a\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_1a\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_1a\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_1a\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[0]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[1]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[2]
+ gpio_control_in_1a\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[6\]/HLD_OVR
+ gpio_control_in_1a\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[6\]/INP_DIS
+ gpio_control_in_1a\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[6\]/OUT
+ gpio_control_in_1a\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[6\]/OE_N
+ gpio_control_in_1a\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/SLOW
+ gpio_control_in_1a\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_1a\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_1a\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_1a\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[0]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[1]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[2]
+ gpio_control_in_1a\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[7\]/HLD_OVR
+ gpio_control_in_1a\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_1a\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[7\]/INP_DIS
+ gpio_control_in_1a\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[7\]/OUT
+ gpio_control_in_1a\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[7\]/OE_N
+ gpio_control_in_1a\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/SLOW
+ gpio_control_in_1a\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_1a\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[0\]/A
+ gpio_control_in_1a\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_1a\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_1a\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_in_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[0]
+ gpio_control_in_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[1]
+ gpio_control_in_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[2]
+ gpio_control_in_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[0\]/HLD_OVR
+ gpio_control_in_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_in_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[0\]/INP_DIS
+ gpio_control_in_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[0\]/OUT
+ gpio_control_in_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[0\]/OE_N
+ gpio_control_in_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/SLOW
+ gpio_control_in_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/VTRIP_SEL
+ gpio_control_in_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[23\]/A
+ gpio_control_in_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_EN
+ gpio_control_in_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_POL
+ gpio_control_in_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_SEL
+ gpio_control_in_2\[10\]/one
+  padframe/mprj_pads.area2_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_2\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[0]
+ gpio_control_in_2\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[1]
+ gpio_control_in_2\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[2]
+ gpio_control_in_2\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[10\]/HLD_OVR
+ gpio_control_in_2\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_2\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[10\]/INP_DIS
+ gpio_control_in_2\[10\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[10\]/OUT
+ gpio_control_in_2\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[10\]/OE_N
+ gpio_control_in_2\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/SLOW
+ gpio_control_in_2\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_2\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[71\]/A
+ gpio_control_in_2\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_2\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_2\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_2\[11\]/one
+  padframe/mprj_pads.area2_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_2\[11\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[0]
+ gpio_control_in_2\[11\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[1]
+ gpio_control_in_2\[11\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[2]
+ gpio_control_in_2\[11\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[11\]/HLD_OVR
+ gpio_control_in_2\[11\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_2\[11\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[11\]/INP_DIS
+ gpio_control_in_2\[11\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[11\]/OUT
+ gpio_control_in_2\[11\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[11\]/OE_N
+ gpio_control_in_2\[11\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/SLOW
+ gpio_control_in_2\[11\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_2\[11\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[75\]/A
+ gpio_control_in_2\[11\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_2\[11\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_2\[11\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_2\[12\]/one
+  padframe/mprj_pads.area2_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_2\[12\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[0]
+ gpio_control_in_2\[12\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[1]
+ gpio_control_in_2\[12\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[2]
+ gpio_control_in_2\[12\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[12\]/HLD_OVR
+ gpio_control_in_2\[12\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_2\[12\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[12\]/INP_DIS
+ gpio_control_in_2\[12\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[12\]/OUT
+ gpio_control_in_2\[12\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[12\]/OE_N
+ gpio_control_in_2\[12\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/SLOW
+ gpio_control_in_2\[12\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_2\[12\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[78\]/A
+ gpio_control_in_2\[12\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_2\[12\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_2\[12\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_2\[13\]/one
+  padframe/mprj_pads.area2_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_2\[13\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[0]
+ gpio_control_in_2\[13\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[1]
+ gpio_control_in_2\[13\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[2]
+ gpio_control_in_2\[13\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[13\]/HLD_OVR
+ gpio_control_in_2\[13\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_2\[13\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[13\]/INP_DIS
+ gpio_control_in_2\[13\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[13\]/OUT
+ gpio_control_in_2\[13\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[13\]/OE_N
+ gpio_control_in_2\[13\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/SLOW
+ gpio_control_in_2\[13\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_2\[13\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[81\]/A
+ gpio_control_in_2\[13\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_2\[13\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_2\[13\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_2\[14\]/one
+  padframe/mprj_pads.area2_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_2\[14\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[0]
+ gpio_control_in_2\[14\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[1]
+ gpio_control_in_2\[14\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[2]
+ gpio_control_in_2\[14\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[14\]/HLD_OVR
+ gpio_control_in_2\[14\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_2\[14\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[14\]/INP_DIS
+ gpio_control_in_2\[14\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[14\]/OUT
+ gpio_control_in_2\[14\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[14\]/OE_N
+ gpio_control_in_2\[14\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/SLOW
+ gpio_control_in_2\[14\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_2\[14\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[84\]/A
+ gpio_control_in_2\[14\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_2\[14\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_2\[14\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_2\[15\]/one
+  padframe/mprj_pads.area2_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_2\[15\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[0]
+ gpio_control_in_2\[15\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[1]
+ gpio_control_in_2\[15\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[2]
+ gpio_control_in_2\[15\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[15\]/HLD_OVR
+ gpio_control_in_2\[15\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_2\[15\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[15\]/INP_DIS
+ gpio_control_in_2\[15\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[15\]/OUT
+ gpio_control_in_2\[15\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[15\]/OE_N
+ gpio_control_in_2\[15\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/SLOW
+ gpio_control_in_2\[15\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_2\[15\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[87\]/A
+ gpio_control_in_2\[15\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_2\[15\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_2\[15\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_in_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[0]
+ gpio_control_in_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[1]
+ gpio_control_in_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[2]
+ gpio_control_in_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[1\]/HLD_OVR
+ gpio_control_in_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_in_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[1\]/INP_DIS
+ gpio_control_in_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[1\]/OUT
+ gpio_control_in_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[1\]/OE_N
+ gpio_control_in_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/SLOW
+ gpio_control_in_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/VTRIP_SEL
+ gpio_control_in_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[29\]/A
+ gpio_control_in_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_EN
+ gpio_control_in_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_POL
+ gpio_control_in_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_SEL
+ gpio_control_in_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[0]
+ gpio_control_in_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[1]
+ gpio_control_in_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[2]
+ gpio_control_in_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[2\]/HLD_OVR
+ gpio_control_in_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[2\]/INP_DIS
+ gpio_control_in_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[2\]/OUT
+ gpio_control_in_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[2\]/OE_N
+ gpio_control_in_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/SLOW
+ gpio_control_in_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[35\]/A
+ gpio_control_in_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_2\[3\]/one
+  padframe/mprj_pads.area2_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_2\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[0]
+ gpio_control_in_2\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[1]
+ gpio_control_in_2\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[2]
+ gpio_control_in_2\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[3\]/HLD_OVR
+ gpio_control_in_2\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_2\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[3\]/INP_DIS
+ gpio_control_in_2\[3\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[3\]/OUT
+ gpio_control_in_2\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[3\]/OE_N
+ gpio_control_in_2\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/SLOW
+ gpio_control_in_2\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_2\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[41\]/A
+ gpio_control_in_2\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_2\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_2\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_2\[4\]/one
+  padframe/mprj_pads.area2_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_2\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[0]
+ gpio_control_in_2\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[1]
+ gpio_control_in_2\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[2]
+ gpio_control_in_2\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[4\]/HLD_OVR
+ gpio_control_in_2\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_2\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[4\]/INP_DIS
+ gpio_control_in_2\[4\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[4\]/OUT
+ gpio_control_in_2\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[4\]/OE_N
+ gpio_control_in_2\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/SLOW
+ gpio_control_in_2\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_2\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[46\]/A
+ gpio_control_in_2\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_2\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_2\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_2\[5\]/one
+  padframe/mprj_pads.area2_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_2\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[0]
+ gpio_control_in_2\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[1]
+ gpio_control_in_2\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[2]
+ gpio_control_in_2\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[5\]/HLD_OVR
+ gpio_control_in_2\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_2\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[5\]/INP_DIS
+ gpio_control_in_2\[5\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[5\]/OUT
+ gpio_control_in_2\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[5\]/OE_N
+ gpio_control_in_2\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/SLOW
+ gpio_control_in_2\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_2\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[51\]/A
+ gpio_control_in_2\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_2\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_2\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_2\[6\]/one
+  padframe/mprj_pads.area2_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_2\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[0]
+ gpio_control_in_2\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[1]
+ gpio_control_in_2\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[2]
+ gpio_control_in_2\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[6\]/HLD_OVR
+ gpio_control_in_2\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_2\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[6\]/INP_DIS
+ gpio_control_in_2\[6\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[6\]/OUT
+ gpio_control_in_2\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[6\]/OE_N
+ gpio_control_in_2\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/SLOW
+ gpio_control_in_2\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_2\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[55\]/A
+ gpio_control_in_2\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_2\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_2\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_2\[7\]/one
+  padframe/mprj_pads.area2_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_2\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[0]
+ gpio_control_in_2\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[1]
+ gpio_control_in_2\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[2]
+ gpio_control_in_2\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[7\]/HLD_OVR
+ gpio_control_in_2\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_2\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[7\]/INP_DIS
+ gpio_control_in_2\[7\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[7\]/OUT
+ gpio_control_in_2\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[7\]/OE_N
+ gpio_control_in_2\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/SLOW
+ gpio_control_in_2\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_2\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[59\]/A
+ gpio_control_in_2\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_2\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_2\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[8\]/one
+  gpio_control_in_2\[8\]/ANTENNA_input1_A/DIODE
+  gpio_control_in_2\[8\]/input1/A
+  padframe/mprj_pads.area2_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_2\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[0]
+ gpio_control_in_2\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[1]
+ gpio_control_in_2\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[2]
+ gpio_control_in_2\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[8\]/HLD_OVR
+ gpio_control_in_2\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_2\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[8\]/INP_DIS
+ gpio_control_in_2\[8\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[8\]/OUT
+ gpio_control_in_2\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[8\]/OE_N
+ gpio_control_in_2\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/SLOW
+ gpio_control_in_2\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_2\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[63\]/A
+ gpio_control_in_2\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_2\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_2\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_2\[9\]/one
+  padframe/mprj_pads.area2_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_2\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[0]
+ gpio_control_in_2\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[1]
+ gpio_control_in_2\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[2]
+ gpio_control_in_2\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[9\]/HLD_OVR
+ gpio_control_in_2\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_2\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[9\]/INP_DIS
+ gpio_control_in_2\[9\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[9\]/OUT
+ gpio_control_in_2\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[9\]/OE_N
+ gpio_control_in_2\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/SLOW
+ gpio_control_in_2\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_2\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[67\]/A
+ gpio_control_in_2\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_2\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_2\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_SEL
+ housekeeping/mgmt_gpio_out[14]
+  sigbuf/signal_buffers\[103\]/A
+ housekeeping/mgmt_gpio_out[15]
+  sigbuf/signal_buffers\[105\]/A
+ housekeeping/mgmt_gpio_out[9]
+  sigbuf/signal_buffers\[97\]/A
+ housekeeping/mgmt_gpio_oeb[35]
+  sigbuf/signal_buffers\[190\]/A
+ housekeeping/mgmt_gpio_oeb[36]
+  sigbuf/signal_buffers\[192\]/A
+ housekeeping/mgmt_gpio_oeb[37]
+  sigbuf/signal_buffers\[194\]/A
+ housekeeping/mgmt_gpio_out[10]
+  sigbuf/signal_buffers\[98\]/A
+ housekeeping/mgmt_gpio_out[11]
+  sigbuf/signal_buffers\[99\]/A
+ housekeeping/mgmt_gpio_out[12]
+  sigbuf/signal_buffers\[100\]/A
+ housekeeping/mgmt_gpio_out[13]
+  sigbuf/signal_buffers\[101\]/A
+ housekeeping/mgmt_gpio_out[16]
+  sigbuf/signal_buffers\[108\]/A
+ housekeeping/mgmt_gpio_out[17]
+  sigbuf/signal_buffers\[111\]/A
+ housekeeping/mgmt_gpio_out[18]
+  sigbuf/signal_buffers\[114\]/A
+ housekeeping/mgmt_gpio_out[19]
+  sigbuf/signal_buffers\[118\]/A
+ housekeeping/mgmt_gpio_out[20]
+  sigbuf/signal_buffers\[124\]/A
+ housekeeping/mgmt_gpio_out[21]
+  sigbuf/signal_buffers\[130\]/A
+ housekeeping/mgmt_gpio_out[22]
+  sigbuf/signal_buffers\[136\]/A
+ housekeeping/mgmt_gpio_out[23]
+  sigbuf/signal_buffers\[141\]/A
+ housekeeping/mgmt_gpio_out[24]
+  sigbuf/signal_buffers\[146\]/A
+ housekeeping/mgmt_gpio_out[25]
+  sigbuf/signal_buffers\[150\]/A
+ housekeeping/mgmt_gpio_out[26]
+  sigbuf/signal_buffers\[154\]/A
+ housekeeping/mgmt_gpio_out[27]
+  sigbuf/signal_buffers\[158\]/A
+ housekeeping/mgmt_gpio_out[28]
+  sigbuf/signal_buffers\[162\]/A
+ housekeeping/mgmt_gpio_out[29]
+  sigbuf/signal_buffers\[166\]/A
+ housekeeping/mgmt_gpio_out[30]
+  sigbuf/signal_buffers\[170\]/A
+ housekeeping/mgmt_gpio_out[31]
+  sigbuf/signal_buffers\[173\]/A
+ housekeeping/mgmt_gpio_out[32]
+  sigbuf/signal_buffers\[176\]/A
+ housekeeping/mgmt_gpio_out[33]
+  sigbuf/signal_buffers\[179\]/A
+ housekeeping/mgmt_gpio_out[34]
+  sigbuf/signal_buffers\[182\]/A
+ housekeeping/mgmt_gpio_out[35]
+  sigbuf/signal_buffers\[184\]/A
+ housekeeping/mgmt_gpio_out[36]
+  sigbuf/signal_buffers\[186\]/A
+ housekeeping/mgmt_gpio_out[37]
+  sigbuf/signal_buffers\[188\]/A
+ housekeeping/mgmt_gpio_out[7]
+  sigbuf/signal_buffers\[95\]/A
+ housekeeping/mgmt_gpio_out[8]
+  sigbuf/signal_buffers\[96\]/A
+ mgmt_buffers/mprj_dat_o_user[0]
+  mprj/mprj/input1/A
+  mprj/mprj/ANTENNA_input1_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[10]
+  mprj/mprj/input11/A
+  mprj/mprj/ANTENNA_input11_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[11]
+  mprj/mprj/input12/A
+  mprj/mprj/ANTENNA_input12_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[12]
+  mprj/mprj/input13/A
+  mprj/mprj/ANTENNA_input13_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[13]
+  mprj/mprj/input14/A
+  mprj/mprj/ANTENNA_input14_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[14]
+  mprj/mprj/input15/A
+  mprj/mprj/ANTENNA_input15_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[15]
+  mprj/mprj/input16/A
+  mprj/mprj/ANTENNA_input16_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[1]
+  mprj/mprj/input2/A
+  mprj/mprj/ANTENNA_input2_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[2]
+  mprj/mprj/input3/A
+  mprj/mprj/ANTENNA_input3_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[3]
+  mprj/mprj/input4/A
+  mprj/mprj/ANTENNA_input4_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[4]
+  mprj/mprj/input5/A
+  mprj/mprj/ANTENNA_input5_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[5]
+  mprj/mprj/input6/A
+  mprj/mprj/ANTENNA_input6_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[6]
+  mprj/mprj/input7/A
+  mprj/mprj/ANTENNA_input7_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[7]
+  mprj/mprj/input8/A
+  mprj/mprj/ANTENNA_input8_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[8]
+  mprj/mprj/input9/A
+  mprj/mprj/ANTENNA_input9_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[9]
+  mprj/mprj/input10/A
+  mprj/mprj/ANTENNA_input10_A/DIODE
+ soc/gpio_inenb_pad
+  padframe/gpio_pad/INP_DIS
+ soc/gpio_mode0_pad
+  padframe/gpio_pad/DM[0]
+ soc/gpio_mode1_pad
+  padframe/gpio_pad/DM[2]
+  padframe/gpio_pad/DM[1]
+ soc/gpio_out_pad
+  padframe/gpio_pad/OUT
+ soc/gpio_outenb_pad
+  padframe/gpio_pad/OE_N
+ soc/por_l_out
+  padframe/clock_pad/INP_DIS

signoff/caravel/openlane-signoff/timing/min/f-clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/f-clk-max.rpt b/signoff/caravel/openlane-signoff/timing/min/f-clk-max.rpt
new file mode 100644
index 0000000..1e1d12a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:83942cf6401cf801adb0ed9c0afa2ced5d1a0742f1c5225fd3806f41fe8d3e59
+size 28500523

signoff/caravel/openlane-signoff/timing/min/f-clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/f-clk-min.rpt b/signoff/caravel/openlane-signoff/timing/min/f-clk-min.rpt
new file mode 100644
index 0000000..995649a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:837a294e2fbcb3652f9a97277c0c330d510258058a887baa96a14178ea17fd5b
+size 18808851

signoff/caravel/openlane-signoff/timing/min/f-hk_serial_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/f-hk_serial_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/min/f-hk_serial_clk-max.rpt
new file mode 100644
index 0000000..d668fc3
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-hk_serial_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:82acdd57bdefb87e6617170387c83f5783a81bdd08f25557dca229ebd387dcbc
+size 345

signoff/caravel/openlane-signoff/timing/min/f-hk_serial_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/f-hk_serial_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/min/f-hk_serial_clk-min.rpt
new file mode 100644
index 0000000..12cdaa6
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-hk_serial_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:28b05b9015507e2fe544e662950cfcbf25c5af08b04e4cab216878cf0b50c5f8
+size 11323365

signoff/caravel/openlane-signoff/timing/min/f-hkspi_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/f-hkspi_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/min/f-hkspi_clk-max.rpt
new file mode 100644
index 0000000..ed4be8a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-hkspi_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:d5abe4421538304b2e5cc2b117ec4e5263012b38b82fa048a29809e0a5bf81b4
+size 341

signoff/caravel/openlane-signoff/timing/min/f-hkspi_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/f-hkspi_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/min/f-hkspi_clk-min.rpt
new file mode 100644
index 0000000..0bb2693
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-hkspi_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:401642f7db490a094c437a78370cb01ec2e6593940a94bc726460aff9654af94
+size 6168130

signoff/caravel/openlane-signoff/timing/min/f-max.rpt

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new file mode 100644
index 0000000..d2db5e1
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:839caa3e6b523a6a32fa0738216ca74dbb533987b0eded560cd29ced60ff9640
+size 278475224

signoff/caravel/openlane-signoff/timing/min/f-min.rpt

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new file mode 100644
index 0000000..c66af61
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ec4dd06ee59101703b0b7d3d52048d27b76b47f36030adfc695ee2e6c8e8cf3b
+size 264453928

signoff/caravel/openlane-signoff/timing/min/f-mprj-max.rpt

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new file mode 100644
index 0000000..65359d0
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-mprj-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:67a8a38fe806fafac8ce0970248939d629c9479ef76a1534917a4b59139631a7
+size 533321

signoff/caravel/openlane-signoff/timing/min/f-mprj-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/f-mprj-min.rpt b/signoff/caravel/openlane-signoff/timing/min/f-mprj-min.rpt
new file mode 100644
index 0000000..34165a8
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-mprj-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:54dbfa4dee97340bd9eb3f7c2b31365221cd25dd404b1004568348be0c5f85a4
+size 448607

signoff/caravel/openlane-signoff/timing/min/f-soc-max.rpt

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new file mode 100644
index 0000000..d2995c6
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-soc-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ae8694139ce59476ab732a291f75c8ee6bb0d82990bb2374a46a6c8bdf9a599e
+size 357

signoff/caravel/openlane-signoff/timing/min/f-soc-min.rpt

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new file mode 100644
index 0000000..0c840bd
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-soc-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:b9b373992c734d292a2d548871a3cf74f22aafc0c0cd505208e5799dae6b62ee
+size 18068754

signoff/caravel/openlane-signoff/timing/min/f-summary.rpt

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new file mode 100644
index 0000000..495a893
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-summary.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:db23e70e39ed79e34a661a3811fb0bc499e71748a3f9f4fd3bbb412a6d3ff798
+size 1790612

signoff/caravel/openlane-signoff/timing/min/f-unannotated.log

diff --git a/signoff/caravel/openlane-signoff/timing/min/f-unannotated.log b/signoff/caravel/openlane-signoff/timing/min/f-unannotated.log
new file mode 100644
index 0000000..8dc7700
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/f-unannotated.log
@@ -0,0 +1,4179 @@
+Found 2894 unannotated nets.
+ padframe/flash_clk
+ padframe/mprj_analog_io[26]
+ mprj_io[28]
+ vssa2
+ vssa1
+ vdda1
+ mprj_io[4]
+ mprj_io[5]
+ mprj_io[19]
+ vssa1_2
+ vdda2
+ mprj_io[2]
+ mprj_io[3]
+ mprj_io[14]
+ mprj_io[33]
+ mprj_io[34]
+ resetb
+ mprj_io[1]
+ mprj_io[8]
+ mprj_io[9]
+ mprj_io[6]
+ mprj_io[11]
+ mprj_io[13]
+ mprj_io[15]
+ mprj_io[17]
+ mprj_io[18]
+ mprj_io[20]
+ mprj_io[23]
+ mprj_io[16]
+ mprj_io[27]
+ mprj_io[29]
+ mprj_io[32]
+ vssd2
+ vccd1
+ clock
+ gpio
+ vssd
+ vdda
+ mprj_io[37]
+ vccd
+ vssa
+ vssio
+ mprj_io[30]
+ vssd1
+ vssio_2
+ vddio
+ mprj_io[36]
+ vddio_2
+ mprj_io[31]
+ vccd2
+ vdda1_2
+ mprj_io[21]
+ mprj_io[26]
+ mprj_io[35]
+ mprj_io[0]
+ mprj_io[22]
+ mprj_io[24]
+ mprj_io[25]
+ mprj_io[7]
+ mprj_io[12]
+ mprj_io[10]
+ gpio_control_bidir_2\[2\]/_053_
+ gpio_control_bidir_2\[2\]/_052_
+ gpio_control_bidir_2\[2\]/_051_
+ gpio_control_bidir_2\[2\]/_050_
+ gpio_control_bidir_2\[2\]/_049_
+ gpio_control_bidir_2\[2\]/_048_
+ gpio_control_bidir_2\[2\]/_047_
+ gpio_control_bidir_2\[2\]/_046_
+ gpio_control_bidir_2\[2\]/_057_
+ gpio_control_bidir_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[7\]/_052_
+ gpio_control_in_1\[7\]/_056_
+ gpio_control_in_1\[7\]/_055_
+ gpio_control_in_1\[7\]/_054_
+ gpio_control_in_1\[7\]/_053_
+ gpio_control_in_1\[7\]/_051_
+ gpio_control_in_1\[7\]/_050_
+ gpio_control_in_1\[7\]/_049_
+ gpio_control_in_1\[7\]/_048_
+ gpio_control_in_1\[7\]/_047_
+ gpio_control_in_1\[7\]/_046_
+ gpio_control_in_1\[7\]/_057_
+ gpio_control_in_1\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_047_
+ gpio_control_in_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_049_
+ gpio_control_in_2\[0\]/_048_
+ gpio_control_in_2\[0\]/_046_
+ gpio_control_in_2\[0\]/_057_
+ gpio_control_in_2\[3\]/_047_
+ gpio_control_in_2\[3\]/_052_
+ gpio_control_in_2\[3\]/_051_
+ gpio_control_in_2\[3\]/_050_
+ gpio_control_in_2\[3\]/_049_
+ gpio_control_in_2\[3\]/_048_
+ gpio_control_in_2\[3\]/_046_
+ gpio_control_in_2\[3\]/_057_
+ gpio_control_in_2\[3\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_20/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[2\]
+ gpio_defaults_block_21/gpio_defaults_low\[6\]
+ gpio_defaults_block_21/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[3\]
+ gpio_defaults_block_20/gpio_defaults_high\[11\]
+ gpio_defaults_block_20/gpio_defaults_low\[11\]
+ gpio_defaults_block_20/gpio_defaults_high\[12\]
+ gpio_defaults_block_20/gpio_defaults_low\[12\]
+ gpio_defaults_block_20/gpio_defaults_high\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[2\]
+ gpio_defaults_block_20/gpio_defaults_low\[2\]
+ gpio_defaults_block_20/gpio_defaults_high\[4\]
+ gpio_defaults_block_20/gpio_defaults_low\[4\]
+ gpio_defaults_block_20/gpio_defaults_high\[5\]
+ gpio_defaults_block_20/gpio_defaults_low\[5\]
+ gpio_defaults_block_20/gpio_defaults_high\[6\]
+ gpio_defaults_block_20/gpio_defaults_low\[6\]
+ gpio_defaults_block_20/gpio_defaults_high\[7\]
+ gpio_defaults_block_20/gpio_defaults_low\[7\]
+ gpio_defaults_block_20/gpio_defaults_high\[8\]
+ gpio_defaults_block_20/gpio_defaults_low\[8\]
+ gpio_defaults_block_20/gpio_defaults_high\[9\]
+ gpio_defaults_block_20/gpio_defaults_low\[9\]
+ gpio_defaults_block_21/gpio_defaults_high\[0\]
+ gpio_defaults_block_21/gpio_defaults_low\[0\]
+ gpio_defaults_block_21/gpio_defaults_high\[10\]
+ gpio_defaults_block_21/gpio_defaults_low\[10\]
+ gpio_defaults_block_21/gpio_defaults_high\[11\]
+ gpio_defaults_block_21/gpio_defaults_low\[11\]
+ gpio_defaults_block_21/gpio_defaults_high\[12\]
+ gpio_defaults_block_21/gpio_defaults_low\[12\]
+ gpio_defaults_block_21/gpio_defaults_high\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[2\]
+ gpio_defaults_block_21/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_low\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[4\]
+ gpio_defaults_block_21/gpio_defaults_low\[4\]
+ gpio_defaults_block_21/gpio_defaults_high\[5\]
+ gpio_defaults_block_21/gpio_defaults_low\[5\]
+ gpio_defaults_block_21/gpio_defaults_high\[6\]
+ gpio_defaults_block_21/gpio_defaults_high\[7\]
+ gpio_defaults_block_21/gpio_defaults_high\[8\]
+ gpio_defaults_block_21/gpio_defaults_low\[8\]
+ gpio_defaults_block_21/gpio_defaults_high\[9\]
+ gpio_defaults_block_21/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[2\]
+ gpio_defaults_block_19/gpio_defaults_high\[3\]
+ gpio_defaults_block_19/gpio_defaults_low\[3\]
+ gpio_defaults_block_19/gpio_defaults_high\[4\]
+ gpio_defaults_block_19/gpio_defaults_low\[4\]
+ gpio_defaults_block_19/gpio_defaults_high\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[6\]
+ gpio_defaults_block_19/gpio_defaults_high\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[8\]
+ gpio_defaults_block_19/gpio_defaults_low\[8\]
+ gpio_defaults_block_19/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[9\]
+ gpio_defaults_block_2/gpio_defaults_high\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[10\]
+ gpio_defaults_block_2/gpio_defaults_low\[10\]
+ gpio_defaults_block_2/gpio_defaults_high\[11\]
+ gpio_defaults_block_2/gpio_defaults_low\[11\]
+ gpio_defaults_block_2/gpio_defaults_high\[12\]
+ gpio_defaults_block_2/gpio_defaults_low\[12\]
+ gpio_defaults_block_2/gpio_defaults_high\[1\]
+ gpio_defaults_block_2/gpio_defaults_high\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_high\[4\]
+ gpio_defaults_block_2/gpio_defaults_low\[4\]
+ gpio_defaults_block_2/gpio_defaults_high\[5\]
+ gpio_defaults_block_2/gpio_defaults_low\[5\]
+ gpio_defaults_block_2/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[7\]
+ gpio_defaults_block_2/gpio_defaults_low\[7\]
+ gpio_defaults_block_2/gpio_defaults_high\[8\]
+ gpio_defaults_block_2/gpio_defaults_low\[8\]
+ gpio_defaults_block_2/gpio_defaults_high\[9\]
+ gpio_defaults_block_2/gpio_defaults_low\[9\]
+ gpio_defaults_block_20/gpio_defaults_high\[0\]
+ gpio_defaults_block_20/gpio_defaults_low\[0\]
+ gpio_defaults_block_20/gpio_defaults_high\[10\]
+ gpio_defaults_block_20/gpio_defaults_low\[10\]
+ padframe/mprj_analog_io[7]
+ padframe/flash_io0
+ padframe/flash_io0_di_core
+ gpio_control_bidir_1\[0\]/_056_
+ gpio_control_bidir_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_1\[0\]/_051_
+ gpio_control_bidir_1\[0\]/_055_
+ gpio_control_bidir_1\[0\]/_054_
+ gpio_control_bidir_1\[0\]/_053_
+ gpio_control_bidir_1\[0\]/_052_
+ gpio_control_bidir_1\[0\]/_050_
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+ gpio_control_bidir_1\[0\]/_047_
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+ gpio_control_bidir_1\[1\]/_047_
+ gpio_control_bidir_1\[1\]/_046_
+ gpio_control_bidir_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_047_
+ gpio_control_bidir_2\[0\]/_049_
+ gpio_control_bidir_2\[0\]/_056_
+ gpio_control_bidir_2\[0\]/_051_
+ gpio_control_bidir_2\[0\]/_050_
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+ gpio_control_bidir_2\[0\]/_055_
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+ gpio_control_bidir_2\[2\]/_054_
+ gpio_control_bidir_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[0\]/_055_
+ gpio_control_in_1\[0\]/_056_
+ gpio_control_in_1\[0\]/_054_
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+ gpio_control_in_1\[0\]/_052_
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+ gpio_control_in_1\[10\]/_057_
+ gpio_control_in_1\[10\]/gpio_logic_high/gpio_logic1
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+ gpio_control_in_1\[9\]/_053_
+ gpio_control_in_1\[9\]/_052_
+ gpio_control_in_1\[9\]/_051_
+ gpio_control_in_1\[9\]/_050_
+ gpio_control_in_1\[9\]/_049_
+ gpio_control_in_1\[9\]/_048_
+ gpio_control_in_1\[9\]/_047_
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+ gpio_control_in_1a\[0\]/_056_
+ gpio_control_in_1a\[0\]/_055_
+ gpio_control_in_1a\[0\]/_054_
+ gpio_control_in_1a\[0\]/_053_
+ gpio_control_in_1a\[0\]/_052_
+ gpio_control_in_1a\[0\]/_051_
+ gpio_control_in_1a\[0\]/_050_
+ gpio_control_in_1a\[0\]/_048_
+ gpio_control_in_1a\[0\]/_047_
+ gpio_control_in_1a\[0\]/_046_
+ gpio_control_in_1a\[0\]/_057_
+ gpio_control_in_1a\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[1\]/_047_
+ gpio_control_in_1a\[1\]/_056_
+ gpio_control_in_1a\[1\]/_055_
+ gpio_control_in_1a\[1\]/_054_
+ gpio_control_in_1a\[1\]/_053_
+ gpio_control_in_1a\[1\]/_052_
+ gpio_control_in_1a\[1\]/_051_
+ gpio_control_in_1a\[1\]/_050_
+ gpio_control_in_1a\[1\]/_049_
+ gpio_control_in_1a\[1\]/_048_
+ gpio_control_in_1a\[1\]/_046_
+ gpio_control_in_1a\[1\]/_057_
+ gpio_control_in_1a\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[2\]/_055_
+ gpio_control_in_1a\[2\]/_049_
+ gpio_control_in_1a\[2\]/_056_
+ gpio_control_in_1a\[2\]/_054_
+ gpio_control_in_1a\[2\]/_053_
+ gpio_control_in_1a\[2\]/_052_
+ gpio_control_in_1a\[2\]/_051_
+ gpio_control_in_1a\[2\]/_050_
+ gpio_control_in_1a\[2\]/_048_
+ gpio_control_in_1a\[2\]/_047_
+ gpio_control_in_1a\[2\]/_046_
+ gpio_control_in_1a\[2\]/_057_
+ gpio_control_in_1a\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/_056_
+ gpio_control_in_1a\[3\]/_055_
+ gpio_control_in_1a\[3\]/_054_
+ gpio_control_in_1a\[3\]/_053_
+ gpio_control_in_1a\[3\]/_052_
+ gpio_control_in_1a\[3\]/_051_
+ gpio_control_in_1a\[3\]/_050_
+ gpio_control_in_1a\[3\]/_049_
+ gpio_control_in_1a\[3\]/_048_
+ gpio_control_in_1a\[3\]/_047_
+ gpio_control_in_1a\[3\]/_046_
+ gpio_control_in_1a\[3\]/_057_
+ gpio_control_in_1a\[4\]/_047_
+ gpio_control_in_1a\[4\]/_049_
+ gpio_control_in_1a\[4\]/_056_
+ gpio_control_in_1a\[4\]/_051_
+ gpio_control_in_1a\[4\]/_050_
+ gpio_control_in_1a\[4\]/_048_
+ gpio_control_in_1a\[4\]/_046_
+ gpio_control_in_1a\[4\]/_057_
+ gpio_control_in_1a\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[4\]/_055_
+ gpio_control_in_1a\[4\]/_054_
+ gpio_control_in_1a\[4\]/_053_
+ gpio_control_in_1a\[4\]/_052_
+ gpio_control_in_1a\[5\]/_047_
+ gpio_control_in_1a\[5\]/_056_
+ gpio_control_in_1a\[5\]/_055_
+ gpio_control_in_1a\[5\]/_054_
+ gpio_control_in_1a\[5\]/_053_
+ gpio_control_in_1a\[5\]/_052_
+ gpio_control_in_1a\[5\]/_051_
+ gpio_control_in_1a\[5\]/_050_
+ gpio_control_in_1a\[5\]/_049_
+ gpio_control_in_1a\[5\]/_048_
+ gpio_control_in_1a\[5\]/_046_
+ gpio_control_in_1a\[5\]/_057_
+ gpio_control_in_1a\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_056_
+ gpio_control_in_2\[0\]/_055_
+ gpio_control_in_2\[0\]/_054_
+ gpio_control_in_2\[0\]/_053_
+ gpio_control_in_2\[0\]/_052_
+ gpio_control_in_2\[0\]/_051_
+ gpio_control_in_2\[0\]/_050_
+ gpio_control_in_2\[10\]/_047_
+ gpio_control_in_2\[10\]/_052_
+ gpio_control_in_2\[10\]/_051_
+ gpio_control_in_2\[10\]/_046_
+ gpio_control_in_2\[10\]/_056_
+ gpio_control_in_2\[10\]/_055_
+ gpio_control_in_2\[10\]/_054_
+ gpio_control_in_2\[10\]/_053_
+ gpio_control_in_2\[10\]/_050_
+ gpio_control_in_2\[10\]/_049_
+ gpio_control_in_2\[10\]/_048_
+ gpio_control_in_2\[10\]/_057_
+ gpio_control_in_2\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_056_
+ gpio_control_in_2\[11\]/_057_
+ gpio_control_in_2\[11\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_055_
+ gpio_control_in_2\[11\]/_054_
+ gpio_control_in_2\[11\]/_053_
+ gpio_control_in_2\[11\]/_052_
+ gpio_control_in_2\[11\]/_051_
+ gpio_control_in_2\[11\]/_050_
+ gpio_control_in_2\[11\]/_049_
+ gpio_control_in_2\[11\]/_048_
+ gpio_control_in_2\[11\]/_047_
+ gpio_control_in_2\[11\]/_046_
+ gpio_control_in_2\[12\]/_056_
+ gpio_control_in_2\[12\]/_055_
+ gpio_control_in_2\[12\]/_054_
+ gpio_control_in_2\[12\]/_053_
+ gpio_control_in_2\[12\]/_052_
+ gpio_control_in_2\[12\]/_051_
+ gpio_control_in_2\[12\]/_050_
+ gpio_control_in_2\[12\]/_049_
+ gpio_control_in_2\[12\]/_048_
+ gpio_control_in_2\[12\]/_047_
+ gpio_control_in_2\[12\]/_046_
+ gpio_control_in_2\[12\]/_057_
+ gpio_control_in_2\[12\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[13\]/_056_
+ gpio_control_in_2\[13\]/_055_
+ gpio_control_in_2\[13\]/_054_
+ gpio_control_in_2\[13\]/_053_
+ gpio_control_in_2\[13\]/_052_
+ gpio_control_in_2\[13\]/_051_
+ gpio_control_in_2\[13\]/_050_
+ gpio_control_in_2\[13\]/_049_
+ gpio_control_in_2\[13\]/_048_
+ gpio_control_in_2\[13\]/_047_
+ gpio_control_in_2\[13\]/_046_
+ gpio_control_in_2\[13\]/_057_
+ gpio_control_in_2\[13\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[14\]/_056_
+ gpio_control_in_2\[14\]/_055_
+ gpio_control_in_2\[14\]/_054_
+ gpio_control_in_2\[14\]/_053_
+ gpio_control_in_2\[14\]/_052_
+ gpio_control_in_2\[14\]/_051_
+ gpio_control_in_2\[14\]/_050_
+ gpio_control_in_2\[14\]/_049_
+ gpio_control_in_2\[14\]/_048_
+ gpio_control_in_2\[14\]/_047_
+ gpio_control_in_2\[14\]/_046_
+ gpio_control_in_2\[14\]/_057_
+ gpio_control_in_2\[14\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/_056_
+ gpio_control_in_2\[15\]/_055_
+ gpio_control_in_2\[15\]/_054_
+ gpio_control_in_2\[15\]/_053_
+ gpio_control_in_2\[15\]/_052_
+ gpio_control_in_2\[15\]/_051_
+ gpio_control_in_2\[15\]/_050_
+ gpio_control_in_2\[15\]/_049_
+ gpio_control_in_2\[15\]/_048_
+ gpio_control_in_2\[15\]/_047_
+ gpio_control_in_2\[15\]/_046_
+ gpio_control_in_2\[15\]/_057_
+ gpio_control_in_2\[1\]/_049_
+ gpio_control_in_2\[1\]/_053_
+ gpio_control_in_2\[1\]/_052_
+ gpio_control_in_2\[1\]/_051_
+ gpio_control_in_2\[1\]/_050_
+ gpio_control_in_2\[1\]/_048_
+ gpio_control_in_2\[1\]/_047_
+ gpio_control_in_2\[1\]/_046_
+ gpio_control_in_2\[1\]/_057_
+ gpio_control_in_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[1\]/_056_
+ gpio_control_in_2\[1\]/_055_
+ gpio_control_in_2\[1\]/_054_
+ gpio_control_in_2\[2\]/_056_
+ gpio_control_in_2\[2\]/_051_
+ gpio_control_in_2\[2\]/_046_
+ gpio_control_in_2\[2\]/_055_
+ gpio_control_in_2\[2\]/_054_
+ gpio_control_in_2\[2\]/_053_
+ gpio_control_in_2\[2\]/_052_
+ gpio_control_in_2\[2\]/_050_
+ gpio_control_in_2\[2\]/_049_
+ gpio_control_in_2\[2\]/_048_
+ gpio_control_in_2\[2\]/_047_
+ gpio_control_in_2\[2\]/_057_
+ gpio_control_in_2\[3\]/_055_
+ gpio_control_in_2\[3\]/_056_
+ gpio_control_in_2\[3\]/_054_
+ gpio_control_in_2\[3\]/_053_
+ gpio_control_in_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[4\]/_049_
+ gpio_control_in_2\[4\]/_056_
+ gpio_control_in_2\[4\]/_055_
+ gpio_control_in_2\[4\]/_054_
+ gpio_control_in_2\[4\]/_053_
+ gpio_control_in_2\[4\]/_052_
+ gpio_control_in_2\[4\]/_051_
+ gpio_control_in_2\[4\]/_050_
+ gpio_control_in_2\[4\]/_048_
+ gpio_control_in_2\[4\]/_047_
+ gpio_control_in_2\[4\]/_046_
+ gpio_control_in_2\[4\]/_057_
+ gpio_control_in_2\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_057_
+ gpio_control_in_2\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_047_
+ gpio_control_in_2\[5\]/_046_
+ gpio_control_in_2\[5\]/_056_
+ gpio_control_in_2\[5\]/_055_
+ gpio_control_in_2\[5\]/_054_
+ gpio_control_in_2\[5\]/_053_
+ gpio_control_in_2\[5\]/_052_
+ gpio_control_in_2\[5\]/_051_
+ gpio_control_in_2\[5\]/_050_
+ gpio_control_in_2\[5\]/_049_
+ gpio_control_in_2\[5\]/_048_
+ gpio_control_in_2\[6\]/_056_
+ gpio_control_in_2\[6\]/_055_
+ gpio_control_in_2\[6\]/_054_
+ gpio_control_in_2\[6\]/_053_
+ gpio_control_in_2\[6\]/_052_
+ gpio_control_in_2\[6\]/_051_
+ gpio_control_in_2\[6\]/_050_
+ gpio_control_in_2\[6\]/_049_
+ gpio_control_in_2\[6\]/_048_
+ gpio_control_in_2\[6\]/_047_
+ gpio_control_in_2\[6\]/_046_
+ gpio_control_in_2\[6\]/_057_
+ gpio_control_in_2\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[7\]/_054_
+ gpio_control_in_2\[7\]/_056_
+ gpio_control_in_2\[7\]/_055_
+ gpio_control_in_2\[7\]/_053_
+ gpio_control_in_2\[7\]/_052_
+ gpio_control_in_2\[7\]/_051_
+ gpio_control_in_2\[7\]/_050_
+ gpio_control_in_2\[7\]/_049_
+ gpio_control_in_2\[7\]/_048_
+ gpio_control_in_2\[7\]/_047_
+ gpio_control_in_2\[7\]/_046_
+ gpio_control_in_2\[7\]/_057_
+ gpio_control_in_2\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[8\]/_052_
+ gpio_control_in_2\[8\]/_047_
+ gpio_control_in_2\[8\]/_056_
+ gpio_control_in_2\[8\]/_055_
+ gpio_control_in_2\[8\]/_054_
+ gpio_control_in_2\[8\]/_053_
+ gpio_control_in_2\[8\]/_051_
+ gpio_control_in_2\[8\]/_050_
+ gpio_control_in_2\[8\]/_049_
+ gpio_control_in_2\[8\]/_048_
+ gpio_control_in_2\[8\]/_046_
+ gpio_control_in_2\[8\]/_057_
+ gpio_control_in_2\[8\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[4\]
+ gpio_defaults_block_0/gpio_defaults_low\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[9\]
+ gpio_control_in_2\[9\]/_051_
+ gpio_control_in_2\[9\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[0\]
+ gpio_defaults_block_0/gpio_defaults_low\[0\]
+ gpio_defaults_block_0/gpio_defaults_high\[10\]
+ gpio_defaults_block_0/gpio_defaults_low\[10\]
+ gpio_defaults_block_0/gpio_defaults_high\[11\]
+ gpio_defaults_block_0/gpio_defaults_low\[11\]
+ gpio_defaults_block_0/gpio_defaults_high\[12\]
+ gpio_defaults_block_0/gpio_defaults_low\[12\]
+ gpio_defaults_block_0/gpio_defaults_high\[1\]
+ gpio_defaults_block_0/gpio_defaults_low\[1\]
+ gpio_defaults_block_0/gpio_defaults_high\[2\]
+ gpio_defaults_block_0/gpio_defaults_low\[2\]
+ gpio_defaults_block_0/gpio_defaults_high\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[4\]
+ gpio_defaults_block_0/gpio_defaults_high\[5\]
+ gpio_defaults_block_0/gpio_defaults_low\[5\]
+ gpio_defaults_block_0/gpio_defaults_high\[6\]
+ gpio_defaults_block_0/gpio_defaults_low\[6\]
+ gpio_defaults_block_0/gpio_defaults_high\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[9\]
+ gpio_control_in_2\[9\]/_056_
+ gpio_control_in_2\[9\]/_055_
+ gpio_control_in_2\[9\]/_054_
+ gpio_control_in_2\[9\]/_053_
+ gpio_control_in_2\[9\]/_052_
+ gpio_control_in_2\[9\]/_050_
+ gpio_control_in_2\[9\]/_049_
+ gpio_control_in_2\[9\]/_048_
+ gpio_control_in_2\[9\]/_047_
+ gpio_control_in_2\[9\]/_046_
+ gpio_control_in_2\[9\]/_057_
+ gpio_defaults_block_11/gpio_defaults_low\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[0\]
+ gpio_defaults_block_11/gpio_defaults_low\[0\]
+ gpio_defaults_block_11/gpio_defaults_high\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[11\]
+ gpio_defaults_block_11/gpio_defaults_low\[11\]
+ gpio_defaults_block_11/gpio_defaults_high\[12\]
+ gpio_defaults_block_11/gpio_defaults_low\[12\]
+ gpio_defaults_block_11/gpio_defaults_high\[1\]
+ gpio_defaults_block_11/gpio_defaults_low\[1\]
+ gpio_defaults_block_11/gpio_defaults_high\[2\]
+ gpio_defaults_block_11/gpio_defaults_low\[2\]
+ gpio_defaults_block_11/gpio_defaults_high\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[9\]
+ gpio_defaults_block_11/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[0\]
+ gpio_defaults_block_12/gpio_defaults_low\[0\]
+ gpio_defaults_block_12/gpio_defaults_high\[10\]
+ gpio_defaults_block_12/gpio_defaults_low\[10\]
+ gpio_defaults_block_12/gpio_defaults_high\[11\]
+ gpio_defaults_block_12/gpio_defaults_low\[11\]
+ gpio_defaults_block_12/gpio_defaults_high\[12\]
+ gpio_defaults_block_12/gpio_defaults_low\[12\]
+ gpio_defaults_block_12/gpio_defaults_high\[1\]
+ gpio_defaults_block_12/gpio_defaults_low\[1\]
+ gpio_defaults_block_12/gpio_defaults_high\[2\]
+ gpio_defaults_block_12/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[0\]
+ gpio_defaults_block_1/gpio_defaults_low\[0\]
+ gpio_defaults_block_1/gpio_defaults_high\[10\]
+ gpio_defaults_block_1/gpio_defaults_low\[10\]
+ gpio_defaults_block_1/gpio_defaults_high\[11\]
+ gpio_defaults_block_1/gpio_defaults_low\[11\]
+ gpio_defaults_block_1/gpio_defaults_high\[12\]
+ gpio_defaults_block_1/gpio_defaults_low\[12\]
+ gpio_defaults_block_1/gpio_defaults_high\[1\]
+ gpio_defaults_block_1/gpio_defaults_low\[1\]
+ gpio_defaults_block_1/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[4\]
+ gpio_defaults_block_1/gpio_defaults_high\[5\]
+ gpio_defaults_block_1/gpio_defaults_low\[5\]
+ gpio_defaults_block_1/gpio_defaults_high\[6\]
+ gpio_defaults_block_1/gpio_defaults_low\[6\]
+ gpio_defaults_block_1/gpio_defaults_high\[7\]
+ gpio_defaults_block_1/gpio_defaults_low\[7\]
+ gpio_defaults_block_1/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_low\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[9\]
+ gpio_defaults_block_1/gpio_defaults_low\[9\]
+ gpio_defaults_block_10/gpio_defaults_high\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[11\]
+ gpio_defaults_block_10/gpio_defaults_low\[11\]
+ gpio_defaults_block_10/gpio_defaults_high\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[2\]
+ gpio_defaults_block_10/gpio_defaults_low\[2\]
+ gpio_defaults_block_10/gpio_defaults_high\[3\]
+ gpio_defaults_block_10/gpio_defaults_low\[3\]
+ gpio_defaults_block_10/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_low\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[5\]
+ gpio_defaults_block_10/gpio_defaults_low\[5\]
+ gpio_defaults_block_10/gpio_defaults_high\[6\]
+ gpio_defaults_block_10/gpio_defaults_low\[6\]
+ gpio_defaults_block_10/gpio_defaults_high\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[8\]
+ gpio_defaults_block_10/gpio_defaults_high\[9\]
+ gpio_defaults_block_10/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[10\]
+ gpio_defaults_block_15/gpio_defaults_low\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[7\]
+ gpio_defaults_block_15/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[11\]
+ gpio_defaults_block_13/gpio_defaults_low\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[10\]
+ gpio_defaults_block_14/gpio_defaults_low\[11\]
+ gpio_defaults_block_14/gpio_defaults_high\[12\]
+ gpio_defaults_block_14/gpio_defaults_low\[12\]
+ gpio_defaults_block_14/gpio_defaults_high\[1\]
+ gpio_defaults_block_14/gpio_defaults_low\[1\]
+ gpio_defaults_block_14/gpio_defaults_high\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[5\]
+ gpio_defaults_block_14/gpio_defaults_high\[6\]
+ gpio_defaults_block_14/gpio_defaults_low\[6\]
+ gpio_defaults_block_14/gpio_defaults_high\[7\]
+ gpio_defaults_block_14/gpio_defaults_low\[7\]
+ gpio_defaults_block_14/gpio_defaults_high\[8\]
+ gpio_defaults_block_14/gpio_defaults_low\[8\]
+ gpio_defaults_block_14/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_low\[9\]
+ gpio_defaults_block_15/gpio_defaults_high\[0\]
+ gpio_defaults_block_15/gpio_defaults_low\[0\]
+ gpio_defaults_block_15/gpio_defaults_high\[10\]
+ gpio_defaults_block_15/gpio_defaults_high\[11\]
+ gpio_defaults_block_15/gpio_defaults_low\[11\]
+ gpio_defaults_block_15/gpio_defaults_high\[12\]
+ gpio_defaults_block_15/gpio_defaults_low\[12\]
+ gpio_defaults_block_15/gpio_defaults_high\[1\]
+ gpio_defaults_block_15/gpio_defaults_low\[1\]
+ gpio_defaults_block_15/gpio_defaults_high\[2\]
+ gpio_defaults_block_15/gpio_defaults_low\[2\]
+ gpio_defaults_block_15/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_high\[5\]
+ gpio_defaults_block_15/gpio_defaults_low\[5\]
+ gpio_defaults_block_15/gpio_defaults_high\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[7\]
+ gpio_defaults_block_15/gpio_defaults_high\[8\]
+ gpio_defaults_block_15/gpio_defaults_high\[9\]
+ gpio_defaults_block_15/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[3\]
+ gpio_defaults_block_12/gpio_defaults_low\[3\]
+ gpio_defaults_block_12/gpio_defaults_high\[4\]
+ gpio_defaults_block_12/gpio_defaults_low\[4\]
+ gpio_defaults_block_12/gpio_defaults_high\[5\]
+ gpio_defaults_block_12/gpio_defaults_low\[5\]
+ gpio_defaults_block_12/gpio_defaults_high\[6\]
+ gpio_defaults_block_12/gpio_defaults_low\[6\]
+ gpio_defaults_block_12/gpio_defaults_high\[7\]
+ gpio_defaults_block_12/gpio_defaults_high\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_low\[9\]
+ gpio_defaults_block_13/gpio_defaults_high\[0\]
+ gpio_defaults_block_13/gpio_defaults_low\[0\]
+ gpio_defaults_block_13/gpio_defaults_high\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[11\]
+ gpio_defaults_block_13/gpio_defaults_high\[12\]
+ gpio_defaults_block_13/gpio_defaults_low\[12\]
+ gpio_defaults_block_13/gpio_defaults_high\[1\]
+ gpio_defaults_block_13/gpio_defaults_low\[1\]
+ gpio_defaults_block_13/gpio_defaults_high\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[3\]
+ gpio_defaults_block_13/gpio_defaults_high\[4\]
+ gpio_defaults_block_13/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_low\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[6\]
+ gpio_defaults_block_13/gpio_defaults_low\[6\]
+ gpio_defaults_block_13/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[8\]
+ gpio_defaults_block_13/gpio_defaults_low\[8\]
+ gpio_defaults_block_13/gpio_defaults_high\[9\]
+ gpio_defaults_block_13/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[0\]
+ gpio_defaults_block_14/gpio_defaults_low\[0\]
+ gpio_defaults_block_14/gpio_defaults_high\[10\]
+ gpio_defaults_block_14/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[3\]
+ gpio_defaults_block_18/gpio_defaults_low\[5\]
+ gpio_defaults_block_18/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[0\]
+ gpio_defaults_block_16/gpio_defaults_low\[10\]
+ gpio_defaults_block_16/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[11\]
+ gpio_defaults_block_17/gpio_defaults_low\[12\]
+ gpio_defaults_block_17/gpio_defaults_low\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[0\]
+ gpio_defaults_block_18/gpio_defaults_low\[0\]
+ gpio_defaults_block_18/gpio_defaults_high\[10\]
+ gpio_defaults_block_18/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[11\]
+ gpio_defaults_block_18/gpio_defaults_high\[12\]
+ gpio_defaults_block_18/gpio_defaults_low\[12\]
+ gpio_defaults_block_18/gpio_defaults_high\[1\]
+ gpio_defaults_block_18/gpio_defaults_low\[1\]
+ gpio_defaults_block_18/gpio_defaults_high\[2\]
+ gpio_defaults_block_18/gpio_defaults_low\[2\]
+ gpio_defaults_block_18/gpio_defaults_high\[3\]
+ gpio_defaults_block_18/gpio_defaults_high\[4\]
+ gpio_defaults_block_18/gpio_defaults_low\[4\]
+ gpio_defaults_block_18/gpio_defaults_high\[5\]
+ gpio_defaults_block_18/gpio_defaults_high\[6\]
+ gpio_defaults_block_18/gpio_defaults_low\[6\]
+ gpio_defaults_block_18/gpio_defaults_high\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[8\]
+ gpio_defaults_block_18/gpio_defaults_low\[8\]
+ gpio_defaults_block_18/gpio_defaults_high\[9\]
+ gpio_defaults_block_18/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[0\]
+ gpio_defaults_block_19/gpio_defaults_low\[0\]
+ gpio_defaults_block_19/gpio_defaults_high\[10\]
+ gpio_defaults_block_19/gpio_defaults_low\[10\]
+ gpio_defaults_block_19/gpio_defaults_high\[11\]
+ gpio_defaults_block_19/gpio_defaults_high\[12\]
+ gpio_defaults_block_19/gpio_defaults_low\[12\]
+ gpio_defaults_block_19/gpio_defaults_high\[1\]
+ gpio_defaults_block_19/gpio_defaults_low\[1\]
+ gpio_defaults_block_19/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[0\]
+ gpio_defaults_block_16/gpio_defaults_high\[10\]
+ gpio_defaults_block_16/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_high\[12\]
+ gpio_defaults_block_16/gpio_defaults_low\[12\]
+ gpio_defaults_block_16/gpio_defaults_high\[1\]
+ gpio_defaults_block_16/gpio_defaults_low\[1\]
+ gpio_defaults_block_16/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_low\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[3\]
+ gpio_defaults_block_16/gpio_defaults_high\[4\]
+ gpio_defaults_block_16/gpio_defaults_low\[4\]
+ gpio_defaults_block_16/gpio_defaults_high\[5\]
+ gpio_defaults_block_16/gpio_defaults_low\[5\]
+ gpio_defaults_block_16/gpio_defaults_high\[6\]
+ gpio_defaults_block_16/gpio_defaults_low\[6\]
+ gpio_defaults_block_16/gpio_defaults_high\[7\]
+ gpio_defaults_block_16/gpio_defaults_low\[7\]
+ gpio_defaults_block_16/gpio_defaults_high\[8\]
+ gpio_defaults_block_16/gpio_defaults_low\[8\]
+ gpio_defaults_block_16/gpio_defaults_high\[9\]
+ gpio_defaults_block_16/gpio_defaults_low\[9\]
+ gpio_defaults_block_17/gpio_defaults_high\[0\]
+ gpio_defaults_block_17/gpio_defaults_low\[0\]
+ gpio_defaults_block_17/gpio_defaults_high\[10\]
+ gpio_defaults_block_17/gpio_defaults_low\[10\]
+ gpio_defaults_block_17/gpio_defaults_high\[11\]
+ gpio_defaults_block_17/gpio_defaults_high\[12\]
+ gpio_defaults_block_17/gpio_defaults_high\[1\]
+ gpio_defaults_block_17/gpio_defaults_low\[1\]
+ gpio_defaults_block_17/gpio_defaults_high\[2\]
+ gpio_defaults_block_17/gpio_defaults_low\[2\]
+ gpio_defaults_block_17/gpio_defaults_high\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_high\[4\]
+ gpio_defaults_block_17/gpio_defaults_low\[4\]
+ gpio_defaults_block_17/gpio_defaults_high\[5\]
+ gpio_defaults_block_17/gpio_defaults_low\[5\]
+ gpio_defaults_block_17/gpio_defaults_high\[6\]
+ gpio_defaults_block_17/gpio_defaults_low\[6\]
+ gpio_defaults_block_17/gpio_defaults_high\[7\]
+ gpio_defaults_block_17/gpio_defaults_high\[8\]
+ gpio_defaults_block_17/gpio_defaults_low\[8\]
+ gpio_defaults_block_17/gpio_defaults_high\[9\]
+ gpio_defaults_block_17/gpio_defaults_low\[9\]
+ gpio_defaults_block_24/gpio_defaults_high\[10\]
+ gpio_defaults_block_24/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[6\]
+ gpio_defaults_block_22/gpio_defaults_low\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[10\]
+ gpio_defaults_block_24/gpio_defaults_high\[11\]
+ gpio_defaults_block_24/gpio_defaults_low\[11\]
+ gpio_defaults_block_24/gpio_defaults_high\[12\]
+ gpio_defaults_block_24/gpio_defaults_low\[12\]
+ gpio_defaults_block_24/gpio_defaults_high\[1\]
+ gpio_defaults_block_24/gpio_defaults_low\[1\]
+ gpio_defaults_block_24/gpio_defaults_high\[2\]
+ gpio_defaults_block_24/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_low\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[4\]
+ gpio_defaults_block_24/gpio_defaults_low\[4\]
+ gpio_defaults_block_24/gpio_defaults_high\[5\]
+ gpio_defaults_block_24/gpio_defaults_low\[5\]
+ gpio_defaults_block_24/gpio_defaults_high\[6\]
+ gpio_defaults_block_24/gpio_defaults_low\[6\]
+ gpio_defaults_block_24/gpio_defaults_high\[7\]
+ gpio_defaults_block_24/gpio_defaults_low\[7\]
+ gpio_defaults_block_24/gpio_defaults_high\[8\]
+ gpio_defaults_block_24/gpio_defaults_low\[8\]
+ gpio_defaults_block_24/gpio_defaults_high\[9\]
+ gpio_defaults_block_24/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_high\[0\]
+ gpio_defaults_block_25/gpio_defaults_low\[0\]
+ gpio_defaults_block_25/gpio_defaults_high\[10\]
+ gpio_defaults_block_25/gpio_defaults_low\[10\]
+ gpio_defaults_block_25/gpio_defaults_high\[11\]
+ gpio_defaults_block_25/gpio_defaults_low\[11\]
+ gpio_defaults_block_25/gpio_defaults_high\[12\]
+ gpio_defaults_block_25/gpio_defaults_low\[12\]
+ gpio_defaults_block_25/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[0\]
+ gpio_defaults_block_22/gpio_defaults_low\[0\]
+ gpio_defaults_block_22/gpio_defaults_high\[10\]
+ gpio_defaults_block_22/gpio_defaults_low\[10\]
+ gpio_defaults_block_22/gpio_defaults_high\[11\]
+ gpio_defaults_block_22/gpio_defaults_low\[11\]
+ gpio_defaults_block_22/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_low\[12\]
+ gpio_defaults_block_22/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_low\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[2\]
+ gpio_defaults_block_22/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[3\]
+ gpio_defaults_block_22/gpio_defaults_low\[3\]
+ gpio_defaults_block_22/gpio_defaults_high\[4\]
+ gpio_defaults_block_22/gpio_defaults_low\[4\]
+ gpio_defaults_block_22/gpio_defaults_high\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[6\]
+ gpio_defaults_block_22/gpio_defaults_high\[7\]
+ gpio_defaults_block_22/gpio_defaults_low\[7\]
+ gpio_defaults_block_22/gpio_defaults_high\[8\]
+ gpio_defaults_block_22/gpio_defaults_low\[8\]
+ gpio_defaults_block_22/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[11\]
+ gpio_defaults_block_23/gpio_defaults_low\[11\]
+ gpio_defaults_block_23/gpio_defaults_high\[12\]
+ gpio_defaults_block_23/gpio_defaults_low\[12\]
+ gpio_defaults_block_23/gpio_defaults_high\[1\]
+ gpio_defaults_block_23/gpio_defaults_low\[1\]
+ gpio_defaults_block_23/gpio_defaults_high\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[3\]
+ gpio_defaults_block_23/gpio_defaults_high\[4\]
+ gpio_defaults_block_23/gpio_defaults_low\[4\]
+ gpio_defaults_block_23/gpio_defaults_high\[5\]
+ gpio_defaults_block_23/gpio_defaults_low\[5\]
+ gpio_defaults_block_23/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_low\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[7\]
+ gpio_defaults_block_23/gpio_defaults_low\[7\]
+ gpio_defaults_block_23/gpio_defaults_high\[8\]
+ gpio_defaults_block_23/gpio_defaults_low\[8\]
+ gpio_defaults_block_23/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_low\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[11\]
+ gpio_defaults_block_28/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_low\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[11\]
+ gpio_defaults_block_27/gpio_defaults_high\[12\]
+ gpio_defaults_block_27/gpio_defaults_low\[12\]
+ gpio_defaults_block_27/gpio_defaults_high\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[3\]
+ gpio_defaults_block_27/gpio_defaults_low\[3\]
+ gpio_defaults_block_27/gpio_defaults_high\[4\]
+ gpio_defaults_block_27/gpio_defaults_high\[5\]
+ gpio_defaults_block_27/gpio_defaults_low\[5\]
+ gpio_defaults_block_27/gpio_defaults_high\[6\]
+ gpio_defaults_block_27/gpio_defaults_low\[6\]
+ gpio_defaults_block_27/gpio_defaults_high\[7\]
+ gpio_defaults_block_27/gpio_defaults_low\[7\]
+ gpio_defaults_block_27/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_high\[0\]
+ gpio_defaults_block_28/gpio_defaults_low\[0\]
+ gpio_defaults_block_28/gpio_defaults_high\[10\]
+ gpio_defaults_block_28/gpio_defaults_low\[10\]
+ gpio_defaults_block_28/gpio_defaults_high\[11\]
+ gpio_defaults_block_28/gpio_defaults_high\[12\]
+ gpio_defaults_block_28/gpio_defaults_low\[12\]
+ gpio_defaults_block_28/gpio_defaults_high\[1\]
+ gpio_defaults_block_28/gpio_defaults_low\[1\]
+ gpio_defaults_block_28/gpio_defaults_high\[2\]
+ gpio_defaults_block_28/gpio_defaults_low\[2\]
+ gpio_defaults_block_28/gpio_defaults_high\[3\]
+ gpio_defaults_block_28/gpio_defaults_low\[3\]
+ gpio_defaults_block_28/gpio_defaults_high\[4\]
+ gpio_defaults_block_28/gpio_defaults_low\[4\]
+ gpio_defaults_block_28/gpio_defaults_high\[5\]
+ gpio_defaults_block_28/gpio_defaults_high\[6\]
+ gpio_defaults_block_28/gpio_defaults_low\[6\]
+ gpio_defaults_block_28/gpio_defaults_high\[7\]
+ gpio_defaults_block_28/gpio_defaults_low\[7\]
+ gpio_defaults_block_28/gpio_defaults_high\[8\]
+ gpio_defaults_block_28/gpio_defaults_low\[8\]
+ gpio_defaults_block_28/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[1\]
+ gpio_defaults_block_25/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_low\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[3\]
+ gpio_defaults_block_25/gpio_defaults_low\[3\]
+ gpio_defaults_block_25/gpio_defaults_high\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_high\[6\]
+ gpio_defaults_block_25/gpio_defaults_low\[6\]
+ gpio_defaults_block_25/gpio_defaults_high\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[8\]
+ gpio_defaults_block_25/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[10\]
+ gpio_defaults_block_26/gpio_defaults_low\[10\]
+ gpio_defaults_block_26/gpio_defaults_high\[11\]
+ gpio_defaults_block_26/gpio_defaults_low\[11\]
+ gpio_defaults_block_26/gpio_defaults_high\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[2\]
+ gpio_defaults_block_26/gpio_defaults_high\[3\]
+ gpio_defaults_block_26/gpio_defaults_low\[3\]
+ gpio_defaults_block_26/gpio_defaults_high\[4\]
+ gpio_defaults_block_26/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[5\]
+ gpio_defaults_block_26/gpio_defaults_low\[5\]
+ gpio_defaults_block_26/gpio_defaults_high\[6\]
+ gpio_defaults_block_26/gpio_defaults_low\[6\]
+ gpio_defaults_block_26/gpio_defaults_high\[7\]
+ gpio_defaults_block_26/gpio_defaults_low\[7\]
+ gpio_defaults_block_26/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_high\[0\]
+ gpio_defaults_block_27/gpio_defaults_low\[0\]
+ gpio_defaults_block_27/gpio_defaults_high\[10\]
+ gpio_defaults_block_27/gpio_defaults_low\[10\]
+ gpio_defaults_block_27/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[2\]
+ gpio_defaults_block_30/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[9\]
+ gpio_defaults_block_3/gpio_defaults_low\[2\]
+ gpio_defaults_block_3/gpio_defaults_low\[9\]
+ gpio_defaults_block_30/gpio_defaults_high\[0\]
+ gpio_defaults_block_30/gpio_defaults_low\[0\]
+ gpio_defaults_block_30/gpio_defaults_high\[10\]
+ gpio_defaults_block_30/gpio_defaults_low\[10\]
+ gpio_defaults_block_30/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_low\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[12\]
+ gpio_defaults_block_30/gpio_defaults_low\[12\]
+ gpio_defaults_block_30/gpio_defaults_high\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[2\]
+ gpio_defaults_block_30/gpio_defaults_high\[3\]
+ gpio_defaults_block_30/gpio_defaults_low\[3\]
+ gpio_defaults_block_30/gpio_defaults_high\[4\]
+ gpio_defaults_block_30/gpio_defaults_low\[4\]
+ gpio_defaults_block_30/gpio_defaults_high\[5\]
+ gpio_defaults_block_30/gpio_defaults_low\[5\]
+ gpio_defaults_block_30/gpio_defaults_high\[6\]
+ gpio_defaults_block_30/gpio_defaults_low\[6\]
+ gpio_defaults_block_30/gpio_defaults_high\[7\]
+ gpio_defaults_block_30/gpio_defaults_low\[7\]
+ gpio_defaults_block_30/gpio_defaults_high\[8\]
+ gpio_defaults_block_30/gpio_defaults_low\[8\]
+ gpio_defaults_block_30/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[0\]
+ gpio_defaults_block_31/gpio_defaults_low\[0\]
+ gpio_defaults_block_31/gpio_defaults_high\[10\]
+ gpio_defaults_block_31/gpio_defaults_low\[10\]
+ gpio_defaults_block_31/gpio_defaults_high\[11\]
+ gpio_defaults_block_31/gpio_defaults_high\[12\]
+ gpio_defaults_block_31/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[0\]
+ gpio_defaults_block_29/gpio_defaults_low\[0\]
+ gpio_defaults_block_29/gpio_defaults_high\[10\]
+ gpio_defaults_block_29/gpio_defaults_low\[10\]
+ gpio_defaults_block_29/gpio_defaults_high\[11\]
+ gpio_defaults_block_29/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[1\]
+ gpio_defaults_block_29/gpio_defaults_low\[1\]
+ gpio_defaults_block_29/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_low\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[3\]
+ gpio_defaults_block_29/gpio_defaults_low\[3\]
+ gpio_defaults_block_29/gpio_defaults_high\[4\]
+ gpio_defaults_block_29/gpio_defaults_low\[4\]
+ gpio_defaults_block_29/gpio_defaults_high\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[6\]
+ gpio_defaults_block_29/gpio_defaults_low\[6\]
+ gpio_defaults_block_29/gpio_defaults_high\[7\]
+ gpio_defaults_block_29/gpio_defaults_low\[7\]
+ gpio_defaults_block_29/gpio_defaults_high\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[9\]
+ gpio_defaults_block_3/gpio_defaults_high\[0\]
+ gpio_defaults_block_3/gpio_defaults_low\[0\]
+ gpio_defaults_block_3/gpio_defaults_high\[10\]
+ gpio_defaults_block_3/gpio_defaults_low\[10\]
+ gpio_defaults_block_3/gpio_defaults_high\[11\]
+ gpio_defaults_block_3/gpio_defaults_low\[11\]
+ gpio_defaults_block_3/gpio_defaults_high\[12\]
+ gpio_defaults_block_3/gpio_defaults_low\[12\]
+ gpio_defaults_block_3/gpio_defaults_high\[1\]
+ gpio_defaults_block_3/gpio_defaults_low\[1\]
+ gpio_defaults_block_3/gpio_defaults_high\[2\]
+ gpio_defaults_block_3/gpio_defaults_high\[3\]
+ gpio_defaults_block_3/gpio_defaults_low\[3\]
+ gpio_defaults_block_3/gpio_defaults_high\[4\]
+ gpio_defaults_block_3/gpio_defaults_low\[4\]
+ gpio_defaults_block_3/gpio_defaults_high\[5\]
+ gpio_defaults_block_3/gpio_defaults_low\[5\]
+ gpio_defaults_block_3/gpio_defaults_high\[6\]
+ gpio_defaults_block_3/gpio_defaults_low\[6\]
+ gpio_defaults_block_3/gpio_defaults_high\[7\]
+ gpio_defaults_block_3/gpio_defaults_low\[7\]
+ gpio_defaults_block_3/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_low\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[4\]
+ gpio_defaults_block_31/gpio_defaults_low\[7\]
+ gpio_defaults_block_31/gpio_defaults_low\[9\]
+ gpio_defaults_block_32/gpio_defaults_high\[0\]
+ gpio_defaults_block_32/gpio_defaults_low\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_high\[11\]
+ gpio_defaults_block_33/gpio_defaults_low\[11\]
+ gpio_defaults_block_33/gpio_defaults_high\[12\]
+ gpio_defaults_block_33/gpio_defaults_low\[12\]
+ gpio_defaults_block_33/gpio_defaults_high\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[2\]
+ gpio_defaults_block_33/gpio_defaults_low\[2\]
+ gpio_defaults_block_33/gpio_defaults_high\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[4\]
+ gpio_defaults_block_33/gpio_defaults_high\[5\]
+ gpio_defaults_block_33/gpio_defaults_low\[5\]
+ gpio_defaults_block_33/gpio_defaults_high\[6\]
+ gpio_defaults_block_33/gpio_defaults_low\[6\]
+ gpio_defaults_block_33/gpio_defaults_high\[7\]
+ gpio_defaults_block_33/gpio_defaults_low\[7\]
+ gpio_defaults_block_33/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[0\]
+ gpio_defaults_block_34/gpio_defaults_low\[0\]
+ gpio_defaults_block_34/gpio_defaults_high\[10\]
+ gpio_defaults_block_34/gpio_defaults_low\[10\]
+ gpio_defaults_block_34/gpio_defaults_high\[11\]
+ gpio_defaults_block_34/gpio_defaults_low\[11\]
+ gpio_defaults_block_34/gpio_defaults_high\[12\]
+ gpio_defaults_block_34/gpio_defaults_low\[12\]
+ gpio_defaults_block_34/gpio_defaults_high\[1\]
+ gpio_defaults_block_34/gpio_defaults_low\[1\]
+ gpio_defaults_block_34/gpio_defaults_high\[2\]
+ gpio_defaults_block_34/gpio_defaults_low\[2\]
+ gpio_defaults_block_34/gpio_defaults_high\[3\]
+ gpio_defaults_block_34/gpio_defaults_low\[3\]
+ gpio_defaults_block_34/gpio_defaults_high\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[5\]
+ gpio_defaults_block_34/gpio_defaults_high\[6\]
+ gpio_defaults_block_34/gpio_defaults_low\[6\]
+ gpio_defaults_block_34/gpio_defaults_high\[7\]
+ gpio_defaults_block_34/gpio_defaults_low\[7\]
+ gpio_defaults_block_34/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_low\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[1\]
+ gpio_defaults_block_31/gpio_defaults_low\[1\]
+ gpio_defaults_block_31/gpio_defaults_high\[2\]
+ gpio_defaults_block_31/gpio_defaults_low\[2\]
+ gpio_defaults_block_31/gpio_defaults_high\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[4\]
+ gpio_defaults_block_31/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_low\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[6\]
+ gpio_defaults_block_31/gpio_defaults_low\[6\]
+ gpio_defaults_block_31/gpio_defaults_high\[7\]
+ gpio_defaults_block_31/gpio_defaults_high\[8\]
+ gpio_defaults_block_31/gpio_defaults_low\[8\]
+ gpio_defaults_block_31/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[0\]
+ gpio_defaults_block_32/gpio_defaults_high\[10\]
+ gpio_defaults_block_32/gpio_defaults_low\[10\]
+ gpio_defaults_block_32/gpio_defaults_high\[11\]
+ gpio_defaults_block_32/gpio_defaults_low\[11\]
+ gpio_defaults_block_32/gpio_defaults_high\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[1\]
+ gpio_defaults_block_32/gpio_defaults_high\[2\]
+ gpio_defaults_block_32/gpio_defaults_low\[2\]
+ gpio_defaults_block_32/gpio_defaults_high\[3\]
+ gpio_defaults_block_32/gpio_defaults_low\[3\]
+ gpio_defaults_block_32/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[5\]
+ gpio_defaults_block_32/gpio_defaults_low\[5\]
+ gpio_defaults_block_32/gpio_defaults_high\[6\]
+ gpio_defaults_block_32/gpio_defaults_low\[6\]
+ gpio_defaults_block_32/gpio_defaults_high\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[8\]
+ gpio_defaults_block_32/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[0\]
+ gpio_defaults_block_33/gpio_defaults_low\[0\]
+ gpio_defaults_block_33/gpio_defaults_high\[10\]
+ gpio_defaults_block_33/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[0\]
+ gpio_defaults_block_37/gpio_defaults_low\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_high\[5\]
+ gpio_defaults_block_35/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[9\]
+ gpio_defaults_block_37/gpio_defaults_high\[0\]
+ gpio_defaults_block_37/gpio_defaults_high\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_high\[11\]
+ gpio_defaults_block_37/gpio_defaults_low\[11\]
+ gpio_defaults_block_37/gpio_defaults_high\[12\]
+ gpio_defaults_block_37/gpio_defaults_low\[12\]
+ gpio_defaults_block_37/gpio_defaults_high\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[2\]
+ gpio_defaults_block_37/gpio_defaults_low\[2\]
+ gpio_defaults_block_37/gpio_defaults_high\[3\]
+ gpio_defaults_block_37/gpio_defaults_low\[3\]
+ gpio_defaults_block_37/gpio_defaults_high\[4\]
+ gpio_defaults_block_37/gpio_defaults_low\[4\]
+ gpio_defaults_block_37/gpio_defaults_high\[5\]
+ gpio_defaults_block_37/gpio_defaults_low\[5\]
+ gpio_defaults_block_37/gpio_defaults_high\[6\]
+ gpio_defaults_block_37/gpio_defaults_low\[6\]
+ gpio_defaults_block_37/gpio_defaults_high\[7\]
+ gpio_defaults_block_37/gpio_defaults_low\[7\]
+ gpio_defaults_block_37/gpio_defaults_high\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_high\[0\]
+ gpio_defaults_block_4/gpio_defaults_low\[0\]
+ gpio_defaults_block_4/gpio_defaults_high\[10\]
+ gpio_defaults_block_4/gpio_defaults_low\[10\]
+ gpio_defaults_block_4/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_low\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[0\]
+ gpio_defaults_block_35/gpio_defaults_low\[0\]
+ gpio_defaults_block_35/gpio_defaults_high\[10\]
+ gpio_defaults_block_35/gpio_defaults_low\[10\]
+ gpio_defaults_block_35/gpio_defaults_high\[11\]
+ gpio_defaults_block_35/gpio_defaults_low\[11\]
+ gpio_defaults_block_35/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_low\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[1\]
+ gpio_defaults_block_35/gpio_defaults_low\[1\]
+ gpio_defaults_block_35/gpio_defaults_high\[2\]
+ gpio_defaults_block_35/gpio_defaults_low\[2\]
+ gpio_defaults_block_35/gpio_defaults_high\[3\]
+ gpio_defaults_block_35/gpio_defaults_low\[3\]
+ gpio_defaults_block_35/gpio_defaults_high\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[5\]
+ gpio_defaults_block_35/gpio_defaults_high\[6\]
+ gpio_defaults_block_35/gpio_defaults_low\[6\]
+ gpio_defaults_block_35/gpio_defaults_high\[7\]
+ gpio_defaults_block_35/gpio_defaults_low\[7\]
+ gpio_defaults_block_35/gpio_defaults_high\[8\]
+ gpio_defaults_block_35/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_low\[9\]
+ gpio_defaults_block_36/gpio_defaults_high\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[10\]
+ gpio_defaults_block_36/gpio_defaults_low\[10\]
+ gpio_defaults_block_36/gpio_defaults_high\[11\]
+ gpio_defaults_block_36/gpio_defaults_low\[11\]
+ gpio_defaults_block_36/gpio_defaults_high\[12\]
+ gpio_defaults_block_36/gpio_defaults_low\[12\]
+ gpio_defaults_block_36/gpio_defaults_high\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[3\]
+ gpio_defaults_block_36/gpio_defaults_low\[3\]
+ gpio_defaults_block_36/gpio_defaults_high\[4\]
+ gpio_defaults_block_36/gpio_defaults_low\[4\]
+ gpio_defaults_block_36/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_low\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[6\]
+ gpio_defaults_block_36/gpio_defaults_low\[6\]
+ gpio_defaults_block_36/gpio_defaults_high\[7\]
+ gpio_defaults_block_36/gpio_defaults_low\[7\]
+ gpio_defaults_block_36/gpio_defaults_high\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[11\]
+ gpio_defaults_block_7/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[11\]
+ gpio_defaults_block_6/gpio_defaults_low\[11\]
+ gpio_defaults_block_6/gpio_defaults_high\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[2\]
+ gpio_defaults_block_6/gpio_defaults_low\[2\]
+ gpio_defaults_block_6/gpio_defaults_high\[3\]
+ gpio_defaults_block_6/gpio_defaults_high\[4\]
+ gpio_defaults_block_6/gpio_defaults_low\[4\]
+ gpio_defaults_block_6/gpio_defaults_high\[5\]
+ gpio_defaults_block_6/gpio_defaults_low\[5\]
+ gpio_defaults_block_6/gpio_defaults_high\[6\]
+ gpio_defaults_block_6/gpio_defaults_low\[6\]
+ gpio_defaults_block_6/gpio_defaults_high\[7\]
+ gpio_defaults_block_6/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[8\]
+ gpio_defaults_block_6/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[9\]
+ gpio_defaults_block_7/gpio_defaults_high\[0\]
+ gpio_defaults_block_7/gpio_defaults_low\[0\]
+ gpio_defaults_block_7/gpio_defaults_high\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[11\]
+ gpio_defaults_block_7/gpio_defaults_high\[12\]
+ gpio_defaults_block_7/gpio_defaults_low\[12\]
+ gpio_defaults_block_7/gpio_defaults_high\[1\]
+ gpio_defaults_block_7/gpio_defaults_low\[1\]
+ gpio_defaults_block_7/gpio_defaults_high\[2\]
+ gpio_defaults_block_7/gpio_defaults_low\[2\]
+ gpio_defaults_block_7/gpio_defaults_high\[3\]
+ gpio_defaults_block_7/gpio_defaults_low\[3\]
+ gpio_defaults_block_7/gpio_defaults_high\[4\]
+ gpio_defaults_block_7/gpio_defaults_high\[5\]
+ gpio_defaults_block_7/gpio_defaults_low\[5\]
+ gpio_defaults_block_7/gpio_defaults_high\[6\]
+ gpio_defaults_block_7/gpio_defaults_low\[6\]
+ gpio_defaults_block_7/gpio_defaults_high\[7\]
+ gpio_defaults_block_7/gpio_defaults_low\[7\]
+ gpio_defaults_block_7/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[9\]
+ gpio_defaults_block_7/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_low\[12\]
+ gpio_defaults_block_4/gpio_defaults_high\[1\]
+ gpio_defaults_block_4/gpio_defaults_low\[1\]
+ gpio_defaults_block_4/gpio_defaults_high\[2\]
+ gpio_defaults_block_4/gpio_defaults_low\[2\]
+ gpio_defaults_block_4/gpio_defaults_high\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_high\[5\]
+ gpio_defaults_block_4/gpio_defaults_low\[5\]
+ gpio_defaults_block_4/gpio_defaults_high\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[9\]
+ gpio_defaults_block_5/gpio_defaults_high\[0\]
+ gpio_defaults_block_5/gpio_defaults_low\[0\]
+ gpio_defaults_block_5/gpio_defaults_high\[10\]
+ gpio_defaults_block_5/gpio_defaults_low\[10\]
+ gpio_defaults_block_5/gpio_defaults_high\[11\]
+ gpio_defaults_block_5/gpio_defaults_low\[11\]
+ gpio_defaults_block_5/gpio_defaults_high\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[1\]
+ gpio_defaults_block_5/gpio_defaults_high\[2\]
+ gpio_defaults_block_5/gpio_defaults_low\[2\]
+ gpio_defaults_block_5/gpio_defaults_high\[3\]
+ gpio_defaults_block_5/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[4\]
+ gpio_defaults_block_5/gpio_defaults_low\[4\]
+ gpio_defaults_block_5/gpio_defaults_high\[5\]
+ gpio_defaults_block_5/gpio_defaults_low\[5\]
+ gpio_defaults_block_5/gpio_defaults_high\[6\]
+ gpio_defaults_block_5/gpio_defaults_low\[6\]
+ gpio_defaults_block_5/gpio_defaults_high\[7\]
+ gpio_defaults_block_5/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_low\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[0\]
+ gpio_defaults_block_6/gpio_defaults_low\[0\]
+ gpio_defaults_block_6/gpio_defaults_high\[10\]
+ gpio_defaults_block_6/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[11\]
+ gpio_defaults_block_8/gpio_defaults_low\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[8\]
+ gpio_defaults_block_8/gpio_defaults_low\[9\]
+ gpio_defaults_block_9/gpio_defaults_high\[0\]
+ gpio_defaults_block_9/gpio_defaults_low\[1\]
+ gpio_defaults_block_9/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[0\]
+ gpio_defaults_block_8/gpio_defaults_low\[0\]
+ gpio_defaults_block_8/gpio_defaults_high\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[11\]
+ gpio_defaults_block_8/gpio_defaults_high\[12\]
+ gpio_defaults_block_8/gpio_defaults_low\[12\]
+ gpio_defaults_block_8/gpio_defaults_high\[1\]
+ gpio_defaults_block_8/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[2\]
+ gpio_defaults_block_8/gpio_defaults_low\[2\]
+ gpio_defaults_block_8/gpio_defaults_high\[3\]
+ gpio_defaults_block_8/gpio_defaults_low\[3\]
+ gpio_defaults_block_8/gpio_defaults_high\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[5\]
+ gpio_defaults_block_8/gpio_defaults_low\[5\]
+ gpio_defaults_block_8/gpio_defaults_high\[6\]
+ gpio_defaults_block_8/gpio_defaults_low\[6\]
+ gpio_defaults_block_8/gpio_defaults_high\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[0\]
+ gpio_defaults_block_9/gpio_defaults_high\[10\]
+ gpio_defaults_block_9/gpio_defaults_low\[10\]
+ gpio_defaults_block_9/gpio_defaults_high\[11\]
+ gpio_defaults_block_9/gpio_defaults_low\[11\]
+ gpio_defaults_block_9/gpio_defaults_high\[12\]
+ gpio_defaults_block_9/gpio_defaults_low\[12\]
+ gpio_defaults_block_9/gpio_defaults_high\[1\]
+ gpio_defaults_block_9/gpio_defaults_high\[2\]
+ gpio_defaults_block_9/gpio_defaults_low\[2\]
+ gpio_defaults_block_9/gpio_defaults_high\[3\]
+ gpio_defaults_block_9/gpio_defaults_low\[3\]
+ gpio_defaults_block_9/gpio_defaults_high\[4\]
+ gpio_defaults_block_9/gpio_defaults_low\[4\]
+ gpio_defaults_block_9/gpio_defaults_high\[5\]
+ gpio_defaults_block_9/gpio_defaults_low\[5\]
+ gpio_defaults_block_9/gpio_defaults_high\[6\]
+ gpio_defaults_block_9/gpio_defaults_low\[6\]
+ gpio_defaults_block_9/gpio_defaults_high\[7\]
+ gpio_defaults_block_9/gpio_defaults_low\[7\]
+ gpio_defaults_block_9/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[9\]
+ padframe/flash_io1_di_core
+ padframe/clock_core
+ padframe/mprj_analog_io[6]
+ padframe/gpio_in_core
+ padframe/flash_io1
+ padframe/mprj_analog_io[27]
+ padframe/mprj_analog_io[28]
+ padframe/mprj_analog_io[24]
+ padframe/mprj_analog_io[25]
+ padframe/mprj_analog_io[5]
+ padframe/mprj_analog_io[8]
+ padframe/mprj_analog_io[12]
+ padframe/mprj_analog_io[11]
+ padframe/mprj_analog_io[10]
+ padframe/mprj_analog_io[14]
+ padframe/mprj_analog_io[16]
+ padframe/mprj_analog_io[15]
+ padframe/mprj_analog_io[17]
+ padframe/mprj_analog_io[19]
+ padframe/mprj_analog_io[21]
+ padframe/mprj_analog_io[22]
+ padframe/mprj_analog_io[23]
+ padframe/mprj_io[28]
+ padframe/gpio
+ padframe/mprj_io[34]
+ padframe/flash_csb
+ padframe/mprj_analog_io[18]
+ padframe/mprj_analog_io[13]
+ padframe/mprj_io[8]
+ padframe/mprj_io[10]
+ padframe/mprj_io[21]
+ padframe/mprj_io[22]
+ padframe/clock
+ padframe/mprj_io[25]
+ padframe/mprj_analog_io[2]
+ padframe/mprj_io[17]
+ mprj/mprj/p[5]
+ padframe/mprj_io[0]
+ mprj/mprj/p[7]
+ mprj/mprj/p[6]
+ mprj/mprj/p[4]
+ padframe/mprj_io[9]
+ padframe/mprj_io[11]
+ padframe/mprj_io[33]
+ mgmt_buffers/mprj2_logic_high_inst/HI
+ mgmt_buffers/mprj_logic_high_inst/HI[462]
+ mgmt_buffers/mprj_logic_high_inst/HI[461]
+ mgmt_buffers/mprj_logic_high_inst/HI[460]
+ mgmt_buffers/mprj_logic_high_inst/HI[459]
+ mgmt_buffers/mprj_logic_high_inst/HI[458]
+ mgmt_buffers/mprj_logic_high_inst/HI[457]
+ mgmt_buffers/mprj_logic_high_inst/HI[456]
+ mgmt_buffers/mprj_logic_high_inst/HI[455]
+ mgmt_buffers/mprj_logic_high_inst/HI[454]
+ mgmt_buffers/mprj_logic_high_inst/HI[453]
+ mgmt_buffers/mprj_logic_high_inst/HI[452]
+ mgmt_buffers/mprj_logic_high_inst/HI[451]
+ mgmt_buffers/mprj_logic_high_inst/HI[450]
+ mgmt_buffers/mprj_logic_high_inst/HI[449]
+ mgmt_buffers/mprj_logic_high_inst/HI[448]
+ mgmt_buffers/mprj_logic_high_inst/HI[447]
+ mgmt_buffers/mprj_logic_high_inst/HI[446]
+ mgmt_buffers/mprj_logic_high_inst/HI[445]
+ mgmt_buffers/mprj_logic_high_inst/HI[444]
+ padframe/mprj_io[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[443]
+ mgmt_buffers/mprj_logic_high_inst/HI[442]
+ mgmt_buffers/mprj_logic_high_inst/HI[441]
+ mgmt_buffers/mprj_logic_high_inst/HI[440]
+ mgmt_buffers/mprj_logic_high_inst/HI[439]
+ mgmt_buffers/mprj_logic_high_inst/HI[438]
+ mgmt_buffers/mprj_logic_high_inst/HI[437]
+ mgmt_buffers/mprj_logic_high_inst/HI[436]
+ mgmt_buffers/mprj_logic_high_inst/HI[435]
+ mgmt_buffers/mprj_logic_high_inst/HI[434]
+ mgmt_buffers/mprj_logic_high_inst/HI[433]
+ mgmt_buffers/mprj_logic_high_inst/HI[432]
+ mgmt_buffers/mprj_logic_high_inst/HI[431]
+ mgmt_buffers/mprj_logic_high_inst/HI[430]
+ mgmt_buffers/mprj_logic_high_inst/HI[429]
+ mgmt_buffers/mprj_logic_high_inst/HI[428]
+ mgmt_buffers/mprj_logic_high_inst/HI[427]
+ mgmt_buffers/mprj_logic_high_inst/HI[426]
+ padframe/mprj_io[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[425]
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+ mgmt_buffers/mprj_logic_high_inst/HI[423]
+ mgmt_buffers/mprj_logic_high_inst/HI[422]
+ mgmt_buffers/mprj_logic_high_inst/HI[421]
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+ padframe/mprj_io[20]
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+ padframe/mprj_analog_io[4]
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+ padframe/mprj_analog_io[3]
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+ padframe/mprj_analog_io[1]
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+ padframe/mprj_io[27]
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+ mgmt_buffers/mprj_logic_high_inst/HI[77]
+ mgmt_buffers/mprj_logic_high_inst/HI[76]
+ mgmt_buffers/mprj_logic_high_inst/HI[75]
+ mgmt_buffers/mprj_logic_high_inst/HI[74]
+ mgmt_buffers/mprj_logic_high_inst/HI[73]
+ mgmt_buffers/mprj_logic_high_inst/HI[72]
+ mgmt_buffers/mprj_logic_high_inst/HI[71]
+ mgmt_buffers/mprj_logic_high_inst/HI[70]
+ mgmt_buffers/mprj_logic_high_inst/HI[69]
+ padframe/mprj_io[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[68]
+ mgmt_buffers/mprj_logic_high_inst/HI[67]
+ mgmt_buffers/mprj_logic_high_inst/HI[66]
+ mgmt_buffers/mprj_logic_high_inst/HI[65]
+ mgmt_buffers/mprj_logic_high_inst/HI[64]
+ mgmt_buffers/mprj_logic_high_inst/HI[63]
+ mgmt_buffers/mprj_logic_high_inst/HI[62]
+ mgmt_buffers/mprj_logic_high_inst/HI[61]
+ mgmt_buffers/mprj_logic_high_inst/HI[60]
+ mgmt_buffers/mprj_logic_high_inst/HI[59]
+ mgmt_buffers/mprj_logic_high_inst/HI[58]
+ mgmt_buffers/mprj_logic_high_inst/HI[57]
+ mgmt_buffers/mprj_logic_high_inst/HI[56]
+ mgmt_buffers/mprj_logic_high_inst/HI[55]
+ mgmt_buffers/mprj_logic_high_inst/HI[54]
+ mgmt_buffers/mprj_logic_high_inst/HI[53]
+ mgmt_buffers/mprj_logic_high_inst/HI[52]
+ mgmt_buffers/mprj_logic_high_inst/HI[51]
+ mgmt_buffers/mprj_logic_high_inst/HI[50]
+ mgmt_buffers/mprj_logic_high_inst/HI[49]
+ mgmt_buffers/mprj_logic_high_inst/HI[48]
+ mgmt_buffers/mprj_logic_high_inst/HI[47]
+ mgmt_buffers/mprj_logic_high_inst/HI[46]
+ mgmt_buffers/mprj_logic_high_inst/HI[45]
+ mgmt_buffers/mprj_logic_high_inst/HI[44]
+ mgmt_buffers/mprj_logic_high_inst/HI[43]
+ mgmt_buffers/mprj_logic_high_inst/HI[42]
+ mgmt_buffers/mprj_logic_high_inst/HI[41]
+ mgmt_buffers/mprj_logic_high_inst/HI[40]
+ mgmt_buffers/mprj_logic_high_inst/HI[39]
+ mgmt_buffers/mprj_logic_high_inst/HI[38]
+ mgmt_buffers/mprj_logic_high_inst/HI[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[36]
+ mgmt_buffers/mprj_logic_high_inst/HI[35]
+ mgmt_buffers/mprj_logic_high_inst/HI[34]
+ mgmt_buffers/mprj_logic_high_inst/HI[33]
+ mgmt_buffers/mprj_logic_high_inst/HI[32]
+ mgmt_buffers/mprj_logic_high_inst/HI[31]
+ mgmt_buffers/mprj_logic_high_inst/HI[30]
+ mgmt_buffers/mprj_logic_high_inst/HI[29]
+ mgmt_buffers/mprj_logic_high_inst/HI[28]
+ mgmt_buffers/mprj_logic_high_inst/HI[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[25]
+ mgmt_buffers/mprj_logic_high_inst/HI[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[22]
+ mgmt_buffers/mprj_logic_high_inst/HI[21]
+ mgmt_buffers/mprj_logic_high_inst/HI[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[19]
+ mgmt_buffers/mprj_logic_high_inst/HI[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[17]
+ mgmt_buffers/mprj_logic_high_inst/HI[16]
+ padframe/mprj_analog_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[15]
+ mgmt_buffers/mprj_logic_high_inst/HI[14]
+ mgmt_buffers/mprj_logic_high_inst/HI[13]
+ mgmt_buffers/mprj_logic_high_inst/HI[12]
+ mgmt_buffers/mprj_logic_high_inst/HI[11]
+ mgmt_buffers/mprj_logic_high_inst/HI[10]
+ mgmt_buffers/mprj_logic_high_inst/HI[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[8]
+ mgmt_buffers/mprj_logic_high_inst/HI[7]
+ mgmt_buffers/mprj_logic_high_inst/HI[6]
+ mgmt_buffers/mprj_logic_high_inst/HI[5]
+ mgmt_buffers/mprj_logic_high_inst/HI[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[2]
+ mgmt_buffers/mprj_logic_high_inst/HI[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[0]
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1
+ mgmt_buffers/powergood_check/mprj_vdd_logic1
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1_h
+ mgmt_buffers/powergood_check/mprj_vdd_logic1_h
+ padframe/mprj_io[35]
+ mprj/mprj/p[3]
+ mprj/mprj/p[2]
+ mprj/mprj/p[1]
+ mprj/mprj/p[0]
+ padframe/mprj_io[30]
+ padframe/mprj_io[14]
+ padframe/mprj_io[13]
+ padframe/mprj_io[12]
+ padframe/mprj_io[19]
+ padframe/mprj_analog_io[0]
+ padframe/mprj_io[36]
+ padframe/mprj_io[32]
+ padframe/mprj_io[29]
+ padframe/mprj_io[31]
+ padframe/mprj_io[15]
+ padframe/mprj_io[16]
+ padframe/mprj_io[1]
+ padframe/mprj_io[2]
+ padframe/mprj_io[3]
+ padframe/mprj_io[4]
+ padframe/mprj_io[5]
+ padframe/mprj_io[6]
+ padframe/mprj_io[7]
+ padframe/mprj_pads.loop0_io\[36\]
+ padframe/resetb
+ padframe/resetb_core_h
+ padframe/vccd1_pad
+ padframe/vccd2_pad
+ padframe/vccd_pad
+ padframe/vdda1_pad
+ padframe/vdda1_pad2
+ padframe/vdda2_pad
+ padframe/vdda_pad
+ padframe/vddio_pad
+ padframe/vddio_pad2
+ padframe/vssa1_pad
+ padframe/vssa1_pad2
+ padframe/vssa2_pad
+ padframe/vssa_pad
+ padframe/vssd1_pad
+ padframe/vssd2_pad
+ padframe/vssd_pad
+ padframe/vssio_pad
+ padframe/vssio_pad2
+ padframe/mprj_pads.analog_a
+ padframe/mprj_pads.analog_b
+ padframe/loop_zero_clock
+ padframe/loop_one_clock
+ padframe/constant_value_inst\[0\]/one
+ padframe/constant_value_inst\[0\]/zero
+ padframe/constant_value_inst\[0\]/one_unbuf
+ padframe/constant_value_inst\[0\]/zero_unbuf
+ padframe/constant_value_inst\[1\]/one
+ padframe/constant_value_inst\[1\]/zero
+ padframe/constant_value_inst\[1\]/one_unbuf
+ padframe/constant_value_inst\[1\]/zero_unbuf
+ padframe/constant_value_inst\[2\]/one
+ padframe/constant_value_inst\[2\]/zero
+ padframe/constant_value_inst\[2\]/one_unbuf
+ padframe/constant_value_inst\[2\]/zero_unbuf
+ padframe/constant_value_inst\[3\]/one
+ padframe/constant_value_inst\[3\]/zero
+ padframe/constant_value_inst\[3\]/one_unbuf
+ padframe/constant_value_inst\[3\]/zero_unbuf
+ padframe/constant_value_inst\[4\]/one
+ padframe/constant_value_inst\[4\]/zero
+ padframe/constant_value_inst\[4\]/one_unbuf
+ padframe/constant_value_inst\[4\]/zero_unbuf
+ padframe/constant_value_inst\[5\]/one
+ padframe/constant_value_inst\[5\]/zero
+ padframe/constant_value_inst\[5\]/one_unbuf
+ padframe/constant_value_inst\[5\]/zero_unbuf
+ padframe/constant_value_inst\[6\]/one
+ padframe/constant_value_inst\[6\]/zero
+ padframe/constant_value_inst\[6\]/one_unbuf
+ padframe/constant_value_inst\[6\]/zero_unbuf
+ padframe/loop_zero_flash_clk
+ padframe/loop_one_flash_clk
+ padframe/loop_zero_flash_csb
+ padframe/loop_one_flash_csb
+ padframe/loop_zero_flash_io0
+ padframe/loop_one_flash_io0
+ padframe/loop_zero_flash_io1
+ padframe/loop_one_flash_io1
+ padframe/loop_zero_gpio
+ padframe/loop_one_gpio
+ padframe/mprj_pads.loop0_io\[0\]
+ padframe/mprj_pads.loop1_io\[0\]
+ padframe/mprj_pads.io_in\[0\]
+ padframe/mprj_pads.io_in_3v3\[0\]
+ padframe/mprj_pads.no_connect_1b\[0\]
+ padframe/mprj_pads.no_connect_1a\[0\]
+ padframe/mprj_pads.loop0_io\[10\]
+ padframe/mprj_pads.loop1_io\[10\]
+ padframe/mprj_pads.io_in\[10\]
+ padframe/mprj_pads.io_in_3v3\[10\]
+ padframe/mprj_pads.analog_noesd_io\[3\]
+ padframe/mprj_pads.loop0_io\[11\]
+ padframe/mprj_pads.loop1_io\[11\]
+ padframe/mprj_pads.io_in\[11\]
+ padframe/mprj_pads.io_in_3v3\[11\]
+ padframe/mprj_pads.analog_noesd_io\[4\]
+ padframe/mprj_pads.loop0_io\[12\]
+ padframe/mprj_pads.loop1_io\[12\]
+ padframe/mprj_pads.io_in\[12\]
+ padframe/mprj_pads.io_in_3v3\[12\]
+ padframe/mprj_pads.analog_noesd_io\[5\]
+ padframe/mprj_pads.loop0_io\[13\]
+ padframe/mprj_pads.loop1_io\[13\]
+ padframe/mprj_pads.io_in\[13\]
+ padframe/mprj_pads.io_in_3v3\[13\]
+ padframe/mprj_pads.analog_noesd_io\[6\]
+ padframe/mprj_pads.loop0_io\[14\]
+ padframe/mprj_pads.loop1_io\[14\]
+ padframe/mprj_pads.io_in\[14\]
+ padframe/mprj_pads.io_in_3v3\[14\]
+ padframe/mprj_pads.analog_noesd_io\[7\]
+ padframe/mprj_pads.loop0_io\[15\]
+ padframe/mprj_pads.loop1_io\[15\]
+ padframe/mprj_pads.io_in\[15\]
+ padframe/mprj_pads.io_in_3v3\[15\]
+ padframe/mprj_pads.analog_noesd_io\[8\]
+ padframe/mprj_pads.loop0_io\[16\]
+ padframe/mprj_pads.loop1_io\[16\]
+ padframe/mprj_pads.io_in\[16\]
+ padframe/mprj_pads.io_in_3v3\[16\]
+ padframe/mprj_pads.analog_noesd_io\[9\]
+ padframe/mprj_pads.loop0_io\[17\]
+ padframe/mprj_pads.loop1_io\[17\]
+ padframe/mprj_pads.io_in\[17\]
+ padframe/mprj_pads.io_in_3v3\[17\]
+ padframe/mprj_pads.analog_noesd_io\[10\]
+ padframe/mprj_pads.loop0_io\[18\]
+ padframe/mprj_pads.loop1_io\[18\]
+ padframe/mprj_pads.io_in\[18\]
+ padframe/mprj_pads.io_in_3v3\[18\]
+ padframe/mprj_pads.analog_noesd_io\[11\]
+ padframe/mprj_pads.loop0_io\[1\]
+ padframe/mprj_pads.loop1_io\[1\]
+ padframe/mprj_pads.io_in\[1\]
+ padframe/mprj_pads.io_in_3v3\[1\]
+ padframe/mprj_pads.no_connect_1b\[1\]
+ padframe/mprj_pads.no_connect_1a\[1\]
+ padframe/mprj_pads.loop0_io\[2\]
+ padframe/mprj_pads.loop1_io\[2\]
+ padframe/mprj_pads.io_in\[2\]
+ padframe/mprj_pads.io_in_3v3\[2\]
+ padframe/mprj_pads.no_connect_1b\[2\]
+ padframe/mprj_pads.no_connect_1a\[2\]
+ padframe/mprj_pads.loop0_io\[3\]
+ padframe/mprj_pads.loop1_io\[3\]
+ padframe/mprj_pads.io_in\[3\]
+ padframe/mprj_pads.io_in_3v3\[3\]
+ padframe/mprj_pads.no_connect_1b\[3\]
+ padframe/mprj_pads.no_connect_1a\[3\]
+ padframe/mprj_pads.loop0_io\[4\]
+ padframe/mprj_pads.loop1_io\[4\]
+ padframe/mprj_pads.io_in\[4\]
+ padframe/mprj_pads.io_in_3v3\[4\]
+ padframe/mprj_pads.no_connect_1b\[4\]
+ padframe/mprj_pads.no_connect_1a\[4\]
+ padframe/mprj_pads.loop0_io\[5\]
+ padframe/mprj_pads.loop1_io\[5\]
+ padframe/mprj_pads.io_in\[5\]
+ padframe/mprj_pads.io_in_3v3\[5\]
+ padframe/mprj_pads.no_connect_1b\[5\]
+ padframe/mprj_pads.no_connect_1a\[5\]
+ padframe/mprj_pads.loop0_io\[6\]
+ padframe/mprj_pads.loop1_io\[6\]
+ padframe/mprj_pads.io_in\[6\]
+ padframe/mprj_pads.io_in_3v3\[6\]
+ padframe/mprj_pads.no_connect_1b\[6\]
+ padframe/mprj_pads.no_connect_1a\[6\]
+ padframe/mprj_pads.loop0_io\[7\]
+ padframe/mprj_pads.loop1_io\[7\]
+ padframe/mprj_pads.io_in\[7\]
+ padframe/mprj_pads.io_in_3v3\[7\]
+ padframe/mprj_pads.analog_noesd_io\[0\]
+ padframe/mprj_pads.loop0_io\[8\]
+ padframe/mprj_pads.loop1_io\[8\]
+ padframe/mprj_pads.io_in\[8\]
+ padframe/mprj_pads.io_in_3v3\[8\]
+ padframe/mprj_pads.analog_noesd_io\[1\]
+ padframe/mprj_pads.loop0_io\[9\]
+ padframe/mprj_pads.loop1_io\[9\]
+ padframe/mprj_pads.io_in\[9\]
+ padframe/mprj_pads.io_in_3v3\[9\]
+ padframe/mprj_pads.analog_noesd_io\[2\]
+ padframe/mprj_pads.loop0_io\[19\]
+ padframe/mprj_pads.loop1_io\[19\]
+ padframe/mprj_pads.io_in\[19\]
+ padframe/mprj_pads.io_in_3v3\[19\]
+ padframe/mprj_pads.analog_noesd_io\[12\]
+ padframe/mprj_pads.loop0_io\[29\]
+ padframe/mprj_pads.loop1_io\[29\]
+ padframe/mprj_pads.io_in\[29\]
+ padframe/mprj_pads.io_in_3v3\[29\]
+ padframe/mprj_pads.analog_noesd_io\[22\]
+ padframe/mprj_pads.loop0_io\[30\]
+ padframe/mprj_pads.loop1_io\[30\]
+ padframe/mprj_pads.io_in\[30\]
+ padframe/mprj_pads.io_in_3v3\[30\]
+ padframe/mprj_pads.analog_noesd_io\[23\]
+ padframe/mprj_pads.loop0_io\[31\]
+ padframe/mprj_pads.loop1_io\[31\]
+ padframe/mprj_pads.io_in\[31\]
+ padframe/mprj_pads.io_in_3v3\[31\]
+ padframe/mprj_pads.analog_noesd_io\[24\]
+ padframe/mprj_pads.loop0_io\[32\]
+ padframe/mprj_pads.loop1_io\[32\]
+ padframe/mprj_pads.io_in\[32\]
+ padframe/mprj_pads.io_in_3v3\[32\]
+ padframe/mprj_pads.analog_noesd_io\[25\]
+ padframe/mprj_pads.loop0_io\[33\]
+ padframe/mprj_pads.loop1_io\[33\]
+ padframe/mprj_pads.io_in\[33\]
+ padframe/mprj_pads.io_in_3v3\[33\]
+ padframe/mprj_pads.analog_noesd_io\[26\]
+ padframe/mprj_pads.loop0_io\[34\]
+ padframe/mprj_pads.loop1_io\[34\]
+ padframe/mprj_pads.io_in\[34\]
+ padframe/mprj_pads.io_in_3v3\[34\]
+ padframe/mprj_pads.analog_noesd_io\[27\]
+ padframe/mprj_pads.loop0_io\[35\]
+ padframe/mprj_pads.loop1_io\[35\]
+ padframe/mprj_pads.io_in\[35\]
+ padframe/mprj_pads.io_in_3v3\[35\]
+ padframe/mprj_pads.analog_noesd_io\[28\]
+ padframe/mprj_pads.loop1_io\[36\]
+ padframe/mprj_pads.io_in\[36\]
+ padframe/mprj_pads.io_in_3v3\[36\]
+ padframe/mprj_pads.no_connect_2b\[0\]
+ padframe/mprj_pads.no_connect_2a\[0\]
+ padframe/mprj_pads.loop0_io\[37\]
+ padframe/mprj_pads.loop1_io\[37\]
+ padframe/mprj_pads.io_in\[37\]
+ padframe/mprj_pads.io_in_3v3\[37\]
+ padframe/mprj_pads.no_connect_2b\[1\]
+ padframe/mprj_pads.no_connect_2a\[1\]
+ padframe/mprj_pads.loop0_io\[20\]
+ padframe/mprj_pads.loop1_io\[20\]
+ padframe/mprj_pads.io_in\[20\]
+ padframe/mprj_pads.io_in_3v3\[20\]
+ padframe/mprj_pads.analog_noesd_io\[13\]
+ padframe/mprj_pads.loop0_io\[21\]
+ padframe/mprj_pads.loop1_io\[21\]
+ padframe/mprj_pads.io_in\[21\]
+ padframe/mprj_pads.io_in_3v3\[21\]
+ padframe/mprj_pads.analog_noesd_io\[14\]
+ padframe/mprj_pads.loop0_io\[22\]
+ padframe/mprj_pads.loop1_io\[22\]
+ padframe/mprj_pads.io_in\[22\]
+ padframe/mprj_pads.io_in_3v3\[22\]
+ padframe/mprj_pads.analog_noesd_io\[15\]
+ padframe/mprj_pads.loop0_io\[23\]
+ padframe/mprj_pads.loop1_io\[23\]
+ padframe/mprj_pads.io_in\[23\]
+ padframe/mprj_pads.io_in_3v3\[23\]
+ padframe/mprj_pads.analog_noesd_io\[16\]
+ padframe/mprj_pads.loop0_io\[24\]
+ padframe/mprj_pads.loop1_io\[24\]
+ padframe/mprj_pads.io_in\[24\]
+ padframe/mprj_pads.io_in_3v3\[24\]
+ padframe/mprj_pads.analog_noesd_io\[17\]
+ padframe/mprj_pads.loop0_io\[25\]
+ padframe/mprj_pads.loop1_io\[25\]
+ padframe/mprj_pads.io_in\[25\]
+ padframe/mprj_pads.io_in_3v3\[25\]
+ padframe/mprj_pads.analog_noesd_io\[18\]
+ padframe/mprj_pads.loop0_io\[26\]
+ padframe/mprj_pads.loop1_io\[26\]
+ padframe/mprj_pads.io_in\[26\]
+ padframe/mprj_pads.io_in_3v3\[26\]
+ padframe/mprj_pads.analog_noesd_io\[19\]
+ padframe/mprj_pads.loop0_io\[27\]
+ padframe/mprj_pads.loop1_io\[27\]
+ padframe/mprj_pads.io_in\[27\]
+ padframe/mprj_pads.io_in_3v3\[27\]
+ padframe/mprj_pads.analog_noesd_io\[20\]
+ padframe/mprj_pads.loop0_io\[28\]
+ padframe/mprj_pads.loop1_io\[28\]
+ padframe/mprj_pads.io_in\[28\]
+ padframe/mprj_pads.io_in_3v3\[28\]
+ padframe/mprj_pads.analog_noesd_io\[21\]
+ padframe/xres_vss_loop
+ padframe/xresloop
+ rstb_level/X
+ sigbuf/buf_out\[0\]
+ sigbuf/buf_out\[100\]
+ sigbuf/buf_in\[102\]
+ sigbuf/buf_out\[102\]
+ sigbuf/buf_in\[104\]
+ sigbuf/buf_out\[104\]
+ sigbuf/buf_in\[106\]
+ sigbuf/buf_in\[107\]
+ sigbuf/buf_out\[107\]
+ sigbuf/buf_in\[109\]
+ sigbuf/buf_in\[110\]
+ sigbuf/buf_in\[11\]
+ sigbuf/buf_out\[110\]
+ sigbuf/buf_in\[112\]
+ sigbuf/buf_in\[113\]
+ sigbuf/buf_out\[113\]
+ sigbuf/buf_in\[115\]
+ sigbuf/buf_in\[116\]
+ sigbuf/buf_in\[117\]
+ sigbuf/buf_out\[117\]
+ sigbuf/buf_in\[119\]
+ sigbuf/buf_in\[120\]
+ sigbuf/buf_in\[12\]
+ sigbuf/buf_in\[121\]
+ sigbuf/buf_in\[122\]
+ sigbuf/buf_in\[123\]
+ sigbuf/buf_out\[123\]
+ sigbuf/buf_in\[125\]
+ sigbuf/buf_in\[126\]
+ sigbuf/buf_in\[127\]
+ sigbuf/buf_in\[128\]
+ sigbuf/buf_in\[129\]
+ sigbuf/buf_out\[129\]
+ sigbuf/buf_out\[12\]
+ sigbuf/buf_in\[131\]
+ sigbuf/buf_in\[132\]
+ sigbuf/buf_in\[133\]
+ sigbuf/buf_in\[134\]
+ sigbuf/buf_in\[135\]
+ sigbuf/buf_out\[135\]
+ sigbuf/buf_in\[137\]
+ sigbuf/buf_in\[138\]
+ sigbuf/buf_in\[139\]
+ sigbuf/buf_in\[140\]
+ sigbuf/buf_in\[14\]
+ sigbuf/buf_out\[140\]
+ sigbuf/buf_in\[142\]
+ sigbuf/buf_in\[143\]
+ sigbuf/buf_in\[144\]
+ sigbuf/buf_in\[145\]
+ sigbuf/buf_out\[145\]
+ sigbuf/buf_in\[147\]
+ sigbuf/buf_in\[148\]
+ sigbuf/buf_in\[149\]
+ sigbuf/buf_out\[149\]
+ sigbuf/buf_in\[15\]
+ sigbuf/buf_in\[151\]
+ sigbuf/buf_in\[152\]
+ sigbuf/buf_in\[153\]
+ sigbuf/buf_out\[153\]
+ sigbuf/buf_in\[155\]
+ sigbuf/buf_in\[156\]
+ sigbuf/buf_in\[157\]
+ sigbuf/buf_out\[157\]
+ sigbuf/buf_in\[159\]
+ sigbuf/buf_in\[160\]
+ sigbuf/buf_out\[15\]
+ sigbuf/buf_in\[161\]
+ sigbuf/buf_out\[161\]
+ sigbuf/buf_in\[163\]
+ sigbuf/buf_in\[164\]
+ sigbuf/buf_in\[165\]
+ sigbuf/buf_out\[165\]
+ sigbuf/buf_in\[167\]
+ sigbuf/buf_in\[168\]
+ sigbuf/buf_in\[169\]
+ sigbuf/buf_out\[169\]
+ sigbuf/buf_in\[17\]
+ sigbuf/buf_in\[171\]
+ sigbuf/buf_in\[172\]
+ sigbuf/buf_out\[172\]
+ sigbuf/buf_in\[174\]
+ sigbuf/buf_in\[175\]
+ sigbuf/buf_out\[175\]
+ sigbuf/buf_in\[177\]
+ sigbuf/buf_in\[178\]
+ sigbuf/buf_out\[178\]
+ sigbuf/buf_in\[180\]
+ sigbuf/buf_in\[18\]
+ sigbuf/buf_in\[181\]
+ sigbuf/buf_out\[181\]
+ sigbuf/buf_in\[183\]
+ sigbuf/buf_out\[183\]
+ sigbuf/buf_in\[185\]
+ sigbuf/buf_out\[185\]
+ sigbuf/buf_in\[187\]
+ sigbuf/buf_out\[187\]
+ sigbuf/buf_in\[189\]
+ sigbuf/buf_out\[189\]
+ sigbuf/buf_out\[18\]
+ sigbuf/buf_in\[191\]
+ sigbuf/buf_out\[191\]
+ sigbuf/buf_in\[193\]
+ sigbuf/buf_out\[193\]
+ sigbuf/buf_in\[195\]
+ sigbuf/buf_out\[195\]
+ sigbuf/buf_in\[20\]
+ sigbuf/buf_out\[1\]
+ sigbuf/buf_in\[21\]
+ sigbuf/buf_in\[22\]
+ sigbuf/buf_out\[22\]
+ sigbuf/buf_in\[24\]
+ sigbuf/buf_in\[25\]
+ sigbuf/buf_in\[26\]
+ sigbuf/buf_in\[27\]
+ sigbuf/buf_in\[28\]
+ sigbuf/buf_out\[28\]
+ sigbuf/buf_in\[30\]
+ sigbuf/buf_out\[2\]
+ sigbuf/buf_in\[31\]
+ sigbuf/buf_in\[32\]
+ sigbuf/buf_in\[33\]
+ sigbuf/buf_in\[34\]
+ sigbuf/buf_out\[34\]
+ sigbuf/buf_in\[36\]
+ sigbuf/buf_in\[37\]
+ sigbuf/buf_in\[38\]
+ sigbuf/buf_in\[39\]
+ sigbuf/buf_in\[40\]
+ sigbuf/buf_out\[3\]
+ sigbuf/buf_out\[40\]
+ sigbuf/buf_in\[42\]
+ sigbuf/buf_in\[43\]
+ sigbuf/buf_in\[44\]
+ sigbuf/buf_in\[45\]
+ sigbuf/buf_out\[45\]
+ sigbuf/buf_in\[47\]
+ sigbuf/buf_in\[48\]
+ sigbuf/buf_in\[49\]
+ sigbuf/buf_in\[50\]
+ sigbuf/buf_out\[4\]
+ sigbuf/buf_out\[50\]
+ sigbuf/buf_in\[52\]
+ sigbuf/buf_in\[53\]
+ sigbuf/buf_in\[54\]
+ sigbuf/buf_out\[54\]
+ sigbuf/buf_in\[56\]
+ sigbuf/buf_in\[57\]
+ sigbuf/buf_in\[58\]
+ sigbuf/buf_out\[58\]
+ sigbuf/buf_in\[60\]
+ sigbuf/buf_out\[5\]
+ sigbuf/buf_in\[61\]
+ sigbuf/buf_in\[62\]
+ sigbuf/buf_out\[62\]
+ sigbuf/buf_in\[64\]
+ sigbuf/buf_in\[65\]
+ sigbuf/buf_in\[66\]
+ sigbuf/buf_out\[66\]
+ sigbuf/buf_in\[68\]
+ sigbuf/buf_in\[69\]
+ sigbuf/buf_in\[70\]
+ sigbuf/buf_in\[7\]
+ sigbuf/buf_out\[70\]
+ sigbuf/buf_in\[72\]
+ sigbuf/buf_in\[73\]
+ sigbuf/buf_in\[74\]
+ sigbuf/buf_out\[74\]
+ sigbuf/buf_in\[76\]
+ sigbuf/buf_in\[77\]
+ sigbuf/buf_out\[77\]
+ sigbuf/buf_in\[79\]
+ sigbuf/buf_in\[80\]
+ sigbuf/buf_out\[7\]
+ sigbuf/buf_out\[80\]
+ sigbuf/buf_in\[82\]
+ sigbuf/buf_in\[83\]
+ sigbuf/buf_out\[83\]
+ sigbuf/buf_in\[85\]
+ sigbuf/buf_in\[86\]
+ sigbuf/buf_out\[86\]
+ sigbuf/buf_in\[88\]
+ sigbuf/buf_out\[88\]
+ sigbuf/buf_in\[90\]
+ sigbuf/buf_in\[9\]
+ sigbuf/buf_out\[90\]
+ sigbuf/buf_in\[92\]
+ sigbuf/buf_out\[92\]
+ sigbuf/buf_in\[94\]
+ sigbuf/buf_out\[94\]
+ sigbuf/buf_out\[95\]
+ sigbuf/buf_out\[96\]
+ sigbuf/buf_out\[97\]
+ sigbuf/buf_out\[98\]
+ sigbuf/buf_out\[99\]
+ sigbuf/buf_out\[9\]
+ user_id_value/mask_rev[15]
+ user_id_value/mask_rev[14]
+ user_id_value/mask_rev[13]
+ user_id_value/mask_rev[12]
+ user_id_value/mask_rev[11]
+ user_id_value/mask_rev[10]
+ user_id_value/mask_rev[9]
+ user_id_value/mask_rev[8]
+ user_id_value/mask_rev[7]
+ user_id_value/mask_rev[6]
+ user_id_value/mask_rev[5]
+ user_id_value/mask_rev[4]
+ user_id_value/mask_rev[3]
+ user_id_value/mask_rev[2]
+ user_id_value/mask_rev[1]
+ user_id_value/mask_rev[0]
+ user_id_value/user_proj_id_high\[0\]
+ user_id_value/user_proj_id_high\[10\]
+ user_id_value/user_proj_id_high\[11\]
+ user_id_value/user_proj_id_high\[12\]
+ user_id_value/user_proj_id_high\[13\]
+ user_id_value/user_proj_id_high\[14\]
+ user_id_value/user_proj_id_high\[15\]
+ user_id_value/user_proj_id_high\[16\]
+ user_id_value/user_proj_id_high\[17\]
+ user_id_value/user_proj_id_high\[18\]
+ user_id_value/user_proj_id_high\[19\]
+ user_id_value/user_proj_id_high\[1\]
+ user_id_value/user_proj_id_high\[20\]
+ user_id_value/user_proj_id_high\[21\]
+ user_id_value/user_proj_id_high\[22\]
+ user_id_value/user_proj_id_high\[23\]
+ user_id_value/user_proj_id_high\[24\]
+ user_id_value/user_proj_id_high\[25\]
+ user_id_value/user_proj_id_high\[26\]
+ user_id_value/user_proj_id_high\[27\]
+ user_id_value/user_proj_id_high\[28\]
+ user_id_value/user_proj_id_high\[29\]
+ user_id_value/user_proj_id_high\[2\]
+ user_id_value/user_proj_id_high\[30\]
+ user_id_value/user_proj_id_high\[31\]
+ user_id_value/user_proj_id_high\[3\]
+ user_id_value/user_proj_id_high\[4\]
+ user_id_value/user_proj_id_high\[5\]
+ user_id_value/user_proj_id_high\[6\]
+ user_id_value/user_proj_id_high\[7\]
+ user_id_value/user_proj_id_high\[8\]
+ user_id_value/user_proj_id_high\[9\]
+ spare_logic\[0\]/spare_xfq[1]
+ spare_logic\[0\]/spare_xfq[0]
+ spare_logic\[0\]/spare_xfqn[1]
+ spare_logic\[0\]/spare_xfqn[0]
+ spare_logic\[0\]/spare_xi[3]
+ spare_logic\[0\]/spare_xi[2]
+ spare_logic\[0\]/spare_xi[1]
+ spare_logic\[0\]/spare_xi[0]
+ spare_logic\[0\]/spare_xib
+ spare_logic\[0\]/spare_xmx[1]
+ spare_logic\[0\]/spare_xmx[0]
+ spare_logic\[0\]/spare_xna[1]
+ spare_logic\[0\]/spare_xna[0]
+ spare_logic\[0\]/spare_xno[1]
+ spare_logic\[0\]/spare_xno[0]
+ spare_logic\[0\]/spare_xz[26]
+ spare_logic\[0\]/spare_xz[25]
+ spare_logic\[0\]/spare_xz[24]
+ spare_logic\[0\]/spare_xz[23]
+ spare_logic\[0\]/spare_xz[22]
+ spare_logic\[0\]/spare_xz[21]
+ spare_logic\[0\]/spare_xz[20]
+ spare_logic\[0\]/spare_xz[19]
+ spare_logic\[0\]/spare_xz[18]
+ spare_logic\[0\]/spare_xz[17]
+ spare_logic\[0\]/spare_xz[16]
+ spare_logic\[0\]/spare_xz[15]
+ spare_logic\[0\]/spare_xz[14]
+ spare_logic\[0\]/spare_xz[13]
+ spare_logic\[0\]/spare_xz[12]
+ spare_logic\[0\]/spare_xz[11]
+ spare_logic\[0\]/spare_xz[10]
+ spare_logic\[0\]/spare_xz[9]
+ spare_logic\[0\]/spare_xz[8]
+ spare_logic\[0\]/spare_xz[7]
+ spare_logic\[0\]/spare_xz[6]
+ spare_logic\[0\]/spare_xz[5]
+ spare_logic\[0\]/spare_xz[4]
+ spare_logic\[0\]/spare_xz[3]
+ spare_logic\[0\]/spare_xz[2]
+ spare_logic\[0\]/spare_xz[1]
+ spare_logic\[0\]/spare_xz[0]
+ spare_logic\[0\]/spare_logic1\[0\]
+ spare_logic\[0\]/spare_logic1\[10\]
+ spare_logic\[0\]/spare_logic1\[11\]
+ spare_logic\[0\]/spare_logic1\[12\]
+ spare_logic\[0\]/spare_logic1\[13\]
+ spare_logic\[0\]/spare_logic1\[14\]
+ spare_logic\[0\]/spare_logic1\[15\]
+ spare_logic\[0\]/spare_logic1\[16\]
+ spare_logic\[0\]/spare_logic1\[17\]
+ spare_logic\[0\]/spare_logic1\[18\]
+ spare_logic\[0\]/spare_logic1\[19\]
+ spare_logic\[0\]/spare_logic1\[1\]
+ spare_logic\[0\]/spare_logic1\[20\]
+ spare_logic\[0\]/spare_logic1\[21\]
+ spare_logic\[0\]/spare_logic1\[22\]
+ spare_logic\[0\]/spare_logic1\[23\]
+ spare_logic\[0\]/spare_logic1\[24\]
+ spare_logic\[0\]/spare_logic1\[25\]
+ spare_logic\[0\]/spare_logic1\[26\]
+ spare_logic\[0\]/spare_logic1\[2\]
+ spare_logic\[0\]/spare_logic1\[3\]
+ spare_logic\[0\]/spare_logic1\[4\]
+ spare_logic\[0\]/spare_logic1\[5\]
+ spare_logic\[0\]/spare_logic1\[6\]
+ spare_logic\[0\]/spare_logic1\[7\]
+ spare_logic\[0\]/spare_logic1\[8\]
+ spare_logic\[0\]/spare_logic1\[9\]
+ spare_logic\[1\]/spare_xfq[1]
+ spare_logic\[1\]/spare_xfq[0]
+ spare_logic\[1\]/spare_xfqn[1]
+ spare_logic\[1\]/spare_xfqn[0]
+ spare_logic\[1\]/spare_xi[3]
+ spare_logic\[1\]/spare_xi[2]
+ spare_logic\[1\]/spare_xi[1]
+ spare_logic\[1\]/spare_xi[0]
+ spare_logic\[1\]/spare_xib
+ spare_logic\[1\]/spare_xmx[1]
+ spare_logic\[1\]/spare_xmx[0]
+ spare_logic\[1\]/spare_xna[1]
+ spare_logic\[1\]/spare_xna[0]
+ spare_logic\[1\]/spare_xno[1]
+ spare_logic\[1\]/spare_xno[0]
+ spare_logic\[1\]/spare_xz[26]
+ spare_logic\[1\]/spare_xz[25]
+ spare_logic\[1\]/spare_xz[24]
+ spare_logic\[1\]/spare_xz[23]
+ spare_logic\[1\]/spare_xz[22]
+ spare_logic\[1\]/spare_xz[21]
+ spare_logic\[1\]/spare_xz[20]
+ spare_logic\[1\]/spare_xz[19]
+ spare_logic\[1\]/spare_xz[18]
+ spare_logic\[1\]/spare_xz[17]
+ spare_logic\[1\]/spare_xz[16]
+ spare_logic\[1\]/spare_xz[15]
+ spare_logic\[1\]/spare_xz[14]
+ spare_logic\[1\]/spare_xz[13]
+ spare_logic\[1\]/spare_xz[12]
+ spare_logic\[1\]/spare_xz[11]
+ spare_logic\[1\]/spare_xz[10]
+ spare_logic\[1\]/spare_xz[9]
+ spare_logic\[1\]/spare_xz[8]
+ spare_logic\[1\]/spare_xz[7]
+ spare_logic\[1\]/spare_xz[6]
+ spare_logic\[1\]/spare_xz[5]
+ spare_logic\[1\]/spare_xz[4]
+ spare_logic\[1\]/spare_xz[3]
+ spare_logic\[1\]/spare_xz[2]
+ spare_logic\[1\]/spare_xz[1]
+ spare_logic\[1\]/spare_xz[0]
+ spare_logic\[1\]/spare_logic1\[0\]
+ spare_logic\[1\]/spare_logic1\[10\]
+ spare_logic\[1\]/spare_logic1\[11\]
+ spare_logic\[1\]/spare_logic1\[12\]
+ spare_logic\[1\]/spare_logic1\[13\]
+ spare_logic\[1\]/spare_logic1\[14\]
+ spare_logic\[1\]/spare_logic1\[15\]
+ spare_logic\[1\]/spare_logic1\[16\]
+ spare_logic\[1\]/spare_logic1\[17\]
+ spare_logic\[1\]/spare_logic1\[18\]
+ spare_logic\[1\]/spare_logic1\[19\]
+ spare_logic\[1\]/spare_logic1\[1\]
+ spare_logic\[1\]/spare_logic1\[20\]
+ spare_logic\[1\]/spare_logic1\[21\]
+ spare_logic\[1\]/spare_logic1\[22\]
+ spare_logic\[1\]/spare_logic1\[23\]
+ spare_logic\[1\]/spare_logic1\[24\]
+ spare_logic\[1\]/spare_logic1\[25\]
+ spare_logic\[1\]/spare_logic1\[26\]
+ spare_logic\[1\]/spare_logic1\[2\]
+ spare_logic\[1\]/spare_logic1\[3\]
+ spare_logic\[1\]/spare_logic1\[4\]
+ spare_logic\[1\]/spare_logic1\[5\]
+ spare_logic\[1\]/spare_logic1\[6\]
+ spare_logic\[1\]/spare_logic1\[7\]
+ spare_logic\[1\]/spare_logic1\[8\]
+ spare_logic\[1\]/spare_logic1\[9\]
+ spare_logic\[2\]/spare_xfq[1]
+ spare_logic\[2\]/spare_xfq[0]
+ spare_logic\[2\]/spare_xfqn[1]
+ spare_logic\[2\]/spare_xfqn[0]
+ spare_logic\[2\]/spare_xi[3]
+ spare_logic\[2\]/spare_xi[2]
+ spare_logic\[2\]/spare_xi[1]
+ spare_logic\[2\]/spare_xi[0]
+ spare_logic\[2\]/spare_xib
+ spare_logic\[2\]/spare_xmx[1]
+ spare_logic\[2\]/spare_xmx[0]
+ spare_logic\[2\]/spare_xna[1]
+ spare_logic\[2\]/spare_xna[0]
+ spare_logic\[2\]/spare_xno[1]
+ spare_logic\[2\]/spare_xno[0]
+ spare_logic\[2\]/spare_xz[26]
+ spare_logic\[2\]/spare_xz[25]
+ spare_logic\[2\]/spare_xz[24]
+ spare_logic\[2\]/spare_xz[23]
+ spare_logic\[2\]/spare_xz[22]
+ spare_logic\[2\]/spare_xz[21]
+ spare_logic\[2\]/spare_xz[20]
+ spare_logic\[2\]/spare_xz[19]
+ spare_logic\[2\]/spare_xz[18]
+ spare_logic\[2\]/spare_xz[17]
+ spare_logic\[2\]/spare_xz[16]
+ spare_logic\[2\]/spare_xz[15]
+ spare_logic\[2\]/spare_xz[14]
+ spare_logic\[2\]/spare_xz[13]
+ spare_logic\[2\]/spare_xz[12]
+ spare_logic\[2\]/spare_xz[11]
+ spare_logic\[2\]/spare_xz[10]
+ spare_logic\[2\]/spare_xz[9]
+ spare_logic\[2\]/spare_xz[8]
+ spare_logic\[2\]/spare_xz[7]
+ spare_logic\[2\]/spare_xz[6]
+ spare_logic\[2\]/spare_xz[5]
+ spare_logic\[2\]/spare_xz[4]
+ spare_logic\[2\]/spare_xz[3]
+ spare_logic\[2\]/spare_xz[2]
+ spare_logic\[2\]/spare_xz[1]
+ spare_logic\[2\]/spare_xz[0]
+ spare_logic\[2\]/spare_logic1\[0\]
+ spare_logic\[2\]/spare_logic1\[10\]
+ spare_logic\[2\]/spare_logic1\[11\]
+ spare_logic\[2\]/spare_logic1\[12\]
+ spare_logic\[2\]/spare_logic1\[13\]
+ spare_logic\[2\]/spare_logic1\[14\]
+ spare_logic\[2\]/spare_logic1\[15\]
+ spare_logic\[2\]/spare_logic1\[16\]
+ spare_logic\[2\]/spare_logic1\[17\]
+ spare_logic\[2\]/spare_logic1\[18\]
+ spare_logic\[2\]/spare_logic1\[19\]
+ spare_logic\[2\]/spare_logic1\[1\]
+ spare_logic\[2\]/spare_logic1\[20\]
+ spare_logic\[2\]/spare_logic1\[21\]
+ spare_logic\[2\]/spare_logic1\[22\]
+ spare_logic\[2\]/spare_logic1\[23\]
+ spare_logic\[2\]/spare_logic1\[24\]
+ spare_logic\[2\]/spare_logic1\[25\]
+ spare_logic\[2\]/spare_logic1\[26\]
+ spare_logic\[2\]/spare_logic1\[2\]
+ spare_logic\[2\]/spare_logic1\[3\]
+ spare_logic\[2\]/spare_logic1\[4\]
+ spare_logic\[2\]/spare_logic1\[5\]
+ spare_logic\[2\]/spare_logic1\[6\]
+ spare_logic\[2\]/spare_logic1\[7\]
+ spare_logic\[2\]/spare_logic1\[8\]
+ spare_logic\[2\]/spare_logic1\[9\]
+ spare_logic\[3\]/spare_xfq[1]
+ spare_logic\[3\]/spare_xfq[0]
+ spare_logic\[3\]/spare_xfqn[1]
+ spare_logic\[3\]/spare_xfqn[0]
+ spare_logic\[3\]/spare_xi[3]
+ spare_logic\[3\]/spare_xi[2]
+ spare_logic\[3\]/spare_xi[1]
+ spare_logic\[3\]/spare_xi[0]
+ spare_logic\[3\]/spare_xib
+ spare_logic\[3\]/spare_xmx[1]
+ spare_logic\[3\]/spare_xmx[0]
+ spare_logic\[3\]/spare_xna[1]
+ spare_logic\[3\]/spare_xna[0]
+ spare_logic\[3\]/spare_xno[1]
+ spare_logic\[3\]/spare_xno[0]
+ spare_logic\[3\]/spare_xz[26]
+ spare_logic\[3\]/spare_xz[25]
+ spare_logic\[3\]/spare_xz[24]
+ spare_logic\[3\]/spare_xz[23]
+ spare_logic\[3\]/spare_xz[22]
+ spare_logic\[3\]/spare_xz[21]
+ spare_logic\[3\]/spare_xz[20]
+ spare_logic\[3\]/spare_xz[19]
+ spare_logic\[3\]/spare_xz[18]
+ spare_logic\[3\]/spare_xz[17]
+ spare_logic\[3\]/spare_xz[16]
+ spare_logic\[3\]/spare_xz[15]
+ spare_logic\[3\]/spare_xz[14]
+ spare_logic\[3\]/spare_xz[13]
+ spare_logic\[3\]/spare_xz[12]
+ spare_logic\[3\]/spare_xz[11]
+ spare_logic\[3\]/spare_xz[10]
+ spare_logic\[3\]/spare_xz[9]
+ spare_logic\[3\]/spare_xz[8]
+ spare_logic\[3\]/spare_xz[7]
+ spare_logic\[3\]/spare_xz[6]
+ spare_logic\[3\]/spare_xz[5]
+ spare_logic\[3\]/spare_xz[4]
+ spare_logic\[3\]/spare_xz[3]
+ spare_logic\[3\]/spare_xz[2]
+ spare_logic\[3\]/spare_xz[1]
+ spare_logic\[3\]/spare_xz[0]
+ spare_logic\[3\]/spare_logic1\[0\]
+ spare_logic\[3\]/spare_logic1\[10\]
+ spare_logic\[3\]/spare_logic1\[11\]
+ spare_logic\[3\]/spare_logic1\[12\]
+ spare_logic\[3\]/spare_logic1\[13\]
+ spare_logic\[3\]/spare_logic1\[14\]
+ spare_logic\[3\]/spare_logic1\[15\]
+ spare_logic\[3\]/spare_logic1\[16\]
+ spare_logic\[3\]/spare_logic1\[17\]
+ spare_logic\[3\]/spare_logic1\[18\]
+ spare_logic\[3\]/spare_logic1\[19\]
+ spare_logic\[3\]/spare_logic1\[1\]
+ spare_logic\[3\]/spare_logic1\[20\]
+ spare_logic\[3\]/spare_logic1\[21\]
+ spare_logic\[3\]/spare_logic1\[22\]
+ spare_logic\[3\]/spare_logic1\[23\]
+ spare_logic\[3\]/spare_logic1\[24\]
+ spare_logic\[3\]/spare_logic1\[25\]
+ spare_logic\[3\]/spare_logic1\[26\]
+ spare_logic\[3\]/spare_logic1\[2\]
+ spare_logic\[3\]/spare_logic1\[3\]
+ spare_logic\[3\]/spare_logic1\[4\]
+ spare_logic\[3\]/spare_logic1\[5\]
+ spare_logic\[3\]/spare_logic1\[6\]
+ spare_logic\[3\]/spare_logic1\[7\]
+ spare_logic\[3\]/spare_logic1\[8\]
+ spare_logic\[3\]/spare_logic1\[9\]
+ user_id_value/mask_rev[31]
+ user_id_value/mask_rev[30]
+ user_id_value/mask_rev[29]
+ user_id_value/mask_rev[28]
+ user_id_value/mask_rev[27]
+ user_id_value/mask_rev[26]
+ user_id_value/mask_rev[25]
+ user_id_value/mask_rev[24]
+ user_id_value/mask_rev[23]
+ user_id_value/mask_rev[22]
+ user_id_value/mask_rev[21]
+ user_id_value/mask_rev[20]
+ user_id_value/mask_rev[19]
+ user_id_value/mask_rev[18]
+ user_id_value/mask_rev[17]
+ user_id_value/mask_rev[16]
+Found 629 partially unannotated nets.
+ flash_clkrst_buffers/out_s[7]
+  padframe/flash_clk_pad/OE_N
+ flash_clkrst_buffers/out_s[8]
+  padframe/flash_csb_pad/OUT
+ flash_clkrst_buffers/out_s[9]
+  padframe/flash_clk_pad/OUT
+ flash_clkrst_buffers/out_s[0]
+  padframe/flash_io1_pad/OUT
+ flash_clkrst_buffers/out_s[1]
+  padframe/flash_io0_pad/OUT
+ flash_clkrst_buffers/out_s[2]
+  padframe/flash_io1_pad/DM[2]
+  padframe/flash_io1_pad/DM[1]
+  padframe/flash_io1_pad/INP_DIS
+ flash_clkrst_buffers/out_s[3]
+  padframe/flash_io0_pad/DM[2]
+  padframe/flash_io0_pad/DM[1]
+  padframe/flash_io0_pad/INP_DIS
+ flash_clkrst_buffers/out_s[4]
+  padframe/flash_io1_pad/DM[0]
+  padframe/flash_io1_pad/OE_N
+ flash_clkrst_buffers/out_s[5]
+  padframe/flash_io0_pad/DM[0]
+  padframe/flash_io0_pad/OE_N
+ flash_clkrst_buffers/out_s[6]
+  padframe/flash_csb_pad/OE_N
+ gpio_control_bidir_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[0]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[1]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[2]
+ gpio_control_bidir_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[0\]/HLD_OVR
+ gpio_control_bidir_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[0\]/INP_DIS
+ gpio_control_bidir_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[0\]/OUT
+ gpio_control_bidir_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[0\]/OE_N
+ gpio_control_bidir_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/SLOW
+ gpio_control_bidir_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/VTRIP_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_EN
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_POL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_SEL
+ gpio_control_bidir_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[0]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[1]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[2]
+ gpio_control_bidir_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[1\]/HLD_OVR
+ gpio_control_bidir_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[1\]/INP_DIS
+ gpio_control_bidir_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[1\]/OUT
+ gpio_control_bidir_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[1\]/OE_N
+ gpio_control_bidir_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/SLOW
+ gpio_control_bidir_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/VTRIP_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_EN
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_POL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_SEL
+ gpio_control_bidir_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[0]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[1]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[2]
+ gpio_control_bidir_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[16\]/HLD_OVR
+ gpio_control_bidir_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_bidir_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[16\]/INP_DIS
+ gpio_control_bidir_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[16\]/OUT
+ gpio_control_bidir_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[16\]/OE_N
+ gpio_control_bidir_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/SLOW
+ gpio_control_bidir_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/VTRIP_SEL
+ gpio_control_bidir_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[89\]/A
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_EN
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_POL
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_SEL
+ gpio_control_bidir_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[0]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[1]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[2]
+ gpio_control_bidir_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[17\]/HLD_OVR
+ gpio_control_bidir_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_bidir_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[17\]/INP_DIS
+ gpio_control_bidir_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[17\]/OUT
+ gpio_control_bidir_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[17\]/OE_N
+ gpio_control_bidir_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/SLOW
+ gpio_control_bidir_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/VTRIP_SEL
+ gpio_control_bidir_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[91\]/A
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_EN
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_POL
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_SEL
+ gpio_control_bidir_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[0]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[1]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[2]
+ gpio_control_bidir_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[18\]/HLD_OVR
+ gpio_control_bidir_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_bidir_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[18\]/INP_DIS
+ gpio_control_bidir_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[18\]/OUT
+ gpio_control_bidir_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[18\]/OE_N
+ gpio_control_bidir_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/SLOW
+ gpio_control_bidir_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/VTRIP_SEL
+ gpio_control_bidir_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[93\]/A
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_EN
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_POL
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[0]
+ gpio_control_in_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[1]
+ gpio_control_in_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[2]
+ gpio_control_in_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[8\]/HLD_OVR
+ gpio_control_in_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[8\]/INP_DIS
+ gpio_control_in_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[8\]/OUT
+ gpio_control_in_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[8\]/OE_N
+ gpio_control_in_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/SLOW
+ gpio_control_in_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_1\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[1\]/A
+ gpio_control_in_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_1\[10\]/one
+  padframe/mprj_pads.area1_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_in_1\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[0]
+ gpio_control_in_1\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[1]
+ gpio_control_in_1\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[2]
+ gpio_control_in_1\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[18\]/HLD_OVR
+ gpio_control_in_1\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_in_1\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[18\]/INP_DIS
+ gpio_control_in_1\[10\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[18\]/OUT
+ gpio_control_in_1\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[18\]/OE_N
+ gpio_control_in_1\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/SLOW
+ gpio_control_in_1\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/VTRIP_SEL
+ gpio_control_in_1\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[19\]/A
+ gpio_control_in_1\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_EN
+ gpio_control_in_1\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_POL
+ gpio_control_in_1\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[0]
+ gpio_control_in_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[1]
+ gpio_control_in_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[2]
+ gpio_control_in_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[9\]/HLD_OVR
+ gpio_control_in_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[9\]/INP_DIS
+ gpio_control_in_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[9\]/OUT
+ gpio_control_in_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[9\]/OE_N
+ gpio_control_in_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/SLOW
+ gpio_control_in_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_1\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[2\]/A
+ gpio_control_in_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_SEL
+ gpio_control_in_1\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_1\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[0]
+ gpio_control_in_1\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[1]
+ gpio_control_in_1\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[2]
+ gpio_control_in_1\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[10\]/HLD_OVR
+ gpio_control_in_1\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_1\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[10\]/INP_DIS
+ gpio_control_in_1\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[10\]/OUT
+ gpio_control_in_1\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[10\]/OE_N
+ gpio_control_in_1\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/SLOW
+ gpio_control_in_1\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_1\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[3\]/A
+ gpio_control_in_1\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_1\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_1\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_1\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_1\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[0]
+ gpio_control_in_1\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[1]
+ gpio_control_in_1\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[2]
+ gpio_control_in_1\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[11\]/HLD_OVR
+ gpio_control_in_1\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_1\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[11\]/INP_DIS
+ gpio_control_in_1\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[11\]/OUT
+ gpio_control_in_1\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[11\]/OE_N
+ gpio_control_in_1\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/SLOW
+ gpio_control_in_1\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_1\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[4\]/A
+ gpio_control_in_1\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_1\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_1\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_1\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_1\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[0]
+ gpio_control_in_1\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[1]
+ gpio_control_in_1\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[2]
+ gpio_control_in_1\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[12\]/HLD_OVR
+ gpio_control_in_1\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_1\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[12\]/INP_DIS
+ gpio_control_in_1\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[12\]/OUT
+ gpio_control_in_1\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[12\]/OE_N
+ gpio_control_in_1\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/SLOW
+ gpio_control_in_1\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_1\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[5\]/A
+ gpio_control_in_1\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_1\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_1\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_1\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_1\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[0]
+ gpio_control_in_1\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[1]
+ gpio_control_in_1\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[2]
+ gpio_control_in_1\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[13\]/HLD_OVR
+ gpio_control_in_1\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_1\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[13\]/INP_DIS
+ gpio_control_in_1\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[13\]/OUT
+ gpio_control_in_1\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[13\]/OE_N
+ gpio_control_in_1\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/SLOW
+ gpio_control_in_1\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_1\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[6\]/A
+ gpio_control_in_1\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_1\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_1\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_1\[6\]/one
+  padframe/mprj_pads.area1_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_1\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[0]
+ gpio_control_in_1\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[1]
+ gpio_control_in_1\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[2]
+ gpio_control_in_1\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[14\]/HLD_OVR
+ gpio_control_in_1\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_1\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[14\]/INP_DIS
+ gpio_control_in_1\[6\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[14\]/OUT
+ gpio_control_in_1\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[14\]/OE_N
+ gpio_control_in_1\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/SLOW
+ gpio_control_in_1\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_1\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[8\]/A
+ gpio_control_in_1\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_1\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_1\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_1\[7\]/one
+  padframe/mprj_pads.area1_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_1\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[0]
+ gpio_control_in_1\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[1]
+ gpio_control_in_1\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[2]
+ gpio_control_in_1\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[15\]/HLD_OVR
+ gpio_control_in_1\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_1\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[15\]/INP_DIS
+ gpio_control_in_1\[7\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[15\]/OUT
+ gpio_control_in_1\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[15\]/OE_N
+ gpio_control_in_1\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/SLOW
+ gpio_control_in_1\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_1\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[10\]/A
+ gpio_control_in_1\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_1\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_1\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_1\[8\]/one
+  padframe/mprj_pads.area1_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_in_1\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[0]
+ gpio_control_in_1\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[1]
+ gpio_control_in_1\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[2]
+ gpio_control_in_1\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[16\]/HLD_OVR
+ gpio_control_in_1\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_in_1\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[16\]/INP_DIS
+ gpio_control_in_1\[8\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[16\]/OUT
+ gpio_control_in_1\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[16\]/OE_N
+ gpio_control_in_1\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/SLOW
+ gpio_control_in_1\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/VTRIP_SEL
+ gpio_control_in_1\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[13\]/A
+ gpio_control_in_1\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_EN
+ gpio_control_in_1\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_POL
+ gpio_control_in_1\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_SEL
+ gpio_control_in_1\[9\]/one
+  padframe/mprj_pads.area1_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_in_1\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[0]
+ gpio_control_in_1\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[1]
+ gpio_control_in_1\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[2]
+ gpio_control_in_1\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[17\]/HLD_OVR
+ gpio_control_in_1\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_in_1\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[17\]/INP_DIS
+ gpio_control_in_1\[9\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[17\]/OUT
+ gpio_control_in_1\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[17\]/OE_N
+ gpio_control_in_1\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/SLOW
+ gpio_control_in_1\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/VTRIP_SEL
+ gpio_control_in_1\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[16\]/A
+ gpio_control_in_1\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_EN
+ gpio_control_in_1\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_POL
+ gpio_control_in_1\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_SEL
+ gpio_control_in_1a\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_1a\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[0]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[1]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[2]
+ gpio_control_in_1a\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[2\]/HLD_OVR
+ gpio_control_in_1a\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[2\]/INP_DIS
+ gpio_control_in_1a\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[2\]/OUT
+ gpio_control_in_1a\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[2\]/OE_N
+ gpio_control_in_1a\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/SLOW
+ gpio_control_in_1a\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_1a\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_1a\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_1a\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[0]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[1]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[2]
+ gpio_control_in_1a\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[3\]/HLD_OVR
+ gpio_control_in_1a\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[3\]/INP_DIS
+ gpio_control_in_1a\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[3\]/OUT
+ gpio_control_in_1a\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[3\]/OE_N
+ gpio_control_in_1a\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/SLOW
+ gpio_control_in_1a\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_1a\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_1a\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_1a\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[0]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[1]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[2]
+ gpio_control_in_1a\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[4\]/HLD_OVR
+ gpio_control_in_1a\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[4\]/INP_DIS
+ gpio_control_in_1a\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[4\]/OUT
+ gpio_control_in_1a\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[4\]/OE_N
+ gpio_control_in_1a\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/SLOW
+ gpio_control_in_1a\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_1a\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_1a\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_1a\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[0]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[1]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[2]
+ gpio_control_in_1a\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[5\]/HLD_OVR
+ gpio_control_in_1a\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[5\]/INP_DIS
+ gpio_control_in_1a\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[5\]/OUT
+ gpio_control_in_1a\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[5\]/OE_N
+ gpio_control_in_1a\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/SLOW
+ gpio_control_in_1a\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_1a\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_1a\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_1a\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[0]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[1]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[2]
+ gpio_control_in_1a\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[6\]/HLD_OVR
+ gpio_control_in_1a\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[6\]/INP_DIS
+ gpio_control_in_1a\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[6\]/OUT
+ gpio_control_in_1a\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[6\]/OE_N
+ gpio_control_in_1a\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/SLOW
+ gpio_control_in_1a\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_1a\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_1a\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_1a\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[0]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[1]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[2]
+ gpio_control_in_1a\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[7\]/HLD_OVR
+ gpio_control_in_1a\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_1a\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[7\]/INP_DIS
+ gpio_control_in_1a\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[7\]/OUT
+ gpio_control_in_1a\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[7\]/OE_N
+ gpio_control_in_1a\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/SLOW
+ gpio_control_in_1a\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_1a\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[0\]/A
+ gpio_control_in_1a\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_1a\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_1a\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_in_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[0]
+ gpio_control_in_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[1]
+ gpio_control_in_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[2]
+ gpio_control_in_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[0\]/HLD_OVR
+ gpio_control_in_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_in_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[0\]/INP_DIS
+ gpio_control_in_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[0\]/OUT
+ gpio_control_in_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[0\]/OE_N
+ gpio_control_in_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/SLOW
+ gpio_control_in_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/VTRIP_SEL
+ gpio_control_in_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[23\]/A
+ gpio_control_in_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_EN
+ gpio_control_in_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_POL
+ gpio_control_in_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_SEL
+ gpio_control_in_2\[10\]/one
+  padframe/mprj_pads.area2_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_2\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[0]
+ gpio_control_in_2\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[1]
+ gpio_control_in_2\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[2]
+ gpio_control_in_2\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[10\]/HLD_OVR
+ gpio_control_in_2\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_2\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[10\]/INP_DIS
+ gpio_control_in_2\[10\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[10\]/OUT
+ gpio_control_in_2\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[10\]/OE_N
+ gpio_control_in_2\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/SLOW
+ gpio_control_in_2\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_2\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[71\]/A
+ gpio_control_in_2\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_2\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_2\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_2\[11\]/one
+  padframe/mprj_pads.area2_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_2\[11\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[0]
+ gpio_control_in_2\[11\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[1]
+ gpio_control_in_2\[11\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[2]
+ gpio_control_in_2\[11\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[11\]/HLD_OVR
+ gpio_control_in_2\[11\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_2\[11\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[11\]/INP_DIS
+ gpio_control_in_2\[11\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[11\]/OUT
+ gpio_control_in_2\[11\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[11\]/OE_N
+ gpio_control_in_2\[11\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/SLOW
+ gpio_control_in_2\[11\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_2\[11\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[75\]/A
+ gpio_control_in_2\[11\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_2\[11\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_2\[11\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_2\[12\]/one
+  padframe/mprj_pads.area2_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_2\[12\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[0]
+ gpio_control_in_2\[12\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[1]
+ gpio_control_in_2\[12\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[2]
+ gpio_control_in_2\[12\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[12\]/HLD_OVR
+ gpio_control_in_2\[12\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_2\[12\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[12\]/INP_DIS
+ gpio_control_in_2\[12\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[12\]/OUT
+ gpio_control_in_2\[12\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[12\]/OE_N
+ gpio_control_in_2\[12\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/SLOW
+ gpio_control_in_2\[12\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_2\[12\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[78\]/A
+ gpio_control_in_2\[12\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_2\[12\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_2\[12\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_2\[13\]/one
+  padframe/mprj_pads.area2_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_2\[13\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[0]
+ gpio_control_in_2\[13\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[1]
+ gpio_control_in_2\[13\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[2]
+ gpio_control_in_2\[13\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[13\]/HLD_OVR
+ gpio_control_in_2\[13\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_2\[13\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[13\]/INP_DIS
+ gpio_control_in_2\[13\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[13\]/OUT
+ gpio_control_in_2\[13\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[13\]/OE_N
+ gpio_control_in_2\[13\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/SLOW
+ gpio_control_in_2\[13\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_2\[13\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[81\]/A
+ gpio_control_in_2\[13\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_2\[13\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_2\[13\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_2\[14\]/one
+  padframe/mprj_pads.area2_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_2\[14\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[0]
+ gpio_control_in_2\[14\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[1]
+ gpio_control_in_2\[14\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[2]
+ gpio_control_in_2\[14\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[14\]/HLD_OVR
+ gpio_control_in_2\[14\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_2\[14\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[14\]/INP_DIS
+ gpio_control_in_2\[14\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[14\]/OUT
+ gpio_control_in_2\[14\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[14\]/OE_N
+ gpio_control_in_2\[14\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/SLOW
+ gpio_control_in_2\[14\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_2\[14\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[84\]/A
+ gpio_control_in_2\[14\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_2\[14\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_2\[14\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_2\[15\]/one
+  padframe/mprj_pads.area2_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_2\[15\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[0]
+ gpio_control_in_2\[15\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[1]
+ gpio_control_in_2\[15\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[2]
+ gpio_control_in_2\[15\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[15\]/HLD_OVR
+ gpio_control_in_2\[15\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_2\[15\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[15\]/INP_DIS
+ gpio_control_in_2\[15\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[15\]/OUT
+ gpio_control_in_2\[15\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[15\]/OE_N
+ gpio_control_in_2\[15\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/SLOW
+ gpio_control_in_2\[15\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_2\[15\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[87\]/A
+ gpio_control_in_2\[15\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_2\[15\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_2\[15\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_in_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[0]
+ gpio_control_in_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[1]
+ gpio_control_in_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[2]
+ gpio_control_in_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[1\]/HLD_OVR
+ gpio_control_in_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_in_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[1\]/INP_DIS
+ gpio_control_in_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[1\]/OUT
+ gpio_control_in_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[1\]/OE_N
+ gpio_control_in_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/SLOW
+ gpio_control_in_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/VTRIP_SEL
+ gpio_control_in_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[29\]/A
+ gpio_control_in_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_EN
+ gpio_control_in_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_POL
+ gpio_control_in_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_SEL
+ gpio_control_in_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[0]
+ gpio_control_in_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[1]
+ gpio_control_in_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[2]
+ gpio_control_in_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[2\]/HLD_OVR
+ gpio_control_in_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[2\]/INP_DIS
+ gpio_control_in_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[2\]/OUT
+ gpio_control_in_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[2\]/OE_N
+ gpio_control_in_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/SLOW
+ gpio_control_in_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[35\]/A
+ gpio_control_in_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_2\[3\]/one
+  padframe/mprj_pads.area2_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_2\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[0]
+ gpio_control_in_2\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[1]
+ gpio_control_in_2\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[2]
+ gpio_control_in_2\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[3\]/HLD_OVR
+ gpio_control_in_2\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_2\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[3\]/INP_DIS
+ gpio_control_in_2\[3\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[3\]/OUT
+ gpio_control_in_2\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[3\]/OE_N
+ gpio_control_in_2\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/SLOW
+ gpio_control_in_2\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_2\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[41\]/A
+ gpio_control_in_2\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_2\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_2\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_2\[4\]/one
+  padframe/mprj_pads.area2_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_2\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[0]
+ gpio_control_in_2\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[1]
+ gpio_control_in_2\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[2]
+ gpio_control_in_2\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[4\]/HLD_OVR
+ gpio_control_in_2\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_2\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[4\]/INP_DIS
+ gpio_control_in_2\[4\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[4\]/OUT
+ gpio_control_in_2\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[4\]/OE_N
+ gpio_control_in_2\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/SLOW
+ gpio_control_in_2\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_2\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[46\]/A
+ gpio_control_in_2\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_2\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_2\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_2\[5\]/one
+  padframe/mprj_pads.area2_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_2\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[0]
+ gpio_control_in_2\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[1]
+ gpio_control_in_2\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[2]
+ gpio_control_in_2\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[5\]/HLD_OVR
+ gpio_control_in_2\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_2\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[5\]/INP_DIS
+ gpio_control_in_2\[5\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[5\]/OUT
+ gpio_control_in_2\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[5\]/OE_N
+ gpio_control_in_2\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/SLOW
+ gpio_control_in_2\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_2\[5\]/mgmt_gpio_in
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+ soc/gpio_inenb_pad
+  padframe/gpio_pad/INP_DIS
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+ soc/gpio_mode1_pad
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+  padframe/gpio_pad/OUT
+ soc/gpio_outenb_pad
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signoff/caravel/openlane-signoff/timing/min/s-clk-max.rpt

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signoff/caravel/openlane-signoff/timing/min/s-clk-min.rpt

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signoff/caravel/openlane-signoff/timing/min/s-hk_serial_clk-max.rpt

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signoff/caravel/openlane-signoff/timing/min/s-hk_serial_clk-min.rpt

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signoff/caravel/openlane-signoff/timing/min/s-hkspi_clk-max.rpt

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signoff/caravel/openlane-signoff/timing/min/s-max.rpt

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+size 12213378

signoff/caravel/openlane-signoff/timing/min/s-summary.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/s-summary.rpt b/signoff/caravel/openlane-signoff/timing/min/s-summary.rpt
new file mode 100644
index 0000000..0a2586a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/s-summary.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:9fd269fe00210a6825c5bb35df23a10d208245a9fab17aaa6bb1ec1b0c71ff2b
+size 3491741

signoff/caravel/openlane-signoff/timing/min/s-unannotated.log

diff --git a/signoff/caravel/openlane-signoff/timing/min/s-unannotated.log b/signoff/caravel/openlane-signoff/timing/min/s-unannotated.log
new file mode 100644
index 0000000..2939c48
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/s-unannotated.log
@@ -0,0 +1,4179 @@
+Found 2894 unannotated nets.
+ padframe/flash_clk
+ padframe/mprj_analog_io[26]
+ mprj_io[28]
+ vssa2
+ vssa1
+ vdda1
+ mprj_io[4]
+ mprj_io[5]
+ mprj_io[19]
+ vssa1_2
+ vdda2
+ mprj_io[2]
+ mprj_io[3]
+ mprj_io[14]
+ mprj_io[33]
+ mprj_io[34]
+ resetb
+ mprj_io[1]
+ mprj_io[8]
+ mprj_io[9]
+ mprj_io[6]
+ mprj_io[11]
+ mprj_io[13]
+ mprj_io[15]
+ mprj_io[17]
+ mprj_io[18]
+ mprj_io[20]
+ mprj_io[23]
+ mprj_io[16]
+ mprj_io[27]
+ mprj_io[29]
+ mprj_io[32]
+ vssd2
+ vccd1
+ clock
+ gpio
+ vssd
+ vdda
+ mprj_io[37]
+ vccd
+ vssa
+ vssio
+ mprj_io[30]
+ vssd1
+ vssio_2
+ vddio
+ mprj_io[36]
+ vddio_2
+ mprj_io[31]
+ vccd2
+ vdda1_2
+ mprj_io[21]
+ mprj_io[26]
+ mprj_io[35]
+ mprj_io[0]
+ mprj_io[22]
+ mprj_io[24]
+ mprj_io[25]
+ mprj_io[7]
+ mprj_io[12]
+ mprj_io[10]
+ gpio_control_bidir_2\[2\]/_053_
+ gpio_control_bidir_2\[2\]/_052_
+ gpio_control_bidir_2\[2\]/_051_
+ gpio_control_bidir_2\[2\]/_050_
+ gpio_control_bidir_2\[2\]/_049_
+ gpio_control_bidir_2\[2\]/_048_
+ gpio_control_bidir_2\[2\]/_047_
+ gpio_control_bidir_2\[2\]/_046_
+ gpio_control_bidir_2\[2\]/_057_
+ gpio_control_bidir_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[7\]/_052_
+ gpio_control_in_1\[7\]/_056_
+ gpio_control_in_1\[7\]/_055_
+ gpio_control_in_1\[7\]/_054_
+ gpio_control_in_1\[7\]/_053_
+ gpio_control_in_1\[7\]/_051_
+ gpio_control_in_1\[7\]/_050_
+ gpio_control_in_1\[7\]/_049_
+ gpio_control_in_1\[7\]/_048_
+ gpio_control_in_1\[7\]/_047_
+ gpio_control_in_1\[7\]/_046_
+ gpio_control_in_1\[7\]/_057_
+ gpio_control_in_1\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_047_
+ gpio_control_in_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_049_
+ gpio_control_in_2\[0\]/_048_
+ gpio_control_in_2\[0\]/_046_
+ gpio_control_in_2\[0\]/_057_
+ gpio_control_in_2\[3\]/_047_
+ gpio_control_in_2\[3\]/_052_
+ gpio_control_in_2\[3\]/_051_
+ gpio_control_in_2\[3\]/_050_
+ gpio_control_in_2\[3\]/_049_
+ gpio_control_in_2\[3\]/_048_
+ gpio_control_in_2\[3\]/_046_
+ gpio_control_in_2\[3\]/_057_
+ gpio_control_in_2\[3\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_20/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[2\]
+ gpio_defaults_block_21/gpio_defaults_low\[6\]
+ gpio_defaults_block_21/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[3\]
+ gpio_defaults_block_20/gpio_defaults_high\[11\]
+ gpio_defaults_block_20/gpio_defaults_low\[11\]
+ gpio_defaults_block_20/gpio_defaults_high\[12\]
+ gpio_defaults_block_20/gpio_defaults_low\[12\]
+ gpio_defaults_block_20/gpio_defaults_high\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[2\]
+ gpio_defaults_block_20/gpio_defaults_low\[2\]
+ gpio_defaults_block_20/gpio_defaults_high\[4\]
+ gpio_defaults_block_20/gpio_defaults_low\[4\]
+ gpio_defaults_block_20/gpio_defaults_high\[5\]
+ gpio_defaults_block_20/gpio_defaults_low\[5\]
+ gpio_defaults_block_20/gpio_defaults_high\[6\]
+ gpio_defaults_block_20/gpio_defaults_low\[6\]
+ gpio_defaults_block_20/gpio_defaults_high\[7\]
+ gpio_defaults_block_20/gpio_defaults_low\[7\]
+ gpio_defaults_block_20/gpio_defaults_high\[8\]
+ gpio_defaults_block_20/gpio_defaults_low\[8\]
+ gpio_defaults_block_20/gpio_defaults_high\[9\]
+ gpio_defaults_block_20/gpio_defaults_low\[9\]
+ gpio_defaults_block_21/gpio_defaults_high\[0\]
+ gpio_defaults_block_21/gpio_defaults_low\[0\]
+ gpio_defaults_block_21/gpio_defaults_high\[10\]
+ gpio_defaults_block_21/gpio_defaults_low\[10\]
+ gpio_defaults_block_21/gpio_defaults_high\[11\]
+ gpio_defaults_block_21/gpio_defaults_low\[11\]
+ gpio_defaults_block_21/gpio_defaults_high\[12\]
+ gpio_defaults_block_21/gpio_defaults_low\[12\]
+ gpio_defaults_block_21/gpio_defaults_high\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[2\]
+ gpio_defaults_block_21/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_low\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[4\]
+ gpio_defaults_block_21/gpio_defaults_low\[4\]
+ gpio_defaults_block_21/gpio_defaults_high\[5\]
+ gpio_defaults_block_21/gpio_defaults_low\[5\]
+ gpio_defaults_block_21/gpio_defaults_high\[6\]
+ gpio_defaults_block_21/gpio_defaults_high\[7\]
+ gpio_defaults_block_21/gpio_defaults_high\[8\]
+ gpio_defaults_block_21/gpio_defaults_low\[8\]
+ gpio_defaults_block_21/gpio_defaults_high\[9\]
+ gpio_defaults_block_21/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[2\]
+ gpio_defaults_block_19/gpio_defaults_high\[3\]
+ gpio_defaults_block_19/gpio_defaults_low\[3\]
+ gpio_defaults_block_19/gpio_defaults_high\[4\]
+ gpio_defaults_block_19/gpio_defaults_low\[4\]
+ gpio_defaults_block_19/gpio_defaults_high\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[6\]
+ gpio_defaults_block_19/gpio_defaults_high\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[8\]
+ gpio_defaults_block_19/gpio_defaults_low\[8\]
+ gpio_defaults_block_19/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[9\]
+ gpio_defaults_block_2/gpio_defaults_high\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[10\]
+ gpio_defaults_block_2/gpio_defaults_low\[10\]
+ gpio_defaults_block_2/gpio_defaults_high\[11\]
+ gpio_defaults_block_2/gpio_defaults_low\[11\]
+ gpio_defaults_block_2/gpio_defaults_high\[12\]
+ gpio_defaults_block_2/gpio_defaults_low\[12\]
+ gpio_defaults_block_2/gpio_defaults_high\[1\]
+ gpio_defaults_block_2/gpio_defaults_high\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_high\[4\]
+ gpio_defaults_block_2/gpio_defaults_low\[4\]
+ gpio_defaults_block_2/gpio_defaults_high\[5\]
+ gpio_defaults_block_2/gpio_defaults_low\[5\]
+ gpio_defaults_block_2/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[7\]
+ gpio_defaults_block_2/gpio_defaults_low\[7\]
+ gpio_defaults_block_2/gpio_defaults_high\[8\]
+ gpio_defaults_block_2/gpio_defaults_low\[8\]
+ gpio_defaults_block_2/gpio_defaults_high\[9\]
+ gpio_defaults_block_2/gpio_defaults_low\[9\]
+ gpio_defaults_block_20/gpio_defaults_high\[0\]
+ gpio_defaults_block_20/gpio_defaults_low\[0\]
+ gpio_defaults_block_20/gpio_defaults_high\[10\]
+ gpio_defaults_block_20/gpio_defaults_low\[10\]
+ padframe/mprj_analog_io[7]
+ padframe/flash_io0
+ padframe/flash_io0_di_core
+ gpio_control_bidir_1\[0\]/_056_
+ gpio_control_bidir_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_1\[0\]/_051_
+ gpio_control_bidir_1\[0\]/_055_
+ gpio_control_bidir_1\[0\]/_054_
+ gpio_control_bidir_1\[0\]/_053_
+ gpio_control_bidir_1\[0\]/_052_
+ gpio_control_bidir_1\[0\]/_050_
+ gpio_control_bidir_1\[0\]/_049_
+ gpio_control_bidir_1\[0\]/_048_
+ gpio_control_bidir_1\[0\]/_047_
+ gpio_control_bidir_1\[0\]/_046_
+ gpio_control_bidir_1\[0\]/_057_
+ gpio_control_bidir_1\[1\]/_051_
+ gpio_control_bidir_1\[1\]/_057_
+ gpio_control_bidir_1\[1\]/_056_
+ gpio_control_bidir_1\[1\]/_055_
+ gpio_control_bidir_1\[1\]/_054_
+ gpio_control_bidir_1\[1\]/_053_
+ gpio_control_bidir_1\[1\]/_052_
+ gpio_control_bidir_1\[1\]/_050_
+ gpio_control_bidir_1\[1\]/_049_
+ gpio_control_bidir_1\[1\]/_048_
+ gpio_control_bidir_1\[1\]/_047_
+ gpio_control_bidir_1\[1\]/_046_
+ gpio_control_bidir_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_047_
+ gpio_control_bidir_2\[0\]/_049_
+ gpio_control_bidir_2\[0\]/_056_
+ gpio_control_bidir_2\[0\]/_051_
+ gpio_control_bidir_2\[0\]/_050_
+ gpio_control_bidir_2\[0\]/_048_
+ gpio_control_bidir_2\[0\]/_046_
+ gpio_control_bidir_2\[0\]/_057_
+ gpio_control_bidir_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_055_
+ gpio_control_bidir_2\[0\]/_054_
+ gpio_control_bidir_2\[0\]/_053_
+ gpio_control_bidir_2\[0\]/_052_
+ gpio_control_bidir_2\[1\]/_050_
+ gpio_control_bidir_2\[1\]/_056_
+ gpio_control_bidir_2\[1\]/_055_
+ gpio_control_bidir_2\[1\]/_054_
+ gpio_control_bidir_2\[1\]/_053_
+ gpio_control_bidir_2\[1\]/_052_
+ gpio_control_bidir_2\[1\]/_051_
+ gpio_control_bidir_2\[1\]/_049_
+ gpio_control_bidir_2\[1\]/_048_
+ gpio_control_bidir_2\[1\]/_047_
+ gpio_control_bidir_2\[1\]/_046_
+ gpio_control_bidir_2\[1\]/_057_
+ gpio_control_bidir_2\[2\]/_056_
+ gpio_control_bidir_2\[2\]/_055_
+ gpio_control_bidir_2\[2\]/_054_
+ gpio_control_bidir_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[0\]/_055_
+ gpio_control_in_1\[0\]/_056_
+ gpio_control_in_1\[0\]/_054_
+ gpio_control_in_1\[0\]/_053_
+ gpio_control_in_1\[0\]/_052_
+ gpio_control_in_1\[0\]/_051_
+ gpio_control_in_1\[0\]/_050_
+ gpio_control_in_1\[0\]/_049_
+ gpio_control_in_1\[0\]/_048_
+ gpio_control_in_1\[0\]/_047_
+ gpio_control_in_1\[0\]/_046_
+ gpio_control_in_1\[0\]/_057_
+ gpio_control_in_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[10\]/_057_
+ gpio_control_in_1\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[10\]/_047_
+ gpio_control_in_1\[10\]/_046_
+ gpio_control_in_1\[10\]/_056_
+ gpio_control_in_1\[10\]/_055_
+ gpio_control_in_1\[10\]/_054_
+ gpio_control_in_1\[10\]/_053_
+ gpio_control_in_1\[10\]/_052_
+ gpio_control_in_1\[10\]/_051_
+ gpio_control_in_1\[10\]/_050_
+ gpio_control_in_1\[10\]/_049_
+ gpio_control_in_1\[10\]/_048_
+ gpio_control_in_1\[1\]/_056_
+ gpio_control_in_1\[1\]/_055_
+ gpio_control_in_1\[1\]/_054_
+ gpio_control_in_1\[1\]/_053_
+ gpio_control_in_1\[1\]/_052_
+ gpio_control_in_1\[1\]/_051_
+ gpio_control_in_1\[1\]/_050_
+ gpio_control_in_1\[1\]/_049_
+ gpio_control_in_1\[1\]/_048_
+ gpio_control_in_1\[1\]/_047_
+ gpio_control_in_1\[1\]/_046_
+ gpio_control_in_1\[1\]/_057_
+ gpio_control_in_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[2\]/_056_
+ gpio_control_in_1\[2\]/_055_
+ gpio_control_in_1\[2\]/_054_
+ gpio_control_in_1\[2\]/_053_
+ gpio_control_in_1\[2\]/_052_
+ gpio_control_in_1\[2\]/_051_
+ gpio_control_in_1\[2\]/_050_
+ gpio_control_in_1\[2\]/_049_
+ gpio_control_in_1\[2\]/_048_
+ gpio_control_in_1\[2\]/_047_
+ gpio_control_in_1\[2\]/_046_
+ gpio_control_in_1\[2\]/_057_
+ gpio_control_in_1\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[3\]/_052_
+ gpio_control_in_1\[3\]/_047_
+ gpio_control_in_1\[3\]/_056_
+ gpio_control_in_1\[3\]/_055_
+ gpio_control_in_1\[3\]/_054_
+ gpio_control_in_1\[3\]/_053_
+ gpio_control_in_1\[3\]/_051_
+ gpio_control_in_1\[3\]/_050_
+ gpio_control_in_1\[3\]/_049_
+ gpio_control_in_1\[3\]/_048_
+ gpio_control_in_1\[3\]/_046_
+ gpio_control_in_1\[3\]/_057_
+ gpio_control_in_1\[3\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[4\]/_056_
+ gpio_control_in_1\[4\]/_055_
+ gpio_control_in_1\[4\]/_054_
+ gpio_control_in_1\[4\]/_053_
+ gpio_control_in_1\[4\]/_052_
+ gpio_control_in_1\[4\]/_051_
+ gpio_control_in_1\[4\]/_050_
+ gpio_control_in_1\[4\]/_049_
+ gpio_control_in_1\[4\]/_048_
+ gpio_control_in_1\[4\]/_047_
+ gpio_control_in_1\[4\]/_046_
+ gpio_control_in_1\[4\]/_057_
+ gpio_control_in_1\[5\]/_054_
+ gpio_control_in_1\[5\]/_049_
+ gpio_control_in_1\[5\]/_056_
+ gpio_control_in_1\[5\]/_055_
+ gpio_control_in_1\[5\]/_053_
+ gpio_control_in_1\[5\]/_052_
+ gpio_control_in_1\[5\]/_051_
+ gpio_control_in_1\[5\]/_050_
+ gpio_control_in_1\[5\]/_048_
+ gpio_control_in_1\[5\]/_047_
+ gpio_control_in_1\[5\]/_046_
+ gpio_control_in_1\[5\]/_057_
+ gpio_control_in_1\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[6\]/_056_
+ gpio_control_in_1\[6\]/_055_
+ gpio_control_in_1\[6\]/_054_
+ gpio_control_in_1\[6\]/_053_
+ gpio_control_in_1\[6\]/_052_
+ gpio_control_in_1\[6\]/_051_
+ gpio_control_in_1\[6\]/_050_
+ gpio_control_in_1\[6\]/_049_
+ gpio_control_in_1\[6\]/_048_
+ gpio_control_in_1\[6\]/_047_
+ gpio_control_in_1\[6\]/_046_
+ gpio_control_in_1\[6\]/_057_
+ gpio_control_in_1\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[8\]/_050_
+ gpio_control_in_1\[8\]/_055_
+ gpio_control_in_1\[8\]/_054_
+ gpio_control_in_1\[8\]/_056_
+ gpio_control_in_1\[8\]/_053_
+ gpio_control_in_1\[8\]/_052_
+ gpio_control_in_1\[8\]/_051_
+ gpio_control_in_1\[8\]/_049_
+ gpio_control_in_1\[8\]/_048_
+ gpio_control_in_1\[8\]/_047_
+ gpio_control_in_1\[8\]/_046_
+ gpio_control_in_1\[8\]/_057_
+ gpio_control_in_1\[8\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[9\]/_056_
+ gpio_control_in_1\[9\]/_046_
+ gpio_control_in_1\[9\]/_057_
+ gpio_control_in_1\[9\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[9\]/_055_
+ gpio_control_in_1\[9\]/_054_
+ gpio_control_in_1\[9\]/_053_
+ gpio_control_in_1\[9\]/_052_
+ gpio_control_in_1\[9\]/_051_
+ gpio_control_in_1\[9\]/_050_
+ gpio_control_in_1\[9\]/_049_
+ gpio_control_in_1\[9\]/_048_
+ gpio_control_in_1\[9\]/_047_
+ gpio_control_in_1a\[0\]/_049_
+ gpio_control_in_1a\[0\]/_056_
+ gpio_control_in_1a\[0\]/_055_
+ gpio_control_in_1a\[0\]/_054_
+ gpio_control_in_1a\[0\]/_053_
+ gpio_control_in_1a\[0\]/_052_
+ gpio_control_in_1a\[0\]/_051_
+ gpio_control_in_1a\[0\]/_050_
+ gpio_control_in_1a\[0\]/_048_
+ gpio_control_in_1a\[0\]/_047_
+ gpio_control_in_1a\[0\]/_046_
+ gpio_control_in_1a\[0\]/_057_
+ gpio_control_in_1a\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[1\]/_047_
+ gpio_control_in_1a\[1\]/_056_
+ gpio_control_in_1a\[1\]/_055_
+ gpio_control_in_1a\[1\]/_054_
+ gpio_control_in_1a\[1\]/_053_
+ gpio_control_in_1a\[1\]/_052_
+ gpio_control_in_1a\[1\]/_051_
+ gpio_control_in_1a\[1\]/_050_
+ gpio_control_in_1a\[1\]/_049_
+ gpio_control_in_1a\[1\]/_048_
+ gpio_control_in_1a\[1\]/_046_
+ gpio_control_in_1a\[1\]/_057_
+ gpio_control_in_1a\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[2\]/_055_
+ gpio_control_in_1a\[2\]/_049_
+ gpio_control_in_1a\[2\]/_056_
+ gpio_control_in_1a\[2\]/_054_
+ gpio_control_in_1a\[2\]/_053_
+ gpio_control_in_1a\[2\]/_052_
+ gpio_control_in_1a\[2\]/_051_
+ gpio_control_in_1a\[2\]/_050_
+ gpio_control_in_1a\[2\]/_048_
+ gpio_control_in_1a\[2\]/_047_
+ gpio_control_in_1a\[2\]/_046_
+ gpio_control_in_1a\[2\]/_057_
+ gpio_control_in_1a\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/_056_
+ gpio_control_in_1a\[3\]/_055_
+ gpio_control_in_1a\[3\]/_054_
+ gpio_control_in_1a\[3\]/_053_
+ gpio_control_in_1a\[3\]/_052_
+ gpio_control_in_1a\[3\]/_051_
+ gpio_control_in_1a\[3\]/_050_
+ gpio_control_in_1a\[3\]/_049_
+ gpio_control_in_1a\[3\]/_048_
+ gpio_control_in_1a\[3\]/_047_
+ gpio_control_in_1a\[3\]/_046_
+ gpio_control_in_1a\[3\]/_057_
+ gpio_control_in_1a\[4\]/_047_
+ gpio_control_in_1a\[4\]/_049_
+ gpio_control_in_1a\[4\]/_056_
+ gpio_control_in_1a\[4\]/_051_
+ gpio_control_in_1a\[4\]/_050_
+ gpio_control_in_1a\[4\]/_048_
+ gpio_control_in_1a\[4\]/_046_
+ gpio_control_in_1a\[4\]/_057_
+ gpio_control_in_1a\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[4\]/_055_
+ gpio_control_in_1a\[4\]/_054_
+ gpio_control_in_1a\[4\]/_053_
+ gpio_control_in_1a\[4\]/_052_
+ gpio_control_in_1a\[5\]/_047_
+ gpio_control_in_1a\[5\]/_056_
+ gpio_control_in_1a\[5\]/_055_
+ gpio_control_in_1a\[5\]/_054_
+ gpio_control_in_1a\[5\]/_053_
+ gpio_control_in_1a\[5\]/_052_
+ gpio_control_in_1a\[5\]/_051_
+ gpio_control_in_1a\[5\]/_050_
+ gpio_control_in_1a\[5\]/_049_
+ gpio_control_in_1a\[5\]/_048_
+ gpio_control_in_1a\[5\]/_046_
+ gpio_control_in_1a\[5\]/_057_
+ gpio_control_in_1a\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_056_
+ gpio_control_in_2\[0\]/_055_
+ gpio_control_in_2\[0\]/_054_
+ gpio_control_in_2\[0\]/_053_
+ gpio_control_in_2\[0\]/_052_
+ gpio_control_in_2\[0\]/_051_
+ gpio_control_in_2\[0\]/_050_
+ gpio_control_in_2\[10\]/_047_
+ gpio_control_in_2\[10\]/_052_
+ gpio_control_in_2\[10\]/_051_
+ gpio_control_in_2\[10\]/_046_
+ gpio_control_in_2\[10\]/_056_
+ gpio_control_in_2\[10\]/_055_
+ gpio_control_in_2\[10\]/_054_
+ gpio_control_in_2\[10\]/_053_
+ gpio_control_in_2\[10\]/_050_
+ gpio_control_in_2\[10\]/_049_
+ gpio_control_in_2\[10\]/_048_
+ gpio_control_in_2\[10\]/_057_
+ gpio_control_in_2\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_056_
+ gpio_control_in_2\[11\]/_057_
+ gpio_control_in_2\[11\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_055_
+ gpio_control_in_2\[11\]/_054_
+ gpio_control_in_2\[11\]/_053_
+ gpio_control_in_2\[11\]/_052_
+ gpio_control_in_2\[11\]/_051_
+ gpio_control_in_2\[11\]/_050_
+ gpio_control_in_2\[11\]/_049_
+ gpio_control_in_2\[11\]/_048_
+ gpio_control_in_2\[11\]/_047_
+ gpio_control_in_2\[11\]/_046_
+ gpio_control_in_2\[12\]/_056_
+ gpio_control_in_2\[12\]/_055_
+ gpio_control_in_2\[12\]/_054_
+ gpio_control_in_2\[12\]/_053_
+ gpio_control_in_2\[12\]/_052_
+ gpio_control_in_2\[12\]/_051_
+ gpio_control_in_2\[12\]/_050_
+ gpio_control_in_2\[12\]/_049_
+ gpio_control_in_2\[12\]/_048_
+ gpio_control_in_2\[12\]/_047_
+ gpio_control_in_2\[12\]/_046_
+ gpio_control_in_2\[12\]/_057_
+ gpio_control_in_2\[12\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[13\]/_056_
+ gpio_control_in_2\[13\]/_055_
+ gpio_control_in_2\[13\]/_054_
+ gpio_control_in_2\[13\]/_053_
+ gpio_control_in_2\[13\]/_052_
+ gpio_control_in_2\[13\]/_051_
+ gpio_control_in_2\[13\]/_050_
+ gpio_control_in_2\[13\]/_049_
+ gpio_control_in_2\[13\]/_048_
+ gpio_control_in_2\[13\]/_047_
+ gpio_control_in_2\[13\]/_046_
+ gpio_control_in_2\[13\]/_057_
+ gpio_control_in_2\[13\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[14\]/_056_
+ gpio_control_in_2\[14\]/_055_
+ gpio_control_in_2\[14\]/_054_
+ gpio_control_in_2\[14\]/_053_
+ gpio_control_in_2\[14\]/_052_
+ gpio_control_in_2\[14\]/_051_
+ gpio_control_in_2\[14\]/_050_
+ gpio_control_in_2\[14\]/_049_
+ gpio_control_in_2\[14\]/_048_
+ gpio_control_in_2\[14\]/_047_
+ gpio_control_in_2\[14\]/_046_
+ gpio_control_in_2\[14\]/_057_
+ gpio_control_in_2\[14\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/_056_
+ gpio_control_in_2\[15\]/_055_
+ gpio_control_in_2\[15\]/_054_
+ gpio_control_in_2\[15\]/_053_
+ gpio_control_in_2\[15\]/_052_
+ gpio_control_in_2\[15\]/_051_
+ gpio_control_in_2\[15\]/_050_
+ gpio_control_in_2\[15\]/_049_
+ gpio_control_in_2\[15\]/_048_
+ gpio_control_in_2\[15\]/_047_
+ gpio_control_in_2\[15\]/_046_
+ gpio_control_in_2\[15\]/_057_
+ gpio_control_in_2\[1\]/_049_
+ gpio_control_in_2\[1\]/_053_
+ gpio_control_in_2\[1\]/_052_
+ gpio_control_in_2\[1\]/_051_
+ gpio_control_in_2\[1\]/_050_
+ gpio_control_in_2\[1\]/_048_
+ gpio_control_in_2\[1\]/_047_
+ gpio_control_in_2\[1\]/_046_
+ gpio_control_in_2\[1\]/_057_
+ gpio_control_in_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[1\]/_056_
+ gpio_control_in_2\[1\]/_055_
+ gpio_control_in_2\[1\]/_054_
+ gpio_control_in_2\[2\]/_056_
+ gpio_control_in_2\[2\]/_051_
+ gpio_control_in_2\[2\]/_046_
+ gpio_control_in_2\[2\]/_055_
+ gpio_control_in_2\[2\]/_054_
+ gpio_control_in_2\[2\]/_053_
+ gpio_control_in_2\[2\]/_052_
+ gpio_control_in_2\[2\]/_050_
+ gpio_control_in_2\[2\]/_049_
+ gpio_control_in_2\[2\]/_048_
+ gpio_control_in_2\[2\]/_047_
+ gpio_control_in_2\[2\]/_057_
+ gpio_control_in_2\[3\]/_055_
+ gpio_control_in_2\[3\]/_056_
+ gpio_control_in_2\[3\]/_054_
+ gpio_control_in_2\[3\]/_053_
+ gpio_control_in_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[4\]/_049_
+ gpio_control_in_2\[4\]/_056_
+ gpio_control_in_2\[4\]/_055_
+ gpio_control_in_2\[4\]/_054_
+ gpio_control_in_2\[4\]/_053_
+ gpio_control_in_2\[4\]/_052_
+ gpio_control_in_2\[4\]/_051_
+ gpio_control_in_2\[4\]/_050_
+ gpio_control_in_2\[4\]/_048_
+ gpio_control_in_2\[4\]/_047_
+ gpio_control_in_2\[4\]/_046_
+ gpio_control_in_2\[4\]/_057_
+ gpio_control_in_2\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_057_
+ gpio_control_in_2\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_047_
+ gpio_control_in_2\[5\]/_046_
+ gpio_control_in_2\[5\]/_056_
+ gpio_control_in_2\[5\]/_055_
+ gpio_control_in_2\[5\]/_054_
+ gpio_control_in_2\[5\]/_053_
+ gpio_control_in_2\[5\]/_052_
+ gpio_control_in_2\[5\]/_051_
+ gpio_control_in_2\[5\]/_050_
+ gpio_control_in_2\[5\]/_049_
+ gpio_control_in_2\[5\]/_048_
+ gpio_control_in_2\[6\]/_056_
+ gpio_control_in_2\[6\]/_055_
+ gpio_control_in_2\[6\]/_054_
+ gpio_control_in_2\[6\]/_053_
+ gpio_control_in_2\[6\]/_052_
+ gpio_control_in_2\[6\]/_051_
+ gpio_control_in_2\[6\]/_050_
+ gpio_control_in_2\[6\]/_049_
+ gpio_control_in_2\[6\]/_048_
+ gpio_control_in_2\[6\]/_047_
+ gpio_control_in_2\[6\]/_046_
+ gpio_control_in_2\[6\]/_057_
+ gpio_control_in_2\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[7\]/_054_
+ gpio_control_in_2\[7\]/_056_
+ gpio_control_in_2\[7\]/_055_
+ gpio_control_in_2\[7\]/_053_
+ gpio_control_in_2\[7\]/_052_
+ gpio_control_in_2\[7\]/_051_
+ gpio_control_in_2\[7\]/_050_
+ gpio_control_in_2\[7\]/_049_
+ gpio_control_in_2\[7\]/_048_
+ gpio_control_in_2\[7\]/_047_
+ gpio_control_in_2\[7\]/_046_
+ gpio_control_in_2\[7\]/_057_
+ gpio_control_in_2\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[8\]/_052_
+ gpio_control_in_2\[8\]/_047_
+ gpio_control_in_2\[8\]/_056_
+ gpio_control_in_2\[8\]/_055_
+ gpio_control_in_2\[8\]/_054_
+ gpio_control_in_2\[8\]/_053_
+ gpio_control_in_2\[8\]/_051_
+ gpio_control_in_2\[8\]/_050_
+ gpio_control_in_2\[8\]/_049_
+ gpio_control_in_2\[8\]/_048_
+ gpio_control_in_2\[8\]/_046_
+ gpio_control_in_2\[8\]/_057_
+ gpio_control_in_2\[8\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[4\]
+ gpio_defaults_block_0/gpio_defaults_low\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[9\]
+ gpio_control_in_2\[9\]/_051_
+ gpio_control_in_2\[9\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[0\]
+ gpio_defaults_block_0/gpio_defaults_low\[0\]
+ gpio_defaults_block_0/gpio_defaults_high\[10\]
+ gpio_defaults_block_0/gpio_defaults_low\[10\]
+ gpio_defaults_block_0/gpio_defaults_high\[11\]
+ gpio_defaults_block_0/gpio_defaults_low\[11\]
+ gpio_defaults_block_0/gpio_defaults_high\[12\]
+ gpio_defaults_block_0/gpio_defaults_low\[12\]
+ gpio_defaults_block_0/gpio_defaults_high\[1\]
+ gpio_defaults_block_0/gpio_defaults_low\[1\]
+ gpio_defaults_block_0/gpio_defaults_high\[2\]
+ gpio_defaults_block_0/gpio_defaults_low\[2\]
+ gpio_defaults_block_0/gpio_defaults_high\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[4\]
+ gpio_defaults_block_0/gpio_defaults_high\[5\]
+ gpio_defaults_block_0/gpio_defaults_low\[5\]
+ gpio_defaults_block_0/gpio_defaults_high\[6\]
+ gpio_defaults_block_0/gpio_defaults_low\[6\]
+ gpio_defaults_block_0/gpio_defaults_high\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[9\]
+ gpio_control_in_2\[9\]/_056_
+ gpio_control_in_2\[9\]/_055_
+ gpio_control_in_2\[9\]/_054_
+ gpio_control_in_2\[9\]/_053_
+ gpio_control_in_2\[9\]/_052_
+ gpio_control_in_2\[9\]/_050_
+ gpio_control_in_2\[9\]/_049_
+ gpio_control_in_2\[9\]/_048_
+ gpio_control_in_2\[9\]/_047_
+ gpio_control_in_2\[9\]/_046_
+ gpio_control_in_2\[9\]/_057_
+ gpio_defaults_block_11/gpio_defaults_low\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[0\]
+ gpio_defaults_block_11/gpio_defaults_low\[0\]
+ gpio_defaults_block_11/gpio_defaults_high\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[11\]
+ gpio_defaults_block_11/gpio_defaults_low\[11\]
+ gpio_defaults_block_11/gpio_defaults_high\[12\]
+ gpio_defaults_block_11/gpio_defaults_low\[12\]
+ gpio_defaults_block_11/gpio_defaults_high\[1\]
+ gpio_defaults_block_11/gpio_defaults_low\[1\]
+ gpio_defaults_block_11/gpio_defaults_high\[2\]
+ gpio_defaults_block_11/gpio_defaults_low\[2\]
+ gpio_defaults_block_11/gpio_defaults_high\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[9\]
+ gpio_defaults_block_11/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[0\]
+ gpio_defaults_block_12/gpio_defaults_low\[0\]
+ gpio_defaults_block_12/gpio_defaults_high\[10\]
+ gpio_defaults_block_12/gpio_defaults_low\[10\]
+ gpio_defaults_block_12/gpio_defaults_high\[11\]
+ gpio_defaults_block_12/gpio_defaults_low\[11\]
+ gpio_defaults_block_12/gpio_defaults_high\[12\]
+ gpio_defaults_block_12/gpio_defaults_low\[12\]
+ gpio_defaults_block_12/gpio_defaults_high\[1\]
+ gpio_defaults_block_12/gpio_defaults_low\[1\]
+ gpio_defaults_block_12/gpio_defaults_high\[2\]
+ gpio_defaults_block_12/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[0\]
+ gpio_defaults_block_1/gpio_defaults_low\[0\]
+ gpio_defaults_block_1/gpio_defaults_high\[10\]
+ gpio_defaults_block_1/gpio_defaults_low\[10\]
+ gpio_defaults_block_1/gpio_defaults_high\[11\]
+ gpio_defaults_block_1/gpio_defaults_low\[11\]
+ gpio_defaults_block_1/gpio_defaults_high\[12\]
+ gpio_defaults_block_1/gpio_defaults_low\[12\]
+ gpio_defaults_block_1/gpio_defaults_high\[1\]
+ gpio_defaults_block_1/gpio_defaults_low\[1\]
+ gpio_defaults_block_1/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[4\]
+ gpio_defaults_block_1/gpio_defaults_high\[5\]
+ gpio_defaults_block_1/gpio_defaults_low\[5\]
+ gpio_defaults_block_1/gpio_defaults_high\[6\]
+ gpio_defaults_block_1/gpio_defaults_low\[6\]
+ gpio_defaults_block_1/gpio_defaults_high\[7\]
+ gpio_defaults_block_1/gpio_defaults_low\[7\]
+ gpio_defaults_block_1/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_low\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[9\]
+ gpio_defaults_block_1/gpio_defaults_low\[9\]
+ gpio_defaults_block_10/gpio_defaults_high\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[11\]
+ gpio_defaults_block_10/gpio_defaults_low\[11\]
+ gpio_defaults_block_10/gpio_defaults_high\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[2\]
+ gpio_defaults_block_10/gpio_defaults_low\[2\]
+ gpio_defaults_block_10/gpio_defaults_high\[3\]
+ gpio_defaults_block_10/gpio_defaults_low\[3\]
+ gpio_defaults_block_10/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_low\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[5\]
+ gpio_defaults_block_10/gpio_defaults_low\[5\]
+ gpio_defaults_block_10/gpio_defaults_high\[6\]
+ gpio_defaults_block_10/gpio_defaults_low\[6\]
+ gpio_defaults_block_10/gpio_defaults_high\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[8\]
+ gpio_defaults_block_10/gpio_defaults_high\[9\]
+ gpio_defaults_block_10/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[10\]
+ gpio_defaults_block_15/gpio_defaults_low\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[7\]
+ gpio_defaults_block_15/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[11\]
+ gpio_defaults_block_13/gpio_defaults_low\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[10\]
+ gpio_defaults_block_14/gpio_defaults_low\[11\]
+ gpio_defaults_block_14/gpio_defaults_high\[12\]
+ gpio_defaults_block_14/gpio_defaults_low\[12\]
+ gpio_defaults_block_14/gpio_defaults_high\[1\]
+ gpio_defaults_block_14/gpio_defaults_low\[1\]
+ gpio_defaults_block_14/gpio_defaults_high\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[5\]
+ gpio_defaults_block_14/gpio_defaults_high\[6\]
+ gpio_defaults_block_14/gpio_defaults_low\[6\]
+ gpio_defaults_block_14/gpio_defaults_high\[7\]
+ gpio_defaults_block_14/gpio_defaults_low\[7\]
+ gpio_defaults_block_14/gpio_defaults_high\[8\]
+ gpio_defaults_block_14/gpio_defaults_low\[8\]
+ gpio_defaults_block_14/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_low\[9\]
+ gpio_defaults_block_15/gpio_defaults_high\[0\]
+ gpio_defaults_block_15/gpio_defaults_low\[0\]
+ gpio_defaults_block_15/gpio_defaults_high\[10\]
+ gpio_defaults_block_15/gpio_defaults_high\[11\]
+ gpio_defaults_block_15/gpio_defaults_low\[11\]
+ gpio_defaults_block_15/gpio_defaults_high\[12\]
+ gpio_defaults_block_15/gpio_defaults_low\[12\]
+ gpio_defaults_block_15/gpio_defaults_high\[1\]
+ gpio_defaults_block_15/gpio_defaults_low\[1\]
+ gpio_defaults_block_15/gpio_defaults_high\[2\]
+ gpio_defaults_block_15/gpio_defaults_low\[2\]
+ gpio_defaults_block_15/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_high\[5\]
+ gpio_defaults_block_15/gpio_defaults_low\[5\]
+ gpio_defaults_block_15/gpio_defaults_high\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[7\]
+ gpio_defaults_block_15/gpio_defaults_high\[8\]
+ gpio_defaults_block_15/gpio_defaults_high\[9\]
+ gpio_defaults_block_15/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[3\]
+ gpio_defaults_block_12/gpio_defaults_low\[3\]
+ gpio_defaults_block_12/gpio_defaults_high\[4\]
+ gpio_defaults_block_12/gpio_defaults_low\[4\]
+ gpio_defaults_block_12/gpio_defaults_high\[5\]
+ gpio_defaults_block_12/gpio_defaults_low\[5\]
+ gpio_defaults_block_12/gpio_defaults_high\[6\]
+ gpio_defaults_block_12/gpio_defaults_low\[6\]
+ gpio_defaults_block_12/gpio_defaults_high\[7\]
+ gpio_defaults_block_12/gpio_defaults_high\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_low\[9\]
+ gpio_defaults_block_13/gpio_defaults_high\[0\]
+ gpio_defaults_block_13/gpio_defaults_low\[0\]
+ gpio_defaults_block_13/gpio_defaults_high\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[11\]
+ gpio_defaults_block_13/gpio_defaults_high\[12\]
+ gpio_defaults_block_13/gpio_defaults_low\[12\]
+ gpio_defaults_block_13/gpio_defaults_high\[1\]
+ gpio_defaults_block_13/gpio_defaults_low\[1\]
+ gpio_defaults_block_13/gpio_defaults_high\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[3\]
+ gpio_defaults_block_13/gpio_defaults_high\[4\]
+ gpio_defaults_block_13/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_low\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[6\]
+ gpio_defaults_block_13/gpio_defaults_low\[6\]
+ gpio_defaults_block_13/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[8\]
+ gpio_defaults_block_13/gpio_defaults_low\[8\]
+ gpio_defaults_block_13/gpio_defaults_high\[9\]
+ gpio_defaults_block_13/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[0\]
+ gpio_defaults_block_14/gpio_defaults_low\[0\]
+ gpio_defaults_block_14/gpio_defaults_high\[10\]
+ gpio_defaults_block_14/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[3\]
+ gpio_defaults_block_18/gpio_defaults_low\[5\]
+ gpio_defaults_block_18/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[0\]
+ gpio_defaults_block_16/gpio_defaults_low\[10\]
+ gpio_defaults_block_16/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[11\]
+ gpio_defaults_block_17/gpio_defaults_low\[12\]
+ gpio_defaults_block_17/gpio_defaults_low\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[0\]
+ gpio_defaults_block_18/gpio_defaults_low\[0\]
+ gpio_defaults_block_18/gpio_defaults_high\[10\]
+ gpio_defaults_block_18/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[11\]
+ gpio_defaults_block_18/gpio_defaults_high\[12\]
+ gpio_defaults_block_18/gpio_defaults_low\[12\]
+ gpio_defaults_block_18/gpio_defaults_high\[1\]
+ gpio_defaults_block_18/gpio_defaults_low\[1\]
+ gpio_defaults_block_18/gpio_defaults_high\[2\]
+ gpio_defaults_block_18/gpio_defaults_low\[2\]
+ gpio_defaults_block_18/gpio_defaults_high\[3\]
+ gpio_defaults_block_18/gpio_defaults_high\[4\]
+ gpio_defaults_block_18/gpio_defaults_low\[4\]
+ gpio_defaults_block_18/gpio_defaults_high\[5\]
+ gpio_defaults_block_18/gpio_defaults_high\[6\]
+ gpio_defaults_block_18/gpio_defaults_low\[6\]
+ gpio_defaults_block_18/gpio_defaults_high\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[8\]
+ gpio_defaults_block_18/gpio_defaults_low\[8\]
+ gpio_defaults_block_18/gpio_defaults_high\[9\]
+ gpio_defaults_block_18/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[0\]
+ gpio_defaults_block_19/gpio_defaults_low\[0\]
+ gpio_defaults_block_19/gpio_defaults_high\[10\]
+ gpio_defaults_block_19/gpio_defaults_low\[10\]
+ gpio_defaults_block_19/gpio_defaults_high\[11\]
+ gpio_defaults_block_19/gpio_defaults_high\[12\]
+ gpio_defaults_block_19/gpio_defaults_low\[12\]
+ gpio_defaults_block_19/gpio_defaults_high\[1\]
+ gpio_defaults_block_19/gpio_defaults_low\[1\]
+ gpio_defaults_block_19/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[0\]
+ gpio_defaults_block_16/gpio_defaults_high\[10\]
+ gpio_defaults_block_16/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_high\[12\]
+ gpio_defaults_block_16/gpio_defaults_low\[12\]
+ gpio_defaults_block_16/gpio_defaults_high\[1\]
+ gpio_defaults_block_16/gpio_defaults_low\[1\]
+ gpio_defaults_block_16/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_low\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[3\]
+ gpio_defaults_block_16/gpio_defaults_high\[4\]
+ gpio_defaults_block_16/gpio_defaults_low\[4\]
+ gpio_defaults_block_16/gpio_defaults_high\[5\]
+ gpio_defaults_block_16/gpio_defaults_low\[5\]
+ gpio_defaults_block_16/gpio_defaults_high\[6\]
+ gpio_defaults_block_16/gpio_defaults_low\[6\]
+ gpio_defaults_block_16/gpio_defaults_high\[7\]
+ gpio_defaults_block_16/gpio_defaults_low\[7\]
+ gpio_defaults_block_16/gpio_defaults_high\[8\]
+ gpio_defaults_block_16/gpio_defaults_low\[8\]
+ gpio_defaults_block_16/gpio_defaults_high\[9\]
+ gpio_defaults_block_16/gpio_defaults_low\[9\]
+ gpio_defaults_block_17/gpio_defaults_high\[0\]
+ gpio_defaults_block_17/gpio_defaults_low\[0\]
+ gpio_defaults_block_17/gpio_defaults_high\[10\]
+ gpio_defaults_block_17/gpio_defaults_low\[10\]
+ gpio_defaults_block_17/gpio_defaults_high\[11\]
+ gpio_defaults_block_17/gpio_defaults_high\[12\]
+ gpio_defaults_block_17/gpio_defaults_high\[1\]
+ gpio_defaults_block_17/gpio_defaults_low\[1\]
+ gpio_defaults_block_17/gpio_defaults_high\[2\]
+ gpio_defaults_block_17/gpio_defaults_low\[2\]
+ gpio_defaults_block_17/gpio_defaults_high\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_high\[4\]
+ gpio_defaults_block_17/gpio_defaults_low\[4\]
+ gpio_defaults_block_17/gpio_defaults_high\[5\]
+ gpio_defaults_block_17/gpio_defaults_low\[5\]
+ gpio_defaults_block_17/gpio_defaults_high\[6\]
+ gpio_defaults_block_17/gpio_defaults_low\[6\]
+ gpio_defaults_block_17/gpio_defaults_high\[7\]
+ gpio_defaults_block_17/gpio_defaults_high\[8\]
+ gpio_defaults_block_17/gpio_defaults_low\[8\]
+ gpio_defaults_block_17/gpio_defaults_high\[9\]
+ gpio_defaults_block_17/gpio_defaults_low\[9\]
+ gpio_defaults_block_24/gpio_defaults_high\[10\]
+ gpio_defaults_block_24/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[6\]
+ gpio_defaults_block_22/gpio_defaults_low\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[10\]
+ gpio_defaults_block_24/gpio_defaults_high\[11\]
+ gpio_defaults_block_24/gpio_defaults_low\[11\]
+ gpio_defaults_block_24/gpio_defaults_high\[12\]
+ gpio_defaults_block_24/gpio_defaults_low\[12\]
+ gpio_defaults_block_24/gpio_defaults_high\[1\]
+ gpio_defaults_block_24/gpio_defaults_low\[1\]
+ gpio_defaults_block_24/gpio_defaults_high\[2\]
+ gpio_defaults_block_24/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_low\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[4\]
+ gpio_defaults_block_24/gpio_defaults_low\[4\]
+ gpio_defaults_block_24/gpio_defaults_high\[5\]
+ gpio_defaults_block_24/gpio_defaults_low\[5\]
+ gpio_defaults_block_24/gpio_defaults_high\[6\]
+ gpio_defaults_block_24/gpio_defaults_low\[6\]
+ gpio_defaults_block_24/gpio_defaults_high\[7\]
+ gpio_defaults_block_24/gpio_defaults_low\[7\]
+ gpio_defaults_block_24/gpio_defaults_high\[8\]
+ gpio_defaults_block_24/gpio_defaults_low\[8\]
+ gpio_defaults_block_24/gpio_defaults_high\[9\]
+ gpio_defaults_block_24/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_high\[0\]
+ gpio_defaults_block_25/gpio_defaults_low\[0\]
+ gpio_defaults_block_25/gpio_defaults_high\[10\]
+ gpio_defaults_block_25/gpio_defaults_low\[10\]
+ gpio_defaults_block_25/gpio_defaults_high\[11\]
+ gpio_defaults_block_25/gpio_defaults_low\[11\]
+ gpio_defaults_block_25/gpio_defaults_high\[12\]
+ gpio_defaults_block_25/gpio_defaults_low\[12\]
+ gpio_defaults_block_25/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[0\]
+ gpio_defaults_block_22/gpio_defaults_low\[0\]
+ gpio_defaults_block_22/gpio_defaults_high\[10\]
+ gpio_defaults_block_22/gpio_defaults_low\[10\]
+ gpio_defaults_block_22/gpio_defaults_high\[11\]
+ gpio_defaults_block_22/gpio_defaults_low\[11\]
+ gpio_defaults_block_22/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_low\[12\]
+ gpio_defaults_block_22/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_low\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[2\]
+ gpio_defaults_block_22/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[3\]
+ gpio_defaults_block_22/gpio_defaults_low\[3\]
+ gpio_defaults_block_22/gpio_defaults_high\[4\]
+ gpio_defaults_block_22/gpio_defaults_low\[4\]
+ gpio_defaults_block_22/gpio_defaults_high\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[6\]
+ gpio_defaults_block_22/gpio_defaults_high\[7\]
+ gpio_defaults_block_22/gpio_defaults_low\[7\]
+ gpio_defaults_block_22/gpio_defaults_high\[8\]
+ gpio_defaults_block_22/gpio_defaults_low\[8\]
+ gpio_defaults_block_22/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[11\]
+ gpio_defaults_block_23/gpio_defaults_low\[11\]
+ gpio_defaults_block_23/gpio_defaults_high\[12\]
+ gpio_defaults_block_23/gpio_defaults_low\[12\]
+ gpio_defaults_block_23/gpio_defaults_high\[1\]
+ gpio_defaults_block_23/gpio_defaults_low\[1\]
+ gpio_defaults_block_23/gpio_defaults_high\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[3\]
+ gpio_defaults_block_23/gpio_defaults_high\[4\]
+ gpio_defaults_block_23/gpio_defaults_low\[4\]
+ gpio_defaults_block_23/gpio_defaults_high\[5\]
+ gpio_defaults_block_23/gpio_defaults_low\[5\]
+ gpio_defaults_block_23/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_low\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[7\]
+ gpio_defaults_block_23/gpio_defaults_low\[7\]
+ gpio_defaults_block_23/gpio_defaults_high\[8\]
+ gpio_defaults_block_23/gpio_defaults_low\[8\]
+ gpio_defaults_block_23/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_low\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[11\]
+ gpio_defaults_block_28/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_low\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[11\]
+ gpio_defaults_block_27/gpio_defaults_high\[12\]
+ gpio_defaults_block_27/gpio_defaults_low\[12\]
+ gpio_defaults_block_27/gpio_defaults_high\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[3\]
+ gpio_defaults_block_27/gpio_defaults_low\[3\]
+ gpio_defaults_block_27/gpio_defaults_high\[4\]
+ gpio_defaults_block_27/gpio_defaults_high\[5\]
+ gpio_defaults_block_27/gpio_defaults_low\[5\]
+ gpio_defaults_block_27/gpio_defaults_high\[6\]
+ gpio_defaults_block_27/gpio_defaults_low\[6\]
+ gpio_defaults_block_27/gpio_defaults_high\[7\]
+ gpio_defaults_block_27/gpio_defaults_low\[7\]
+ gpio_defaults_block_27/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_high\[0\]
+ gpio_defaults_block_28/gpio_defaults_low\[0\]
+ gpio_defaults_block_28/gpio_defaults_high\[10\]
+ gpio_defaults_block_28/gpio_defaults_low\[10\]
+ gpio_defaults_block_28/gpio_defaults_high\[11\]
+ gpio_defaults_block_28/gpio_defaults_high\[12\]
+ gpio_defaults_block_28/gpio_defaults_low\[12\]
+ gpio_defaults_block_28/gpio_defaults_high\[1\]
+ gpio_defaults_block_28/gpio_defaults_low\[1\]
+ gpio_defaults_block_28/gpio_defaults_high\[2\]
+ gpio_defaults_block_28/gpio_defaults_low\[2\]
+ gpio_defaults_block_28/gpio_defaults_high\[3\]
+ gpio_defaults_block_28/gpio_defaults_low\[3\]
+ gpio_defaults_block_28/gpio_defaults_high\[4\]
+ gpio_defaults_block_28/gpio_defaults_low\[4\]
+ gpio_defaults_block_28/gpio_defaults_high\[5\]
+ gpio_defaults_block_28/gpio_defaults_high\[6\]
+ gpio_defaults_block_28/gpio_defaults_low\[6\]
+ gpio_defaults_block_28/gpio_defaults_high\[7\]
+ gpio_defaults_block_28/gpio_defaults_low\[7\]
+ gpio_defaults_block_28/gpio_defaults_high\[8\]
+ gpio_defaults_block_28/gpio_defaults_low\[8\]
+ gpio_defaults_block_28/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[1\]
+ gpio_defaults_block_25/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_low\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[3\]
+ gpio_defaults_block_25/gpio_defaults_low\[3\]
+ gpio_defaults_block_25/gpio_defaults_high\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_high\[6\]
+ gpio_defaults_block_25/gpio_defaults_low\[6\]
+ gpio_defaults_block_25/gpio_defaults_high\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[8\]
+ gpio_defaults_block_25/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[10\]
+ gpio_defaults_block_26/gpio_defaults_low\[10\]
+ gpio_defaults_block_26/gpio_defaults_high\[11\]
+ gpio_defaults_block_26/gpio_defaults_low\[11\]
+ gpio_defaults_block_26/gpio_defaults_high\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[2\]
+ gpio_defaults_block_26/gpio_defaults_high\[3\]
+ gpio_defaults_block_26/gpio_defaults_low\[3\]
+ gpio_defaults_block_26/gpio_defaults_high\[4\]
+ gpio_defaults_block_26/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[5\]
+ gpio_defaults_block_26/gpio_defaults_low\[5\]
+ gpio_defaults_block_26/gpio_defaults_high\[6\]
+ gpio_defaults_block_26/gpio_defaults_low\[6\]
+ gpio_defaults_block_26/gpio_defaults_high\[7\]
+ gpio_defaults_block_26/gpio_defaults_low\[7\]
+ gpio_defaults_block_26/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_high\[0\]
+ gpio_defaults_block_27/gpio_defaults_low\[0\]
+ gpio_defaults_block_27/gpio_defaults_high\[10\]
+ gpio_defaults_block_27/gpio_defaults_low\[10\]
+ gpio_defaults_block_27/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[2\]
+ gpio_defaults_block_30/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[9\]
+ gpio_defaults_block_3/gpio_defaults_low\[2\]
+ gpio_defaults_block_3/gpio_defaults_low\[9\]
+ gpio_defaults_block_30/gpio_defaults_high\[0\]
+ gpio_defaults_block_30/gpio_defaults_low\[0\]
+ gpio_defaults_block_30/gpio_defaults_high\[10\]
+ gpio_defaults_block_30/gpio_defaults_low\[10\]
+ gpio_defaults_block_30/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_low\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[12\]
+ gpio_defaults_block_30/gpio_defaults_low\[12\]
+ gpio_defaults_block_30/gpio_defaults_high\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[2\]
+ gpio_defaults_block_30/gpio_defaults_high\[3\]
+ gpio_defaults_block_30/gpio_defaults_low\[3\]
+ gpio_defaults_block_30/gpio_defaults_high\[4\]
+ gpio_defaults_block_30/gpio_defaults_low\[4\]
+ gpio_defaults_block_30/gpio_defaults_high\[5\]
+ gpio_defaults_block_30/gpio_defaults_low\[5\]
+ gpio_defaults_block_30/gpio_defaults_high\[6\]
+ gpio_defaults_block_30/gpio_defaults_low\[6\]
+ gpio_defaults_block_30/gpio_defaults_high\[7\]
+ gpio_defaults_block_30/gpio_defaults_low\[7\]
+ gpio_defaults_block_30/gpio_defaults_high\[8\]
+ gpio_defaults_block_30/gpio_defaults_low\[8\]
+ gpio_defaults_block_30/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[0\]
+ gpio_defaults_block_31/gpio_defaults_low\[0\]
+ gpio_defaults_block_31/gpio_defaults_high\[10\]
+ gpio_defaults_block_31/gpio_defaults_low\[10\]
+ gpio_defaults_block_31/gpio_defaults_high\[11\]
+ gpio_defaults_block_31/gpio_defaults_high\[12\]
+ gpio_defaults_block_31/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[0\]
+ gpio_defaults_block_29/gpio_defaults_low\[0\]
+ gpio_defaults_block_29/gpio_defaults_high\[10\]
+ gpio_defaults_block_29/gpio_defaults_low\[10\]
+ gpio_defaults_block_29/gpio_defaults_high\[11\]
+ gpio_defaults_block_29/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[1\]
+ gpio_defaults_block_29/gpio_defaults_low\[1\]
+ gpio_defaults_block_29/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_low\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[3\]
+ gpio_defaults_block_29/gpio_defaults_low\[3\]
+ gpio_defaults_block_29/gpio_defaults_high\[4\]
+ gpio_defaults_block_29/gpio_defaults_low\[4\]
+ gpio_defaults_block_29/gpio_defaults_high\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[6\]
+ gpio_defaults_block_29/gpio_defaults_low\[6\]
+ gpio_defaults_block_29/gpio_defaults_high\[7\]
+ gpio_defaults_block_29/gpio_defaults_low\[7\]
+ gpio_defaults_block_29/gpio_defaults_high\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[9\]
+ gpio_defaults_block_3/gpio_defaults_high\[0\]
+ gpio_defaults_block_3/gpio_defaults_low\[0\]
+ gpio_defaults_block_3/gpio_defaults_high\[10\]
+ gpio_defaults_block_3/gpio_defaults_low\[10\]
+ gpio_defaults_block_3/gpio_defaults_high\[11\]
+ gpio_defaults_block_3/gpio_defaults_low\[11\]
+ gpio_defaults_block_3/gpio_defaults_high\[12\]
+ gpio_defaults_block_3/gpio_defaults_low\[12\]
+ gpio_defaults_block_3/gpio_defaults_high\[1\]
+ gpio_defaults_block_3/gpio_defaults_low\[1\]
+ gpio_defaults_block_3/gpio_defaults_high\[2\]
+ gpio_defaults_block_3/gpio_defaults_high\[3\]
+ gpio_defaults_block_3/gpio_defaults_low\[3\]
+ gpio_defaults_block_3/gpio_defaults_high\[4\]
+ gpio_defaults_block_3/gpio_defaults_low\[4\]
+ gpio_defaults_block_3/gpio_defaults_high\[5\]
+ gpio_defaults_block_3/gpio_defaults_low\[5\]
+ gpio_defaults_block_3/gpio_defaults_high\[6\]
+ gpio_defaults_block_3/gpio_defaults_low\[6\]
+ gpio_defaults_block_3/gpio_defaults_high\[7\]
+ gpio_defaults_block_3/gpio_defaults_low\[7\]
+ gpio_defaults_block_3/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_low\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[4\]
+ gpio_defaults_block_31/gpio_defaults_low\[7\]
+ gpio_defaults_block_31/gpio_defaults_low\[9\]
+ gpio_defaults_block_32/gpio_defaults_high\[0\]
+ gpio_defaults_block_32/gpio_defaults_low\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_high\[11\]
+ gpio_defaults_block_33/gpio_defaults_low\[11\]
+ gpio_defaults_block_33/gpio_defaults_high\[12\]
+ gpio_defaults_block_33/gpio_defaults_low\[12\]
+ gpio_defaults_block_33/gpio_defaults_high\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[2\]
+ gpio_defaults_block_33/gpio_defaults_low\[2\]
+ gpio_defaults_block_33/gpio_defaults_high\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[4\]
+ gpio_defaults_block_33/gpio_defaults_high\[5\]
+ gpio_defaults_block_33/gpio_defaults_low\[5\]
+ gpio_defaults_block_33/gpio_defaults_high\[6\]
+ gpio_defaults_block_33/gpio_defaults_low\[6\]
+ gpio_defaults_block_33/gpio_defaults_high\[7\]
+ gpio_defaults_block_33/gpio_defaults_low\[7\]
+ gpio_defaults_block_33/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[0\]
+ gpio_defaults_block_34/gpio_defaults_low\[0\]
+ gpio_defaults_block_34/gpio_defaults_high\[10\]
+ gpio_defaults_block_34/gpio_defaults_low\[10\]
+ gpio_defaults_block_34/gpio_defaults_high\[11\]
+ gpio_defaults_block_34/gpio_defaults_low\[11\]
+ gpio_defaults_block_34/gpio_defaults_high\[12\]
+ gpio_defaults_block_34/gpio_defaults_low\[12\]
+ gpio_defaults_block_34/gpio_defaults_high\[1\]
+ gpio_defaults_block_34/gpio_defaults_low\[1\]
+ gpio_defaults_block_34/gpio_defaults_high\[2\]
+ gpio_defaults_block_34/gpio_defaults_low\[2\]
+ gpio_defaults_block_34/gpio_defaults_high\[3\]
+ gpio_defaults_block_34/gpio_defaults_low\[3\]
+ gpio_defaults_block_34/gpio_defaults_high\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[5\]
+ gpio_defaults_block_34/gpio_defaults_high\[6\]
+ gpio_defaults_block_34/gpio_defaults_low\[6\]
+ gpio_defaults_block_34/gpio_defaults_high\[7\]
+ gpio_defaults_block_34/gpio_defaults_low\[7\]
+ gpio_defaults_block_34/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_low\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[1\]
+ gpio_defaults_block_31/gpio_defaults_low\[1\]
+ gpio_defaults_block_31/gpio_defaults_high\[2\]
+ gpio_defaults_block_31/gpio_defaults_low\[2\]
+ gpio_defaults_block_31/gpio_defaults_high\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[4\]
+ gpio_defaults_block_31/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_low\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[6\]
+ gpio_defaults_block_31/gpio_defaults_low\[6\]
+ gpio_defaults_block_31/gpio_defaults_high\[7\]
+ gpio_defaults_block_31/gpio_defaults_high\[8\]
+ gpio_defaults_block_31/gpio_defaults_low\[8\]
+ gpio_defaults_block_31/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[0\]
+ gpio_defaults_block_32/gpio_defaults_high\[10\]
+ gpio_defaults_block_32/gpio_defaults_low\[10\]
+ gpio_defaults_block_32/gpio_defaults_high\[11\]
+ gpio_defaults_block_32/gpio_defaults_low\[11\]
+ gpio_defaults_block_32/gpio_defaults_high\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[1\]
+ gpio_defaults_block_32/gpio_defaults_high\[2\]
+ gpio_defaults_block_32/gpio_defaults_low\[2\]
+ gpio_defaults_block_32/gpio_defaults_high\[3\]
+ gpio_defaults_block_32/gpio_defaults_low\[3\]
+ gpio_defaults_block_32/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[5\]
+ gpio_defaults_block_32/gpio_defaults_low\[5\]
+ gpio_defaults_block_32/gpio_defaults_high\[6\]
+ gpio_defaults_block_32/gpio_defaults_low\[6\]
+ gpio_defaults_block_32/gpio_defaults_high\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[8\]
+ gpio_defaults_block_32/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[0\]
+ gpio_defaults_block_33/gpio_defaults_low\[0\]
+ gpio_defaults_block_33/gpio_defaults_high\[10\]
+ gpio_defaults_block_33/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[0\]
+ gpio_defaults_block_37/gpio_defaults_low\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_high\[5\]
+ gpio_defaults_block_35/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[9\]
+ gpio_defaults_block_37/gpio_defaults_high\[0\]
+ gpio_defaults_block_37/gpio_defaults_high\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_high\[11\]
+ gpio_defaults_block_37/gpio_defaults_low\[11\]
+ gpio_defaults_block_37/gpio_defaults_high\[12\]
+ gpio_defaults_block_37/gpio_defaults_low\[12\]
+ gpio_defaults_block_37/gpio_defaults_high\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[2\]
+ gpio_defaults_block_37/gpio_defaults_low\[2\]
+ gpio_defaults_block_37/gpio_defaults_high\[3\]
+ gpio_defaults_block_37/gpio_defaults_low\[3\]
+ gpio_defaults_block_37/gpio_defaults_high\[4\]
+ gpio_defaults_block_37/gpio_defaults_low\[4\]
+ gpio_defaults_block_37/gpio_defaults_high\[5\]
+ gpio_defaults_block_37/gpio_defaults_low\[5\]
+ gpio_defaults_block_37/gpio_defaults_high\[6\]
+ gpio_defaults_block_37/gpio_defaults_low\[6\]
+ gpio_defaults_block_37/gpio_defaults_high\[7\]
+ gpio_defaults_block_37/gpio_defaults_low\[7\]
+ gpio_defaults_block_37/gpio_defaults_high\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_high\[0\]
+ gpio_defaults_block_4/gpio_defaults_low\[0\]
+ gpio_defaults_block_4/gpio_defaults_high\[10\]
+ gpio_defaults_block_4/gpio_defaults_low\[10\]
+ gpio_defaults_block_4/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_low\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[0\]
+ gpio_defaults_block_35/gpio_defaults_low\[0\]
+ gpio_defaults_block_35/gpio_defaults_high\[10\]
+ gpio_defaults_block_35/gpio_defaults_low\[10\]
+ gpio_defaults_block_35/gpio_defaults_high\[11\]
+ gpio_defaults_block_35/gpio_defaults_low\[11\]
+ gpio_defaults_block_35/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_low\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[1\]
+ gpio_defaults_block_35/gpio_defaults_low\[1\]
+ gpio_defaults_block_35/gpio_defaults_high\[2\]
+ gpio_defaults_block_35/gpio_defaults_low\[2\]
+ gpio_defaults_block_35/gpio_defaults_high\[3\]
+ gpio_defaults_block_35/gpio_defaults_low\[3\]
+ gpio_defaults_block_35/gpio_defaults_high\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[5\]
+ gpio_defaults_block_35/gpio_defaults_high\[6\]
+ gpio_defaults_block_35/gpio_defaults_low\[6\]
+ gpio_defaults_block_35/gpio_defaults_high\[7\]
+ gpio_defaults_block_35/gpio_defaults_low\[7\]
+ gpio_defaults_block_35/gpio_defaults_high\[8\]
+ gpio_defaults_block_35/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_low\[9\]
+ gpio_defaults_block_36/gpio_defaults_high\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[10\]
+ gpio_defaults_block_36/gpio_defaults_low\[10\]
+ gpio_defaults_block_36/gpio_defaults_high\[11\]
+ gpio_defaults_block_36/gpio_defaults_low\[11\]
+ gpio_defaults_block_36/gpio_defaults_high\[12\]
+ gpio_defaults_block_36/gpio_defaults_low\[12\]
+ gpio_defaults_block_36/gpio_defaults_high\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[3\]
+ gpio_defaults_block_36/gpio_defaults_low\[3\]
+ gpio_defaults_block_36/gpio_defaults_high\[4\]
+ gpio_defaults_block_36/gpio_defaults_low\[4\]
+ gpio_defaults_block_36/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_low\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[6\]
+ gpio_defaults_block_36/gpio_defaults_low\[6\]
+ gpio_defaults_block_36/gpio_defaults_high\[7\]
+ gpio_defaults_block_36/gpio_defaults_low\[7\]
+ gpio_defaults_block_36/gpio_defaults_high\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[11\]
+ gpio_defaults_block_7/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[11\]
+ gpio_defaults_block_6/gpio_defaults_low\[11\]
+ gpio_defaults_block_6/gpio_defaults_high\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[2\]
+ gpio_defaults_block_6/gpio_defaults_low\[2\]
+ gpio_defaults_block_6/gpio_defaults_high\[3\]
+ gpio_defaults_block_6/gpio_defaults_high\[4\]
+ gpio_defaults_block_6/gpio_defaults_low\[4\]
+ gpio_defaults_block_6/gpio_defaults_high\[5\]
+ gpio_defaults_block_6/gpio_defaults_low\[5\]
+ gpio_defaults_block_6/gpio_defaults_high\[6\]
+ gpio_defaults_block_6/gpio_defaults_low\[6\]
+ gpio_defaults_block_6/gpio_defaults_high\[7\]
+ gpio_defaults_block_6/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[8\]
+ gpio_defaults_block_6/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[9\]
+ gpio_defaults_block_7/gpio_defaults_high\[0\]
+ gpio_defaults_block_7/gpio_defaults_low\[0\]
+ gpio_defaults_block_7/gpio_defaults_high\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[11\]
+ gpio_defaults_block_7/gpio_defaults_high\[12\]
+ gpio_defaults_block_7/gpio_defaults_low\[12\]
+ gpio_defaults_block_7/gpio_defaults_high\[1\]
+ gpio_defaults_block_7/gpio_defaults_low\[1\]
+ gpio_defaults_block_7/gpio_defaults_high\[2\]
+ gpio_defaults_block_7/gpio_defaults_low\[2\]
+ gpio_defaults_block_7/gpio_defaults_high\[3\]
+ gpio_defaults_block_7/gpio_defaults_low\[3\]
+ gpio_defaults_block_7/gpio_defaults_high\[4\]
+ gpio_defaults_block_7/gpio_defaults_high\[5\]
+ gpio_defaults_block_7/gpio_defaults_low\[5\]
+ gpio_defaults_block_7/gpio_defaults_high\[6\]
+ gpio_defaults_block_7/gpio_defaults_low\[6\]
+ gpio_defaults_block_7/gpio_defaults_high\[7\]
+ gpio_defaults_block_7/gpio_defaults_low\[7\]
+ gpio_defaults_block_7/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[9\]
+ gpio_defaults_block_7/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_low\[12\]
+ gpio_defaults_block_4/gpio_defaults_high\[1\]
+ gpio_defaults_block_4/gpio_defaults_low\[1\]
+ gpio_defaults_block_4/gpio_defaults_high\[2\]
+ gpio_defaults_block_4/gpio_defaults_low\[2\]
+ gpio_defaults_block_4/gpio_defaults_high\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_high\[5\]
+ gpio_defaults_block_4/gpio_defaults_low\[5\]
+ gpio_defaults_block_4/gpio_defaults_high\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[9\]
+ gpio_defaults_block_5/gpio_defaults_high\[0\]
+ gpio_defaults_block_5/gpio_defaults_low\[0\]
+ gpio_defaults_block_5/gpio_defaults_high\[10\]
+ gpio_defaults_block_5/gpio_defaults_low\[10\]
+ gpio_defaults_block_5/gpio_defaults_high\[11\]
+ gpio_defaults_block_5/gpio_defaults_low\[11\]
+ gpio_defaults_block_5/gpio_defaults_high\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[1\]
+ gpio_defaults_block_5/gpio_defaults_high\[2\]
+ gpio_defaults_block_5/gpio_defaults_low\[2\]
+ gpio_defaults_block_5/gpio_defaults_high\[3\]
+ gpio_defaults_block_5/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[4\]
+ gpio_defaults_block_5/gpio_defaults_low\[4\]
+ gpio_defaults_block_5/gpio_defaults_high\[5\]
+ gpio_defaults_block_5/gpio_defaults_low\[5\]
+ gpio_defaults_block_5/gpio_defaults_high\[6\]
+ gpio_defaults_block_5/gpio_defaults_low\[6\]
+ gpio_defaults_block_5/gpio_defaults_high\[7\]
+ gpio_defaults_block_5/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_low\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[0\]
+ gpio_defaults_block_6/gpio_defaults_low\[0\]
+ gpio_defaults_block_6/gpio_defaults_high\[10\]
+ gpio_defaults_block_6/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[11\]
+ gpio_defaults_block_8/gpio_defaults_low\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[8\]
+ gpio_defaults_block_8/gpio_defaults_low\[9\]
+ gpio_defaults_block_9/gpio_defaults_high\[0\]
+ gpio_defaults_block_9/gpio_defaults_low\[1\]
+ gpio_defaults_block_9/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[0\]
+ gpio_defaults_block_8/gpio_defaults_low\[0\]
+ gpio_defaults_block_8/gpio_defaults_high\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[11\]
+ gpio_defaults_block_8/gpio_defaults_high\[12\]
+ gpio_defaults_block_8/gpio_defaults_low\[12\]
+ gpio_defaults_block_8/gpio_defaults_high\[1\]
+ gpio_defaults_block_8/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[2\]
+ gpio_defaults_block_8/gpio_defaults_low\[2\]
+ gpio_defaults_block_8/gpio_defaults_high\[3\]
+ gpio_defaults_block_8/gpio_defaults_low\[3\]
+ gpio_defaults_block_8/gpio_defaults_high\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[5\]
+ gpio_defaults_block_8/gpio_defaults_low\[5\]
+ gpio_defaults_block_8/gpio_defaults_high\[6\]
+ gpio_defaults_block_8/gpio_defaults_low\[6\]
+ gpio_defaults_block_8/gpio_defaults_high\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[0\]
+ gpio_defaults_block_9/gpio_defaults_high\[10\]
+ gpio_defaults_block_9/gpio_defaults_low\[10\]
+ gpio_defaults_block_9/gpio_defaults_high\[11\]
+ gpio_defaults_block_9/gpio_defaults_low\[11\]
+ gpio_defaults_block_9/gpio_defaults_high\[12\]
+ gpio_defaults_block_9/gpio_defaults_low\[12\]
+ gpio_defaults_block_9/gpio_defaults_high\[1\]
+ gpio_defaults_block_9/gpio_defaults_high\[2\]
+ gpio_defaults_block_9/gpio_defaults_low\[2\]
+ gpio_defaults_block_9/gpio_defaults_high\[3\]
+ gpio_defaults_block_9/gpio_defaults_low\[3\]
+ gpio_defaults_block_9/gpio_defaults_high\[4\]
+ gpio_defaults_block_9/gpio_defaults_low\[4\]
+ gpio_defaults_block_9/gpio_defaults_high\[5\]
+ gpio_defaults_block_9/gpio_defaults_low\[5\]
+ gpio_defaults_block_9/gpio_defaults_high\[6\]
+ gpio_defaults_block_9/gpio_defaults_low\[6\]
+ gpio_defaults_block_9/gpio_defaults_high\[7\]
+ gpio_defaults_block_9/gpio_defaults_low\[7\]
+ gpio_defaults_block_9/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[9\]
+ padframe/flash_io1_di_core
+ padframe/clock_core
+ padframe/mprj_analog_io[6]
+ padframe/gpio_in_core
+ padframe/flash_io1
+ padframe/mprj_analog_io[27]
+ padframe/mprj_analog_io[28]
+ padframe/mprj_analog_io[24]
+ padframe/mprj_analog_io[25]
+ padframe/mprj_analog_io[5]
+ padframe/mprj_analog_io[8]
+ padframe/mprj_analog_io[12]
+ padframe/mprj_analog_io[11]
+ padframe/mprj_analog_io[10]
+ padframe/mprj_analog_io[14]
+ padframe/mprj_analog_io[16]
+ padframe/mprj_analog_io[15]
+ padframe/mprj_analog_io[17]
+ padframe/mprj_analog_io[19]
+ padframe/mprj_analog_io[21]
+ padframe/mprj_analog_io[22]
+ padframe/mprj_analog_io[23]
+ padframe/mprj_io[28]
+ padframe/gpio
+ padframe/mprj_io[34]
+ padframe/flash_csb
+ padframe/mprj_analog_io[18]
+ padframe/mprj_analog_io[13]
+ padframe/mprj_io[8]
+ padframe/mprj_io[10]
+ padframe/mprj_io[21]
+ padframe/mprj_io[22]
+ padframe/clock
+ padframe/mprj_io[25]
+ padframe/mprj_analog_io[2]
+ padframe/mprj_io[17]
+ mprj/mprj/p[5]
+ padframe/mprj_io[0]
+ mprj/mprj/p[7]
+ mprj/mprj/p[6]
+ mprj/mprj/p[4]
+ padframe/mprj_io[9]
+ padframe/mprj_io[11]
+ padframe/mprj_io[33]
+ mgmt_buffers/mprj2_logic_high_inst/HI
+ mgmt_buffers/mprj_logic_high_inst/HI[462]
+ mgmt_buffers/mprj_logic_high_inst/HI[461]
+ mgmt_buffers/mprj_logic_high_inst/HI[460]
+ mgmt_buffers/mprj_logic_high_inst/HI[459]
+ mgmt_buffers/mprj_logic_high_inst/HI[458]
+ mgmt_buffers/mprj_logic_high_inst/HI[457]
+ mgmt_buffers/mprj_logic_high_inst/HI[456]
+ mgmt_buffers/mprj_logic_high_inst/HI[455]
+ mgmt_buffers/mprj_logic_high_inst/HI[454]
+ mgmt_buffers/mprj_logic_high_inst/HI[453]
+ mgmt_buffers/mprj_logic_high_inst/HI[452]
+ mgmt_buffers/mprj_logic_high_inst/HI[451]
+ mgmt_buffers/mprj_logic_high_inst/HI[450]
+ mgmt_buffers/mprj_logic_high_inst/HI[449]
+ mgmt_buffers/mprj_logic_high_inst/HI[448]
+ mgmt_buffers/mprj_logic_high_inst/HI[447]
+ mgmt_buffers/mprj_logic_high_inst/HI[446]
+ mgmt_buffers/mprj_logic_high_inst/HI[445]
+ mgmt_buffers/mprj_logic_high_inst/HI[444]
+ padframe/mprj_io[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[443]
+ mgmt_buffers/mprj_logic_high_inst/HI[442]
+ mgmt_buffers/mprj_logic_high_inst/HI[441]
+ mgmt_buffers/mprj_logic_high_inst/HI[440]
+ mgmt_buffers/mprj_logic_high_inst/HI[439]
+ mgmt_buffers/mprj_logic_high_inst/HI[438]
+ mgmt_buffers/mprj_logic_high_inst/HI[437]
+ mgmt_buffers/mprj_logic_high_inst/HI[436]
+ mgmt_buffers/mprj_logic_high_inst/HI[435]
+ mgmt_buffers/mprj_logic_high_inst/HI[434]
+ mgmt_buffers/mprj_logic_high_inst/HI[433]
+ mgmt_buffers/mprj_logic_high_inst/HI[432]
+ mgmt_buffers/mprj_logic_high_inst/HI[431]
+ mgmt_buffers/mprj_logic_high_inst/HI[430]
+ mgmt_buffers/mprj_logic_high_inst/HI[429]
+ mgmt_buffers/mprj_logic_high_inst/HI[428]
+ mgmt_buffers/mprj_logic_high_inst/HI[427]
+ mgmt_buffers/mprj_logic_high_inst/HI[426]
+ padframe/mprj_io[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[425]
+ mgmt_buffers/mprj_logic_high_inst/HI[424]
+ mgmt_buffers/mprj_logic_high_inst/HI[423]
+ mgmt_buffers/mprj_logic_high_inst/HI[422]
+ mgmt_buffers/mprj_logic_high_inst/HI[421]
+ mgmt_buffers/mprj_logic_high_inst/HI[420]
+ mgmt_buffers/mprj_logic_high_inst/HI[419]
+ mgmt_buffers/mprj_logic_high_inst/HI[418]
+ mgmt_buffers/mprj_logic_high_inst/HI[417]
+ mgmt_buffers/mprj_logic_high_inst/HI[416]
+ mgmt_buffers/mprj_logic_high_inst/HI[415]
+ mgmt_buffers/mprj_logic_high_inst/HI[414]
+ mgmt_buffers/mprj_logic_high_inst/HI[413]
+ mgmt_buffers/mprj_logic_high_inst/HI[412]
+ mgmt_buffers/mprj_logic_high_inst/HI[411]
+ mgmt_buffers/mprj_logic_high_inst/HI[410]
+ mgmt_buffers/mprj_logic_high_inst/HI[409]
+ mgmt_buffers/mprj_logic_high_inst/HI[408]
+ mgmt_buffers/mprj_logic_high_inst/HI[407]
+ mgmt_buffers/mprj_logic_high_inst/HI[406]
+ mgmt_buffers/mprj_logic_high_inst/HI[405]
+ mgmt_buffers/mprj_logic_high_inst/HI[404]
+ mgmt_buffers/mprj_logic_high_inst/HI[403]
+ mgmt_buffers/mprj_logic_high_inst/HI[402]
+ mgmt_buffers/mprj_logic_high_inst/HI[401]
+ mgmt_buffers/mprj_logic_high_inst/HI[400]
+ mgmt_buffers/mprj_logic_high_inst/HI[399]
+ mgmt_buffers/mprj_logic_high_inst/HI[398]
+ mgmt_buffers/mprj_logic_high_inst/HI[397]
+ mgmt_buffers/mprj_logic_high_inst/HI[396]
+ mgmt_buffers/mprj_logic_high_inst/HI[395]
+ mgmt_buffers/mprj_logic_high_inst/HI[394]
+ mgmt_buffers/mprj_logic_high_inst/HI[393]
+ mgmt_buffers/mprj_logic_high_inst/HI[392]
+ mgmt_buffers/mprj_logic_high_inst/HI[391]
+ mgmt_buffers/mprj_logic_high_inst/HI[390]
+ mgmt_buffers/mprj_logic_high_inst/HI[389]
+ mgmt_buffers/mprj_logic_high_inst/HI[388]
+ mgmt_buffers/mprj_logic_high_inst/HI[387]
+ mgmt_buffers/mprj_logic_high_inst/HI[386]
+ mgmt_buffers/mprj_logic_high_inst/HI[385]
+ mgmt_buffers/mprj_logic_high_inst/HI[384]
+ mgmt_buffers/mprj_logic_high_inst/HI[383]
+ mgmt_buffers/mprj_logic_high_inst/HI[382]
+ mgmt_buffers/mprj_logic_high_inst/HI[381]
+ mgmt_buffers/mprj_logic_high_inst/HI[380]
+ mgmt_buffers/mprj_logic_high_inst/HI[379]
+ mgmt_buffers/mprj_logic_high_inst/HI[378]
+ mgmt_buffers/mprj_logic_high_inst/HI[377]
+ mgmt_buffers/mprj_logic_high_inst/HI[376]
+ mgmt_buffers/mprj_logic_high_inst/HI[375]
+ mgmt_buffers/mprj_logic_high_inst/HI[374]
+ mgmt_buffers/mprj_logic_high_inst/HI[373]
+ mgmt_buffers/mprj_logic_high_inst/HI[372]
+ mgmt_buffers/mprj_logic_high_inst/HI[371]
+ mgmt_buffers/mprj_logic_high_inst/HI[370]
+ mgmt_buffers/mprj_logic_high_inst/HI[369]
+ mgmt_buffers/mprj_logic_high_inst/HI[368]
+ mgmt_buffers/mprj_logic_high_inst/HI[367]
+ mgmt_buffers/mprj_logic_high_inst/HI[366]
+ mgmt_buffers/mprj_logic_high_inst/HI[365]
+ mgmt_buffers/mprj_logic_high_inst/HI[364]
+ mgmt_buffers/mprj_logic_high_inst/HI[363]
+ padframe/mprj_io[20]
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+ mgmt_buffers/mprj_logic_high_inst/HI[361]
+ mgmt_buffers/mprj_logic_high_inst/HI[360]
+ mgmt_buffers/mprj_logic_high_inst/HI[359]
+ mgmt_buffers/mprj_logic_high_inst/HI[358]
+ mgmt_buffers/mprj_logic_high_inst/HI[357]
+ mgmt_buffers/mprj_logic_high_inst/HI[356]
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+ mgmt_buffers/mprj_logic_high_inst/HI[352]
+ mgmt_buffers/mprj_logic_high_inst/HI[351]
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+ mgmt_buffers/mprj_logic_high_inst/HI[346]
+ mgmt_buffers/mprj_logic_high_inst/HI[345]
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+ mgmt_buffers/mprj_logic_high_inst/HI[341]
+ mgmt_buffers/mprj_logic_high_inst/HI[340]
+ mgmt_buffers/mprj_logic_high_inst/HI[339]
+ mgmt_buffers/mprj_logic_high_inst/HI[338]
+ mgmt_buffers/mprj_logic_high_inst/HI[337]
+ mgmt_buffers/mprj_logic_high_inst/HI[336]
+ mgmt_buffers/mprj_logic_high_inst/HI[335]
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+ mgmt_buffers/mprj_logic_high_inst/HI[331]
+ mgmt_buffers/mprj_logic_high_inst/HI[330]
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+ padframe/mprj_io[18]
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+ mgmt_buffers/mprj_logic_high_inst/HI[315]
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+ mgmt_buffers/mprj_logic_high_inst/HI[312]
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+ mgmt_buffers/mprj_logic_high_inst/HI[310]
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+ mgmt_buffers/mprj_logic_high_inst/HI[306]
+ mgmt_buffers/mprj_logic_high_inst/HI[305]
+ mgmt_buffers/mprj_logic_high_inst/HI[304]
+ mgmt_buffers/mprj_logic_high_inst/HI[303]
+ mgmt_buffers/mprj_logic_high_inst/HI[302]
+ mgmt_buffers/mprj_logic_high_inst/HI[301]
+ mgmt_buffers/mprj_logic_high_inst/HI[300]
+ mgmt_buffers/mprj_logic_high_inst/HI[299]
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+ mgmt_buffers/mprj_logic_high_inst/HI[294]
+ mgmt_buffers/mprj_logic_high_inst/HI[293]
+ mgmt_buffers/mprj_logic_high_inst/HI[292]
+ mgmt_buffers/mprj_logic_high_inst/HI[291]
+ padframe/mprj_analog_io[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[290]
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+ mgmt_buffers/mprj_logic_high_inst/HI[270]
+ mgmt_buffers/mprj_logic_high_inst/HI[269]
+ padframe/mprj_analog_io[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[268]
+ mgmt_buffers/mprj_logic_high_inst/HI[267]
+ mgmt_buffers/mprj_logic_high_inst/HI[266]
+ mgmt_buffers/mprj_logic_high_inst/HI[265]
+ mgmt_buffers/mprj_logic_high_inst/HI[264]
+ mgmt_buffers/mprj_logic_high_inst/HI[263]
+ mgmt_buffers/mprj_logic_high_inst/HI[262]
+ mgmt_buffers/mprj_logic_high_inst/HI[261]
+ mgmt_buffers/mprj_logic_high_inst/HI[260]
+ mgmt_buffers/mprj_logic_high_inst/HI[259]
+ mgmt_buffers/mprj_logic_high_inst/HI[258]
+ mgmt_buffers/mprj_logic_high_inst/HI[257]
+ mgmt_buffers/mprj_logic_high_inst/HI[256]
+ mgmt_buffers/mprj_logic_high_inst/HI[255]
+ mgmt_buffers/mprj_logic_high_inst/HI[254]
+ mgmt_buffers/mprj_logic_high_inst/HI[253]
+ mgmt_buffers/mprj_logic_high_inst/HI[252]
+ mgmt_buffers/mprj_logic_high_inst/HI[251]
+ mgmt_buffers/mprj_logic_high_inst/HI[250]
+ mgmt_buffers/mprj_logic_high_inst/HI[249]
+ mgmt_buffers/mprj_logic_high_inst/HI[248]
+ mgmt_buffers/mprj_logic_high_inst/HI[247]
+ mgmt_buffers/mprj_logic_high_inst/HI[246]
+ mgmt_buffers/mprj_logic_high_inst/HI[245]
+ mgmt_buffers/mprj_logic_high_inst/HI[244]
+ mgmt_buffers/mprj_logic_high_inst/HI[243]
+ mgmt_buffers/mprj_logic_high_inst/HI[242]
+ mgmt_buffers/mprj_logic_high_inst/HI[241]
+ mgmt_buffers/mprj_logic_high_inst/HI[240]
+ mgmt_buffers/mprj_logic_high_inst/HI[239]
+ mgmt_buffers/mprj_logic_high_inst/HI[238]
+ mgmt_buffers/mprj_logic_high_inst/HI[237]
+ mgmt_buffers/mprj_logic_high_inst/HI[236]
+ mgmt_buffers/mprj_logic_high_inst/HI[235]
+ mgmt_buffers/mprj_logic_high_inst/HI[234]
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+ mgmt_buffers/mprj_logic_high_inst/HI[229]
+ mgmt_buffers/mprj_logic_high_inst/HI[228]
+ padframe/mprj_analog_io[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[227]
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+ mgmt_buffers/mprj_logic_high_inst/HI[224]
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+ mgmt_buffers/mprj_logic_high_inst/HI[222]
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+ mgmt_buffers/mprj_logic_high_inst/HI[220]
+ mgmt_buffers/mprj_logic_high_inst/HI[219]
+ mgmt_buffers/mprj_logic_high_inst/HI[218]
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+ mgmt_buffers/mprj_logic_high_inst/HI[203]
+ mgmt_buffers/mprj_logic_high_inst/HI[202]
+ mgmt_buffers/mprj_logic_high_inst/HI[201]
+ mgmt_buffers/mprj_logic_high_inst/HI[200]
+ mgmt_buffers/mprj_logic_high_inst/HI[199]
+ mgmt_buffers/mprj_logic_high_inst/HI[198]
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+ mgmt_buffers/mprj_logic_high_inst/HI[196]
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+ mgmt_buffers/mprj_logic_high_inst/HI[193]
+ mgmt_buffers/mprj_logic_high_inst/HI[192]
+ mgmt_buffers/mprj_logic_high_inst/HI[191]
+ mgmt_buffers/mprj_logic_high_inst/HI[190]
+ mgmt_buffers/mprj_logic_high_inst/HI[189]
+ mgmt_buffers/mprj_logic_high_inst/HI[188]
+ padframe/mprj_io[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[187]
+ mgmt_buffers/mprj_logic_high_inst/HI[186]
+ mgmt_buffers/mprj_logic_high_inst/HI[185]
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+ mgmt_buffers/mprj_logic_high_inst/HI[169]
+ mgmt_buffers/mprj_logic_high_inst/HI[168]
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+ mgmt_buffers/mprj_logic_high_inst/HI[138]
+ padframe/mprj_analog_io[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[137]
+ mgmt_buffers/mprj_logic_high_inst/HI[136]
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+ mgmt_buffers/mprj_logic_high_inst/HI[120]
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+ mgmt_buffers/mprj_logic_high_inst/HI[117]
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+ mgmt_buffers/mprj_logic_high_inst/HI[110]
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+ mgmt_buffers/mprj_logic_high_inst/HI[99]
+ mgmt_buffers/mprj_logic_high_inst/HI[98]
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+ mgmt_buffers/mprj_logic_high_inst/HI[92]
+ mgmt_buffers/mprj_logic_high_inst/HI[91]
+ padframe/mprj_io[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[90]
+ mgmt_buffers/mprj_logic_high_inst/HI[89]
+ mgmt_buffers/mprj_logic_high_inst/HI[88]
+ mgmt_buffers/mprj_logic_high_inst/HI[87]
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+ mgmt_buffers/mprj_logic_high_inst/HI[69]
+ padframe/mprj_io[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[68]
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+ mgmt_buffers/mprj_logic_high_inst/HI[53]
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+ mgmt_buffers/mprj_logic_high_inst/HI[51]
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+ mgmt_buffers/mprj_logic_high_inst/HI[41]
+ mgmt_buffers/mprj_logic_high_inst/HI[40]
+ mgmt_buffers/mprj_logic_high_inst/HI[39]
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+ mgmt_buffers/mprj_logic_high_inst/HI[37]
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+ mgmt_buffers/mprj_logic_high_inst/HI[35]
+ mgmt_buffers/mprj_logic_high_inst/HI[34]
+ mgmt_buffers/mprj_logic_high_inst/HI[33]
+ mgmt_buffers/mprj_logic_high_inst/HI[32]
+ mgmt_buffers/mprj_logic_high_inst/HI[31]
+ mgmt_buffers/mprj_logic_high_inst/HI[30]
+ mgmt_buffers/mprj_logic_high_inst/HI[29]
+ mgmt_buffers/mprj_logic_high_inst/HI[28]
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+ mgmt_buffers/mprj_logic_high_inst/HI[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[25]
+ mgmt_buffers/mprj_logic_high_inst/HI[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[22]
+ mgmt_buffers/mprj_logic_high_inst/HI[21]
+ mgmt_buffers/mprj_logic_high_inst/HI[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[19]
+ mgmt_buffers/mprj_logic_high_inst/HI[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[17]
+ mgmt_buffers/mprj_logic_high_inst/HI[16]
+ padframe/mprj_analog_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[15]
+ mgmt_buffers/mprj_logic_high_inst/HI[14]
+ mgmt_buffers/mprj_logic_high_inst/HI[13]
+ mgmt_buffers/mprj_logic_high_inst/HI[12]
+ mgmt_buffers/mprj_logic_high_inst/HI[11]
+ mgmt_buffers/mprj_logic_high_inst/HI[10]
+ mgmt_buffers/mprj_logic_high_inst/HI[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[8]
+ mgmt_buffers/mprj_logic_high_inst/HI[7]
+ mgmt_buffers/mprj_logic_high_inst/HI[6]
+ mgmt_buffers/mprj_logic_high_inst/HI[5]
+ mgmt_buffers/mprj_logic_high_inst/HI[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[2]
+ mgmt_buffers/mprj_logic_high_inst/HI[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[0]
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1
+ mgmt_buffers/powergood_check/mprj_vdd_logic1
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1_h
+ mgmt_buffers/powergood_check/mprj_vdd_logic1_h
+ padframe/mprj_io[35]
+ mprj/mprj/p[3]
+ mprj/mprj/p[2]
+ mprj/mprj/p[1]
+ mprj/mprj/p[0]
+ padframe/mprj_io[30]
+ padframe/mprj_io[14]
+ padframe/mprj_io[13]
+ padframe/mprj_io[12]
+ padframe/mprj_io[19]
+ padframe/mprj_analog_io[0]
+ padframe/mprj_io[36]
+ padframe/mprj_io[32]
+ padframe/mprj_io[29]
+ padframe/mprj_io[31]
+ padframe/mprj_io[15]
+ padframe/mprj_io[16]
+ padframe/mprj_io[1]
+ padframe/mprj_io[2]
+ padframe/mprj_io[3]
+ padframe/mprj_io[4]
+ padframe/mprj_io[5]
+ padframe/mprj_io[6]
+ padframe/mprj_io[7]
+ padframe/resetb
+ padframe/resetb_core_h
+ padframe/vccd1_pad
+ padframe/vccd2_pad
+ padframe/vccd_pad
+ padframe/vdda1_pad
+ padframe/vdda1_pad2
+ padframe/vdda2_pad
+ padframe/vdda_pad
+ padframe/vddio_pad
+ padframe/vddio_pad2
+ padframe/vssa1_pad
+ padframe/vssa1_pad2
+ padframe/vssa2_pad
+ padframe/vssa_pad
+ padframe/vssd1_pad
+ padframe/vssd2_pad
+ padframe/vssd_pad
+ padframe/vssio_pad
+ padframe/vssio_pad2
+ padframe/mprj_pads.analog_a
+ padframe/mprj_pads.analog_b
+ padframe/loop_zero_clock
+ padframe/loop_one_clock
+ padframe/constant_value_inst\[0\]/one
+ padframe/constant_value_inst\[0\]/zero
+ padframe/constant_value_inst\[0\]/one_unbuf
+ padframe/constant_value_inst\[0\]/zero_unbuf
+ padframe/constant_value_inst\[1\]/one
+ padframe/constant_value_inst\[1\]/zero
+ padframe/constant_value_inst\[1\]/one_unbuf
+ padframe/constant_value_inst\[1\]/zero_unbuf
+ padframe/constant_value_inst\[2\]/one
+ padframe/constant_value_inst\[2\]/zero
+ padframe/constant_value_inst\[2\]/one_unbuf
+ padframe/constant_value_inst\[2\]/zero_unbuf
+ padframe/constant_value_inst\[3\]/one
+ padframe/constant_value_inst\[3\]/zero
+ padframe/constant_value_inst\[3\]/one_unbuf
+ padframe/constant_value_inst\[3\]/zero_unbuf
+ padframe/constant_value_inst\[4\]/one
+ padframe/constant_value_inst\[4\]/zero
+ padframe/constant_value_inst\[4\]/one_unbuf
+ padframe/constant_value_inst\[4\]/zero_unbuf
+ padframe/constant_value_inst\[5\]/one
+ padframe/constant_value_inst\[5\]/zero
+ padframe/constant_value_inst\[5\]/one_unbuf
+ padframe/constant_value_inst\[5\]/zero_unbuf
+ padframe/constant_value_inst\[6\]/one
+ padframe/constant_value_inst\[6\]/zero
+ padframe/constant_value_inst\[6\]/one_unbuf
+ padframe/constant_value_inst\[6\]/zero_unbuf
+ padframe/loop_zero_flash_clk
+ padframe/loop_one_flash_clk
+ padframe/loop_zero_flash_csb
+ padframe/loop_one_flash_csb
+ padframe/loop_zero_flash_io0
+ padframe/loop_one_flash_io0
+ padframe/loop_zero_flash_io1
+ padframe/loop_one_flash_io1
+ padframe/loop_zero_gpio
+ padframe/loop_one_gpio
+ padframe/mprj_pads.loop0_io\[0\]
+ padframe/mprj_pads.loop1_io\[0\]
+ padframe/mprj_pads.io_in\[0\]
+ padframe/mprj_pads.io_in_3v3\[0\]
+ padframe/mprj_pads.no_connect_1b\[0\]
+ padframe/mprj_pads.no_connect_1a\[0\]
+ padframe/mprj_pads.loop0_io\[10\]
+ padframe/mprj_pads.loop1_io\[10\]
+ padframe/mprj_pads.io_in\[10\]
+ padframe/mprj_pads.io_in_3v3\[10\]
+ padframe/mprj_pads.analog_noesd_io\[3\]
+ padframe/mprj_pads.loop0_io\[11\]
+ padframe/mprj_pads.loop1_io\[11\]
+ padframe/mprj_pads.io_in\[11\]
+ padframe/mprj_pads.io_in_3v3\[11\]
+ padframe/mprj_pads.analog_noesd_io\[4\]
+ padframe/mprj_pads.loop0_io\[12\]
+ padframe/mprj_pads.loop1_io\[12\]
+ padframe/mprj_pads.io_in\[12\]
+ padframe/mprj_pads.io_in_3v3\[12\]
+ padframe/mprj_pads.analog_noesd_io\[5\]
+ padframe/mprj_pads.loop0_io\[13\]
+ padframe/mprj_pads.loop1_io\[13\]
+ padframe/mprj_pads.io_in\[13\]
+ padframe/mprj_pads.io_in_3v3\[13\]
+ padframe/mprj_pads.analog_noesd_io\[6\]
+ padframe/mprj_pads.loop0_io\[14\]
+ padframe/mprj_pads.loop1_io\[14\]
+ padframe/mprj_pads.io_in\[14\]
+ padframe/mprj_pads.io_in_3v3\[14\]
+ padframe/mprj_pads.analog_noesd_io\[7\]
+ padframe/mprj_pads.loop0_io\[15\]
+ padframe/mprj_pads.loop1_io\[15\]
+ padframe/mprj_pads.io_in\[15\]
+ padframe/mprj_pads.io_in_3v3\[15\]
+ padframe/mprj_pads.analog_noesd_io\[8\]
+ padframe/mprj_pads.loop0_io\[16\]
+ padframe/mprj_pads.loop1_io\[16\]
+ padframe/mprj_pads.io_in\[16\]
+ padframe/mprj_pads.io_in_3v3\[16\]
+ padframe/mprj_pads.analog_noesd_io\[9\]
+ padframe/mprj_pads.loop0_io\[17\]
+ padframe/mprj_pads.loop1_io\[17\]
+ padframe/mprj_pads.io_in\[17\]
+ padframe/mprj_pads.io_in_3v3\[17\]
+ padframe/mprj_pads.analog_noesd_io\[10\]
+ padframe/mprj_pads.loop0_io\[18\]
+ padframe/mprj_pads.loop1_io\[18\]
+ padframe/mprj_pads.io_in\[18\]
+ padframe/mprj_pads.io_in_3v3\[18\]
+ padframe/mprj_pads.analog_noesd_io\[11\]
+ padframe/mprj_pads.loop0_io\[1\]
+ padframe/mprj_pads.loop1_io\[1\]
+ padframe/mprj_pads.io_in\[1\]
+ padframe/mprj_pads.io_in_3v3\[1\]
+ padframe/mprj_pads.no_connect_1b\[1\]
+ padframe/mprj_pads.no_connect_1a\[1\]
+ padframe/mprj_pads.loop0_io\[2\]
+ padframe/mprj_pads.loop1_io\[2\]
+ padframe/mprj_pads.io_in\[2\]
+ padframe/mprj_pads.io_in_3v3\[2\]
+ padframe/mprj_pads.no_connect_1b\[2\]
+ padframe/mprj_pads.no_connect_1a\[2\]
+ padframe/mprj_pads.loop0_io\[3\]
+ padframe/mprj_pads.loop1_io\[3\]
+ padframe/mprj_pads.io_in\[3\]
+ padframe/mprj_pads.io_in_3v3\[3\]
+ padframe/mprj_pads.no_connect_1b\[3\]
+ padframe/mprj_pads.no_connect_1a\[3\]
+ padframe/mprj_pads.loop0_io\[4\]
+ padframe/mprj_pads.loop1_io\[4\]
+ padframe/mprj_pads.io_in\[4\]
+ padframe/mprj_pads.io_in_3v3\[4\]
+ padframe/mprj_pads.no_connect_1b\[4\]
+ padframe/mprj_pads.no_connect_1a\[4\]
+ padframe/mprj_pads.loop0_io\[5\]
+ padframe/mprj_pads.loop1_io\[5\]
+ padframe/mprj_pads.io_in\[5\]
+ padframe/mprj_pads.io_in_3v3\[5\]
+ padframe/mprj_pads.no_connect_1b\[5\]
+ padframe/mprj_pads.no_connect_1a\[5\]
+ padframe/mprj_pads.loop0_io\[6\]
+ padframe/mprj_pads.loop1_io\[6\]
+ padframe/mprj_pads.io_in\[6\]
+ padframe/mprj_pads.io_in_3v3\[6\]
+ padframe/mprj_pads.no_connect_1b\[6\]
+ padframe/mprj_pads.no_connect_1a\[6\]
+ padframe/mprj_pads.loop0_io\[7\]
+ padframe/mprj_pads.loop1_io\[7\]
+ padframe/mprj_pads.io_in\[7\]
+ padframe/mprj_pads.io_in_3v3\[7\]
+ padframe/mprj_pads.analog_noesd_io\[0\]
+ padframe/mprj_pads.loop0_io\[8\]
+ padframe/mprj_pads.loop1_io\[8\]
+ padframe/mprj_pads.io_in\[8\]
+ padframe/mprj_pads.io_in_3v3\[8\]
+ padframe/mprj_pads.analog_noesd_io\[1\]
+ padframe/mprj_pads.loop0_io\[9\]
+ padframe/mprj_pads.loop1_io\[9\]
+ padframe/mprj_pads.io_in\[9\]
+ padframe/mprj_pads.io_in_3v3\[9\]
+ padframe/mprj_pads.analog_noesd_io\[2\]
+ padframe/mprj_pads.loop0_io\[19\]
+ padframe/mprj_pads.loop1_io\[19\]
+ padframe/mprj_pads.io_in\[19\]
+ padframe/mprj_pads.io_in_3v3\[19\]
+ padframe/mprj_pads.analog_noesd_io\[12\]
+ padframe/mprj_pads.loop0_io\[29\]
+ padframe/mprj_pads.loop1_io\[29\]
+ padframe/mprj_pads.io_in\[29\]
+ padframe/mprj_pads.io_in_3v3\[29\]
+ padframe/mprj_pads.analog_noesd_io\[22\]
+ padframe/mprj_pads.loop0_io\[30\]
+ padframe/mprj_pads.loop1_io\[30\]
+ padframe/mprj_pads.io_in\[30\]
+ padframe/mprj_pads.io_in_3v3\[30\]
+ padframe/mprj_pads.analog_noesd_io\[23\]
+ padframe/mprj_pads.loop0_io\[31\]
+ padframe/mprj_pads.loop1_io\[31\]
+ padframe/mprj_pads.io_in\[31\]
+ padframe/mprj_pads.io_in_3v3\[31\]
+ padframe/mprj_pads.analog_noesd_io\[24\]
+ padframe/mprj_pads.loop0_io\[32\]
+ padframe/mprj_pads.loop1_io\[32\]
+ padframe/mprj_pads.io_in\[32\]
+ padframe/mprj_pads.io_in_3v3\[32\]
+ padframe/mprj_pads.analog_noesd_io\[25\]
+ padframe/mprj_pads.loop0_io\[33\]
+ padframe/mprj_pads.loop1_io\[33\]
+ padframe/mprj_pads.io_in\[33\]
+ padframe/mprj_pads.io_in_3v3\[33\]
+ padframe/mprj_pads.analog_noesd_io\[26\]
+ padframe/mprj_pads.loop0_io\[34\]
+ padframe/mprj_pads.loop1_io\[34\]
+ padframe/mprj_pads.io_in\[34\]
+ padframe/mprj_pads.io_in_3v3\[34\]
+ padframe/mprj_pads.analog_noesd_io\[27\]
+ padframe/mprj_pads.loop0_io\[35\]
+ padframe/mprj_pads.loop1_io\[35\]
+ padframe/mprj_pads.io_in\[35\]
+ padframe/mprj_pads.io_in_3v3\[35\]
+ padframe/mprj_pads.analog_noesd_io\[28\]
+ padframe/mprj_pads.loop0_io\[36\]
+ padframe/mprj_pads.loop1_io\[36\]
+ padframe/mprj_pads.io_in\[36\]
+ padframe/mprj_pads.io_in_3v3\[36\]
+ padframe/mprj_pads.no_connect_2b\[0\]
+ padframe/mprj_pads.no_connect_2a\[0\]
+ padframe/mprj_pads.loop0_io\[37\]
+ padframe/mprj_pads.loop1_io\[37\]
+ padframe/mprj_pads.io_in\[37\]
+ padframe/mprj_pads.io_in_3v3\[37\]
+ padframe/mprj_pads.no_connect_2b\[1\]
+ padframe/mprj_pads.no_connect_2a\[1\]
+ padframe/mprj_pads.loop0_io\[20\]
+ padframe/mprj_pads.loop1_io\[20\]
+ padframe/mprj_pads.io_in\[20\]
+ padframe/mprj_pads.io_in_3v3\[20\]
+ padframe/mprj_pads.analog_noesd_io\[13\]
+ padframe/mprj_pads.loop0_io\[21\]
+ padframe/mprj_pads.loop1_io\[21\]
+ padframe/mprj_pads.io_in\[21\]
+ padframe/mprj_pads.io_in_3v3\[21\]
+ padframe/mprj_pads.analog_noesd_io\[14\]
+ padframe/mprj_pads.loop0_io\[22\]
+ padframe/mprj_pads.loop1_io\[22\]
+ padframe/mprj_pads.io_in\[22\]
+ padframe/mprj_pads.io_in_3v3\[22\]
+ padframe/mprj_pads.analog_noesd_io\[15\]
+ padframe/mprj_pads.loop0_io\[23\]
+ padframe/mprj_pads.loop1_io\[23\]
+ padframe/mprj_pads.io_in\[23\]
+ padframe/mprj_pads.io_in_3v3\[23\]
+ padframe/mprj_pads.analog_noesd_io\[16\]
+ padframe/mprj_pads.loop0_io\[24\]
+ padframe/mprj_pads.loop1_io\[24\]
+ padframe/mprj_pads.io_in\[24\]
+ padframe/mprj_pads.io_in_3v3\[24\]
+ padframe/mprj_pads.analog_noesd_io\[17\]
+ padframe/mprj_pads.loop0_io\[25\]
+ padframe/mprj_pads.loop1_io\[25\]
+ padframe/mprj_pads.io_in\[25\]
+ padframe/mprj_pads.io_in_3v3\[25\]
+ padframe/mprj_pads.analog_noesd_io\[18\]
+ padframe/mprj_pads.loop0_io\[26\]
+ padframe/mprj_pads.loop1_io\[26\]
+ padframe/mprj_pads.io_in\[26\]
+ padframe/mprj_pads.io_in_3v3\[26\]
+ padframe/mprj_pads.analog_noesd_io\[19\]
+ padframe/mprj_pads.loop0_io\[27\]
+ padframe/mprj_pads.loop1_io\[27\]
+ padframe/mprj_pads.io_in\[27\]
+ padframe/mprj_pads.io_in_3v3\[27\]
+ padframe/mprj_pads.analog_noesd_io\[20\]
+ padframe/mprj_pads.loop0_io\[28\]
+ padframe/mprj_pads.loop1_io\[28\]
+ padframe/mprj_pads.io_in\[28\]
+ padframe/mprj_pads.io_in_3v3\[28\]
+ padframe/mprj_pads.analog_noesd_io\[21\]
+ padframe/xres_vss_loop
+ padframe/xresloop
+ rstb_level/X
+ sigbuf/buf_out\[0\]
+ sigbuf/buf_out\[100\]
+ sigbuf/buf_in\[102\]
+ sigbuf/buf_out\[102\]
+ sigbuf/buf_in\[104\]
+ sigbuf/buf_out\[104\]
+ sigbuf/buf_in\[106\]
+ sigbuf/buf_in\[107\]
+ sigbuf/buf_out\[107\]
+ sigbuf/buf_in\[109\]
+ sigbuf/buf_in\[110\]
+ sigbuf/buf_in\[11\]
+ sigbuf/buf_out\[110\]
+ sigbuf/buf_in\[112\]
+ sigbuf/buf_in\[113\]
+ sigbuf/buf_out\[113\]
+ sigbuf/buf_in\[115\]
+ sigbuf/buf_in\[116\]
+ sigbuf/buf_in\[117\]
+ sigbuf/buf_out\[117\]
+ sigbuf/buf_in\[119\]
+ sigbuf/buf_in\[120\]
+ sigbuf/buf_in\[12\]
+ sigbuf/buf_in\[121\]
+ sigbuf/buf_in\[122\]
+ sigbuf/buf_in\[123\]
+ sigbuf/buf_out\[123\]
+ sigbuf/buf_in\[125\]
+ sigbuf/buf_in\[126\]
+ sigbuf/buf_in\[127\]
+ sigbuf/buf_in\[128\]
+ sigbuf/buf_in\[129\]
+ sigbuf/buf_out\[129\]
+ sigbuf/buf_out\[12\]
+ sigbuf/buf_in\[131\]
+ sigbuf/buf_in\[132\]
+ sigbuf/buf_in\[133\]
+ sigbuf/buf_in\[134\]
+ sigbuf/buf_in\[135\]
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+ sigbuf/buf_in\[137\]
+ sigbuf/buf_in\[138\]
+ sigbuf/buf_in\[139\]
+ sigbuf/buf_in\[140\]
+ sigbuf/buf_in\[14\]
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+ sigbuf/buf_in\[142\]
+ sigbuf/buf_in\[143\]
+ sigbuf/buf_in\[144\]
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+ sigbuf/buf_in\[147\]
+ sigbuf/buf_in\[148\]
+ sigbuf/buf_in\[149\]
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+ sigbuf/buf_in\[15\]
+ sigbuf/buf_in\[151\]
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+ sigbuf/buf_in\[174\]
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+ sigbuf/buf_in\[191\]
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+ sigbuf/buf_in\[193\]
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+ sigbuf/buf_in\[195\]
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+ sigbuf/buf_in\[20\]
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+ sigbuf/buf_in\[82\]
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+ sigbuf/buf_in\[85\]
+ sigbuf/buf_in\[86\]
+ sigbuf/buf_out\[86\]
+ sigbuf/buf_in\[88\]
+ sigbuf/buf_out\[88\]
+ sigbuf/buf_in\[90\]
+ sigbuf/buf_in\[9\]
+ sigbuf/buf_out\[90\]
+ sigbuf/buf_in\[92\]
+ sigbuf/buf_out\[92\]
+ sigbuf/buf_in\[94\]
+ sigbuf/buf_out\[94\]
+ sigbuf/buf_out\[95\]
+ sigbuf/buf_out\[96\]
+ sigbuf/buf_out\[97\]
+ sigbuf/buf_out\[98\]
+ sigbuf/buf_out\[99\]
+ sigbuf/buf_out\[9\]
+ user_id_value/user_proj_id_high\[0\]
+ user_id_value/user_proj_id_high\[10\]
+ user_id_value/user_proj_id_high\[11\]
+ user_id_value/user_proj_id_high\[12\]
+ user_id_value/user_proj_id_high\[13\]
+ user_id_value/user_proj_id_high\[14\]
+ user_id_value/user_proj_id_high\[15\]
+ user_id_value/user_proj_id_high\[16\]
+ user_id_value/user_proj_id_high\[17\]
+ user_id_value/user_proj_id_high\[18\]
+ user_id_value/user_proj_id_high\[19\]
+ user_id_value/user_proj_id_high\[1\]
+ user_id_value/user_proj_id_high\[20\]
+ user_id_value/user_proj_id_high\[21\]
+ user_id_value/user_proj_id_high\[22\]
+ user_id_value/user_proj_id_high\[23\]
+ user_id_value/user_proj_id_high\[24\]
+ user_id_value/user_proj_id_high\[25\]
+ user_id_value/user_proj_id_high\[26\]
+ user_id_value/user_proj_id_high\[27\]
+ user_id_value/user_proj_id_high\[28\]
+ user_id_value/user_proj_id_high\[29\]
+ user_id_value/user_proj_id_high\[2\]
+ user_id_value/user_proj_id_high\[30\]
+ user_id_value/user_proj_id_high\[31\]
+ user_id_value/user_proj_id_high\[3\]
+ user_id_value/user_proj_id_high\[4\]
+ user_id_value/user_proj_id_high\[5\]
+ user_id_value/user_proj_id_high\[6\]
+ user_id_value/user_proj_id_high\[7\]
+ user_id_value/user_proj_id_high\[8\]
+ user_id_value/user_proj_id_high\[9\]
+ spare_logic\[0\]/spare_xfq[1]
+ spare_logic\[0\]/spare_xfq[0]
+ spare_logic\[0\]/spare_xfqn[1]
+ spare_logic\[0\]/spare_xfqn[0]
+ spare_logic\[0\]/spare_xi[3]
+ spare_logic\[0\]/spare_xi[2]
+ spare_logic\[0\]/spare_xi[1]
+ spare_logic\[0\]/spare_xi[0]
+ spare_logic\[0\]/spare_xib
+ spare_logic\[0\]/spare_xmx[1]
+ spare_logic\[0\]/spare_xmx[0]
+ spare_logic\[0\]/spare_xna[1]
+ spare_logic\[0\]/spare_xna[0]
+ spare_logic\[0\]/spare_xno[1]
+ spare_logic\[0\]/spare_xno[0]
+ spare_logic\[0\]/spare_xz[26]
+ spare_logic\[0\]/spare_xz[25]
+ spare_logic\[0\]/spare_xz[24]
+ spare_logic\[0\]/spare_xz[23]
+ spare_logic\[0\]/spare_xz[22]
+ spare_logic\[0\]/spare_xz[21]
+ spare_logic\[0\]/spare_xz[20]
+ spare_logic\[0\]/spare_xz[19]
+ spare_logic\[0\]/spare_xz[18]
+ spare_logic\[0\]/spare_xz[17]
+ spare_logic\[0\]/spare_xz[16]
+ spare_logic\[0\]/spare_xz[15]
+ spare_logic\[0\]/spare_xz[14]
+ spare_logic\[0\]/spare_xz[13]
+ spare_logic\[0\]/spare_xz[12]
+ spare_logic\[0\]/spare_xz[11]
+ spare_logic\[0\]/spare_xz[10]
+ spare_logic\[0\]/spare_xz[9]
+ spare_logic\[0\]/spare_xz[8]
+ spare_logic\[0\]/spare_xz[7]
+ spare_logic\[0\]/spare_xz[6]
+ spare_logic\[0\]/spare_xz[5]
+ spare_logic\[0\]/spare_xz[4]
+ spare_logic\[0\]/spare_xz[3]
+ spare_logic\[0\]/spare_xz[2]
+ spare_logic\[0\]/spare_xz[1]
+ spare_logic\[0\]/spare_xz[0]
+ spare_logic\[0\]/spare_logic1\[0\]
+ spare_logic\[0\]/spare_logic1\[10\]
+ spare_logic\[0\]/spare_logic1\[11\]
+ spare_logic\[0\]/spare_logic1\[12\]
+ spare_logic\[0\]/spare_logic1\[13\]
+ spare_logic\[0\]/spare_logic1\[14\]
+ spare_logic\[0\]/spare_logic1\[15\]
+ spare_logic\[0\]/spare_logic1\[16\]
+ spare_logic\[0\]/spare_logic1\[17\]
+ spare_logic\[0\]/spare_logic1\[18\]
+ spare_logic\[0\]/spare_logic1\[19\]
+ spare_logic\[0\]/spare_logic1\[1\]
+ spare_logic\[0\]/spare_logic1\[20\]
+ spare_logic\[0\]/spare_logic1\[21\]
+ spare_logic\[0\]/spare_logic1\[22\]
+ spare_logic\[0\]/spare_logic1\[23\]
+ spare_logic\[0\]/spare_logic1\[24\]
+ spare_logic\[0\]/spare_logic1\[25\]
+ spare_logic\[0\]/spare_logic1\[26\]
+ spare_logic\[0\]/spare_logic1\[2\]
+ spare_logic\[0\]/spare_logic1\[3\]
+ spare_logic\[0\]/spare_logic1\[4\]
+ spare_logic\[0\]/spare_logic1\[5\]
+ spare_logic\[0\]/spare_logic1\[6\]
+ spare_logic\[0\]/spare_logic1\[7\]
+ spare_logic\[0\]/spare_logic1\[8\]
+ spare_logic\[0\]/spare_logic1\[9\]
+ spare_logic\[1\]/spare_xfq[1]
+ spare_logic\[1\]/spare_xfq[0]
+ spare_logic\[1\]/spare_xfqn[1]
+ spare_logic\[1\]/spare_xfqn[0]
+ spare_logic\[1\]/spare_xi[3]
+ spare_logic\[1\]/spare_xi[2]
+ spare_logic\[1\]/spare_xi[1]
+ spare_logic\[1\]/spare_xi[0]
+ spare_logic\[1\]/spare_xib
+ spare_logic\[1\]/spare_xmx[1]
+ spare_logic\[1\]/spare_xmx[0]
+ spare_logic\[1\]/spare_xna[1]
+ spare_logic\[1\]/spare_xna[0]
+ spare_logic\[1\]/spare_xno[1]
+ spare_logic\[1\]/spare_xno[0]
+ spare_logic\[1\]/spare_xz[26]
+ spare_logic\[1\]/spare_xz[25]
+ spare_logic\[1\]/spare_xz[24]
+ spare_logic\[1\]/spare_xz[23]
+ spare_logic\[1\]/spare_xz[22]
+ spare_logic\[1\]/spare_xz[21]
+ spare_logic\[1\]/spare_xz[20]
+ spare_logic\[1\]/spare_xz[19]
+ spare_logic\[1\]/spare_xz[18]
+ spare_logic\[1\]/spare_xz[17]
+ spare_logic\[1\]/spare_xz[16]
+ spare_logic\[1\]/spare_xz[15]
+ spare_logic\[1\]/spare_xz[14]
+ spare_logic\[1\]/spare_xz[13]
+ spare_logic\[1\]/spare_xz[12]
+ spare_logic\[1\]/spare_xz[11]
+ spare_logic\[1\]/spare_xz[10]
+ spare_logic\[1\]/spare_xz[9]
+ spare_logic\[1\]/spare_xz[8]
+ spare_logic\[1\]/spare_xz[7]
+ spare_logic\[1\]/spare_xz[6]
+ spare_logic\[1\]/spare_xz[5]
+ spare_logic\[1\]/spare_xz[4]
+ spare_logic\[1\]/spare_xz[3]
+ spare_logic\[1\]/spare_xz[2]
+ spare_logic\[1\]/spare_xz[1]
+ spare_logic\[1\]/spare_xz[0]
+ spare_logic\[1\]/spare_logic1\[0\]
+ spare_logic\[1\]/spare_logic1\[10\]
+ spare_logic\[1\]/spare_logic1\[11\]
+ spare_logic\[1\]/spare_logic1\[12\]
+ spare_logic\[1\]/spare_logic1\[13\]
+ spare_logic\[1\]/spare_logic1\[14\]
+ spare_logic\[1\]/spare_logic1\[15\]
+ spare_logic\[1\]/spare_logic1\[16\]
+ spare_logic\[1\]/spare_logic1\[17\]
+ spare_logic\[1\]/spare_logic1\[18\]
+ spare_logic\[1\]/spare_logic1\[19\]
+ spare_logic\[1\]/spare_logic1\[1\]
+ spare_logic\[1\]/spare_logic1\[20\]
+ spare_logic\[1\]/spare_logic1\[21\]
+ spare_logic\[1\]/spare_logic1\[22\]
+ spare_logic\[1\]/spare_logic1\[23\]
+ spare_logic\[1\]/spare_logic1\[24\]
+ spare_logic\[1\]/spare_logic1\[25\]
+ spare_logic\[1\]/spare_logic1\[26\]
+ spare_logic\[1\]/spare_logic1\[2\]
+ spare_logic\[1\]/spare_logic1\[3\]
+ spare_logic\[1\]/spare_logic1\[4\]
+ spare_logic\[1\]/spare_logic1\[5\]
+ spare_logic\[1\]/spare_logic1\[6\]
+ spare_logic\[1\]/spare_logic1\[7\]
+ spare_logic\[1\]/spare_logic1\[8\]
+ spare_logic\[1\]/spare_logic1\[9\]
+ spare_logic\[2\]/spare_xfq[1]
+ spare_logic\[2\]/spare_xfq[0]
+ spare_logic\[2\]/spare_xfqn[1]
+ spare_logic\[2\]/spare_xfqn[0]
+ spare_logic\[2\]/spare_xi[3]
+ spare_logic\[2\]/spare_xi[2]
+ spare_logic\[2\]/spare_xi[1]
+ spare_logic\[2\]/spare_xi[0]
+ spare_logic\[2\]/spare_xib
+ spare_logic\[2\]/spare_xmx[1]
+ spare_logic\[2\]/spare_xmx[0]
+ spare_logic\[2\]/spare_xna[1]
+ spare_logic\[2\]/spare_xna[0]
+ spare_logic\[2\]/spare_xno[1]
+ spare_logic\[2\]/spare_xno[0]
+ spare_logic\[2\]/spare_xz[26]
+ spare_logic\[2\]/spare_xz[25]
+ spare_logic\[2\]/spare_xz[24]
+ spare_logic\[2\]/spare_xz[23]
+ spare_logic\[2\]/spare_xz[22]
+ spare_logic\[2\]/spare_xz[21]
+ spare_logic\[2\]/spare_xz[20]
+ spare_logic\[2\]/spare_xz[19]
+ spare_logic\[2\]/spare_xz[18]
+ spare_logic\[2\]/spare_xz[17]
+ spare_logic\[2\]/spare_xz[16]
+ spare_logic\[2\]/spare_xz[15]
+ spare_logic\[2\]/spare_xz[14]
+ spare_logic\[2\]/spare_xz[13]
+ spare_logic\[2\]/spare_xz[12]
+ spare_logic\[2\]/spare_xz[11]
+ spare_logic\[2\]/spare_xz[10]
+ spare_logic\[2\]/spare_xz[9]
+ spare_logic\[2\]/spare_xz[8]
+ spare_logic\[2\]/spare_xz[7]
+ spare_logic\[2\]/spare_xz[6]
+ spare_logic\[2\]/spare_xz[5]
+ spare_logic\[2\]/spare_xz[4]
+ spare_logic\[2\]/spare_xz[3]
+ spare_logic\[2\]/spare_xz[2]
+ spare_logic\[2\]/spare_xz[1]
+ spare_logic\[2\]/spare_xz[0]
+ spare_logic\[2\]/spare_logic1\[0\]
+ spare_logic\[2\]/spare_logic1\[10\]
+ spare_logic\[2\]/spare_logic1\[11\]
+ spare_logic\[2\]/spare_logic1\[12\]
+ spare_logic\[2\]/spare_logic1\[13\]
+ spare_logic\[2\]/spare_logic1\[14\]
+ spare_logic\[2\]/spare_logic1\[15\]
+ spare_logic\[2\]/spare_logic1\[16\]
+ spare_logic\[2\]/spare_logic1\[17\]
+ spare_logic\[2\]/spare_logic1\[18\]
+ spare_logic\[2\]/spare_logic1\[19\]
+ spare_logic\[2\]/spare_logic1\[1\]
+ spare_logic\[2\]/spare_logic1\[20\]
+ spare_logic\[2\]/spare_logic1\[21\]
+ spare_logic\[2\]/spare_logic1\[22\]
+ spare_logic\[2\]/spare_logic1\[23\]
+ spare_logic\[2\]/spare_logic1\[24\]
+ spare_logic\[2\]/spare_logic1\[25\]
+ spare_logic\[2\]/spare_logic1\[26\]
+ spare_logic\[2\]/spare_logic1\[2\]
+ spare_logic\[2\]/spare_logic1\[3\]
+ spare_logic\[2\]/spare_logic1\[4\]
+ spare_logic\[2\]/spare_logic1\[5\]
+ spare_logic\[2\]/spare_logic1\[6\]
+ spare_logic\[2\]/spare_logic1\[7\]
+ spare_logic\[2\]/spare_logic1\[8\]
+ spare_logic\[2\]/spare_logic1\[9\]
+ spare_logic\[3\]/spare_xfq[1]
+ spare_logic\[3\]/spare_xfq[0]
+ spare_logic\[3\]/spare_xfqn[1]
+ spare_logic\[3\]/spare_xfqn[0]
+ spare_logic\[3\]/spare_xi[3]
+ spare_logic\[3\]/spare_xi[2]
+ spare_logic\[3\]/spare_xi[1]
+ spare_logic\[3\]/spare_xi[0]
+ spare_logic\[3\]/spare_xib
+ spare_logic\[3\]/spare_xmx[1]
+ spare_logic\[3\]/spare_xmx[0]
+ spare_logic\[3\]/spare_xna[1]
+ spare_logic\[3\]/spare_xna[0]
+ spare_logic\[3\]/spare_xno[1]
+ spare_logic\[3\]/spare_xno[0]
+ spare_logic\[3\]/spare_xz[26]
+ spare_logic\[3\]/spare_xz[25]
+ spare_logic\[3\]/spare_xz[24]
+ spare_logic\[3\]/spare_xz[23]
+ spare_logic\[3\]/spare_xz[22]
+ spare_logic\[3\]/spare_xz[21]
+ spare_logic\[3\]/spare_xz[20]
+ spare_logic\[3\]/spare_xz[19]
+ spare_logic\[3\]/spare_xz[18]
+ spare_logic\[3\]/spare_xz[17]
+ spare_logic\[3\]/spare_xz[16]
+ spare_logic\[3\]/spare_xz[15]
+ spare_logic\[3\]/spare_xz[14]
+ spare_logic\[3\]/spare_xz[13]
+ spare_logic\[3\]/spare_xz[12]
+ spare_logic\[3\]/spare_xz[11]
+ spare_logic\[3\]/spare_xz[10]
+ spare_logic\[3\]/spare_xz[9]
+ spare_logic\[3\]/spare_xz[8]
+ spare_logic\[3\]/spare_xz[7]
+ spare_logic\[3\]/spare_xz[6]
+ spare_logic\[3\]/spare_xz[5]
+ spare_logic\[3\]/spare_xz[4]
+ spare_logic\[3\]/spare_xz[3]
+ spare_logic\[3\]/spare_xz[2]
+ spare_logic\[3\]/spare_xz[1]
+ spare_logic\[3\]/spare_xz[0]
+ spare_logic\[3\]/spare_logic1\[0\]
+ spare_logic\[3\]/spare_logic1\[10\]
+ spare_logic\[3\]/spare_logic1\[11\]
+ spare_logic\[3\]/spare_logic1\[12\]
+ spare_logic\[3\]/spare_logic1\[13\]
+ spare_logic\[3\]/spare_logic1\[14\]
+ spare_logic\[3\]/spare_logic1\[15\]
+ spare_logic\[3\]/spare_logic1\[16\]
+ spare_logic\[3\]/spare_logic1\[17\]
+ spare_logic\[3\]/spare_logic1\[18\]
+ spare_logic\[3\]/spare_logic1\[19\]
+ spare_logic\[3\]/spare_logic1\[1\]
+ spare_logic\[3\]/spare_logic1\[20\]
+ spare_logic\[3\]/spare_logic1\[21\]
+ spare_logic\[3\]/spare_logic1\[22\]
+ spare_logic\[3\]/spare_logic1\[23\]
+ spare_logic\[3\]/spare_logic1\[24\]
+ spare_logic\[3\]/spare_logic1\[25\]
+ spare_logic\[3\]/spare_logic1\[26\]
+ spare_logic\[3\]/spare_logic1\[2\]
+ spare_logic\[3\]/spare_logic1\[3\]
+ spare_logic\[3\]/spare_logic1\[4\]
+ spare_logic\[3\]/spare_logic1\[5\]
+ spare_logic\[3\]/spare_logic1\[6\]
+ spare_logic\[3\]/spare_logic1\[7\]
+ spare_logic\[3\]/spare_logic1\[8\]
+ spare_logic\[3\]/spare_logic1\[9\]
+ user_id_value/mask_rev[31]
+ user_id_value/mask_rev[30]
+ user_id_value/mask_rev[29]
+ user_id_value/mask_rev[28]
+ user_id_value/mask_rev[27]
+ user_id_value/mask_rev[26]
+ user_id_value/mask_rev[25]
+ user_id_value/mask_rev[24]
+ user_id_value/mask_rev[23]
+ user_id_value/mask_rev[22]
+ user_id_value/mask_rev[21]
+ user_id_value/mask_rev[20]
+ user_id_value/mask_rev[19]
+ user_id_value/mask_rev[18]
+ user_id_value/mask_rev[17]
+ user_id_value/mask_rev[16]
+ user_id_value/mask_rev[15]
+ user_id_value/mask_rev[14]
+ user_id_value/mask_rev[13]
+ user_id_value/mask_rev[12]
+ user_id_value/mask_rev[11]
+ user_id_value/mask_rev[10]
+ user_id_value/mask_rev[9]
+ user_id_value/mask_rev[8]
+ user_id_value/mask_rev[7]
+ user_id_value/mask_rev[6]
+ user_id_value/mask_rev[5]
+ user_id_value/mask_rev[4]
+ user_id_value/mask_rev[3]
+ user_id_value/mask_rev[2]
+ user_id_value/mask_rev[1]
+ user_id_value/mask_rev[0]
+Found 629 partially unannotated nets.
+ flash_clkrst_buffers/out_s[7]
+  padframe/flash_clk_pad/OE_N
+ flash_clkrst_buffers/out_s[8]
+  padframe/flash_csb_pad/OUT
+ flash_clkrst_buffers/out_s[9]
+  padframe/flash_clk_pad/OUT
+ flash_clkrst_buffers/out_s[0]
+  padframe/flash_io1_pad/OUT
+ flash_clkrst_buffers/out_s[1]
+  padframe/flash_io0_pad/OUT
+ flash_clkrst_buffers/out_s[2]
+  padframe/flash_io1_pad/DM[2]
+  padframe/flash_io1_pad/DM[1]
+  padframe/flash_io1_pad/INP_DIS
+ flash_clkrst_buffers/out_s[3]
+  padframe/flash_io0_pad/DM[2]
+  padframe/flash_io0_pad/DM[1]
+  padframe/flash_io0_pad/INP_DIS
+ flash_clkrst_buffers/out_s[4]
+  padframe/flash_io1_pad/DM[0]
+  padframe/flash_io1_pad/OE_N
+ flash_clkrst_buffers/out_s[5]
+  padframe/flash_io0_pad/DM[0]
+  padframe/flash_io0_pad/OE_N
+ flash_clkrst_buffers/out_s[6]
+  padframe/flash_csb_pad/OE_N
+ gpio_control_bidir_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[0]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[1]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[2]
+ gpio_control_bidir_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[0\]/HLD_OVR
+ gpio_control_bidir_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[0\]/INP_DIS
+ gpio_control_bidir_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[0\]/OUT
+ gpio_control_bidir_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[0\]/OE_N
+ gpio_control_bidir_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/SLOW
+ gpio_control_bidir_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/VTRIP_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_EN
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_POL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_SEL
+ gpio_control_bidir_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[0]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[1]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[2]
+ gpio_control_bidir_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[1\]/HLD_OVR
+ gpio_control_bidir_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[1\]/INP_DIS
+ gpio_control_bidir_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[1\]/OUT
+ gpio_control_bidir_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[1\]/OE_N
+ gpio_control_bidir_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/SLOW
+ gpio_control_bidir_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/VTRIP_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_EN
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_POL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_SEL
+ gpio_control_bidir_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[0]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[1]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[2]
+ gpio_control_bidir_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[16\]/HLD_OVR
+ gpio_control_bidir_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_bidir_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[16\]/INP_DIS
+ gpio_control_bidir_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[16\]/OUT
+ gpio_control_bidir_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[16\]/OE_N
+ gpio_control_bidir_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/SLOW
+ gpio_control_bidir_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/VTRIP_SEL
+ gpio_control_bidir_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[89\]/A
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_EN
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_POL
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_SEL
+ gpio_control_bidir_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[0]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[1]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[2]
+ gpio_control_bidir_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[17\]/HLD_OVR
+ gpio_control_bidir_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_bidir_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[17\]/INP_DIS
+ gpio_control_bidir_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[17\]/OUT
+ gpio_control_bidir_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[17\]/OE_N
+ gpio_control_bidir_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/SLOW
+ gpio_control_bidir_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/VTRIP_SEL
+ gpio_control_bidir_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[91\]/A
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_EN
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_POL
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_SEL
+ gpio_control_bidir_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[0]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[1]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[2]
+ gpio_control_bidir_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[18\]/HLD_OVR
+ gpio_control_bidir_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_bidir_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[18\]/INP_DIS
+ gpio_control_bidir_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[18\]/OUT
+ gpio_control_bidir_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[18\]/OE_N
+ gpio_control_bidir_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/SLOW
+ gpio_control_bidir_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/VTRIP_SEL
+ gpio_control_bidir_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[93\]/A
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_EN
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_POL
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[0]
+ gpio_control_in_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[1]
+ gpio_control_in_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[2]
+ gpio_control_in_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[8\]/HLD_OVR
+ gpio_control_in_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[8\]/INP_DIS
+ gpio_control_in_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[8\]/OUT
+ gpio_control_in_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[8\]/OE_N
+ gpio_control_in_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/SLOW
+ gpio_control_in_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_1\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[1\]/A
+ gpio_control_in_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_1\[10\]/one
+  padframe/mprj_pads.area1_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_in_1\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[0]
+ gpio_control_in_1\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[1]
+ gpio_control_in_1\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[2]
+ gpio_control_in_1\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[18\]/HLD_OVR
+ gpio_control_in_1\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_in_1\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[18\]/INP_DIS
+ gpio_control_in_1\[10\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[18\]/OUT
+ gpio_control_in_1\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[18\]/OE_N
+ gpio_control_in_1\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/SLOW
+ gpio_control_in_1\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/VTRIP_SEL
+ gpio_control_in_1\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[19\]/A
+ gpio_control_in_1\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_EN
+ gpio_control_in_1\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_POL
+ gpio_control_in_1\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[0]
+ gpio_control_in_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[1]
+ gpio_control_in_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[2]
+ gpio_control_in_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[9\]/HLD_OVR
+ gpio_control_in_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[9\]/INP_DIS
+ gpio_control_in_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[9\]/OUT
+ gpio_control_in_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[9\]/OE_N
+ gpio_control_in_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/SLOW
+ gpio_control_in_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_1\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[2\]/A
+ gpio_control_in_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_SEL
+ gpio_control_in_1\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_1\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[0]
+ gpio_control_in_1\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[1]
+ gpio_control_in_1\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[2]
+ gpio_control_in_1\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[10\]/HLD_OVR
+ gpio_control_in_1\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_1\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[10\]/INP_DIS
+ gpio_control_in_1\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[10\]/OUT
+ gpio_control_in_1\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[10\]/OE_N
+ gpio_control_in_1\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/SLOW
+ gpio_control_in_1\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_1\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[3\]/A
+ gpio_control_in_1\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_1\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_1\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_1\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_1\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[0]
+ gpio_control_in_1\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[1]
+ gpio_control_in_1\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[2]
+ gpio_control_in_1\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[11\]/HLD_OVR
+ gpio_control_in_1\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_1\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[11\]/INP_DIS
+ gpio_control_in_1\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[11\]/OUT
+ gpio_control_in_1\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[11\]/OE_N
+ gpio_control_in_1\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/SLOW
+ gpio_control_in_1\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_1\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[4\]/A
+ gpio_control_in_1\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_1\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_1\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_1\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_1\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[0]
+ gpio_control_in_1\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[1]
+ gpio_control_in_1\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[2]
+ gpio_control_in_1\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[12\]/HLD_OVR
+ gpio_control_in_1\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_1\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[12\]/INP_DIS
+ gpio_control_in_1\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[12\]/OUT
+ gpio_control_in_1\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[12\]/OE_N
+ gpio_control_in_1\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/SLOW
+ gpio_control_in_1\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_1\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[5\]/A
+ gpio_control_in_1\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_1\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_1\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_1\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_1\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[0]
+ gpio_control_in_1\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[1]
+ gpio_control_in_1\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[2]
+ gpio_control_in_1\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[13\]/HLD_OVR
+ gpio_control_in_1\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_1\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[13\]/INP_DIS
+ gpio_control_in_1\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[13\]/OUT
+ gpio_control_in_1\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[13\]/OE_N
+ gpio_control_in_1\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/SLOW
+ gpio_control_in_1\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_1\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[6\]/A
+ gpio_control_in_1\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_1\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_1\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_1\[6\]/one
+  padframe/mprj_pads.area1_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_1\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[0]
+ gpio_control_in_1\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[1]
+ gpio_control_in_1\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[2]
+ gpio_control_in_1\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[14\]/HLD_OVR
+ gpio_control_in_1\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_1\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[14\]/INP_DIS
+ gpio_control_in_1\[6\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[14\]/OUT
+ gpio_control_in_1\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[14\]/OE_N
+ gpio_control_in_1\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/SLOW
+ gpio_control_in_1\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_1\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[8\]/A
+ gpio_control_in_1\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_1\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_1\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_1\[7\]/one
+  padframe/mprj_pads.area1_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_1\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[0]
+ gpio_control_in_1\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[1]
+ gpio_control_in_1\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[2]
+ gpio_control_in_1\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[15\]/HLD_OVR
+ gpio_control_in_1\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_1\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[15\]/INP_DIS
+ gpio_control_in_1\[7\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[15\]/OUT
+ gpio_control_in_1\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[15\]/OE_N
+ gpio_control_in_1\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/SLOW
+ gpio_control_in_1\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_1\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[10\]/A
+ gpio_control_in_1\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_1\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_1\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_1\[8\]/one
+  padframe/mprj_pads.area1_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_in_1\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[0]
+ gpio_control_in_1\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[1]
+ gpio_control_in_1\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[2]
+ gpio_control_in_1\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[16\]/HLD_OVR
+ gpio_control_in_1\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_in_1\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[16\]/INP_DIS
+ gpio_control_in_1\[8\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[16\]/OUT
+ gpio_control_in_1\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[16\]/OE_N
+ gpio_control_in_1\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/SLOW
+ gpio_control_in_1\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/VTRIP_SEL
+ gpio_control_in_1\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[13\]/A
+ gpio_control_in_1\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_EN
+ gpio_control_in_1\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_POL
+ gpio_control_in_1\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_SEL
+ gpio_control_in_1\[9\]/one
+  padframe/mprj_pads.area1_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_in_1\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[0]
+ gpio_control_in_1\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[1]
+ gpio_control_in_1\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[2]
+ gpio_control_in_1\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[17\]/HLD_OVR
+ gpio_control_in_1\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_in_1\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[17\]/INP_DIS
+ gpio_control_in_1\[9\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[17\]/OUT
+ gpio_control_in_1\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[17\]/OE_N
+ gpio_control_in_1\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/SLOW
+ gpio_control_in_1\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/VTRIP_SEL
+ gpio_control_in_1\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[16\]/A
+ gpio_control_in_1\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_EN
+ gpio_control_in_1\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_POL
+ gpio_control_in_1\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_SEL
+ gpio_control_in_1a\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_1a\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[0]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[1]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[2]
+ gpio_control_in_1a\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[2\]/HLD_OVR
+ gpio_control_in_1a\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[2\]/INP_DIS
+ gpio_control_in_1a\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[2\]/OUT
+ gpio_control_in_1a\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[2\]/OE_N
+ gpio_control_in_1a\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/SLOW
+ gpio_control_in_1a\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_1a\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_1a\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_1a\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[0]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[1]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[2]
+ gpio_control_in_1a\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[3\]/HLD_OVR
+ gpio_control_in_1a\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[3\]/INP_DIS
+ gpio_control_in_1a\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[3\]/OUT
+ gpio_control_in_1a\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[3\]/OE_N
+ gpio_control_in_1a\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/SLOW
+ gpio_control_in_1a\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_1a\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_1a\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_1a\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[0]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[1]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[2]
+ gpio_control_in_1a\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[4\]/HLD_OVR
+ gpio_control_in_1a\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[4\]/INP_DIS
+ gpio_control_in_1a\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[4\]/OUT
+ gpio_control_in_1a\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[4\]/OE_N
+ gpio_control_in_1a\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/SLOW
+ gpio_control_in_1a\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_1a\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_1a\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_1a\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[0]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[1]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[2]
+ gpio_control_in_1a\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[5\]/HLD_OVR
+ gpio_control_in_1a\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[5\]/INP_DIS
+ gpio_control_in_1a\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[5\]/OUT
+ gpio_control_in_1a\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[5\]/OE_N
+ gpio_control_in_1a\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/SLOW
+ gpio_control_in_1a\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_1a\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_1a\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_1a\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[0]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[1]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[2]
+ gpio_control_in_1a\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[6\]/HLD_OVR
+ gpio_control_in_1a\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[6\]/INP_DIS
+ gpio_control_in_1a\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[6\]/OUT
+ gpio_control_in_1a\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[6\]/OE_N
+ gpio_control_in_1a\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/SLOW
+ gpio_control_in_1a\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_1a\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_1a\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_1a\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[0]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[1]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[2]
+ gpio_control_in_1a\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[7\]/HLD_OVR
+ gpio_control_in_1a\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_1a\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[7\]/INP_DIS
+ gpio_control_in_1a\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[7\]/OUT
+ gpio_control_in_1a\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[7\]/OE_N
+ gpio_control_in_1a\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/SLOW
+ gpio_control_in_1a\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_1a\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[0\]/A
+ gpio_control_in_1a\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_1a\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_1a\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_in_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[0]
+ gpio_control_in_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[1]
+ gpio_control_in_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[2]
+ gpio_control_in_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[0\]/HLD_OVR
+ gpio_control_in_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_in_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[0\]/INP_DIS
+ gpio_control_in_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[0\]/OUT
+ gpio_control_in_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[0\]/OE_N
+ gpio_control_in_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/SLOW
+ gpio_control_in_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/VTRIP_SEL
+ gpio_control_in_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[23\]/A
+ gpio_control_in_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_EN
+ gpio_control_in_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_POL
+ gpio_control_in_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_SEL
+ gpio_control_in_2\[10\]/one
+  padframe/mprj_pads.area2_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_2\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[0]
+ gpio_control_in_2\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[1]
+ gpio_control_in_2\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[2]
+ gpio_control_in_2\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[10\]/HLD_OVR
+ gpio_control_in_2\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_2\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[10\]/INP_DIS
+ gpio_control_in_2\[10\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[10\]/OUT
+ gpio_control_in_2\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[10\]/OE_N
+ gpio_control_in_2\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/SLOW
+ gpio_control_in_2\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_2\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[71\]/A
+ gpio_control_in_2\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_2\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_2\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_2\[11\]/one
+  padframe/mprj_pads.area2_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_2\[11\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[0]
+ gpio_control_in_2\[11\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[1]
+ gpio_control_in_2\[11\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[2]
+ gpio_control_in_2\[11\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[11\]/HLD_OVR
+ gpio_control_in_2\[11\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_2\[11\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[11\]/INP_DIS
+ gpio_control_in_2\[11\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[11\]/OUT
+ gpio_control_in_2\[11\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[11\]/OE_N
+ gpio_control_in_2\[11\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/SLOW
+ gpio_control_in_2\[11\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_2\[11\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[75\]/A
+ gpio_control_in_2\[11\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_2\[11\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_2\[11\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_2\[12\]/one
+  padframe/mprj_pads.area2_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_2\[12\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[0]
+ gpio_control_in_2\[12\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[1]
+ gpio_control_in_2\[12\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[2]
+ gpio_control_in_2\[12\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[12\]/HLD_OVR
+ gpio_control_in_2\[12\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_2\[12\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[12\]/INP_DIS
+ gpio_control_in_2\[12\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[12\]/OUT
+ gpio_control_in_2\[12\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[12\]/OE_N
+ gpio_control_in_2\[12\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/SLOW
+ gpio_control_in_2\[12\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_2\[12\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[78\]/A
+ gpio_control_in_2\[12\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_2\[12\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_2\[12\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_2\[13\]/one
+  padframe/mprj_pads.area2_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_2\[13\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[0]
+ gpio_control_in_2\[13\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[1]
+ gpio_control_in_2\[13\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[2]
+ gpio_control_in_2\[13\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[13\]/HLD_OVR
+ gpio_control_in_2\[13\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_2\[13\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[13\]/INP_DIS
+ gpio_control_in_2\[13\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[13\]/OUT
+ gpio_control_in_2\[13\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[13\]/OE_N
+ gpio_control_in_2\[13\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/SLOW
+ gpio_control_in_2\[13\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_2\[13\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[81\]/A
+ gpio_control_in_2\[13\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_2\[13\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_2\[13\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_2\[14\]/one
+  padframe/mprj_pads.area2_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_2\[14\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[0]
+ gpio_control_in_2\[14\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[1]
+ gpio_control_in_2\[14\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[2]
+ gpio_control_in_2\[14\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[14\]/HLD_OVR
+ gpio_control_in_2\[14\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_2\[14\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[14\]/INP_DIS
+ gpio_control_in_2\[14\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[14\]/OUT
+ gpio_control_in_2\[14\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[14\]/OE_N
+ gpio_control_in_2\[14\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/SLOW
+ gpio_control_in_2\[14\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_2\[14\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[84\]/A
+ gpio_control_in_2\[14\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_2\[14\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_2\[14\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_2\[15\]/one
+  padframe/mprj_pads.area2_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_2\[15\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[0]
+ gpio_control_in_2\[15\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[1]
+ gpio_control_in_2\[15\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[2]
+ gpio_control_in_2\[15\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[15\]/HLD_OVR
+ gpio_control_in_2\[15\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_2\[15\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[15\]/INP_DIS
+ gpio_control_in_2\[15\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[15\]/OUT
+ gpio_control_in_2\[15\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[15\]/OE_N
+ gpio_control_in_2\[15\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/SLOW
+ gpio_control_in_2\[15\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_2\[15\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[87\]/A
+ gpio_control_in_2\[15\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_2\[15\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_2\[15\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_in_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[0]
+ gpio_control_in_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[1]
+ gpio_control_in_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[2]
+ gpio_control_in_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[1\]/HLD_OVR
+ gpio_control_in_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_in_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[1\]/INP_DIS
+ gpio_control_in_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[1\]/OUT
+ gpio_control_in_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[1\]/OE_N
+ gpio_control_in_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/SLOW
+ gpio_control_in_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/VTRIP_SEL
+ gpio_control_in_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[29\]/A
+ gpio_control_in_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_EN
+ gpio_control_in_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_POL
+ gpio_control_in_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_SEL
+ gpio_control_in_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[0]
+ gpio_control_in_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[1]
+ gpio_control_in_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[2]
+ gpio_control_in_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[2\]/HLD_OVR
+ gpio_control_in_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[2\]/INP_DIS
+ gpio_control_in_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[2\]/OUT
+ gpio_control_in_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[2\]/OE_N
+ gpio_control_in_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/SLOW
+ gpio_control_in_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[35\]/A
+ gpio_control_in_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_2\[3\]/one
+  padframe/mprj_pads.area2_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_2\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[0]
+ gpio_control_in_2\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[1]
+ gpio_control_in_2\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[2]
+ gpio_control_in_2\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[3\]/HLD_OVR
+ gpio_control_in_2\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_2\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[3\]/INP_DIS
+ gpio_control_in_2\[3\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[3\]/OUT
+ gpio_control_in_2\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[3\]/OE_N
+ gpio_control_in_2\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/SLOW
+ gpio_control_in_2\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_2\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[41\]/A
+ gpio_control_in_2\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_2\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_2\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_2\[4\]/one
+  padframe/mprj_pads.area2_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_2\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[0]
+ gpio_control_in_2\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[1]
+ gpio_control_in_2\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[2]
+ gpio_control_in_2\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[4\]/HLD_OVR
+ gpio_control_in_2\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_2\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[4\]/INP_DIS
+ gpio_control_in_2\[4\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[4\]/OUT
+ gpio_control_in_2\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[4\]/OE_N
+ gpio_control_in_2\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/SLOW
+ gpio_control_in_2\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_2\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[46\]/A
+ gpio_control_in_2\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_2\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_2\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_2\[5\]/one
+  padframe/mprj_pads.area2_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_2\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[0]
+ gpio_control_in_2\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[1]
+ gpio_control_in_2\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[2]
+ gpio_control_in_2\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[5\]/HLD_OVR
+ gpio_control_in_2\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_2\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[5\]/INP_DIS
+ gpio_control_in_2\[5\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[5\]/OUT
+ gpio_control_in_2\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[5\]/OE_N
+ gpio_control_in_2\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/SLOW
+ gpio_control_in_2\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_2\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[51\]/A
+ gpio_control_in_2\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_2\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_2\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_2\[6\]/one
+  padframe/mprj_pads.area2_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_2\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[0]
+ gpio_control_in_2\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[1]
+ gpio_control_in_2\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[2]
+ gpio_control_in_2\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[6\]/HLD_OVR
+ gpio_control_in_2\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_2\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[6\]/INP_DIS
+ gpio_control_in_2\[6\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[6\]/OUT
+ gpio_control_in_2\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[6\]/OE_N
+ gpio_control_in_2\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/SLOW
+ gpio_control_in_2\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_2\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[55\]/A
+ gpio_control_in_2\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_2\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_2\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_2\[7\]/one
+  padframe/mprj_pads.area2_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_2\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[0]
+ gpio_control_in_2\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[1]
+ gpio_control_in_2\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[2]
+ gpio_control_in_2\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[7\]/HLD_OVR
+ gpio_control_in_2\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_2\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[7\]/INP_DIS
+ gpio_control_in_2\[7\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[7\]/OUT
+ gpio_control_in_2\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[7\]/OE_N
+ gpio_control_in_2\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/SLOW
+ gpio_control_in_2\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_2\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[59\]/A
+ gpio_control_in_2\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_2\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_2\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[8\]/one
+  gpio_control_in_2\[8\]/ANTENNA_input1_A/DIODE
+  gpio_control_in_2\[8\]/input1/A
+  padframe/mprj_pads.area2_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_2\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[0]
+ gpio_control_in_2\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[1]
+ gpio_control_in_2\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[2]
+ gpio_control_in_2\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[8\]/HLD_OVR
+ gpio_control_in_2\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_2\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[8\]/INP_DIS
+ gpio_control_in_2\[8\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[8\]/OUT
+ gpio_control_in_2\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[8\]/OE_N
+ gpio_control_in_2\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/SLOW
+ gpio_control_in_2\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_2\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[63\]/A
+ gpio_control_in_2\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_2\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_2\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_2\[9\]/one
+  padframe/mprj_pads.area2_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_2\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[0]
+ gpio_control_in_2\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[1]
+ gpio_control_in_2\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[2]
+ gpio_control_in_2\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[9\]/HLD_OVR
+ gpio_control_in_2\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_2\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[9\]/INP_DIS
+ gpio_control_in_2\[9\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[9\]/OUT
+ gpio_control_in_2\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[9\]/OE_N
+ gpio_control_in_2\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/SLOW
+ gpio_control_in_2\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_2\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[67\]/A
+ gpio_control_in_2\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_2\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_2\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_SEL
+ housekeeping/mgmt_gpio_out[14]
+  sigbuf/signal_buffers\[103\]/A
+ housekeeping/mgmt_gpio_out[15]
+  sigbuf/signal_buffers\[105\]/A
+ housekeeping/mgmt_gpio_out[9]
+  sigbuf/signal_buffers\[97\]/A
+ housekeeping/mgmt_gpio_oeb[35]
+  sigbuf/signal_buffers\[190\]/A
+ housekeeping/mgmt_gpio_oeb[36]
+  sigbuf/signal_buffers\[192\]/A
+ housekeeping/mgmt_gpio_oeb[37]
+  sigbuf/signal_buffers\[194\]/A
+ housekeeping/mgmt_gpio_out[10]
+  sigbuf/signal_buffers\[98\]/A
+ housekeeping/mgmt_gpio_out[11]
+  sigbuf/signal_buffers\[99\]/A
+ housekeeping/mgmt_gpio_out[12]
+  sigbuf/signal_buffers\[100\]/A
+ housekeeping/mgmt_gpio_out[13]
+  sigbuf/signal_buffers\[101\]/A
+ housekeeping/mgmt_gpio_out[16]
+  sigbuf/signal_buffers\[108\]/A
+ housekeeping/mgmt_gpio_out[17]
+  sigbuf/signal_buffers\[111\]/A
+ housekeeping/mgmt_gpio_out[18]
+  sigbuf/signal_buffers\[114\]/A
+ housekeeping/mgmt_gpio_out[19]
+  sigbuf/signal_buffers\[118\]/A
+ housekeeping/mgmt_gpio_out[20]
+  sigbuf/signal_buffers\[124\]/A
+ housekeeping/mgmt_gpio_out[21]
+  sigbuf/signal_buffers\[130\]/A
+ housekeeping/mgmt_gpio_out[22]
+  sigbuf/signal_buffers\[136\]/A
+ housekeeping/mgmt_gpio_out[23]
+  sigbuf/signal_buffers\[141\]/A
+ housekeeping/mgmt_gpio_out[24]
+  sigbuf/signal_buffers\[146\]/A
+ housekeeping/mgmt_gpio_out[25]
+  sigbuf/signal_buffers\[150\]/A
+ housekeeping/mgmt_gpio_out[26]
+  sigbuf/signal_buffers\[154\]/A
+ housekeeping/mgmt_gpio_out[27]
+  sigbuf/signal_buffers\[158\]/A
+ housekeeping/mgmt_gpio_out[28]
+  sigbuf/signal_buffers\[162\]/A
+ housekeeping/mgmt_gpio_out[29]
+  sigbuf/signal_buffers\[166\]/A
+ housekeeping/mgmt_gpio_out[30]
+  sigbuf/signal_buffers\[170\]/A
+ housekeeping/mgmt_gpio_out[31]
+  sigbuf/signal_buffers\[173\]/A
+ housekeeping/mgmt_gpio_out[32]
+  sigbuf/signal_buffers\[176\]/A
+ housekeeping/mgmt_gpio_out[33]
+  sigbuf/signal_buffers\[179\]/A
+ housekeeping/mgmt_gpio_out[34]
+  sigbuf/signal_buffers\[182\]/A
+ housekeeping/mgmt_gpio_out[35]
+  sigbuf/signal_buffers\[184\]/A
+ housekeeping/mgmt_gpio_out[36]
+  sigbuf/signal_buffers\[186\]/A
+ housekeeping/mgmt_gpio_out[37]
+  sigbuf/signal_buffers\[188\]/A
+ housekeeping/mgmt_gpio_out[7]
+  sigbuf/signal_buffers\[95\]/A
+ housekeeping/mgmt_gpio_out[8]
+  sigbuf/signal_buffers\[96\]/A
+ mgmt_buffers/mprj_dat_o_user[0]
+  mprj/mprj/input1/A
+  mprj/mprj/ANTENNA_input1_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[10]
+  mprj/mprj/input11/A
+  mprj/mprj/ANTENNA_input11_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[11]
+  mprj/mprj/input12/A
+  mprj/mprj/ANTENNA_input12_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[12]
+  mprj/mprj/input13/A
+  mprj/mprj/ANTENNA_input13_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[13]
+  mprj/mprj/input14/A
+  mprj/mprj/ANTENNA_input14_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[14]
+  mprj/mprj/input15/A
+  mprj/mprj/ANTENNA_input15_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[15]
+  mprj/mprj/input16/A
+  mprj/mprj/ANTENNA_input16_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[1]
+  mprj/mprj/input2/A
+  mprj/mprj/ANTENNA_input2_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[2]
+  mprj/mprj/input3/A
+  mprj/mprj/ANTENNA_input3_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[3]
+  mprj/mprj/input4/A
+  mprj/mprj/ANTENNA_input4_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[4]
+  mprj/mprj/input5/A
+  mprj/mprj/ANTENNA_input5_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[5]
+  mprj/mprj/input6/A
+  mprj/mprj/ANTENNA_input6_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[6]
+  mprj/mprj/input7/A
+  mprj/mprj/ANTENNA_input7_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[7]
+  mprj/mprj/input8/A
+  mprj/mprj/ANTENNA_input8_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[8]
+  mprj/mprj/input9/A
+  mprj/mprj/ANTENNA_input9_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[9]
+  mprj/mprj/input10/A
+  mprj/mprj/ANTENNA_input10_A/DIODE
+ soc/gpio_inenb_pad
+  padframe/gpio_pad/INP_DIS
+ soc/gpio_mode0_pad
+  padframe/gpio_pad/DM[0]
+ soc/gpio_mode1_pad
+  padframe/gpio_pad/DM[2]
+  padframe/gpio_pad/DM[1]
+ soc/gpio_out_pad
+  padframe/gpio_pad/OUT
+ soc/gpio_outenb_pad
+  padframe/gpio_pad/OE_N
+ soc/por_l_out
+  padframe/clock_pad/INP_DIS

signoff/caravel/openlane-signoff/timing/min/t-clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/t-clk-max.rpt b/signoff/caravel/openlane-signoff/timing/min/t-clk-max.rpt
new file mode 100644
index 0000000..7e20927
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:4a4e9b0f0e4ff5986b9dfe5737b4b0b48490801c17117cc65a679455627d6d00
+size 28500479

signoff/caravel/openlane-signoff/timing/min/t-clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/t-clk-min.rpt b/signoff/caravel/openlane-signoff/timing/min/t-clk-min.rpt
new file mode 100644
index 0000000..ddb4470
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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+size 18807161

signoff/caravel/openlane-signoff/timing/min/t-hk_serial_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/t-hk_serial_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/min/t-hk_serial_clk-max.rpt
new file mode 100644
index 0000000..d5bea18
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-hk_serial_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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+size 345

signoff/caravel/openlane-signoff/timing/min/t-hk_serial_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/t-hk_serial_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/min/t-hk_serial_clk-min.rpt
new file mode 100644
index 0000000..f7c80cc
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-hk_serial_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:1a5e576cfeb071dbf3515a41229f7e59e08d8fafeeb5428eb0a5625fe694f6c7
+size 11323365

signoff/caravel/openlane-signoff/timing/min/t-hkspi_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/t-hkspi_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/min/t-hkspi_clk-max.rpt
new file mode 100644
index 0000000..3263fee
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-hkspi_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:f2592efe087fb8211ed4b1bbfcdb10e90cf38c79f6d3ae6290fbea804fb20c7a
+size 341

signoff/caravel/openlane-signoff/timing/min/t-hkspi_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/min/t-hkspi_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/min/t-hkspi_clk-min.rpt
new file mode 100644
index 0000000..e69246b
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-hkspi_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:584df79d507d4f44724a0fb50e6a40b1c997b2637995eff5996ade71fd0e3bfc
+size 6165582

signoff/caravel/openlane-signoff/timing/min/t-max.rpt

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new file mode 100644
index 0000000..9c01e96
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-max.rpt
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+version https://git-lfs.github.com/spec/v1
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+size 280594085

signoff/caravel/openlane-signoff/timing/min/t-min.rpt

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new file mode 100644
index 0000000..62e1296
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-min.rpt
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+version https://git-lfs.github.com/spec/v1
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+size 265695724

signoff/caravel/openlane-signoff/timing/min/t-mprj-max.rpt

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new file mode 100644
index 0000000..4cd9b42
--- /dev/null
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@@ -0,0 +1,3 @@
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+size 531209

signoff/caravel/openlane-signoff/timing/min/t-mprj-min.rpt

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new file mode 100644
index 0000000..8c42ebe
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-mprj-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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+size 453151

signoff/caravel/openlane-signoff/timing/min/t-soc-max.rpt

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new file mode 100644
index 0000000..1a4543e
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-soc-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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+size 139209

signoff/caravel/openlane-signoff/timing/min/t-soc-min.rpt

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new file mode 100644
index 0000000..070033a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-soc-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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+size 18069593

signoff/caravel/openlane-signoff/timing/min/t-summary.rpt

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new file mode 100644
index 0000000..c80011a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-summary.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:c107536ceb24157a34b2fbc280b79f43c21b6a44bb5de4f8df14d67af354ade9
+size 3296518

signoff/caravel/openlane-signoff/timing/min/t-unannotated.log

diff --git a/signoff/caravel/openlane-signoff/timing/min/t-unannotated.log b/signoff/caravel/openlane-signoff/timing/min/t-unannotated.log
new file mode 100644
index 0000000..aba1759
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/min/t-unannotated.log
@@ -0,0 +1,4179 @@
+Found 2894 unannotated nets.
+ padframe/flash_clk
+ padframe/mprj_analog_io[26]
+ mprj_io[28]
+ vssa2
+ vssa1
+ vdda1
+ mprj_io[4]
+ mprj_io[5]
+ mprj_io[19]
+ vssa1_2
+ vdda2
+ mprj_io[2]
+ mprj_io[3]
+ mprj_io[14]
+ mprj_io[33]
+ mprj_io[34]
+ resetb
+ mprj_io[1]
+ mprj_io[8]
+ mprj_io[9]
+ mprj_io[6]
+ mprj_io[11]
+ mprj_io[13]
+ mprj_io[15]
+ mprj_io[17]
+ mprj_io[18]
+ mprj_io[20]
+ mprj_io[23]
+ mprj_io[16]
+ mprj_io[27]
+ mprj_io[29]
+ mprj_io[32]
+ vssd2
+ vccd1
+ clock
+ gpio
+ vssd
+ vdda
+ mprj_io[37]
+ vccd
+ vssa
+ vssio
+ mprj_io[30]
+ vssd1
+ vssio_2
+ vddio
+ mprj_io[36]
+ vddio_2
+ mprj_io[31]
+ vccd2
+ vdda1_2
+ mprj_io[21]
+ mprj_io[26]
+ mprj_io[35]
+ mprj_io[0]
+ mprj_io[22]
+ mprj_io[24]
+ mprj_io[25]
+ mprj_io[7]
+ mprj_io[12]
+ mprj_io[10]
+ gpio_control_bidir_2\[2\]/_053_
+ gpio_control_bidir_2\[2\]/_052_
+ gpio_control_bidir_2\[2\]/_051_
+ gpio_control_bidir_2\[2\]/_050_
+ gpio_control_bidir_2\[2\]/_049_
+ gpio_control_bidir_2\[2\]/_048_
+ gpio_control_bidir_2\[2\]/_047_
+ gpio_control_bidir_2\[2\]/_046_
+ gpio_control_bidir_2\[2\]/_057_
+ gpio_control_bidir_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[7\]/_052_
+ gpio_control_in_1\[7\]/_056_
+ gpio_control_in_1\[7\]/_055_
+ gpio_control_in_1\[7\]/_054_
+ gpio_control_in_1\[7\]/_053_
+ gpio_control_in_1\[7\]/_051_
+ gpio_control_in_1\[7\]/_050_
+ gpio_control_in_1\[7\]/_049_
+ gpio_control_in_1\[7\]/_048_
+ gpio_control_in_1\[7\]/_047_
+ gpio_control_in_1\[7\]/_046_
+ gpio_control_in_1\[7\]/_057_
+ gpio_control_in_1\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_047_
+ gpio_control_in_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_049_
+ gpio_control_in_2\[0\]/_048_
+ gpio_control_in_2\[0\]/_046_
+ gpio_control_in_2\[0\]/_057_
+ gpio_control_in_2\[3\]/_047_
+ gpio_control_in_2\[3\]/_052_
+ gpio_control_in_2\[3\]/_051_
+ gpio_control_in_2\[3\]/_050_
+ gpio_control_in_2\[3\]/_049_
+ gpio_control_in_2\[3\]/_048_
+ gpio_control_in_2\[3\]/_046_
+ gpio_control_in_2\[3\]/_057_
+ gpio_control_in_2\[3\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_20/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[2\]
+ gpio_defaults_block_21/gpio_defaults_low\[6\]
+ gpio_defaults_block_21/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[3\]
+ gpio_defaults_block_20/gpio_defaults_high\[11\]
+ gpio_defaults_block_20/gpio_defaults_low\[11\]
+ gpio_defaults_block_20/gpio_defaults_high\[12\]
+ gpio_defaults_block_20/gpio_defaults_low\[12\]
+ gpio_defaults_block_20/gpio_defaults_high\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[2\]
+ gpio_defaults_block_20/gpio_defaults_low\[2\]
+ gpio_defaults_block_20/gpio_defaults_high\[4\]
+ gpio_defaults_block_20/gpio_defaults_low\[4\]
+ gpio_defaults_block_20/gpio_defaults_high\[5\]
+ gpio_defaults_block_20/gpio_defaults_low\[5\]
+ gpio_defaults_block_20/gpio_defaults_high\[6\]
+ gpio_defaults_block_20/gpio_defaults_low\[6\]
+ gpio_defaults_block_20/gpio_defaults_high\[7\]
+ gpio_defaults_block_20/gpio_defaults_low\[7\]
+ gpio_defaults_block_20/gpio_defaults_high\[8\]
+ gpio_defaults_block_20/gpio_defaults_low\[8\]
+ gpio_defaults_block_20/gpio_defaults_high\[9\]
+ gpio_defaults_block_20/gpio_defaults_low\[9\]
+ gpio_defaults_block_21/gpio_defaults_high\[0\]
+ gpio_defaults_block_21/gpio_defaults_low\[0\]
+ gpio_defaults_block_21/gpio_defaults_high\[10\]
+ gpio_defaults_block_21/gpio_defaults_low\[10\]
+ gpio_defaults_block_21/gpio_defaults_high\[11\]
+ gpio_defaults_block_21/gpio_defaults_low\[11\]
+ gpio_defaults_block_21/gpio_defaults_high\[12\]
+ gpio_defaults_block_21/gpio_defaults_low\[12\]
+ gpio_defaults_block_21/gpio_defaults_high\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[1\]
+ gpio_defaults_block_21/gpio_defaults_low\[2\]
+ gpio_defaults_block_21/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_low\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[4\]
+ gpio_defaults_block_21/gpio_defaults_low\[4\]
+ gpio_defaults_block_21/gpio_defaults_high\[5\]
+ gpio_defaults_block_21/gpio_defaults_low\[5\]
+ gpio_defaults_block_21/gpio_defaults_high\[6\]
+ gpio_defaults_block_21/gpio_defaults_high\[7\]
+ gpio_defaults_block_21/gpio_defaults_high\[8\]
+ gpio_defaults_block_21/gpio_defaults_low\[8\]
+ gpio_defaults_block_21/gpio_defaults_high\[9\]
+ gpio_defaults_block_21/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[2\]
+ gpio_defaults_block_19/gpio_defaults_high\[3\]
+ gpio_defaults_block_19/gpio_defaults_low\[3\]
+ gpio_defaults_block_19/gpio_defaults_high\[4\]
+ gpio_defaults_block_19/gpio_defaults_low\[4\]
+ gpio_defaults_block_19/gpio_defaults_high\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[5\]
+ gpio_defaults_block_19/gpio_defaults_low\[6\]
+ gpio_defaults_block_19/gpio_defaults_high\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[8\]
+ gpio_defaults_block_19/gpio_defaults_low\[8\]
+ gpio_defaults_block_19/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_low\[9\]
+ gpio_defaults_block_2/gpio_defaults_high\[0\]
+ gpio_defaults_block_2/gpio_defaults_high\[10\]
+ gpio_defaults_block_2/gpio_defaults_low\[10\]
+ gpio_defaults_block_2/gpio_defaults_high\[11\]
+ gpio_defaults_block_2/gpio_defaults_low\[11\]
+ gpio_defaults_block_2/gpio_defaults_high\[12\]
+ gpio_defaults_block_2/gpio_defaults_low\[12\]
+ gpio_defaults_block_2/gpio_defaults_high\[1\]
+ gpio_defaults_block_2/gpio_defaults_high\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[2\]
+ gpio_defaults_block_2/gpio_defaults_low\[3\]
+ gpio_defaults_block_2/gpio_defaults_high\[4\]
+ gpio_defaults_block_2/gpio_defaults_low\[4\]
+ gpio_defaults_block_2/gpio_defaults_high\[5\]
+ gpio_defaults_block_2/gpio_defaults_low\[5\]
+ gpio_defaults_block_2/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_low\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[7\]
+ gpio_defaults_block_2/gpio_defaults_low\[7\]
+ gpio_defaults_block_2/gpio_defaults_high\[8\]
+ gpio_defaults_block_2/gpio_defaults_low\[8\]
+ gpio_defaults_block_2/gpio_defaults_high\[9\]
+ gpio_defaults_block_2/gpio_defaults_low\[9\]
+ gpio_defaults_block_20/gpio_defaults_high\[0\]
+ gpio_defaults_block_20/gpio_defaults_low\[0\]
+ gpio_defaults_block_20/gpio_defaults_high\[10\]
+ gpio_defaults_block_20/gpio_defaults_low\[10\]
+ padframe/mprj_analog_io[7]
+ padframe/flash_io0
+ padframe/flash_io0_di_core
+ gpio_control_bidir_1\[0\]/_056_
+ gpio_control_bidir_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_1\[0\]/_051_
+ gpio_control_bidir_1\[0\]/_055_
+ gpio_control_bidir_1\[0\]/_054_
+ gpio_control_bidir_1\[0\]/_053_
+ gpio_control_bidir_1\[0\]/_052_
+ gpio_control_bidir_1\[0\]/_050_
+ gpio_control_bidir_1\[0\]/_049_
+ gpio_control_bidir_1\[0\]/_048_
+ gpio_control_bidir_1\[0\]/_047_
+ gpio_control_bidir_1\[0\]/_046_
+ gpio_control_bidir_1\[0\]/_057_
+ gpio_control_bidir_1\[1\]/_051_
+ gpio_control_bidir_1\[1\]/_057_
+ gpio_control_bidir_1\[1\]/_056_
+ gpio_control_bidir_1\[1\]/_055_
+ gpio_control_bidir_1\[1\]/_054_
+ gpio_control_bidir_1\[1\]/_053_
+ gpio_control_bidir_1\[1\]/_052_
+ gpio_control_bidir_1\[1\]/_050_
+ gpio_control_bidir_1\[1\]/_049_
+ gpio_control_bidir_1\[1\]/_048_
+ gpio_control_bidir_1\[1\]/_047_
+ gpio_control_bidir_1\[1\]/_046_
+ gpio_control_bidir_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_047_
+ gpio_control_bidir_2\[0\]/_049_
+ gpio_control_bidir_2\[0\]/_056_
+ gpio_control_bidir_2\[0\]/_051_
+ gpio_control_bidir_2\[0\]/_050_
+ gpio_control_bidir_2\[0\]/_048_
+ gpio_control_bidir_2\[0\]/_046_
+ gpio_control_bidir_2\[0\]/_057_
+ gpio_control_bidir_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_055_
+ gpio_control_bidir_2\[0\]/_054_
+ gpio_control_bidir_2\[0\]/_053_
+ gpio_control_bidir_2\[0\]/_052_
+ gpio_control_bidir_2\[1\]/_050_
+ gpio_control_bidir_2\[1\]/_056_
+ gpio_control_bidir_2\[1\]/_055_
+ gpio_control_bidir_2\[1\]/_054_
+ gpio_control_bidir_2\[1\]/_053_
+ gpio_control_bidir_2\[1\]/_052_
+ gpio_control_bidir_2\[1\]/_051_
+ gpio_control_bidir_2\[1\]/_049_
+ gpio_control_bidir_2\[1\]/_048_
+ gpio_control_bidir_2\[1\]/_047_
+ gpio_control_bidir_2\[1\]/_046_
+ gpio_control_bidir_2\[1\]/_057_
+ gpio_control_bidir_2\[2\]/_056_
+ gpio_control_bidir_2\[2\]/_055_
+ gpio_control_bidir_2\[2\]/_054_
+ gpio_control_bidir_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[0\]/_055_
+ gpio_control_in_1\[0\]/_056_
+ gpio_control_in_1\[0\]/_054_
+ gpio_control_in_1\[0\]/_053_
+ gpio_control_in_1\[0\]/_052_
+ gpio_control_in_1\[0\]/_051_
+ gpio_control_in_1\[0\]/_050_
+ gpio_control_in_1\[0\]/_049_
+ gpio_control_in_1\[0\]/_048_
+ gpio_control_in_1\[0\]/_047_
+ gpio_control_in_1\[0\]/_046_
+ gpio_control_in_1\[0\]/_057_
+ gpio_control_in_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[10\]/_057_
+ gpio_control_in_1\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[10\]/_047_
+ gpio_control_in_1\[10\]/_046_
+ gpio_control_in_1\[10\]/_056_
+ gpio_control_in_1\[10\]/_055_
+ gpio_control_in_1\[10\]/_054_
+ gpio_control_in_1\[10\]/_053_
+ gpio_control_in_1\[10\]/_052_
+ gpio_control_in_1\[10\]/_051_
+ gpio_control_in_1\[10\]/_050_
+ gpio_control_in_1\[10\]/_049_
+ gpio_control_in_1\[10\]/_048_
+ gpio_control_in_1\[1\]/_056_
+ gpio_control_in_1\[1\]/_055_
+ gpio_control_in_1\[1\]/_054_
+ gpio_control_in_1\[1\]/_053_
+ gpio_control_in_1\[1\]/_052_
+ gpio_control_in_1\[1\]/_051_
+ gpio_control_in_1\[1\]/_050_
+ gpio_control_in_1\[1\]/_049_
+ gpio_control_in_1\[1\]/_048_
+ gpio_control_in_1\[1\]/_047_
+ gpio_control_in_1\[1\]/_046_
+ gpio_control_in_1\[1\]/_057_
+ gpio_control_in_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[2\]/_056_
+ gpio_control_in_1\[2\]/_055_
+ gpio_control_in_1\[2\]/_054_
+ gpio_control_in_1\[2\]/_053_
+ gpio_control_in_1\[2\]/_052_
+ gpio_control_in_1\[2\]/_051_
+ gpio_control_in_1\[2\]/_050_
+ gpio_control_in_1\[2\]/_049_
+ gpio_control_in_1\[2\]/_048_
+ gpio_control_in_1\[2\]/_047_
+ gpio_control_in_1\[2\]/_046_
+ gpio_control_in_1\[2\]/_057_
+ gpio_control_in_1\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[3\]/_052_
+ gpio_control_in_1\[3\]/_047_
+ gpio_control_in_1\[3\]/_056_
+ gpio_control_in_1\[3\]/_055_
+ gpio_control_in_1\[3\]/_054_
+ gpio_control_in_1\[3\]/_053_
+ gpio_control_in_1\[3\]/_051_
+ gpio_control_in_1\[3\]/_050_
+ gpio_control_in_1\[3\]/_049_
+ gpio_control_in_1\[3\]/_048_
+ gpio_control_in_1\[3\]/_046_
+ gpio_control_in_1\[3\]/_057_
+ gpio_control_in_1\[3\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[4\]/_056_
+ gpio_control_in_1\[4\]/_055_
+ gpio_control_in_1\[4\]/_054_
+ gpio_control_in_1\[4\]/_053_
+ gpio_control_in_1\[4\]/_052_
+ gpio_control_in_1\[4\]/_051_
+ gpio_control_in_1\[4\]/_050_
+ gpio_control_in_1\[4\]/_049_
+ gpio_control_in_1\[4\]/_048_
+ gpio_control_in_1\[4\]/_047_
+ gpio_control_in_1\[4\]/_046_
+ gpio_control_in_1\[4\]/_057_
+ gpio_control_in_1\[5\]/_054_
+ gpio_control_in_1\[5\]/_049_
+ gpio_control_in_1\[5\]/_056_
+ gpio_control_in_1\[5\]/_055_
+ gpio_control_in_1\[5\]/_053_
+ gpio_control_in_1\[5\]/_052_
+ gpio_control_in_1\[5\]/_051_
+ gpio_control_in_1\[5\]/_050_
+ gpio_control_in_1\[5\]/_048_
+ gpio_control_in_1\[5\]/_047_
+ gpio_control_in_1\[5\]/_046_
+ gpio_control_in_1\[5\]/_057_
+ gpio_control_in_1\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[6\]/_056_
+ gpio_control_in_1\[6\]/_055_
+ gpio_control_in_1\[6\]/_054_
+ gpio_control_in_1\[6\]/_053_
+ gpio_control_in_1\[6\]/_052_
+ gpio_control_in_1\[6\]/_051_
+ gpio_control_in_1\[6\]/_050_
+ gpio_control_in_1\[6\]/_049_
+ gpio_control_in_1\[6\]/_048_
+ gpio_control_in_1\[6\]/_047_
+ gpio_control_in_1\[6\]/_046_
+ gpio_control_in_1\[6\]/_057_
+ gpio_control_in_1\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[8\]/_050_
+ gpio_control_in_1\[8\]/_055_
+ gpio_control_in_1\[8\]/_054_
+ gpio_control_in_1\[8\]/_056_
+ gpio_control_in_1\[8\]/_053_
+ gpio_control_in_1\[8\]/_052_
+ gpio_control_in_1\[8\]/_051_
+ gpio_control_in_1\[8\]/_049_
+ gpio_control_in_1\[8\]/_048_
+ gpio_control_in_1\[8\]/_047_
+ gpio_control_in_1\[8\]/_046_
+ gpio_control_in_1\[8\]/_057_
+ gpio_control_in_1\[8\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[9\]/_056_
+ gpio_control_in_1\[9\]/_046_
+ gpio_control_in_1\[9\]/_057_
+ gpio_control_in_1\[9\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[9\]/_055_
+ gpio_control_in_1\[9\]/_054_
+ gpio_control_in_1\[9\]/_053_
+ gpio_control_in_1\[9\]/_052_
+ gpio_control_in_1\[9\]/_051_
+ gpio_control_in_1\[9\]/_050_
+ gpio_control_in_1\[9\]/_049_
+ gpio_control_in_1\[9\]/_048_
+ gpio_control_in_1\[9\]/_047_
+ gpio_control_in_1a\[0\]/_049_
+ gpio_control_in_1a\[0\]/_056_
+ gpio_control_in_1a\[0\]/_055_
+ gpio_control_in_1a\[0\]/_054_
+ gpio_control_in_1a\[0\]/_053_
+ gpio_control_in_1a\[0\]/_052_
+ gpio_control_in_1a\[0\]/_051_
+ gpio_control_in_1a\[0\]/_050_
+ gpio_control_in_1a\[0\]/_048_
+ gpio_control_in_1a\[0\]/_047_
+ gpio_control_in_1a\[0\]/_046_
+ gpio_control_in_1a\[0\]/_057_
+ gpio_control_in_1a\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[1\]/_047_
+ gpio_control_in_1a\[1\]/_056_
+ gpio_control_in_1a\[1\]/_055_
+ gpio_control_in_1a\[1\]/_054_
+ gpio_control_in_1a\[1\]/_053_
+ gpio_control_in_1a\[1\]/_052_
+ gpio_control_in_1a\[1\]/_051_
+ gpio_control_in_1a\[1\]/_050_
+ gpio_control_in_1a\[1\]/_049_
+ gpio_control_in_1a\[1\]/_048_
+ gpio_control_in_1a\[1\]/_046_
+ gpio_control_in_1a\[1\]/_057_
+ gpio_control_in_1a\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[2\]/_055_
+ gpio_control_in_1a\[2\]/_049_
+ gpio_control_in_1a\[2\]/_056_
+ gpio_control_in_1a\[2\]/_054_
+ gpio_control_in_1a\[2\]/_053_
+ gpio_control_in_1a\[2\]/_052_
+ gpio_control_in_1a\[2\]/_051_
+ gpio_control_in_1a\[2\]/_050_
+ gpio_control_in_1a\[2\]/_048_
+ gpio_control_in_1a\[2\]/_047_
+ gpio_control_in_1a\[2\]/_046_
+ gpio_control_in_1a\[2\]/_057_
+ gpio_control_in_1a\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/_056_
+ gpio_control_in_1a\[3\]/_055_
+ gpio_control_in_1a\[3\]/_054_
+ gpio_control_in_1a\[3\]/_053_
+ gpio_control_in_1a\[3\]/_052_
+ gpio_control_in_1a\[3\]/_051_
+ gpio_control_in_1a\[3\]/_050_
+ gpio_control_in_1a\[3\]/_049_
+ gpio_control_in_1a\[3\]/_048_
+ gpio_control_in_1a\[3\]/_047_
+ gpio_control_in_1a\[3\]/_046_
+ gpio_control_in_1a\[3\]/_057_
+ gpio_control_in_1a\[4\]/_047_
+ gpio_control_in_1a\[4\]/_049_
+ gpio_control_in_1a\[4\]/_056_
+ gpio_control_in_1a\[4\]/_051_
+ gpio_control_in_1a\[4\]/_050_
+ gpio_control_in_1a\[4\]/_048_
+ gpio_control_in_1a\[4\]/_046_
+ gpio_control_in_1a\[4\]/_057_
+ gpio_control_in_1a\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[4\]/_055_
+ gpio_control_in_1a\[4\]/_054_
+ gpio_control_in_1a\[4\]/_053_
+ gpio_control_in_1a\[4\]/_052_
+ gpio_control_in_1a\[5\]/_047_
+ gpio_control_in_1a\[5\]/_056_
+ gpio_control_in_1a\[5\]/_055_
+ gpio_control_in_1a\[5\]/_054_
+ gpio_control_in_1a\[5\]/_053_
+ gpio_control_in_1a\[5\]/_052_
+ gpio_control_in_1a\[5\]/_051_
+ gpio_control_in_1a\[5\]/_050_
+ gpio_control_in_1a\[5\]/_049_
+ gpio_control_in_1a\[5\]/_048_
+ gpio_control_in_1a\[5\]/_046_
+ gpio_control_in_1a\[5\]/_057_
+ gpio_control_in_1a\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_056_
+ gpio_control_in_2\[0\]/_055_
+ gpio_control_in_2\[0\]/_054_
+ gpio_control_in_2\[0\]/_053_
+ gpio_control_in_2\[0\]/_052_
+ gpio_control_in_2\[0\]/_051_
+ gpio_control_in_2\[0\]/_050_
+ gpio_control_in_2\[10\]/_047_
+ gpio_control_in_2\[10\]/_052_
+ gpio_control_in_2\[10\]/_051_
+ gpio_control_in_2\[10\]/_046_
+ gpio_control_in_2\[10\]/_056_
+ gpio_control_in_2\[10\]/_055_
+ gpio_control_in_2\[10\]/_054_
+ gpio_control_in_2\[10\]/_053_
+ gpio_control_in_2\[10\]/_050_
+ gpio_control_in_2\[10\]/_049_
+ gpio_control_in_2\[10\]/_048_
+ gpio_control_in_2\[10\]/_057_
+ gpio_control_in_2\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_056_
+ gpio_control_in_2\[11\]/_057_
+ gpio_control_in_2\[11\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_055_
+ gpio_control_in_2\[11\]/_054_
+ gpio_control_in_2\[11\]/_053_
+ gpio_control_in_2\[11\]/_052_
+ gpio_control_in_2\[11\]/_051_
+ gpio_control_in_2\[11\]/_050_
+ gpio_control_in_2\[11\]/_049_
+ gpio_control_in_2\[11\]/_048_
+ gpio_control_in_2\[11\]/_047_
+ gpio_control_in_2\[11\]/_046_
+ gpio_control_in_2\[12\]/_056_
+ gpio_control_in_2\[12\]/_055_
+ gpio_control_in_2\[12\]/_054_
+ gpio_control_in_2\[12\]/_053_
+ gpio_control_in_2\[12\]/_052_
+ gpio_control_in_2\[12\]/_051_
+ gpio_control_in_2\[12\]/_050_
+ gpio_control_in_2\[12\]/_049_
+ gpio_control_in_2\[12\]/_048_
+ gpio_control_in_2\[12\]/_047_
+ gpio_control_in_2\[12\]/_046_
+ gpio_control_in_2\[12\]/_057_
+ gpio_control_in_2\[12\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[13\]/_056_
+ gpio_control_in_2\[13\]/_055_
+ gpio_control_in_2\[13\]/_054_
+ gpio_control_in_2\[13\]/_053_
+ gpio_control_in_2\[13\]/_052_
+ gpio_control_in_2\[13\]/_051_
+ gpio_control_in_2\[13\]/_050_
+ gpio_control_in_2\[13\]/_049_
+ gpio_control_in_2\[13\]/_048_
+ gpio_control_in_2\[13\]/_047_
+ gpio_control_in_2\[13\]/_046_
+ gpio_control_in_2\[13\]/_057_
+ gpio_control_in_2\[13\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[14\]/_056_
+ gpio_control_in_2\[14\]/_055_
+ gpio_control_in_2\[14\]/_054_
+ gpio_control_in_2\[14\]/_053_
+ gpio_control_in_2\[14\]/_052_
+ gpio_control_in_2\[14\]/_051_
+ gpio_control_in_2\[14\]/_050_
+ gpio_control_in_2\[14\]/_049_
+ gpio_control_in_2\[14\]/_048_
+ gpio_control_in_2\[14\]/_047_
+ gpio_control_in_2\[14\]/_046_
+ gpio_control_in_2\[14\]/_057_
+ gpio_control_in_2\[14\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/_056_
+ gpio_control_in_2\[15\]/_055_
+ gpio_control_in_2\[15\]/_054_
+ gpio_control_in_2\[15\]/_053_
+ gpio_control_in_2\[15\]/_052_
+ gpio_control_in_2\[15\]/_051_
+ gpio_control_in_2\[15\]/_050_
+ gpio_control_in_2\[15\]/_049_
+ gpio_control_in_2\[15\]/_048_
+ gpio_control_in_2\[15\]/_047_
+ gpio_control_in_2\[15\]/_046_
+ gpio_control_in_2\[15\]/_057_
+ gpio_control_in_2\[1\]/_049_
+ gpio_control_in_2\[1\]/_053_
+ gpio_control_in_2\[1\]/_052_
+ gpio_control_in_2\[1\]/_051_
+ gpio_control_in_2\[1\]/_050_
+ gpio_control_in_2\[1\]/_048_
+ gpio_control_in_2\[1\]/_047_
+ gpio_control_in_2\[1\]/_046_
+ gpio_control_in_2\[1\]/_057_
+ gpio_control_in_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[1\]/_056_
+ gpio_control_in_2\[1\]/_055_
+ gpio_control_in_2\[1\]/_054_
+ gpio_control_in_2\[2\]/_056_
+ gpio_control_in_2\[2\]/_051_
+ gpio_control_in_2\[2\]/_046_
+ gpio_control_in_2\[2\]/_055_
+ gpio_control_in_2\[2\]/_054_
+ gpio_control_in_2\[2\]/_053_
+ gpio_control_in_2\[2\]/_052_
+ gpio_control_in_2\[2\]/_050_
+ gpio_control_in_2\[2\]/_049_
+ gpio_control_in_2\[2\]/_048_
+ gpio_control_in_2\[2\]/_047_
+ gpio_control_in_2\[2\]/_057_
+ gpio_control_in_2\[3\]/_055_
+ gpio_control_in_2\[3\]/_056_
+ gpio_control_in_2\[3\]/_054_
+ gpio_control_in_2\[3\]/_053_
+ gpio_control_in_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[4\]/_049_
+ gpio_control_in_2\[4\]/_056_
+ gpio_control_in_2\[4\]/_055_
+ gpio_control_in_2\[4\]/_054_
+ gpio_control_in_2\[4\]/_053_
+ gpio_control_in_2\[4\]/_052_
+ gpio_control_in_2\[4\]/_051_
+ gpio_control_in_2\[4\]/_050_
+ gpio_control_in_2\[4\]/_048_
+ gpio_control_in_2\[4\]/_047_
+ gpio_control_in_2\[4\]/_046_
+ gpio_control_in_2\[4\]/_057_
+ gpio_control_in_2\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_057_
+ gpio_control_in_2\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_047_
+ gpio_control_in_2\[5\]/_046_
+ gpio_control_in_2\[5\]/_056_
+ gpio_control_in_2\[5\]/_055_
+ gpio_control_in_2\[5\]/_054_
+ gpio_control_in_2\[5\]/_053_
+ gpio_control_in_2\[5\]/_052_
+ gpio_control_in_2\[5\]/_051_
+ gpio_control_in_2\[5\]/_050_
+ gpio_control_in_2\[5\]/_049_
+ gpio_control_in_2\[5\]/_048_
+ gpio_control_in_2\[6\]/_056_
+ gpio_control_in_2\[6\]/_055_
+ gpio_control_in_2\[6\]/_054_
+ gpio_control_in_2\[6\]/_053_
+ gpio_control_in_2\[6\]/_052_
+ gpio_control_in_2\[6\]/_051_
+ gpio_control_in_2\[6\]/_050_
+ gpio_control_in_2\[6\]/_049_
+ gpio_control_in_2\[6\]/_048_
+ gpio_control_in_2\[6\]/_047_
+ gpio_control_in_2\[6\]/_046_
+ gpio_control_in_2\[6\]/_057_
+ gpio_control_in_2\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[7\]/_054_
+ gpio_control_in_2\[7\]/_056_
+ gpio_control_in_2\[7\]/_055_
+ gpio_control_in_2\[7\]/_053_
+ gpio_control_in_2\[7\]/_052_
+ gpio_control_in_2\[7\]/_051_
+ gpio_control_in_2\[7\]/_050_
+ gpio_control_in_2\[7\]/_049_
+ gpio_control_in_2\[7\]/_048_
+ gpio_control_in_2\[7\]/_047_
+ gpio_control_in_2\[7\]/_046_
+ gpio_control_in_2\[7\]/_057_
+ gpio_control_in_2\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[8\]/_052_
+ gpio_control_in_2\[8\]/_047_
+ gpio_control_in_2\[8\]/_056_
+ gpio_control_in_2\[8\]/_055_
+ gpio_control_in_2\[8\]/_054_
+ gpio_control_in_2\[8\]/_053_
+ gpio_control_in_2\[8\]/_051_
+ gpio_control_in_2\[8\]/_050_
+ gpio_control_in_2\[8\]/_049_
+ gpio_control_in_2\[8\]/_048_
+ gpio_control_in_2\[8\]/_046_
+ gpio_control_in_2\[8\]/_057_
+ gpio_control_in_2\[8\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[4\]
+ gpio_defaults_block_0/gpio_defaults_low\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[9\]
+ gpio_control_in_2\[9\]/_051_
+ gpio_control_in_2\[9\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[0\]
+ gpio_defaults_block_0/gpio_defaults_low\[0\]
+ gpio_defaults_block_0/gpio_defaults_high\[10\]
+ gpio_defaults_block_0/gpio_defaults_low\[10\]
+ gpio_defaults_block_0/gpio_defaults_high\[11\]
+ gpio_defaults_block_0/gpio_defaults_low\[11\]
+ gpio_defaults_block_0/gpio_defaults_high\[12\]
+ gpio_defaults_block_0/gpio_defaults_low\[12\]
+ gpio_defaults_block_0/gpio_defaults_high\[1\]
+ gpio_defaults_block_0/gpio_defaults_low\[1\]
+ gpio_defaults_block_0/gpio_defaults_high\[2\]
+ gpio_defaults_block_0/gpio_defaults_low\[2\]
+ gpio_defaults_block_0/gpio_defaults_high\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[3\]
+ gpio_defaults_block_0/gpio_defaults_low\[4\]
+ gpio_defaults_block_0/gpio_defaults_high\[5\]
+ gpio_defaults_block_0/gpio_defaults_low\[5\]
+ gpio_defaults_block_0/gpio_defaults_high\[6\]
+ gpio_defaults_block_0/gpio_defaults_low\[6\]
+ gpio_defaults_block_0/gpio_defaults_high\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[8\]
+ gpio_defaults_block_0/gpio_defaults_low\[9\]
+ gpio_control_in_2\[9\]/_056_
+ gpio_control_in_2\[9\]/_055_
+ gpio_control_in_2\[9\]/_054_
+ gpio_control_in_2\[9\]/_053_
+ gpio_control_in_2\[9\]/_052_
+ gpio_control_in_2\[9\]/_050_
+ gpio_control_in_2\[9\]/_049_
+ gpio_control_in_2\[9\]/_048_
+ gpio_control_in_2\[9\]/_047_
+ gpio_control_in_2\[9\]/_046_
+ gpio_control_in_2\[9\]/_057_
+ gpio_defaults_block_11/gpio_defaults_low\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[0\]
+ gpio_defaults_block_11/gpio_defaults_low\[0\]
+ gpio_defaults_block_11/gpio_defaults_high\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[11\]
+ gpio_defaults_block_11/gpio_defaults_low\[11\]
+ gpio_defaults_block_11/gpio_defaults_high\[12\]
+ gpio_defaults_block_11/gpio_defaults_low\[12\]
+ gpio_defaults_block_11/gpio_defaults_high\[1\]
+ gpio_defaults_block_11/gpio_defaults_low\[1\]
+ gpio_defaults_block_11/gpio_defaults_high\[2\]
+ gpio_defaults_block_11/gpio_defaults_low\[2\]
+ gpio_defaults_block_11/gpio_defaults_high\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[3\]
+ gpio_defaults_block_11/gpio_defaults_low\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[5\]
+ gpio_defaults_block_11/gpio_defaults_low\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[7\]
+ gpio_defaults_block_11/gpio_defaults_low\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[9\]
+ gpio_defaults_block_11/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[0\]
+ gpio_defaults_block_12/gpio_defaults_low\[0\]
+ gpio_defaults_block_12/gpio_defaults_high\[10\]
+ gpio_defaults_block_12/gpio_defaults_low\[10\]
+ gpio_defaults_block_12/gpio_defaults_high\[11\]
+ gpio_defaults_block_12/gpio_defaults_low\[11\]
+ gpio_defaults_block_12/gpio_defaults_high\[12\]
+ gpio_defaults_block_12/gpio_defaults_low\[12\]
+ gpio_defaults_block_12/gpio_defaults_high\[1\]
+ gpio_defaults_block_12/gpio_defaults_low\[1\]
+ gpio_defaults_block_12/gpio_defaults_high\[2\]
+ gpio_defaults_block_12/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[0\]
+ gpio_defaults_block_1/gpio_defaults_low\[0\]
+ gpio_defaults_block_1/gpio_defaults_high\[10\]
+ gpio_defaults_block_1/gpio_defaults_low\[10\]
+ gpio_defaults_block_1/gpio_defaults_high\[11\]
+ gpio_defaults_block_1/gpio_defaults_low\[11\]
+ gpio_defaults_block_1/gpio_defaults_high\[12\]
+ gpio_defaults_block_1/gpio_defaults_low\[12\]
+ gpio_defaults_block_1/gpio_defaults_high\[1\]
+ gpio_defaults_block_1/gpio_defaults_low\[1\]
+ gpio_defaults_block_1/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_low\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[3\]
+ gpio_defaults_block_1/gpio_defaults_low\[4\]
+ gpio_defaults_block_1/gpio_defaults_high\[5\]
+ gpio_defaults_block_1/gpio_defaults_low\[5\]
+ gpio_defaults_block_1/gpio_defaults_high\[6\]
+ gpio_defaults_block_1/gpio_defaults_low\[6\]
+ gpio_defaults_block_1/gpio_defaults_high\[7\]
+ gpio_defaults_block_1/gpio_defaults_low\[7\]
+ gpio_defaults_block_1/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_low\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[9\]
+ gpio_defaults_block_1/gpio_defaults_low\[9\]
+ gpio_defaults_block_10/gpio_defaults_high\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[11\]
+ gpio_defaults_block_10/gpio_defaults_low\[11\]
+ gpio_defaults_block_10/gpio_defaults_high\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[2\]
+ gpio_defaults_block_10/gpio_defaults_low\[2\]
+ gpio_defaults_block_10/gpio_defaults_high\[3\]
+ gpio_defaults_block_10/gpio_defaults_low\[3\]
+ gpio_defaults_block_10/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_low\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[5\]
+ gpio_defaults_block_10/gpio_defaults_low\[5\]
+ gpio_defaults_block_10/gpio_defaults_high\[6\]
+ gpio_defaults_block_10/gpio_defaults_low\[6\]
+ gpio_defaults_block_10/gpio_defaults_high\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[7\]
+ gpio_defaults_block_10/gpio_defaults_low\[8\]
+ gpio_defaults_block_10/gpio_defaults_high\[9\]
+ gpio_defaults_block_10/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[10\]
+ gpio_defaults_block_15/gpio_defaults_low\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[7\]
+ gpio_defaults_block_15/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[11\]
+ gpio_defaults_block_13/gpio_defaults_low\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[10\]
+ gpio_defaults_block_14/gpio_defaults_low\[11\]
+ gpio_defaults_block_14/gpio_defaults_high\[12\]
+ gpio_defaults_block_14/gpio_defaults_low\[12\]
+ gpio_defaults_block_14/gpio_defaults_high\[1\]
+ gpio_defaults_block_14/gpio_defaults_low\[1\]
+ gpio_defaults_block_14/gpio_defaults_high\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[2\]
+ gpio_defaults_block_14/gpio_defaults_low\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[4\]
+ gpio_defaults_block_14/gpio_defaults_low\[5\]
+ gpio_defaults_block_14/gpio_defaults_high\[6\]
+ gpio_defaults_block_14/gpio_defaults_low\[6\]
+ gpio_defaults_block_14/gpio_defaults_high\[7\]
+ gpio_defaults_block_14/gpio_defaults_low\[7\]
+ gpio_defaults_block_14/gpio_defaults_high\[8\]
+ gpio_defaults_block_14/gpio_defaults_low\[8\]
+ gpio_defaults_block_14/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_low\[9\]
+ gpio_defaults_block_15/gpio_defaults_high\[0\]
+ gpio_defaults_block_15/gpio_defaults_low\[0\]
+ gpio_defaults_block_15/gpio_defaults_high\[10\]
+ gpio_defaults_block_15/gpio_defaults_high\[11\]
+ gpio_defaults_block_15/gpio_defaults_low\[11\]
+ gpio_defaults_block_15/gpio_defaults_high\[12\]
+ gpio_defaults_block_15/gpio_defaults_low\[12\]
+ gpio_defaults_block_15/gpio_defaults_high\[1\]
+ gpio_defaults_block_15/gpio_defaults_low\[1\]
+ gpio_defaults_block_15/gpio_defaults_high\[2\]
+ gpio_defaults_block_15/gpio_defaults_low\[2\]
+ gpio_defaults_block_15/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[4\]
+ gpio_defaults_block_15/gpio_defaults_low\[4\]
+ gpio_defaults_block_15/gpio_defaults_high\[5\]
+ gpio_defaults_block_15/gpio_defaults_low\[5\]
+ gpio_defaults_block_15/gpio_defaults_high\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[6\]
+ gpio_defaults_block_15/gpio_defaults_low\[7\]
+ gpio_defaults_block_15/gpio_defaults_high\[8\]
+ gpio_defaults_block_15/gpio_defaults_high\[9\]
+ gpio_defaults_block_15/gpio_defaults_low\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[3\]
+ gpio_defaults_block_12/gpio_defaults_low\[3\]
+ gpio_defaults_block_12/gpio_defaults_high\[4\]
+ gpio_defaults_block_12/gpio_defaults_low\[4\]
+ gpio_defaults_block_12/gpio_defaults_high\[5\]
+ gpio_defaults_block_12/gpio_defaults_low\[5\]
+ gpio_defaults_block_12/gpio_defaults_high\[6\]
+ gpio_defaults_block_12/gpio_defaults_low\[6\]
+ gpio_defaults_block_12/gpio_defaults_high\[7\]
+ gpio_defaults_block_12/gpio_defaults_high\[8\]
+ gpio_defaults_block_12/gpio_defaults_low\[8\]
+ gpio_defaults_block_12/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_low\[9\]
+ gpio_defaults_block_13/gpio_defaults_high\[0\]
+ gpio_defaults_block_13/gpio_defaults_low\[0\]
+ gpio_defaults_block_13/gpio_defaults_high\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[10\]
+ gpio_defaults_block_13/gpio_defaults_low\[11\]
+ gpio_defaults_block_13/gpio_defaults_high\[12\]
+ gpio_defaults_block_13/gpio_defaults_low\[12\]
+ gpio_defaults_block_13/gpio_defaults_high\[1\]
+ gpio_defaults_block_13/gpio_defaults_low\[1\]
+ gpio_defaults_block_13/gpio_defaults_high\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[2\]
+ gpio_defaults_block_13/gpio_defaults_low\[3\]
+ gpio_defaults_block_13/gpio_defaults_high\[4\]
+ gpio_defaults_block_13/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_low\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[6\]
+ gpio_defaults_block_13/gpio_defaults_low\[6\]
+ gpio_defaults_block_13/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_low\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[8\]
+ gpio_defaults_block_13/gpio_defaults_low\[8\]
+ gpio_defaults_block_13/gpio_defaults_high\[9\]
+ gpio_defaults_block_13/gpio_defaults_low\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[0\]
+ gpio_defaults_block_14/gpio_defaults_low\[0\]
+ gpio_defaults_block_14/gpio_defaults_high\[10\]
+ gpio_defaults_block_14/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[3\]
+ gpio_defaults_block_18/gpio_defaults_low\[5\]
+ gpio_defaults_block_18/gpio_defaults_low\[7\]
+ gpio_defaults_block_19/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[0\]
+ gpio_defaults_block_16/gpio_defaults_low\[10\]
+ gpio_defaults_block_16/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[11\]
+ gpio_defaults_block_17/gpio_defaults_low\[12\]
+ gpio_defaults_block_17/gpio_defaults_low\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[0\]
+ gpio_defaults_block_18/gpio_defaults_low\[0\]
+ gpio_defaults_block_18/gpio_defaults_high\[10\]
+ gpio_defaults_block_18/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_low\[11\]
+ gpio_defaults_block_18/gpio_defaults_high\[12\]
+ gpio_defaults_block_18/gpio_defaults_low\[12\]
+ gpio_defaults_block_18/gpio_defaults_high\[1\]
+ gpio_defaults_block_18/gpio_defaults_low\[1\]
+ gpio_defaults_block_18/gpio_defaults_high\[2\]
+ gpio_defaults_block_18/gpio_defaults_low\[2\]
+ gpio_defaults_block_18/gpio_defaults_high\[3\]
+ gpio_defaults_block_18/gpio_defaults_high\[4\]
+ gpio_defaults_block_18/gpio_defaults_low\[4\]
+ gpio_defaults_block_18/gpio_defaults_high\[5\]
+ gpio_defaults_block_18/gpio_defaults_high\[6\]
+ gpio_defaults_block_18/gpio_defaults_low\[6\]
+ gpio_defaults_block_18/gpio_defaults_high\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[8\]
+ gpio_defaults_block_18/gpio_defaults_low\[8\]
+ gpio_defaults_block_18/gpio_defaults_high\[9\]
+ gpio_defaults_block_18/gpio_defaults_low\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[0\]
+ gpio_defaults_block_19/gpio_defaults_low\[0\]
+ gpio_defaults_block_19/gpio_defaults_high\[10\]
+ gpio_defaults_block_19/gpio_defaults_low\[10\]
+ gpio_defaults_block_19/gpio_defaults_high\[11\]
+ gpio_defaults_block_19/gpio_defaults_high\[12\]
+ gpio_defaults_block_19/gpio_defaults_low\[12\]
+ gpio_defaults_block_19/gpio_defaults_high\[1\]
+ gpio_defaults_block_19/gpio_defaults_low\[1\]
+ gpio_defaults_block_19/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[0\]
+ gpio_defaults_block_16/gpio_defaults_high\[10\]
+ gpio_defaults_block_16/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[11\]
+ gpio_defaults_block_16/gpio_defaults_high\[12\]
+ gpio_defaults_block_16/gpio_defaults_low\[12\]
+ gpio_defaults_block_16/gpio_defaults_high\[1\]
+ gpio_defaults_block_16/gpio_defaults_low\[1\]
+ gpio_defaults_block_16/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_low\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[3\]
+ gpio_defaults_block_16/gpio_defaults_high\[4\]
+ gpio_defaults_block_16/gpio_defaults_low\[4\]
+ gpio_defaults_block_16/gpio_defaults_high\[5\]
+ gpio_defaults_block_16/gpio_defaults_low\[5\]
+ gpio_defaults_block_16/gpio_defaults_high\[6\]
+ gpio_defaults_block_16/gpio_defaults_low\[6\]
+ gpio_defaults_block_16/gpio_defaults_high\[7\]
+ gpio_defaults_block_16/gpio_defaults_low\[7\]
+ gpio_defaults_block_16/gpio_defaults_high\[8\]
+ gpio_defaults_block_16/gpio_defaults_low\[8\]
+ gpio_defaults_block_16/gpio_defaults_high\[9\]
+ gpio_defaults_block_16/gpio_defaults_low\[9\]
+ gpio_defaults_block_17/gpio_defaults_high\[0\]
+ gpio_defaults_block_17/gpio_defaults_low\[0\]
+ gpio_defaults_block_17/gpio_defaults_high\[10\]
+ gpio_defaults_block_17/gpio_defaults_low\[10\]
+ gpio_defaults_block_17/gpio_defaults_high\[11\]
+ gpio_defaults_block_17/gpio_defaults_high\[12\]
+ gpio_defaults_block_17/gpio_defaults_high\[1\]
+ gpio_defaults_block_17/gpio_defaults_low\[1\]
+ gpio_defaults_block_17/gpio_defaults_high\[2\]
+ gpio_defaults_block_17/gpio_defaults_low\[2\]
+ gpio_defaults_block_17/gpio_defaults_high\[3\]
+ gpio_defaults_block_17/gpio_defaults_low\[3\]
+ gpio_defaults_block_17/gpio_defaults_high\[4\]
+ gpio_defaults_block_17/gpio_defaults_low\[4\]
+ gpio_defaults_block_17/gpio_defaults_high\[5\]
+ gpio_defaults_block_17/gpio_defaults_low\[5\]
+ gpio_defaults_block_17/gpio_defaults_high\[6\]
+ gpio_defaults_block_17/gpio_defaults_low\[6\]
+ gpio_defaults_block_17/gpio_defaults_high\[7\]
+ gpio_defaults_block_17/gpio_defaults_high\[8\]
+ gpio_defaults_block_17/gpio_defaults_low\[8\]
+ gpio_defaults_block_17/gpio_defaults_high\[9\]
+ gpio_defaults_block_17/gpio_defaults_low\[9\]
+ gpio_defaults_block_24/gpio_defaults_high\[10\]
+ gpio_defaults_block_24/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[6\]
+ gpio_defaults_block_22/gpio_defaults_low\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[10\]
+ gpio_defaults_block_24/gpio_defaults_high\[11\]
+ gpio_defaults_block_24/gpio_defaults_low\[11\]
+ gpio_defaults_block_24/gpio_defaults_high\[12\]
+ gpio_defaults_block_24/gpio_defaults_low\[12\]
+ gpio_defaults_block_24/gpio_defaults_high\[1\]
+ gpio_defaults_block_24/gpio_defaults_low\[1\]
+ gpio_defaults_block_24/gpio_defaults_high\[2\]
+ gpio_defaults_block_24/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_low\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[4\]
+ gpio_defaults_block_24/gpio_defaults_low\[4\]
+ gpio_defaults_block_24/gpio_defaults_high\[5\]
+ gpio_defaults_block_24/gpio_defaults_low\[5\]
+ gpio_defaults_block_24/gpio_defaults_high\[6\]
+ gpio_defaults_block_24/gpio_defaults_low\[6\]
+ gpio_defaults_block_24/gpio_defaults_high\[7\]
+ gpio_defaults_block_24/gpio_defaults_low\[7\]
+ gpio_defaults_block_24/gpio_defaults_high\[8\]
+ gpio_defaults_block_24/gpio_defaults_low\[8\]
+ gpio_defaults_block_24/gpio_defaults_high\[9\]
+ gpio_defaults_block_24/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_high\[0\]
+ gpio_defaults_block_25/gpio_defaults_low\[0\]
+ gpio_defaults_block_25/gpio_defaults_high\[10\]
+ gpio_defaults_block_25/gpio_defaults_low\[10\]
+ gpio_defaults_block_25/gpio_defaults_high\[11\]
+ gpio_defaults_block_25/gpio_defaults_low\[11\]
+ gpio_defaults_block_25/gpio_defaults_high\[12\]
+ gpio_defaults_block_25/gpio_defaults_low\[12\]
+ gpio_defaults_block_25/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[0\]
+ gpio_defaults_block_22/gpio_defaults_low\[0\]
+ gpio_defaults_block_22/gpio_defaults_high\[10\]
+ gpio_defaults_block_22/gpio_defaults_low\[10\]
+ gpio_defaults_block_22/gpio_defaults_high\[11\]
+ gpio_defaults_block_22/gpio_defaults_low\[11\]
+ gpio_defaults_block_22/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_low\[12\]
+ gpio_defaults_block_22/gpio_defaults_high\[1\]
+ gpio_defaults_block_22/gpio_defaults_low\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[2\]
+ gpio_defaults_block_22/gpio_defaults_low\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[3\]
+ gpio_defaults_block_22/gpio_defaults_low\[3\]
+ gpio_defaults_block_22/gpio_defaults_high\[4\]
+ gpio_defaults_block_22/gpio_defaults_low\[4\]
+ gpio_defaults_block_22/gpio_defaults_high\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[5\]
+ gpio_defaults_block_22/gpio_defaults_low\[6\]
+ gpio_defaults_block_22/gpio_defaults_high\[7\]
+ gpio_defaults_block_22/gpio_defaults_low\[7\]
+ gpio_defaults_block_22/gpio_defaults_high\[8\]
+ gpio_defaults_block_22/gpio_defaults_low\[8\]
+ gpio_defaults_block_22/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[11\]
+ gpio_defaults_block_23/gpio_defaults_low\[11\]
+ gpio_defaults_block_23/gpio_defaults_high\[12\]
+ gpio_defaults_block_23/gpio_defaults_low\[12\]
+ gpio_defaults_block_23/gpio_defaults_high\[1\]
+ gpio_defaults_block_23/gpio_defaults_low\[1\]
+ gpio_defaults_block_23/gpio_defaults_high\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[2\]
+ gpio_defaults_block_23/gpio_defaults_low\[3\]
+ gpio_defaults_block_23/gpio_defaults_high\[4\]
+ gpio_defaults_block_23/gpio_defaults_low\[4\]
+ gpio_defaults_block_23/gpio_defaults_high\[5\]
+ gpio_defaults_block_23/gpio_defaults_low\[5\]
+ gpio_defaults_block_23/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_low\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[7\]
+ gpio_defaults_block_23/gpio_defaults_low\[7\]
+ gpio_defaults_block_23/gpio_defaults_high\[8\]
+ gpio_defaults_block_23/gpio_defaults_low\[8\]
+ gpio_defaults_block_23/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_low\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[11\]
+ gpio_defaults_block_28/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_low\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[11\]
+ gpio_defaults_block_27/gpio_defaults_high\[12\]
+ gpio_defaults_block_27/gpio_defaults_low\[12\]
+ gpio_defaults_block_27/gpio_defaults_high\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[1\]
+ gpio_defaults_block_27/gpio_defaults_low\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[3\]
+ gpio_defaults_block_27/gpio_defaults_low\[3\]
+ gpio_defaults_block_27/gpio_defaults_high\[4\]
+ gpio_defaults_block_27/gpio_defaults_high\[5\]
+ gpio_defaults_block_27/gpio_defaults_low\[5\]
+ gpio_defaults_block_27/gpio_defaults_high\[6\]
+ gpio_defaults_block_27/gpio_defaults_low\[6\]
+ gpio_defaults_block_27/gpio_defaults_high\[7\]
+ gpio_defaults_block_27/gpio_defaults_low\[7\]
+ gpio_defaults_block_27/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_low\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_high\[0\]
+ gpio_defaults_block_28/gpio_defaults_low\[0\]
+ gpio_defaults_block_28/gpio_defaults_high\[10\]
+ gpio_defaults_block_28/gpio_defaults_low\[10\]
+ gpio_defaults_block_28/gpio_defaults_high\[11\]
+ gpio_defaults_block_28/gpio_defaults_high\[12\]
+ gpio_defaults_block_28/gpio_defaults_low\[12\]
+ gpio_defaults_block_28/gpio_defaults_high\[1\]
+ gpio_defaults_block_28/gpio_defaults_low\[1\]
+ gpio_defaults_block_28/gpio_defaults_high\[2\]
+ gpio_defaults_block_28/gpio_defaults_low\[2\]
+ gpio_defaults_block_28/gpio_defaults_high\[3\]
+ gpio_defaults_block_28/gpio_defaults_low\[3\]
+ gpio_defaults_block_28/gpio_defaults_high\[4\]
+ gpio_defaults_block_28/gpio_defaults_low\[4\]
+ gpio_defaults_block_28/gpio_defaults_high\[5\]
+ gpio_defaults_block_28/gpio_defaults_high\[6\]
+ gpio_defaults_block_28/gpio_defaults_low\[6\]
+ gpio_defaults_block_28/gpio_defaults_high\[7\]
+ gpio_defaults_block_28/gpio_defaults_low\[7\]
+ gpio_defaults_block_28/gpio_defaults_high\[8\]
+ gpio_defaults_block_28/gpio_defaults_low\[8\]
+ gpio_defaults_block_28/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_low\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[1\]
+ gpio_defaults_block_25/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_low\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[3\]
+ gpio_defaults_block_25/gpio_defaults_low\[3\]
+ gpio_defaults_block_25/gpio_defaults_high\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[5\]
+ gpio_defaults_block_25/gpio_defaults_low\[5\]
+ gpio_defaults_block_25/gpio_defaults_high\[6\]
+ gpio_defaults_block_25/gpio_defaults_low\[6\]
+ gpio_defaults_block_25/gpio_defaults_high\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[7\]
+ gpio_defaults_block_25/gpio_defaults_low\[8\]
+ gpio_defaults_block_25/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[0\]
+ gpio_defaults_block_26/gpio_defaults_high\[10\]
+ gpio_defaults_block_26/gpio_defaults_low\[10\]
+ gpio_defaults_block_26/gpio_defaults_high\[11\]
+ gpio_defaults_block_26/gpio_defaults_low\[11\]
+ gpio_defaults_block_26/gpio_defaults_high\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[1\]
+ gpio_defaults_block_26/gpio_defaults_low\[2\]
+ gpio_defaults_block_26/gpio_defaults_high\[3\]
+ gpio_defaults_block_26/gpio_defaults_low\[3\]
+ gpio_defaults_block_26/gpio_defaults_high\[4\]
+ gpio_defaults_block_26/gpio_defaults_low\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[5\]
+ gpio_defaults_block_26/gpio_defaults_low\[5\]
+ gpio_defaults_block_26/gpio_defaults_high\[6\]
+ gpio_defaults_block_26/gpio_defaults_low\[6\]
+ gpio_defaults_block_26/gpio_defaults_high\[7\]
+ gpio_defaults_block_26/gpio_defaults_low\[7\]
+ gpio_defaults_block_26/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_low\[9\]
+ gpio_defaults_block_27/gpio_defaults_high\[0\]
+ gpio_defaults_block_27/gpio_defaults_low\[0\]
+ gpio_defaults_block_27/gpio_defaults_high\[10\]
+ gpio_defaults_block_27/gpio_defaults_low\[10\]
+ gpio_defaults_block_27/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[2\]
+ gpio_defaults_block_30/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[11\]
+ gpio_defaults_block_29/gpio_defaults_low\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[9\]
+ gpio_defaults_block_3/gpio_defaults_low\[2\]
+ gpio_defaults_block_3/gpio_defaults_low\[9\]
+ gpio_defaults_block_30/gpio_defaults_high\[0\]
+ gpio_defaults_block_30/gpio_defaults_low\[0\]
+ gpio_defaults_block_30/gpio_defaults_high\[10\]
+ gpio_defaults_block_30/gpio_defaults_low\[10\]
+ gpio_defaults_block_30/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_low\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[12\]
+ gpio_defaults_block_30/gpio_defaults_low\[12\]
+ gpio_defaults_block_30/gpio_defaults_high\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[1\]
+ gpio_defaults_block_30/gpio_defaults_low\[2\]
+ gpio_defaults_block_30/gpio_defaults_high\[3\]
+ gpio_defaults_block_30/gpio_defaults_low\[3\]
+ gpio_defaults_block_30/gpio_defaults_high\[4\]
+ gpio_defaults_block_30/gpio_defaults_low\[4\]
+ gpio_defaults_block_30/gpio_defaults_high\[5\]
+ gpio_defaults_block_30/gpio_defaults_low\[5\]
+ gpio_defaults_block_30/gpio_defaults_high\[6\]
+ gpio_defaults_block_30/gpio_defaults_low\[6\]
+ gpio_defaults_block_30/gpio_defaults_high\[7\]
+ gpio_defaults_block_30/gpio_defaults_low\[7\]
+ gpio_defaults_block_30/gpio_defaults_high\[8\]
+ gpio_defaults_block_30/gpio_defaults_low\[8\]
+ gpio_defaults_block_30/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[0\]
+ gpio_defaults_block_31/gpio_defaults_low\[0\]
+ gpio_defaults_block_31/gpio_defaults_high\[10\]
+ gpio_defaults_block_31/gpio_defaults_low\[10\]
+ gpio_defaults_block_31/gpio_defaults_high\[11\]
+ gpio_defaults_block_31/gpio_defaults_high\[12\]
+ gpio_defaults_block_31/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[0\]
+ gpio_defaults_block_29/gpio_defaults_low\[0\]
+ gpio_defaults_block_29/gpio_defaults_high\[10\]
+ gpio_defaults_block_29/gpio_defaults_low\[10\]
+ gpio_defaults_block_29/gpio_defaults_high\[11\]
+ gpio_defaults_block_29/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_low\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[1\]
+ gpio_defaults_block_29/gpio_defaults_low\[1\]
+ gpio_defaults_block_29/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_low\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[3\]
+ gpio_defaults_block_29/gpio_defaults_low\[3\]
+ gpio_defaults_block_29/gpio_defaults_high\[4\]
+ gpio_defaults_block_29/gpio_defaults_low\[4\]
+ gpio_defaults_block_29/gpio_defaults_high\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[6\]
+ gpio_defaults_block_29/gpio_defaults_low\[6\]
+ gpio_defaults_block_29/gpio_defaults_high\[7\]
+ gpio_defaults_block_29/gpio_defaults_low\[7\]
+ gpio_defaults_block_29/gpio_defaults_high\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[8\]
+ gpio_defaults_block_29/gpio_defaults_low\[9\]
+ gpio_defaults_block_3/gpio_defaults_high\[0\]
+ gpio_defaults_block_3/gpio_defaults_low\[0\]
+ gpio_defaults_block_3/gpio_defaults_high\[10\]
+ gpio_defaults_block_3/gpio_defaults_low\[10\]
+ gpio_defaults_block_3/gpio_defaults_high\[11\]
+ gpio_defaults_block_3/gpio_defaults_low\[11\]
+ gpio_defaults_block_3/gpio_defaults_high\[12\]
+ gpio_defaults_block_3/gpio_defaults_low\[12\]
+ gpio_defaults_block_3/gpio_defaults_high\[1\]
+ gpio_defaults_block_3/gpio_defaults_low\[1\]
+ gpio_defaults_block_3/gpio_defaults_high\[2\]
+ gpio_defaults_block_3/gpio_defaults_high\[3\]
+ gpio_defaults_block_3/gpio_defaults_low\[3\]
+ gpio_defaults_block_3/gpio_defaults_high\[4\]
+ gpio_defaults_block_3/gpio_defaults_low\[4\]
+ gpio_defaults_block_3/gpio_defaults_high\[5\]
+ gpio_defaults_block_3/gpio_defaults_low\[5\]
+ gpio_defaults_block_3/gpio_defaults_high\[6\]
+ gpio_defaults_block_3/gpio_defaults_low\[6\]
+ gpio_defaults_block_3/gpio_defaults_high\[7\]
+ gpio_defaults_block_3/gpio_defaults_low\[7\]
+ gpio_defaults_block_3/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_low\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[4\]
+ gpio_defaults_block_31/gpio_defaults_low\[7\]
+ gpio_defaults_block_31/gpio_defaults_low\[9\]
+ gpio_defaults_block_32/gpio_defaults_high\[0\]
+ gpio_defaults_block_32/gpio_defaults_low\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_high\[11\]
+ gpio_defaults_block_33/gpio_defaults_low\[11\]
+ gpio_defaults_block_33/gpio_defaults_high\[12\]
+ gpio_defaults_block_33/gpio_defaults_low\[12\]
+ gpio_defaults_block_33/gpio_defaults_high\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[2\]
+ gpio_defaults_block_33/gpio_defaults_low\[2\]
+ gpio_defaults_block_33/gpio_defaults_high\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[3\]
+ gpio_defaults_block_33/gpio_defaults_low\[4\]
+ gpio_defaults_block_33/gpio_defaults_high\[5\]
+ gpio_defaults_block_33/gpio_defaults_low\[5\]
+ gpio_defaults_block_33/gpio_defaults_high\[6\]
+ gpio_defaults_block_33/gpio_defaults_low\[6\]
+ gpio_defaults_block_33/gpio_defaults_high\[7\]
+ gpio_defaults_block_33/gpio_defaults_low\[7\]
+ gpio_defaults_block_33/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[8\]
+ gpio_defaults_block_33/gpio_defaults_low\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[0\]
+ gpio_defaults_block_34/gpio_defaults_low\[0\]
+ gpio_defaults_block_34/gpio_defaults_high\[10\]
+ gpio_defaults_block_34/gpio_defaults_low\[10\]
+ gpio_defaults_block_34/gpio_defaults_high\[11\]
+ gpio_defaults_block_34/gpio_defaults_low\[11\]
+ gpio_defaults_block_34/gpio_defaults_high\[12\]
+ gpio_defaults_block_34/gpio_defaults_low\[12\]
+ gpio_defaults_block_34/gpio_defaults_high\[1\]
+ gpio_defaults_block_34/gpio_defaults_low\[1\]
+ gpio_defaults_block_34/gpio_defaults_high\[2\]
+ gpio_defaults_block_34/gpio_defaults_low\[2\]
+ gpio_defaults_block_34/gpio_defaults_high\[3\]
+ gpio_defaults_block_34/gpio_defaults_low\[3\]
+ gpio_defaults_block_34/gpio_defaults_high\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[4\]
+ gpio_defaults_block_34/gpio_defaults_low\[5\]
+ gpio_defaults_block_34/gpio_defaults_high\[6\]
+ gpio_defaults_block_34/gpio_defaults_low\[6\]
+ gpio_defaults_block_34/gpio_defaults_high\[7\]
+ gpio_defaults_block_34/gpio_defaults_low\[7\]
+ gpio_defaults_block_34/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_low\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_low\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[1\]
+ gpio_defaults_block_31/gpio_defaults_low\[1\]
+ gpio_defaults_block_31/gpio_defaults_high\[2\]
+ gpio_defaults_block_31/gpio_defaults_low\[2\]
+ gpio_defaults_block_31/gpio_defaults_high\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[3\]
+ gpio_defaults_block_31/gpio_defaults_low\[4\]
+ gpio_defaults_block_31/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_low\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[6\]
+ gpio_defaults_block_31/gpio_defaults_low\[6\]
+ gpio_defaults_block_31/gpio_defaults_high\[7\]
+ gpio_defaults_block_31/gpio_defaults_high\[8\]
+ gpio_defaults_block_31/gpio_defaults_low\[8\]
+ gpio_defaults_block_31/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[0\]
+ gpio_defaults_block_32/gpio_defaults_high\[10\]
+ gpio_defaults_block_32/gpio_defaults_low\[10\]
+ gpio_defaults_block_32/gpio_defaults_high\[11\]
+ gpio_defaults_block_32/gpio_defaults_low\[11\]
+ gpio_defaults_block_32/gpio_defaults_high\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[1\]
+ gpio_defaults_block_32/gpio_defaults_high\[2\]
+ gpio_defaults_block_32/gpio_defaults_low\[2\]
+ gpio_defaults_block_32/gpio_defaults_high\[3\]
+ gpio_defaults_block_32/gpio_defaults_low\[3\]
+ gpio_defaults_block_32/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[5\]
+ gpio_defaults_block_32/gpio_defaults_low\[5\]
+ gpio_defaults_block_32/gpio_defaults_high\[6\]
+ gpio_defaults_block_32/gpio_defaults_low\[6\]
+ gpio_defaults_block_32/gpio_defaults_high\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[7\]
+ gpio_defaults_block_32/gpio_defaults_low\[8\]
+ gpio_defaults_block_32/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[0\]
+ gpio_defaults_block_33/gpio_defaults_low\[0\]
+ gpio_defaults_block_33/gpio_defaults_high\[10\]
+ gpio_defaults_block_33/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[0\]
+ gpio_defaults_block_37/gpio_defaults_low\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_high\[5\]
+ gpio_defaults_block_35/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[9\]
+ gpio_defaults_block_37/gpio_defaults_high\[0\]
+ gpio_defaults_block_37/gpio_defaults_high\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_high\[11\]
+ gpio_defaults_block_37/gpio_defaults_low\[11\]
+ gpio_defaults_block_37/gpio_defaults_high\[12\]
+ gpio_defaults_block_37/gpio_defaults_low\[12\]
+ gpio_defaults_block_37/gpio_defaults_high\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[2\]
+ gpio_defaults_block_37/gpio_defaults_low\[2\]
+ gpio_defaults_block_37/gpio_defaults_high\[3\]
+ gpio_defaults_block_37/gpio_defaults_low\[3\]
+ gpio_defaults_block_37/gpio_defaults_high\[4\]
+ gpio_defaults_block_37/gpio_defaults_low\[4\]
+ gpio_defaults_block_37/gpio_defaults_high\[5\]
+ gpio_defaults_block_37/gpio_defaults_low\[5\]
+ gpio_defaults_block_37/gpio_defaults_high\[6\]
+ gpio_defaults_block_37/gpio_defaults_low\[6\]
+ gpio_defaults_block_37/gpio_defaults_high\[7\]
+ gpio_defaults_block_37/gpio_defaults_low\[7\]
+ gpio_defaults_block_37/gpio_defaults_high\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[8\]
+ gpio_defaults_block_37/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_high\[0\]
+ gpio_defaults_block_4/gpio_defaults_low\[0\]
+ gpio_defaults_block_4/gpio_defaults_high\[10\]
+ gpio_defaults_block_4/gpio_defaults_low\[10\]
+ gpio_defaults_block_4/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_low\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[0\]
+ gpio_defaults_block_35/gpio_defaults_low\[0\]
+ gpio_defaults_block_35/gpio_defaults_high\[10\]
+ gpio_defaults_block_35/gpio_defaults_low\[10\]
+ gpio_defaults_block_35/gpio_defaults_high\[11\]
+ gpio_defaults_block_35/gpio_defaults_low\[11\]
+ gpio_defaults_block_35/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_low\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[1\]
+ gpio_defaults_block_35/gpio_defaults_low\[1\]
+ gpio_defaults_block_35/gpio_defaults_high\[2\]
+ gpio_defaults_block_35/gpio_defaults_low\[2\]
+ gpio_defaults_block_35/gpio_defaults_high\[3\]
+ gpio_defaults_block_35/gpio_defaults_low\[3\]
+ gpio_defaults_block_35/gpio_defaults_high\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[4\]
+ gpio_defaults_block_35/gpio_defaults_low\[5\]
+ gpio_defaults_block_35/gpio_defaults_high\[6\]
+ gpio_defaults_block_35/gpio_defaults_low\[6\]
+ gpio_defaults_block_35/gpio_defaults_high\[7\]
+ gpio_defaults_block_35/gpio_defaults_low\[7\]
+ gpio_defaults_block_35/gpio_defaults_high\[8\]
+ gpio_defaults_block_35/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_low\[9\]
+ gpio_defaults_block_36/gpio_defaults_high\[0\]
+ gpio_defaults_block_36/gpio_defaults_high\[10\]
+ gpio_defaults_block_36/gpio_defaults_low\[10\]
+ gpio_defaults_block_36/gpio_defaults_high\[11\]
+ gpio_defaults_block_36/gpio_defaults_low\[11\]
+ gpio_defaults_block_36/gpio_defaults_high\[12\]
+ gpio_defaults_block_36/gpio_defaults_low\[12\]
+ gpio_defaults_block_36/gpio_defaults_high\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[1\]
+ gpio_defaults_block_36/gpio_defaults_low\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[3\]
+ gpio_defaults_block_36/gpio_defaults_low\[3\]
+ gpio_defaults_block_36/gpio_defaults_high\[4\]
+ gpio_defaults_block_36/gpio_defaults_low\[4\]
+ gpio_defaults_block_36/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_low\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[6\]
+ gpio_defaults_block_36/gpio_defaults_low\[6\]
+ gpio_defaults_block_36/gpio_defaults_high\[7\]
+ gpio_defaults_block_36/gpio_defaults_low\[7\]
+ gpio_defaults_block_36/gpio_defaults_high\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[8\]
+ gpio_defaults_block_36/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[1\]
+ gpio_defaults_block_6/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[11\]
+ gpio_defaults_block_7/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[11\]
+ gpio_defaults_block_6/gpio_defaults_low\[11\]
+ gpio_defaults_block_6/gpio_defaults_high\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[2\]
+ gpio_defaults_block_6/gpio_defaults_low\[2\]
+ gpio_defaults_block_6/gpio_defaults_high\[3\]
+ gpio_defaults_block_6/gpio_defaults_high\[4\]
+ gpio_defaults_block_6/gpio_defaults_low\[4\]
+ gpio_defaults_block_6/gpio_defaults_high\[5\]
+ gpio_defaults_block_6/gpio_defaults_low\[5\]
+ gpio_defaults_block_6/gpio_defaults_high\[6\]
+ gpio_defaults_block_6/gpio_defaults_low\[6\]
+ gpio_defaults_block_6/gpio_defaults_high\[7\]
+ gpio_defaults_block_6/gpio_defaults_low\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[8\]
+ gpio_defaults_block_6/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_low\[9\]
+ gpio_defaults_block_7/gpio_defaults_high\[0\]
+ gpio_defaults_block_7/gpio_defaults_low\[0\]
+ gpio_defaults_block_7/gpio_defaults_high\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[10\]
+ gpio_defaults_block_7/gpio_defaults_low\[11\]
+ gpio_defaults_block_7/gpio_defaults_high\[12\]
+ gpio_defaults_block_7/gpio_defaults_low\[12\]
+ gpio_defaults_block_7/gpio_defaults_high\[1\]
+ gpio_defaults_block_7/gpio_defaults_low\[1\]
+ gpio_defaults_block_7/gpio_defaults_high\[2\]
+ gpio_defaults_block_7/gpio_defaults_low\[2\]
+ gpio_defaults_block_7/gpio_defaults_high\[3\]
+ gpio_defaults_block_7/gpio_defaults_low\[3\]
+ gpio_defaults_block_7/gpio_defaults_high\[4\]
+ gpio_defaults_block_7/gpio_defaults_high\[5\]
+ gpio_defaults_block_7/gpio_defaults_low\[5\]
+ gpio_defaults_block_7/gpio_defaults_high\[6\]
+ gpio_defaults_block_7/gpio_defaults_low\[6\]
+ gpio_defaults_block_7/gpio_defaults_high\[7\]
+ gpio_defaults_block_7/gpio_defaults_low\[7\]
+ gpio_defaults_block_7/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_low\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[9\]
+ gpio_defaults_block_7/gpio_defaults_low\[9\]
+ gpio_defaults_block_4/gpio_defaults_low\[12\]
+ gpio_defaults_block_4/gpio_defaults_high\[1\]
+ gpio_defaults_block_4/gpio_defaults_low\[1\]
+ gpio_defaults_block_4/gpio_defaults_high\[2\]
+ gpio_defaults_block_4/gpio_defaults_low\[2\]
+ gpio_defaults_block_4/gpio_defaults_high\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[4\]
+ gpio_defaults_block_4/gpio_defaults_low\[4\]
+ gpio_defaults_block_4/gpio_defaults_high\[5\]
+ gpio_defaults_block_4/gpio_defaults_low\[5\]
+ gpio_defaults_block_4/gpio_defaults_high\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[6\]
+ gpio_defaults_block_4/gpio_defaults_low\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[8\]
+ gpio_defaults_block_4/gpio_defaults_low\[9\]
+ gpio_defaults_block_5/gpio_defaults_high\[0\]
+ gpio_defaults_block_5/gpio_defaults_low\[0\]
+ gpio_defaults_block_5/gpio_defaults_high\[10\]
+ gpio_defaults_block_5/gpio_defaults_low\[10\]
+ gpio_defaults_block_5/gpio_defaults_high\[11\]
+ gpio_defaults_block_5/gpio_defaults_low\[11\]
+ gpio_defaults_block_5/gpio_defaults_high\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[1\]
+ gpio_defaults_block_5/gpio_defaults_high\[2\]
+ gpio_defaults_block_5/gpio_defaults_low\[2\]
+ gpio_defaults_block_5/gpio_defaults_high\[3\]
+ gpio_defaults_block_5/gpio_defaults_low\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[4\]
+ gpio_defaults_block_5/gpio_defaults_low\[4\]
+ gpio_defaults_block_5/gpio_defaults_high\[5\]
+ gpio_defaults_block_5/gpio_defaults_low\[5\]
+ gpio_defaults_block_5/gpio_defaults_high\[6\]
+ gpio_defaults_block_5/gpio_defaults_low\[6\]
+ gpio_defaults_block_5/gpio_defaults_high\[7\]
+ gpio_defaults_block_5/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_low\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[9\]
+ gpio_defaults_block_5/gpio_defaults_low\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[0\]
+ gpio_defaults_block_6/gpio_defaults_low\[0\]
+ gpio_defaults_block_6/gpio_defaults_high\[10\]
+ gpio_defaults_block_6/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[11\]
+ gpio_defaults_block_8/gpio_defaults_low\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[8\]
+ gpio_defaults_block_8/gpio_defaults_low\[9\]
+ gpio_defaults_block_9/gpio_defaults_high\[0\]
+ gpio_defaults_block_9/gpio_defaults_low\[1\]
+ gpio_defaults_block_9/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[0\]
+ gpio_defaults_block_8/gpio_defaults_low\[0\]
+ gpio_defaults_block_8/gpio_defaults_high\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_low\[11\]
+ gpio_defaults_block_8/gpio_defaults_high\[12\]
+ gpio_defaults_block_8/gpio_defaults_low\[12\]
+ gpio_defaults_block_8/gpio_defaults_high\[1\]
+ gpio_defaults_block_8/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[2\]
+ gpio_defaults_block_8/gpio_defaults_low\[2\]
+ gpio_defaults_block_8/gpio_defaults_high\[3\]
+ gpio_defaults_block_8/gpio_defaults_low\[3\]
+ gpio_defaults_block_8/gpio_defaults_high\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[5\]
+ gpio_defaults_block_8/gpio_defaults_low\[5\]
+ gpio_defaults_block_8/gpio_defaults_high\[6\]
+ gpio_defaults_block_8/gpio_defaults_low\[6\]
+ gpio_defaults_block_8/gpio_defaults_high\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[7\]
+ gpio_defaults_block_8/gpio_defaults_low\[8\]
+ gpio_defaults_block_8/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[0\]
+ gpio_defaults_block_9/gpio_defaults_high\[10\]
+ gpio_defaults_block_9/gpio_defaults_low\[10\]
+ gpio_defaults_block_9/gpio_defaults_high\[11\]
+ gpio_defaults_block_9/gpio_defaults_low\[11\]
+ gpio_defaults_block_9/gpio_defaults_high\[12\]
+ gpio_defaults_block_9/gpio_defaults_low\[12\]
+ gpio_defaults_block_9/gpio_defaults_high\[1\]
+ gpio_defaults_block_9/gpio_defaults_high\[2\]
+ gpio_defaults_block_9/gpio_defaults_low\[2\]
+ gpio_defaults_block_9/gpio_defaults_high\[3\]
+ gpio_defaults_block_9/gpio_defaults_low\[3\]
+ gpio_defaults_block_9/gpio_defaults_high\[4\]
+ gpio_defaults_block_9/gpio_defaults_low\[4\]
+ gpio_defaults_block_9/gpio_defaults_high\[5\]
+ gpio_defaults_block_9/gpio_defaults_low\[5\]
+ gpio_defaults_block_9/gpio_defaults_high\[6\]
+ gpio_defaults_block_9/gpio_defaults_low\[6\]
+ gpio_defaults_block_9/gpio_defaults_high\[7\]
+ gpio_defaults_block_9/gpio_defaults_low\[7\]
+ gpio_defaults_block_9/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[9\]
+ padframe/flash_io1_di_core
+ padframe/clock_core
+ padframe/mprj_analog_io[6]
+ padframe/gpio_in_core
+ padframe/flash_io1
+ padframe/mprj_analog_io[27]
+ padframe/mprj_analog_io[28]
+ padframe/mprj_analog_io[24]
+ padframe/mprj_analog_io[25]
+ padframe/mprj_analog_io[5]
+ padframe/mprj_analog_io[8]
+ padframe/mprj_analog_io[12]
+ padframe/mprj_analog_io[11]
+ padframe/mprj_analog_io[10]
+ padframe/mprj_analog_io[14]
+ padframe/mprj_analog_io[16]
+ padframe/mprj_analog_io[15]
+ padframe/mprj_analog_io[17]
+ padframe/mprj_analog_io[19]
+ padframe/mprj_analog_io[21]
+ padframe/mprj_analog_io[22]
+ padframe/mprj_analog_io[23]
+ padframe/mprj_io[28]
+ padframe/gpio
+ padframe/mprj_io[34]
+ padframe/flash_csb
+ padframe/mprj_analog_io[18]
+ padframe/mprj_analog_io[13]
+ padframe/mprj_io[8]
+ padframe/mprj_io[10]
+ padframe/mprj_io[21]
+ padframe/mprj_io[22]
+ padframe/clock
+ padframe/mprj_io[25]
+ padframe/mprj_analog_io[2]
+ padframe/mprj_io[17]
+ mprj/mprj/p[5]
+ padframe/mprj_io[0]
+ mprj/mprj/p[7]
+ mprj/mprj/p[6]
+ mprj/mprj/p[4]
+ padframe/mprj_io[9]
+ padframe/mprj_io[11]
+ padframe/mprj_io[33]
+ mgmt_buffers/mprj2_logic_high_inst/HI
+ mgmt_buffers/mprj_logic_high_inst/HI[462]
+ mgmt_buffers/mprj_logic_high_inst/HI[461]
+ mgmt_buffers/mprj_logic_high_inst/HI[460]
+ mgmt_buffers/mprj_logic_high_inst/HI[459]
+ mgmt_buffers/mprj_logic_high_inst/HI[458]
+ mgmt_buffers/mprj_logic_high_inst/HI[457]
+ mgmt_buffers/mprj_logic_high_inst/HI[456]
+ mgmt_buffers/mprj_logic_high_inst/HI[455]
+ mgmt_buffers/mprj_logic_high_inst/HI[454]
+ mgmt_buffers/mprj_logic_high_inst/HI[453]
+ mgmt_buffers/mprj_logic_high_inst/HI[452]
+ mgmt_buffers/mprj_logic_high_inst/HI[451]
+ mgmt_buffers/mprj_logic_high_inst/HI[450]
+ mgmt_buffers/mprj_logic_high_inst/HI[449]
+ mgmt_buffers/mprj_logic_high_inst/HI[448]
+ mgmt_buffers/mprj_logic_high_inst/HI[447]
+ mgmt_buffers/mprj_logic_high_inst/HI[446]
+ mgmt_buffers/mprj_logic_high_inst/HI[445]
+ mgmt_buffers/mprj_logic_high_inst/HI[444]
+ padframe/mprj_io[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[443]
+ mgmt_buffers/mprj_logic_high_inst/HI[442]
+ mgmt_buffers/mprj_logic_high_inst/HI[441]
+ mgmt_buffers/mprj_logic_high_inst/HI[440]
+ mgmt_buffers/mprj_logic_high_inst/HI[439]
+ mgmt_buffers/mprj_logic_high_inst/HI[438]
+ mgmt_buffers/mprj_logic_high_inst/HI[437]
+ mgmt_buffers/mprj_logic_high_inst/HI[436]
+ mgmt_buffers/mprj_logic_high_inst/HI[435]
+ mgmt_buffers/mprj_logic_high_inst/HI[434]
+ mgmt_buffers/mprj_logic_high_inst/HI[433]
+ mgmt_buffers/mprj_logic_high_inst/HI[432]
+ mgmt_buffers/mprj_logic_high_inst/HI[431]
+ mgmt_buffers/mprj_logic_high_inst/HI[430]
+ mgmt_buffers/mprj_logic_high_inst/HI[429]
+ mgmt_buffers/mprj_logic_high_inst/HI[428]
+ mgmt_buffers/mprj_logic_high_inst/HI[427]
+ mgmt_buffers/mprj_logic_high_inst/HI[426]
+ padframe/mprj_io[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[425]
+ mgmt_buffers/mprj_logic_high_inst/HI[424]
+ mgmt_buffers/mprj_logic_high_inst/HI[423]
+ mgmt_buffers/mprj_logic_high_inst/HI[422]
+ mgmt_buffers/mprj_logic_high_inst/HI[421]
+ mgmt_buffers/mprj_logic_high_inst/HI[420]
+ mgmt_buffers/mprj_logic_high_inst/HI[419]
+ mgmt_buffers/mprj_logic_high_inst/HI[418]
+ mgmt_buffers/mprj_logic_high_inst/HI[417]
+ mgmt_buffers/mprj_logic_high_inst/HI[416]
+ mgmt_buffers/mprj_logic_high_inst/HI[415]
+ mgmt_buffers/mprj_logic_high_inst/HI[414]
+ mgmt_buffers/mprj_logic_high_inst/HI[413]
+ mgmt_buffers/mprj_logic_high_inst/HI[412]
+ mgmt_buffers/mprj_logic_high_inst/HI[411]
+ mgmt_buffers/mprj_logic_high_inst/HI[410]
+ mgmt_buffers/mprj_logic_high_inst/HI[409]
+ mgmt_buffers/mprj_logic_high_inst/HI[408]
+ mgmt_buffers/mprj_logic_high_inst/HI[407]
+ mgmt_buffers/mprj_logic_high_inst/HI[406]
+ mgmt_buffers/mprj_logic_high_inst/HI[405]
+ mgmt_buffers/mprj_logic_high_inst/HI[404]
+ mgmt_buffers/mprj_logic_high_inst/HI[403]
+ mgmt_buffers/mprj_logic_high_inst/HI[402]
+ mgmt_buffers/mprj_logic_high_inst/HI[401]
+ mgmt_buffers/mprj_logic_high_inst/HI[400]
+ mgmt_buffers/mprj_logic_high_inst/HI[399]
+ mgmt_buffers/mprj_logic_high_inst/HI[398]
+ mgmt_buffers/mprj_logic_high_inst/HI[397]
+ mgmt_buffers/mprj_logic_high_inst/HI[396]
+ mgmt_buffers/mprj_logic_high_inst/HI[395]
+ mgmt_buffers/mprj_logic_high_inst/HI[394]
+ mgmt_buffers/mprj_logic_high_inst/HI[393]
+ mgmt_buffers/mprj_logic_high_inst/HI[392]
+ mgmt_buffers/mprj_logic_high_inst/HI[391]
+ mgmt_buffers/mprj_logic_high_inst/HI[390]
+ mgmt_buffers/mprj_logic_high_inst/HI[389]
+ mgmt_buffers/mprj_logic_high_inst/HI[388]
+ mgmt_buffers/mprj_logic_high_inst/HI[387]
+ mgmt_buffers/mprj_logic_high_inst/HI[386]
+ mgmt_buffers/mprj_logic_high_inst/HI[385]
+ mgmt_buffers/mprj_logic_high_inst/HI[384]
+ mgmt_buffers/mprj_logic_high_inst/HI[383]
+ mgmt_buffers/mprj_logic_high_inst/HI[382]
+ mgmt_buffers/mprj_logic_high_inst/HI[381]
+ mgmt_buffers/mprj_logic_high_inst/HI[380]
+ mgmt_buffers/mprj_logic_high_inst/HI[379]
+ mgmt_buffers/mprj_logic_high_inst/HI[378]
+ mgmt_buffers/mprj_logic_high_inst/HI[377]
+ mgmt_buffers/mprj_logic_high_inst/HI[376]
+ mgmt_buffers/mprj_logic_high_inst/HI[375]
+ mgmt_buffers/mprj_logic_high_inst/HI[374]
+ mgmt_buffers/mprj_logic_high_inst/HI[373]
+ mgmt_buffers/mprj_logic_high_inst/HI[372]
+ mgmt_buffers/mprj_logic_high_inst/HI[371]
+ mgmt_buffers/mprj_logic_high_inst/HI[370]
+ mgmt_buffers/mprj_logic_high_inst/HI[369]
+ mgmt_buffers/mprj_logic_high_inst/HI[368]
+ mgmt_buffers/mprj_logic_high_inst/HI[367]
+ mgmt_buffers/mprj_logic_high_inst/HI[366]
+ mgmt_buffers/mprj_logic_high_inst/HI[365]
+ mgmt_buffers/mprj_logic_high_inst/HI[364]
+ mgmt_buffers/mprj_logic_high_inst/HI[363]
+ padframe/mprj_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[362]
+ mgmt_buffers/mprj_logic_high_inst/HI[361]
+ mgmt_buffers/mprj_logic_high_inst/HI[360]
+ mgmt_buffers/mprj_logic_high_inst/HI[359]
+ mgmt_buffers/mprj_logic_high_inst/HI[358]
+ mgmt_buffers/mprj_logic_high_inst/HI[357]
+ mgmt_buffers/mprj_logic_high_inst/HI[356]
+ mgmt_buffers/mprj_logic_high_inst/HI[355]
+ mgmt_buffers/mprj_logic_high_inst/HI[354]
+ mgmt_buffers/mprj_logic_high_inst/HI[353]
+ mgmt_buffers/mprj_logic_high_inst/HI[352]
+ mgmt_buffers/mprj_logic_high_inst/HI[351]
+ mgmt_buffers/mprj_logic_high_inst/HI[350]
+ mgmt_buffers/mprj_logic_high_inst/HI[349]
+ mgmt_buffers/mprj_logic_high_inst/HI[348]
+ mgmt_buffers/mprj_logic_high_inst/HI[347]
+ mgmt_buffers/mprj_logic_high_inst/HI[346]
+ mgmt_buffers/mprj_logic_high_inst/HI[345]
+ mgmt_buffers/mprj_logic_high_inst/HI[344]
+ mgmt_buffers/mprj_logic_high_inst/HI[343]
+ mgmt_buffers/mprj_logic_high_inst/HI[342]
+ mgmt_buffers/mprj_logic_high_inst/HI[341]
+ mgmt_buffers/mprj_logic_high_inst/HI[340]
+ mgmt_buffers/mprj_logic_high_inst/HI[339]
+ mgmt_buffers/mprj_logic_high_inst/HI[338]
+ mgmt_buffers/mprj_logic_high_inst/HI[337]
+ mgmt_buffers/mprj_logic_high_inst/HI[336]
+ mgmt_buffers/mprj_logic_high_inst/HI[335]
+ mgmt_buffers/mprj_logic_high_inst/HI[334]
+ mgmt_buffers/mprj_logic_high_inst/HI[333]
+ mgmt_buffers/mprj_logic_high_inst/HI[332]
+ mgmt_buffers/mprj_logic_high_inst/HI[331]
+ mgmt_buffers/mprj_logic_high_inst/HI[330]
+ mgmt_buffers/mprj_logic_high_inst/HI[329]
+ mgmt_buffers/mprj_logic_high_inst/HI[328]
+ mgmt_buffers/mprj_logic_high_inst/HI[327]
+ mgmt_buffers/mprj_logic_high_inst/HI[326]
+ mgmt_buffers/mprj_logic_high_inst/HI[325]
+ mgmt_buffers/mprj_logic_high_inst/HI[324]
+ mgmt_buffers/mprj_logic_high_inst/HI[323]
+ mgmt_buffers/mprj_logic_high_inst/HI[322]
+ padframe/mprj_io[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[321]
+ mgmt_buffers/mprj_logic_high_inst/HI[320]
+ mgmt_buffers/mprj_logic_high_inst/HI[319]
+ mgmt_buffers/mprj_logic_high_inst/HI[318]
+ mgmt_buffers/mprj_logic_high_inst/HI[317]
+ mgmt_buffers/mprj_logic_high_inst/HI[316]
+ mgmt_buffers/mprj_logic_high_inst/HI[315]
+ mgmt_buffers/mprj_logic_high_inst/HI[314]
+ mgmt_buffers/mprj_logic_high_inst/HI[313]
+ mgmt_buffers/mprj_logic_high_inst/HI[312]
+ mgmt_buffers/mprj_logic_high_inst/HI[311]
+ mgmt_buffers/mprj_logic_high_inst/HI[310]
+ mgmt_buffers/mprj_logic_high_inst/HI[309]
+ mgmt_buffers/mprj_logic_high_inst/HI[308]
+ mgmt_buffers/mprj_logic_high_inst/HI[307]
+ mgmt_buffers/mprj_logic_high_inst/HI[306]
+ mgmt_buffers/mprj_logic_high_inst/HI[305]
+ mgmt_buffers/mprj_logic_high_inst/HI[304]
+ mgmt_buffers/mprj_logic_high_inst/HI[303]
+ mgmt_buffers/mprj_logic_high_inst/HI[302]
+ mgmt_buffers/mprj_logic_high_inst/HI[301]
+ mgmt_buffers/mprj_logic_high_inst/HI[300]
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+ mgmt_buffers/mprj_logic_high_inst/HI[291]
+ padframe/mprj_analog_io[4]
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+ padframe/mprj_analog_io[3]
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+ mgmt_buffers/mprj_logic_high_inst/HI[242]
+ mgmt_buffers/mprj_logic_high_inst/HI[241]
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+ mgmt_buffers/mprj_logic_high_inst/HI[236]
+ mgmt_buffers/mprj_logic_high_inst/HI[235]
+ mgmt_buffers/mprj_logic_high_inst/HI[234]
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+ mgmt_buffers/mprj_logic_high_inst/HI[231]
+ mgmt_buffers/mprj_logic_high_inst/HI[230]
+ mgmt_buffers/mprj_logic_high_inst/HI[229]
+ mgmt_buffers/mprj_logic_high_inst/HI[228]
+ padframe/mprj_analog_io[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[227]
+ mgmt_buffers/mprj_logic_high_inst/HI[226]
+ mgmt_buffers/mprj_logic_high_inst/HI[225]
+ mgmt_buffers/mprj_logic_high_inst/HI[224]
+ mgmt_buffers/mprj_logic_high_inst/HI[223]
+ mgmt_buffers/mprj_logic_high_inst/HI[222]
+ mgmt_buffers/mprj_logic_high_inst/HI[221]
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+ mgmt_buffers/mprj_logic_high_inst/HI[201]
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+ mgmt_buffers/mprj_logic_high_inst/HI[188]
+ padframe/mprj_io[37]
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+ mgmt_buffers/mprj_logic_high_inst/HI[185]
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+ mgmt_buffers/mprj_logic_high_inst/HI[138]
+ padframe/mprj_analog_io[9]
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+ mgmt_buffers/mprj_logic_high_inst/HI[91]
+ padframe/mprj_io[27]
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+ mgmt_buffers/mprj_logic_high_inst/HI[70]
+ mgmt_buffers/mprj_logic_high_inst/HI[69]
+ padframe/mprj_io[26]
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+ mgmt_buffers/mprj_logic_high_inst/HI[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[19]
+ mgmt_buffers/mprj_logic_high_inst/HI[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[17]
+ mgmt_buffers/mprj_logic_high_inst/HI[16]
+ padframe/mprj_analog_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[15]
+ mgmt_buffers/mprj_logic_high_inst/HI[14]
+ mgmt_buffers/mprj_logic_high_inst/HI[13]
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+ mgmt_buffers/mprj_logic_high_inst/HI[2]
+ mgmt_buffers/mprj_logic_high_inst/HI[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[0]
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1
+ mgmt_buffers/powergood_check/mprj_vdd_logic1
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1_h
+ mgmt_buffers/powergood_check/mprj_vdd_logic1_h
+ padframe/mprj_io[35]
+ mprj/mprj/p[3]
+ mprj/mprj/p[2]
+ mprj/mprj/p[1]
+ mprj/mprj/p[0]
+ padframe/mprj_io[30]
+ padframe/mprj_io[14]
+ padframe/mprj_io[13]
+ padframe/mprj_io[12]
+ padframe/mprj_io[19]
+ padframe/mprj_analog_io[0]
+ padframe/mprj_io[36]
+ padframe/mprj_io[32]
+ padframe/mprj_io[29]
+ padframe/mprj_io[31]
+ padframe/mprj_io[15]
+ padframe/mprj_io[16]
+ padframe/mprj_io[1]
+ padframe/mprj_io[2]
+ padframe/mprj_io[3]
+ padframe/mprj_io[4]
+ padframe/mprj_io[5]
+ padframe/mprj_io[6]
+ padframe/mprj_io[7]
+ padframe/resetb
+ padframe/resetb_core_h
+ padframe/vccd1_pad
+ padframe/vccd2_pad
+ padframe/vccd_pad
+ padframe/vdda1_pad
+ padframe/vdda1_pad2
+ padframe/vdda2_pad
+ padframe/vdda_pad
+ padframe/vddio_pad
+ padframe/vddio_pad2
+ padframe/vssa1_pad
+ padframe/vssa1_pad2
+ padframe/vssa2_pad
+ padframe/vssa_pad
+ padframe/vssd1_pad
+ padframe/vssd2_pad
+ padframe/vssd_pad
+ padframe/vssio_pad
+ padframe/vssio_pad2
+ padframe/mprj_pads.analog_a
+ padframe/mprj_pads.analog_b
+ padframe/loop_zero_clock
+ padframe/loop_one_clock
+ padframe/constant_value_inst\[0\]/one
+ padframe/constant_value_inst\[0\]/zero
+ padframe/constant_value_inst\[0\]/one_unbuf
+ padframe/constant_value_inst\[0\]/zero_unbuf
+ padframe/constant_value_inst\[1\]/one
+ padframe/constant_value_inst\[1\]/zero
+ padframe/constant_value_inst\[1\]/one_unbuf
+ padframe/constant_value_inst\[1\]/zero_unbuf
+ padframe/constant_value_inst\[2\]/one
+ padframe/constant_value_inst\[2\]/zero
+ padframe/constant_value_inst\[2\]/one_unbuf
+ padframe/constant_value_inst\[2\]/zero_unbuf
+ padframe/constant_value_inst\[3\]/one
+ padframe/constant_value_inst\[3\]/zero
+ padframe/constant_value_inst\[3\]/one_unbuf
+ padframe/constant_value_inst\[3\]/zero_unbuf
+ padframe/constant_value_inst\[4\]/one
+ padframe/constant_value_inst\[4\]/zero
+ padframe/constant_value_inst\[4\]/one_unbuf
+ padframe/constant_value_inst\[4\]/zero_unbuf
+ padframe/constant_value_inst\[5\]/one
+ padframe/constant_value_inst\[5\]/zero
+ padframe/constant_value_inst\[5\]/one_unbuf
+ padframe/constant_value_inst\[5\]/zero_unbuf
+ padframe/constant_value_inst\[6\]/one
+ padframe/constant_value_inst\[6\]/zero
+ padframe/constant_value_inst\[6\]/one_unbuf
+ padframe/constant_value_inst\[6\]/zero_unbuf
+ padframe/loop_zero_flash_clk
+ padframe/loop_one_flash_clk
+ padframe/loop_zero_flash_csb
+ padframe/loop_one_flash_csb
+ padframe/loop_zero_flash_io0
+ padframe/loop_one_flash_io0
+ padframe/loop_zero_flash_io1
+ padframe/loop_one_flash_io1
+ padframe/loop_zero_gpio
+ padframe/loop_one_gpio
+ padframe/mprj_pads.loop0_io\[0\]
+ padframe/mprj_pads.loop1_io\[0\]
+ padframe/mprj_pads.io_in\[0\]
+ padframe/mprj_pads.io_in_3v3\[0\]
+ padframe/mprj_pads.no_connect_1b\[0\]
+ padframe/mprj_pads.no_connect_1a\[0\]
+ padframe/mprj_pads.loop0_io\[10\]
+ padframe/mprj_pads.loop1_io\[10\]
+ padframe/mprj_pads.io_in\[10\]
+ padframe/mprj_pads.io_in_3v3\[10\]
+ padframe/mprj_pads.analog_noesd_io\[3\]
+ padframe/mprj_pads.loop0_io\[11\]
+ padframe/mprj_pads.loop1_io\[11\]
+ padframe/mprj_pads.io_in\[11\]
+ padframe/mprj_pads.io_in_3v3\[11\]
+ padframe/mprj_pads.analog_noesd_io\[4\]
+ padframe/mprj_pads.loop0_io\[12\]
+ padframe/mprj_pads.loop1_io\[12\]
+ padframe/mprj_pads.io_in\[12\]
+ padframe/mprj_pads.io_in_3v3\[12\]
+ padframe/mprj_pads.analog_noesd_io\[5\]
+ padframe/mprj_pads.loop0_io\[13\]
+ padframe/mprj_pads.loop1_io\[13\]
+ padframe/mprj_pads.io_in\[13\]
+ padframe/mprj_pads.io_in_3v3\[13\]
+ padframe/mprj_pads.analog_noesd_io\[6\]
+ padframe/mprj_pads.loop0_io\[14\]
+ padframe/mprj_pads.loop1_io\[14\]
+ padframe/mprj_pads.io_in\[14\]
+ padframe/mprj_pads.io_in_3v3\[14\]
+ padframe/mprj_pads.analog_noesd_io\[7\]
+ padframe/mprj_pads.loop0_io\[15\]
+ padframe/mprj_pads.loop1_io\[15\]
+ padframe/mprj_pads.io_in\[15\]
+ padframe/mprj_pads.io_in_3v3\[15\]
+ padframe/mprj_pads.analog_noesd_io\[8\]
+ padframe/mprj_pads.loop0_io\[16\]
+ padframe/mprj_pads.loop1_io\[16\]
+ padframe/mprj_pads.io_in\[16\]
+ padframe/mprj_pads.io_in_3v3\[16\]
+ padframe/mprj_pads.analog_noesd_io\[9\]
+ padframe/mprj_pads.loop0_io\[17\]
+ padframe/mprj_pads.loop1_io\[17\]
+ padframe/mprj_pads.io_in\[17\]
+ padframe/mprj_pads.io_in_3v3\[17\]
+ padframe/mprj_pads.analog_noesd_io\[10\]
+ padframe/mprj_pads.loop0_io\[18\]
+ padframe/mprj_pads.loop1_io\[18\]
+ padframe/mprj_pads.io_in\[18\]
+ padframe/mprj_pads.io_in_3v3\[18\]
+ padframe/mprj_pads.analog_noesd_io\[11\]
+ padframe/mprj_pads.loop0_io\[1\]
+ padframe/mprj_pads.loop1_io\[1\]
+ padframe/mprj_pads.io_in\[1\]
+ padframe/mprj_pads.io_in_3v3\[1\]
+ padframe/mprj_pads.no_connect_1b\[1\]
+ padframe/mprj_pads.no_connect_1a\[1\]
+ padframe/mprj_pads.loop0_io\[2\]
+ padframe/mprj_pads.loop1_io\[2\]
+ padframe/mprj_pads.io_in\[2\]
+ padframe/mprj_pads.io_in_3v3\[2\]
+ padframe/mprj_pads.no_connect_1b\[2\]
+ padframe/mprj_pads.no_connect_1a\[2\]
+ padframe/mprj_pads.loop0_io\[3\]
+ padframe/mprj_pads.loop1_io\[3\]
+ padframe/mprj_pads.io_in\[3\]
+ padframe/mprj_pads.io_in_3v3\[3\]
+ padframe/mprj_pads.no_connect_1b\[3\]
+ padframe/mprj_pads.no_connect_1a\[3\]
+ padframe/mprj_pads.loop0_io\[4\]
+ padframe/mprj_pads.loop1_io\[4\]
+ padframe/mprj_pads.io_in\[4\]
+ padframe/mprj_pads.io_in_3v3\[4\]
+ padframe/mprj_pads.no_connect_1b\[4\]
+ padframe/mprj_pads.no_connect_1a\[4\]
+ padframe/mprj_pads.loop0_io\[5\]
+ padframe/mprj_pads.loop1_io\[5\]
+ padframe/mprj_pads.io_in\[5\]
+ padframe/mprj_pads.io_in_3v3\[5\]
+ padframe/mprj_pads.no_connect_1b\[5\]
+ padframe/mprj_pads.no_connect_1a\[5\]
+ padframe/mprj_pads.loop0_io\[6\]
+ padframe/mprj_pads.loop1_io\[6\]
+ padframe/mprj_pads.io_in\[6\]
+ padframe/mprj_pads.io_in_3v3\[6\]
+ padframe/mprj_pads.no_connect_1b\[6\]
+ padframe/mprj_pads.no_connect_1a\[6\]
+ padframe/mprj_pads.loop0_io\[7\]
+ padframe/mprj_pads.loop1_io\[7\]
+ padframe/mprj_pads.io_in\[7\]
+ padframe/mprj_pads.io_in_3v3\[7\]
+ padframe/mprj_pads.analog_noesd_io\[0\]
+ padframe/mprj_pads.loop0_io\[8\]
+ padframe/mprj_pads.loop1_io\[8\]
+ padframe/mprj_pads.io_in\[8\]
+ padframe/mprj_pads.io_in_3v3\[8\]
+ padframe/mprj_pads.analog_noesd_io\[1\]
+ padframe/mprj_pads.loop0_io\[9\]
+ padframe/mprj_pads.loop1_io\[9\]
+ padframe/mprj_pads.io_in\[9\]
+ padframe/mprj_pads.io_in_3v3\[9\]
+ padframe/mprj_pads.analog_noesd_io\[2\]
+ padframe/mprj_pads.loop0_io\[19\]
+ padframe/mprj_pads.loop1_io\[19\]
+ padframe/mprj_pads.io_in\[19\]
+ padframe/mprj_pads.io_in_3v3\[19\]
+ padframe/mprj_pads.analog_noesd_io\[12\]
+ padframe/mprj_pads.loop0_io\[29\]
+ padframe/mprj_pads.loop1_io\[29\]
+ padframe/mprj_pads.io_in\[29\]
+ padframe/mprj_pads.io_in_3v3\[29\]
+ padframe/mprj_pads.analog_noesd_io\[22\]
+ padframe/mprj_pads.loop0_io\[30\]
+ padframe/mprj_pads.loop1_io\[30\]
+ padframe/mprj_pads.io_in\[30\]
+ padframe/mprj_pads.io_in_3v3\[30\]
+ padframe/mprj_pads.analog_noesd_io\[23\]
+ padframe/mprj_pads.loop0_io\[31\]
+ padframe/mprj_pads.loop1_io\[31\]
+ padframe/mprj_pads.io_in\[31\]
+ padframe/mprj_pads.io_in_3v3\[31\]
+ padframe/mprj_pads.analog_noesd_io\[24\]
+ padframe/mprj_pads.loop0_io\[32\]
+ padframe/mprj_pads.loop1_io\[32\]
+ padframe/mprj_pads.io_in\[32\]
+ padframe/mprj_pads.io_in_3v3\[32\]
+ padframe/mprj_pads.analog_noesd_io\[25\]
+ padframe/mprj_pads.loop0_io\[33\]
+ padframe/mprj_pads.loop1_io\[33\]
+ padframe/mprj_pads.io_in\[33\]
+ padframe/mprj_pads.io_in_3v3\[33\]
+ padframe/mprj_pads.analog_noesd_io\[26\]
+ padframe/mprj_pads.loop0_io\[34\]
+ padframe/mprj_pads.loop1_io\[34\]
+ padframe/mprj_pads.io_in\[34\]
+ padframe/mprj_pads.io_in_3v3\[34\]
+ padframe/mprj_pads.analog_noesd_io\[27\]
+ padframe/mprj_pads.loop0_io\[35\]
+ padframe/mprj_pads.loop1_io\[35\]
+ padframe/mprj_pads.io_in\[35\]
+ padframe/mprj_pads.io_in_3v3\[35\]
+ padframe/mprj_pads.analog_noesd_io\[28\]
+ padframe/mprj_pads.loop0_io\[36\]
+ padframe/mprj_pads.loop1_io\[36\]
+ padframe/mprj_pads.io_in\[36\]
+ padframe/mprj_pads.io_in_3v3\[36\]
+ padframe/mprj_pads.no_connect_2b\[0\]
+ padframe/mprj_pads.no_connect_2a\[0\]
+ padframe/mprj_pads.loop0_io\[37\]
+ padframe/mprj_pads.loop1_io\[37\]
+ padframe/mprj_pads.io_in\[37\]
+ padframe/mprj_pads.io_in_3v3\[37\]
+ padframe/mprj_pads.no_connect_2b\[1\]
+ padframe/mprj_pads.no_connect_2a\[1\]
+ padframe/mprj_pads.loop0_io\[20\]
+ padframe/mprj_pads.loop1_io\[20\]
+ padframe/mprj_pads.io_in\[20\]
+ padframe/mprj_pads.io_in_3v3\[20\]
+ padframe/mprj_pads.analog_noesd_io\[13\]
+ padframe/mprj_pads.loop0_io\[21\]
+ padframe/mprj_pads.loop1_io\[21\]
+ padframe/mprj_pads.io_in\[21\]
+ padframe/mprj_pads.io_in_3v3\[21\]
+ padframe/mprj_pads.analog_noesd_io\[14\]
+ padframe/mprj_pads.loop0_io\[22\]
+ padframe/mprj_pads.loop1_io\[22\]
+ padframe/mprj_pads.io_in\[22\]
+ padframe/mprj_pads.io_in_3v3\[22\]
+ padframe/mprj_pads.analog_noesd_io\[15\]
+ padframe/mprj_pads.loop0_io\[23\]
+ padframe/mprj_pads.loop1_io\[23\]
+ padframe/mprj_pads.io_in\[23\]
+ padframe/mprj_pads.io_in_3v3\[23\]
+ padframe/mprj_pads.analog_noesd_io\[16\]
+ padframe/mprj_pads.loop0_io\[24\]
+ padframe/mprj_pads.loop1_io\[24\]
+ padframe/mprj_pads.io_in\[24\]
+ padframe/mprj_pads.io_in_3v3\[24\]
+ padframe/mprj_pads.analog_noesd_io\[17\]
+ padframe/mprj_pads.loop0_io\[25\]
+ padframe/mprj_pads.loop1_io\[25\]
+ padframe/mprj_pads.io_in\[25\]
+ padframe/mprj_pads.io_in_3v3\[25\]
+ padframe/mprj_pads.analog_noesd_io\[18\]
+ padframe/mprj_pads.loop0_io\[26\]
+ padframe/mprj_pads.loop1_io\[26\]
+ padframe/mprj_pads.io_in\[26\]
+ padframe/mprj_pads.io_in_3v3\[26\]
+ padframe/mprj_pads.analog_noesd_io\[19\]
+ padframe/mprj_pads.loop0_io\[27\]
+ padframe/mprj_pads.loop1_io\[27\]
+ padframe/mprj_pads.io_in\[27\]
+ padframe/mprj_pads.io_in_3v3\[27\]
+ padframe/mprj_pads.analog_noesd_io\[20\]
+ padframe/mprj_pads.loop0_io\[28\]
+ padframe/mprj_pads.loop1_io\[28\]
+ padframe/mprj_pads.io_in\[28\]
+ padframe/mprj_pads.io_in_3v3\[28\]
+ padframe/mprj_pads.analog_noesd_io\[21\]
+ padframe/xres_vss_loop
+ padframe/xresloop
+ rstb_level/X
+ sigbuf/buf_out\[0\]
+ sigbuf/buf_out\[100\]
+ sigbuf/buf_in\[102\]
+ sigbuf/buf_out\[102\]
+ sigbuf/buf_in\[104\]
+ sigbuf/buf_out\[104\]
+ sigbuf/buf_in\[106\]
+ sigbuf/buf_in\[107\]
+ sigbuf/buf_out\[107\]
+ sigbuf/buf_in\[109\]
+ sigbuf/buf_in\[110\]
+ sigbuf/buf_in\[11\]
+ sigbuf/buf_out\[110\]
+ sigbuf/buf_in\[112\]
+ sigbuf/buf_in\[113\]
+ sigbuf/buf_out\[113\]
+ sigbuf/buf_in\[115\]
+ sigbuf/buf_in\[116\]
+ sigbuf/buf_in\[117\]
+ sigbuf/buf_out\[117\]
+ sigbuf/buf_in\[119\]
+ sigbuf/buf_in\[120\]
+ sigbuf/buf_in\[12\]
+ sigbuf/buf_in\[121\]
+ sigbuf/buf_in\[122\]
+ sigbuf/buf_in\[123\]
+ sigbuf/buf_out\[123\]
+ sigbuf/buf_in\[125\]
+ sigbuf/buf_in\[126\]
+ sigbuf/buf_in\[127\]
+ sigbuf/buf_in\[128\]
+ sigbuf/buf_in\[129\]
+ sigbuf/buf_out\[129\]
+ sigbuf/buf_out\[12\]
+ sigbuf/buf_in\[131\]
+ sigbuf/buf_in\[132\]
+ sigbuf/buf_in\[133\]
+ sigbuf/buf_in\[134\]
+ sigbuf/buf_in\[135\]
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+ sigbuf/buf_in\[137\]
+ sigbuf/buf_in\[138\]
+ sigbuf/buf_in\[139\]
+ sigbuf/buf_in\[140\]
+ sigbuf/buf_in\[14\]
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+ sigbuf/buf_in\[142\]
+ sigbuf/buf_in\[143\]
+ sigbuf/buf_in\[144\]
+ sigbuf/buf_in\[145\]
+ sigbuf/buf_out\[145\]
+ sigbuf/buf_in\[147\]
+ sigbuf/buf_in\[148\]
+ sigbuf/buf_in\[149\]
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+ sigbuf/buf_in\[15\]
+ sigbuf/buf_in\[151\]
+ sigbuf/buf_in\[152\]
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+ sigbuf/buf_in\[155\]
+ sigbuf/buf_in\[156\]
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+ sigbuf/buf_in\[159\]
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+ sigbuf/buf_in\[161\]
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+ sigbuf/buf_in\[163\]
+ sigbuf/buf_in\[164\]
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+ sigbuf/buf_in\[167\]
+ sigbuf/buf_in\[168\]
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+ sigbuf/buf_in\[17\]
+ sigbuf/buf_in\[171\]
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+ sigbuf/buf_in\[177\]
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+ sigbuf/buf_in\[180\]
+ sigbuf/buf_in\[18\]
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+ sigbuf/buf_in\[183\]
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+ sigbuf/buf_in\[185\]
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+ sigbuf/buf_in\[187\]
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+ sigbuf/buf_in\[189\]
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+ sigbuf/buf_out\[18\]
+ sigbuf/buf_in\[191\]
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+ sigbuf/buf_in\[193\]
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+ sigbuf/buf_in\[195\]
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+ sigbuf/buf_in\[20\]
+ sigbuf/buf_out\[1\]
+ sigbuf/buf_in\[21\]
+ sigbuf/buf_in\[22\]
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+ sigbuf/buf_in\[24\]
+ sigbuf/buf_in\[25\]
+ sigbuf/buf_in\[26\]
+ sigbuf/buf_in\[27\]
+ sigbuf/buf_in\[28\]
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+ sigbuf/buf_in\[30\]
+ sigbuf/buf_out\[2\]
+ sigbuf/buf_in\[31\]
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+ sigbuf/buf_in\[33\]
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+ sigbuf/buf_out\[4\]
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+ sigbuf/buf_in\[53\]
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+ sigbuf/buf_in\[90\]
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+ sigbuf/buf_in\[94\]
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+ sigbuf/buf_out\[95\]
+ sigbuf/buf_out\[96\]
+ sigbuf/buf_out\[97\]
+ sigbuf/buf_out\[98\]
+ sigbuf/buf_out\[99\]
+ sigbuf/buf_out\[9\]
+ user_id_value/mask_rev[10]
+ user_id_value/mask_rev[9]
+ user_id_value/mask_rev[8]
+ user_id_value/mask_rev[7]
+ user_id_value/mask_rev[6]
+ user_id_value/mask_rev[5]
+ user_id_value/mask_rev[4]
+ user_id_value/mask_rev[3]
+ user_id_value/mask_rev[2]
+ user_id_value/mask_rev[1]
+ user_id_value/mask_rev[0]
+ user_id_value/user_proj_id_high\[0\]
+ user_id_value/user_proj_id_high\[10\]
+ user_id_value/user_proj_id_high\[11\]
+ user_id_value/user_proj_id_high\[12\]
+ user_id_value/user_proj_id_high\[13\]
+ user_id_value/user_proj_id_high\[14\]
+ user_id_value/user_proj_id_high\[15\]
+ user_id_value/user_proj_id_high\[16\]
+ user_id_value/user_proj_id_high\[17\]
+ user_id_value/user_proj_id_high\[18\]
+ user_id_value/user_proj_id_high\[19\]
+ user_id_value/user_proj_id_high\[1\]
+ user_id_value/user_proj_id_high\[20\]
+ user_id_value/user_proj_id_high\[21\]
+ user_id_value/user_proj_id_high\[22\]
+ user_id_value/user_proj_id_high\[23\]
+ user_id_value/user_proj_id_high\[24\]
+ user_id_value/user_proj_id_high\[25\]
+ user_id_value/user_proj_id_high\[26\]
+ user_id_value/user_proj_id_high\[27\]
+ user_id_value/user_proj_id_high\[28\]
+ user_id_value/user_proj_id_high\[29\]
+ user_id_value/user_proj_id_high\[2\]
+ user_id_value/user_proj_id_high\[30\]
+ user_id_value/user_proj_id_high\[31\]
+ user_id_value/user_proj_id_high\[3\]
+ user_id_value/user_proj_id_high\[4\]
+ user_id_value/user_proj_id_high\[5\]
+ user_id_value/user_proj_id_high\[6\]
+ user_id_value/user_proj_id_high\[7\]
+ user_id_value/user_proj_id_high\[8\]
+ user_id_value/user_proj_id_high\[9\]
+ spare_logic\[0\]/spare_xfq[1]
+ spare_logic\[0\]/spare_xfq[0]
+ spare_logic\[0\]/spare_xfqn[1]
+ spare_logic\[0\]/spare_xfqn[0]
+ spare_logic\[0\]/spare_xi[3]
+ spare_logic\[0\]/spare_xi[2]
+ spare_logic\[0\]/spare_xi[1]
+ spare_logic\[0\]/spare_xi[0]
+ spare_logic\[0\]/spare_xib
+ spare_logic\[0\]/spare_xmx[1]
+ spare_logic\[0\]/spare_xmx[0]
+ spare_logic\[0\]/spare_xna[1]
+ spare_logic\[0\]/spare_xna[0]
+ spare_logic\[0\]/spare_xno[1]
+ spare_logic\[0\]/spare_xno[0]
+ spare_logic\[0\]/spare_xz[26]
+ spare_logic\[0\]/spare_xz[25]
+ spare_logic\[0\]/spare_xz[24]
+ spare_logic\[0\]/spare_xz[23]
+ spare_logic\[0\]/spare_xz[22]
+ spare_logic\[0\]/spare_xz[21]
+ spare_logic\[0\]/spare_xz[20]
+ spare_logic\[0\]/spare_xz[19]
+ spare_logic\[0\]/spare_xz[18]
+ spare_logic\[0\]/spare_xz[17]
+ spare_logic\[0\]/spare_xz[16]
+ spare_logic\[0\]/spare_xz[15]
+ spare_logic\[0\]/spare_xz[14]
+ spare_logic\[0\]/spare_xz[13]
+ spare_logic\[0\]/spare_xz[12]
+ spare_logic\[0\]/spare_xz[11]
+ spare_logic\[0\]/spare_xz[10]
+ spare_logic\[0\]/spare_xz[9]
+ spare_logic\[0\]/spare_xz[8]
+ spare_logic\[0\]/spare_xz[7]
+ spare_logic\[0\]/spare_xz[6]
+ spare_logic\[0\]/spare_xz[5]
+ spare_logic\[0\]/spare_xz[4]
+ spare_logic\[0\]/spare_xz[3]
+ spare_logic\[0\]/spare_xz[2]
+ spare_logic\[0\]/spare_xz[1]
+ spare_logic\[0\]/spare_xz[0]
+ spare_logic\[0\]/spare_logic1\[0\]
+ spare_logic\[0\]/spare_logic1\[10\]
+ spare_logic\[0\]/spare_logic1\[11\]
+ spare_logic\[0\]/spare_logic1\[12\]
+ spare_logic\[0\]/spare_logic1\[13\]
+ spare_logic\[0\]/spare_logic1\[14\]
+ spare_logic\[0\]/spare_logic1\[15\]
+ spare_logic\[0\]/spare_logic1\[16\]
+ spare_logic\[0\]/spare_logic1\[17\]
+ spare_logic\[0\]/spare_logic1\[18\]
+ spare_logic\[0\]/spare_logic1\[19\]
+ spare_logic\[0\]/spare_logic1\[1\]
+ spare_logic\[0\]/spare_logic1\[20\]
+ spare_logic\[0\]/spare_logic1\[21\]
+ spare_logic\[0\]/spare_logic1\[22\]
+ spare_logic\[0\]/spare_logic1\[23\]
+ spare_logic\[0\]/spare_logic1\[24\]
+ spare_logic\[0\]/spare_logic1\[25\]
+ spare_logic\[0\]/spare_logic1\[26\]
+ spare_logic\[0\]/spare_logic1\[2\]
+ spare_logic\[0\]/spare_logic1\[3\]
+ spare_logic\[0\]/spare_logic1\[4\]
+ spare_logic\[0\]/spare_logic1\[5\]
+ spare_logic\[0\]/spare_logic1\[6\]
+ spare_logic\[0\]/spare_logic1\[7\]
+ spare_logic\[0\]/spare_logic1\[8\]
+ spare_logic\[0\]/spare_logic1\[9\]
+ spare_logic\[1\]/spare_xfq[1]
+ spare_logic\[1\]/spare_xfq[0]
+ spare_logic\[1\]/spare_xfqn[1]
+ spare_logic\[1\]/spare_xfqn[0]
+ spare_logic\[1\]/spare_xi[3]
+ spare_logic\[1\]/spare_xi[2]
+ spare_logic\[1\]/spare_xi[1]
+ spare_logic\[1\]/spare_xi[0]
+ spare_logic\[1\]/spare_xib
+ spare_logic\[1\]/spare_xmx[1]
+ spare_logic\[1\]/spare_xmx[0]
+ spare_logic\[1\]/spare_xna[1]
+ spare_logic\[1\]/spare_xna[0]
+ spare_logic\[1\]/spare_xno[1]
+ spare_logic\[1\]/spare_xno[0]
+ spare_logic\[1\]/spare_xz[26]
+ spare_logic\[1\]/spare_xz[25]
+ spare_logic\[1\]/spare_xz[24]
+ spare_logic\[1\]/spare_xz[23]
+ spare_logic\[1\]/spare_xz[22]
+ spare_logic\[1\]/spare_xz[21]
+ spare_logic\[1\]/spare_xz[20]
+ spare_logic\[1\]/spare_xz[19]
+ spare_logic\[1\]/spare_xz[18]
+ spare_logic\[1\]/spare_xz[17]
+ spare_logic\[1\]/spare_xz[16]
+ spare_logic\[1\]/spare_xz[15]
+ spare_logic\[1\]/spare_xz[14]
+ spare_logic\[1\]/spare_xz[13]
+ spare_logic\[1\]/spare_xz[12]
+ spare_logic\[1\]/spare_xz[11]
+ spare_logic\[1\]/spare_xz[10]
+ spare_logic\[1\]/spare_xz[9]
+ spare_logic\[1\]/spare_xz[8]
+ spare_logic\[1\]/spare_xz[7]
+ spare_logic\[1\]/spare_xz[6]
+ spare_logic\[1\]/spare_xz[5]
+ spare_logic\[1\]/spare_xz[4]
+ spare_logic\[1\]/spare_xz[3]
+ spare_logic\[1\]/spare_xz[2]
+ spare_logic\[1\]/spare_xz[1]
+ spare_logic\[1\]/spare_xz[0]
+ spare_logic\[1\]/spare_logic1\[0\]
+ spare_logic\[1\]/spare_logic1\[10\]
+ spare_logic\[1\]/spare_logic1\[11\]
+ spare_logic\[1\]/spare_logic1\[12\]
+ spare_logic\[1\]/spare_logic1\[13\]
+ spare_logic\[1\]/spare_logic1\[14\]
+ spare_logic\[1\]/spare_logic1\[15\]
+ spare_logic\[1\]/spare_logic1\[16\]
+ spare_logic\[1\]/spare_logic1\[17\]
+ spare_logic\[1\]/spare_logic1\[18\]
+ spare_logic\[1\]/spare_logic1\[19\]
+ spare_logic\[1\]/spare_logic1\[1\]
+ spare_logic\[1\]/spare_logic1\[20\]
+ spare_logic\[1\]/spare_logic1\[21\]
+ spare_logic\[1\]/spare_logic1\[22\]
+ spare_logic\[1\]/spare_logic1\[23\]
+ spare_logic\[1\]/spare_logic1\[24\]
+ spare_logic\[1\]/spare_logic1\[25\]
+ spare_logic\[1\]/spare_logic1\[26\]
+ spare_logic\[1\]/spare_logic1\[2\]
+ spare_logic\[1\]/spare_logic1\[3\]
+ spare_logic\[1\]/spare_logic1\[4\]
+ spare_logic\[1\]/spare_logic1\[5\]
+ spare_logic\[1\]/spare_logic1\[6\]
+ spare_logic\[1\]/spare_logic1\[7\]
+ spare_logic\[1\]/spare_logic1\[8\]
+ spare_logic\[1\]/spare_logic1\[9\]
+ spare_logic\[2\]/spare_xfq[1]
+ spare_logic\[2\]/spare_xfq[0]
+ spare_logic\[2\]/spare_xfqn[1]
+ spare_logic\[2\]/spare_xfqn[0]
+ spare_logic\[2\]/spare_xi[3]
+ spare_logic\[2\]/spare_xi[2]
+ spare_logic\[2\]/spare_xi[1]
+ spare_logic\[2\]/spare_xi[0]
+ spare_logic\[2\]/spare_xib
+ spare_logic\[2\]/spare_xmx[1]
+ spare_logic\[2\]/spare_xmx[0]
+ spare_logic\[2\]/spare_xna[1]
+ spare_logic\[2\]/spare_xna[0]
+ spare_logic\[2\]/spare_xno[1]
+ spare_logic\[2\]/spare_xno[0]
+ spare_logic\[2\]/spare_xz[26]
+ spare_logic\[2\]/spare_xz[25]
+ spare_logic\[2\]/spare_xz[24]
+ spare_logic\[2\]/spare_xz[23]
+ spare_logic\[2\]/spare_xz[22]
+ spare_logic\[2\]/spare_xz[21]
+ spare_logic\[2\]/spare_xz[20]
+ spare_logic\[2\]/spare_xz[19]
+ spare_logic\[2\]/spare_xz[18]
+ spare_logic\[2\]/spare_xz[17]
+ spare_logic\[2\]/spare_xz[16]
+ spare_logic\[2\]/spare_xz[15]
+ spare_logic\[2\]/spare_xz[14]
+ spare_logic\[2\]/spare_xz[13]
+ spare_logic\[2\]/spare_xz[12]
+ spare_logic\[2\]/spare_xz[11]
+ spare_logic\[2\]/spare_xz[10]
+ spare_logic\[2\]/spare_xz[9]
+ spare_logic\[2\]/spare_xz[8]
+ spare_logic\[2\]/spare_xz[7]
+ spare_logic\[2\]/spare_xz[6]
+ spare_logic\[2\]/spare_xz[5]
+ spare_logic\[2\]/spare_xz[4]
+ spare_logic\[2\]/spare_xz[3]
+ spare_logic\[2\]/spare_xz[2]
+ spare_logic\[2\]/spare_xz[1]
+ spare_logic\[2\]/spare_xz[0]
+ spare_logic\[2\]/spare_logic1\[0\]
+ spare_logic\[2\]/spare_logic1\[10\]
+ spare_logic\[2\]/spare_logic1\[11\]
+ spare_logic\[2\]/spare_logic1\[12\]
+ spare_logic\[2\]/spare_logic1\[13\]
+ spare_logic\[2\]/spare_logic1\[14\]
+ spare_logic\[2\]/spare_logic1\[15\]
+ spare_logic\[2\]/spare_logic1\[16\]
+ spare_logic\[2\]/spare_logic1\[17\]
+ spare_logic\[2\]/spare_logic1\[18\]
+ spare_logic\[2\]/spare_logic1\[19\]
+ spare_logic\[2\]/spare_logic1\[1\]
+ spare_logic\[2\]/spare_logic1\[20\]
+ spare_logic\[2\]/spare_logic1\[21\]
+ spare_logic\[2\]/spare_logic1\[22\]
+ spare_logic\[2\]/spare_logic1\[23\]
+ spare_logic\[2\]/spare_logic1\[24\]
+ spare_logic\[2\]/spare_logic1\[25\]
+ spare_logic\[2\]/spare_logic1\[26\]
+ spare_logic\[2\]/spare_logic1\[2\]
+ spare_logic\[2\]/spare_logic1\[3\]
+ spare_logic\[2\]/spare_logic1\[4\]
+ spare_logic\[2\]/spare_logic1\[5\]
+ spare_logic\[2\]/spare_logic1\[6\]
+ spare_logic\[2\]/spare_logic1\[7\]
+ spare_logic\[2\]/spare_logic1\[8\]
+ spare_logic\[2\]/spare_logic1\[9\]
+ spare_logic\[3\]/spare_xfq[1]
+ spare_logic\[3\]/spare_xfq[0]
+ spare_logic\[3\]/spare_xfqn[1]
+ spare_logic\[3\]/spare_xfqn[0]
+ spare_logic\[3\]/spare_xi[3]
+ spare_logic\[3\]/spare_xi[2]
+ spare_logic\[3\]/spare_xi[1]
+ spare_logic\[3\]/spare_xi[0]
+ spare_logic\[3\]/spare_xib
+ spare_logic\[3\]/spare_xmx[1]
+ spare_logic\[3\]/spare_xmx[0]
+ spare_logic\[3\]/spare_xna[1]
+ spare_logic\[3\]/spare_xna[0]
+ spare_logic\[3\]/spare_xno[1]
+ spare_logic\[3\]/spare_xno[0]
+ spare_logic\[3\]/spare_xz[26]
+ spare_logic\[3\]/spare_xz[25]
+ spare_logic\[3\]/spare_xz[24]
+ spare_logic\[3\]/spare_xz[23]
+ spare_logic\[3\]/spare_xz[22]
+ spare_logic\[3\]/spare_xz[21]
+ spare_logic\[3\]/spare_xz[20]
+ spare_logic\[3\]/spare_xz[19]
+ spare_logic\[3\]/spare_xz[18]
+ spare_logic\[3\]/spare_xz[17]
+ spare_logic\[3\]/spare_xz[16]
+ spare_logic\[3\]/spare_xz[15]
+ spare_logic\[3\]/spare_xz[14]
+ spare_logic\[3\]/spare_xz[13]
+ spare_logic\[3\]/spare_xz[12]
+ spare_logic\[3\]/spare_xz[11]
+ spare_logic\[3\]/spare_xz[10]
+ spare_logic\[3\]/spare_xz[9]
+ spare_logic\[3\]/spare_xz[8]
+ spare_logic\[3\]/spare_xz[7]
+ spare_logic\[3\]/spare_xz[6]
+ spare_logic\[3\]/spare_xz[5]
+ spare_logic\[3\]/spare_xz[4]
+ spare_logic\[3\]/spare_xz[3]
+ spare_logic\[3\]/spare_xz[2]
+ spare_logic\[3\]/spare_xz[1]
+ spare_logic\[3\]/spare_xz[0]
+ spare_logic\[3\]/spare_logic1\[0\]
+ spare_logic\[3\]/spare_logic1\[10\]
+ spare_logic\[3\]/spare_logic1\[11\]
+ spare_logic\[3\]/spare_logic1\[12\]
+ spare_logic\[3\]/spare_logic1\[13\]
+ spare_logic\[3\]/spare_logic1\[14\]
+ spare_logic\[3\]/spare_logic1\[15\]
+ spare_logic\[3\]/spare_logic1\[16\]
+ spare_logic\[3\]/spare_logic1\[17\]
+ spare_logic\[3\]/spare_logic1\[18\]
+ spare_logic\[3\]/spare_logic1\[19\]
+ spare_logic\[3\]/spare_logic1\[1\]
+ spare_logic\[3\]/spare_logic1\[20\]
+ spare_logic\[3\]/spare_logic1\[21\]
+ spare_logic\[3\]/spare_logic1\[22\]
+ spare_logic\[3\]/spare_logic1\[23\]
+ spare_logic\[3\]/spare_logic1\[24\]
+ spare_logic\[3\]/spare_logic1\[25\]
+ spare_logic\[3\]/spare_logic1\[26\]
+ spare_logic\[3\]/spare_logic1\[2\]
+ spare_logic\[3\]/spare_logic1\[3\]
+ spare_logic\[3\]/spare_logic1\[4\]
+ spare_logic\[3\]/spare_logic1\[5\]
+ spare_logic\[3\]/spare_logic1\[6\]
+ spare_logic\[3\]/spare_logic1\[7\]
+ spare_logic\[3\]/spare_logic1\[8\]
+ spare_logic\[3\]/spare_logic1\[9\]
+ user_id_value/mask_rev[31]
+ user_id_value/mask_rev[30]
+ user_id_value/mask_rev[29]
+ user_id_value/mask_rev[28]
+ user_id_value/mask_rev[27]
+ user_id_value/mask_rev[26]
+ user_id_value/mask_rev[25]
+ user_id_value/mask_rev[24]
+ user_id_value/mask_rev[23]
+ user_id_value/mask_rev[22]
+ user_id_value/mask_rev[21]
+ user_id_value/mask_rev[20]
+ user_id_value/mask_rev[19]
+ user_id_value/mask_rev[18]
+ user_id_value/mask_rev[17]
+ user_id_value/mask_rev[16]
+ user_id_value/mask_rev[15]
+ user_id_value/mask_rev[14]
+ user_id_value/mask_rev[13]
+ user_id_value/mask_rev[12]
+ user_id_value/mask_rev[11]
+Found 629 partially unannotated nets.
+ flash_clkrst_buffers/out_s[7]
+  padframe/flash_clk_pad/OE_N
+ flash_clkrst_buffers/out_s[8]
+  padframe/flash_csb_pad/OUT
+ flash_clkrst_buffers/out_s[9]
+  padframe/flash_clk_pad/OUT
+ flash_clkrst_buffers/out_s[0]
+  padframe/flash_io1_pad/OUT
+ flash_clkrst_buffers/out_s[1]
+  padframe/flash_io0_pad/OUT
+ flash_clkrst_buffers/out_s[2]
+  padframe/flash_io1_pad/DM[2]
+  padframe/flash_io1_pad/DM[1]
+  padframe/flash_io1_pad/INP_DIS
+ flash_clkrst_buffers/out_s[3]
+  padframe/flash_io0_pad/DM[2]
+  padframe/flash_io0_pad/DM[1]
+  padframe/flash_io0_pad/INP_DIS
+ flash_clkrst_buffers/out_s[4]
+  padframe/flash_io1_pad/DM[0]
+  padframe/flash_io1_pad/OE_N
+ flash_clkrst_buffers/out_s[5]
+  padframe/flash_io0_pad/DM[0]
+  padframe/flash_io0_pad/OE_N
+ flash_clkrst_buffers/out_s[6]
+  padframe/flash_csb_pad/OE_N
+ gpio_control_bidir_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[0]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[1]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[2]
+ gpio_control_bidir_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[0\]/HLD_OVR
+ gpio_control_bidir_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[0\]/INP_DIS
+ gpio_control_bidir_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[0\]/OUT
+ gpio_control_bidir_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[0\]/OE_N
+ gpio_control_bidir_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/SLOW
+ gpio_control_bidir_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/VTRIP_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_EN
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_POL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_SEL
+ gpio_control_bidir_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[0]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[1]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[2]
+ gpio_control_bidir_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[1\]/HLD_OVR
+ gpio_control_bidir_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[1\]/INP_DIS
+ gpio_control_bidir_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[1\]/OUT
+ gpio_control_bidir_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[1\]/OE_N
+ gpio_control_bidir_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/SLOW
+ gpio_control_bidir_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/VTRIP_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_EN
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_POL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_SEL
+ gpio_control_bidir_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[0]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[1]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[2]
+ gpio_control_bidir_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[16\]/HLD_OVR
+ gpio_control_bidir_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_bidir_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[16\]/INP_DIS
+ gpio_control_bidir_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[16\]/OUT
+ gpio_control_bidir_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[16\]/OE_N
+ gpio_control_bidir_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/SLOW
+ gpio_control_bidir_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/VTRIP_SEL
+ gpio_control_bidir_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[89\]/A
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_EN
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_POL
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_SEL
+ gpio_control_bidir_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[0]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[1]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[2]
+ gpio_control_bidir_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[17\]/HLD_OVR
+ gpio_control_bidir_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_bidir_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[17\]/INP_DIS
+ gpio_control_bidir_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[17\]/OUT
+ gpio_control_bidir_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[17\]/OE_N
+ gpio_control_bidir_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/SLOW
+ gpio_control_bidir_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/VTRIP_SEL
+ gpio_control_bidir_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[91\]/A
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_EN
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_POL
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_SEL
+ gpio_control_bidir_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[0]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[1]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[2]
+ gpio_control_bidir_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[18\]/HLD_OVR
+ gpio_control_bidir_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_bidir_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[18\]/INP_DIS
+ gpio_control_bidir_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[18\]/OUT
+ gpio_control_bidir_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[18\]/OE_N
+ gpio_control_bidir_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/SLOW
+ gpio_control_bidir_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/VTRIP_SEL
+ gpio_control_bidir_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[93\]/A
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_EN
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_POL
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[0]
+ gpio_control_in_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[1]
+ gpio_control_in_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[2]
+ gpio_control_in_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[8\]/HLD_OVR
+ gpio_control_in_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[8\]/INP_DIS
+ gpio_control_in_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[8\]/OUT
+ gpio_control_in_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[8\]/OE_N
+ gpio_control_in_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/SLOW
+ gpio_control_in_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_1\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[1\]/A
+ gpio_control_in_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_1\[10\]/one
+  padframe/mprj_pads.area1_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_in_1\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[0]
+ gpio_control_in_1\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[1]
+ gpio_control_in_1\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[2]
+ gpio_control_in_1\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[18\]/HLD_OVR
+ gpio_control_in_1\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_in_1\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[18\]/INP_DIS
+ gpio_control_in_1\[10\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[18\]/OUT
+ gpio_control_in_1\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[18\]/OE_N
+ gpio_control_in_1\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/SLOW
+ gpio_control_in_1\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/VTRIP_SEL
+ gpio_control_in_1\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[19\]/A
+ gpio_control_in_1\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_EN
+ gpio_control_in_1\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_POL
+ gpio_control_in_1\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[0]
+ gpio_control_in_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[1]
+ gpio_control_in_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[2]
+ gpio_control_in_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[9\]/HLD_OVR
+ gpio_control_in_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[9\]/INP_DIS
+ gpio_control_in_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[9\]/OUT
+ gpio_control_in_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[9\]/OE_N
+ gpio_control_in_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/SLOW
+ gpio_control_in_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_1\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[2\]/A
+ gpio_control_in_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_SEL
+ gpio_control_in_1\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_1\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[0]
+ gpio_control_in_1\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[1]
+ gpio_control_in_1\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[2]
+ gpio_control_in_1\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[10\]/HLD_OVR
+ gpio_control_in_1\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_1\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[10\]/INP_DIS
+ gpio_control_in_1\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[10\]/OUT
+ gpio_control_in_1\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[10\]/OE_N
+ gpio_control_in_1\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/SLOW
+ gpio_control_in_1\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_1\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[3\]/A
+ gpio_control_in_1\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_1\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_1\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_1\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_1\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[0]
+ gpio_control_in_1\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[1]
+ gpio_control_in_1\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[2]
+ gpio_control_in_1\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[11\]/HLD_OVR
+ gpio_control_in_1\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_1\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[11\]/INP_DIS
+ gpio_control_in_1\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[11\]/OUT
+ gpio_control_in_1\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[11\]/OE_N
+ gpio_control_in_1\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/SLOW
+ gpio_control_in_1\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_1\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[4\]/A
+ gpio_control_in_1\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_1\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_1\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_1\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_1\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[0]
+ gpio_control_in_1\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[1]
+ gpio_control_in_1\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[2]
+ gpio_control_in_1\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[12\]/HLD_OVR
+ gpio_control_in_1\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_1\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[12\]/INP_DIS
+ gpio_control_in_1\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[12\]/OUT
+ gpio_control_in_1\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[12\]/OE_N
+ gpio_control_in_1\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/SLOW
+ gpio_control_in_1\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_1\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[5\]/A
+ gpio_control_in_1\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_1\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_1\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_1\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_1\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[0]
+ gpio_control_in_1\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[1]
+ gpio_control_in_1\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[2]
+ gpio_control_in_1\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[13\]/HLD_OVR
+ gpio_control_in_1\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_1\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[13\]/INP_DIS
+ gpio_control_in_1\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[13\]/OUT
+ gpio_control_in_1\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[13\]/OE_N
+ gpio_control_in_1\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/SLOW
+ gpio_control_in_1\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_1\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[6\]/A
+ gpio_control_in_1\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_1\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_1\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_1\[6\]/one
+  padframe/mprj_pads.area1_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_1\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[0]
+ gpio_control_in_1\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[1]
+ gpio_control_in_1\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[2]
+ gpio_control_in_1\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[14\]/HLD_OVR
+ gpio_control_in_1\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_1\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[14\]/INP_DIS
+ gpio_control_in_1\[6\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[14\]/OUT
+ gpio_control_in_1\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[14\]/OE_N
+ gpio_control_in_1\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/SLOW
+ gpio_control_in_1\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_1\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[8\]/A
+ gpio_control_in_1\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_1\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_1\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_1\[7\]/one
+  padframe/mprj_pads.area1_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_1\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[0]
+ gpio_control_in_1\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[1]
+ gpio_control_in_1\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[2]
+ gpio_control_in_1\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[15\]/HLD_OVR
+ gpio_control_in_1\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_1\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[15\]/INP_DIS
+ gpio_control_in_1\[7\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[15\]/OUT
+ gpio_control_in_1\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[15\]/OE_N
+ gpio_control_in_1\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/SLOW
+ gpio_control_in_1\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_1\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[10\]/A
+ gpio_control_in_1\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_1\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_1\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_1\[8\]/one
+  padframe/mprj_pads.area1_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_in_1\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[0]
+ gpio_control_in_1\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[1]
+ gpio_control_in_1\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[2]
+ gpio_control_in_1\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[16\]/HLD_OVR
+ gpio_control_in_1\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_in_1\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[16\]/INP_DIS
+ gpio_control_in_1\[8\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[16\]/OUT
+ gpio_control_in_1\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[16\]/OE_N
+ gpio_control_in_1\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/SLOW
+ gpio_control_in_1\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/VTRIP_SEL
+ gpio_control_in_1\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[13\]/A
+ gpio_control_in_1\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_EN
+ gpio_control_in_1\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_POL
+ gpio_control_in_1\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_SEL
+ gpio_control_in_1\[9\]/one
+  padframe/mprj_pads.area1_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_in_1\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[0]
+ gpio_control_in_1\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[1]
+ gpio_control_in_1\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[2]
+ gpio_control_in_1\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[17\]/HLD_OVR
+ gpio_control_in_1\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_in_1\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[17\]/INP_DIS
+ gpio_control_in_1\[9\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[17\]/OUT
+ gpio_control_in_1\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[17\]/OE_N
+ gpio_control_in_1\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/SLOW
+ gpio_control_in_1\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/VTRIP_SEL
+ gpio_control_in_1\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[16\]/A
+ gpio_control_in_1\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_EN
+ gpio_control_in_1\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_POL
+ gpio_control_in_1\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_SEL
+ gpio_control_in_1a\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_1a\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[0]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[1]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[2]
+ gpio_control_in_1a\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[2\]/HLD_OVR
+ gpio_control_in_1a\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[2\]/INP_DIS
+ gpio_control_in_1a\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[2\]/OUT
+ gpio_control_in_1a\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[2\]/OE_N
+ gpio_control_in_1a\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/SLOW
+ gpio_control_in_1a\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_1a\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_1a\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_1a\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[0]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[1]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[2]
+ gpio_control_in_1a\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[3\]/HLD_OVR
+ gpio_control_in_1a\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[3\]/INP_DIS
+ gpio_control_in_1a\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[3\]/OUT
+ gpio_control_in_1a\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[3\]/OE_N
+ gpio_control_in_1a\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/SLOW
+ gpio_control_in_1a\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_1a\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_1a\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_1a\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[0]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[1]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[2]
+ gpio_control_in_1a\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[4\]/HLD_OVR
+ gpio_control_in_1a\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[4\]/INP_DIS
+ gpio_control_in_1a\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[4\]/OUT
+ gpio_control_in_1a\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[4\]/OE_N
+ gpio_control_in_1a\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/SLOW
+ gpio_control_in_1a\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_1a\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_1a\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_1a\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[0]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[1]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[2]
+ gpio_control_in_1a\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[5\]/HLD_OVR
+ gpio_control_in_1a\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[5\]/INP_DIS
+ gpio_control_in_1a\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[5\]/OUT
+ gpio_control_in_1a\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[5\]/OE_N
+ gpio_control_in_1a\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/SLOW
+ gpio_control_in_1a\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_1a\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_1a\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_1a\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[0]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[1]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[2]
+ gpio_control_in_1a\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[6\]/HLD_OVR
+ gpio_control_in_1a\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[6\]/INP_DIS
+ gpio_control_in_1a\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[6\]/OUT
+ gpio_control_in_1a\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[6\]/OE_N
+ gpio_control_in_1a\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/SLOW
+ gpio_control_in_1a\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_1a\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_1a\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_1a\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[0]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[1]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[2]
+ gpio_control_in_1a\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[7\]/HLD_OVR
+ gpio_control_in_1a\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_1a\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[7\]/INP_DIS
+ gpio_control_in_1a\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[7\]/OUT
+ gpio_control_in_1a\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[7\]/OE_N
+ gpio_control_in_1a\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/SLOW
+ gpio_control_in_1a\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_1a\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[0\]/A
+ gpio_control_in_1a\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_1a\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_1a\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_in_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[0]
+ gpio_control_in_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[1]
+ gpio_control_in_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[2]
+ gpio_control_in_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[0\]/HLD_OVR
+ gpio_control_in_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_in_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[0\]/INP_DIS
+ gpio_control_in_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[0\]/OUT
+ gpio_control_in_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[0\]/OE_N
+ gpio_control_in_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/SLOW
+ gpio_control_in_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/VTRIP_SEL
+ gpio_control_in_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[23\]/A
+ gpio_control_in_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_EN
+ gpio_control_in_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_POL
+ gpio_control_in_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_SEL
+ gpio_control_in_2\[10\]/one
+  padframe/mprj_pads.area2_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_2\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[0]
+ gpio_control_in_2\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[1]
+ gpio_control_in_2\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[2]
+ gpio_control_in_2\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[10\]/HLD_OVR
+ gpio_control_in_2\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_2\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[10\]/INP_DIS
+ gpio_control_in_2\[10\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[10\]/OUT
+ gpio_control_in_2\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[10\]/OE_N
+ gpio_control_in_2\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/SLOW
+ gpio_control_in_2\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_2\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[71\]/A
+ gpio_control_in_2\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_2\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_2\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_2\[11\]/one
+  padframe/mprj_pads.area2_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_2\[11\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[0]
+ gpio_control_in_2\[11\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[1]
+ gpio_control_in_2\[11\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[2]
+ gpio_control_in_2\[11\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[11\]/HLD_OVR
+ gpio_control_in_2\[11\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_2\[11\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[11\]/INP_DIS
+ gpio_control_in_2\[11\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[11\]/OUT
+ gpio_control_in_2\[11\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[11\]/OE_N
+ gpio_control_in_2\[11\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/SLOW
+ gpio_control_in_2\[11\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_2\[11\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[75\]/A
+ gpio_control_in_2\[11\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_2\[11\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_2\[11\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_2\[12\]/one
+  padframe/mprj_pads.area2_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_2\[12\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[0]
+ gpio_control_in_2\[12\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[1]
+ gpio_control_in_2\[12\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[2]
+ gpio_control_in_2\[12\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[12\]/HLD_OVR
+ gpio_control_in_2\[12\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_2\[12\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[12\]/INP_DIS
+ gpio_control_in_2\[12\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[12\]/OUT
+ gpio_control_in_2\[12\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[12\]/OE_N
+ gpio_control_in_2\[12\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/SLOW
+ gpio_control_in_2\[12\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_2\[12\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[78\]/A
+ gpio_control_in_2\[12\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_2\[12\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_2\[12\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_2\[13\]/one
+  padframe/mprj_pads.area2_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_2\[13\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[0]
+ gpio_control_in_2\[13\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[1]
+ gpio_control_in_2\[13\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[2]
+ gpio_control_in_2\[13\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[13\]/HLD_OVR
+ gpio_control_in_2\[13\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_2\[13\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[13\]/INP_DIS
+ gpio_control_in_2\[13\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[13\]/OUT
+ gpio_control_in_2\[13\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[13\]/OE_N
+ gpio_control_in_2\[13\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/SLOW
+ gpio_control_in_2\[13\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_2\[13\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[81\]/A
+ gpio_control_in_2\[13\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_2\[13\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_2\[13\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_2\[14\]/one
+  padframe/mprj_pads.area2_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_2\[14\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[0]
+ gpio_control_in_2\[14\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[1]
+ gpio_control_in_2\[14\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[2]
+ gpio_control_in_2\[14\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[14\]/HLD_OVR
+ gpio_control_in_2\[14\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_2\[14\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[14\]/INP_DIS
+ gpio_control_in_2\[14\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[14\]/OUT
+ gpio_control_in_2\[14\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[14\]/OE_N
+ gpio_control_in_2\[14\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/SLOW
+ gpio_control_in_2\[14\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_2\[14\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[84\]/A
+ gpio_control_in_2\[14\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_2\[14\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_2\[14\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_2\[15\]/one
+  padframe/mprj_pads.area2_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_2\[15\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[0]
+ gpio_control_in_2\[15\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[1]
+ gpio_control_in_2\[15\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[2]
+ gpio_control_in_2\[15\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[15\]/HLD_OVR
+ gpio_control_in_2\[15\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_2\[15\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[15\]/INP_DIS
+ gpio_control_in_2\[15\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[15\]/OUT
+ gpio_control_in_2\[15\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[15\]/OE_N
+ gpio_control_in_2\[15\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/SLOW
+ gpio_control_in_2\[15\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_2\[15\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[87\]/A
+ gpio_control_in_2\[15\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_2\[15\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_2\[15\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_in_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[0]
+ gpio_control_in_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[1]
+ gpio_control_in_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[2]
+ gpio_control_in_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[1\]/HLD_OVR
+ gpio_control_in_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_in_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[1\]/INP_DIS
+ gpio_control_in_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[1\]/OUT
+ gpio_control_in_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[1\]/OE_N
+ gpio_control_in_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/SLOW
+ gpio_control_in_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/VTRIP_SEL
+ gpio_control_in_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[29\]/A
+ gpio_control_in_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_EN
+ gpio_control_in_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_POL
+ gpio_control_in_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_SEL
+ gpio_control_in_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[0]
+ gpio_control_in_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[1]
+ gpio_control_in_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[2]
+ gpio_control_in_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[2\]/HLD_OVR
+ gpio_control_in_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[2\]/INP_DIS
+ gpio_control_in_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[2\]/OUT
+ gpio_control_in_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[2\]/OE_N
+ gpio_control_in_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/SLOW
+ gpio_control_in_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[35\]/A
+ gpio_control_in_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_2\[3\]/one
+  padframe/mprj_pads.area2_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_2\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[0]
+ gpio_control_in_2\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[1]
+ gpio_control_in_2\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[2]
+ gpio_control_in_2\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[3\]/HLD_OVR
+ gpio_control_in_2\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_2\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[3\]/INP_DIS
+ gpio_control_in_2\[3\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[3\]/OUT
+ gpio_control_in_2\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[3\]/OE_N
+ gpio_control_in_2\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/SLOW
+ gpio_control_in_2\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_2\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[41\]/A
+ gpio_control_in_2\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_2\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_2\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_2\[4\]/one
+  padframe/mprj_pads.area2_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_2\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[0]
+ gpio_control_in_2\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[1]
+ gpio_control_in_2\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[2]
+ gpio_control_in_2\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[4\]/HLD_OVR
+ gpio_control_in_2\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_2\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[4\]/INP_DIS
+ gpio_control_in_2\[4\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[4\]/OUT
+ gpio_control_in_2\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[4\]/OE_N
+ gpio_control_in_2\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/SLOW
+ gpio_control_in_2\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_2\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[46\]/A
+ gpio_control_in_2\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_2\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_2\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_2\[5\]/one
+  padframe/mprj_pads.area2_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_2\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[0]
+ gpio_control_in_2\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[1]
+ gpio_control_in_2\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[2]
+ gpio_control_in_2\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[5\]/HLD_OVR
+ gpio_control_in_2\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_2\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[5\]/INP_DIS
+ gpio_control_in_2\[5\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[5\]/OUT
+ gpio_control_in_2\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[5\]/OE_N
+ gpio_control_in_2\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/SLOW
+ gpio_control_in_2\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_2\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[51\]/A
+ gpio_control_in_2\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_2\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_2\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_2\[6\]/one
+  padframe/mprj_pads.area2_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_2\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[0]
+ gpio_control_in_2\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[1]
+ gpio_control_in_2\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[2]
+ gpio_control_in_2\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[6\]/HLD_OVR
+ gpio_control_in_2\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_2\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[6\]/INP_DIS
+ gpio_control_in_2\[6\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[6\]/OUT
+ gpio_control_in_2\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[6\]/OE_N
+ gpio_control_in_2\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/SLOW
+ gpio_control_in_2\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_2\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[55\]/A
+ gpio_control_in_2\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_2\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_2\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_2\[7\]/one
+  padframe/mprj_pads.area2_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_2\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[0]
+ gpio_control_in_2\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[1]
+ gpio_control_in_2\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[2]
+ gpio_control_in_2\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[7\]/HLD_OVR
+ gpio_control_in_2\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_2\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[7\]/INP_DIS
+ gpio_control_in_2\[7\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[7\]/OUT
+ gpio_control_in_2\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[7\]/OE_N
+ gpio_control_in_2\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/SLOW
+ gpio_control_in_2\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_2\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[59\]/A
+ gpio_control_in_2\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_2\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_2\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[8\]/one
+  gpio_control_in_2\[8\]/ANTENNA_input1_A/DIODE
+  gpio_control_in_2\[8\]/input1/A
+  padframe/mprj_pads.area2_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_2\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[0]
+ gpio_control_in_2\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[1]
+ gpio_control_in_2\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[2]
+ gpio_control_in_2\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[8\]/HLD_OVR
+ gpio_control_in_2\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_2\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[8\]/INP_DIS
+ gpio_control_in_2\[8\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[8\]/OUT
+ gpio_control_in_2\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[8\]/OE_N
+ gpio_control_in_2\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/SLOW
+ gpio_control_in_2\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_2\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[63\]/A
+ gpio_control_in_2\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_2\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_2\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_2\[9\]/one
+  padframe/mprj_pads.area2_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_2\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[0]
+ gpio_control_in_2\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[1]
+ gpio_control_in_2\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[2]
+ gpio_control_in_2\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[9\]/HLD_OVR
+ gpio_control_in_2\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_2\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[9\]/INP_DIS
+ gpio_control_in_2\[9\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[9\]/OUT
+ gpio_control_in_2\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[9\]/OE_N
+ gpio_control_in_2\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/SLOW
+ gpio_control_in_2\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_2\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[67\]/A
+ gpio_control_in_2\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_2\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_2\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_SEL
+ housekeeping/mgmt_gpio_out[14]
+  sigbuf/signal_buffers\[103\]/A
+ housekeeping/mgmt_gpio_out[15]
+  sigbuf/signal_buffers\[105\]/A
+ housekeeping/mgmt_gpio_out[9]
+  sigbuf/signal_buffers\[97\]/A
+ housekeeping/mgmt_gpio_oeb[35]
+  sigbuf/signal_buffers\[190\]/A
+ housekeeping/mgmt_gpio_oeb[36]
+  sigbuf/signal_buffers\[192\]/A
+ housekeeping/mgmt_gpio_oeb[37]
+  sigbuf/signal_buffers\[194\]/A
+ housekeeping/mgmt_gpio_out[10]
+  sigbuf/signal_buffers\[98\]/A
+ housekeeping/mgmt_gpio_out[11]
+  sigbuf/signal_buffers\[99\]/A
+ housekeeping/mgmt_gpio_out[12]
+  sigbuf/signal_buffers\[100\]/A
+ housekeeping/mgmt_gpio_out[13]
+  sigbuf/signal_buffers\[101\]/A
+ housekeeping/mgmt_gpio_out[16]
+  sigbuf/signal_buffers\[108\]/A
+ housekeeping/mgmt_gpio_out[17]
+  sigbuf/signal_buffers\[111\]/A
+ housekeeping/mgmt_gpio_out[18]
+  sigbuf/signal_buffers\[114\]/A
+ housekeeping/mgmt_gpio_out[19]
+  sigbuf/signal_buffers\[118\]/A
+ housekeeping/mgmt_gpio_out[20]
+  sigbuf/signal_buffers\[124\]/A
+ housekeeping/mgmt_gpio_out[21]
+  sigbuf/signal_buffers\[130\]/A
+ housekeeping/mgmt_gpio_out[22]
+  sigbuf/signal_buffers\[136\]/A
+ housekeeping/mgmt_gpio_out[23]
+  sigbuf/signal_buffers\[141\]/A
+ housekeeping/mgmt_gpio_out[24]
+  sigbuf/signal_buffers\[146\]/A
+ housekeeping/mgmt_gpio_out[25]
+  sigbuf/signal_buffers\[150\]/A
+ housekeeping/mgmt_gpio_out[26]
+  sigbuf/signal_buffers\[154\]/A
+ housekeeping/mgmt_gpio_out[27]
+  sigbuf/signal_buffers\[158\]/A
+ housekeeping/mgmt_gpio_out[28]
+  sigbuf/signal_buffers\[162\]/A
+ housekeeping/mgmt_gpio_out[29]
+  sigbuf/signal_buffers\[166\]/A
+ housekeeping/mgmt_gpio_out[30]
+  sigbuf/signal_buffers\[170\]/A
+ housekeeping/mgmt_gpio_out[31]
+  sigbuf/signal_buffers\[173\]/A
+ housekeeping/mgmt_gpio_out[32]
+  sigbuf/signal_buffers\[176\]/A
+ housekeeping/mgmt_gpio_out[33]
+  sigbuf/signal_buffers\[179\]/A
+ housekeeping/mgmt_gpio_out[34]
+  sigbuf/signal_buffers\[182\]/A
+ housekeeping/mgmt_gpio_out[35]
+  sigbuf/signal_buffers\[184\]/A
+ housekeeping/mgmt_gpio_out[36]
+  sigbuf/signal_buffers\[186\]/A
+ housekeeping/mgmt_gpio_out[37]
+  sigbuf/signal_buffers\[188\]/A
+ housekeeping/mgmt_gpio_out[7]
+  sigbuf/signal_buffers\[95\]/A
+ housekeeping/mgmt_gpio_out[8]
+  sigbuf/signal_buffers\[96\]/A
+ mgmt_buffers/mprj_dat_o_user[0]
+  mprj/mprj/input1/A
+  mprj/mprj/ANTENNA_input1_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[10]
+  mprj/mprj/input11/A
+  mprj/mprj/ANTENNA_input11_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[11]
+  mprj/mprj/input12/A
+  mprj/mprj/ANTENNA_input12_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[12]
+  mprj/mprj/input13/A
+  mprj/mprj/ANTENNA_input13_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[13]
+  mprj/mprj/input14/A
+  mprj/mprj/ANTENNA_input14_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[14]
+  mprj/mprj/input15/A
+  mprj/mprj/ANTENNA_input15_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[15]
+  mprj/mprj/input16/A
+  mprj/mprj/ANTENNA_input16_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[1]
+  mprj/mprj/input2/A
+  mprj/mprj/ANTENNA_input2_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[2]
+  mprj/mprj/input3/A
+  mprj/mprj/ANTENNA_input3_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[3]
+  mprj/mprj/input4/A
+  mprj/mprj/ANTENNA_input4_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[4]
+  mprj/mprj/input5/A
+  mprj/mprj/ANTENNA_input5_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[5]
+  mprj/mprj/input6/A
+  mprj/mprj/ANTENNA_input6_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[6]
+  mprj/mprj/input7/A
+  mprj/mprj/ANTENNA_input7_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[7]
+  mprj/mprj/input8/A
+  mprj/mprj/ANTENNA_input8_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[8]
+  mprj/mprj/input9/A
+  mprj/mprj/ANTENNA_input9_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[9]
+  mprj/mprj/input10/A
+  mprj/mprj/ANTENNA_input10_A/DIODE
+ soc/gpio_inenb_pad
+  padframe/gpio_pad/INP_DIS
+ soc/gpio_mode0_pad
+  padframe/gpio_pad/DM[0]
+ soc/gpio_mode1_pad
+  padframe/gpio_pad/DM[2]
+  padframe/gpio_pad/DM[1]
+ soc/gpio_out_pad
+  padframe/gpio_pad/OUT
+ soc/gpio_outenb_pad
+  padframe/gpio_pad/OE_N
+ soc/por_l_out
+  padframe/clock_pad/INP_DIS

signoff/caravel/openlane-signoff/timing/nom/f-clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/f-clk-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/f-clk-max.rpt
new file mode 100644
index 0000000..b7b2a0b
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:5624b84f2b7325ee36d1f04e0e97f7763e317e17bfbafe3ac8c2560c56009459
+size 28500513

signoff/caravel/openlane-signoff/timing/nom/f-clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/f-clk-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/f-clk-min.rpt
new file mode 100644
index 0000000..3aa5679
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:8bd749a59e6f9c67ff4c88e4521282375feae68da19e89ef4c8da2834e70ca5b
+size 18812398

signoff/caravel/openlane-signoff/timing/nom/f-hk_serial_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/f-hk_serial_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/f-hk_serial_clk-max.rpt
new file mode 100644
index 0000000..7bcea2c
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-hk_serial_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:20e1141fb729b30333d0ee6c3f79c016bc37af71b9e1e8d2b30156cb683babf2
+size 345

signoff/caravel/openlane-signoff/timing/nom/f-hk_serial_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/f-hk_serial_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/f-hk_serial_clk-min.rpt
new file mode 100644
index 0000000..a21fe97
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-hk_serial_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:cb6c0157d67baa7fee1d8f6c4911238d28b7b187eee920b7016da249f9a28090
+size 11323365

signoff/caravel/openlane-signoff/timing/nom/f-hkspi_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/f-hkspi_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/f-hkspi_clk-max.rpt
new file mode 100644
index 0000000..4b76716
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-hkspi_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0f4e566b49c48e525ccf6ff00ff46f2b9d20ae7cecb42a54988c721c1ec636e4
+size 341

signoff/caravel/openlane-signoff/timing/nom/f-hkspi_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/f-hkspi_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/f-hkspi_clk-min.rpt
new file mode 100644
index 0000000..9883d0e
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-hkspi_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:cfe51f6e19bac76397e6a2125be7e7cf7f149a24e9ecdc20845e564a8595d81e
+size 6168404

signoff/caravel/openlane-signoff/timing/nom/f-max.rpt

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new file mode 100644
index 0000000..7353e6a
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:47bb40a6f1463716a0c03b5575108f208639b6a61e74aa29c9fd17d31ba14726
+size 278769057

signoff/caravel/openlane-signoff/timing/nom/f-min.rpt

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new file mode 100644
index 0000000..a74d703
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:68f6b2bb774fc4a31ff649523cd332005f54c969b885dd56c93d3a90d596a50b
+size 263867067

signoff/caravel/openlane-signoff/timing/nom/f-mprj-max.rpt

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new file mode 100644
index 0000000..3acb708
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-mprj-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:a034ef4d0cdb1a65ee8e10d6d2db01efdf6183ac8bc0ddfdd5a3fb791151da56
+size 533321

signoff/caravel/openlane-signoff/timing/nom/f-mprj-min.rpt

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new file mode 100644
index 0000000..a48342f
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-mprj-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:6e8615212ed18ceda498ef0a9bf4c26d6dc22a8d30bcc83e3dc43383aefaaa03
+size 450779

signoff/caravel/openlane-signoff/timing/nom/f-soc-max.rpt

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new file mode 100644
index 0000000..72d4586
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-soc-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:6fe0f7c43271e3480a97fb5b26b29b73bae7411e04c9723b0375f5bf98127710
+size 357

signoff/caravel/openlane-signoff/timing/nom/f-soc-min.rpt

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new file mode 100644
index 0000000..f60b428
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-soc-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:1e6b90c9b08bd661cc0cdffefab2e06c22f9bd8750a9fdff9de28cb749e320f6
+size 18069585

signoff/caravel/openlane-signoff/timing/nom/f-summary.rpt

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new file mode 100644
index 0000000..7c003da
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-summary.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ed1f8879add0322c4ace64d94a0587855e496ba5ea9f4f6e342a804d9e924f7a
+size 2503086

signoff/caravel/openlane-signoff/timing/nom/f-unannotated.log

diff --git a/signoff/caravel/openlane-signoff/timing/nom/f-unannotated.log b/signoff/caravel/openlane-signoff/timing/nom/f-unannotated.log
new file mode 100644
index 0000000..bc15afe
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/f-unannotated.log
@@ -0,0 +1,3628 @@
+Found 2203 unannotated nets.
+ padframe/flash_clk
+ padframe/mprj_analog_io[26]
+ mprj_io[28]
+ vssa2
+ vssa1
+ vdda1
+ mprj_io[4]
+ mprj_io[5]
+ mprj_io[19]
+ vssa1_2
+ vdda2
+ mprj_io[2]
+ mprj_io[3]
+ mprj_io[14]
+ mprj_io[33]
+ mprj_io[34]
+ resetb
+ mprj_io[1]
+ mprj_io[8]
+ mprj_io[9]
+ mprj_io[6]
+ mprj_io[11]
+ mprj_io[13]
+ mprj_io[15]
+ mprj_io[17]
+ mprj_io[18]
+ mprj_io[20]
+ mprj_io[23]
+ mprj_io[16]
+ mprj_io[27]
+ mprj_io[29]
+ mprj_io[32]
+ vssd2
+ vccd1
+ clock
+ gpio
+ vssd
+ vdda
+ mprj_io[37]
+ vccd
+ vssa
+ vssio
+ mprj_io[30]
+ vssd1
+ vssio_2
+ vddio
+ mprj_io[36]
+ vddio_2
+ mprj_io[31]
+ vccd2
+ vdda1_2
+ mprj_io[21]
+ mprj_io[26]
+ mprj_io[35]
+ mprj_io[0]
+ mprj_io[22]
+ mprj_io[24]
+ mprj_io[25]
+ mprj_io[7]
+ mprj_io[12]
+ mprj_io[10]
+ gpio_control_bidir_2\[2\]/_053_
+ gpio_control_bidir_2\[2\]/_052_
+ gpio_control_bidir_2\[2\]/_051_
+ gpio_control_bidir_2\[2\]/_050_
+ gpio_control_bidir_2\[2\]/_049_
+ gpio_control_bidir_2\[2\]/_048_
+ gpio_control_bidir_2\[2\]/_047_
+ gpio_control_bidir_2\[2\]/_046_
+ gpio_control_bidir_2\[2\]/_057_
+ gpio_control_bidir_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[7\]/_052_
+ gpio_control_in_1\[7\]/_056_
+ gpio_control_in_1\[7\]/_055_
+ gpio_control_in_1\[7\]/_054_
+ gpio_control_in_1\[7\]/_053_
+ gpio_control_in_1\[7\]/_051_
+ gpio_control_in_1\[7\]/_050_
+ gpio_control_in_1\[7\]/_049_
+ gpio_control_in_1\[7\]/_048_
+ gpio_control_in_1\[7\]/_047_
+ gpio_control_in_1\[7\]/_046_
+ gpio_control_in_1\[7\]/_057_
+ gpio_control_in_1\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_047_
+ gpio_control_in_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_049_
+ gpio_control_in_2\[0\]/_048_
+ gpio_control_in_2\[0\]/_046_
+ gpio_control_in_2\[0\]/_057_
+ gpio_control_in_2\[3\]/_047_
+ gpio_control_in_2\[3\]/_052_
+ gpio_control_in_2\[3\]/_051_
+ gpio_control_in_2\[3\]/_050_
+ gpio_control_in_2\[3\]/_049_
+ gpio_control_in_2\[3\]/_048_
+ gpio_control_in_2\[3\]/_046_
+ gpio_control_in_2\[3\]/_057_
+ gpio_control_in_2\[3\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_2/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[2\]
+ gpio_defaults_block_19/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[3\]
+ gpio_defaults_block_20/gpio_defaults_high\[11\]
+ gpio_defaults_block_20/gpio_defaults_high\[12\]
+ gpio_defaults_block_20/gpio_defaults_high\[2\]
+ gpio_defaults_block_20/gpio_defaults_high\[4\]
+ gpio_defaults_block_20/gpio_defaults_high\[5\]
+ gpio_defaults_block_20/gpio_defaults_high\[6\]
+ gpio_defaults_block_20/gpio_defaults_high\[7\]
+ gpio_defaults_block_20/gpio_defaults_high\[8\]
+ gpio_defaults_block_20/gpio_defaults_high\[9\]
+ gpio_defaults_block_21/gpio_defaults_high\[0\]
+ gpio_defaults_block_21/gpio_defaults_low\[10\]
+ gpio_defaults_block_21/gpio_defaults_high\[11\]
+ gpio_defaults_block_21/gpio_defaults_high\[12\]
+ gpio_defaults_block_21/gpio_defaults_low\[1\]
+ gpio_defaults_block_21/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[4\]
+ gpio_defaults_block_21/gpio_defaults_high\[5\]
+ gpio_defaults_block_21/gpio_defaults_high\[6\]
+ gpio_defaults_block_21/gpio_defaults_high\[7\]
+ gpio_defaults_block_21/gpio_defaults_high\[8\]
+ gpio_defaults_block_21/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[3\]
+ gpio_defaults_block_19/gpio_defaults_high\[4\]
+ gpio_defaults_block_19/gpio_defaults_high\[5\]
+ gpio_defaults_block_19/gpio_defaults_high\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[8\]
+ gpio_defaults_block_19/gpio_defaults_high\[9\]
+ gpio_defaults_block_2/gpio_defaults_high\[0\]
+ gpio_defaults_block_2/gpio_defaults_low\[10\]
+ gpio_defaults_block_2/gpio_defaults_high\[11\]
+ gpio_defaults_block_2/gpio_defaults_high\[12\]
+ gpio_defaults_block_2/gpio_defaults_high\[2\]
+ gpio_defaults_block_2/gpio_defaults_high\[4\]
+ gpio_defaults_block_2/gpio_defaults_high\[5\]
+ gpio_defaults_block_2/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[7\]
+ gpio_defaults_block_2/gpio_defaults_high\[8\]
+ gpio_defaults_block_2/gpio_defaults_high\[9\]
+ gpio_defaults_block_20/gpio_defaults_high\[0\]
+ gpio_defaults_block_20/gpio_defaults_low\[10\]
+ padframe/mprj_analog_io[7]
+ padframe/flash_io0
+ padframe/flash_io0_di_core
+ gpio_control_bidir_1\[0\]/_056_
+ gpio_control_bidir_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_1\[0\]/_051_
+ gpio_control_bidir_1\[0\]/_055_
+ gpio_control_bidir_1\[0\]/_054_
+ gpio_control_bidir_1\[0\]/_053_
+ gpio_control_bidir_1\[0\]/_052_
+ gpio_control_bidir_1\[0\]/_050_
+ gpio_control_bidir_1\[0\]/_049_
+ gpio_control_bidir_1\[0\]/_048_
+ gpio_control_bidir_1\[0\]/_047_
+ gpio_control_bidir_1\[0\]/_046_
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+ gpio_control_in_2\[9\]/_047_
+ gpio_control_in_2\[9\]/_046_
+ gpio_control_in_2\[9\]/_057_
+ gpio_defaults_block_11/gpio_defaults_low\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[0\]
+ gpio_defaults_block_11/gpio_defaults_high\[11\]
+ gpio_defaults_block_11/gpio_defaults_high\[12\]
+ gpio_defaults_block_11/gpio_defaults_low\[1\]
+ gpio_defaults_block_11/gpio_defaults_high\[2\]
+ gpio_defaults_block_11/gpio_defaults_high\[3\]
+ gpio_defaults_block_11/gpio_defaults_high\[5\]
+ gpio_defaults_block_11/gpio_defaults_high\[7\]
+ gpio_defaults_block_11/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[0\]
+ gpio_defaults_block_12/gpio_defaults_low\[10\]
+ gpio_defaults_block_12/gpio_defaults_high\[11\]
+ gpio_defaults_block_12/gpio_defaults_high\[12\]
+ gpio_defaults_block_12/gpio_defaults_low\[1\]
+ gpio_defaults_block_12/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[0\]
+ gpio_defaults_block_1/gpio_defaults_low\[10\]
+ gpio_defaults_block_1/gpio_defaults_high\[11\]
+ gpio_defaults_block_1/gpio_defaults_high\[12\]
+ gpio_defaults_block_1/gpio_defaults_low\[1\]
+ gpio_defaults_block_1/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[3\]
+ gpio_defaults_block_1/gpio_defaults_high\[5\]
+ gpio_defaults_block_1/gpio_defaults_high\[6\]
+ gpio_defaults_block_1/gpio_defaults_high\[7\]
+ gpio_defaults_block_1/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[9\]
+ gpio_defaults_block_10/gpio_defaults_high\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[11\]
+ gpio_defaults_block_10/gpio_defaults_high\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[2\]
+ gpio_defaults_block_10/gpio_defaults_high\[3\]
+ gpio_defaults_block_10/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[5\]
+ gpio_defaults_block_10/gpio_defaults_high\[6\]
+ gpio_defaults_block_10/gpio_defaults_high\[7\]
+ gpio_defaults_block_10/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_low\[10\]
+ gpio_defaults_block_15/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[11\]
+ gpio_defaults_block_14/gpio_defaults_low\[10\]
+ gpio_defaults_block_14/gpio_defaults_high\[12\]
+ gpio_defaults_block_14/gpio_defaults_low\[1\]
+ gpio_defaults_block_14/gpio_defaults_high\[2\]
+ gpio_defaults_block_14/gpio_defaults_high\[4\]
+ gpio_defaults_block_14/gpio_defaults_high\[6\]
+ gpio_defaults_block_14/gpio_defaults_high\[7\]
+ gpio_defaults_block_14/gpio_defaults_high\[8\]
+ gpio_defaults_block_14/gpio_defaults_high\[9\]
+ gpio_defaults_block_15/gpio_defaults_high\[0\]
+ gpio_defaults_block_15/gpio_defaults_high\[11\]
+ gpio_defaults_block_15/gpio_defaults_high\[12\]
+ gpio_defaults_block_15/gpio_defaults_low\[1\]
+ gpio_defaults_block_15/gpio_defaults_high\[2\]
+ gpio_defaults_block_15/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[4\]
+ gpio_defaults_block_15/gpio_defaults_high\[5\]
+ gpio_defaults_block_15/gpio_defaults_high\[6\]
+ gpio_defaults_block_15/gpio_defaults_high\[8\]
+ gpio_defaults_block_15/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[3\]
+ gpio_defaults_block_12/gpio_defaults_high\[4\]
+ gpio_defaults_block_12/gpio_defaults_high\[5\]
+ gpio_defaults_block_12/gpio_defaults_high\[6\]
+ gpio_defaults_block_12/gpio_defaults_high\[7\]
+ gpio_defaults_block_12/gpio_defaults_high\[8\]
+ gpio_defaults_block_12/gpio_defaults_high\[9\]
+ gpio_defaults_block_13/gpio_defaults_high\[0\]
+ gpio_defaults_block_13/gpio_defaults_low\[10\]
+ gpio_defaults_block_13/gpio_defaults_high\[12\]
+ gpio_defaults_block_13/gpio_defaults_low\[1\]
+ gpio_defaults_block_13/gpio_defaults_high\[2\]
+ gpio_defaults_block_13/gpio_defaults_high\[4\]
+ gpio_defaults_block_13/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[6\]
+ gpio_defaults_block_13/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[8\]
+ gpio_defaults_block_13/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[0\]
+ gpio_defaults_block_14/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[0\]
+ gpio_defaults_block_18/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_high\[12\]
+ gpio_defaults_block_18/gpio_defaults_low\[1\]
+ gpio_defaults_block_18/gpio_defaults_high\[2\]
+ gpio_defaults_block_18/gpio_defaults_high\[3\]
+ gpio_defaults_block_18/gpio_defaults_high\[4\]
+ gpio_defaults_block_18/gpio_defaults_high\[5\]
+ gpio_defaults_block_18/gpio_defaults_high\[6\]
+ gpio_defaults_block_18/gpio_defaults_high\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[8\]
+ gpio_defaults_block_18/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[0\]
+ gpio_defaults_block_19/gpio_defaults_low\[10\]
+ gpio_defaults_block_19/gpio_defaults_high\[11\]
+ gpio_defaults_block_19/gpio_defaults_high\[12\]
+ gpio_defaults_block_19/gpio_defaults_low\[1\]
+ gpio_defaults_block_19/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[0\]
+ gpio_defaults_block_16/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_high\[12\]
+ gpio_defaults_block_16/gpio_defaults_low\[1\]
+ gpio_defaults_block_16/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[3\]
+ gpio_defaults_block_16/gpio_defaults_high\[4\]
+ gpio_defaults_block_16/gpio_defaults_high\[5\]
+ gpio_defaults_block_16/gpio_defaults_high\[6\]
+ gpio_defaults_block_16/gpio_defaults_high\[7\]
+ gpio_defaults_block_16/gpio_defaults_high\[8\]
+ gpio_defaults_block_16/gpio_defaults_high\[9\]
+ gpio_defaults_block_17/gpio_defaults_high\[0\]
+ gpio_defaults_block_17/gpio_defaults_low\[10\]
+ gpio_defaults_block_17/gpio_defaults_high\[11\]
+ gpio_defaults_block_17/gpio_defaults_high\[12\]
+ gpio_defaults_block_17/gpio_defaults_low\[1\]
+ gpio_defaults_block_17/gpio_defaults_high\[2\]
+ gpio_defaults_block_17/gpio_defaults_high\[3\]
+ gpio_defaults_block_17/gpio_defaults_high\[4\]
+ gpio_defaults_block_17/gpio_defaults_high\[5\]
+ gpio_defaults_block_17/gpio_defaults_high\[6\]
+ gpio_defaults_block_17/gpio_defaults_high\[7\]
+ gpio_defaults_block_17/gpio_defaults_high\[8\]
+ gpio_defaults_block_17/gpio_defaults_high\[9\]
+ gpio_defaults_block_22/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[10\]
+ gpio_defaults_block_24/gpio_defaults_high\[11\]
+ gpio_defaults_block_24/gpio_defaults_high\[12\]
+ gpio_defaults_block_24/gpio_defaults_low\[1\]
+ gpio_defaults_block_24/gpio_defaults_high\[2\]
+ gpio_defaults_block_24/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[4\]
+ gpio_defaults_block_24/gpio_defaults_high\[5\]
+ gpio_defaults_block_24/gpio_defaults_high\[6\]
+ gpio_defaults_block_24/gpio_defaults_high\[7\]
+ gpio_defaults_block_24/gpio_defaults_high\[8\]
+ gpio_defaults_block_24/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_high\[0\]
+ gpio_defaults_block_25/gpio_defaults_low\[10\]
+ gpio_defaults_block_25/gpio_defaults_high\[11\]
+ gpio_defaults_block_25/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_high\[0\]
+ gpio_defaults_block_22/gpio_defaults_low\[10\]
+ gpio_defaults_block_22/gpio_defaults_high\[11\]
+ gpio_defaults_block_22/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_low\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[3\]
+ gpio_defaults_block_22/gpio_defaults_high\[4\]
+ gpio_defaults_block_22/gpio_defaults_high\[5\]
+ gpio_defaults_block_22/gpio_defaults_high\[7\]
+ gpio_defaults_block_22/gpio_defaults_high\[8\]
+ gpio_defaults_block_22/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[11\]
+ gpio_defaults_block_23/gpio_defaults_high\[12\]
+ gpio_defaults_block_23/gpio_defaults_low\[1\]
+ gpio_defaults_block_23/gpio_defaults_high\[2\]
+ gpio_defaults_block_23/gpio_defaults_high\[4\]
+ gpio_defaults_block_23/gpio_defaults_high\[5\]
+ gpio_defaults_block_23/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[7\]
+ gpio_defaults_block_23/gpio_defaults_high\[8\]
+ gpio_defaults_block_23/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[12\]
+ gpio_defaults_block_27/gpio_defaults_low\[1\]
+ gpio_defaults_block_27/gpio_defaults_high\[3\]
+ gpio_defaults_block_27/gpio_defaults_high\[4\]
+ gpio_defaults_block_27/gpio_defaults_high\[5\]
+ gpio_defaults_block_27/gpio_defaults_high\[6\]
+ gpio_defaults_block_27/gpio_defaults_high\[7\]
+ gpio_defaults_block_27/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_high\[0\]
+ gpio_defaults_block_28/gpio_defaults_low\[10\]
+ gpio_defaults_block_28/gpio_defaults_high\[11\]
+ gpio_defaults_block_28/gpio_defaults_high\[12\]
+ gpio_defaults_block_28/gpio_defaults_low\[1\]
+ gpio_defaults_block_28/gpio_defaults_high\[2\]
+ gpio_defaults_block_28/gpio_defaults_high\[3\]
+ gpio_defaults_block_28/gpio_defaults_high\[4\]
+ gpio_defaults_block_28/gpio_defaults_high\[5\]
+ gpio_defaults_block_28/gpio_defaults_high\[6\]
+ gpio_defaults_block_28/gpio_defaults_high\[7\]
+ gpio_defaults_block_28/gpio_defaults_high\[8\]
+ gpio_defaults_block_28/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[1\]
+ gpio_defaults_block_25/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[3\]
+ gpio_defaults_block_25/gpio_defaults_high\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[5\]
+ gpio_defaults_block_25/gpio_defaults_high\[6\]
+ gpio_defaults_block_25/gpio_defaults_high\[7\]
+ gpio_defaults_block_25/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[0\]
+ gpio_defaults_block_26/gpio_defaults_low\[10\]
+ gpio_defaults_block_26/gpio_defaults_high\[11\]
+ gpio_defaults_block_26/gpio_defaults_high\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[1\]
+ gpio_defaults_block_26/gpio_defaults_high\[3\]
+ gpio_defaults_block_26/gpio_defaults_high\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[5\]
+ gpio_defaults_block_26/gpio_defaults_high\[6\]
+ gpio_defaults_block_26/gpio_defaults_high\[7\]
+ gpio_defaults_block_26/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_high\[9\]
+ gpio_defaults_block_27/gpio_defaults_high\[0\]
+ gpio_defaults_block_27/gpio_defaults_low\[10\]
+ gpio_defaults_block_27/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[9\]
+ gpio_defaults_block_30/gpio_defaults_high\[0\]
+ gpio_defaults_block_30/gpio_defaults_low\[10\]
+ gpio_defaults_block_30/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[12\]
+ gpio_defaults_block_30/gpio_defaults_low\[1\]
+ gpio_defaults_block_30/gpio_defaults_high\[3\]
+ gpio_defaults_block_30/gpio_defaults_high\[4\]
+ gpio_defaults_block_30/gpio_defaults_high\[5\]
+ gpio_defaults_block_30/gpio_defaults_high\[6\]
+ gpio_defaults_block_30/gpio_defaults_high\[7\]
+ gpio_defaults_block_30/gpio_defaults_high\[8\]
+ gpio_defaults_block_30/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[0\]
+ gpio_defaults_block_31/gpio_defaults_low\[10\]
+ gpio_defaults_block_31/gpio_defaults_high\[11\]
+ gpio_defaults_block_31/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[0\]
+ gpio_defaults_block_29/gpio_defaults_low\[10\]
+ gpio_defaults_block_29/gpio_defaults_high\[11\]
+ gpio_defaults_block_29/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_low\[1\]
+ gpio_defaults_block_29/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[3\]
+ gpio_defaults_block_29/gpio_defaults_high\[4\]
+ gpio_defaults_block_29/gpio_defaults_high\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[6\]
+ gpio_defaults_block_29/gpio_defaults_high\[7\]
+ gpio_defaults_block_29/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[0\]
+ gpio_defaults_block_3/gpio_defaults_low\[10\]
+ gpio_defaults_block_3/gpio_defaults_high\[11\]
+ gpio_defaults_block_3/gpio_defaults_high\[12\]
+ gpio_defaults_block_3/gpio_defaults_low\[1\]
+ gpio_defaults_block_3/gpio_defaults_high\[2\]
+ gpio_defaults_block_3/gpio_defaults_high\[3\]
+ gpio_defaults_block_3/gpio_defaults_high\[4\]
+ gpio_defaults_block_3/gpio_defaults_high\[5\]
+ gpio_defaults_block_3/gpio_defaults_high\[6\]
+ gpio_defaults_block_3/gpio_defaults_high\[7\]
+ gpio_defaults_block_3/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[0\]
+ gpio_defaults_block_32/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_high\[11\]
+ gpio_defaults_block_33/gpio_defaults_high\[12\]
+ gpio_defaults_block_33/gpio_defaults_high\[2\]
+ gpio_defaults_block_33/gpio_defaults_high\[3\]
+ gpio_defaults_block_33/gpio_defaults_high\[5\]
+ gpio_defaults_block_33/gpio_defaults_high\[6\]
+ gpio_defaults_block_33/gpio_defaults_high\[7\]
+ gpio_defaults_block_33/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[0\]
+ gpio_defaults_block_34/gpio_defaults_low\[10\]
+ gpio_defaults_block_34/gpio_defaults_high\[11\]
+ gpio_defaults_block_34/gpio_defaults_high\[12\]
+ gpio_defaults_block_34/gpio_defaults_low\[1\]
+ gpio_defaults_block_34/gpio_defaults_high\[2\]
+ gpio_defaults_block_34/gpio_defaults_high\[3\]
+ gpio_defaults_block_34/gpio_defaults_high\[4\]
+ gpio_defaults_block_34/gpio_defaults_high\[6\]
+ gpio_defaults_block_34/gpio_defaults_high\[7\]
+ gpio_defaults_block_34/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_low\[1\]
+ gpio_defaults_block_31/gpio_defaults_high\[2\]
+ gpio_defaults_block_31/gpio_defaults_high\[3\]
+ gpio_defaults_block_31/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[6\]
+ gpio_defaults_block_31/gpio_defaults_high\[7\]
+ gpio_defaults_block_31/gpio_defaults_high\[8\]
+ gpio_defaults_block_31/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[10\]
+ gpio_defaults_block_32/gpio_defaults_high\[11\]
+ gpio_defaults_block_32/gpio_defaults_high\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[2\]
+ gpio_defaults_block_32/gpio_defaults_high\[3\]
+ gpio_defaults_block_32/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[5\]
+ gpio_defaults_block_32/gpio_defaults_high\[6\]
+ gpio_defaults_block_32/gpio_defaults_high\[7\]
+ gpio_defaults_block_32/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[0\]
+ gpio_defaults_block_33/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[9\]
+ gpio_defaults_block_37/gpio_defaults_high\[0\]
+ gpio_defaults_block_37/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_high\[11\]
+ gpio_defaults_block_37/gpio_defaults_high\[12\]
+ gpio_defaults_block_37/gpio_defaults_high\[2\]
+ gpio_defaults_block_37/gpio_defaults_high\[3\]
+ gpio_defaults_block_37/gpio_defaults_high\[4\]
+ gpio_defaults_block_37/gpio_defaults_high\[5\]
+ gpio_defaults_block_37/gpio_defaults_high\[6\]
+ gpio_defaults_block_37/gpio_defaults_high\[7\]
+ gpio_defaults_block_37/gpio_defaults_high\[8\]
+ gpio_defaults_block_4/gpio_defaults_high\[0\]
+ gpio_defaults_block_4/gpio_defaults_low\[10\]
+ gpio_defaults_block_4/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[0\]
+ gpio_defaults_block_35/gpio_defaults_low\[10\]
+ gpio_defaults_block_35/gpio_defaults_high\[11\]
+ gpio_defaults_block_35/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_low\[1\]
+ gpio_defaults_block_35/gpio_defaults_high\[2\]
+ gpio_defaults_block_35/gpio_defaults_high\[3\]
+ gpio_defaults_block_35/gpio_defaults_high\[4\]
+ gpio_defaults_block_35/gpio_defaults_high\[6\]
+ gpio_defaults_block_35/gpio_defaults_high\[7\]
+ gpio_defaults_block_35/gpio_defaults_high\[8\]
+ gpio_defaults_block_35/gpio_defaults_high\[9\]
+ gpio_defaults_block_36/gpio_defaults_high\[0\]
+ gpio_defaults_block_36/gpio_defaults_low\[10\]
+ gpio_defaults_block_36/gpio_defaults_high\[11\]
+ gpio_defaults_block_36/gpio_defaults_high\[12\]
+ gpio_defaults_block_36/gpio_defaults_low\[1\]
+ gpio_defaults_block_36/gpio_defaults_high\[3\]
+ gpio_defaults_block_36/gpio_defaults_high\[4\]
+ gpio_defaults_block_36/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[6\]
+ gpio_defaults_block_36/gpio_defaults_high\[7\]
+ gpio_defaults_block_36/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[11\]
+ gpio_defaults_block_6/gpio_defaults_high\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[2\]
+ gpio_defaults_block_6/gpio_defaults_high\[3\]
+ gpio_defaults_block_6/gpio_defaults_high\[4\]
+ gpio_defaults_block_6/gpio_defaults_high\[5\]
+ gpio_defaults_block_6/gpio_defaults_high\[6\]
+ gpio_defaults_block_6/gpio_defaults_high\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[8\]
+ gpio_defaults_block_6/gpio_defaults_high\[9\]
+ gpio_defaults_block_7/gpio_defaults_high\[0\]
+ gpio_defaults_block_7/gpio_defaults_low\[10\]
+ gpio_defaults_block_7/gpio_defaults_high\[12\]
+ gpio_defaults_block_7/gpio_defaults_low\[1\]
+ gpio_defaults_block_7/gpio_defaults_high\[2\]
+ gpio_defaults_block_7/gpio_defaults_high\[3\]
+ gpio_defaults_block_7/gpio_defaults_high\[4\]
+ gpio_defaults_block_7/gpio_defaults_high\[5\]
+ gpio_defaults_block_7/gpio_defaults_high\[6\]
+ gpio_defaults_block_7/gpio_defaults_high\[7\]
+ gpio_defaults_block_7/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[9\]
+ gpio_defaults_block_4/gpio_defaults_low\[1\]
+ gpio_defaults_block_4/gpio_defaults_high\[2\]
+ gpio_defaults_block_4/gpio_defaults_high\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[4\]
+ gpio_defaults_block_4/gpio_defaults_high\[5\]
+ gpio_defaults_block_4/gpio_defaults_high\[6\]
+ gpio_defaults_block_4/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[0\]
+ gpio_defaults_block_5/gpio_defaults_low\[10\]
+ gpio_defaults_block_5/gpio_defaults_high\[11\]
+ gpio_defaults_block_5/gpio_defaults_high\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[1\]
+ gpio_defaults_block_5/gpio_defaults_high\[2\]
+ gpio_defaults_block_5/gpio_defaults_high\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[4\]
+ gpio_defaults_block_5/gpio_defaults_high\[5\]
+ gpio_defaults_block_5/gpio_defaults_high\[6\]
+ gpio_defaults_block_5/gpio_defaults_high\[7\]
+ gpio_defaults_block_5/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[0\]
+ gpio_defaults_block_6/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[11\]
+ gpio_defaults_block_8/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[0\]
+ gpio_defaults_block_9/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[0\]
+ gpio_defaults_block_8/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[12\]
+ gpio_defaults_block_8/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[2\]
+ gpio_defaults_block_8/gpio_defaults_high\[3\]
+ gpio_defaults_block_8/gpio_defaults_high\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[5\]
+ gpio_defaults_block_8/gpio_defaults_high\[6\]
+ gpio_defaults_block_8/gpio_defaults_high\[7\]
+ gpio_defaults_block_8/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[10\]
+ gpio_defaults_block_9/gpio_defaults_high\[11\]
+ gpio_defaults_block_9/gpio_defaults_high\[12\]
+ gpio_defaults_block_9/gpio_defaults_high\[2\]
+ gpio_defaults_block_9/gpio_defaults_high\[3\]
+ gpio_defaults_block_9/gpio_defaults_high\[4\]
+ gpio_defaults_block_9/gpio_defaults_high\[5\]
+ gpio_defaults_block_9/gpio_defaults_high\[6\]
+ gpio_defaults_block_9/gpio_defaults_high\[7\]
+ gpio_defaults_block_9/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[9\]
+ padframe/flash_io1_di_core
+ padframe/clock_core
+ padframe/mprj_analog_io[6]
+ padframe/gpio_in_core
+ padframe/flash_io1
+ padframe/mprj_analog_io[27]
+ padframe/mprj_analog_io[28]
+ padframe/mprj_analog_io[24]
+ padframe/mprj_analog_io[25]
+ padframe/mprj_analog_io[5]
+ padframe/mprj_analog_io[8]
+ padframe/mprj_analog_io[12]
+ padframe/mprj_analog_io[11]
+ padframe/mprj_analog_io[10]
+ padframe/mprj_analog_io[14]
+ padframe/mprj_analog_io[16]
+ padframe/mprj_analog_io[15]
+ padframe/mprj_analog_io[17]
+ padframe/mprj_analog_io[19]
+ padframe/mprj_analog_io[21]
+ padframe/mprj_analog_io[22]
+ padframe/mprj_analog_io[23]
+ padframe/mprj_io[28]
+ padframe/gpio
+ padframe/mprj_io[34]
+ padframe/flash_csb
+ padframe/mprj_analog_io[18]
+ padframe/mprj_analog_io[13]
+ padframe/mprj_io[8]
+ padframe/mprj_io[10]
+ padframe/mprj_io[21]
+ padframe/mprj_io[22]
+ padframe/clock
+ padframe/mprj_io[25]
+ padframe/mprj_analog_io[2]
+ padframe/mprj_io[17]
+ mprj/mprj/p[5]
+ padframe/mprj_io[0]
+ mprj/mprj/p[7]
+ mprj/mprj/p[6]
+ mprj/mprj/p[4]
+ padframe/mprj_io[9]
+ padframe/mprj_io[11]
+ padframe/mprj_io[33]
+ mgmt_buffers/mprj2_logic_high_inst/HI
+ mgmt_buffers/mprj_logic_high_inst/HI[462]
+ mgmt_buffers/mprj_logic_high_inst/HI[461]
+ mgmt_buffers/mprj_logic_high_inst/HI[460]
+ mgmt_buffers/mprj_logic_high_inst/HI[459]
+ mgmt_buffers/mprj_logic_high_inst/HI[458]
+ mgmt_buffers/mprj_logic_high_inst/HI[457]
+ mgmt_buffers/mprj_logic_high_inst/HI[456]
+ mgmt_buffers/mprj_logic_high_inst/HI[455]
+ mgmt_buffers/mprj_logic_high_inst/HI[454]
+ mgmt_buffers/mprj_logic_high_inst/HI[453]
+ mgmt_buffers/mprj_logic_high_inst/HI[452]
+ mgmt_buffers/mprj_logic_high_inst/HI[451]
+ mgmt_buffers/mprj_logic_high_inst/HI[450]
+ mgmt_buffers/mprj_logic_high_inst/HI[449]
+ mgmt_buffers/mprj_logic_high_inst/HI[448]
+ mgmt_buffers/mprj_logic_high_inst/HI[447]
+ mgmt_buffers/mprj_logic_high_inst/HI[446]
+ mgmt_buffers/mprj_logic_high_inst/HI[445]
+ mgmt_buffers/mprj_logic_high_inst/HI[444]
+ padframe/mprj_io[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[443]
+ mgmt_buffers/mprj_logic_high_inst/HI[442]
+ mgmt_buffers/mprj_logic_high_inst/HI[441]
+ mgmt_buffers/mprj_logic_high_inst/HI[440]
+ mgmt_buffers/mprj_logic_high_inst/HI[439]
+ mgmt_buffers/mprj_logic_high_inst/HI[438]
+ mgmt_buffers/mprj_logic_high_inst/HI[437]
+ mgmt_buffers/mprj_logic_high_inst/HI[436]
+ mgmt_buffers/mprj_logic_high_inst/HI[435]
+ mgmt_buffers/mprj_logic_high_inst/HI[434]
+ mgmt_buffers/mprj_logic_high_inst/HI[433]
+ mgmt_buffers/mprj_logic_high_inst/HI[432]
+ mgmt_buffers/mprj_logic_high_inst/HI[431]
+ mgmt_buffers/mprj_logic_high_inst/HI[430]
+ mgmt_buffers/mprj_logic_high_inst/HI[429]
+ mgmt_buffers/mprj_logic_high_inst/HI[428]
+ mgmt_buffers/mprj_logic_high_inst/HI[427]
+ mgmt_buffers/mprj_logic_high_inst/HI[426]
+ padframe/mprj_io[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[425]
+ mgmt_buffers/mprj_logic_high_inst/HI[424]
+ mgmt_buffers/mprj_logic_high_inst/HI[423]
+ mgmt_buffers/mprj_logic_high_inst/HI[422]
+ mgmt_buffers/mprj_logic_high_inst/HI[421]
+ mgmt_buffers/mprj_logic_high_inst/HI[420]
+ mgmt_buffers/mprj_logic_high_inst/HI[419]
+ mgmt_buffers/mprj_logic_high_inst/HI[418]
+ mgmt_buffers/mprj_logic_high_inst/HI[417]
+ mgmt_buffers/mprj_logic_high_inst/HI[416]
+ mgmt_buffers/mprj_logic_high_inst/HI[415]
+ mgmt_buffers/mprj_logic_high_inst/HI[414]
+ mgmt_buffers/mprj_logic_high_inst/HI[413]
+ mgmt_buffers/mprj_logic_high_inst/HI[412]
+ mgmt_buffers/mprj_logic_high_inst/HI[411]
+ mgmt_buffers/mprj_logic_high_inst/HI[410]
+ mgmt_buffers/mprj_logic_high_inst/HI[409]
+ mgmt_buffers/mprj_logic_high_inst/HI[408]
+ mgmt_buffers/mprj_logic_high_inst/HI[407]
+ mgmt_buffers/mprj_logic_high_inst/HI[406]
+ mgmt_buffers/mprj_logic_high_inst/HI[405]
+ mgmt_buffers/mprj_logic_high_inst/HI[404]
+ mgmt_buffers/mprj_logic_high_inst/HI[403]
+ mgmt_buffers/mprj_logic_high_inst/HI[402]
+ mgmt_buffers/mprj_logic_high_inst/HI[401]
+ mgmt_buffers/mprj_logic_high_inst/HI[400]
+ mgmt_buffers/mprj_logic_high_inst/HI[399]
+ mgmt_buffers/mprj_logic_high_inst/HI[398]
+ mgmt_buffers/mprj_logic_high_inst/HI[397]
+ mgmt_buffers/mprj_logic_high_inst/HI[396]
+ mgmt_buffers/mprj_logic_high_inst/HI[395]
+ mgmt_buffers/mprj_logic_high_inst/HI[394]
+ mgmt_buffers/mprj_logic_high_inst/HI[393]
+ mgmt_buffers/mprj_logic_high_inst/HI[392]
+ mgmt_buffers/mprj_logic_high_inst/HI[391]
+ mgmt_buffers/mprj_logic_high_inst/HI[390]
+ mgmt_buffers/mprj_logic_high_inst/HI[389]
+ mgmt_buffers/mprj_logic_high_inst/HI[388]
+ mgmt_buffers/mprj_logic_high_inst/HI[387]
+ mgmt_buffers/mprj_logic_high_inst/HI[386]
+ mgmt_buffers/mprj_logic_high_inst/HI[385]
+ mgmt_buffers/mprj_logic_high_inst/HI[384]
+ mgmt_buffers/mprj_logic_high_inst/HI[383]
+ mgmt_buffers/mprj_logic_high_inst/HI[382]
+ mgmt_buffers/mprj_logic_high_inst/HI[381]
+ mgmt_buffers/mprj_logic_high_inst/HI[380]
+ mgmt_buffers/mprj_logic_high_inst/HI[379]
+ mgmt_buffers/mprj_logic_high_inst/HI[378]
+ mgmt_buffers/mprj_logic_high_inst/HI[377]
+ mgmt_buffers/mprj_logic_high_inst/HI[376]
+ mgmt_buffers/mprj_logic_high_inst/HI[375]
+ mgmt_buffers/mprj_logic_high_inst/HI[374]
+ mgmt_buffers/mprj_logic_high_inst/HI[373]
+ mgmt_buffers/mprj_logic_high_inst/HI[372]
+ mgmt_buffers/mprj_logic_high_inst/HI[371]
+ mgmt_buffers/mprj_logic_high_inst/HI[370]
+ mgmt_buffers/mprj_logic_high_inst/HI[369]
+ mgmt_buffers/mprj_logic_high_inst/HI[368]
+ mgmt_buffers/mprj_logic_high_inst/HI[367]
+ mgmt_buffers/mprj_logic_high_inst/HI[366]
+ mgmt_buffers/mprj_logic_high_inst/HI[365]
+ mgmt_buffers/mprj_logic_high_inst/HI[364]
+ mgmt_buffers/mprj_logic_high_inst/HI[363]
+ padframe/mprj_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[362]
+ mgmt_buffers/mprj_logic_high_inst/HI[361]
+ mgmt_buffers/mprj_logic_high_inst/HI[360]
+ mgmt_buffers/mprj_logic_high_inst/HI[359]
+ mgmt_buffers/mprj_logic_high_inst/HI[358]
+ mgmt_buffers/mprj_logic_high_inst/HI[357]
+ mgmt_buffers/mprj_logic_high_inst/HI[356]
+ mgmt_buffers/mprj_logic_high_inst/HI[355]
+ mgmt_buffers/mprj_logic_high_inst/HI[354]
+ mgmt_buffers/mprj_logic_high_inst/HI[353]
+ mgmt_buffers/mprj_logic_high_inst/HI[352]
+ mgmt_buffers/mprj_logic_high_inst/HI[351]
+ mgmt_buffers/mprj_logic_high_inst/HI[350]
+ mgmt_buffers/mprj_logic_high_inst/HI[349]
+ mgmt_buffers/mprj_logic_high_inst/HI[348]
+ mgmt_buffers/mprj_logic_high_inst/HI[347]
+ mgmt_buffers/mprj_logic_high_inst/HI[346]
+ mgmt_buffers/mprj_logic_high_inst/HI[345]
+ mgmt_buffers/mprj_logic_high_inst/HI[344]
+ mgmt_buffers/mprj_logic_high_inst/HI[343]
+ mgmt_buffers/mprj_logic_high_inst/HI[342]
+ mgmt_buffers/mprj_logic_high_inst/HI[341]
+ mgmt_buffers/mprj_logic_high_inst/HI[340]
+ mgmt_buffers/mprj_logic_high_inst/HI[339]
+ mgmt_buffers/mprj_logic_high_inst/HI[338]
+ mgmt_buffers/mprj_logic_high_inst/HI[337]
+ mgmt_buffers/mprj_logic_high_inst/HI[336]
+ mgmt_buffers/mprj_logic_high_inst/HI[335]
+ mgmt_buffers/mprj_logic_high_inst/HI[334]
+ mgmt_buffers/mprj_logic_high_inst/HI[333]
+ mgmt_buffers/mprj_logic_high_inst/HI[332]
+ mgmt_buffers/mprj_logic_high_inst/HI[331]
+ mgmt_buffers/mprj_logic_high_inst/HI[330]
+ mgmt_buffers/mprj_logic_high_inst/HI[329]
+ mgmt_buffers/mprj_logic_high_inst/HI[328]
+ mgmt_buffers/mprj_logic_high_inst/HI[327]
+ mgmt_buffers/mprj_logic_high_inst/HI[326]
+ mgmt_buffers/mprj_logic_high_inst/HI[325]
+ mgmt_buffers/mprj_logic_high_inst/HI[324]
+ mgmt_buffers/mprj_logic_high_inst/HI[323]
+ mgmt_buffers/mprj_logic_high_inst/HI[322]
+ padframe/mprj_io[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[321]
+ mgmt_buffers/mprj_logic_high_inst/HI[320]
+ mgmt_buffers/mprj_logic_high_inst/HI[319]
+ mgmt_buffers/mprj_logic_high_inst/HI[318]
+ mgmt_buffers/mprj_logic_high_inst/HI[317]
+ mgmt_buffers/mprj_logic_high_inst/HI[316]
+ mgmt_buffers/mprj_logic_high_inst/HI[315]
+ mgmt_buffers/mprj_logic_high_inst/HI[314]
+ mgmt_buffers/mprj_logic_high_inst/HI[313]
+ mgmt_buffers/mprj_logic_high_inst/HI[312]
+ mgmt_buffers/mprj_logic_high_inst/HI[311]
+ mgmt_buffers/mprj_logic_high_inst/HI[310]
+ mgmt_buffers/mprj_logic_high_inst/HI[309]
+ mgmt_buffers/mprj_logic_high_inst/HI[308]
+ mgmt_buffers/mprj_logic_high_inst/HI[307]
+ mgmt_buffers/mprj_logic_high_inst/HI[306]
+ mgmt_buffers/mprj_logic_high_inst/HI[305]
+ mgmt_buffers/mprj_logic_high_inst/HI[304]
+ mgmt_buffers/mprj_logic_high_inst/HI[303]
+ mgmt_buffers/mprj_logic_high_inst/HI[302]
+ mgmt_buffers/mprj_logic_high_inst/HI[301]
+ mgmt_buffers/mprj_logic_high_inst/HI[300]
+ mgmt_buffers/mprj_logic_high_inst/HI[299]
+ mgmt_buffers/mprj_logic_high_inst/HI[298]
+ mgmt_buffers/mprj_logic_high_inst/HI[297]
+ mgmt_buffers/mprj_logic_high_inst/HI[296]
+ mgmt_buffers/mprj_logic_high_inst/HI[295]
+ mgmt_buffers/mprj_logic_high_inst/HI[294]
+ mgmt_buffers/mprj_logic_high_inst/HI[293]
+ mgmt_buffers/mprj_logic_high_inst/HI[292]
+ mgmt_buffers/mprj_logic_high_inst/HI[291]
+ padframe/mprj_analog_io[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[290]
+ mgmt_buffers/mprj_logic_high_inst/HI[289]
+ mgmt_buffers/mprj_logic_high_inst/HI[288]
+ mgmt_buffers/mprj_logic_high_inst/HI[287]
+ mgmt_buffers/mprj_logic_high_inst/HI[286]
+ mgmt_buffers/mprj_logic_high_inst/HI[285]
+ mgmt_buffers/mprj_logic_high_inst/HI[284]
+ mgmt_buffers/mprj_logic_high_inst/HI[283]
+ mgmt_buffers/mprj_logic_high_inst/HI[282]
+ mgmt_buffers/mprj_logic_high_inst/HI[281]
+ mgmt_buffers/mprj_logic_high_inst/HI[280]
+ mgmt_buffers/mprj_logic_high_inst/HI[279]
+ mgmt_buffers/mprj_logic_high_inst/HI[278]
+ mgmt_buffers/mprj_logic_high_inst/HI[277]
+ mgmt_buffers/mprj_logic_high_inst/HI[276]
+ mgmt_buffers/mprj_logic_high_inst/HI[275]
+ mgmt_buffers/mprj_logic_high_inst/HI[274]
+ mgmt_buffers/mprj_logic_high_inst/HI[273]
+ mgmt_buffers/mprj_logic_high_inst/HI[272]
+ mgmt_buffers/mprj_logic_high_inst/HI[271]
+ mgmt_buffers/mprj_logic_high_inst/HI[270]
+ mgmt_buffers/mprj_logic_high_inst/HI[269]
+ padframe/mprj_analog_io[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[268]
+ mgmt_buffers/mprj_logic_high_inst/HI[267]
+ mgmt_buffers/mprj_logic_high_inst/HI[266]
+ mgmt_buffers/mprj_logic_high_inst/HI[265]
+ mgmt_buffers/mprj_logic_high_inst/HI[264]
+ mgmt_buffers/mprj_logic_high_inst/HI[263]
+ mgmt_buffers/mprj_logic_high_inst/HI[262]
+ mgmt_buffers/mprj_logic_high_inst/HI[261]
+ mgmt_buffers/mprj_logic_high_inst/HI[260]
+ mgmt_buffers/mprj_logic_high_inst/HI[259]
+ mgmt_buffers/mprj_logic_high_inst/HI[258]
+ mgmt_buffers/mprj_logic_high_inst/HI[257]
+ mgmt_buffers/mprj_logic_high_inst/HI[256]
+ mgmt_buffers/mprj_logic_high_inst/HI[255]
+ mgmt_buffers/mprj_logic_high_inst/HI[254]
+ mgmt_buffers/mprj_logic_high_inst/HI[253]
+ mgmt_buffers/mprj_logic_high_inst/HI[252]
+ mgmt_buffers/mprj_logic_high_inst/HI[251]
+ mgmt_buffers/mprj_logic_high_inst/HI[250]
+ mgmt_buffers/mprj_logic_high_inst/HI[249]
+ mgmt_buffers/mprj_logic_high_inst/HI[248]
+ mgmt_buffers/mprj_logic_high_inst/HI[247]
+ mgmt_buffers/mprj_logic_high_inst/HI[246]
+ mgmt_buffers/mprj_logic_high_inst/HI[245]
+ mgmt_buffers/mprj_logic_high_inst/HI[244]
+ mgmt_buffers/mprj_logic_high_inst/HI[243]
+ mgmt_buffers/mprj_logic_high_inst/HI[242]
+ mgmt_buffers/mprj_logic_high_inst/HI[241]
+ mgmt_buffers/mprj_logic_high_inst/HI[240]
+ mgmt_buffers/mprj_logic_high_inst/HI[239]
+ mgmt_buffers/mprj_logic_high_inst/HI[238]
+ mgmt_buffers/mprj_logic_high_inst/HI[237]
+ mgmt_buffers/mprj_logic_high_inst/HI[236]
+ mgmt_buffers/mprj_logic_high_inst/HI[235]
+ mgmt_buffers/mprj_logic_high_inst/HI[234]
+ mgmt_buffers/mprj_logic_high_inst/HI[233]
+ mgmt_buffers/mprj_logic_high_inst/HI[232]
+ mgmt_buffers/mprj_logic_high_inst/HI[231]
+ mgmt_buffers/mprj_logic_high_inst/HI[230]
+ mgmt_buffers/mprj_logic_high_inst/HI[229]
+ mgmt_buffers/mprj_logic_high_inst/HI[228]
+ padframe/mprj_analog_io[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[227]
+ mgmt_buffers/mprj_logic_high_inst/HI[226]
+ mgmt_buffers/mprj_logic_high_inst/HI[225]
+ mgmt_buffers/mprj_logic_high_inst/HI[224]
+ mgmt_buffers/mprj_logic_high_inst/HI[223]
+ mgmt_buffers/mprj_logic_high_inst/HI[222]
+ mgmt_buffers/mprj_logic_high_inst/HI[221]
+ mgmt_buffers/mprj_logic_high_inst/HI[220]
+ mgmt_buffers/mprj_logic_high_inst/HI[219]
+ mgmt_buffers/mprj_logic_high_inst/HI[218]
+ mgmt_buffers/mprj_logic_high_inst/HI[217]
+ mgmt_buffers/mprj_logic_high_inst/HI[216]
+ mgmt_buffers/mprj_logic_high_inst/HI[215]
+ mgmt_buffers/mprj_logic_high_inst/HI[214]
+ mgmt_buffers/mprj_logic_high_inst/HI[213]
+ mgmt_buffers/mprj_logic_high_inst/HI[212]
+ mgmt_buffers/mprj_logic_high_inst/HI[211]
+ mgmt_buffers/mprj_logic_high_inst/HI[210]
+ mgmt_buffers/mprj_logic_high_inst/HI[209]
+ mgmt_buffers/mprj_logic_high_inst/HI[208]
+ mgmt_buffers/mprj_logic_high_inst/HI[207]
+ mgmt_buffers/mprj_logic_high_inst/HI[206]
+ mgmt_buffers/mprj_logic_high_inst/HI[205]
+ mgmt_buffers/mprj_logic_high_inst/HI[204]
+ mgmt_buffers/mprj_logic_high_inst/HI[203]
+ mgmt_buffers/mprj_logic_high_inst/HI[202]
+ mgmt_buffers/mprj_logic_high_inst/HI[201]
+ mgmt_buffers/mprj_logic_high_inst/HI[200]
+ mgmt_buffers/mprj_logic_high_inst/HI[199]
+ mgmt_buffers/mprj_logic_high_inst/HI[198]
+ mgmt_buffers/mprj_logic_high_inst/HI[197]
+ mgmt_buffers/mprj_logic_high_inst/HI[196]
+ mgmt_buffers/mprj_logic_high_inst/HI[195]
+ mgmt_buffers/mprj_logic_high_inst/HI[194]
+ mgmt_buffers/mprj_logic_high_inst/HI[193]
+ mgmt_buffers/mprj_logic_high_inst/HI[192]
+ mgmt_buffers/mprj_logic_high_inst/HI[191]
+ mgmt_buffers/mprj_logic_high_inst/HI[190]
+ mgmt_buffers/mprj_logic_high_inst/HI[189]
+ mgmt_buffers/mprj_logic_high_inst/HI[188]
+ padframe/mprj_io[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[187]
+ mgmt_buffers/mprj_logic_high_inst/HI[186]
+ mgmt_buffers/mprj_logic_high_inst/HI[185]
+ mgmt_buffers/mprj_logic_high_inst/HI[184]
+ mgmt_buffers/mprj_logic_high_inst/HI[183]
+ mgmt_buffers/mprj_logic_high_inst/HI[182]
+ mgmt_buffers/mprj_logic_high_inst/HI[181]
+ mgmt_buffers/mprj_logic_high_inst/HI[180]
+ mgmt_buffers/mprj_logic_high_inst/HI[179]
+ mgmt_buffers/mprj_logic_high_inst/HI[178]
+ mgmt_buffers/mprj_logic_high_inst/HI[177]
+ mgmt_buffers/mprj_logic_high_inst/HI[176]
+ mgmt_buffers/mprj_logic_high_inst/HI[175]
+ mgmt_buffers/mprj_logic_high_inst/HI[174]
+ mgmt_buffers/mprj_logic_high_inst/HI[173]
+ mgmt_buffers/mprj_logic_high_inst/HI[172]
+ mgmt_buffers/mprj_logic_high_inst/HI[171]
+ mgmt_buffers/mprj_logic_high_inst/HI[170]
+ mgmt_buffers/mprj_logic_high_inst/HI[169]
+ mgmt_buffers/mprj_logic_high_inst/HI[168]
+ mgmt_buffers/mprj_logic_high_inst/HI[167]
+ mgmt_buffers/mprj_logic_high_inst/HI[166]
+ mgmt_buffers/mprj_logic_high_inst/HI[165]
+ mgmt_buffers/mprj_logic_high_inst/HI[164]
+ mgmt_buffers/mprj_logic_high_inst/HI[163]
+ mgmt_buffers/mprj_logic_high_inst/HI[162]
+ mgmt_buffers/mprj_logic_high_inst/HI[161]
+ mgmt_buffers/mprj_logic_high_inst/HI[160]
+ mgmt_buffers/mprj_logic_high_inst/HI[159]
+ mgmt_buffers/mprj_logic_high_inst/HI[158]
+ mgmt_buffers/mprj_logic_high_inst/HI[157]
+ mgmt_buffers/mprj_logic_high_inst/HI[156]
+ mgmt_buffers/mprj_logic_high_inst/HI[155]
+ mgmt_buffers/mprj_logic_high_inst/HI[154]
+ mgmt_buffers/mprj_logic_high_inst/HI[153]
+ mgmt_buffers/mprj_logic_high_inst/HI[152]
+ mgmt_buffers/mprj_logic_high_inst/HI[151]
+ mgmt_buffers/mprj_logic_high_inst/HI[150]
+ mgmt_buffers/mprj_logic_high_inst/HI[149]
+ mgmt_buffers/mprj_logic_high_inst/HI[148]
+ mgmt_buffers/mprj_logic_high_inst/HI[147]
+ mgmt_buffers/mprj_logic_high_inst/HI[146]
+ mgmt_buffers/mprj_logic_high_inst/HI[145]
+ mgmt_buffers/mprj_logic_high_inst/HI[144]
+ mgmt_buffers/mprj_logic_high_inst/HI[143]
+ mgmt_buffers/mprj_logic_high_inst/HI[142]
+ mgmt_buffers/mprj_logic_high_inst/HI[141]
+ mgmt_buffers/mprj_logic_high_inst/HI[140]
+ mgmt_buffers/mprj_logic_high_inst/HI[139]
+ mgmt_buffers/mprj_logic_high_inst/HI[138]
+ padframe/mprj_analog_io[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[137]
+ mgmt_buffers/mprj_logic_high_inst/HI[136]
+ mgmt_buffers/mprj_logic_high_inst/HI[135]
+ mgmt_buffers/mprj_logic_high_inst/HI[134]
+ mgmt_buffers/mprj_logic_high_inst/HI[133]
+ mgmt_buffers/mprj_logic_high_inst/HI[132]
+ mgmt_buffers/mprj_logic_high_inst/HI[131]
+ mgmt_buffers/mprj_logic_high_inst/HI[130]
+ mgmt_buffers/mprj_logic_high_inst/HI[129]
+ mgmt_buffers/mprj_logic_high_inst/HI[128]
+ mgmt_buffers/mprj_logic_high_inst/HI[127]
+ mgmt_buffers/mprj_logic_high_inst/HI[126]
+ mgmt_buffers/mprj_logic_high_inst/HI[125]
+ mgmt_buffers/mprj_logic_high_inst/HI[124]
+ mgmt_buffers/mprj_logic_high_inst/HI[123]
+ mgmt_buffers/mprj_logic_high_inst/HI[122]
+ mgmt_buffers/mprj_logic_high_inst/HI[121]
+ mgmt_buffers/mprj_logic_high_inst/HI[120]
+ mgmt_buffers/mprj_logic_high_inst/HI[119]
+ mgmt_buffers/mprj_logic_high_inst/HI[118]
+ mgmt_buffers/mprj_logic_high_inst/HI[117]
+ mgmt_buffers/mprj_logic_high_inst/HI[116]
+ mgmt_buffers/mprj_logic_high_inst/HI[115]
+ mgmt_buffers/mprj_logic_high_inst/HI[114]
+ mgmt_buffers/mprj_logic_high_inst/HI[113]
+ mgmt_buffers/mprj_logic_high_inst/HI[112]
+ mgmt_buffers/mprj_logic_high_inst/HI[111]
+ mgmt_buffers/mprj_logic_high_inst/HI[110]
+ mgmt_buffers/mprj_logic_high_inst/HI[109]
+ mgmt_buffers/mprj_logic_high_inst/HI[108]
+ mgmt_buffers/mprj_logic_high_inst/HI[107]
+ mgmt_buffers/mprj_logic_high_inst/HI[106]
+ mgmt_buffers/mprj_logic_high_inst/HI[105]
+ mgmt_buffers/mprj_logic_high_inst/HI[104]
+ mgmt_buffers/mprj_logic_high_inst/HI[103]
+ mgmt_buffers/mprj_logic_high_inst/HI[102]
+ mgmt_buffers/mprj_logic_high_inst/HI[101]
+ mgmt_buffers/mprj_logic_high_inst/HI[100]
+ mgmt_buffers/mprj_logic_high_inst/HI[99]
+ mgmt_buffers/mprj_logic_high_inst/HI[98]
+ mgmt_buffers/mprj_logic_high_inst/HI[97]
+ mgmt_buffers/mprj_logic_high_inst/HI[96]
+ mgmt_buffers/mprj_logic_high_inst/HI[95]
+ mgmt_buffers/mprj_logic_high_inst/HI[94]
+ mgmt_buffers/mprj_logic_high_inst/HI[93]
+ mgmt_buffers/mprj_logic_high_inst/HI[92]
+ mgmt_buffers/mprj_logic_high_inst/HI[91]
+ padframe/mprj_io[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[90]
+ mgmt_buffers/mprj_logic_high_inst/HI[89]
+ mgmt_buffers/mprj_logic_high_inst/HI[88]
+ mgmt_buffers/mprj_logic_high_inst/HI[87]
+ mgmt_buffers/mprj_logic_high_inst/HI[86]
+ mgmt_buffers/mprj_logic_high_inst/HI[85]
+ mgmt_buffers/mprj_logic_high_inst/HI[84]
+ mgmt_buffers/mprj_logic_high_inst/HI[83]
+ mgmt_buffers/mprj_logic_high_inst/HI[82]
+ mgmt_buffers/mprj_logic_high_inst/HI[81]
+ mgmt_buffers/mprj_logic_high_inst/HI[80]
+ mgmt_buffers/mprj_logic_high_inst/HI[79]
+ mgmt_buffers/mprj_logic_high_inst/HI[78]
+ mgmt_buffers/mprj_logic_high_inst/HI[77]
+ mgmt_buffers/mprj_logic_high_inst/HI[76]
+ mgmt_buffers/mprj_logic_high_inst/HI[75]
+ mgmt_buffers/mprj_logic_high_inst/HI[74]
+ mgmt_buffers/mprj_logic_high_inst/HI[73]
+ mgmt_buffers/mprj_logic_high_inst/HI[72]
+ mgmt_buffers/mprj_logic_high_inst/HI[71]
+ mgmt_buffers/mprj_logic_high_inst/HI[70]
+ mgmt_buffers/mprj_logic_high_inst/HI[69]
+ padframe/mprj_io[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[68]
+ mgmt_buffers/mprj_logic_high_inst/HI[67]
+ mgmt_buffers/mprj_logic_high_inst/HI[66]
+ mgmt_buffers/mprj_logic_high_inst/HI[65]
+ mgmt_buffers/mprj_logic_high_inst/HI[64]
+ mgmt_buffers/mprj_logic_high_inst/HI[63]
+ mgmt_buffers/mprj_logic_high_inst/HI[62]
+ mgmt_buffers/mprj_logic_high_inst/HI[61]
+ mgmt_buffers/mprj_logic_high_inst/HI[60]
+ mgmt_buffers/mprj_logic_high_inst/HI[59]
+ mgmt_buffers/mprj_logic_high_inst/HI[58]
+ mgmt_buffers/mprj_logic_high_inst/HI[57]
+ mgmt_buffers/mprj_logic_high_inst/HI[56]
+ mgmt_buffers/mprj_logic_high_inst/HI[55]
+ mgmt_buffers/mprj_logic_high_inst/HI[54]
+ mgmt_buffers/mprj_logic_high_inst/HI[53]
+ mgmt_buffers/mprj_logic_high_inst/HI[52]
+ mgmt_buffers/mprj_logic_high_inst/HI[51]
+ mgmt_buffers/mprj_logic_high_inst/HI[50]
+ mgmt_buffers/mprj_logic_high_inst/HI[49]
+ mgmt_buffers/mprj_logic_high_inst/HI[48]
+ mgmt_buffers/mprj_logic_high_inst/HI[47]
+ mgmt_buffers/mprj_logic_high_inst/HI[46]
+ mgmt_buffers/mprj_logic_high_inst/HI[45]
+ mgmt_buffers/mprj_logic_high_inst/HI[44]
+ mgmt_buffers/mprj_logic_high_inst/HI[43]
+ mgmt_buffers/mprj_logic_high_inst/HI[42]
+ mgmt_buffers/mprj_logic_high_inst/HI[41]
+ mgmt_buffers/mprj_logic_high_inst/HI[40]
+ mgmt_buffers/mprj_logic_high_inst/HI[39]
+ mgmt_buffers/mprj_logic_high_inst/HI[38]
+ mgmt_buffers/mprj_logic_high_inst/HI[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[36]
+ mgmt_buffers/mprj_logic_high_inst/HI[35]
+ mgmt_buffers/mprj_logic_high_inst/HI[34]
+ mgmt_buffers/mprj_logic_high_inst/HI[33]
+ mgmt_buffers/mprj_logic_high_inst/HI[32]
+ mgmt_buffers/mprj_logic_high_inst/HI[31]
+ mgmt_buffers/mprj_logic_high_inst/HI[30]
+ mgmt_buffers/mprj_logic_high_inst/HI[29]
+ mgmt_buffers/mprj_logic_high_inst/HI[28]
+ mgmt_buffers/mprj_logic_high_inst/HI[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[25]
+ mgmt_buffers/mprj_logic_high_inst/HI[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[22]
+ mgmt_buffers/mprj_logic_high_inst/HI[21]
+ mgmt_buffers/mprj_logic_high_inst/HI[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[19]
+ mgmt_buffers/mprj_logic_high_inst/HI[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[17]
+ mgmt_buffers/mprj_logic_high_inst/HI[16]
+ padframe/mprj_analog_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[15]
+ mgmt_buffers/mprj_logic_high_inst/HI[14]
+ mgmt_buffers/mprj_logic_high_inst/HI[13]
+ mgmt_buffers/mprj_logic_high_inst/HI[12]
+ mgmt_buffers/mprj_logic_high_inst/HI[11]
+ mgmt_buffers/mprj_logic_high_inst/HI[10]
+ mgmt_buffers/mprj_logic_high_inst/HI[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[8]
+ mgmt_buffers/mprj_logic_high_inst/HI[7]
+ mgmt_buffers/mprj_logic_high_inst/HI[6]
+ mgmt_buffers/mprj_logic_high_inst/HI[5]
+ mgmt_buffers/mprj_logic_high_inst/HI[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[2]
+ mgmt_buffers/mprj_logic_high_inst/HI[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[0]
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1
+ mgmt_buffers/powergood_check/mprj_vdd_logic1
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1_h
+ mgmt_buffers/powergood_check/mprj_vdd_logic1_h
+ padframe/mprj_io[35]
+ mprj/mprj/p[3]
+ mprj/mprj/p[2]
+ mprj/mprj/p[1]
+ mprj/mprj/p[0]
+ padframe/mprj_io[30]
+ padframe/mprj_io[14]
+ padframe/mprj_io[13]
+ padframe/mprj_io[12]
+ padframe/mprj_io[19]
+ padframe/mprj_analog_io[0]
+ padframe/mprj_io[36]
+ padframe/mprj_io[32]
+ padframe/mprj_io[29]
+ padframe/mprj_io[31]
+ padframe/mprj_io[15]
+ padframe/mprj_io[16]
+ padframe/mprj_io[1]
+ padframe/mprj_io[2]
+ padframe/mprj_io[3]
+ padframe/mprj_io[4]
+ padframe/mprj_io[5]
+ padframe/mprj_io[6]
+ padframe/mprj_io[7]
+ padframe/mprj_pads.loop0_io\[36\]
+ padframe/resetb
+ padframe/resetb_core_h
+ padframe/vccd1_pad
+ padframe/vccd2_pad
+ padframe/vccd_pad
+ padframe/vdda1_pad
+ padframe/vdda1_pad2
+ padframe/vdda2_pad
+ padframe/vdda_pad
+ padframe/vddio_pad
+ padframe/vddio_pad2
+ padframe/vssa1_pad
+ padframe/vssa1_pad2
+ padframe/vssa2_pad
+ padframe/vssa_pad
+ padframe/vssd1_pad
+ padframe/vssd2_pad
+ padframe/vssd_pad
+ padframe/vssio_pad
+ padframe/vssio_pad2
+ padframe/mprj_pads.analog_a
+ padframe/mprj_pads.analog_b
+ padframe/loop_zero_clock
+ padframe/loop_one_clock
+ padframe/loop_zero_flash_clk
+ padframe/loop_one_flash_clk
+ padframe/loop_zero_flash_csb
+ padframe/loop_one_flash_csb
+ padframe/loop_zero_flash_io0
+ padframe/loop_one_flash_io0
+ padframe/loop_zero_flash_io1
+ padframe/loop_one_flash_io1
+ padframe/loop_zero_gpio
+ padframe/loop_one_gpio
+ padframe/mprj_pads.loop0_io\[0\]
+ padframe/mprj_pads.loop1_io\[0\]
+ padframe/mprj_pads.io_in\[0\]
+ padframe/mprj_pads.io_in_3v3\[0\]
+ padframe/mprj_pads.no_connect_1b\[0\]
+ padframe/mprj_pads.no_connect_1a\[0\]
+ padframe/mprj_pads.loop0_io\[10\]
+ padframe/mprj_pads.loop1_io\[10\]
+ padframe/mprj_pads.io_in\[10\]
+ padframe/mprj_pads.io_in_3v3\[10\]
+ padframe/mprj_pads.analog_noesd_io\[3\]
+ padframe/mprj_pads.loop0_io\[11\]
+ padframe/mprj_pads.loop1_io\[11\]
+ padframe/mprj_pads.io_in\[11\]
+ padframe/mprj_pads.io_in_3v3\[11\]
+ padframe/mprj_pads.analog_noesd_io\[4\]
+ padframe/mprj_pads.loop0_io\[12\]
+ padframe/mprj_pads.loop1_io\[12\]
+ padframe/mprj_pads.io_in\[12\]
+ padframe/mprj_pads.io_in_3v3\[12\]
+ padframe/mprj_pads.analog_noesd_io\[5\]
+ padframe/mprj_pads.loop0_io\[13\]
+ padframe/mprj_pads.loop1_io\[13\]
+ padframe/mprj_pads.io_in\[13\]
+ padframe/mprj_pads.io_in_3v3\[13\]
+ padframe/mprj_pads.analog_noesd_io\[6\]
+ padframe/mprj_pads.loop0_io\[14\]
+ padframe/mprj_pads.loop1_io\[14\]
+ padframe/mprj_pads.io_in\[14\]
+ padframe/mprj_pads.io_in_3v3\[14\]
+ padframe/mprj_pads.analog_noesd_io\[7\]
+ padframe/mprj_pads.loop0_io\[15\]
+ padframe/mprj_pads.loop1_io\[15\]
+ padframe/mprj_pads.io_in\[15\]
+ padframe/mprj_pads.io_in_3v3\[15\]
+ padframe/mprj_pads.analog_noesd_io\[8\]
+ padframe/mprj_pads.loop0_io\[16\]
+ padframe/mprj_pads.loop1_io\[16\]
+ padframe/mprj_pads.io_in\[16\]
+ padframe/mprj_pads.io_in_3v3\[16\]
+ padframe/mprj_pads.analog_noesd_io\[9\]
+ padframe/mprj_pads.loop0_io\[17\]
+ padframe/mprj_pads.loop1_io\[17\]
+ padframe/mprj_pads.io_in\[17\]
+ padframe/mprj_pads.io_in_3v3\[17\]
+ padframe/mprj_pads.analog_noesd_io\[10\]
+ padframe/mprj_pads.loop0_io\[18\]
+ padframe/mprj_pads.loop1_io\[18\]
+ padframe/mprj_pads.io_in\[18\]
+ padframe/mprj_pads.io_in_3v3\[18\]
+ padframe/mprj_pads.analog_noesd_io\[11\]
+ padframe/mprj_pads.loop0_io\[1\]
+ padframe/mprj_pads.loop1_io\[1\]
+ padframe/mprj_pads.io_in\[1\]
+ padframe/mprj_pads.io_in_3v3\[1\]
+ padframe/mprj_pads.no_connect_1b\[1\]
+ padframe/mprj_pads.no_connect_1a\[1\]
+ padframe/mprj_pads.loop0_io\[2\]
+ padframe/mprj_pads.loop1_io\[2\]
+ padframe/mprj_pads.io_in\[2\]
+ padframe/mprj_pads.io_in_3v3\[2\]
+ padframe/mprj_pads.no_connect_1b\[2\]
+ padframe/mprj_pads.no_connect_1a\[2\]
+ padframe/mprj_pads.loop0_io\[3\]
+ padframe/mprj_pads.loop1_io\[3\]
+ padframe/mprj_pads.io_in\[3\]
+ padframe/mprj_pads.io_in_3v3\[3\]
+ padframe/mprj_pads.no_connect_1b\[3\]
+ padframe/mprj_pads.no_connect_1a\[3\]
+ padframe/mprj_pads.loop0_io\[4\]
+ padframe/mprj_pads.loop1_io\[4\]
+ padframe/mprj_pads.io_in\[4\]
+ padframe/mprj_pads.io_in_3v3\[4\]
+ padframe/mprj_pads.no_connect_1b\[4\]
+ padframe/mprj_pads.no_connect_1a\[4\]
+ padframe/mprj_pads.loop0_io\[5\]
+ padframe/mprj_pads.loop1_io\[5\]
+ padframe/mprj_pads.io_in\[5\]
+ padframe/mprj_pads.io_in_3v3\[5\]
+ padframe/mprj_pads.no_connect_1b\[5\]
+ padframe/mprj_pads.no_connect_1a\[5\]
+ padframe/mprj_pads.loop0_io\[6\]
+ padframe/mprj_pads.loop1_io\[6\]
+ padframe/mprj_pads.io_in\[6\]
+ padframe/mprj_pads.io_in_3v3\[6\]
+ padframe/mprj_pads.no_connect_1b\[6\]
+ padframe/mprj_pads.no_connect_1a\[6\]
+ padframe/mprj_pads.loop0_io\[7\]
+ padframe/mprj_pads.loop1_io\[7\]
+ padframe/mprj_pads.io_in\[7\]
+ padframe/mprj_pads.io_in_3v3\[7\]
+ padframe/mprj_pads.analog_noesd_io\[0\]
+ padframe/mprj_pads.loop0_io\[8\]
+ padframe/mprj_pads.loop1_io\[8\]
+ padframe/mprj_pads.io_in\[8\]
+ padframe/mprj_pads.io_in_3v3\[8\]
+ padframe/mprj_pads.analog_noesd_io\[1\]
+ padframe/mprj_pads.loop0_io\[9\]
+ padframe/mprj_pads.loop1_io\[9\]
+ padframe/mprj_pads.io_in\[9\]
+ padframe/mprj_pads.io_in_3v3\[9\]
+ padframe/mprj_pads.analog_noesd_io\[2\]
+ padframe/mprj_pads.loop0_io\[19\]
+ padframe/mprj_pads.loop1_io\[19\]
+ padframe/mprj_pads.io_in\[19\]
+ padframe/mprj_pads.io_in_3v3\[19\]
+ padframe/mprj_pads.analog_noesd_io\[12\]
+ padframe/mprj_pads.loop0_io\[29\]
+ padframe/mprj_pads.loop1_io\[29\]
+ padframe/mprj_pads.io_in\[29\]
+ padframe/mprj_pads.io_in_3v3\[29\]
+ padframe/mprj_pads.analog_noesd_io\[22\]
+ padframe/mprj_pads.loop0_io\[30\]
+ padframe/mprj_pads.loop1_io\[30\]
+ padframe/mprj_pads.io_in\[30\]
+ padframe/mprj_pads.io_in_3v3\[30\]
+ padframe/mprj_pads.analog_noesd_io\[23\]
+ padframe/mprj_pads.loop0_io\[31\]
+ padframe/mprj_pads.loop1_io\[31\]
+ padframe/mprj_pads.io_in\[31\]
+ padframe/mprj_pads.io_in_3v3\[31\]
+ padframe/mprj_pads.analog_noesd_io\[24\]
+ padframe/mprj_pads.loop0_io\[32\]
+ padframe/mprj_pads.loop1_io\[32\]
+ padframe/mprj_pads.io_in\[32\]
+ padframe/mprj_pads.io_in_3v3\[32\]
+ padframe/mprj_pads.analog_noesd_io\[25\]
+ padframe/mprj_pads.loop0_io\[33\]
+ padframe/mprj_pads.loop1_io\[33\]
+ padframe/mprj_pads.io_in\[33\]
+ padframe/mprj_pads.io_in_3v3\[33\]
+ padframe/mprj_pads.analog_noesd_io\[26\]
+ padframe/mprj_pads.loop0_io\[34\]
+ padframe/mprj_pads.loop1_io\[34\]
+ padframe/mprj_pads.io_in\[34\]
+ padframe/mprj_pads.io_in_3v3\[34\]
+ padframe/mprj_pads.analog_noesd_io\[27\]
+ padframe/mprj_pads.loop0_io\[35\]
+ padframe/mprj_pads.loop1_io\[35\]
+ padframe/mprj_pads.io_in\[35\]
+ padframe/mprj_pads.io_in_3v3\[35\]
+ padframe/mprj_pads.analog_noesd_io\[28\]
+ padframe/mprj_pads.loop1_io\[36\]
+ padframe/mprj_pads.io_in\[36\]
+ padframe/mprj_pads.io_in_3v3\[36\]
+ padframe/mprj_pads.no_connect_2b\[0\]
+ padframe/mprj_pads.no_connect_2a\[0\]
+ padframe/mprj_pads.loop0_io\[37\]
+ padframe/mprj_pads.loop1_io\[37\]
+ padframe/mprj_pads.io_in\[37\]
+ padframe/mprj_pads.io_in_3v3\[37\]
+ padframe/mprj_pads.no_connect_2b\[1\]
+ padframe/mprj_pads.no_connect_2a\[1\]
+ padframe/mprj_pads.loop0_io\[20\]
+ padframe/mprj_pads.loop1_io\[20\]
+ padframe/mprj_pads.io_in\[20\]
+ padframe/mprj_pads.io_in_3v3\[20\]
+ padframe/mprj_pads.analog_noesd_io\[13\]
+ padframe/mprj_pads.loop0_io\[21\]
+ padframe/mprj_pads.loop1_io\[21\]
+ padframe/mprj_pads.io_in\[21\]
+ padframe/mprj_pads.io_in_3v3\[21\]
+ padframe/mprj_pads.analog_noesd_io\[14\]
+ padframe/mprj_pads.loop0_io\[22\]
+ padframe/mprj_pads.loop1_io\[22\]
+ padframe/mprj_pads.io_in\[22\]
+ padframe/mprj_pads.io_in_3v3\[22\]
+ padframe/mprj_pads.analog_noesd_io\[15\]
+ padframe/mprj_pads.loop0_io\[23\]
+ padframe/mprj_pads.loop1_io\[23\]
+ padframe/mprj_pads.io_in\[23\]
+ padframe/mprj_pads.io_in_3v3\[23\]
+ padframe/mprj_pads.analog_noesd_io\[16\]
+ padframe/mprj_pads.loop0_io\[24\]
+ padframe/mprj_pads.loop1_io\[24\]
+ padframe/mprj_pads.io_in\[24\]
+ padframe/mprj_pads.io_in_3v3\[24\]
+ padframe/mprj_pads.analog_noesd_io\[17\]
+ padframe/mprj_pads.loop0_io\[25\]
+ padframe/mprj_pads.loop1_io\[25\]
+ padframe/mprj_pads.io_in\[25\]
+ padframe/mprj_pads.io_in_3v3\[25\]
+ padframe/mprj_pads.analog_noesd_io\[18\]
+ padframe/mprj_pads.loop0_io\[26\]
+ padframe/mprj_pads.loop1_io\[26\]
+ padframe/mprj_pads.io_in\[26\]
+ padframe/mprj_pads.io_in_3v3\[26\]
+ padframe/mprj_pads.analog_noesd_io\[19\]
+ padframe/mprj_pads.loop0_io\[27\]
+ padframe/mprj_pads.loop1_io\[27\]
+ padframe/mprj_pads.io_in\[27\]
+ padframe/mprj_pads.io_in_3v3\[27\]
+ padframe/mprj_pads.analog_noesd_io\[20\]
+ padframe/mprj_pads.loop0_io\[28\]
+ padframe/mprj_pads.loop1_io\[28\]
+ padframe/mprj_pads.io_in\[28\]
+ padframe/mprj_pads.io_in_3v3\[28\]
+ padframe/mprj_pads.analog_noesd_io\[21\]
+ padframe/xres_vss_loop
+ padframe/xresloop
+ sigbuf/buf_out\[0\]
+ sigbuf/buf_out\[100\]
+ sigbuf/buf_in\[102\]
+ sigbuf/buf_out\[102\]
+ sigbuf/buf_in\[104\]
+ sigbuf/buf_out\[104\]
+ sigbuf/buf_in\[106\]
+ sigbuf/buf_in\[107\]
+ sigbuf/buf_out\[107\]
+ sigbuf/buf_in\[109\]
+ sigbuf/buf_in\[110\]
+ sigbuf/buf_in\[11\]
+ sigbuf/buf_out\[110\]
+ sigbuf/buf_in\[112\]
+ sigbuf/buf_in\[113\]
+ sigbuf/buf_out\[113\]
+ sigbuf/buf_in\[115\]
+ sigbuf/buf_in\[116\]
+ sigbuf/buf_in\[117\]
+ sigbuf/buf_out\[117\]
+ sigbuf/buf_in\[119\]
+ sigbuf/buf_in\[120\]
+ sigbuf/buf_in\[12\]
+ sigbuf/buf_in\[121\]
+ sigbuf/buf_in\[122\]
+ sigbuf/buf_in\[123\]
+ sigbuf/buf_out\[123\]
+ sigbuf/buf_in\[125\]
+ sigbuf/buf_in\[126\]
+ sigbuf/buf_in\[127\]
+ sigbuf/buf_in\[128\]
+ sigbuf/buf_in\[129\]
+ sigbuf/buf_out\[129\]
+ sigbuf/buf_out\[12\]
+ sigbuf/buf_in\[131\]
+ sigbuf/buf_in\[132\]
+ sigbuf/buf_in\[133\]
+ sigbuf/buf_in\[134\]
+ sigbuf/buf_in\[135\]
+ sigbuf/buf_out\[135\]
+ sigbuf/buf_in\[137\]
+ sigbuf/buf_in\[138\]
+ sigbuf/buf_in\[139\]
+ sigbuf/buf_in\[140\]
+ sigbuf/buf_in\[14\]
+ sigbuf/buf_out\[140\]
+ sigbuf/buf_in\[142\]
+ sigbuf/buf_in\[143\]
+ sigbuf/buf_in\[144\]
+ sigbuf/buf_in\[145\]
+ sigbuf/buf_out\[145\]
+ sigbuf/buf_in\[147\]
+ sigbuf/buf_in\[148\]
+ sigbuf/buf_in\[149\]
+ sigbuf/buf_out\[149\]
+ sigbuf/buf_in\[15\]
+ sigbuf/buf_in\[151\]
+ sigbuf/buf_in\[152\]
+ sigbuf/buf_in\[153\]
+ sigbuf/buf_out\[153\]
+ sigbuf/buf_in\[155\]
+ sigbuf/buf_in\[156\]
+ sigbuf/buf_in\[157\]
+ sigbuf/buf_out\[157\]
+ sigbuf/buf_in\[159\]
+ sigbuf/buf_in\[160\]
+ sigbuf/buf_out\[15\]
+ sigbuf/buf_in\[161\]
+ sigbuf/buf_out\[161\]
+ sigbuf/buf_in\[163\]
+ sigbuf/buf_in\[164\]
+ sigbuf/buf_in\[165\]
+ sigbuf/buf_out\[165\]
+ sigbuf/buf_in\[167\]
+ sigbuf/buf_in\[168\]
+ sigbuf/buf_in\[169\]
+ sigbuf/buf_out\[169\]
+ sigbuf/buf_in\[17\]
+ sigbuf/buf_in\[171\]
+ sigbuf/buf_in\[172\]
+ sigbuf/buf_out\[172\]
+ sigbuf/buf_in\[174\]
+ sigbuf/buf_in\[175\]
+ sigbuf/buf_out\[175\]
+ sigbuf/buf_in\[177\]
+ sigbuf/buf_in\[178\]
+ sigbuf/buf_out\[178\]
+ sigbuf/buf_in\[180\]
+ sigbuf/buf_in\[18\]
+ sigbuf/buf_in\[181\]
+ sigbuf/buf_out\[181\]
+ sigbuf/buf_in\[183\]
+ sigbuf/buf_out\[183\]
+ sigbuf/buf_in\[185\]
+ sigbuf/buf_out\[185\]
+ sigbuf/buf_in\[187\]
+ sigbuf/buf_out\[187\]
+ sigbuf/buf_in\[189\]
+ sigbuf/buf_out\[189\]
+ sigbuf/buf_out\[18\]
+ sigbuf/buf_in\[191\]
+ sigbuf/buf_out\[191\]
+ sigbuf/buf_in\[193\]
+ sigbuf/buf_out\[193\]
+ sigbuf/buf_in\[195\]
+ sigbuf/buf_out\[195\]
+ sigbuf/buf_in\[20\]
+ sigbuf/buf_out\[1\]
+ sigbuf/buf_in\[21\]
+ sigbuf/buf_in\[22\]
+ sigbuf/buf_out\[22\]
+ sigbuf/buf_in\[24\]
+ sigbuf/buf_in\[25\]
+ sigbuf/buf_in\[26\]
+ sigbuf/buf_in\[27\]
+ sigbuf/buf_in\[28\]
+ sigbuf/buf_out\[28\]
+ sigbuf/buf_in\[30\]
+ sigbuf/buf_out\[2\]
+ sigbuf/buf_in\[31\]
+ sigbuf/buf_in\[32\]
+ sigbuf/buf_in\[33\]
+ sigbuf/buf_in\[34\]
+ sigbuf/buf_out\[34\]
+ sigbuf/buf_in\[36\]
+ sigbuf/buf_in\[37\]
+ sigbuf/buf_in\[38\]
+ sigbuf/buf_in\[39\]
+ sigbuf/buf_in\[40\]
+ sigbuf/buf_out\[3\]
+ sigbuf/buf_out\[40\]
+ sigbuf/buf_in\[42\]
+ sigbuf/buf_in\[43\]
+ sigbuf/buf_in\[44\]
+ sigbuf/buf_in\[45\]
+ sigbuf/buf_out\[45\]
+ sigbuf/buf_in\[47\]
+ sigbuf/buf_in\[48\]
+ sigbuf/buf_in\[49\]
+ sigbuf/buf_in\[50\]
+ sigbuf/buf_out\[4\]
+ sigbuf/buf_out\[50\]
+ sigbuf/buf_in\[52\]
+ sigbuf/buf_in\[53\]
+ sigbuf/buf_in\[54\]
+ sigbuf/buf_out\[54\]
+ sigbuf/buf_in\[56\]
+ sigbuf/buf_in\[57\]
+ sigbuf/buf_in\[58\]
+ sigbuf/buf_out\[58\]
+ sigbuf/buf_in\[60\]
+ sigbuf/buf_out\[5\]
+ sigbuf/buf_in\[61\]
+ sigbuf/buf_in\[62\]
+ sigbuf/buf_out\[62\]
+ sigbuf/buf_in\[64\]
+ sigbuf/buf_in\[65\]
+ sigbuf/buf_in\[66\]
+ sigbuf/buf_out\[66\]
+ sigbuf/buf_in\[68\]
+ sigbuf/buf_in\[69\]
+ sigbuf/buf_in\[70\]
+ sigbuf/buf_in\[7\]
+ sigbuf/buf_out\[70\]
+ sigbuf/buf_in\[72\]
+ sigbuf/buf_in\[73\]
+ sigbuf/buf_in\[74\]
+ sigbuf/buf_out\[74\]
+ sigbuf/buf_in\[76\]
+ sigbuf/buf_in\[77\]
+ sigbuf/buf_out\[77\]
+ sigbuf/buf_in\[79\]
+ sigbuf/buf_in\[80\]
+ sigbuf/buf_out\[7\]
+ sigbuf/buf_out\[80\]
+ sigbuf/buf_in\[82\]
+ sigbuf/buf_in\[83\]
+ sigbuf/buf_out\[83\]
+ sigbuf/buf_in\[85\]
+ sigbuf/buf_in\[86\]
+ sigbuf/buf_out\[86\]
+ sigbuf/buf_in\[88\]
+ sigbuf/buf_out\[88\]
+ sigbuf/buf_in\[90\]
+ sigbuf/buf_in\[9\]
+ sigbuf/buf_out\[90\]
+ sigbuf/buf_in\[92\]
+ sigbuf/buf_out\[92\]
+ sigbuf/buf_in\[94\]
+ sigbuf/buf_out\[94\]
+ sigbuf/buf_out\[95\]
+ sigbuf/buf_out\[96\]
+ sigbuf/buf_out\[97\]
+ sigbuf/buf_out\[98\]
+ sigbuf/buf_out\[99\]
+ sigbuf/buf_out\[9\]
+ user_id_value/mask_rev[15]
+ user_id_value/mask_rev[14]
+ user_id_value/mask_rev[13]
+ user_id_value/mask_rev[12]
+ user_id_value/mask_rev[11]
+ user_id_value/mask_rev[10]
+ user_id_value/mask_rev[9]
+ user_id_value/mask_rev[8]
+ user_id_value/mask_rev[7]
+ user_id_value/mask_rev[6]
+ user_id_value/mask_rev[5]
+ user_id_value/mask_rev[4]
+ user_id_value/mask_rev[3]
+ user_id_value/mask_rev[2]
+ user_id_value/mask_rev[1]
+ user_id_value/mask_rev[0]
+ user_id_value/user_proj_id_high\[0\]
+ user_id_value/user_proj_id_high\[10\]
+ user_id_value/user_proj_id_high\[11\]
+ user_id_value/user_proj_id_high\[12\]
+ user_id_value/user_proj_id_high\[13\]
+ user_id_value/user_proj_id_high\[14\]
+ user_id_value/user_proj_id_high\[15\]
+ user_id_value/user_proj_id_high\[16\]
+ user_id_value/user_proj_id_high\[17\]
+ user_id_value/user_proj_id_high\[18\]
+ user_id_value/user_proj_id_high\[19\]
+ user_id_value/user_proj_id_high\[1\]
+ user_id_value/user_proj_id_high\[20\]
+ user_id_value/user_proj_id_high\[21\]
+ user_id_value/user_proj_id_high\[22\]
+ user_id_value/user_proj_id_high\[23\]
+ user_id_value/user_proj_id_high\[24\]
+ user_id_value/user_proj_id_high\[25\]
+ user_id_value/user_proj_id_high\[26\]
+ user_id_value/user_proj_id_high\[27\]
+ user_id_value/user_proj_id_high\[28\]
+ user_id_value/user_proj_id_high\[29\]
+ user_id_value/user_proj_id_high\[2\]
+ user_id_value/user_proj_id_high\[30\]
+ user_id_value/user_proj_id_high\[31\]
+ user_id_value/user_proj_id_high\[3\]
+ user_id_value/user_proj_id_high\[4\]
+ user_id_value/user_proj_id_high\[5\]
+ user_id_value/user_proj_id_high\[6\]
+ user_id_value/user_proj_id_high\[7\]
+ user_id_value/user_proj_id_high\[8\]
+ user_id_value/user_proj_id_high\[9\]
+ spare_logic\[0\]/spare_logic1\[0\]
+ spare_logic\[0\]/spare_logic1\[10\]
+ spare_logic\[0\]/spare_logic1\[11\]
+ spare_logic\[0\]/spare_logic1\[12\]
+ spare_logic\[0\]/spare_logic1\[13\]
+ spare_logic\[0\]/spare_logic1\[14\]
+ spare_logic\[0\]/spare_logic1\[15\]
+ spare_logic\[0\]/spare_logic1\[16\]
+ spare_logic\[0\]/spare_logic1\[17\]
+ spare_logic\[0\]/spare_logic1\[18\]
+ spare_logic\[0\]/spare_logic1\[19\]
+ spare_logic\[0\]/spare_logic1\[1\]
+ spare_logic\[0\]/spare_logic1\[20\]
+ spare_logic\[0\]/spare_logic1\[21\]
+ spare_logic\[0\]/spare_logic1\[22\]
+ spare_logic\[0\]/spare_logic1\[23\]
+ spare_logic\[0\]/spare_logic1\[24\]
+ spare_logic\[0\]/spare_logic1\[25\]
+ spare_logic\[0\]/spare_logic1\[26\]
+ spare_logic\[0\]/spare_logic1\[2\]
+ spare_logic\[0\]/spare_logic1\[3\]
+ spare_logic\[0\]/spare_logic1\[4\]
+ spare_logic\[0\]/spare_logic1\[5\]
+ spare_logic\[0\]/spare_logic1\[6\]
+ spare_logic\[0\]/spare_logic1\[7\]
+ spare_logic\[0\]/spare_logic1\[8\]
+ spare_logic\[0\]/spare_logic1\[9\]
+ spare_logic\[1\]/spare_logic1\[0\]
+ spare_logic\[1\]/spare_logic1\[10\]
+ spare_logic\[1\]/spare_logic1\[11\]
+ spare_logic\[1\]/spare_logic1\[12\]
+ spare_logic\[1\]/spare_logic1\[13\]
+ spare_logic\[1\]/spare_logic1\[14\]
+ spare_logic\[1\]/spare_logic1\[15\]
+ spare_logic\[1\]/spare_logic1\[16\]
+ spare_logic\[1\]/spare_logic1\[17\]
+ spare_logic\[1\]/spare_logic1\[18\]
+ spare_logic\[1\]/spare_logic1\[19\]
+ spare_logic\[1\]/spare_logic1\[1\]
+ spare_logic\[1\]/spare_logic1\[20\]
+ spare_logic\[1\]/spare_logic1\[21\]
+ spare_logic\[1\]/spare_logic1\[22\]
+ spare_logic\[1\]/spare_logic1\[23\]
+ spare_logic\[1\]/spare_logic1\[24\]
+ spare_logic\[1\]/spare_logic1\[25\]
+ spare_logic\[1\]/spare_logic1\[26\]
+ spare_logic\[1\]/spare_logic1\[2\]
+ spare_logic\[1\]/spare_logic1\[3\]
+ spare_logic\[1\]/spare_logic1\[4\]
+ spare_logic\[1\]/spare_logic1\[5\]
+ spare_logic\[1\]/spare_logic1\[6\]
+ spare_logic\[1\]/spare_logic1\[7\]
+ spare_logic\[1\]/spare_logic1\[8\]
+ spare_logic\[1\]/spare_logic1\[9\]
+ spare_logic\[2\]/spare_logic1\[0\]
+ spare_logic\[2\]/spare_logic1\[10\]
+ spare_logic\[2\]/spare_logic1\[11\]
+ spare_logic\[2\]/spare_logic1\[12\]
+ spare_logic\[2\]/spare_logic1\[13\]
+ spare_logic\[2\]/spare_logic1\[14\]
+ spare_logic\[2\]/spare_logic1\[15\]
+ spare_logic\[2\]/spare_logic1\[16\]
+ spare_logic\[2\]/spare_logic1\[17\]
+ spare_logic\[2\]/spare_logic1\[18\]
+ spare_logic\[2\]/spare_logic1\[19\]
+ spare_logic\[2\]/spare_logic1\[1\]
+ spare_logic\[2\]/spare_logic1\[20\]
+ spare_logic\[2\]/spare_logic1\[21\]
+ spare_logic\[2\]/spare_logic1\[22\]
+ spare_logic\[2\]/spare_logic1\[23\]
+ spare_logic\[2\]/spare_logic1\[24\]
+ spare_logic\[2\]/spare_logic1\[25\]
+ spare_logic\[2\]/spare_logic1\[26\]
+ spare_logic\[2\]/spare_logic1\[2\]
+ spare_logic\[2\]/spare_logic1\[3\]
+ spare_logic\[2\]/spare_logic1\[4\]
+ spare_logic\[2\]/spare_logic1\[5\]
+ spare_logic\[2\]/spare_logic1\[6\]
+ spare_logic\[2\]/spare_logic1\[7\]
+ spare_logic\[2\]/spare_logic1\[8\]
+ spare_logic\[2\]/spare_logic1\[9\]
+ spare_logic\[3\]/spare_logic1\[0\]
+ spare_logic\[3\]/spare_logic1\[10\]
+ spare_logic\[3\]/spare_logic1\[11\]
+ spare_logic\[3\]/spare_logic1\[12\]
+ spare_logic\[3\]/spare_logic1\[13\]
+ spare_logic\[3\]/spare_logic1\[14\]
+ spare_logic\[3\]/spare_logic1\[15\]
+ spare_logic\[3\]/spare_logic1\[16\]
+ spare_logic\[3\]/spare_logic1\[17\]
+ spare_logic\[3\]/spare_logic1\[18\]
+ spare_logic\[3\]/spare_logic1\[19\]
+ spare_logic\[3\]/spare_logic1\[1\]
+ spare_logic\[3\]/spare_logic1\[20\]
+ spare_logic\[3\]/spare_logic1\[21\]
+ spare_logic\[3\]/spare_logic1\[22\]
+ spare_logic\[3\]/spare_logic1\[23\]
+ spare_logic\[3\]/spare_logic1\[24\]
+ spare_logic\[3\]/spare_logic1\[25\]
+ spare_logic\[3\]/spare_logic1\[26\]
+ spare_logic\[3\]/spare_logic1\[2\]
+ spare_logic\[3\]/spare_logic1\[3\]
+ spare_logic\[3\]/spare_logic1\[4\]
+ spare_logic\[3\]/spare_logic1\[5\]
+ spare_logic\[3\]/spare_logic1\[6\]
+ spare_logic\[3\]/spare_logic1\[7\]
+ spare_logic\[3\]/spare_logic1\[8\]
+ spare_logic\[3\]/spare_logic1\[9\]
+ user_id_value/mask_rev[31]
+ user_id_value/mask_rev[30]
+ user_id_value/mask_rev[29]
+ user_id_value/mask_rev[28]
+ user_id_value/mask_rev[27]
+ user_id_value/mask_rev[26]
+ user_id_value/mask_rev[25]
+ user_id_value/mask_rev[24]
+ user_id_value/mask_rev[23]
+ user_id_value/mask_rev[22]
+ user_id_value/mask_rev[21]
+ user_id_value/mask_rev[20]
+ user_id_value/mask_rev[19]
+ user_id_value/mask_rev[18]
+ user_id_value/mask_rev[17]
+ user_id_value/mask_rev[16]
+Found 655 partially unannotated nets.
+ flash_clkrst_buffers/out_s[7]
+  padframe/flash_clk_pad/OE_N
+ flash_clkrst_buffers/out_s[8]
+  padframe/flash_csb_pad/OUT
+ flash_clkrst_buffers/out_s[9]
+  padframe/flash_clk_pad/OUT
+ flash_clkrst_buffers/out_s[0]
+  padframe/flash_io1_pad/OUT
+ flash_clkrst_buffers/out_s[1]
+  padframe/flash_io0_pad/OUT
+ flash_clkrst_buffers/out_s[2]
+  padframe/flash_io1_pad/DM[2]
+  padframe/flash_io1_pad/DM[1]
+  padframe/flash_io1_pad/INP_DIS
+ flash_clkrst_buffers/out_s[3]
+  padframe/flash_io0_pad/DM[2]
+  padframe/flash_io0_pad/DM[1]
+  padframe/flash_io0_pad/INP_DIS
+ flash_clkrst_buffers/out_s[4]
+  padframe/flash_io1_pad/DM[0]
+  padframe/flash_io1_pad/OE_N
+ flash_clkrst_buffers/out_s[5]
+  padframe/flash_io0_pad/DM[0]
+  padframe/flash_io0_pad/OE_N
+ flash_clkrst_buffers/out_s[6]
+  padframe/flash_csb_pad/OE_N
+ gpio_control_bidir_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[0]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[1]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[2]
+ gpio_control_bidir_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[0\]/HLD_OVR
+ gpio_control_bidir_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[0\]/INP_DIS
+ gpio_control_bidir_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[0\]/OUT
+ gpio_control_bidir_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[0\]/OE_N
+ gpio_control_bidir_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/SLOW
+ gpio_control_bidir_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/VTRIP_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_EN
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_POL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_SEL
+ gpio_control_bidir_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[0]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[1]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[2]
+ gpio_control_bidir_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[1\]/HLD_OVR
+ gpio_control_bidir_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[1\]/INP_DIS
+ gpio_control_bidir_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[1\]/OUT
+ gpio_control_bidir_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[1\]/OE_N
+ gpio_control_bidir_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/SLOW
+ gpio_control_bidir_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/VTRIP_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_EN
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_POL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_SEL
+ gpio_control_bidir_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[0]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[1]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[2]
+ gpio_control_bidir_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[16\]/HLD_OVR
+ gpio_control_bidir_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_bidir_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[16\]/INP_DIS
+ gpio_control_bidir_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[16\]/OUT
+ gpio_control_bidir_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[16\]/OE_N
+ gpio_control_bidir_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/SLOW
+ gpio_control_bidir_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/VTRIP_SEL
+ gpio_control_bidir_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[89\]/A
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_EN
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_POL
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_SEL
+ gpio_control_bidir_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[0]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[1]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[2]
+ gpio_control_bidir_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[17\]/HLD_OVR
+ gpio_control_bidir_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_bidir_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[17\]/INP_DIS
+ gpio_control_bidir_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[17\]/OUT
+ gpio_control_bidir_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[17\]/OE_N
+ gpio_control_bidir_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/SLOW
+ gpio_control_bidir_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/VTRIP_SEL
+ gpio_control_bidir_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[91\]/A
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_EN
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_POL
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_SEL
+ gpio_control_bidir_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[0]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[1]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[2]
+ gpio_control_bidir_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[18\]/HLD_OVR
+ gpio_control_bidir_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_bidir_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[18\]/INP_DIS
+ gpio_control_bidir_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[18\]/OUT
+ gpio_control_bidir_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[18\]/OE_N
+ gpio_control_bidir_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/SLOW
+ gpio_control_bidir_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/VTRIP_SEL
+ gpio_control_bidir_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[93\]/A
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_EN
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_POL
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[0]
+ gpio_control_in_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[1]
+ gpio_control_in_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[2]
+ gpio_control_in_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[8\]/HLD_OVR
+ gpio_control_in_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[8\]/INP_DIS
+ gpio_control_in_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[8\]/OUT
+ gpio_control_in_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[8\]/OE_N
+ gpio_control_in_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/SLOW
+ gpio_control_in_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_1\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[1\]/A
+ gpio_control_in_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_1\[10\]/one
+  padframe/mprj_pads.area1_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_in_1\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[0]
+ gpio_control_in_1\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[1]
+ gpio_control_in_1\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[2]
+ gpio_control_in_1\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[18\]/HLD_OVR
+ gpio_control_in_1\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_in_1\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[18\]/INP_DIS
+ gpio_control_in_1\[10\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[18\]/OUT
+ gpio_control_in_1\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[18\]/OE_N
+ gpio_control_in_1\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/SLOW
+ gpio_control_in_1\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/VTRIP_SEL
+ gpio_control_in_1\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[19\]/A
+ gpio_control_in_1\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_EN
+ gpio_control_in_1\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_POL
+ gpio_control_in_1\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[0]
+ gpio_control_in_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[1]
+ gpio_control_in_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[2]
+ gpio_control_in_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[9\]/HLD_OVR
+ gpio_control_in_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[9\]/INP_DIS
+ gpio_control_in_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[9\]/OUT
+ gpio_control_in_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[9\]/OE_N
+ gpio_control_in_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/SLOW
+ gpio_control_in_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_1\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[2\]/A
+ gpio_control_in_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_SEL
+ gpio_control_in_1\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_1\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[0]
+ gpio_control_in_1\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[1]
+ gpio_control_in_1\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[2]
+ gpio_control_in_1\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[10\]/HLD_OVR
+ gpio_control_in_1\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_1\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[10\]/INP_DIS
+ gpio_control_in_1\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[10\]/OUT
+ gpio_control_in_1\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[10\]/OE_N
+ gpio_control_in_1\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/SLOW
+ gpio_control_in_1\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_1\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[3\]/A
+ gpio_control_in_1\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_1\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_1\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_1\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_1\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[0]
+ gpio_control_in_1\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[1]
+ gpio_control_in_1\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[2]
+ gpio_control_in_1\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[11\]/HLD_OVR
+ gpio_control_in_1\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_1\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[11\]/INP_DIS
+ gpio_control_in_1\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[11\]/OUT
+ gpio_control_in_1\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[11\]/OE_N
+ gpio_control_in_1\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/SLOW
+ gpio_control_in_1\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_1\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[4\]/A
+ gpio_control_in_1\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_1\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_1\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_1\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_1\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[0]
+ gpio_control_in_1\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[1]
+ gpio_control_in_1\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[2]
+ gpio_control_in_1\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[12\]/HLD_OVR
+ gpio_control_in_1\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_1\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[12\]/INP_DIS
+ gpio_control_in_1\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[12\]/OUT
+ gpio_control_in_1\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[12\]/OE_N
+ gpio_control_in_1\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/SLOW
+ gpio_control_in_1\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_1\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[5\]/A
+ gpio_control_in_1\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_1\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_1\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_1\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_1\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[0]
+ gpio_control_in_1\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[1]
+ gpio_control_in_1\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[2]
+ gpio_control_in_1\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[13\]/HLD_OVR
+ gpio_control_in_1\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_1\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[13\]/INP_DIS
+ gpio_control_in_1\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[13\]/OUT
+ gpio_control_in_1\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[13\]/OE_N
+ gpio_control_in_1\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/SLOW
+ gpio_control_in_1\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_1\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[6\]/A
+ gpio_control_in_1\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_1\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_1\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_1\[6\]/one
+  padframe/mprj_pads.area1_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_1\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[0]
+ gpio_control_in_1\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[1]
+ gpio_control_in_1\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[2]
+ gpio_control_in_1\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[14\]/HLD_OVR
+ gpio_control_in_1\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_1\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[14\]/INP_DIS
+ gpio_control_in_1\[6\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[14\]/OUT
+ gpio_control_in_1\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[14\]/OE_N
+ gpio_control_in_1\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/SLOW
+ gpio_control_in_1\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_1\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[8\]/A
+ gpio_control_in_1\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_1\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_1\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_1\[7\]/one
+  padframe/mprj_pads.area1_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_1\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[0]
+ gpio_control_in_1\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[1]
+ gpio_control_in_1\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[2]
+ gpio_control_in_1\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[15\]/HLD_OVR
+ gpio_control_in_1\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_1\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[15\]/INP_DIS
+ gpio_control_in_1\[7\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[15\]/OUT
+ gpio_control_in_1\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[15\]/OE_N
+ gpio_control_in_1\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/SLOW
+ gpio_control_in_1\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_1\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[10\]/A
+ gpio_control_in_1\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_1\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_1\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_1\[8\]/one
+  padframe/mprj_pads.area1_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_in_1\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[0]
+ gpio_control_in_1\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[1]
+ gpio_control_in_1\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[2]
+ gpio_control_in_1\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[16\]/HLD_OVR
+ gpio_control_in_1\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_in_1\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[16\]/INP_DIS
+ gpio_control_in_1\[8\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[16\]/OUT
+ gpio_control_in_1\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[16\]/OE_N
+ gpio_control_in_1\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/SLOW
+ gpio_control_in_1\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/VTRIP_SEL
+ gpio_control_in_1\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[13\]/A
+ gpio_control_in_1\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_EN
+ gpio_control_in_1\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_POL
+ gpio_control_in_1\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_SEL
+ gpio_control_in_1\[9\]/one
+  padframe/mprj_pads.area1_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_in_1\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[0]
+ gpio_control_in_1\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[1]
+ gpio_control_in_1\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[2]
+ gpio_control_in_1\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[17\]/HLD_OVR
+ gpio_control_in_1\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_in_1\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[17\]/INP_DIS
+ gpio_control_in_1\[9\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[17\]/OUT
+ gpio_control_in_1\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[17\]/OE_N
+ gpio_control_in_1\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/SLOW
+ gpio_control_in_1\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/VTRIP_SEL
+ gpio_control_in_1\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[16\]/A
+ gpio_control_in_1\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_EN
+ gpio_control_in_1\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_POL
+ gpio_control_in_1\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_SEL
+ gpio_control_in_1a\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_1a\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[0]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[1]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[2]
+ gpio_control_in_1a\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[2\]/HLD_OVR
+ gpio_control_in_1a\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[2\]/INP_DIS
+ gpio_control_in_1a\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[2\]/OUT
+ gpio_control_in_1a\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[2\]/OE_N
+ gpio_control_in_1a\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/SLOW
+ gpio_control_in_1a\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_1a\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_1a\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_1a\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[0]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[1]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[2]
+ gpio_control_in_1a\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[3\]/HLD_OVR
+ gpio_control_in_1a\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[3\]/INP_DIS
+ gpio_control_in_1a\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[3\]/OUT
+ gpio_control_in_1a\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[3\]/OE_N
+ gpio_control_in_1a\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/SLOW
+ gpio_control_in_1a\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_1a\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_1a\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_1a\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[0]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[1]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[2]
+ gpio_control_in_1a\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[4\]/HLD_OVR
+ gpio_control_in_1a\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[4\]/INP_DIS
+ gpio_control_in_1a\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[4\]/OUT
+ gpio_control_in_1a\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[4\]/OE_N
+ gpio_control_in_1a\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/SLOW
+ gpio_control_in_1a\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_1a\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_1a\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_1a\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[0]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[1]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[2]
+ gpio_control_in_1a\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[5\]/HLD_OVR
+ gpio_control_in_1a\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[5\]/INP_DIS
+ gpio_control_in_1a\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[5\]/OUT
+ gpio_control_in_1a\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[5\]/OE_N
+ gpio_control_in_1a\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/SLOW
+ gpio_control_in_1a\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_1a\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_1a\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_1a\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[0]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[1]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[2]
+ gpio_control_in_1a\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[6\]/HLD_OVR
+ gpio_control_in_1a\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[6\]/INP_DIS
+ gpio_control_in_1a\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[6\]/OUT
+ gpio_control_in_1a\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[6\]/OE_N
+ gpio_control_in_1a\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/SLOW
+ gpio_control_in_1a\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_1a\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_1a\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_1a\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[0]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[1]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[2]
+ gpio_control_in_1a\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[7\]/HLD_OVR
+ gpio_control_in_1a\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_1a\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[7\]/INP_DIS
+ gpio_control_in_1a\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[7\]/OUT
+ gpio_control_in_1a\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[7\]/OE_N
+ gpio_control_in_1a\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/SLOW
+ gpio_control_in_1a\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_1a\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[0\]/A
+ gpio_control_in_1a\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_1a\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_1a\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_in_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[0]
+ gpio_control_in_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[1]
+ gpio_control_in_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[2]
+ gpio_control_in_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[0\]/HLD_OVR
+ gpio_control_in_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_in_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[0\]/INP_DIS
+ gpio_control_in_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[0\]/OUT
+ gpio_control_in_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[0\]/OE_N
+ gpio_control_in_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/SLOW
+ gpio_control_in_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/VTRIP_SEL
+ gpio_control_in_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[23\]/A
+ gpio_control_in_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_EN
+ gpio_control_in_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_POL
+ gpio_control_in_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_SEL
+ gpio_control_in_2\[10\]/one
+  padframe/mprj_pads.area2_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_2\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[0]
+ gpio_control_in_2\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[1]
+ gpio_control_in_2\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[2]
+ gpio_control_in_2\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[10\]/HLD_OVR
+ gpio_control_in_2\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_2\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[10\]/INP_DIS
+ gpio_control_in_2\[10\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[10\]/OUT
+ gpio_control_in_2\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[10\]/OE_N
+ gpio_control_in_2\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/SLOW
+ gpio_control_in_2\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_2\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[71\]/A
+ gpio_control_in_2\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_2\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_2\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_2\[11\]/one
+  padframe/mprj_pads.area2_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_2\[11\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[0]
+ gpio_control_in_2\[11\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[1]
+ gpio_control_in_2\[11\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[2]
+ gpio_control_in_2\[11\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[11\]/HLD_OVR
+ gpio_control_in_2\[11\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_2\[11\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[11\]/INP_DIS
+ gpio_control_in_2\[11\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[11\]/OUT
+ gpio_control_in_2\[11\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[11\]/OE_N
+ gpio_control_in_2\[11\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/SLOW
+ gpio_control_in_2\[11\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_2\[11\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[75\]/A
+ gpio_control_in_2\[11\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_2\[11\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_2\[11\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_2\[12\]/one
+  padframe/mprj_pads.area2_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_2\[12\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[0]
+ gpio_control_in_2\[12\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[1]
+ gpio_control_in_2\[12\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[2]
+ gpio_control_in_2\[12\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[12\]/HLD_OVR
+ gpio_control_in_2\[12\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_2\[12\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[12\]/INP_DIS
+ gpio_control_in_2\[12\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[12\]/OUT
+ gpio_control_in_2\[12\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[12\]/OE_N
+ gpio_control_in_2\[12\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/SLOW
+ gpio_control_in_2\[12\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_2\[12\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[78\]/A
+ gpio_control_in_2\[12\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_2\[12\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_2\[12\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_2\[13\]/one
+  padframe/mprj_pads.area2_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_2\[13\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[0]
+ gpio_control_in_2\[13\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[1]
+ gpio_control_in_2\[13\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[2]
+ gpio_control_in_2\[13\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[13\]/HLD_OVR
+ gpio_control_in_2\[13\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_2\[13\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[13\]/INP_DIS
+ gpio_control_in_2\[13\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[13\]/OUT
+ gpio_control_in_2\[13\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[13\]/OE_N
+ gpio_control_in_2\[13\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/SLOW
+ gpio_control_in_2\[13\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_2\[13\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[81\]/A
+ gpio_control_in_2\[13\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_2\[13\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_2\[13\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_2\[14\]/one
+  padframe/mprj_pads.area2_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_2\[14\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[0]
+ gpio_control_in_2\[14\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[1]
+ gpio_control_in_2\[14\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[2]
+ gpio_control_in_2\[14\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[14\]/HLD_OVR
+ gpio_control_in_2\[14\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_2\[14\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[14\]/INP_DIS
+ gpio_control_in_2\[14\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[14\]/OUT
+ gpio_control_in_2\[14\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[14\]/OE_N
+ gpio_control_in_2\[14\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/SLOW
+ gpio_control_in_2\[14\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_2\[14\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[84\]/A
+ gpio_control_in_2\[14\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_2\[14\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_2\[14\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_2\[15\]/one
+  padframe/mprj_pads.area2_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_2\[15\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[0]
+ gpio_control_in_2\[15\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[1]
+ gpio_control_in_2\[15\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[2]
+ gpio_control_in_2\[15\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[15\]/HLD_OVR
+ gpio_control_in_2\[15\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_2\[15\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[15\]/INP_DIS
+ gpio_control_in_2\[15\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[15\]/OUT
+ gpio_control_in_2\[15\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[15\]/OE_N
+ gpio_control_in_2\[15\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/SLOW
+ gpio_control_in_2\[15\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_2\[15\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[87\]/A
+ gpio_control_in_2\[15\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_2\[15\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_2\[15\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_in_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[0]
+ gpio_control_in_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[1]
+ gpio_control_in_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[2]
+ gpio_control_in_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[1\]/HLD_OVR
+ gpio_control_in_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_in_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[1\]/INP_DIS
+ gpio_control_in_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[1\]/OUT
+ gpio_control_in_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[1\]/OE_N
+ gpio_control_in_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/SLOW
+ gpio_control_in_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/VTRIP_SEL
+ gpio_control_in_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[29\]/A
+ gpio_control_in_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_EN
+ gpio_control_in_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_POL
+ gpio_control_in_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_SEL
+ gpio_control_in_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[0]
+ gpio_control_in_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[1]
+ gpio_control_in_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[2]
+ gpio_control_in_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[2\]/HLD_OVR
+ gpio_control_in_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[2\]/INP_DIS
+ gpio_control_in_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[2\]/OUT
+ gpio_control_in_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[2\]/OE_N
+ gpio_control_in_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/SLOW
+ gpio_control_in_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[35\]/A
+ gpio_control_in_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_2\[3\]/one
+  padframe/mprj_pads.area2_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_2\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[0]
+ gpio_control_in_2\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[1]
+ gpio_control_in_2\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[2]
+ gpio_control_in_2\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[3\]/HLD_OVR
+ gpio_control_in_2\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_2\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[3\]/INP_DIS
+ gpio_control_in_2\[3\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[3\]/OUT
+ gpio_control_in_2\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[3\]/OE_N
+ gpio_control_in_2\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/SLOW
+ gpio_control_in_2\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_2\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[41\]/A
+ gpio_control_in_2\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_2\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_2\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_2\[4\]/one
+  padframe/mprj_pads.area2_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_2\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[0]
+ gpio_control_in_2\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[1]
+ gpio_control_in_2\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[2]
+ gpio_control_in_2\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[4\]/HLD_OVR
+ gpio_control_in_2\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_2\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[4\]/INP_DIS
+ gpio_control_in_2\[4\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[4\]/OUT
+ gpio_control_in_2\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[4\]/OE_N
+ gpio_control_in_2\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/SLOW
+ gpio_control_in_2\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_2\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[46\]/A
+ gpio_control_in_2\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_2\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_2\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_2\[5\]/one
+  padframe/mprj_pads.area2_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_2\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[0]
+ gpio_control_in_2\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[1]
+ gpio_control_in_2\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[2]
+ gpio_control_in_2\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[5\]/HLD_OVR
+ gpio_control_in_2\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_2\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[5\]/INP_DIS
+ gpio_control_in_2\[5\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[5\]/OUT
+ gpio_control_in_2\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[5\]/OE_N
+ gpio_control_in_2\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/SLOW
+ gpio_control_in_2\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_2\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[51\]/A
+ gpio_control_in_2\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_2\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_2\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_2\[6\]/one
+  padframe/mprj_pads.area2_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_2\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[0]
+ gpio_control_in_2\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[1]
+ gpio_control_in_2\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[2]
+ gpio_control_in_2\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[6\]/HLD_OVR
+ gpio_control_in_2\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_2\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[6\]/INP_DIS
+ gpio_control_in_2\[6\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[6\]/OUT
+ gpio_control_in_2\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[6\]/OE_N
+ gpio_control_in_2\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/SLOW
+ gpio_control_in_2\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_2\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[55\]/A
+ gpio_control_in_2\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_2\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_2\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_2\[7\]/one
+  padframe/mprj_pads.area2_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_2\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[0]
+ gpio_control_in_2\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[1]
+ gpio_control_in_2\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[2]
+ gpio_control_in_2\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[7\]/HLD_OVR
+ gpio_control_in_2\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_2\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[7\]/INP_DIS
+ gpio_control_in_2\[7\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[7\]/OUT
+ gpio_control_in_2\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[7\]/OE_N
+ gpio_control_in_2\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/SLOW
+ gpio_control_in_2\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_2\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[59\]/A
+ gpio_control_in_2\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_2\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_2\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[8\]/one
+  gpio_control_in_2\[8\]/ANTENNA_input1_A/DIODE
+  gpio_control_in_2\[8\]/input1/A
+  padframe/mprj_pads.area2_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_2\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[0]
+ gpio_control_in_2\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[1]
+ gpio_control_in_2\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[2]
+ gpio_control_in_2\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[8\]/HLD_OVR
+ gpio_control_in_2\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_2\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[8\]/INP_DIS
+ gpio_control_in_2\[8\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[8\]/OUT
+ gpio_control_in_2\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[8\]/OE_N
+ gpio_control_in_2\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/SLOW
+ gpio_control_in_2\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_2\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[63\]/A
+ gpio_control_in_2\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_2\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_2\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_2\[9\]/one
+  padframe/mprj_pads.area2_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_2\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[0]
+ gpio_control_in_2\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[1]
+ gpio_control_in_2\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[2]
+ gpio_control_in_2\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[9\]/HLD_OVR
+ gpio_control_in_2\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_2\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[9\]/INP_DIS
+ gpio_control_in_2\[9\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[9\]/OUT
+ gpio_control_in_2\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[9\]/OE_N
+ gpio_control_in_2\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/SLOW
+ gpio_control_in_2\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_2\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[67\]/A
+ gpio_control_in_2\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_2\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_2\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_SEL
+ gpio_defaults_block_22/gpio_defaults_low\[0\]
+  gpio_control_in_2\[3\]/ANTENNA__068__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__069__B/DIODE
+  gpio_control_in_2\[3\]/_068_/B
+  gpio_control_in_2\[3\]/_069_/B
+ gpio_defaults_block_22/gpio_defaults_high\[10\]
+  gpio_control_in_2\[3\]/ANTENNA__082__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__083__B/DIODE
+  gpio_control_in_2\[3\]/_082_/B
+  gpio_control_in_2\[3\]/_083_/B
+ gpio_defaults_block_22/gpio_defaults_low\[11\]
+  gpio_control_in_2\[3\]/ANTENNA__084__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__085__B/DIODE
+  gpio_control_in_2\[3\]/_084_/B
+  gpio_control_in_2\[3\]/_085_/B
+ gpio_defaults_block_22/gpio_defaults_low\[12\]
+  gpio_control_in_2\[3\]/ANTENNA__086__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__087__B/DIODE
+  gpio_control_in_2\[3\]/_086_/B
+  gpio_control_in_2\[3\]/_087_/B
+ gpio_defaults_block_22/gpio_defaults_high\[1\]
+  gpio_control_in_2\[3\]/ANTENNA__080__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__081__B/DIODE
+  gpio_control_in_2\[3\]/_080_/B
+  gpio_control_in_2\[3\]/_081_/B
+ gpio_defaults_block_22/gpio_defaults_low\[2\]
+  gpio_control_in_2\[3\]/ANTENNA__070__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__071__B/DIODE
+  gpio_control_in_2\[3\]/_070_/B
+  gpio_control_in_2\[3\]/_071_/B
+ gpio_defaults_block_22/gpio_defaults_low\[3\]
+  gpio_control_in_2\[3\]/ANTENNA__076__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__077__B/DIODE
+  gpio_control_in_2\[3\]/_076_/B
+  gpio_control_in_2\[3\]/_077_/B
+ gpio_defaults_block_22/gpio_defaults_low\[4\]
+  gpio_control_in_2\[3\]/ANTENNA__078__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__079__B/DIODE
+  gpio_control_in_2\[3\]/_078_/B
+  gpio_control_in_2\[3\]/_079_/B
+ gpio_defaults_block_22/gpio_defaults_low\[5\]
+  gpio_control_in_2\[3\]/ANTENNA__088__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__089__B/DIODE
+  gpio_control_in_2\[3\]/_088_/B
+  gpio_control_in_2\[3\]/_089_/B
+ gpio_defaults_block_22/gpio_defaults_low\[6\]
+  gpio_control_in_2\[3\]/ANTENNA__090__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__091__B/DIODE
+  gpio_control_in_2\[3\]/_090_/B
+  gpio_control_in_2\[3\]/_091_/B
+ gpio_defaults_block_22/gpio_defaults_low\[7\]
+  gpio_control_in_2\[3\]/ANTENNA__092__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__093__B/DIODE
+  gpio_control_in_2\[3\]/_092_/B
+  gpio_control_in_2\[3\]/_093_/B
+ gpio_defaults_block_22/gpio_defaults_low\[8\]
+  gpio_control_in_2\[3\]/ANTENNA__072__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__073__B/DIODE
+  gpio_control_in_2\[3\]/_072_/B
+  gpio_control_in_2\[3\]/_073_/B
+ gpio_defaults_block_22/gpio_defaults_low\[9\]
+  gpio_control_in_2\[3\]/ANTENNA__074__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__075__B/DIODE
+  gpio_control_in_2\[3\]/_074_/B
+  gpio_control_in_2\[3\]/_075_/B
+ housekeeping/mgmt_gpio_out[14]
+  sigbuf/signal_buffers\[103\]/A
+ housekeeping/mgmt_gpio_out[15]
+  sigbuf/signal_buffers\[105\]/A
+ housekeeping/mgmt_gpio_out[9]
+  sigbuf/signal_buffers\[97\]/A
+ housekeeping/mgmt_gpio_oeb[35]
+  sigbuf/signal_buffers\[190\]/A
+ housekeeping/mgmt_gpio_oeb[36]
+  sigbuf/signal_buffers\[192\]/A
+ housekeeping/mgmt_gpio_oeb[37]
+  sigbuf/signal_buffers\[194\]/A
+ housekeeping/mgmt_gpio_out[10]
+  sigbuf/signal_buffers\[98\]/A
+ housekeeping/mgmt_gpio_out[11]
+  sigbuf/signal_buffers\[99\]/A
+ housekeeping/mgmt_gpio_out[12]
+  sigbuf/signal_buffers\[100\]/A
+ housekeeping/mgmt_gpio_out[13]
+  sigbuf/signal_buffers\[101\]/A
+ housekeeping/mgmt_gpio_out[16]
+  sigbuf/signal_buffers\[108\]/A
+ housekeeping/mgmt_gpio_out[17]
+  sigbuf/signal_buffers\[111\]/A
+ housekeeping/mgmt_gpio_out[18]
+  sigbuf/signal_buffers\[114\]/A
+ housekeeping/mgmt_gpio_out[19]
+  sigbuf/signal_buffers\[118\]/A
+ housekeeping/mgmt_gpio_out[20]
+  sigbuf/signal_buffers\[124\]/A
+ housekeeping/mgmt_gpio_out[21]
+  sigbuf/signal_buffers\[130\]/A
+ housekeeping/mgmt_gpio_out[22]
+  sigbuf/signal_buffers\[136\]/A
+ housekeeping/mgmt_gpio_out[23]
+  sigbuf/signal_buffers\[141\]/A
+ housekeeping/mgmt_gpio_out[24]
+  sigbuf/signal_buffers\[146\]/A
+ housekeeping/mgmt_gpio_out[25]
+  sigbuf/signal_buffers\[150\]/A
+ housekeeping/mgmt_gpio_out[26]
+  sigbuf/signal_buffers\[154\]/A
+ housekeeping/mgmt_gpio_out[27]
+  sigbuf/signal_buffers\[158\]/A
+ housekeeping/mgmt_gpio_out[28]
+  sigbuf/signal_buffers\[162\]/A
+ housekeeping/mgmt_gpio_out[29]
+  sigbuf/signal_buffers\[166\]/A
+ housekeeping/mgmt_gpio_out[30]
+  sigbuf/signal_buffers\[170\]/A
+ housekeeping/mgmt_gpio_out[31]
+  sigbuf/signal_buffers\[173\]/A
+ housekeeping/mgmt_gpio_out[32]
+  sigbuf/signal_buffers\[176\]/A
+ housekeeping/mgmt_gpio_out[33]
+  sigbuf/signal_buffers\[179\]/A
+ housekeeping/mgmt_gpio_out[34]
+  sigbuf/signal_buffers\[182\]/A
+ housekeeping/mgmt_gpio_out[35]
+  sigbuf/signal_buffers\[184\]/A
+ housekeeping/mgmt_gpio_out[36]
+  sigbuf/signal_buffers\[186\]/A
+ housekeeping/mgmt_gpio_out[37]
+  sigbuf/signal_buffers\[188\]/A
+ housekeeping/mgmt_gpio_out[7]
+  sigbuf/signal_buffers\[95\]/A
+ housekeeping/mgmt_gpio_out[8]
+  sigbuf/signal_buffers\[96\]/A
+ mgmt_buffers/mprj_dat_o_user[0]
+  mprj/mprj/input1/A
+  mprj/mprj/ANTENNA_input1_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[10]
+  mprj/mprj/input11/A
+  mprj/mprj/ANTENNA_input11_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[11]
+  mprj/mprj/input12/A
+  mprj/mprj/ANTENNA_input12_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[12]
+  mprj/mprj/input13/A
+  mprj/mprj/ANTENNA_input13_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[13]
+  mprj/mprj/input14/A
+  mprj/mprj/ANTENNA_input14_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[14]
+  mprj/mprj/input15/A
+  mprj/mprj/ANTENNA_input15_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[15]
+  mprj/mprj/input16/A
+  mprj/mprj/ANTENNA_input16_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[1]
+  mprj/mprj/input2/A
+  mprj/mprj/ANTENNA_input2_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[2]
+  mprj/mprj/input3/A
+  mprj/mprj/ANTENNA_input3_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[3]
+  mprj/mprj/input4/A
+  mprj/mprj/ANTENNA_input4_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[4]
+  mprj/mprj/input5/A
+  mprj/mprj/ANTENNA_input5_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[5]
+  mprj/mprj/input6/A
+  mprj/mprj/ANTENNA_input6_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[6]
+  mprj/mprj/input7/A
+  mprj/mprj/ANTENNA_input7_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[7]
+  mprj/mprj/input8/A
+  mprj/mprj/ANTENNA_input8_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[8]
+  mprj/mprj/input9/A
+  mprj/mprj/ANTENNA_input9_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[9]
+  mprj/mprj/input10/A
+  mprj/mprj/ANTENNA_input10_A/DIODE
+ padframe/constant_value_inst\[0\]/one
+  padframe/clock_pad/DM[0]
+  padframe/clock_pad/ENABLE_VDDIO
+  padframe/clock_pad/OE_N
+ padframe/constant_value_inst\[0\]/zero
+  padframe/clock_pad/ANALOG_EN
+  padframe/clock_pad/ANALOG_POL
+  padframe/clock_pad/ANALOG_SEL
+  padframe/clock_pad/DM[2]
+  padframe/clock_pad/DM[1]
+  padframe/clock_pad/HLD_OVR
+  padframe/clock_pad/IB_MODE_SEL
+  padframe/clock_pad/OUT
+  padframe/clock_pad/SLOW
+  padframe/clock_pad/VTRIP_SEL
+ padframe/constant_value_inst\[1\]/one
+  padframe/gpio_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[1\]/zero
+  padframe/gpio_pad/ANALOG_EN
+  padframe/gpio_pad/ANALOG_POL
+  padframe/gpio_pad/ANALOG_SEL
+  padframe/gpio_pad/HLD_OVR
+  padframe/gpio_pad/IB_MODE_SEL
+  padframe/gpio_pad/SLOW
+  padframe/gpio_pad/VTRIP_SEL
+ padframe/constant_value_inst\[2\]/one
+  padframe/flash_io0_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[2\]/zero
+  padframe/flash_io0_pad/ANALOG_EN
+  padframe/flash_io0_pad/ANALOG_POL
+  padframe/flash_io0_pad/ANALOG_SEL
+  padframe/flash_io0_pad/HLD_OVR
+  padframe/flash_io0_pad/IB_MODE_SEL
+  padframe/flash_io0_pad/SLOW
+  padframe/flash_io0_pad/VTRIP_SEL
+ padframe/constant_value_inst\[3\]/one
+  padframe/flash_io1_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[3\]/zero
+  padframe/flash_io1_pad/ANALOG_EN
+  padframe/flash_io1_pad/ANALOG_POL
+  padframe/flash_io1_pad/ANALOG_SEL
+  padframe/flash_io1_pad/HLD_OVR
+  padframe/flash_io1_pad/IB_MODE_SEL
+  padframe/flash_io1_pad/SLOW
+  padframe/flash_io1_pad/VTRIP_SEL
+ padframe/constant_value_inst\[4\]/one
+  padframe/flash_csb_pad/DM[2]
+  padframe/flash_csb_pad/DM[1]
+  padframe/flash_csb_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[4\]/zero
+  padframe/flash_csb_pad/ANALOG_EN
+  padframe/flash_csb_pad/ANALOG_POL
+  padframe/flash_csb_pad/ANALOG_SEL
+  padframe/flash_csb_pad/DM[0]
+  padframe/flash_csb_pad/HLD_OVR
+  padframe/flash_csb_pad/IB_MODE_SEL
+  padframe/flash_csb_pad/INP_DIS
+  padframe/flash_csb_pad/SLOW
+  padframe/flash_csb_pad/VTRIP_SEL
+ padframe/constant_value_inst\[5\]/one
+  padframe/flash_clk_pad/DM[2]
+  padframe/flash_clk_pad/DM[1]
+  padframe/flash_clk_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[5\]/zero
+  padframe/flash_clk_pad/ANALOG_EN
+  padframe/flash_clk_pad/ANALOG_POL
+  padframe/flash_clk_pad/ANALOG_SEL
+  padframe/flash_clk_pad/DM[0]
+  padframe/flash_clk_pad/HLD_OVR
+  padframe/flash_clk_pad/IB_MODE_SEL
+  padframe/flash_clk_pad/INP_DIS
+  padframe/flash_clk_pad/SLOW
+  padframe/flash_clk_pad/VTRIP_SEL
+ padframe/constant_value_inst\[6\]/one
+  padframe/resetb_pad/ENABLE_VDDIO
+ soc/gpio_inenb_pad
+  padframe/gpio_pad/INP_DIS
+ soc/gpio_mode0_pad
+  padframe/gpio_pad/DM[0]
+ soc/gpio_mode1_pad
+  padframe/gpio_pad/DM[2]
+  padframe/gpio_pad/DM[1]
+ soc/gpio_out_pad
+  padframe/gpio_pad/OUT
+ soc/gpio_outenb_pad
+  padframe/gpio_pad/OE_N
+ soc/por_l_out
+  padframe/clock_pad/INP_DIS

signoff/caravel/openlane-signoff/timing/nom/s-clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/s-clk-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/s-clk-max.rpt
new file mode 100644
index 0000000..d50a782
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:76df26baeb2f468bcca4191f344281ed44bdbafe54024c892484f9df2de3a96d
+size 28486433

signoff/caravel/openlane-signoff/timing/nom/s-clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/s-clk-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/s-clk-min.rpt
new file mode 100644
index 0000000..8ad5243
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:375cc9c7c8c76b5d81cb0ff07d0bddef455213ec87cec0fd6a9bf9a9ee5c9a93
+size 18801941

signoff/caravel/openlane-signoff/timing/nom/s-hk_serial_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/s-hk_serial_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/s-hk_serial_clk-max.rpt
new file mode 100644
index 0000000..bc8810e
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-hk_serial_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:35f5b8aeb4931aacdaf913787ec8c775e51b8d22e73933e4e60fa55224535162
+size 345

signoff/caravel/openlane-signoff/timing/nom/s-hk_serial_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/s-hk_serial_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/s-hk_serial_clk-min.rpt
new file mode 100644
index 0000000..43fb137
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-hk_serial_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:3f2be5edcdbe99a60a3bbd981a0f755cd13474145cd178ca03031016e2ceecad
+size 11323365

signoff/caravel/openlane-signoff/timing/nom/s-hkspi_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/s-hkspi_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/s-hkspi_clk-max.rpt
new file mode 100644
index 0000000..4455b81
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-hkspi_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ee7600fd66ebfaef64c706a7b99fc7e5b6e8ab63d4be963cf4ff8e556dc015d0
+size 341

signoff/caravel/openlane-signoff/timing/nom/s-hkspi_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/s-hkspi_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/s-hkspi_clk-min.rpt
new file mode 100644
index 0000000..2db1efd
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-hkspi_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:044d6faefc6ac87d2ae6cca5fb1504c7505204c56a8790dbe50bde1b8c20d5c4
+size 6164065

signoff/caravel/openlane-signoff/timing/nom/s-max.rpt

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new file mode 100644
index 0000000..e2a76df
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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+size 285963575

signoff/caravel/openlane-signoff/timing/nom/s-min.rpt

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new file mode 100644
index 0000000..91df3dd
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:cc3117eb292bcc88f0c43fa705ee9f73d43402f4bfa921987fcb95e75ccf9038
+size 265125892

signoff/caravel/openlane-signoff/timing/nom/s-mprj-max.rpt

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new file mode 100644
index 0000000..a09d8fa
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-mprj-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
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+size 532294

signoff/caravel/openlane-signoff/timing/nom/s-mprj-min.rpt

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new file mode 100644
index 0000000..7ace89b
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-mprj-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:21541aa002d6599340e2d8bbb06bcbb54af35631c77f4b2400c18451014f5856
+size 453151

signoff/caravel/openlane-signoff/timing/nom/s-soc-max.rpt

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new file mode 100644
index 0000000..43bfeaa
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-soc-max.rpt
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+version https://git-lfs.github.com/spec/v1
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+size 18091208

signoff/caravel/openlane-signoff/timing/nom/s-soc-min.rpt

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new file mode 100644
index 0000000..62427ec
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-soc-min.rpt
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+version https://git-lfs.github.com/spec/v1
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signoff/caravel/openlane-signoff/timing/nom/s-summary.rpt

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index 0000000..be089fe
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-summary.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:600d904b61e014efec55d8190702f053a97dcd753bb128ec8e024c6c711e161b
+size 3561871

signoff/caravel/openlane-signoff/timing/nom/s-unannotated.log

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new file mode 100644
index 0000000..db81ba0
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/s-unannotated.log
@@ -0,0 +1,3628 @@
+Found 2203 unannotated nets.
+ padframe/flash_clk
+ padframe/mprj_analog_io[26]
+ mprj_io[28]
+ vssa2
+ vssa1
+ vdda1
+ mprj_io[4]
+ mprj_io[5]
+ mprj_io[19]
+ vssa1_2
+ vdda2
+ mprj_io[2]
+ mprj_io[3]
+ mprj_io[14]
+ mprj_io[33]
+ mprj_io[34]
+ resetb
+ mprj_io[1]
+ mprj_io[8]
+ mprj_io[9]
+ mprj_io[6]
+ mprj_io[11]
+ mprj_io[13]
+ mprj_io[15]
+ mprj_io[17]
+ mprj_io[18]
+ mprj_io[20]
+ mprj_io[23]
+ mprj_io[16]
+ mprj_io[27]
+ mprj_io[29]
+ mprj_io[32]
+ vssd2
+ vccd1
+ clock
+ gpio
+ vssd
+ vdda
+ mprj_io[37]
+ vccd
+ vssa
+ vssio
+ mprj_io[30]
+ vssd1
+ vssio_2
+ vddio
+ mprj_io[36]
+ vddio_2
+ mprj_io[31]
+ vccd2
+ vdda1_2
+ mprj_io[21]
+ mprj_io[26]
+ mprj_io[35]
+ mprj_io[0]
+ mprj_io[22]
+ mprj_io[24]
+ mprj_io[25]
+ mprj_io[7]
+ mprj_io[12]
+ mprj_io[10]
+ gpio_control_bidir_2\[2\]/_053_
+ gpio_control_bidir_2\[2\]/_052_
+ gpio_control_bidir_2\[2\]/_051_
+ gpio_control_bidir_2\[2\]/_050_
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+ gpio_control_bidir_2\[2\]/_048_
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+ gpio_control_bidir_2\[2\]/_046_
+ gpio_control_bidir_2\[2\]/_057_
+ gpio_control_bidir_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[7\]/_052_
+ gpio_control_in_1\[7\]/_056_
+ gpio_control_in_1\[7\]/_055_
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+ gpio_control_in_1\[7\]/_057_
+ gpio_control_in_1\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_047_
+ gpio_control_in_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_049_
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+ gpio_control_in_2\[3\]/_048_
+ gpio_control_in_2\[3\]/_046_
+ gpio_control_in_2\[3\]/_057_
+ gpio_control_in_2\[3\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_2/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[2\]
+ gpio_defaults_block_19/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[3\]
+ gpio_defaults_block_20/gpio_defaults_high\[11\]
+ gpio_defaults_block_20/gpio_defaults_high\[12\]
+ gpio_defaults_block_20/gpio_defaults_high\[2\]
+ gpio_defaults_block_20/gpio_defaults_high\[4\]
+ gpio_defaults_block_20/gpio_defaults_high\[5\]
+ gpio_defaults_block_20/gpio_defaults_high\[6\]
+ gpio_defaults_block_20/gpio_defaults_high\[7\]
+ gpio_defaults_block_20/gpio_defaults_high\[8\]
+ gpio_defaults_block_20/gpio_defaults_high\[9\]
+ gpio_defaults_block_21/gpio_defaults_high\[0\]
+ gpio_defaults_block_21/gpio_defaults_low\[10\]
+ gpio_defaults_block_21/gpio_defaults_high\[11\]
+ gpio_defaults_block_21/gpio_defaults_high\[12\]
+ gpio_defaults_block_21/gpio_defaults_low\[1\]
+ gpio_defaults_block_21/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[4\]
+ gpio_defaults_block_21/gpio_defaults_high\[5\]
+ gpio_defaults_block_21/gpio_defaults_high\[6\]
+ gpio_defaults_block_21/gpio_defaults_high\[7\]
+ gpio_defaults_block_21/gpio_defaults_high\[8\]
+ gpio_defaults_block_21/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[3\]
+ gpio_defaults_block_19/gpio_defaults_high\[4\]
+ gpio_defaults_block_19/gpio_defaults_high\[5\]
+ gpio_defaults_block_19/gpio_defaults_high\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[8\]
+ gpio_defaults_block_19/gpio_defaults_high\[9\]
+ gpio_defaults_block_2/gpio_defaults_high\[0\]
+ gpio_defaults_block_2/gpio_defaults_low\[10\]
+ gpio_defaults_block_2/gpio_defaults_high\[11\]
+ gpio_defaults_block_2/gpio_defaults_high\[12\]
+ gpio_defaults_block_2/gpio_defaults_high\[2\]
+ gpio_defaults_block_2/gpio_defaults_high\[4\]
+ gpio_defaults_block_2/gpio_defaults_high\[5\]
+ gpio_defaults_block_2/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[7\]
+ gpio_defaults_block_2/gpio_defaults_high\[8\]
+ gpio_defaults_block_2/gpio_defaults_high\[9\]
+ gpio_defaults_block_20/gpio_defaults_high\[0\]
+ gpio_defaults_block_20/gpio_defaults_low\[10\]
+ padframe/mprj_analog_io[7]
+ padframe/flash_io0
+ padframe/flash_io0_di_core
+ gpio_control_bidir_1\[0\]/_056_
+ gpio_control_bidir_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_1\[0\]/_051_
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+ gpio_control_bidir_1\[1\]/_051_
+ gpio_control_bidir_1\[1\]/_057_
+ gpio_control_bidir_1\[1\]/_056_
+ gpio_control_bidir_1\[1\]/_055_
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+ gpio_control_bidir_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_047_
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+ gpio_control_bidir_2\[0\]/_056_
+ gpio_control_bidir_2\[0\]/_051_
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+ gpio_control_bidir_2\[0\]/gpio_logic_high/gpio_logic1
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+ gpio_control_bidir_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[0\]/_055_
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+ gpio_control_in_1\[10\]/_057_
+ gpio_control_in_1\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[10\]/_047_
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+ gpio_control_in_1a\[3\]/_056_
+ gpio_control_in_1a\[3\]/_055_
+ gpio_control_in_1a\[3\]/_054_
+ gpio_control_in_1a\[3\]/_053_
+ gpio_control_in_1a\[3\]/_052_
+ gpio_control_in_1a\[3\]/_051_
+ gpio_control_in_1a\[3\]/_050_
+ gpio_control_in_1a\[3\]/_049_
+ gpio_control_in_1a\[3\]/_048_
+ gpio_control_in_1a\[3\]/_047_
+ gpio_control_in_1a\[3\]/_046_
+ gpio_control_in_1a\[3\]/_057_
+ gpio_control_in_1a\[4\]/_047_
+ gpio_control_in_1a\[4\]/_049_
+ gpio_control_in_1a\[4\]/_056_
+ gpio_control_in_1a\[4\]/_051_
+ gpio_control_in_1a\[4\]/_050_
+ gpio_control_in_1a\[4\]/_048_
+ gpio_control_in_1a\[4\]/_046_
+ gpio_control_in_1a\[4\]/_057_
+ gpio_control_in_1a\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[4\]/_055_
+ gpio_control_in_1a\[4\]/_054_
+ gpio_control_in_1a\[4\]/_053_
+ gpio_control_in_1a\[4\]/_052_
+ gpio_control_in_1a\[5\]/_047_
+ gpio_control_in_1a\[5\]/_056_
+ gpio_control_in_1a\[5\]/_055_
+ gpio_control_in_1a\[5\]/_054_
+ gpio_control_in_1a\[5\]/_053_
+ gpio_control_in_1a\[5\]/_052_
+ gpio_control_in_1a\[5\]/_051_
+ gpio_control_in_1a\[5\]/_050_
+ gpio_control_in_1a\[5\]/_049_
+ gpio_control_in_1a\[5\]/_048_
+ gpio_control_in_1a\[5\]/_046_
+ gpio_control_in_1a\[5\]/_057_
+ gpio_control_in_1a\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_056_
+ gpio_control_in_2\[0\]/_055_
+ gpio_control_in_2\[0\]/_054_
+ gpio_control_in_2\[0\]/_053_
+ gpio_control_in_2\[0\]/_052_
+ gpio_control_in_2\[0\]/_051_
+ gpio_control_in_2\[0\]/_050_
+ gpio_control_in_2\[10\]/_047_
+ gpio_control_in_2\[10\]/_052_
+ gpio_control_in_2\[10\]/_051_
+ gpio_control_in_2\[10\]/_046_
+ gpio_control_in_2\[10\]/_056_
+ gpio_control_in_2\[10\]/_055_
+ gpio_control_in_2\[10\]/_054_
+ gpio_control_in_2\[10\]/_053_
+ gpio_control_in_2\[10\]/_050_
+ gpio_control_in_2\[10\]/_049_
+ gpio_control_in_2\[10\]/_048_
+ gpio_control_in_2\[10\]/_057_
+ gpio_control_in_2\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_056_
+ gpio_control_in_2\[11\]/_057_
+ gpio_control_in_2\[11\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_055_
+ gpio_control_in_2\[11\]/_054_
+ gpio_control_in_2\[11\]/_053_
+ gpio_control_in_2\[11\]/_052_
+ gpio_control_in_2\[11\]/_051_
+ gpio_control_in_2\[11\]/_050_
+ gpio_control_in_2\[11\]/_049_
+ gpio_control_in_2\[11\]/_048_
+ gpio_control_in_2\[11\]/_047_
+ gpio_control_in_2\[11\]/_046_
+ gpio_control_in_2\[12\]/_056_
+ gpio_control_in_2\[12\]/_055_
+ gpio_control_in_2\[12\]/_054_
+ gpio_control_in_2\[12\]/_053_
+ gpio_control_in_2\[12\]/_052_
+ gpio_control_in_2\[12\]/_051_
+ gpio_control_in_2\[12\]/_050_
+ gpio_control_in_2\[12\]/_049_
+ gpio_control_in_2\[12\]/_048_
+ gpio_control_in_2\[12\]/_047_
+ gpio_control_in_2\[12\]/_046_
+ gpio_control_in_2\[12\]/_057_
+ gpio_control_in_2\[12\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[13\]/_056_
+ gpio_control_in_2\[13\]/_055_
+ gpio_control_in_2\[13\]/_054_
+ gpio_control_in_2\[13\]/_053_
+ gpio_control_in_2\[13\]/_052_
+ gpio_control_in_2\[13\]/_051_
+ gpio_control_in_2\[13\]/_050_
+ gpio_control_in_2\[13\]/_049_
+ gpio_control_in_2\[13\]/_048_
+ gpio_control_in_2\[13\]/_047_
+ gpio_control_in_2\[13\]/_046_
+ gpio_control_in_2\[13\]/_057_
+ gpio_control_in_2\[13\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[14\]/_056_
+ gpio_control_in_2\[14\]/_055_
+ gpio_control_in_2\[14\]/_054_
+ gpio_control_in_2\[14\]/_053_
+ gpio_control_in_2\[14\]/_052_
+ gpio_control_in_2\[14\]/_051_
+ gpio_control_in_2\[14\]/_050_
+ gpio_control_in_2\[14\]/_049_
+ gpio_control_in_2\[14\]/_048_
+ gpio_control_in_2\[14\]/_047_
+ gpio_control_in_2\[14\]/_046_
+ gpio_control_in_2\[14\]/_057_
+ gpio_control_in_2\[14\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/_056_
+ gpio_control_in_2\[15\]/_055_
+ gpio_control_in_2\[15\]/_054_
+ gpio_control_in_2\[15\]/_053_
+ gpio_control_in_2\[15\]/_052_
+ gpio_control_in_2\[15\]/_051_
+ gpio_control_in_2\[15\]/_050_
+ gpio_control_in_2\[15\]/_049_
+ gpio_control_in_2\[15\]/_048_
+ gpio_control_in_2\[15\]/_047_
+ gpio_control_in_2\[15\]/_046_
+ gpio_control_in_2\[15\]/_057_
+ gpio_control_in_2\[1\]/_049_
+ gpio_control_in_2\[1\]/_053_
+ gpio_control_in_2\[1\]/_052_
+ gpio_control_in_2\[1\]/_051_
+ gpio_control_in_2\[1\]/_050_
+ gpio_control_in_2\[1\]/_048_
+ gpio_control_in_2\[1\]/_047_
+ gpio_control_in_2\[1\]/_046_
+ gpio_control_in_2\[1\]/_057_
+ gpio_control_in_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[1\]/_056_
+ gpio_control_in_2\[1\]/_055_
+ gpio_control_in_2\[1\]/_054_
+ gpio_control_in_2\[2\]/_056_
+ gpio_control_in_2\[2\]/_051_
+ gpio_control_in_2\[2\]/_046_
+ gpio_control_in_2\[2\]/_055_
+ gpio_control_in_2\[2\]/_054_
+ gpio_control_in_2\[2\]/_053_
+ gpio_control_in_2\[2\]/_052_
+ gpio_control_in_2\[2\]/_050_
+ gpio_control_in_2\[2\]/_049_
+ gpio_control_in_2\[2\]/_048_
+ gpio_control_in_2\[2\]/_047_
+ gpio_control_in_2\[2\]/_057_
+ gpio_control_in_2\[3\]/_055_
+ gpio_control_in_2\[3\]/_056_
+ gpio_control_in_2\[3\]/_054_
+ gpio_control_in_2\[3\]/_053_
+ gpio_control_in_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[4\]/_049_
+ gpio_control_in_2\[4\]/_056_
+ gpio_control_in_2\[4\]/_055_
+ gpio_control_in_2\[4\]/_054_
+ gpio_control_in_2\[4\]/_053_
+ gpio_control_in_2\[4\]/_052_
+ gpio_control_in_2\[4\]/_051_
+ gpio_control_in_2\[4\]/_050_
+ gpio_control_in_2\[4\]/_048_
+ gpio_control_in_2\[4\]/_047_
+ gpio_control_in_2\[4\]/_046_
+ gpio_control_in_2\[4\]/_057_
+ gpio_control_in_2\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_057_
+ gpio_control_in_2\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_047_
+ gpio_control_in_2\[5\]/_046_
+ gpio_control_in_2\[5\]/_056_
+ gpio_control_in_2\[5\]/_055_
+ gpio_control_in_2\[5\]/_054_
+ gpio_control_in_2\[5\]/_053_
+ gpio_control_in_2\[5\]/_052_
+ gpio_control_in_2\[5\]/_051_
+ gpio_control_in_2\[5\]/_050_
+ gpio_control_in_2\[5\]/_049_
+ gpio_control_in_2\[5\]/_048_
+ gpio_control_in_2\[6\]/_056_
+ gpio_control_in_2\[6\]/_055_
+ gpio_control_in_2\[6\]/_054_
+ gpio_control_in_2\[6\]/_053_
+ gpio_control_in_2\[6\]/_052_
+ gpio_control_in_2\[6\]/_051_
+ gpio_control_in_2\[6\]/_050_
+ gpio_control_in_2\[6\]/_049_
+ gpio_control_in_2\[6\]/_048_
+ gpio_control_in_2\[6\]/_047_
+ gpio_control_in_2\[6\]/_046_
+ gpio_control_in_2\[6\]/_057_
+ gpio_control_in_2\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[7\]/_054_
+ gpio_control_in_2\[7\]/_056_
+ gpio_control_in_2\[7\]/_055_
+ gpio_control_in_2\[7\]/_053_
+ gpio_control_in_2\[7\]/_052_
+ gpio_control_in_2\[7\]/_051_
+ gpio_control_in_2\[7\]/_050_
+ gpio_control_in_2\[7\]/_049_
+ gpio_control_in_2\[7\]/_048_
+ gpio_control_in_2\[7\]/_047_
+ gpio_control_in_2\[7\]/_046_
+ gpio_control_in_2\[7\]/_057_
+ gpio_control_in_2\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[8\]/_052_
+ gpio_control_in_2\[8\]/_047_
+ gpio_control_in_2\[8\]/_056_
+ gpio_control_in_2\[8\]/_055_
+ gpio_control_in_2\[8\]/_054_
+ gpio_control_in_2\[8\]/_053_
+ gpio_control_in_2\[8\]/_051_
+ gpio_control_in_2\[8\]/_050_
+ gpio_control_in_2\[8\]/_049_
+ gpio_control_in_2\[8\]/_048_
+ gpio_control_in_2\[8\]/_046_
+ gpio_control_in_2\[8\]/_057_
+ gpio_control_in_2\[8\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[4\]
+ gpio_defaults_block_0/gpio_defaults_high\[9\]
+ gpio_control_in_2\[9\]/_051_
+ gpio_control_in_2\[9\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[0\]
+ gpio_defaults_block_0/gpio_defaults_low\[10\]
+ gpio_defaults_block_0/gpio_defaults_high\[11\]
+ gpio_defaults_block_0/gpio_defaults_high\[12\]
+ gpio_defaults_block_0/gpio_defaults_low\[1\]
+ gpio_defaults_block_0/gpio_defaults_high\[2\]
+ gpio_defaults_block_0/gpio_defaults_high\[3\]
+ gpio_defaults_block_0/gpio_defaults_high\[5\]
+ gpio_defaults_block_0/gpio_defaults_high\[6\]
+ gpio_defaults_block_0/gpio_defaults_high\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[8\]
+ gpio_control_in_2\[9\]/_056_
+ gpio_control_in_2\[9\]/_055_
+ gpio_control_in_2\[9\]/_054_
+ gpio_control_in_2\[9\]/_053_
+ gpio_control_in_2\[9\]/_052_
+ gpio_control_in_2\[9\]/_050_
+ gpio_control_in_2\[9\]/_049_
+ gpio_control_in_2\[9\]/_048_
+ gpio_control_in_2\[9\]/_047_
+ gpio_control_in_2\[9\]/_046_
+ gpio_control_in_2\[9\]/_057_
+ gpio_defaults_block_11/gpio_defaults_low\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[0\]
+ gpio_defaults_block_11/gpio_defaults_high\[11\]
+ gpio_defaults_block_11/gpio_defaults_high\[12\]
+ gpio_defaults_block_11/gpio_defaults_low\[1\]
+ gpio_defaults_block_11/gpio_defaults_high\[2\]
+ gpio_defaults_block_11/gpio_defaults_high\[3\]
+ gpio_defaults_block_11/gpio_defaults_high\[5\]
+ gpio_defaults_block_11/gpio_defaults_high\[7\]
+ gpio_defaults_block_11/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[0\]
+ gpio_defaults_block_12/gpio_defaults_low\[10\]
+ gpio_defaults_block_12/gpio_defaults_high\[11\]
+ gpio_defaults_block_12/gpio_defaults_high\[12\]
+ gpio_defaults_block_12/gpio_defaults_low\[1\]
+ gpio_defaults_block_12/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[0\]
+ gpio_defaults_block_1/gpio_defaults_low\[10\]
+ gpio_defaults_block_1/gpio_defaults_high\[11\]
+ gpio_defaults_block_1/gpio_defaults_high\[12\]
+ gpio_defaults_block_1/gpio_defaults_low\[1\]
+ gpio_defaults_block_1/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[3\]
+ gpio_defaults_block_1/gpio_defaults_high\[5\]
+ gpio_defaults_block_1/gpio_defaults_high\[6\]
+ gpio_defaults_block_1/gpio_defaults_high\[7\]
+ gpio_defaults_block_1/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[9\]
+ gpio_defaults_block_10/gpio_defaults_high\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[11\]
+ gpio_defaults_block_10/gpio_defaults_high\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[2\]
+ gpio_defaults_block_10/gpio_defaults_high\[3\]
+ gpio_defaults_block_10/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[5\]
+ gpio_defaults_block_10/gpio_defaults_high\[6\]
+ gpio_defaults_block_10/gpio_defaults_high\[7\]
+ gpio_defaults_block_10/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_low\[10\]
+ gpio_defaults_block_15/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[11\]
+ gpio_defaults_block_14/gpio_defaults_low\[10\]
+ gpio_defaults_block_14/gpio_defaults_high\[12\]
+ gpio_defaults_block_14/gpio_defaults_low\[1\]
+ gpio_defaults_block_14/gpio_defaults_high\[2\]
+ gpio_defaults_block_14/gpio_defaults_high\[4\]
+ gpio_defaults_block_14/gpio_defaults_high\[6\]
+ gpio_defaults_block_14/gpio_defaults_high\[7\]
+ gpio_defaults_block_14/gpio_defaults_high\[8\]
+ gpio_defaults_block_14/gpio_defaults_high\[9\]
+ gpio_defaults_block_15/gpio_defaults_high\[0\]
+ gpio_defaults_block_15/gpio_defaults_high\[11\]
+ gpio_defaults_block_15/gpio_defaults_high\[12\]
+ gpio_defaults_block_15/gpio_defaults_low\[1\]
+ gpio_defaults_block_15/gpio_defaults_high\[2\]
+ gpio_defaults_block_15/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[4\]
+ gpio_defaults_block_15/gpio_defaults_high\[5\]
+ gpio_defaults_block_15/gpio_defaults_high\[6\]
+ gpio_defaults_block_15/gpio_defaults_high\[8\]
+ gpio_defaults_block_15/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[3\]
+ gpio_defaults_block_12/gpio_defaults_high\[4\]
+ gpio_defaults_block_12/gpio_defaults_high\[5\]
+ gpio_defaults_block_12/gpio_defaults_high\[6\]
+ gpio_defaults_block_12/gpio_defaults_high\[7\]
+ gpio_defaults_block_12/gpio_defaults_high\[8\]
+ gpio_defaults_block_12/gpio_defaults_high\[9\]
+ gpio_defaults_block_13/gpio_defaults_high\[0\]
+ gpio_defaults_block_13/gpio_defaults_low\[10\]
+ gpio_defaults_block_13/gpio_defaults_high\[12\]
+ gpio_defaults_block_13/gpio_defaults_low\[1\]
+ gpio_defaults_block_13/gpio_defaults_high\[2\]
+ gpio_defaults_block_13/gpio_defaults_high\[4\]
+ gpio_defaults_block_13/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[6\]
+ gpio_defaults_block_13/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[8\]
+ gpio_defaults_block_13/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[0\]
+ gpio_defaults_block_14/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[0\]
+ gpio_defaults_block_18/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_high\[12\]
+ gpio_defaults_block_18/gpio_defaults_low\[1\]
+ gpio_defaults_block_18/gpio_defaults_high\[2\]
+ gpio_defaults_block_18/gpio_defaults_high\[3\]
+ gpio_defaults_block_18/gpio_defaults_high\[4\]
+ gpio_defaults_block_18/gpio_defaults_high\[5\]
+ gpio_defaults_block_18/gpio_defaults_high\[6\]
+ gpio_defaults_block_18/gpio_defaults_high\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[8\]
+ gpio_defaults_block_18/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[0\]
+ gpio_defaults_block_19/gpio_defaults_low\[10\]
+ gpio_defaults_block_19/gpio_defaults_high\[11\]
+ gpio_defaults_block_19/gpio_defaults_high\[12\]
+ gpio_defaults_block_19/gpio_defaults_low\[1\]
+ gpio_defaults_block_19/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[0\]
+ gpio_defaults_block_16/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_high\[12\]
+ gpio_defaults_block_16/gpio_defaults_low\[1\]
+ gpio_defaults_block_16/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[3\]
+ gpio_defaults_block_16/gpio_defaults_high\[4\]
+ gpio_defaults_block_16/gpio_defaults_high\[5\]
+ gpio_defaults_block_16/gpio_defaults_high\[6\]
+ gpio_defaults_block_16/gpio_defaults_high\[7\]
+ gpio_defaults_block_16/gpio_defaults_high\[8\]
+ gpio_defaults_block_16/gpio_defaults_high\[9\]
+ gpio_defaults_block_17/gpio_defaults_high\[0\]
+ gpio_defaults_block_17/gpio_defaults_low\[10\]
+ gpio_defaults_block_17/gpio_defaults_high\[11\]
+ gpio_defaults_block_17/gpio_defaults_high\[12\]
+ gpio_defaults_block_17/gpio_defaults_low\[1\]
+ gpio_defaults_block_17/gpio_defaults_high\[2\]
+ gpio_defaults_block_17/gpio_defaults_high\[3\]
+ gpio_defaults_block_17/gpio_defaults_high\[4\]
+ gpio_defaults_block_17/gpio_defaults_high\[5\]
+ gpio_defaults_block_17/gpio_defaults_high\[6\]
+ gpio_defaults_block_17/gpio_defaults_high\[7\]
+ gpio_defaults_block_17/gpio_defaults_high\[8\]
+ gpio_defaults_block_17/gpio_defaults_high\[9\]
+ gpio_defaults_block_22/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[10\]
+ gpio_defaults_block_24/gpio_defaults_high\[11\]
+ gpio_defaults_block_24/gpio_defaults_high\[12\]
+ gpio_defaults_block_24/gpio_defaults_low\[1\]
+ gpio_defaults_block_24/gpio_defaults_high\[2\]
+ gpio_defaults_block_24/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[4\]
+ gpio_defaults_block_24/gpio_defaults_high\[5\]
+ gpio_defaults_block_24/gpio_defaults_high\[6\]
+ gpio_defaults_block_24/gpio_defaults_high\[7\]
+ gpio_defaults_block_24/gpio_defaults_high\[8\]
+ gpio_defaults_block_24/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_high\[0\]
+ gpio_defaults_block_25/gpio_defaults_low\[10\]
+ gpio_defaults_block_25/gpio_defaults_high\[11\]
+ gpio_defaults_block_25/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_high\[0\]
+ gpio_defaults_block_22/gpio_defaults_low\[10\]
+ gpio_defaults_block_22/gpio_defaults_high\[11\]
+ gpio_defaults_block_22/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_low\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[3\]
+ gpio_defaults_block_22/gpio_defaults_high\[4\]
+ gpio_defaults_block_22/gpio_defaults_high\[5\]
+ gpio_defaults_block_22/gpio_defaults_high\[7\]
+ gpio_defaults_block_22/gpio_defaults_high\[8\]
+ gpio_defaults_block_22/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[11\]
+ gpio_defaults_block_23/gpio_defaults_high\[12\]
+ gpio_defaults_block_23/gpio_defaults_low\[1\]
+ gpio_defaults_block_23/gpio_defaults_high\[2\]
+ gpio_defaults_block_23/gpio_defaults_high\[4\]
+ gpio_defaults_block_23/gpio_defaults_high\[5\]
+ gpio_defaults_block_23/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[7\]
+ gpio_defaults_block_23/gpio_defaults_high\[8\]
+ gpio_defaults_block_23/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[12\]
+ gpio_defaults_block_27/gpio_defaults_low\[1\]
+ gpio_defaults_block_27/gpio_defaults_high\[3\]
+ gpio_defaults_block_27/gpio_defaults_high\[4\]
+ gpio_defaults_block_27/gpio_defaults_high\[5\]
+ gpio_defaults_block_27/gpio_defaults_high\[6\]
+ gpio_defaults_block_27/gpio_defaults_high\[7\]
+ gpio_defaults_block_27/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_high\[0\]
+ gpio_defaults_block_28/gpio_defaults_low\[10\]
+ gpio_defaults_block_28/gpio_defaults_high\[11\]
+ gpio_defaults_block_28/gpio_defaults_high\[12\]
+ gpio_defaults_block_28/gpio_defaults_low\[1\]
+ gpio_defaults_block_28/gpio_defaults_high\[2\]
+ gpio_defaults_block_28/gpio_defaults_high\[3\]
+ gpio_defaults_block_28/gpio_defaults_high\[4\]
+ gpio_defaults_block_28/gpio_defaults_high\[5\]
+ gpio_defaults_block_28/gpio_defaults_high\[6\]
+ gpio_defaults_block_28/gpio_defaults_high\[7\]
+ gpio_defaults_block_28/gpio_defaults_high\[8\]
+ gpio_defaults_block_28/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[1\]
+ gpio_defaults_block_25/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[3\]
+ gpio_defaults_block_25/gpio_defaults_high\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[5\]
+ gpio_defaults_block_25/gpio_defaults_high\[6\]
+ gpio_defaults_block_25/gpio_defaults_high\[7\]
+ gpio_defaults_block_25/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[0\]
+ gpio_defaults_block_26/gpio_defaults_low\[10\]
+ gpio_defaults_block_26/gpio_defaults_high\[11\]
+ gpio_defaults_block_26/gpio_defaults_high\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[1\]
+ gpio_defaults_block_26/gpio_defaults_high\[3\]
+ gpio_defaults_block_26/gpio_defaults_high\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[5\]
+ gpio_defaults_block_26/gpio_defaults_high\[6\]
+ gpio_defaults_block_26/gpio_defaults_high\[7\]
+ gpio_defaults_block_26/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_high\[9\]
+ gpio_defaults_block_27/gpio_defaults_high\[0\]
+ gpio_defaults_block_27/gpio_defaults_low\[10\]
+ gpio_defaults_block_27/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[9\]
+ gpio_defaults_block_30/gpio_defaults_high\[0\]
+ gpio_defaults_block_30/gpio_defaults_low\[10\]
+ gpio_defaults_block_30/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[12\]
+ gpio_defaults_block_30/gpio_defaults_low\[1\]
+ gpio_defaults_block_30/gpio_defaults_high\[3\]
+ gpio_defaults_block_30/gpio_defaults_high\[4\]
+ gpio_defaults_block_30/gpio_defaults_high\[5\]
+ gpio_defaults_block_30/gpio_defaults_high\[6\]
+ gpio_defaults_block_30/gpio_defaults_high\[7\]
+ gpio_defaults_block_30/gpio_defaults_high\[8\]
+ gpio_defaults_block_30/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[0\]
+ gpio_defaults_block_31/gpio_defaults_low\[10\]
+ gpio_defaults_block_31/gpio_defaults_high\[11\]
+ gpio_defaults_block_31/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[0\]
+ gpio_defaults_block_29/gpio_defaults_low\[10\]
+ gpio_defaults_block_29/gpio_defaults_high\[11\]
+ gpio_defaults_block_29/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_low\[1\]
+ gpio_defaults_block_29/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[3\]
+ gpio_defaults_block_29/gpio_defaults_high\[4\]
+ gpio_defaults_block_29/gpio_defaults_high\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[6\]
+ gpio_defaults_block_29/gpio_defaults_high\[7\]
+ gpio_defaults_block_29/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[0\]
+ gpio_defaults_block_3/gpio_defaults_low\[10\]
+ gpio_defaults_block_3/gpio_defaults_high\[11\]
+ gpio_defaults_block_3/gpio_defaults_high\[12\]
+ gpio_defaults_block_3/gpio_defaults_low\[1\]
+ gpio_defaults_block_3/gpio_defaults_high\[2\]
+ gpio_defaults_block_3/gpio_defaults_high\[3\]
+ gpio_defaults_block_3/gpio_defaults_high\[4\]
+ gpio_defaults_block_3/gpio_defaults_high\[5\]
+ gpio_defaults_block_3/gpio_defaults_high\[6\]
+ gpio_defaults_block_3/gpio_defaults_high\[7\]
+ gpio_defaults_block_3/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[0\]
+ gpio_defaults_block_32/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_high\[11\]
+ gpio_defaults_block_33/gpio_defaults_high\[12\]
+ gpio_defaults_block_33/gpio_defaults_high\[2\]
+ gpio_defaults_block_33/gpio_defaults_high\[3\]
+ gpio_defaults_block_33/gpio_defaults_high\[5\]
+ gpio_defaults_block_33/gpio_defaults_high\[6\]
+ gpio_defaults_block_33/gpio_defaults_high\[7\]
+ gpio_defaults_block_33/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[0\]
+ gpio_defaults_block_34/gpio_defaults_low\[10\]
+ gpio_defaults_block_34/gpio_defaults_high\[11\]
+ gpio_defaults_block_34/gpio_defaults_high\[12\]
+ gpio_defaults_block_34/gpio_defaults_low\[1\]
+ gpio_defaults_block_34/gpio_defaults_high\[2\]
+ gpio_defaults_block_34/gpio_defaults_high\[3\]
+ gpio_defaults_block_34/gpio_defaults_high\[4\]
+ gpio_defaults_block_34/gpio_defaults_high\[6\]
+ gpio_defaults_block_34/gpio_defaults_high\[7\]
+ gpio_defaults_block_34/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_low\[1\]
+ gpio_defaults_block_31/gpio_defaults_high\[2\]
+ gpio_defaults_block_31/gpio_defaults_high\[3\]
+ gpio_defaults_block_31/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[6\]
+ gpio_defaults_block_31/gpio_defaults_high\[7\]
+ gpio_defaults_block_31/gpio_defaults_high\[8\]
+ gpio_defaults_block_31/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[10\]
+ gpio_defaults_block_32/gpio_defaults_high\[11\]
+ gpio_defaults_block_32/gpio_defaults_high\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[2\]
+ gpio_defaults_block_32/gpio_defaults_high\[3\]
+ gpio_defaults_block_32/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[5\]
+ gpio_defaults_block_32/gpio_defaults_high\[6\]
+ gpio_defaults_block_32/gpio_defaults_high\[7\]
+ gpio_defaults_block_32/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[0\]
+ gpio_defaults_block_33/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[9\]
+ gpio_defaults_block_37/gpio_defaults_high\[0\]
+ gpio_defaults_block_37/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_high\[11\]
+ gpio_defaults_block_37/gpio_defaults_high\[12\]
+ gpio_defaults_block_37/gpio_defaults_high\[2\]
+ gpio_defaults_block_37/gpio_defaults_high\[3\]
+ gpio_defaults_block_37/gpio_defaults_high\[4\]
+ gpio_defaults_block_37/gpio_defaults_high\[5\]
+ gpio_defaults_block_37/gpio_defaults_high\[6\]
+ gpio_defaults_block_37/gpio_defaults_high\[7\]
+ gpio_defaults_block_37/gpio_defaults_high\[8\]
+ gpio_defaults_block_4/gpio_defaults_high\[0\]
+ gpio_defaults_block_4/gpio_defaults_low\[10\]
+ gpio_defaults_block_4/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[0\]
+ gpio_defaults_block_35/gpio_defaults_low\[10\]
+ gpio_defaults_block_35/gpio_defaults_high\[11\]
+ gpio_defaults_block_35/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_low\[1\]
+ gpio_defaults_block_35/gpio_defaults_high\[2\]
+ gpio_defaults_block_35/gpio_defaults_high\[3\]
+ gpio_defaults_block_35/gpio_defaults_high\[4\]
+ gpio_defaults_block_35/gpio_defaults_high\[6\]
+ gpio_defaults_block_35/gpio_defaults_high\[7\]
+ gpio_defaults_block_35/gpio_defaults_high\[8\]
+ gpio_defaults_block_35/gpio_defaults_high\[9\]
+ gpio_defaults_block_36/gpio_defaults_high\[0\]
+ gpio_defaults_block_36/gpio_defaults_low\[10\]
+ gpio_defaults_block_36/gpio_defaults_high\[11\]
+ gpio_defaults_block_36/gpio_defaults_high\[12\]
+ gpio_defaults_block_36/gpio_defaults_low\[1\]
+ gpio_defaults_block_36/gpio_defaults_high\[3\]
+ gpio_defaults_block_36/gpio_defaults_high\[4\]
+ gpio_defaults_block_36/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[6\]
+ gpio_defaults_block_36/gpio_defaults_high\[7\]
+ gpio_defaults_block_36/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[11\]
+ gpio_defaults_block_6/gpio_defaults_high\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[2\]
+ gpio_defaults_block_6/gpio_defaults_high\[3\]
+ gpio_defaults_block_6/gpio_defaults_high\[4\]
+ gpio_defaults_block_6/gpio_defaults_high\[5\]
+ gpio_defaults_block_6/gpio_defaults_high\[6\]
+ gpio_defaults_block_6/gpio_defaults_high\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[8\]
+ gpio_defaults_block_6/gpio_defaults_high\[9\]
+ gpio_defaults_block_7/gpio_defaults_high\[0\]
+ gpio_defaults_block_7/gpio_defaults_low\[10\]
+ gpio_defaults_block_7/gpio_defaults_high\[12\]
+ gpio_defaults_block_7/gpio_defaults_low\[1\]
+ gpio_defaults_block_7/gpio_defaults_high\[2\]
+ gpio_defaults_block_7/gpio_defaults_high\[3\]
+ gpio_defaults_block_7/gpio_defaults_high\[4\]
+ gpio_defaults_block_7/gpio_defaults_high\[5\]
+ gpio_defaults_block_7/gpio_defaults_high\[6\]
+ gpio_defaults_block_7/gpio_defaults_high\[7\]
+ gpio_defaults_block_7/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[9\]
+ gpio_defaults_block_4/gpio_defaults_low\[1\]
+ gpio_defaults_block_4/gpio_defaults_high\[2\]
+ gpio_defaults_block_4/gpio_defaults_high\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[4\]
+ gpio_defaults_block_4/gpio_defaults_high\[5\]
+ gpio_defaults_block_4/gpio_defaults_high\[6\]
+ gpio_defaults_block_4/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[0\]
+ gpio_defaults_block_5/gpio_defaults_low\[10\]
+ gpio_defaults_block_5/gpio_defaults_high\[11\]
+ gpio_defaults_block_5/gpio_defaults_high\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[1\]
+ gpio_defaults_block_5/gpio_defaults_high\[2\]
+ gpio_defaults_block_5/gpio_defaults_high\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[4\]
+ gpio_defaults_block_5/gpio_defaults_high\[5\]
+ gpio_defaults_block_5/gpio_defaults_high\[6\]
+ gpio_defaults_block_5/gpio_defaults_high\[7\]
+ gpio_defaults_block_5/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[0\]
+ gpio_defaults_block_6/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[11\]
+ gpio_defaults_block_8/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[0\]
+ gpio_defaults_block_9/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[0\]
+ gpio_defaults_block_8/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[12\]
+ gpio_defaults_block_8/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[2\]
+ gpio_defaults_block_8/gpio_defaults_high\[3\]
+ gpio_defaults_block_8/gpio_defaults_high\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[5\]
+ gpio_defaults_block_8/gpio_defaults_high\[6\]
+ gpio_defaults_block_8/gpio_defaults_high\[7\]
+ gpio_defaults_block_8/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[10\]
+ gpio_defaults_block_9/gpio_defaults_high\[11\]
+ gpio_defaults_block_9/gpio_defaults_high\[12\]
+ gpio_defaults_block_9/gpio_defaults_high\[2\]
+ gpio_defaults_block_9/gpio_defaults_high\[3\]
+ gpio_defaults_block_9/gpio_defaults_high\[4\]
+ gpio_defaults_block_9/gpio_defaults_high\[5\]
+ gpio_defaults_block_9/gpio_defaults_high\[6\]
+ gpio_defaults_block_9/gpio_defaults_high\[7\]
+ gpio_defaults_block_9/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[9\]
+ padframe/flash_io1_di_core
+ padframe/clock_core
+ padframe/mprj_analog_io[6]
+ padframe/gpio_in_core
+ padframe/flash_io1
+ padframe/mprj_analog_io[27]
+ padframe/mprj_analog_io[28]
+ padframe/mprj_analog_io[24]
+ padframe/mprj_analog_io[25]
+ padframe/mprj_analog_io[5]
+ padframe/mprj_analog_io[8]
+ padframe/mprj_analog_io[12]
+ padframe/mprj_analog_io[11]
+ padframe/mprj_analog_io[10]
+ padframe/mprj_analog_io[14]
+ padframe/mprj_analog_io[16]
+ padframe/mprj_analog_io[15]
+ padframe/mprj_analog_io[17]
+ padframe/mprj_analog_io[19]
+ padframe/mprj_analog_io[21]
+ padframe/mprj_analog_io[22]
+ padframe/mprj_analog_io[23]
+ padframe/mprj_io[28]
+ padframe/gpio
+ padframe/mprj_io[34]
+ padframe/flash_csb
+ padframe/mprj_analog_io[18]
+ padframe/mprj_analog_io[13]
+ padframe/mprj_io[8]
+ padframe/mprj_io[10]
+ padframe/mprj_io[21]
+ padframe/mprj_io[22]
+ padframe/clock
+ padframe/mprj_io[25]
+ padframe/mprj_analog_io[2]
+ padframe/mprj_io[17]
+ mprj/mprj/p[5]
+ padframe/mprj_io[0]
+ mprj/mprj/p[7]
+ mprj/mprj/p[6]
+ mprj/mprj/p[4]
+ padframe/mprj_io[9]
+ padframe/mprj_io[11]
+ padframe/mprj_io[33]
+ mgmt_buffers/mprj2_logic_high_inst/HI
+ mgmt_buffers/mprj_logic_high_inst/HI[462]
+ mgmt_buffers/mprj_logic_high_inst/HI[461]
+ mgmt_buffers/mprj_logic_high_inst/HI[460]
+ mgmt_buffers/mprj_logic_high_inst/HI[459]
+ mgmt_buffers/mprj_logic_high_inst/HI[458]
+ mgmt_buffers/mprj_logic_high_inst/HI[457]
+ mgmt_buffers/mprj_logic_high_inst/HI[456]
+ mgmt_buffers/mprj_logic_high_inst/HI[455]
+ mgmt_buffers/mprj_logic_high_inst/HI[454]
+ mgmt_buffers/mprj_logic_high_inst/HI[453]
+ mgmt_buffers/mprj_logic_high_inst/HI[452]
+ mgmt_buffers/mprj_logic_high_inst/HI[451]
+ mgmt_buffers/mprj_logic_high_inst/HI[450]
+ mgmt_buffers/mprj_logic_high_inst/HI[449]
+ mgmt_buffers/mprj_logic_high_inst/HI[448]
+ mgmt_buffers/mprj_logic_high_inst/HI[447]
+ mgmt_buffers/mprj_logic_high_inst/HI[446]
+ mgmt_buffers/mprj_logic_high_inst/HI[445]
+ mgmt_buffers/mprj_logic_high_inst/HI[444]
+ padframe/mprj_io[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[443]
+ mgmt_buffers/mprj_logic_high_inst/HI[442]
+ mgmt_buffers/mprj_logic_high_inst/HI[441]
+ mgmt_buffers/mprj_logic_high_inst/HI[440]
+ mgmt_buffers/mprj_logic_high_inst/HI[439]
+ mgmt_buffers/mprj_logic_high_inst/HI[438]
+ mgmt_buffers/mprj_logic_high_inst/HI[437]
+ mgmt_buffers/mprj_logic_high_inst/HI[436]
+ mgmt_buffers/mprj_logic_high_inst/HI[435]
+ mgmt_buffers/mprj_logic_high_inst/HI[434]
+ mgmt_buffers/mprj_logic_high_inst/HI[433]
+ mgmt_buffers/mprj_logic_high_inst/HI[432]
+ mgmt_buffers/mprj_logic_high_inst/HI[431]
+ mgmt_buffers/mprj_logic_high_inst/HI[430]
+ mgmt_buffers/mprj_logic_high_inst/HI[429]
+ mgmt_buffers/mprj_logic_high_inst/HI[428]
+ mgmt_buffers/mprj_logic_high_inst/HI[427]
+ mgmt_buffers/mprj_logic_high_inst/HI[426]
+ padframe/mprj_io[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[425]
+ mgmt_buffers/mprj_logic_high_inst/HI[424]
+ mgmt_buffers/mprj_logic_high_inst/HI[423]
+ mgmt_buffers/mprj_logic_high_inst/HI[422]
+ mgmt_buffers/mprj_logic_high_inst/HI[421]
+ mgmt_buffers/mprj_logic_high_inst/HI[420]
+ mgmt_buffers/mprj_logic_high_inst/HI[419]
+ mgmt_buffers/mprj_logic_high_inst/HI[418]
+ mgmt_buffers/mprj_logic_high_inst/HI[417]
+ mgmt_buffers/mprj_logic_high_inst/HI[416]
+ mgmt_buffers/mprj_logic_high_inst/HI[415]
+ mgmt_buffers/mprj_logic_high_inst/HI[414]
+ mgmt_buffers/mprj_logic_high_inst/HI[413]
+ mgmt_buffers/mprj_logic_high_inst/HI[412]
+ mgmt_buffers/mprj_logic_high_inst/HI[411]
+ mgmt_buffers/mprj_logic_high_inst/HI[410]
+ mgmt_buffers/mprj_logic_high_inst/HI[409]
+ mgmt_buffers/mprj_logic_high_inst/HI[408]
+ mgmt_buffers/mprj_logic_high_inst/HI[407]
+ mgmt_buffers/mprj_logic_high_inst/HI[406]
+ mgmt_buffers/mprj_logic_high_inst/HI[405]
+ mgmt_buffers/mprj_logic_high_inst/HI[404]
+ mgmt_buffers/mprj_logic_high_inst/HI[403]
+ mgmt_buffers/mprj_logic_high_inst/HI[402]
+ mgmt_buffers/mprj_logic_high_inst/HI[401]
+ mgmt_buffers/mprj_logic_high_inst/HI[400]
+ mgmt_buffers/mprj_logic_high_inst/HI[399]
+ mgmt_buffers/mprj_logic_high_inst/HI[398]
+ mgmt_buffers/mprj_logic_high_inst/HI[397]
+ mgmt_buffers/mprj_logic_high_inst/HI[396]
+ mgmt_buffers/mprj_logic_high_inst/HI[395]
+ mgmt_buffers/mprj_logic_high_inst/HI[394]
+ mgmt_buffers/mprj_logic_high_inst/HI[393]
+ mgmt_buffers/mprj_logic_high_inst/HI[392]
+ mgmt_buffers/mprj_logic_high_inst/HI[391]
+ mgmt_buffers/mprj_logic_high_inst/HI[390]
+ mgmt_buffers/mprj_logic_high_inst/HI[389]
+ mgmt_buffers/mprj_logic_high_inst/HI[388]
+ mgmt_buffers/mprj_logic_high_inst/HI[387]
+ mgmt_buffers/mprj_logic_high_inst/HI[386]
+ mgmt_buffers/mprj_logic_high_inst/HI[385]
+ mgmt_buffers/mprj_logic_high_inst/HI[384]
+ mgmt_buffers/mprj_logic_high_inst/HI[383]
+ mgmt_buffers/mprj_logic_high_inst/HI[382]
+ mgmt_buffers/mprj_logic_high_inst/HI[381]
+ mgmt_buffers/mprj_logic_high_inst/HI[380]
+ mgmt_buffers/mprj_logic_high_inst/HI[379]
+ mgmt_buffers/mprj_logic_high_inst/HI[378]
+ mgmt_buffers/mprj_logic_high_inst/HI[377]
+ mgmt_buffers/mprj_logic_high_inst/HI[376]
+ mgmt_buffers/mprj_logic_high_inst/HI[375]
+ mgmt_buffers/mprj_logic_high_inst/HI[374]
+ mgmt_buffers/mprj_logic_high_inst/HI[373]
+ mgmt_buffers/mprj_logic_high_inst/HI[372]
+ mgmt_buffers/mprj_logic_high_inst/HI[371]
+ mgmt_buffers/mprj_logic_high_inst/HI[370]
+ mgmt_buffers/mprj_logic_high_inst/HI[369]
+ mgmt_buffers/mprj_logic_high_inst/HI[368]
+ mgmt_buffers/mprj_logic_high_inst/HI[367]
+ mgmt_buffers/mprj_logic_high_inst/HI[366]
+ mgmt_buffers/mprj_logic_high_inst/HI[365]
+ mgmt_buffers/mprj_logic_high_inst/HI[364]
+ mgmt_buffers/mprj_logic_high_inst/HI[363]
+ padframe/mprj_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[362]
+ mgmt_buffers/mprj_logic_high_inst/HI[361]
+ mgmt_buffers/mprj_logic_high_inst/HI[360]
+ mgmt_buffers/mprj_logic_high_inst/HI[359]
+ mgmt_buffers/mprj_logic_high_inst/HI[358]
+ mgmt_buffers/mprj_logic_high_inst/HI[357]
+ mgmt_buffers/mprj_logic_high_inst/HI[356]
+ mgmt_buffers/mprj_logic_high_inst/HI[355]
+ mgmt_buffers/mprj_logic_high_inst/HI[354]
+ mgmt_buffers/mprj_logic_high_inst/HI[353]
+ mgmt_buffers/mprj_logic_high_inst/HI[352]
+ mgmt_buffers/mprj_logic_high_inst/HI[351]
+ mgmt_buffers/mprj_logic_high_inst/HI[350]
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+ padframe/mprj_io[18]
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+ padframe/mprj_analog_io[4]
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+ padframe/mprj_analog_io[1]
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+ padframe/mprj_analog_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[15]
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+ mgmt_buffers/mprj_logic_high_inst/HI[6]
+ mgmt_buffers/mprj_logic_high_inst/HI[5]
+ mgmt_buffers/mprj_logic_high_inst/HI[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[2]
+ mgmt_buffers/mprj_logic_high_inst/HI[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[0]
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1
+ mgmt_buffers/powergood_check/mprj_vdd_logic1
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1_h
+ mgmt_buffers/powergood_check/mprj_vdd_logic1_h
+ padframe/mprj_io[35]
+ mprj/mprj/p[3]
+ mprj/mprj/p[2]
+ mprj/mprj/p[1]
+ mprj/mprj/p[0]
+ padframe/mprj_io[30]
+ padframe/mprj_io[14]
+ padframe/mprj_io[13]
+ padframe/mprj_io[12]
+ padframe/mprj_io[19]
+ padframe/mprj_analog_io[0]
+ padframe/mprj_io[36]
+ padframe/mprj_io[32]
+ padframe/mprj_io[29]
+ padframe/mprj_io[31]
+ padframe/mprj_io[15]
+ padframe/mprj_io[16]
+ padframe/mprj_io[1]
+ padframe/mprj_io[2]
+ padframe/mprj_io[3]
+ padframe/mprj_io[4]
+ padframe/mprj_io[5]
+ padframe/mprj_io[6]
+ padframe/mprj_io[7]
+ padframe/resetb
+ padframe/resetb_core_h
+ padframe/vccd1_pad
+ padframe/vccd2_pad
+ padframe/vccd_pad
+ padframe/vdda1_pad
+ padframe/vdda1_pad2
+ padframe/vdda2_pad
+ padframe/vdda_pad
+ padframe/vddio_pad
+ padframe/vddio_pad2
+ padframe/vssa1_pad
+ padframe/vssa1_pad2
+ padframe/vssa2_pad
+ padframe/vssa_pad
+ padframe/vssd1_pad
+ padframe/vssd2_pad
+ padframe/vssd_pad
+ padframe/vssio_pad
+ padframe/vssio_pad2
+ padframe/mprj_pads.analog_a
+ padframe/mprj_pads.analog_b
+ padframe/loop_zero_clock
+ padframe/loop_one_clock
+ padframe/loop_zero_flash_clk
+ padframe/loop_one_flash_clk
+ padframe/loop_zero_flash_csb
+ padframe/loop_one_flash_csb
+ padframe/loop_zero_flash_io0
+ padframe/loop_one_flash_io0
+ padframe/loop_zero_flash_io1
+ padframe/loop_one_flash_io1
+ padframe/loop_zero_gpio
+ padframe/loop_one_gpio
+ padframe/mprj_pads.loop0_io\[0\]
+ padframe/mprj_pads.loop1_io\[0\]
+ padframe/mprj_pads.io_in\[0\]
+ padframe/mprj_pads.io_in_3v3\[0\]
+ padframe/mprj_pads.no_connect_1b\[0\]
+ padframe/mprj_pads.no_connect_1a\[0\]
+ padframe/mprj_pads.loop0_io\[10\]
+ padframe/mprj_pads.loop1_io\[10\]
+ padframe/mprj_pads.io_in\[10\]
+ padframe/mprj_pads.io_in_3v3\[10\]
+ padframe/mprj_pads.analog_noesd_io\[3\]
+ padframe/mprj_pads.loop0_io\[11\]
+ padframe/mprj_pads.loop1_io\[11\]
+ padframe/mprj_pads.io_in\[11\]
+ padframe/mprj_pads.io_in_3v3\[11\]
+ padframe/mprj_pads.analog_noesd_io\[4\]
+ padframe/mprj_pads.loop0_io\[12\]
+ padframe/mprj_pads.loop1_io\[12\]
+ padframe/mprj_pads.io_in\[12\]
+ padframe/mprj_pads.io_in_3v3\[12\]
+ padframe/mprj_pads.analog_noesd_io\[5\]
+ padframe/mprj_pads.loop0_io\[13\]
+ padframe/mprj_pads.loop1_io\[13\]
+ padframe/mprj_pads.io_in\[13\]
+ padframe/mprj_pads.io_in_3v3\[13\]
+ padframe/mprj_pads.analog_noesd_io\[6\]
+ padframe/mprj_pads.loop0_io\[14\]
+ padframe/mprj_pads.loop1_io\[14\]
+ padframe/mprj_pads.io_in\[14\]
+ padframe/mprj_pads.io_in_3v3\[14\]
+ padframe/mprj_pads.analog_noesd_io\[7\]
+ padframe/mprj_pads.loop0_io\[15\]
+ padframe/mprj_pads.loop1_io\[15\]
+ padframe/mprj_pads.io_in\[15\]
+ padframe/mprj_pads.io_in_3v3\[15\]
+ padframe/mprj_pads.analog_noesd_io\[8\]
+ padframe/mprj_pads.loop0_io\[16\]
+ padframe/mprj_pads.loop1_io\[16\]
+ padframe/mprj_pads.io_in\[16\]
+ padframe/mprj_pads.io_in_3v3\[16\]
+ padframe/mprj_pads.analog_noesd_io\[9\]
+ padframe/mprj_pads.loop0_io\[17\]
+ padframe/mprj_pads.loop1_io\[17\]
+ padframe/mprj_pads.io_in\[17\]
+ padframe/mprj_pads.io_in_3v3\[17\]
+ padframe/mprj_pads.analog_noesd_io\[10\]
+ padframe/mprj_pads.loop0_io\[18\]
+ padframe/mprj_pads.loop1_io\[18\]
+ padframe/mprj_pads.io_in\[18\]
+ padframe/mprj_pads.io_in_3v3\[18\]
+ padframe/mprj_pads.analog_noesd_io\[11\]
+ padframe/mprj_pads.loop0_io\[1\]
+ padframe/mprj_pads.loop1_io\[1\]
+ padframe/mprj_pads.io_in\[1\]
+ padframe/mprj_pads.io_in_3v3\[1\]
+ padframe/mprj_pads.no_connect_1b\[1\]
+ padframe/mprj_pads.no_connect_1a\[1\]
+ padframe/mprj_pads.loop0_io\[2\]
+ padframe/mprj_pads.loop1_io\[2\]
+ padframe/mprj_pads.io_in\[2\]
+ padframe/mprj_pads.io_in_3v3\[2\]
+ padframe/mprj_pads.no_connect_1b\[2\]
+ padframe/mprj_pads.no_connect_1a\[2\]
+ padframe/mprj_pads.loop0_io\[3\]
+ padframe/mprj_pads.loop1_io\[3\]
+ padframe/mprj_pads.io_in\[3\]
+ padframe/mprj_pads.io_in_3v3\[3\]
+ padframe/mprj_pads.no_connect_1b\[3\]
+ padframe/mprj_pads.no_connect_1a\[3\]
+ padframe/mprj_pads.loop0_io\[4\]
+ padframe/mprj_pads.loop1_io\[4\]
+ padframe/mprj_pads.io_in\[4\]
+ padframe/mprj_pads.io_in_3v3\[4\]
+ padframe/mprj_pads.no_connect_1b\[4\]
+ padframe/mprj_pads.no_connect_1a\[4\]
+ padframe/mprj_pads.loop0_io\[5\]
+ padframe/mprj_pads.loop1_io\[5\]
+ padframe/mprj_pads.io_in\[5\]
+ padframe/mprj_pads.io_in_3v3\[5\]
+ padframe/mprj_pads.no_connect_1b\[5\]
+ padframe/mprj_pads.no_connect_1a\[5\]
+ padframe/mprj_pads.loop0_io\[6\]
+ padframe/mprj_pads.loop1_io\[6\]
+ padframe/mprj_pads.io_in\[6\]
+ padframe/mprj_pads.io_in_3v3\[6\]
+ padframe/mprj_pads.no_connect_1b\[6\]
+ padframe/mprj_pads.no_connect_1a\[6\]
+ padframe/mprj_pads.loop0_io\[7\]
+ padframe/mprj_pads.loop1_io\[7\]
+ padframe/mprj_pads.io_in\[7\]
+ padframe/mprj_pads.io_in_3v3\[7\]
+ padframe/mprj_pads.analog_noesd_io\[0\]
+ padframe/mprj_pads.loop0_io\[8\]
+ padframe/mprj_pads.loop1_io\[8\]
+ padframe/mprj_pads.io_in\[8\]
+ padframe/mprj_pads.io_in_3v3\[8\]
+ padframe/mprj_pads.analog_noesd_io\[1\]
+ padframe/mprj_pads.loop0_io\[9\]
+ padframe/mprj_pads.loop1_io\[9\]
+ padframe/mprj_pads.io_in\[9\]
+ padframe/mprj_pads.io_in_3v3\[9\]
+ padframe/mprj_pads.analog_noesd_io\[2\]
+ padframe/mprj_pads.loop0_io\[19\]
+ padframe/mprj_pads.loop1_io\[19\]
+ padframe/mprj_pads.io_in\[19\]
+ padframe/mprj_pads.io_in_3v3\[19\]
+ padframe/mprj_pads.analog_noesd_io\[12\]
+ padframe/mprj_pads.loop0_io\[29\]
+ padframe/mprj_pads.loop1_io\[29\]
+ padframe/mprj_pads.io_in\[29\]
+ padframe/mprj_pads.io_in_3v3\[29\]
+ padframe/mprj_pads.analog_noesd_io\[22\]
+ padframe/mprj_pads.loop0_io\[30\]
+ padframe/mprj_pads.loop1_io\[30\]
+ padframe/mprj_pads.io_in\[30\]
+ padframe/mprj_pads.io_in_3v3\[30\]
+ padframe/mprj_pads.analog_noesd_io\[23\]
+ padframe/mprj_pads.loop0_io\[31\]
+ padframe/mprj_pads.loop1_io\[31\]
+ padframe/mprj_pads.io_in\[31\]
+ padframe/mprj_pads.io_in_3v3\[31\]
+ padframe/mprj_pads.analog_noesd_io\[24\]
+ padframe/mprj_pads.loop0_io\[32\]
+ padframe/mprj_pads.loop1_io\[32\]
+ padframe/mprj_pads.io_in\[32\]
+ padframe/mprj_pads.io_in_3v3\[32\]
+ padframe/mprj_pads.analog_noesd_io\[25\]
+ padframe/mprj_pads.loop0_io\[33\]
+ padframe/mprj_pads.loop1_io\[33\]
+ padframe/mprj_pads.io_in\[33\]
+ padframe/mprj_pads.io_in_3v3\[33\]
+ padframe/mprj_pads.analog_noesd_io\[26\]
+ padframe/mprj_pads.loop0_io\[34\]
+ padframe/mprj_pads.loop1_io\[34\]
+ padframe/mprj_pads.io_in\[34\]
+ padframe/mprj_pads.io_in_3v3\[34\]
+ padframe/mprj_pads.analog_noesd_io\[27\]
+ padframe/mprj_pads.loop0_io\[35\]
+ padframe/mprj_pads.loop1_io\[35\]
+ padframe/mprj_pads.io_in\[35\]
+ padframe/mprj_pads.io_in_3v3\[35\]
+ padframe/mprj_pads.analog_noesd_io\[28\]
+ padframe/mprj_pads.loop0_io\[36\]
+ padframe/mprj_pads.loop1_io\[36\]
+ padframe/mprj_pads.io_in\[36\]
+ padframe/mprj_pads.io_in_3v3\[36\]
+ padframe/mprj_pads.no_connect_2b\[0\]
+ padframe/mprj_pads.no_connect_2a\[0\]
+ padframe/mprj_pads.loop0_io\[37\]
+ padframe/mprj_pads.loop1_io\[37\]
+ padframe/mprj_pads.io_in\[37\]
+ padframe/mprj_pads.io_in_3v3\[37\]
+ padframe/mprj_pads.no_connect_2b\[1\]
+ padframe/mprj_pads.no_connect_2a\[1\]
+ padframe/mprj_pads.loop0_io\[20\]
+ padframe/mprj_pads.loop1_io\[20\]
+ padframe/mprj_pads.io_in\[20\]
+ padframe/mprj_pads.io_in_3v3\[20\]
+ padframe/mprj_pads.analog_noesd_io\[13\]
+ padframe/mprj_pads.loop0_io\[21\]
+ padframe/mprj_pads.loop1_io\[21\]
+ padframe/mprj_pads.io_in\[21\]
+ padframe/mprj_pads.io_in_3v3\[21\]
+ padframe/mprj_pads.analog_noesd_io\[14\]
+ padframe/mprj_pads.loop0_io\[22\]
+ padframe/mprj_pads.loop1_io\[22\]
+ padframe/mprj_pads.io_in\[22\]
+ padframe/mprj_pads.io_in_3v3\[22\]
+ padframe/mprj_pads.analog_noesd_io\[15\]
+ padframe/mprj_pads.loop0_io\[23\]
+ padframe/mprj_pads.loop1_io\[23\]
+ padframe/mprj_pads.io_in\[23\]
+ padframe/mprj_pads.io_in_3v3\[23\]
+ padframe/mprj_pads.analog_noesd_io\[16\]
+ padframe/mprj_pads.loop0_io\[24\]
+ padframe/mprj_pads.loop1_io\[24\]
+ padframe/mprj_pads.io_in\[24\]
+ padframe/mprj_pads.io_in_3v3\[24\]
+ padframe/mprj_pads.analog_noesd_io\[17\]
+ padframe/mprj_pads.loop0_io\[25\]
+ padframe/mprj_pads.loop1_io\[25\]
+ padframe/mprj_pads.io_in\[25\]
+ padframe/mprj_pads.io_in_3v3\[25\]
+ padframe/mprj_pads.analog_noesd_io\[18\]
+ padframe/mprj_pads.loop0_io\[26\]
+ padframe/mprj_pads.loop1_io\[26\]
+ padframe/mprj_pads.io_in\[26\]
+ padframe/mprj_pads.io_in_3v3\[26\]
+ padframe/mprj_pads.analog_noesd_io\[19\]
+ padframe/mprj_pads.loop0_io\[27\]
+ padframe/mprj_pads.loop1_io\[27\]
+ padframe/mprj_pads.io_in\[27\]
+ padframe/mprj_pads.io_in_3v3\[27\]
+ padframe/mprj_pads.analog_noesd_io\[20\]
+ padframe/mprj_pads.loop0_io\[28\]
+ padframe/mprj_pads.loop1_io\[28\]
+ padframe/mprj_pads.io_in\[28\]
+ padframe/mprj_pads.io_in_3v3\[28\]
+ padframe/mprj_pads.analog_noesd_io\[21\]
+ padframe/xres_vss_loop
+ padframe/xresloop
+ sigbuf/buf_out\[0\]
+ sigbuf/buf_out\[100\]
+ sigbuf/buf_in\[102\]
+ sigbuf/buf_out\[102\]
+ sigbuf/buf_in\[104\]
+ sigbuf/buf_out\[104\]
+ sigbuf/buf_in\[106\]
+ sigbuf/buf_in\[107\]
+ sigbuf/buf_out\[107\]
+ sigbuf/buf_in\[109\]
+ sigbuf/buf_in\[110\]
+ sigbuf/buf_in\[11\]
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+ sigbuf/buf_in\[112\]
+ sigbuf/buf_in\[113\]
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+ sigbuf/buf_in\[115\]
+ sigbuf/buf_in\[116\]
+ sigbuf/buf_in\[117\]
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+ sigbuf/buf_in\[119\]
+ sigbuf/buf_in\[120\]
+ sigbuf/buf_in\[12\]
+ sigbuf/buf_in\[121\]
+ sigbuf/buf_in\[122\]
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+ sigbuf/buf_in\[125\]
+ sigbuf/buf_in\[126\]
+ sigbuf/buf_in\[127\]
+ sigbuf/buf_in\[128\]
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+ sigbuf/buf_out\[12\]
+ sigbuf/buf_in\[131\]
+ sigbuf/buf_in\[132\]
+ sigbuf/buf_in\[133\]
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+ sigbuf/buf_in\[138\]
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+ sigbuf/buf_out\[98\]
+ sigbuf/buf_out\[99\]
+ sigbuf/buf_out\[9\]
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+ user_id_value/user_proj_id_high\[10\]
+ user_id_value/user_proj_id_high\[11\]
+ user_id_value/user_proj_id_high\[12\]
+ user_id_value/user_proj_id_high\[13\]
+ user_id_value/user_proj_id_high\[14\]
+ user_id_value/user_proj_id_high\[15\]
+ user_id_value/user_proj_id_high\[16\]
+ user_id_value/user_proj_id_high\[17\]
+ user_id_value/user_proj_id_high\[18\]
+ user_id_value/user_proj_id_high\[19\]
+ user_id_value/user_proj_id_high\[1\]
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+ user_id_value/user_proj_id_high\[21\]
+ user_id_value/user_proj_id_high\[22\]
+ user_id_value/user_proj_id_high\[23\]
+ user_id_value/user_proj_id_high\[24\]
+ user_id_value/user_proj_id_high\[25\]
+ user_id_value/user_proj_id_high\[26\]
+ user_id_value/user_proj_id_high\[27\]
+ user_id_value/user_proj_id_high\[28\]
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+ user_id_value/user_proj_id_high\[2\]
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+ user_id_value/user_proj_id_high\[31\]
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+ user_id_value/user_proj_id_high\[4\]
+ user_id_value/user_proj_id_high\[5\]
+ user_id_value/user_proj_id_high\[6\]
+ user_id_value/user_proj_id_high\[7\]
+ user_id_value/user_proj_id_high\[8\]
+ user_id_value/user_proj_id_high\[9\]
+ spare_logic\[0\]/spare_logic1\[0\]
+ spare_logic\[0\]/spare_logic1\[10\]
+ spare_logic\[0\]/spare_logic1\[11\]
+ spare_logic\[0\]/spare_logic1\[12\]
+ spare_logic\[0\]/spare_logic1\[13\]
+ spare_logic\[0\]/spare_logic1\[14\]
+ spare_logic\[0\]/spare_logic1\[15\]
+ spare_logic\[0\]/spare_logic1\[16\]
+ spare_logic\[0\]/spare_logic1\[17\]
+ spare_logic\[0\]/spare_logic1\[18\]
+ spare_logic\[0\]/spare_logic1\[19\]
+ spare_logic\[0\]/spare_logic1\[1\]
+ spare_logic\[0\]/spare_logic1\[20\]
+ spare_logic\[0\]/spare_logic1\[21\]
+ spare_logic\[0\]/spare_logic1\[22\]
+ spare_logic\[0\]/spare_logic1\[23\]
+ spare_logic\[0\]/spare_logic1\[24\]
+ spare_logic\[0\]/spare_logic1\[25\]
+ spare_logic\[0\]/spare_logic1\[26\]
+ spare_logic\[0\]/spare_logic1\[2\]
+ spare_logic\[0\]/spare_logic1\[3\]
+ spare_logic\[0\]/spare_logic1\[4\]
+ spare_logic\[0\]/spare_logic1\[5\]
+ spare_logic\[0\]/spare_logic1\[6\]
+ spare_logic\[0\]/spare_logic1\[7\]
+ spare_logic\[0\]/spare_logic1\[8\]
+ spare_logic\[0\]/spare_logic1\[9\]
+ spare_logic\[1\]/spare_logic1\[0\]
+ spare_logic\[1\]/spare_logic1\[10\]
+ spare_logic\[1\]/spare_logic1\[11\]
+ spare_logic\[1\]/spare_logic1\[12\]
+ spare_logic\[1\]/spare_logic1\[13\]
+ spare_logic\[1\]/spare_logic1\[14\]
+ spare_logic\[1\]/spare_logic1\[15\]
+ spare_logic\[1\]/spare_logic1\[16\]
+ spare_logic\[1\]/spare_logic1\[17\]
+ spare_logic\[1\]/spare_logic1\[18\]
+ spare_logic\[1\]/spare_logic1\[19\]
+ spare_logic\[1\]/spare_logic1\[1\]
+ spare_logic\[1\]/spare_logic1\[20\]
+ spare_logic\[1\]/spare_logic1\[21\]
+ spare_logic\[1\]/spare_logic1\[22\]
+ spare_logic\[1\]/spare_logic1\[23\]
+ spare_logic\[1\]/spare_logic1\[24\]
+ spare_logic\[1\]/spare_logic1\[25\]
+ spare_logic\[1\]/spare_logic1\[26\]
+ spare_logic\[1\]/spare_logic1\[2\]
+ spare_logic\[1\]/spare_logic1\[3\]
+ spare_logic\[1\]/spare_logic1\[4\]
+ spare_logic\[1\]/spare_logic1\[5\]
+ spare_logic\[1\]/spare_logic1\[6\]
+ spare_logic\[1\]/spare_logic1\[7\]
+ spare_logic\[1\]/spare_logic1\[8\]
+ spare_logic\[1\]/spare_logic1\[9\]
+ spare_logic\[2\]/spare_logic1\[0\]
+ spare_logic\[2\]/spare_logic1\[10\]
+ spare_logic\[2\]/spare_logic1\[11\]
+ spare_logic\[2\]/spare_logic1\[12\]
+ spare_logic\[2\]/spare_logic1\[13\]
+ spare_logic\[2\]/spare_logic1\[14\]
+ spare_logic\[2\]/spare_logic1\[15\]
+ spare_logic\[2\]/spare_logic1\[16\]
+ spare_logic\[2\]/spare_logic1\[17\]
+ spare_logic\[2\]/spare_logic1\[18\]
+ spare_logic\[2\]/spare_logic1\[19\]
+ spare_logic\[2\]/spare_logic1\[1\]
+ spare_logic\[2\]/spare_logic1\[20\]
+ spare_logic\[2\]/spare_logic1\[21\]
+ spare_logic\[2\]/spare_logic1\[22\]
+ spare_logic\[2\]/spare_logic1\[23\]
+ spare_logic\[2\]/spare_logic1\[24\]
+ spare_logic\[2\]/spare_logic1\[25\]
+ spare_logic\[2\]/spare_logic1\[26\]
+ spare_logic\[2\]/spare_logic1\[2\]
+ spare_logic\[2\]/spare_logic1\[3\]
+ spare_logic\[2\]/spare_logic1\[4\]
+ spare_logic\[2\]/spare_logic1\[5\]
+ spare_logic\[2\]/spare_logic1\[6\]
+ spare_logic\[2\]/spare_logic1\[7\]
+ spare_logic\[2\]/spare_logic1\[8\]
+ spare_logic\[2\]/spare_logic1\[9\]
+ spare_logic\[3\]/spare_logic1\[0\]
+ spare_logic\[3\]/spare_logic1\[10\]
+ spare_logic\[3\]/spare_logic1\[11\]
+ spare_logic\[3\]/spare_logic1\[12\]
+ spare_logic\[3\]/spare_logic1\[13\]
+ spare_logic\[3\]/spare_logic1\[14\]
+ spare_logic\[3\]/spare_logic1\[15\]
+ spare_logic\[3\]/spare_logic1\[16\]
+ spare_logic\[3\]/spare_logic1\[17\]
+ spare_logic\[3\]/spare_logic1\[18\]
+ spare_logic\[3\]/spare_logic1\[19\]
+ spare_logic\[3\]/spare_logic1\[1\]
+ spare_logic\[3\]/spare_logic1\[20\]
+ spare_logic\[3\]/spare_logic1\[21\]
+ spare_logic\[3\]/spare_logic1\[22\]
+ spare_logic\[3\]/spare_logic1\[23\]
+ spare_logic\[3\]/spare_logic1\[24\]
+ spare_logic\[3\]/spare_logic1\[25\]
+ spare_logic\[3\]/spare_logic1\[26\]
+ spare_logic\[3\]/spare_logic1\[2\]
+ spare_logic\[3\]/spare_logic1\[3\]
+ spare_logic\[3\]/spare_logic1\[4\]
+ spare_logic\[3\]/spare_logic1\[5\]
+ spare_logic\[3\]/spare_logic1\[6\]
+ spare_logic\[3\]/spare_logic1\[7\]
+ spare_logic\[3\]/spare_logic1\[8\]
+ spare_logic\[3\]/spare_logic1\[9\]
+ user_id_value/mask_rev[31]
+ user_id_value/mask_rev[30]
+ user_id_value/mask_rev[29]
+ user_id_value/mask_rev[28]
+ user_id_value/mask_rev[27]
+ user_id_value/mask_rev[26]
+ user_id_value/mask_rev[25]
+ user_id_value/mask_rev[24]
+ user_id_value/mask_rev[23]
+ user_id_value/mask_rev[22]
+ user_id_value/mask_rev[21]
+ user_id_value/mask_rev[20]
+ user_id_value/mask_rev[19]
+ user_id_value/mask_rev[18]
+ user_id_value/mask_rev[17]
+ user_id_value/mask_rev[16]
+ user_id_value/mask_rev[15]
+ user_id_value/mask_rev[14]
+ user_id_value/mask_rev[13]
+ user_id_value/mask_rev[12]
+ user_id_value/mask_rev[11]
+ user_id_value/mask_rev[10]
+ user_id_value/mask_rev[9]
+ user_id_value/mask_rev[8]
+ user_id_value/mask_rev[7]
+ user_id_value/mask_rev[6]
+ user_id_value/mask_rev[5]
+ user_id_value/mask_rev[4]
+ user_id_value/mask_rev[3]
+ user_id_value/mask_rev[2]
+ user_id_value/mask_rev[1]
+ user_id_value/mask_rev[0]
+Found 655 partially unannotated nets.
+ flash_clkrst_buffers/out_s[7]
+  padframe/flash_clk_pad/OE_N
+ flash_clkrst_buffers/out_s[8]
+  padframe/flash_csb_pad/OUT
+ flash_clkrst_buffers/out_s[9]
+  padframe/flash_clk_pad/OUT
+ flash_clkrst_buffers/out_s[0]
+  padframe/flash_io1_pad/OUT
+ flash_clkrst_buffers/out_s[1]
+  padframe/flash_io0_pad/OUT
+ flash_clkrst_buffers/out_s[2]
+  padframe/flash_io1_pad/DM[2]
+  padframe/flash_io1_pad/DM[1]
+  padframe/flash_io1_pad/INP_DIS
+ flash_clkrst_buffers/out_s[3]
+  padframe/flash_io0_pad/DM[2]
+  padframe/flash_io0_pad/DM[1]
+  padframe/flash_io0_pad/INP_DIS
+ flash_clkrst_buffers/out_s[4]
+  padframe/flash_io1_pad/DM[0]
+  padframe/flash_io1_pad/OE_N
+ flash_clkrst_buffers/out_s[5]
+  padframe/flash_io0_pad/DM[0]
+  padframe/flash_io0_pad/OE_N
+ flash_clkrst_buffers/out_s[6]
+  padframe/flash_csb_pad/OE_N
+ gpio_control_bidir_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[0]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[1]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[2]
+ gpio_control_bidir_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[0\]/HLD_OVR
+ gpio_control_bidir_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[0\]/INP_DIS
+ gpio_control_bidir_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[0\]/OUT
+ gpio_control_bidir_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[0\]/OE_N
+ gpio_control_bidir_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/SLOW
+ gpio_control_bidir_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/VTRIP_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_EN
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_POL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_SEL
+ gpio_control_bidir_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[0]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[1]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[2]
+ gpio_control_bidir_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[1\]/HLD_OVR
+ gpio_control_bidir_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[1\]/INP_DIS
+ gpio_control_bidir_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[1\]/OUT
+ gpio_control_bidir_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[1\]/OE_N
+ gpio_control_bidir_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/SLOW
+ gpio_control_bidir_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/VTRIP_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_EN
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_POL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_SEL
+ gpio_control_bidir_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[0]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[1]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[2]
+ gpio_control_bidir_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[16\]/HLD_OVR
+ gpio_control_bidir_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_bidir_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[16\]/INP_DIS
+ gpio_control_bidir_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[16\]/OUT
+ gpio_control_bidir_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[16\]/OE_N
+ gpio_control_bidir_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/SLOW
+ gpio_control_bidir_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/VTRIP_SEL
+ gpio_control_bidir_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[89\]/A
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_EN
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_POL
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_SEL
+ gpio_control_bidir_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[0]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[1]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[2]
+ gpio_control_bidir_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[17\]/HLD_OVR
+ gpio_control_bidir_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_bidir_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[17\]/INP_DIS
+ gpio_control_bidir_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[17\]/OUT
+ gpio_control_bidir_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[17\]/OE_N
+ gpio_control_bidir_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/SLOW
+ gpio_control_bidir_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/VTRIP_SEL
+ gpio_control_bidir_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[91\]/A
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_EN
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_POL
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_SEL
+ gpio_control_bidir_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[0]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[1]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[2]
+ gpio_control_bidir_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[18\]/HLD_OVR
+ gpio_control_bidir_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_bidir_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[18\]/INP_DIS
+ gpio_control_bidir_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[18\]/OUT
+ gpio_control_bidir_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[18\]/OE_N
+ gpio_control_bidir_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/SLOW
+ gpio_control_bidir_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/VTRIP_SEL
+ gpio_control_bidir_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[93\]/A
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_EN
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_POL
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[0]
+ gpio_control_in_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[1]
+ gpio_control_in_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[2]
+ gpio_control_in_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[8\]/HLD_OVR
+ gpio_control_in_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[8\]/INP_DIS
+ gpio_control_in_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[8\]/OUT
+ gpio_control_in_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[8\]/OE_N
+ gpio_control_in_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/SLOW
+ gpio_control_in_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_1\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[1\]/A
+ gpio_control_in_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_1\[10\]/one
+  padframe/mprj_pads.area1_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_in_1\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[0]
+ gpio_control_in_1\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[1]
+ gpio_control_in_1\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[2]
+ gpio_control_in_1\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[18\]/HLD_OVR
+ gpio_control_in_1\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_in_1\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[18\]/INP_DIS
+ gpio_control_in_1\[10\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[18\]/OUT
+ gpio_control_in_1\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[18\]/OE_N
+ gpio_control_in_1\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/SLOW
+ gpio_control_in_1\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/VTRIP_SEL
+ gpio_control_in_1\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[19\]/A
+ gpio_control_in_1\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_EN
+ gpio_control_in_1\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_POL
+ gpio_control_in_1\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[0]
+ gpio_control_in_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[1]
+ gpio_control_in_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[2]
+ gpio_control_in_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[9\]/HLD_OVR
+ gpio_control_in_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[9\]/INP_DIS
+ gpio_control_in_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[9\]/OUT
+ gpio_control_in_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[9\]/OE_N
+ gpio_control_in_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/SLOW
+ gpio_control_in_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_1\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[2\]/A
+ gpio_control_in_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_SEL
+ gpio_control_in_1\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_1\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[0]
+ gpio_control_in_1\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[1]
+ gpio_control_in_1\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[2]
+ gpio_control_in_1\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[10\]/HLD_OVR
+ gpio_control_in_1\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_1\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[10\]/INP_DIS
+ gpio_control_in_1\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[10\]/OUT
+ gpio_control_in_1\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[10\]/OE_N
+ gpio_control_in_1\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/SLOW
+ gpio_control_in_1\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_1\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[3\]/A
+ gpio_control_in_1\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_1\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_1\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_1\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_1\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[0]
+ gpio_control_in_1\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[1]
+ gpio_control_in_1\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[2]
+ gpio_control_in_1\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[11\]/HLD_OVR
+ gpio_control_in_1\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_1\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[11\]/INP_DIS
+ gpio_control_in_1\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[11\]/OUT
+ gpio_control_in_1\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[11\]/OE_N
+ gpio_control_in_1\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/SLOW
+ gpio_control_in_1\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_1\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[4\]/A
+ gpio_control_in_1\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_1\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_1\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_1\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_1\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[0]
+ gpio_control_in_1\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[1]
+ gpio_control_in_1\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[2]
+ gpio_control_in_1\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[12\]/HLD_OVR
+ gpio_control_in_1\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_1\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[12\]/INP_DIS
+ gpio_control_in_1\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[12\]/OUT
+ gpio_control_in_1\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[12\]/OE_N
+ gpio_control_in_1\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/SLOW
+ gpio_control_in_1\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_1\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[5\]/A
+ gpio_control_in_1\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_1\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_1\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_1\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_1\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[0]
+ gpio_control_in_1\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[1]
+ gpio_control_in_1\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[2]
+ gpio_control_in_1\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[13\]/HLD_OVR
+ gpio_control_in_1\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_1\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[13\]/INP_DIS
+ gpio_control_in_1\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[13\]/OUT
+ gpio_control_in_1\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[13\]/OE_N
+ gpio_control_in_1\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/SLOW
+ gpio_control_in_1\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_1\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[6\]/A
+ gpio_control_in_1\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_1\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_1\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_1\[6\]/one
+  padframe/mprj_pads.area1_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_1\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[0]
+ gpio_control_in_1\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[1]
+ gpio_control_in_1\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[2]
+ gpio_control_in_1\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[14\]/HLD_OVR
+ gpio_control_in_1\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_1\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[14\]/INP_DIS
+ gpio_control_in_1\[6\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[14\]/OUT
+ gpio_control_in_1\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[14\]/OE_N
+ gpio_control_in_1\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/SLOW
+ gpio_control_in_1\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_1\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[8\]/A
+ gpio_control_in_1\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_1\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_1\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_1\[7\]/one
+  padframe/mprj_pads.area1_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_1\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[0]
+ gpio_control_in_1\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[1]
+ gpio_control_in_1\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[2]
+ gpio_control_in_1\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[15\]/HLD_OVR
+ gpio_control_in_1\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_1\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[15\]/INP_DIS
+ gpio_control_in_1\[7\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[15\]/OUT
+ gpio_control_in_1\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[15\]/OE_N
+ gpio_control_in_1\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/SLOW
+ gpio_control_in_1\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_1\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[10\]/A
+ gpio_control_in_1\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_1\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_1\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_1\[8\]/one
+  padframe/mprj_pads.area1_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_in_1\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[0]
+ gpio_control_in_1\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[1]
+ gpio_control_in_1\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[2]
+ gpio_control_in_1\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[16\]/HLD_OVR
+ gpio_control_in_1\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_in_1\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[16\]/INP_DIS
+ gpio_control_in_1\[8\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[16\]/OUT
+ gpio_control_in_1\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[16\]/OE_N
+ gpio_control_in_1\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/SLOW
+ gpio_control_in_1\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/VTRIP_SEL
+ gpio_control_in_1\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[13\]/A
+ gpio_control_in_1\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_EN
+ gpio_control_in_1\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_POL
+ gpio_control_in_1\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_SEL
+ gpio_control_in_1\[9\]/one
+  padframe/mprj_pads.area1_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_in_1\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[0]
+ gpio_control_in_1\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[1]
+ gpio_control_in_1\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[2]
+ gpio_control_in_1\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[17\]/HLD_OVR
+ gpio_control_in_1\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_in_1\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[17\]/INP_DIS
+ gpio_control_in_1\[9\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[17\]/OUT
+ gpio_control_in_1\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[17\]/OE_N
+ gpio_control_in_1\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/SLOW
+ gpio_control_in_1\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/VTRIP_SEL
+ gpio_control_in_1\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[16\]/A
+ gpio_control_in_1\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_EN
+ gpio_control_in_1\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_POL
+ gpio_control_in_1\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_SEL
+ gpio_control_in_1a\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_1a\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[0]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[1]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[2]
+ gpio_control_in_1a\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[2\]/HLD_OVR
+ gpio_control_in_1a\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[2\]/INP_DIS
+ gpio_control_in_1a\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[2\]/OUT
+ gpio_control_in_1a\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[2\]/OE_N
+ gpio_control_in_1a\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/SLOW
+ gpio_control_in_1a\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_1a\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_1a\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_1a\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[0]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[1]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[2]
+ gpio_control_in_1a\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[3\]/HLD_OVR
+ gpio_control_in_1a\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[3\]/INP_DIS
+ gpio_control_in_1a\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[3\]/OUT
+ gpio_control_in_1a\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[3\]/OE_N
+ gpio_control_in_1a\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/SLOW
+ gpio_control_in_1a\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_1a\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_1a\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_1a\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[0]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[1]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[2]
+ gpio_control_in_1a\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[4\]/HLD_OVR
+ gpio_control_in_1a\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[4\]/INP_DIS
+ gpio_control_in_1a\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[4\]/OUT
+ gpio_control_in_1a\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[4\]/OE_N
+ gpio_control_in_1a\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/SLOW
+ gpio_control_in_1a\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_1a\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_1a\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_1a\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[0]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[1]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[2]
+ gpio_control_in_1a\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[5\]/HLD_OVR
+ gpio_control_in_1a\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[5\]/INP_DIS
+ gpio_control_in_1a\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[5\]/OUT
+ gpio_control_in_1a\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[5\]/OE_N
+ gpio_control_in_1a\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/SLOW
+ gpio_control_in_1a\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_1a\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_1a\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_1a\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[0]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[1]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[2]
+ gpio_control_in_1a\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[6\]/HLD_OVR
+ gpio_control_in_1a\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[6\]/INP_DIS
+ gpio_control_in_1a\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[6\]/OUT
+ gpio_control_in_1a\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[6\]/OE_N
+ gpio_control_in_1a\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/SLOW
+ gpio_control_in_1a\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_1a\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_1a\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_1a\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[0]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[1]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[2]
+ gpio_control_in_1a\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[7\]/HLD_OVR
+ gpio_control_in_1a\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_1a\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[7\]/INP_DIS
+ gpio_control_in_1a\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[7\]/OUT
+ gpio_control_in_1a\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[7\]/OE_N
+ gpio_control_in_1a\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/SLOW
+ gpio_control_in_1a\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_1a\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[0\]/A
+ gpio_control_in_1a\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_1a\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_1a\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_in_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[0]
+ gpio_control_in_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[1]
+ gpio_control_in_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[2]
+ gpio_control_in_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[0\]/HLD_OVR
+ gpio_control_in_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_in_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[0\]/INP_DIS
+ gpio_control_in_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[0\]/OUT
+ gpio_control_in_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[0\]/OE_N
+ gpio_control_in_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/SLOW
+ gpio_control_in_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/VTRIP_SEL
+ gpio_control_in_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[23\]/A
+ gpio_control_in_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_EN
+ gpio_control_in_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_POL
+ gpio_control_in_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_SEL
+ gpio_control_in_2\[10\]/one
+  padframe/mprj_pads.area2_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_2\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[0]
+ gpio_control_in_2\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[1]
+ gpio_control_in_2\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[2]
+ gpio_control_in_2\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[10\]/HLD_OVR
+ gpio_control_in_2\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_2\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[10\]/INP_DIS
+ gpio_control_in_2\[10\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[10\]/OUT
+ gpio_control_in_2\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[10\]/OE_N
+ gpio_control_in_2\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/SLOW
+ gpio_control_in_2\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_2\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[71\]/A
+ gpio_control_in_2\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_2\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_2\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_2\[11\]/one
+  padframe/mprj_pads.area2_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_2\[11\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[0]
+ gpio_control_in_2\[11\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[1]
+ gpio_control_in_2\[11\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[2]
+ gpio_control_in_2\[11\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[11\]/HLD_OVR
+ gpio_control_in_2\[11\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_2\[11\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[11\]/INP_DIS
+ gpio_control_in_2\[11\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[11\]/OUT
+ gpio_control_in_2\[11\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[11\]/OE_N
+ gpio_control_in_2\[11\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/SLOW
+ gpio_control_in_2\[11\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_2\[11\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[75\]/A
+ gpio_control_in_2\[11\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_2\[11\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_2\[11\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_2\[12\]/one
+  padframe/mprj_pads.area2_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_2\[12\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[0]
+ gpio_control_in_2\[12\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[1]
+ gpio_control_in_2\[12\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[2]
+ gpio_control_in_2\[12\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[12\]/HLD_OVR
+ gpio_control_in_2\[12\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_2\[12\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[12\]/INP_DIS
+ gpio_control_in_2\[12\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[12\]/OUT
+ gpio_control_in_2\[12\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[12\]/OE_N
+ gpio_control_in_2\[12\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/SLOW
+ gpio_control_in_2\[12\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_2\[12\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[78\]/A
+ gpio_control_in_2\[12\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_2\[12\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_2\[12\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_2\[13\]/one
+  padframe/mprj_pads.area2_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_2\[13\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[0]
+ gpio_control_in_2\[13\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[1]
+ gpio_control_in_2\[13\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[2]
+ gpio_control_in_2\[13\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[13\]/HLD_OVR
+ gpio_control_in_2\[13\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_2\[13\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[13\]/INP_DIS
+ gpio_control_in_2\[13\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[13\]/OUT
+ gpio_control_in_2\[13\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[13\]/OE_N
+ gpio_control_in_2\[13\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/SLOW
+ gpio_control_in_2\[13\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_2\[13\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[81\]/A
+ gpio_control_in_2\[13\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_2\[13\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_2\[13\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_2\[14\]/one
+  padframe/mprj_pads.area2_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_2\[14\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[0]
+ gpio_control_in_2\[14\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[1]
+ gpio_control_in_2\[14\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[2]
+ gpio_control_in_2\[14\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[14\]/HLD_OVR
+ gpio_control_in_2\[14\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_2\[14\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[14\]/INP_DIS
+ gpio_control_in_2\[14\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[14\]/OUT
+ gpio_control_in_2\[14\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[14\]/OE_N
+ gpio_control_in_2\[14\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/SLOW
+ gpio_control_in_2\[14\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_2\[14\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[84\]/A
+ gpio_control_in_2\[14\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_2\[14\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_2\[14\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_2\[15\]/one
+  padframe/mprj_pads.area2_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_2\[15\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[0]
+ gpio_control_in_2\[15\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[1]
+ gpio_control_in_2\[15\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[2]
+ gpio_control_in_2\[15\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[15\]/HLD_OVR
+ gpio_control_in_2\[15\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_2\[15\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[15\]/INP_DIS
+ gpio_control_in_2\[15\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[15\]/OUT
+ gpio_control_in_2\[15\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[15\]/OE_N
+ gpio_control_in_2\[15\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/SLOW
+ gpio_control_in_2\[15\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_2\[15\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[87\]/A
+ gpio_control_in_2\[15\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_2\[15\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_2\[15\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_in_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[0]
+ gpio_control_in_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[1]
+ gpio_control_in_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[2]
+ gpio_control_in_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[1\]/HLD_OVR
+ gpio_control_in_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_in_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[1\]/INP_DIS
+ gpio_control_in_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[1\]/OUT
+ gpio_control_in_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[1\]/OE_N
+ gpio_control_in_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/SLOW
+ gpio_control_in_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/VTRIP_SEL
+ gpio_control_in_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[29\]/A
+ gpio_control_in_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_EN
+ gpio_control_in_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_POL
+ gpio_control_in_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_SEL
+ gpio_control_in_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[0]
+ gpio_control_in_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[1]
+ gpio_control_in_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[2]
+ gpio_control_in_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[2\]/HLD_OVR
+ gpio_control_in_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[2\]/INP_DIS
+ gpio_control_in_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[2\]/OUT
+ gpio_control_in_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[2\]/OE_N
+ gpio_control_in_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/SLOW
+ gpio_control_in_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[35\]/A
+ gpio_control_in_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_2\[3\]/one
+  padframe/mprj_pads.area2_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_2\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[0]
+ gpio_control_in_2\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[1]
+ gpio_control_in_2\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[2]
+ gpio_control_in_2\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[3\]/HLD_OVR
+ gpio_control_in_2\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_2\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[3\]/INP_DIS
+ gpio_control_in_2\[3\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[3\]/OUT
+ gpio_control_in_2\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[3\]/OE_N
+ gpio_control_in_2\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/SLOW
+ gpio_control_in_2\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_2\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[41\]/A
+ gpio_control_in_2\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_2\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_2\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_2\[4\]/one
+  padframe/mprj_pads.area2_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_2\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[0]
+ gpio_control_in_2\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[1]
+ gpio_control_in_2\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[2]
+ gpio_control_in_2\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[4\]/HLD_OVR
+ gpio_control_in_2\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_2\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[4\]/INP_DIS
+ gpio_control_in_2\[4\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[4\]/OUT
+ gpio_control_in_2\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[4\]/OE_N
+ gpio_control_in_2\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/SLOW
+ gpio_control_in_2\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_2\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[46\]/A
+ gpio_control_in_2\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_2\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_2\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_2\[5\]/one
+  padframe/mprj_pads.area2_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_2\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[0]
+ gpio_control_in_2\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[1]
+ gpio_control_in_2\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[2]
+ gpio_control_in_2\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[5\]/HLD_OVR
+ gpio_control_in_2\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_2\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[5\]/INP_DIS
+ gpio_control_in_2\[5\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[5\]/OUT
+ gpio_control_in_2\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[5\]/OE_N
+ gpio_control_in_2\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/SLOW
+ gpio_control_in_2\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_2\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[51\]/A
+ gpio_control_in_2\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_2\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_2\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_2\[6\]/one
+  padframe/mprj_pads.area2_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_2\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[0]
+ gpio_control_in_2\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[1]
+ gpio_control_in_2\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[2]
+ gpio_control_in_2\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[6\]/HLD_OVR
+ gpio_control_in_2\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_2\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[6\]/INP_DIS
+ gpio_control_in_2\[6\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[6\]/OUT
+ gpio_control_in_2\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[6\]/OE_N
+ gpio_control_in_2\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/SLOW
+ gpio_control_in_2\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_2\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[55\]/A
+ gpio_control_in_2\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_2\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_2\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_2\[7\]/one
+  padframe/mprj_pads.area2_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_2\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[0]
+ gpio_control_in_2\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[1]
+ gpio_control_in_2\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[2]
+ gpio_control_in_2\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[7\]/HLD_OVR
+ gpio_control_in_2\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_2\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[7\]/INP_DIS
+ gpio_control_in_2\[7\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[7\]/OUT
+ gpio_control_in_2\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[7\]/OE_N
+ gpio_control_in_2\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/SLOW
+ gpio_control_in_2\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_2\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[59\]/A
+ gpio_control_in_2\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_2\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_2\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[8\]/one
+  gpio_control_in_2\[8\]/ANTENNA_input1_A/DIODE
+  gpio_control_in_2\[8\]/input1/A
+  padframe/mprj_pads.area2_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_2\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[0]
+ gpio_control_in_2\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[1]
+ gpio_control_in_2\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[2]
+ gpio_control_in_2\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[8\]/HLD_OVR
+ gpio_control_in_2\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_2\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[8\]/INP_DIS
+ gpio_control_in_2\[8\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[8\]/OUT
+ gpio_control_in_2\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[8\]/OE_N
+ gpio_control_in_2\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/SLOW
+ gpio_control_in_2\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_2\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[63\]/A
+ gpio_control_in_2\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_2\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_2\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_2\[9\]/one
+  padframe/mprj_pads.area2_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_2\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[0]
+ gpio_control_in_2\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[1]
+ gpio_control_in_2\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[2]
+ gpio_control_in_2\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[9\]/HLD_OVR
+ gpio_control_in_2\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_2\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[9\]/INP_DIS
+ gpio_control_in_2\[9\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[9\]/OUT
+ gpio_control_in_2\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[9\]/OE_N
+ gpio_control_in_2\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/SLOW
+ gpio_control_in_2\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_2\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[67\]/A
+ gpio_control_in_2\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_2\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_2\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_SEL
+ gpio_defaults_block_22/gpio_defaults_low\[0\]
+  gpio_control_in_2\[3\]/ANTENNA__068__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__069__B/DIODE
+  gpio_control_in_2\[3\]/_068_/B
+  gpio_control_in_2\[3\]/_069_/B
+ gpio_defaults_block_22/gpio_defaults_high\[10\]
+  gpio_control_in_2\[3\]/ANTENNA__082__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__083__B/DIODE
+  gpio_control_in_2\[3\]/_082_/B
+  gpio_control_in_2\[3\]/_083_/B
+ gpio_defaults_block_22/gpio_defaults_low\[11\]
+  gpio_control_in_2\[3\]/ANTENNA__084__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__085__B/DIODE
+  gpio_control_in_2\[3\]/_084_/B
+  gpio_control_in_2\[3\]/_085_/B
+ gpio_defaults_block_22/gpio_defaults_low\[12\]
+  gpio_control_in_2\[3\]/ANTENNA__086__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__087__B/DIODE
+  gpio_control_in_2\[3\]/_086_/B
+  gpio_control_in_2\[3\]/_087_/B
+ gpio_defaults_block_22/gpio_defaults_high\[1\]
+  gpio_control_in_2\[3\]/ANTENNA__080__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__081__B/DIODE
+  gpio_control_in_2\[3\]/_080_/B
+  gpio_control_in_2\[3\]/_081_/B
+ gpio_defaults_block_22/gpio_defaults_low\[2\]
+  gpio_control_in_2\[3\]/ANTENNA__070__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__071__B/DIODE
+  gpio_control_in_2\[3\]/_070_/B
+  gpio_control_in_2\[3\]/_071_/B
+ gpio_defaults_block_22/gpio_defaults_low\[3\]
+  gpio_control_in_2\[3\]/ANTENNA__076__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__077__B/DIODE
+  gpio_control_in_2\[3\]/_076_/B
+  gpio_control_in_2\[3\]/_077_/B
+ gpio_defaults_block_22/gpio_defaults_low\[4\]
+  gpio_control_in_2\[3\]/ANTENNA__078__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__079__B/DIODE
+  gpio_control_in_2\[3\]/_078_/B
+  gpio_control_in_2\[3\]/_079_/B
+ gpio_defaults_block_22/gpio_defaults_low\[5\]
+  gpio_control_in_2\[3\]/ANTENNA__088__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__089__B/DIODE
+  gpio_control_in_2\[3\]/_088_/B
+  gpio_control_in_2\[3\]/_089_/B
+ gpio_defaults_block_22/gpio_defaults_low\[6\]
+  gpio_control_in_2\[3\]/ANTENNA__090__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__091__B/DIODE
+  gpio_control_in_2\[3\]/_090_/B
+  gpio_control_in_2\[3\]/_091_/B
+ gpio_defaults_block_22/gpio_defaults_low\[7\]
+  gpio_control_in_2\[3\]/ANTENNA__092__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__093__B/DIODE
+  gpio_control_in_2\[3\]/_092_/B
+  gpio_control_in_2\[3\]/_093_/B
+ gpio_defaults_block_22/gpio_defaults_low\[8\]
+  gpio_control_in_2\[3\]/ANTENNA__072__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__073__B/DIODE
+  gpio_control_in_2\[3\]/_072_/B
+  gpio_control_in_2\[3\]/_073_/B
+ gpio_defaults_block_22/gpio_defaults_low\[9\]
+  gpio_control_in_2\[3\]/ANTENNA__074__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__075__B/DIODE
+  gpio_control_in_2\[3\]/_074_/B
+  gpio_control_in_2\[3\]/_075_/B
+ housekeeping/mgmt_gpio_out[14]
+  sigbuf/signal_buffers\[103\]/A
+ housekeeping/mgmt_gpio_out[15]
+  sigbuf/signal_buffers\[105\]/A
+ housekeeping/mgmt_gpio_out[9]
+  sigbuf/signal_buffers\[97\]/A
+ housekeeping/mgmt_gpio_oeb[35]
+  sigbuf/signal_buffers\[190\]/A
+ housekeeping/mgmt_gpio_oeb[36]
+  sigbuf/signal_buffers\[192\]/A
+ housekeeping/mgmt_gpio_oeb[37]
+  sigbuf/signal_buffers\[194\]/A
+ housekeeping/mgmt_gpio_out[10]
+  sigbuf/signal_buffers\[98\]/A
+ housekeeping/mgmt_gpio_out[11]
+  sigbuf/signal_buffers\[99\]/A
+ housekeeping/mgmt_gpio_out[12]
+  sigbuf/signal_buffers\[100\]/A
+ housekeeping/mgmt_gpio_out[13]
+  sigbuf/signal_buffers\[101\]/A
+ housekeeping/mgmt_gpio_out[16]
+  sigbuf/signal_buffers\[108\]/A
+ housekeeping/mgmt_gpio_out[17]
+  sigbuf/signal_buffers\[111\]/A
+ housekeeping/mgmt_gpio_out[18]
+  sigbuf/signal_buffers\[114\]/A
+ housekeeping/mgmt_gpio_out[19]
+  sigbuf/signal_buffers\[118\]/A
+ housekeeping/mgmt_gpio_out[20]
+  sigbuf/signal_buffers\[124\]/A
+ housekeeping/mgmt_gpio_out[21]
+  sigbuf/signal_buffers\[130\]/A
+ housekeeping/mgmt_gpio_out[22]
+  sigbuf/signal_buffers\[136\]/A
+ housekeeping/mgmt_gpio_out[23]
+  sigbuf/signal_buffers\[141\]/A
+ housekeeping/mgmt_gpio_out[24]
+  sigbuf/signal_buffers\[146\]/A
+ housekeeping/mgmt_gpio_out[25]
+  sigbuf/signal_buffers\[150\]/A
+ housekeeping/mgmt_gpio_out[26]
+  sigbuf/signal_buffers\[154\]/A
+ housekeeping/mgmt_gpio_out[27]
+  sigbuf/signal_buffers\[158\]/A
+ housekeeping/mgmt_gpio_out[28]
+  sigbuf/signal_buffers\[162\]/A
+ housekeeping/mgmt_gpio_out[29]
+  sigbuf/signal_buffers\[166\]/A
+ housekeeping/mgmt_gpio_out[30]
+  sigbuf/signal_buffers\[170\]/A
+ housekeeping/mgmt_gpio_out[31]
+  sigbuf/signal_buffers\[173\]/A
+ housekeeping/mgmt_gpio_out[32]
+  sigbuf/signal_buffers\[176\]/A
+ housekeeping/mgmt_gpio_out[33]
+  sigbuf/signal_buffers\[179\]/A
+ housekeeping/mgmt_gpio_out[34]
+  sigbuf/signal_buffers\[182\]/A
+ housekeeping/mgmt_gpio_out[35]
+  sigbuf/signal_buffers\[184\]/A
+ housekeeping/mgmt_gpio_out[36]
+  sigbuf/signal_buffers\[186\]/A
+ housekeeping/mgmt_gpio_out[37]
+  sigbuf/signal_buffers\[188\]/A
+ housekeeping/mgmt_gpio_out[7]
+  sigbuf/signal_buffers\[95\]/A
+ housekeeping/mgmt_gpio_out[8]
+  sigbuf/signal_buffers\[96\]/A
+ mgmt_buffers/mprj_dat_o_user[0]
+  mprj/mprj/input1/A
+  mprj/mprj/ANTENNA_input1_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[10]
+  mprj/mprj/input11/A
+  mprj/mprj/ANTENNA_input11_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[11]
+  mprj/mprj/input12/A
+  mprj/mprj/ANTENNA_input12_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[12]
+  mprj/mprj/input13/A
+  mprj/mprj/ANTENNA_input13_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[13]
+  mprj/mprj/input14/A
+  mprj/mprj/ANTENNA_input14_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[14]
+  mprj/mprj/input15/A
+  mprj/mprj/ANTENNA_input15_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[15]
+  mprj/mprj/input16/A
+  mprj/mprj/ANTENNA_input16_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[1]
+  mprj/mprj/input2/A
+  mprj/mprj/ANTENNA_input2_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[2]
+  mprj/mprj/input3/A
+  mprj/mprj/ANTENNA_input3_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[3]
+  mprj/mprj/input4/A
+  mprj/mprj/ANTENNA_input4_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[4]
+  mprj/mprj/input5/A
+  mprj/mprj/ANTENNA_input5_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[5]
+  mprj/mprj/input6/A
+  mprj/mprj/ANTENNA_input6_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[6]
+  mprj/mprj/input7/A
+  mprj/mprj/ANTENNA_input7_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[7]
+  mprj/mprj/input8/A
+  mprj/mprj/ANTENNA_input8_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[8]
+  mprj/mprj/input9/A
+  mprj/mprj/ANTENNA_input9_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[9]
+  mprj/mprj/input10/A
+  mprj/mprj/ANTENNA_input10_A/DIODE
+ padframe/constant_value_inst\[0\]/one
+  padframe/clock_pad/DM[0]
+  padframe/clock_pad/ENABLE_VDDIO
+  padframe/clock_pad/OE_N
+ padframe/constant_value_inst\[0\]/zero
+  padframe/clock_pad/ANALOG_EN
+  padframe/clock_pad/ANALOG_POL
+  padframe/clock_pad/ANALOG_SEL
+  padframe/clock_pad/DM[2]
+  padframe/clock_pad/DM[1]
+  padframe/clock_pad/HLD_OVR
+  padframe/clock_pad/IB_MODE_SEL
+  padframe/clock_pad/OUT
+  padframe/clock_pad/SLOW
+  padframe/clock_pad/VTRIP_SEL
+ padframe/constant_value_inst\[1\]/one
+  padframe/gpio_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[1\]/zero
+  padframe/gpio_pad/ANALOG_EN
+  padframe/gpio_pad/ANALOG_POL
+  padframe/gpio_pad/ANALOG_SEL
+  padframe/gpio_pad/HLD_OVR
+  padframe/gpio_pad/IB_MODE_SEL
+  padframe/gpio_pad/SLOW
+  padframe/gpio_pad/VTRIP_SEL
+ padframe/constant_value_inst\[2\]/one
+  padframe/flash_io0_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[2\]/zero
+  padframe/flash_io0_pad/ANALOG_EN
+  padframe/flash_io0_pad/ANALOG_POL
+  padframe/flash_io0_pad/ANALOG_SEL
+  padframe/flash_io0_pad/HLD_OVR
+  padframe/flash_io0_pad/IB_MODE_SEL
+  padframe/flash_io0_pad/SLOW
+  padframe/flash_io0_pad/VTRIP_SEL
+ padframe/constant_value_inst\[3\]/one
+  padframe/flash_io1_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[3\]/zero
+  padframe/flash_io1_pad/ANALOG_EN
+  padframe/flash_io1_pad/ANALOG_POL
+  padframe/flash_io1_pad/ANALOG_SEL
+  padframe/flash_io1_pad/HLD_OVR
+  padframe/flash_io1_pad/IB_MODE_SEL
+  padframe/flash_io1_pad/SLOW
+  padframe/flash_io1_pad/VTRIP_SEL
+ padframe/constant_value_inst\[4\]/one
+  padframe/flash_csb_pad/DM[2]
+  padframe/flash_csb_pad/DM[1]
+  padframe/flash_csb_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[4\]/zero
+  padframe/flash_csb_pad/ANALOG_EN
+  padframe/flash_csb_pad/ANALOG_POL
+  padframe/flash_csb_pad/ANALOG_SEL
+  padframe/flash_csb_pad/DM[0]
+  padframe/flash_csb_pad/HLD_OVR
+  padframe/flash_csb_pad/IB_MODE_SEL
+  padframe/flash_csb_pad/INP_DIS
+  padframe/flash_csb_pad/SLOW
+  padframe/flash_csb_pad/VTRIP_SEL
+ padframe/constant_value_inst\[5\]/one
+  padframe/flash_clk_pad/DM[2]
+  padframe/flash_clk_pad/DM[1]
+  padframe/flash_clk_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[5\]/zero
+  padframe/flash_clk_pad/ANALOG_EN
+  padframe/flash_clk_pad/ANALOG_POL
+  padframe/flash_clk_pad/ANALOG_SEL
+  padframe/flash_clk_pad/DM[0]
+  padframe/flash_clk_pad/HLD_OVR
+  padframe/flash_clk_pad/IB_MODE_SEL
+  padframe/flash_clk_pad/INP_DIS
+  padframe/flash_clk_pad/SLOW
+  padframe/flash_clk_pad/VTRIP_SEL
+ padframe/constant_value_inst\[6\]/one
+  padframe/resetb_pad/ENABLE_VDDIO
+ soc/gpio_inenb_pad
+  padframe/gpio_pad/INP_DIS
+ soc/gpio_mode0_pad
+  padframe/gpio_pad/DM[0]
+ soc/gpio_mode1_pad
+  padframe/gpio_pad/DM[2]
+  padframe/gpio_pad/DM[1]
+ soc/gpio_out_pad
+  padframe/gpio_pad/OUT
+ soc/gpio_outenb_pad
+  padframe/gpio_pad/OE_N
+ soc/por_l_out
+  padframe/clock_pad/INP_DIS

signoff/caravel/openlane-signoff/timing/nom/t-clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-clk-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-clk-max.rpt
new file mode 100644
index 0000000..f200245
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0a196fd04302189ec098535ba0abafb0c3103a9fbe01a1e2dc06b12b2389eb29
+size 28500477

signoff/caravel/openlane-signoff/timing/nom/t-clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-clk-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-clk-min.rpt
new file mode 100644
index 0000000..c4f2b3c
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:8f1ff965022501ffd6c1575c221bd85663a9c9253506a98c3bf0c963f911a530
+size 18818887

signoff/caravel/openlane-signoff/timing/nom/t-hk_serial_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-hk_serial_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-hk_serial_clk-max.rpt
new file mode 100644
index 0000000..2e85698
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-hk_serial_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0e5487c53c1dca6ac75200ca5969b3decc604ae1a86de81283635aabeeddb91f
+size 345

signoff/caravel/openlane-signoff/timing/nom/t-hk_serial_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-hk_serial_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-hk_serial_clk-min.rpt
new file mode 100644
index 0000000..ed3e37d
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-hk_serial_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ae98fe472ad5cef61e708c7c65a7e2006f0ca125bf0ca8004f8365f976631145
+size 11323365

signoff/caravel/openlane-signoff/timing/nom/t-hkspi_clk-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-hkspi_clk-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-hkspi_clk-max.rpt
new file mode 100644
index 0000000..66d6c43
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-hkspi_clk-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:7efba7705146c6ae405071e90f5df090c5faa4e21a421511317b29708034228c
+size 341

signoff/caravel/openlane-signoff/timing/nom/t-hkspi_clk-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-hkspi_clk-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-hkspi_clk-min.rpt
new file mode 100644
index 0000000..a58cacf
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-hkspi_clk-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:8ea1506c39784be7e1b933df90d522d5fe1c8e0ee0af9ec99ca3029848ec0070
+size 6165580

signoff/caravel/openlane-signoff/timing/nom/t-max.rpt

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new file mode 100644
index 0000000..7fdc69c
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:9ae99bac5cd8a81484b67673f22281f28f110e8a75fa3443321c3dcda145abb3
+size 282066551

signoff/caravel/openlane-signoff/timing/nom/t-min.rpt

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new file mode 100644
index 0000000..3f21155
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0378baa235cedfb797be6eed48f1e134b8f59843af838e41c148d6d60ea921b4
+size 264752113

signoff/caravel/openlane-signoff/timing/nom/t-mprj-max.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-mprj-max.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-mprj-max.rpt
new file mode 100644
index 0000000..5387501
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-mprj-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:1992891403d36b340aeb9c16a03ef030b8f7524cad31beb663ceedc8fb7fff1c
+size 533321

signoff/caravel/openlane-signoff/timing/nom/t-mprj-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-mprj-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-mprj-min.rpt
new file mode 100644
index 0000000..12593d9
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-mprj-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:759db8680745250876ac7d25cdbb86074f53d3643ed91842e1a38880ff49722c
+size 452231

signoff/caravel/openlane-signoff/timing/nom/t-soc-max.rpt

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new file mode 100644
index 0000000..4625c6d
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-soc-max.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0a732b7677377a09ab04d1173226dd6392b5e162c46903f7518fc3865ffe0558
+size 309017

signoff/caravel/openlane-signoff/timing/nom/t-soc-min.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-soc-min.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-soc-min.rpt
new file mode 100644
index 0000000..8605e99
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-soc-min.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:5cdbf2109c154ed889df51cf9cbcbd6ee0e1e1e8e0bc747c0d67e888f175af73
+size 18068407

signoff/caravel/openlane-signoff/timing/nom/t-summary.rpt

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-summary.rpt b/signoff/caravel/openlane-signoff/timing/nom/t-summary.rpt
new file mode 100644
index 0000000..6670eb2
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-summary.rpt
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:fb7ee7abe010501237546837124027ad0029ed659d1db898539871072201defa
+size 3297022

signoff/caravel/openlane-signoff/timing/nom/t-unannotated.log

diff --git a/signoff/caravel/openlane-signoff/timing/nom/t-unannotated.log b/signoff/caravel/openlane-signoff/timing/nom/t-unannotated.log
new file mode 100644
index 0000000..a7b9a42
--- /dev/null
+++ b/signoff/caravel/openlane-signoff/timing/nom/t-unannotated.log
@@ -0,0 +1,3628 @@
+Found 2203 unannotated nets.
+ padframe/flash_clk
+ padframe/mprj_analog_io[26]
+ mprj_io[28]
+ vssa2
+ vssa1
+ vdda1
+ mprj_io[4]
+ mprj_io[5]
+ mprj_io[19]
+ vssa1_2
+ vdda2
+ mprj_io[2]
+ mprj_io[3]
+ mprj_io[14]
+ mprj_io[33]
+ mprj_io[34]
+ resetb
+ mprj_io[1]
+ mprj_io[8]
+ mprj_io[9]
+ mprj_io[6]
+ mprj_io[11]
+ mprj_io[13]
+ mprj_io[15]
+ mprj_io[17]
+ mprj_io[18]
+ mprj_io[20]
+ mprj_io[23]
+ mprj_io[16]
+ mprj_io[27]
+ mprj_io[29]
+ mprj_io[32]
+ vssd2
+ vccd1
+ clock
+ gpio
+ vssd
+ vdda
+ mprj_io[37]
+ vccd
+ vssa
+ vssio
+ mprj_io[30]
+ vssd1
+ vssio_2
+ vddio
+ mprj_io[36]
+ vddio_2
+ mprj_io[31]
+ vccd2
+ vdda1_2
+ mprj_io[21]
+ mprj_io[26]
+ mprj_io[35]
+ mprj_io[0]
+ mprj_io[22]
+ mprj_io[24]
+ mprj_io[25]
+ mprj_io[7]
+ mprj_io[12]
+ mprj_io[10]
+ gpio_control_bidir_2\[2\]/_053_
+ gpio_control_bidir_2\[2\]/_052_
+ gpio_control_bidir_2\[2\]/_051_
+ gpio_control_bidir_2\[2\]/_050_
+ gpio_control_bidir_2\[2\]/_049_
+ gpio_control_bidir_2\[2\]/_048_
+ gpio_control_bidir_2\[2\]/_047_
+ gpio_control_bidir_2\[2\]/_046_
+ gpio_control_bidir_2\[2\]/_057_
+ gpio_control_bidir_2\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[7\]/_052_
+ gpio_control_in_1\[7\]/_056_
+ gpio_control_in_1\[7\]/_055_
+ gpio_control_in_1\[7\]/_054_
+ gpio_control_in_1\[7\]/_053_
+ gpio_control_in_1\[7\]/_051_
+ gpio_control_in_1\[7\]/_050_
+ gpio_control_in_1\[7\]/_049_
+ gpio_control_in_1\[7\]/_048_
+ gpio_control_in_1\[7\]/_047_
+ gpio_control_in_1\[7\]/_046_
+ gpio_control_in_1\[7\]/_057_
+ gpio_control_in_1\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_047_
+ gpio_control_in_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_049_
+ gpio_control_in_2\[0\]/_048_
+ gpio_control_in_2\[0\]/_046_
+ gpio_control_in_2\[0\]/_057_
+ gpio_control_in_2\[3\]/_047_
+ gpio_control_in_2\[3\]/_052_
+ gpio_control_in_2\[3\]/_051_
+ gpio_control_in_2\[3\]/_050_
+ gpio_control_in_2\[3\]/_049_
+ gpio_control_in_2\[3\]/_048_
+ gpio_control_in_2\[3\]/_046_
+ gpio_control_in_2\[3\]/_057_
+ gpio_control_in_2\[3\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_2/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_low\[1\]
+ gpio_defaults_block_20/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[2\]
+ gpio_defaults_block_19/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[3\]
+ gpio_defaults_block_20/gpio_defaults_high\[11\]
+ gpio_defaults_block_20/gpio_defaults_high\[12\]
+ gpio_defaults_block_20/gpio_defaults_high\[2\]
+ gpio_defaults_block_20/gpio_defaults_high\[4\]
+ gpio_defaults_block_20/gpio_defaults_high\[5\]
+ gpio_defaults_block_20/gpio_defaults_high\[6\]
+ gpio_defaults_block_20/gpio_defaults_high\[7\]
+ gpio_defaults_block_20/gpio_defaults_high\[8\]
+ gpio_defaults_block_20/gpio_defaults_high\[9\]
+ gpio_defaults_block_21/gpio_defaults_high\[0\]
+ gpio_defaults_block_21/gpio_defaults_low\[10\]
+ gpio_defaults_block_21/gpio_defaults_high\[11\]
+ gpio_defaults_block_21/gpio_defaults_high\[12\]
+ gpio_defaults_block_21/gpio_defaults_low\[1\]
+ gpio_defaults_block_21/gpio_defaults_high\[3\]
+ gpio_defaults_block_21/gpio_defaults_high\[4\]
+ gpio_defaults_block_21/gpio_defaults_high\[5\]
+ gpio_defaults_block_21/gpio_defaults_high\[6\]
+ gpio_defaults_block_21/gpio_defaults_high\[7\]
+ gpio_defaults_block_21/gpio_defaults_high\[8\]
+ gpio_defaults_block_21/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[3\]
+ gpio_defaults_block_19/gpio_defaults_high\[4\]
+ gpio_defaults_block_19/gpio_defaults_high\[5\]
+ gpio_defaults_block_19/gpio_defaults_high\[7\]
+ gpio_defaults_block_19/gpio_defaults_high\[8\]
+ gpio_defaults_block_19/gpio_defaults_high\[9\]
+ gpio_defaults_block_2/gpio_defaults_high\[0\]
+ gpio_defaults_block_2/gpio_defaults_low\[10\]
+ gpio_defaults_block_2/gpio_defaults_high\[11\]
+ gpio_defaults_block_2/gpio_defaults_high\[12\]
+ gpio_defaults_block_2/gpio_defaults_high\[2\]
+ gpio_defaults_block_2/gpio_defaults_high\[4\]
+ gpio_defaults_block_2/gpio_defaults_high\[5\]
+ gpio_defaults_block_2/gpio_defaults_high\[6\]
+ gpio_defaults_block_2/gpio_defaults_high\[7\]
+ gpio_defaults_block_2/gpio_defaults_high\[8\]
+ gpio_defaults_block_2/gpio_defaults_high\[9\]
+ gpio_defaults_block_20/gpio_defaults_high\[0\]
+ gpio_defaults_block_20/gpio_defaults_low\[10\]
+ padframe/mprj_analog_io[7]
+ padframe/flash_io0
+ padframe/flash_io0_di_core
+ gpio_control_bidir_1\[0\]/_056_
+ gpio_control_bidir_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_1\[0\]/_051_
+ gpio_control_bidir_1\[0\]/_055_
+ gpio_control_bidir_1\[0\]/_054_
+ gpio_control_bidir_1\[0\]/_053_
+ gpio_control_bidir_1\[0\]/_052_
+ gpio_control_bidir_1\[0\]/_050_
+ gpio_control_bidir_1\[0\]/_049_
+ gpio_control_bidir_1\[0\]/_048_
+ gpio_control_bidir_1\[0\]/_047_
+ gpio_control_bidir_1\[0\]/_046_
+ gpio_control_bidir_1\[0\]/_057_
+ gpio_control_bidir_1\[1\]/_051_
+ gpio_control_bidir_1\[1\]/_057_
+ gpio_control_bidir_1\[1\]/_056_
+ gpio_control_bidir_1\[1\]/_055_
+ gpio_control_bidir_1\[1\]/_054_
+ gpio_control_bidir_1\[1\]/_053_
+ gpio_control_bidir_1\[1\]/_052_
+ gpio_control_bidir_1\[1\]/_050_
+ gpio_control_bidir_1\[1\]/_049_
+ gpio_control_bidir_1\[1\]/_048_
+ gpio_control_bidir_1\[1\]/_047_
+ gpio_control_bidir_1\[1\]/_046_
+ gpio_control_bidir_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_047_
+ gpio_control_bidir_2\[0\]/_049_
+ gpio_control_bidir_2\[0\]/_056_
+ gpio_control_bidir_2\[0\]/_051_
+ gpio_control_bidir_2\[0\]/_050_
+ gpio_control_bidir_2\[0\]/_048_
+ gpio_control_bidir_2\[0\]/_046_
+ gpio_control_bidir_2\[0\]/_057_
+ gpio_control_bidir_2\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_bidir_2\[0\]/_055_
+ gpio_control_bidir_2\[0\]/_054_
+ gpio_control_bidir_2\[0\]/_053_
+ gpio_control_bidir_2\[0\]/_052_
+ gpio_control_bidir_2\[1\]/_050_
+ gpio_control_bidir_2\[1\]/_056_
+ gpio_control_bidir_2\[1\]/_055_
+ gpio_control_bidir_2\[1\]/_054_
+ gpio_control_bidir_2\[1\]/_053_
+ gpio_control_bidir_2\[1\]/_052_
+ gpio_control_bidir_2\[1\]/_051_
+ gpio_control_bidir_2\[1\]/_049_
+ gpio_control_bidir_2\[1\]/_048_
+ gpio_control_bidir_2\[1\]/_047_
+ gpio_control_bidir_2\[1\]/_046_
+ gpio_control_bidir_2\[1\]/_057_
+ gpio_control_bidir_2\[2\]/_056_
+ gpio_control_bidir_2\[2\]/_055_
+ gpio_control_bidir_2\[2\]/_054_
+ gpio_control_bidir_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[0\]/_055_
+ gpio_control_in_1\[0\]/_056_
+ gpio_control_in_1\[0\]/_054_
+ gpio_control_in_1\[0\]/_053_
+ gpio_control_in_1\[0\]/_052_
+ gpio_control_in_1\[0\]/_051_
+ gpio_control_in_1\[0\]/_050_
+ gpio_control_in_1\[0\]/_049_
+ gpio_control_in_1\[0\]/_048_
+ gpio_control_in_1\[0\]/_047_
+ gpio_control_in_1\[0\]/_046_
+ gpio_control_in_1\[0\]/_057_
+ gpio_control_in_1\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[10\]/_057_
+ gpio_control_in_1\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[10\]/_047_
+ gpio_control_in_1\[10\]/_046_
+ gpio_control_in_1\[10\]/_056_
+ gpio_control_in_1\[10\]/_055_
+ gpio_control_in_1\[10\]/_054_
+ gpio_control_in_1\[10\]/_053_
+ gpio_control_in_1\[10\]/_052_
+ gpio_control_in_1\[10\]/_051_
+ gpio_control_in_1\[10\]/_050_
+ gpio_control_in_1\[10\]/_049_
+ gpio_control_in_1\[10\]/_048_
+ gpio_control_in_1\[1\]/_056_
+ gpio_control_in_1\[1\]/_055_
+ gpio_control_in_1\[1\]/_054_
+ gpio_control_in_1\[1\]/_053_
+ gpio_control_in_1\[1\]/_052_
+ gpio_control_in_1\[1\]/_051_
+ gpio_control_in_1\[1\]/_050_
+ gpio_control_in_1\[1\]/_049_
+ gpio_control_in_1\[1\]/_048_
+ gpio_control_in_1\[1\]/_047_
+ gpio_control_in_1\[1\]/_046_
+ gpio_control_in_1\[1\]/_057_
+ gpio_control_in_1\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[2\]/_056_
+ gpio_control_in_1\[2\]/_055_
+ gpio_control_in_1\[2\]/_054_
+ gpio_control_in_1\[2\]/_053_
+ gpio_control_in_1\[2\]/_052_
+ gpio_control_in_1\[2\]/_051_
+ gpio_control_in_1\[2\]/_050_
+ gpio_control_in_1\[2\]/_049_
+ gpio_control_in_1\[2\]/_048_
+ gpio_control_in_1\[2\]/_047_
+ gpio_control_in_1\[2\]/_046_
+ gpio_control_in_1\[2\]/_057_
+ gpio_control_in_1\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[3\]/_052_
+ gpio_control_in_1\[3\]/_047_
+ gpio_control_in_1\[3\]/_056_
+ gpio_control_in_1\[3\]/_055_
+ gpio_control_in_1\[3\]/_054_
+ gpio_control_in_1\[3\]/_053_
+ gpio_control_in_1\[3\]/_051_
+ gpio_control_in_1\[3\]/_050_
+ gpio_control_in_1\[3\]/_049_
+ gpio_control_in_1\[3\]/_048_
+ gpio_control_in_1\[3\]/_046_
+ gpio_control_in_1\[3\]/_057_
+ gpio_control_in_1\[3\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[4\]/_056_
+ gpio_control_in_1\[4\]/_055_
+ gpio_control_in_1\[4\]/_054_
+ gpio_control_in_1\[4\]/_053_
+ gpio_control_in_1\[4\]/_052_
+ gpio_control_in_1\[4\]/_051_
+ gpio_control_in_1\[4\]/_050_
+ gpio_control_in_1\[4\]/_049_
+ gpio_control_in_1\[4\]/_048_
+ gpio_control_in_1\[4\]/_047_
+ gpio_control_in_1\[4\]/_046_
+ gpio_control_in_1\[4\]/_057_
+ gpio_control_in_1\[5\]/_054_
+ gpio_control_in_1\[5\]/_049_
+ gpio_control_in_1\[5\]/_056_
+ gpio_control_in_1\[5\]/_055_
+ gpio_control_in_1\[5\]/_053_
+ gpio_control_in_1\[5\]/_052_
+ gpio_control_in_1\[5\]/_051_
+ gpio_control_in_1\[5\]/_050_
+ gpio_control_in_1\[5\]/_048_
+ gpio_control_in_1\[5\]/_047_
+ gpio_control_in_1\[5\]/_046_
+ gpio_control_in_1\[5\]/_057_
+ gpio_control_in_1\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[6\]/_056_
+ gpio_control_in_1\[6\]/_055_
+ gpio_control_in_1\[6\]/_054_
+ gpio_control_in_1\[6\]/_053_
+ gpio_control_in_1\[6\]/_052_
+ gpio_control_in_1\[6\]/_051_
+ gpio_control_in_1\[6\]/_050_
+ gpio_control_in_1\[6\]/_049_
+ gpio_control_in_1\[6\]/_048_
+ gpio_control_in_1\[6\]/_047_
+ gpio_control_in_1\[6\]/_046_
+ gpio_control_in_1\[6\]/_057_
+ gpio_control_in_1\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[8\]/_050_
+ gpio_control_in_1\[8\]/_055_
+ gpio_control_in_1\[8\]/_054_
+ gpio_control_in_1\[8\]/_056_
+ gpio_control_in_1\[8\]/_053_
+ gpio_control_in_1\[8\]/_052_
+ gpio_control_in_1\[8\]/_051_
+ gpio_control_in_1\[8\]/_049_
+ gpio_control_in_1\[8\]/_048_
+ gpio_control_in_1\[8\]/_047_
+ gpio_control_in_1\[8\]/_046_
+ gpio_control_in_1\[8\]/_057_
+ gpio_control_in_1\[8\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[9\]/_056_
+ gpio_control_in_1\[9\]/_046_
+ gpio_control_in_1\[9\]/_057_
+ gpio_control_in_1\[9\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1\[9\]/_055_
+ gpio_control_in_1\[9\]/_054_
+ gpio_control_in_1\[9\]/_053_
+ gpio_control_in_1\[9\]/_052_
+ gpio_control_in_1\[9\]/_051_
+ gpio_control_in_1\[9\]/_050_
+ gpio_control_in_1\[9\]/_049_
+ gpio_control_in_1\[9\]/_048_
+ gpio_control_in_1\[9\]/_047_
+ gpio_control_in_1a\[0\]/_049_
+ gpio_control_in_1a\[0\]/_056_
+ gpio_control_in_1a\[0\]/_055_
+ gpio_control_in_1a\[0\]/_054_
+ gpio_control_in_1a\[0\]/_053_
+ gpio_control_in_1a\[0\]/_052_
+ gpio_control_in_1a\[0\]/_051_
+ gpio_control_in_1a\[0\]/_050_
+ gpio_control_in_1a\[0\]/_048_
+ gpio_control_in_1a\[0\]/_047_
+ gpio_control_in_1a\[0\]/_046_
+ gpio_control_in_1a\[0\]/_057_
+ gpio_control_in_1a\[0\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[1\]/_047_
+ gpio_control_in_1a\[1\]/_056_
+ gpio_control_in_1a\[1\]/_055_
+ gpio_control_in_1a\[1\]/_054_
+ gpio_control_in_1a\[1\]/_053_
+ gpio_control_in_1a\[1\]/_052_
+ gpio_control_in_1a\[1\]/_051_
+ gpio_control_in_1a\[1\]/_050_
+ gpio_control_in_1a\[1\]/_049_
+ gpio_control_in_1a\[1\]/_048_
+ gpio_control_in_1a\[1\]/_046_
+ gpio_control_in_1a\[1\]/_057_
+ gpio_control_in_1a\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[2\]/_055_
+ gpio_control_in_1a\[2\]/_049_
+ gpio_control_in_1a\[2\]/_056_
+ gpio_control_in_1a\[2\]/_054_
+ gpio_control_in_1a\[2\]/_053_
+ gpio_control_in_1a\[2\]/_052_
+ gpio_control_in_1a\[2\]/_051_
+ gpio_control_in_1a\[2\]/_050_
+ gpio_control_in_1a\[2\]/_048_
+ gpio_control_in_1a\[2\]/_047_
+ gpio_control_in_1a\[2\]/_046_
+ gpio_control_in_1a\[2\]/_057_
+ gpio_control_in_1a\[2\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[3\]/_056_
+ gpio_control_in_1a\[3\]/_055_
+ gpio_control_in_1a\[3\]/_054_
+ gpio_control_in_1a\[3\]/_053_
+ gpio_control_in_1a\[3\]/_052_
+ gpio_control_in_1a\[3\]/_051_
+ gpio_control_in_1a\[3\]/_050_
+ gpio_control_in_1a\[3\]/_049_
+ gpio_control_in_1a\[3\]/_048_
+ gpio_control_in_1a\[3\]/_047_
+ gpio_control_in_1a\[3\]/_046_
+ gpio_control_in_1a\[3\]/_057_
+ gpio_control_in_1a\[4\]/_047_
+ gpio_control_in_1a\[4\]/_049_
+ gpio_control_in_1a\[4\]/_056_
+ gpio_control_in_1a\[4\]/_051_
+ gpio_control_in_1a\[4\]/_050_
+ gpio_control_in_1a\[4\]/_048_
+ gpio_control_in_1a\[4\]/_046_
+ gpio_control_in_1a\[4\]/_057_
+ gpio_control_in_1a\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_1a\[4\]/_055_
+ gpio_control_in_1a\[4\]/_054_
+ gpio_control_in_1a\[4\]/_053_
+ gpio_control_in_1a\[4\]/_052_
+ gpio_control_in_1a\[5\]/_047_
+ gpio_control_in_1a\[5\]/_056_
+ gpio_control_in_1a\[5\]/_055_
+ gpio_control_in_1a\[5\]/_054_
+ gpio_control_in_1a\[5\]/_053_
+ gpio_control_in_1a\[5\]/_052_
+ gpio_control_in_1a\[5\]/_051_
+ gpio_control_in_1a\[5\]/_050_
+ gpio_control_in_1a\[5\]/_049_
+ gpio_control_in_1a\[5\]/_048_
+ gpio_control_in_1a\[5\]/_046_
+ gpio_control_in_1a\[5\]/_057_
+ gpio_control_in_1a\[5\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[0\]/_056_
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+ gpio_control_in_2\[0\]/_054_
+ gpio_control_in_2\[0\]/_053_
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+ gpio_control_in_2\[0\]/_051_
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+ gpio_control_in_2\[10\]/_046_
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+ gpio_control_in_2\[10\]/_053_
+ gpio_control_in_2\[10\]/_050_
+ gpio_control_in_2\[10\]/_049_
+ gpio_control_in_2\[10\]/_048_
+ gpio_control_in_2\[10\]/_057_
+ gpio_control_in_2\[10\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_056_
+ gpio_control_in_2\[11\]/_057_
+ gpio_control_in_2\[11\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[11\]/_055_
+ gpio_control_in_2\[11\]/_054_
+ gpio_control_in_2\[11\]/_053_
+ gpio_control_in_2\[11\]/_052_
+ gpio_control_in_2\[11\]/_051_
+ gpio_control_in_2\[11\]/_050_
+ gpio_control_in_2\[11\]/_049_
+ gpio_control_in_2\[11\]/_048_
+ gpio_control_in_2\[11\]/_047_
+ gpio_control_in_2\[11\]/_046_
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+ gpio_control_in_2\[12\]/_055_
+ gpio_control_in_2\[12\]/_054_
+ gpio_control_in_2\[12\]/_053_
+ gpio_control_in_2\[12\]/_052_
+ gpio_control_in_2\[12\]/_051_
+ gpio_control_in_2\[12\]/_050_
+ gpio_control_in_2\[12\]/_049_
+ gpio_control_in_2\[12\]/_048_
+ gpio_control_in_2\[12\]/_047_
+ gpio_control_in_2\[12\]/_046_
+ gpio_control_in_2\[12\]/_057_
+ gpio_control_in_2\[12\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[13\]/_056_
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+ gpio_control_in_2\[13\]/_054_
+ gpio_control_in_2\[13\]/_053_
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+ gpio_control_in_2\[13\]/_050_
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+ gpio_control_in_2\[13\]/_048_
+ gpio_control_in_2\[13\]/_047_
+ gpio_control_in_2\[13\]/_046_
+ gpio_control_in_2\[13\]/_057_
+ gpio_control_in_2\[13\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[14\]/_056_
+ gpio_control_in_2\[14\]/_055_
+ gpio_control_in_2\[14\]/_054_
+ gpio_control_in_2\[14\]/_053_
+ gpio_control_in_2\[14\]/_052_
+ gpio_control_in_2\[14\]/_051_
+ gpio_control_in_2\[14\]/_050_
+ gpio_control_in_2\[14\]/_049_
+ gpio_control_in_2\[14\]/_048_
+ gpio_control_in_2\[14\]/_047_
+ gpio_control_in_2\[14\]/_046_
+ gpio_control_in_2\[14\]/_057_
+ gpio_control_in_2\[14\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[15\]/_056_
+ gpio_control_in_2\[15\]/_055_
+ gpio_control_in_2\[15\]/_054_
+ gpio_control_in_2\[15\]/_053_
+ gpio_control_in_2\[15\]/_052_
+ gpio_control_in_2\[15\]/_051_
+ gpio_control_in_2\[15\]/_050_
+ gpio_control_in_2\[15\]/_049_
+ gpio_control_in_2\[15\]/_048_
+ gpio_control_in_2\[15\]/_047_
+ gpio_control_in_2\[15\]/_046_
+ gpio_control_in_2\[15\]/_057_
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+ gpio_control_in_2\[1\]/_052_
+ gpio_control_in_2\[1\]/_051_
+ gpio_control_in_2\[1\]/_050_
+ gpio_control_in_2\[1\]/_048_
+ gpio_control_in_2\[1\]/_047_
+ gpio_control_in_2\[1\]/_046_
+ gpio_control_in_2\[1\]/_057_
+ gpio_control_in_2\[1\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[1\]/_056_
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+ gpio_control_in_2\[4\]/_049_
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+ gpio_control_in_2\[4\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[5\]/_057_
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+ gpio_control_in_2\[5\]/_047_
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+ gpio_control_in_2\[6\]/_050_
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+ gpio_control_in_2\[6\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[7\]/_054_
+ gpio_control_in_2\[7\]/_056_
+ gpio_control_in_2\[7\]/_055_
+ gpio_control_in_2\[7\]/_053_
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+ gpio_control_in_2\[7\]/_051_
+ gpio_control_in_2\[7\]/_050_
+ gpio_control_in_2\[7\]/_049_
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+ gpio_control_in_2\[7\]/gpio_logic_high/gpio_logic1
+ gpio_control_in_2\[8\]/_052_
+ gpio_control_in_2\[8\]/_047_
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+ gpio_control_in_2\[8\]/_055_
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+ gpio_control_in_2\[8\]/_051_
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+ gpio_control_in_2\[8\]/_046_
+ gpio_control_in_2\[8\]/_057_
+ gpio_control_in_2\[8\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[4\]
+ gpio_defaults_block_0/gpio_defaults_high\[9\]
+ gpio_control_in_2\[9\]/_051_
+ gpio_control_in_2\[9\]/gpio_logic_high/gpio_logic1
+ gpio_defaults_block_0/gpio_defaults_high\[0\]
+ gpio_defaults_block_0/gpio_defaults_low\[10\]
+ gpio_defaults_block_0/gpio_defaults_high\[11\]
+ gpio_defaults_block_0/gpio_defaults_high\[12\]
+ gpio_defaults_block_0/gpio_defaults_low\[1\]
+ gpio_defaults_block_0/gpio_defaults_high\[2\]
+ gpio_defaults_block_0/gpio_defaults_high\[3\]
+ gpio_defaults_block_0/gpio_defaults_high\[5\]
+ gpio_defaults_block_0/gpio_defaults_high\[6\]
+ gpio_defaults_block_0/gpio_defaults_high\[7\]
+ gpio_defaults_block_0/gpio_defaults_high\[8\]
+ gpio_control_in_2\[9\]/_056_
+ gpio_control_in_2\[9\]/_055_
+ gpio_control_in_2\[9\]/_054_
+ gpio_control_in_2\[9\]/_053_
+ gpio_control_in_2\[9\]/_052_
+ gpio_control_in_2\[9\]/_050_
+ gpio_control_in_2\[9\]/_049_
+ gpio_control_in_2\[9\]/_048_
+ gpio_control_in_2\[9\]/_047_
+ gpio_control_in_2\[9\]/_046_
+ gpio_control_in_2\[9\]/_057_
+ gpio_defaults_block_11/gpio_defaults_low\[10\]
+ gpio_defaults_block_11/gpio_defaults_high\[4\]
+ gpio_defaults_block_11/gpio_defaults_high\[6\]
+ gpio_defaults_block_11/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[8\]
+ gpio_defaults_block_11/gpio_defaults_high\[0\]
+ gpio_defaults_block_11/gpio_defaults_high\[11\]
+ gpio_defaults_block_11/gpio_defaults_high\[12\]
+ gpio_defaults_block_11/gpio_defaults_low\[1\]
+ gpio_defaults_block_11/gpio_defaults_high\[2\]
+ gpio_defaults_block_11/gpio_defaults_high\[3\]
+ gpio_defaults_block_11/gpio_defaults_high\[5\]
+ gpio_defaults_block_11/gpio_defaults_high\[7\]
+ gpio_defaults_block_11/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[0\]
+ gpio_defaults_block_12/gpio_defaults_low\[10\]
+ gpio_defaults_block_12/gpio_defaults_high\[11\]
+ gpio_defaults_block_12/gpio_defaults_high\[12\]
+ gpio_defaults_block_12/gpio_defaults_low\[1\]
+ gpio_defaults_block_12/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[0\]
+ gpio_defaults_block_1/gpio_defaults_low\[10\]
+ gpio_defaults_block_1/gpio_defaults_high\[11\]
+ gpio_defaults_block_1/gpio_defaults_high\[12\]
+ gpio_defaults_block_1/gpio_defaults_low\[1\]
+ gpio_defaults_block_1/gpio_defaults_high\[2\]
+ gpio_defaults_block_1/gpio_defaults_high\[3\]
+ gpio_defaults_block_1/gpio_defaults_high\[5\]
+ gpio_defaults_block_1/gpio_defaults_high\[6\]
+ gpio_defaults_block_1/gpio_defaults_high\[7\]
+ gpio_defaults_block_1/gpio_defaults_high\[8\]
+ gpio_defaults_block_1/gpio_defaults_high\[9\]
+ gpio_defaults_block_10/gpio_defaults_high\[0\]
+ gpio_defaults_block_10/gpio_defaults_low\[10\]
+ gpio_defaults_block_10/gpio_defaults_high\[11\]
+ gpio_defaults_block_10/gpio_defaults_high\[12\]
+ gpio_defaults_block_10/gpio_defaults_low\[1\]
+ gpio_defaults_block_10/gpio_defaults_high\[2\]
+ gpio_defaults_block_10/gpio_defaults_high\[3\]
+ gpio_defaults_block_10/gpio_defaults_high\[4\]
+ gpio_defaults_block_10/gpio_defaults_high\[5\]
+ gpio_defaults_block_10/gpio_defaults_high\[6\]
+ gpio_defaults_block_10/gpio_defaults_high\[7\]
+ gpio_defaults_block_10/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[3\]
+ gpio_defaults_block_14/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_low\[10\]
+ gpio_defaults_block_15/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[11\]
+ gpio_defaults_block_14/gpio_defaults_low\[10\]
+ gpio_defaults_block_14/gpio_defaults_high\[12\]
+ gpio_defaults_block_14/gpio_defaults_low\[1\]
+ gpio_defaults_block_14/gpio_defaults_high\[2\]
+ gpio_defaults_block_14/gpio_defaults_high\[4\]
+ gpio_defaults_block_14/gpio_defaults_high\[6\]
+ gpio_defaults_block_14/gpio_defaults_high\[7\]
+ gpio_defaults_block_14/gpio_defaults_high\[8\]
+ gpio_defaults_block_14/gpio_defaults_high\[9\]
+ gpio_defaults_block_15/gpio_defaults_high\[0\]
+ gpio_defaults_block_15/gpio_defaults_high\[11\]
+ gpio_defaults_block_15/gpio_defaults_high\[12\]
+ gpio_defaults_block_15/gpio_defaults_low\[1\]
+ gpio_defaults_block_15/gpio_defaults_high\[2\]
+ gpio_defaults_block_15/gpio_defaults_high\[3\]
+ gpio_defaults_block_15/gpio_defaults_high\[4\]
+ gpio_defaults_block_15/gpio_defaults_high\[5\]
+ gpio_defaults_block_15/gpio_defaults_high\[6\]
+ gpio_defaults_block_15/gpio_defaults_high\[8\]
+ gpio_defaults_block_15/gpio_defaults_high\[9\]
+ gpio_defaults_block_12/gpio_defaults_high\[3\]
+ gpio_defaults_block_12/gpio_defaults_high\[4\]
+ gpio_defaults_block_12/gpio_defaults_high\[5\]
+ gpio_defaults_block_12/gpio_defaults_high\[6\]
+ gpio_defaults_block_12/gpio_defaults_high\[7\]
+ gpio_defaults_block_12/gpio_defaults_high\[8\]
+ gpio_defaults_block_12/gpio_defaults_high\[9\]
+ gpio_defaults_block_13/gpio_defaults_high\[0\]
+ gpio_defaults_block_13/gpio_defaults_low\[10\]
+ gpio_defaults_block_13/gpio_defaults_high\[12\]
+ gpio_defaults_block_13/gpio_defaults_low\[1\]
+ gpio_defaults_block_13/gpio_defaults_high\[2\]
+ gpio_defaults_block_13/gpio_defaults_high\[4\]
+ gpio_defaults_block_13/gpio_defaults_high\[5\]
+ gpio_defaults_block_13/gpio_defaults_high\[6\]
+ gpio_defaults_block_13/gpio_defaults_high\[7\]
+ gpio_defaults_block_13/gpio_defaults_high\[8\]
+ gpio_defaults_block_13/gpio_defaults_high\[9\]
+ gpio_defaults_block_14/gpio_defaults_high\[0\]
+ gpio_defaults_block_14/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[0\]
+ gpio_defaults_block_18/gpio_defaults_low\[10\]
+ gpio_defaults_block_18/gpio_defaults_high\[11\]
+ gpio_defaults_block_18/gpio_defaults_high\[12\]
+ gpio_defaults_block_18/gpio_defaults_low\[1\]
+ gpio_defaults_block_18/gpio_defaults_high\[2\]
+ gpio_defaults_block_18/gpio_defaults_high\[3\]
+ gpio_defaults_block_18/gpio_defaults_high\[4\]
+ gpio_defaults_block_18/gpio_defaults_high\[5\]
+ gpio_defaults_block_18/gpio_defaults_high\[6\]
+ gpio_defaults_block_18/gpio_defaults_high\[7\]
+ gpio_defaults_block_18/gpio_defaults_high\[8\]
+ gpio_defaults_block_18/gpio_defaults_high\[9\]
+ gpio_defaults_block_19/gpio_defaults_high\[0\]
+ gpio_defaults_block_19/gpio_defaults_low\[10\]
+ gpio_defaults_block_19/gpio_defaults_high\[11\]
+ gpio_defaults_block_19/gpio_defaults_high\[12\]
+ gpio_defaults_block_19/gpio_defaults_low\[1\]
+ gpio_defaults_block_19/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[0\]
+ gpio_defaults_block_16/gpio_defaults_high\[11\]
+ gpio_defaults_block_16/gpio_defaults_high\[12\]
+ gpio_defaults_block_16/gpio_defaults_low\[1\]
+ gpio_defaults_block_16/gpio_defaults_high\[2\]
+ gpio_defaults_block_16/gpio_defaults_high\[3\]
+ gpio_defaults_block_16/gpio_defaults_high\[4\]
+ gpio_defaults_block_16/gpio_defaults_high\[5\]
+ gpio_defaults_block_16/gpio_defaults_high\[6\]
+ gpio_defaults_block_16/gpio_defaults_high\[7\]
+ gpio_defaults_block_16/gpio_defaults_high\[8\]
+ gpio_defaults_block_16/gpio_defaults_high\[9\]
+ gpio_defaults_block_17/gpio_defaults_high\[0\]
+ gpio_defaults_block_17/gpio_defaults_low\[10\]
+ gpio_defaults_block_17/gpio_defaults_high\[11\]
+ gpio_defaults_block_17/gpio_defaults_high\[12\]
+ gpio_defaults_block_17/gpio_defaults_low\[1\]
+ gpio_defaults_block_17/gpio_defaults_high\[2\]
+ gpio_defaults_block_17/gpio_defaults_high\[3\]
+ gpio_defaults_block_17/gpio_defaults_high\[4\]
+ gpio_defaults_block_17/gpio_defaults_high\[5\]
+ gpio_defaults_block_17/gpio_defaults_high\[6\]
+ gpio_defaults_block_17/gpio_defaults_high\[7\]
+ gpio_defaults_block_17/gpio_defaults_high\[8\]
+ gpio_defaults_block_17/gpio_defaults_high\[9\]
+ gpio_defaults_block_22/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[0\]
+ gpio_defaults_block_24/gpio_defaults_low\[10\]
+ gpio_defaults_block_24/gpio_defaults_high\[11\]
+ gpio_defaults_block_24/gpio_defaults_high\[12\]
+ gpio_defaults_block_24/gpio_defaults_low\[1\]
+ gpio_defaults_block_24/gpio_defaults_high\[2\]
+ gpio_defaults_block_24/gpio_defaults_high\[3\]
+ gpio_defaults_block_24/gpio_defaults_high\[4\]
+ gpio_defaults_block_24/gpio_defaults_high\[5\]
+ gpio_defaults_block_24/gpio_defaults_high\[6\]
+ gpio_defaults_block_24/gpio_defaults_high\[7\]
+ gpio_defaults_block_24/gpio_defaults_high\[8\]
+ gpio_defaults_block_24/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_high\[0\]
+ gpio_defaults_block_25/gpio_defaults_low\[10\]
+ gpio_defaults_block_25/gpio_defaults_high\[11\]
+ gpio_defaults_block_25/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_high\[0\]
+ gpio_defaults_block_22/gpio_defaults_low\[10\]
+ gpio_defaults_block_22/gpio_defaults_high\[11\]
+ gpio_defaults_block_22/gpio_defaults_high\[12\]
+ gpio_defaults_block_22/gpio_defaults_low\[1\]
+ gpio_defaults_block_22/gpio_defaults_high\[2\]
+ gpio_defaults_block_22/gpio_defaults_high\[3\]
+ gpio_defaults_block_22/gpio_defaults_high\[4\]
+ gpio_defaults_block_22/gpio_defaults_high\[5\]
+ gpio_defaults_block_22/gpio_defaults_high\[7\]
+ gpio_defaults_block_22/gpio_defaults_high\[8\]
+ gpio_defaults_block_22/gpio_defaults_high\[9\]
+ gpio_defaults_block_23/gpio_defaults_high\[0\]
+ gpio_defaults_block_23/gpio_defaults_low\[10\]
+ gpio_defaults_block_23/gpio_defaults_high\[11\]
+ gpio_defaults_block_23/gpio_defaults_high\[12\]
+ gpio_defaults_block_23/gpio_defaults_low\[1\]
+ gpio_defaults_block_23/gpio_defaults_high\[2\]
+ gpio_defaults_block_23/gpio_defaults_high\[4\]
+ gpio_defaults_block_23/gpio_defaults_high\[5\]
+ gpio_defaults_block_23/gpio_defaults_high\[6\]
+ gpio_defaults_block_23/gpio_defaults_high\[7\]
+ gpio_defaults_block_23/gpio_defaults_high\[8\]
+ gpio_defaults_block_23/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[2\]
+ gpio_defaults_block_27/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[12\]
+ gpio_defaults_block_27/gpio_defaults_low\[1\]
+ gpio_defaults_block_27/gpio_defaults_high\[3\]
+ gpio_defaults_block_27/gpio_defaults_high\[4\]
+ gpio_defaults_block_27/gpio_defaults_high\[5\]
+ gpio_defaults_block_27/gpio_defaults_high\[6\]
+ gpio_defaults_block_27/gpio_defaults_high\[7\]
+ gpio_defaults_block_27/gpio_defaults_high\[8\]
+ gpio_defaults_block_27/gpio_defaults_high\[9\]
+ gpio_defaults_block_28/gpio_defaults_high\[0\]
+ gpio_defaults_block_28/gpio_defaults_low\[10\]
+ gpio_defaults_block_28/gpio_defaults_high\[11\]
+ gpio_defaults_block_28/gpio_defaults_high\[12\]
+ gpio_defaults_block_28/gpio_defaults_low\[1\]
+ gpio_defaults_block_28/gpio_defaults_high\[2\]
+ gpio_defaults_block_28/gpio_defaults_high\[3\]
+ gpio_defaults_block_28/gpio_defaults_high\[4\]
+ gpio_defaults_block_28/gpio_defaults_high\[5\]
+ gpio_defaults_block_28/gpio_defaults_high\[6\]
+ gpio_defaults_block_28/gpio_defaults_high\[7\]
+ gpio_defaults_block_28/gpio_defaults_high\[8\]
+ gpio_defaults_block_28/gpio_defaults_high\[9\]
+ gpio_defaults_block_25/gpio_defaults_low\[1\]
+ gpio_defaults_block_25/gpio_defaults_high\[2\]
+ gpio_defaults_block_25/gpio_defaults_high\[3\]
+ gpio_defaults_block_25/gpio_defaults_high\[4\]
+ gpio_defaults_block_25/gpio_defaults_high\[5\]
+ gpio_defaults_block_25/gpio_defaults_high\[6\]
+ gpio_defaults_block_25/gpio_defaults_high\[7\]
+ gpio_defaults_block_25/gpio_defaults_high\[9\]
+ gpio_defaults_block_26/gpio_defaults_high\[0\]
+ gpio_defaults_block_26/gpio_defaults_low\[10\]
+ gpio_defaults_block_26/gpio_defaults_high\[11\]
+ gpio_defaults_block_26/gpio_defaults_high\[12\]
+ gpio_defaults_block_26/gpio_defaults_low\[1\]
+ gpio_defaults_block_26/gpio_defaults_high\[3\]
+ gpio_defaults_block_26/gpio_defaults_high\[4\]
+ gpio_defaults_block_26/gpio_defaults_high\[5\]
+ gpio_defaults_block_26/gpio_defaults_high\[6\]
+ gpio_defaults_block_26/gpio_defaults_high\[7\]
+ gpio_defaults_block_26/gpio_defaults_high\[8\]
+ gpio_defaults_block_26/gpio_defaults_high\[9\]
+ gpio_defaults_block_27/gpio_defaults_high\[0\]
+ gpio_defaults_block_27/gpio_defaults_low\[10\]
+ gpio_defaults_block_27/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[9\]
+ gpio_defaults_block_30/gpio_defaults_high\[0\]
+ gpio_defaults_block_30/gpio_defaults_low\[10\]
+ gpio_defaults_block_30/gpio_defaults_high\[11\]
+ gpio_defaults_block_30/gpio_defaults_high\[12\]
+ gpio_defaults_block_30/gpio_defaults_low\[1\]
+ gpio_defaults_block_30/gpio_defaults_high\[3\]
+ gpio_defaults_block_30/gpio_defaults_high\[4\]
+ gpio_defaults_block_30/gpio_defaults_high\[5\]
+ gpio_defaults_block_30/gpio_defaults_high\[6\]
+ gpio_defaults_block_30/gpio_defaults_high\[7\]
+ gpio_defaults_block_30/gpio_defaults_high\[8\]
+ gpio_defaults_block_30/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_high\[0\]
+ gpio_defaults_block_31/gpio_defaults_low\[10\]
+ gpio_defaults_block_31/gpio_defaults_high\[11\]
+ gpio_defaults_block_31/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_high\[0\]
+ gpio_defaults_block_29/gpio_defaults_low\[10\]
+ gpio_defaults_block_29/gpio_defaults_high\[11\]
+ gpio_defaults_block_29/gpio_defaults_high\[12\]
+ gpio_defaults_block_29/gpio_defaults_low\[1\]
+ gpio_defaults_block_29/gpio_defaults_high\[2\]
+ gpio_defaults_block_29/gpio_defaults_high\[3\]
+ gpio_defaults_block_29/gpio_defaults_high\[4\]
+ gpio_defaults_block_29/gpio_defaults_high\[5\]
+ gpio_defaults_block_29/gpio_defaults_high\[6\]
+ gpio_defaults_block_29/gpio_defaults_high\[7\]
+ gpio_defaults_block_29/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[0\]
+ gpio_defaults_block_3/gpio_defaults_low\[10\]
+ gpio_defaults_block_3/gpio_defaults_high\[11\]
+ gpio_defaults_block_3/gpio_defaults_high\[12\]
+ gpio_defaults_block_3/gpio_defaults_low\[1\]
+ gpio_defaults_block_3/gpio_defaults_high\[2\]
+ gpio_defaults_block_3/gpio_defaults_high\[3\]
+ gpio_defaults_block_3/gpio_defaults_high\[4\]
+ gpio_defaults_block_3/gpio_defaults_high\[5\]
+ gpio_defaults_block_3/gpio_defaults_high\[6\]
+ gpio_defaults_block_3/gpio_defaults_high\[7\]
+ gpio_defaults_block_3/gpio_defaults_high\[8\]
+ gpio_defaults_block_3/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_low\[1\]
+ gpio_defaults_block_33/gpio_defaults_high\[9\]
+ gpio_defaults_block_34/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[0\]
+ gpio_defaults_block_32/gpio_defaults_high\[8\]
+ gpio_defaults_block_33/gpio_defaults_high\[11\]
+ gpio_defaults_block_33/gpio_defaults_high\[12\]
+ gpio_defaults_block_33/gpio_defaults_high\[2\]
+ gpio_defaults_block_33/gpio_defaults_high\[3\]
+ gpio_defaults_block_33/gpio_defaults_high\[5\]
+ gpio_defaults_block_33/gpio_defaults_high\[6\]
+ gpio_defaults_block_33/gpio_defaults_high\[7\]
+ gpio_defaults_block_33/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[0\]
+ gpio_defaults_block_34/gpio_defaults_low\[10\]
+ gpio_defaults_block_34/gpio_defaults_high\[11\]
+ gpio_defaults_block_34/gpio_defaults_high\[12\]
+ gpio_defaults_block_34/gpio_defaults_low\[1\]
+ gpio_defaults_block_34/gpio_defaults_high\[2\]
+ gpio_defaults_block_34/gpio_defaults_high\[3\]
+ gpio_defaults_block_34/gpio_defaults_high\[4\]
+ gpio_defaults_block_34/gpio_defaults_high\[6\]
+ gpio_defaults_block_34/gpio_defaults_high\[7\]
+ gpio_defaults_block_34/gpio_defaults_high\[8\]
+ gpio_defaults_block_34/gpio_defaults_high\[9\]
+ gpio_defaults_block_31/gpio_defaults_low\[1\]
+ gpio_defaults_block_31/gpio_defaults_high\[2\]
+ gpio_defaults_block_31/gpio_defaults_high\[3\]
+ gpio_defaults_block_31/gpio_defaults_high\[5\]
+ gpio_defaults_block_31/gpio_defaults_high\[6\]
+ gpio_defaults_block_31/gpio_defaults_high\[7\]
+ gpio_defaults_block_31/gpio_defaults_high\[8\]
+ gpio_defaults_block_31/gpio_defaults_high\[9\]
+ gpio_defaults_block_32/gpio_defaults_low\[10\]
+ gpio_defaults_block_32/gpio_defaults_high\[11\]
+ gpio_defaults_block_32/gpio_defaults_high\[12\]
+ gpio_defaults_block_32/gpio_defaults_high\[2\]
+ gpio_defaults_block_32/gpio_defaults_high\[3\]
+ gpio_defaults_block_32/gpio_defaults_high\[4\]
+ gpio_defaults_block_32/gpio_defaults_high\[5\]
+ gpio_defaults_block_32/gpio_defaults_high\[6\]
+ gpio_defaults_block_32/gpio_defaults_high\[7\]
+ gpio_defaults_block_32/gpio_defaults_high\[9\]
+ gpio_defaults_block_33/gpio_defaults_high\[0\]
+ gpio_defaults_block_33/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_low\[1\]
+ gpio_defaults_block_37/gpio_defaults_high\[9\]
+ gpio_defaults_block_35/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[2\]
+ gpio_defaults_block_36/gpio_defaults_high\[9\]
+ gpio_defaults_block_37/gpio_defaults_high\[0\]
+ gpio_defaults_block_37/gpio_defaults_low\[10\]
+ gpio_defaults_block_37/gpio_defaults_high\[11\]
+ gpio_defaults_block_37/gpio_defaults_high\[12\]
+ gpio_defaults_block_37/gpio_defaults_high\[2\]
+ gpio_defaults_block_37/gpio_defaults_high\[3\]
+ gpio_defaults_block_37/gpio_defaults_high\[4\]
+ gpio_defaults_block_37/gpio_defaults_high\[5\]
+ gpio_defaults_block_37/gpio_defaults_high\[6\]
+ gpio_defaults_block_37/gpio_defaults_high\[7\]
+ gpio_defaults_block_37/gpio_defaults_high\[8\]
+ gpio_defaults_block_4/gpio_defaults_high\[0\]
+ gpio_defaults_block_4/gpio_defaults_low\[10\]
+ gpio_defaults_block_4/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_high\[0\]
+ gpio_defaults_block_35/gpio_defaults_low\[10\]
+ gpio_defaults_block_35/gpio_defaults_high\[11\]
+ gpio_defaults_block_35/gpio_defaults_high\[12\]
+ gpio_defaults_block_35/gpio_defaults_low\[1\]
+ gpio_defaults_block_35/gpio_defaults_high\[2\]
+ gpio_defaults_block_35/gpio_defaults_high\[3\]
+ gpio_defaults_block_35/gpio_defaults_high\[4\]
+ gpio_defaults_block_35/gpio_defaults_high\[6\]
+ gpio_defaults_block_35/gpio_defaults_high\[7\]
+ gpio_defaults_block_35/gpio_defaults_high\[8\]
+ gpio_defaults_block_35/gpio_defaults_high\[9\]
+ gpio_defaults_block_36/gpio_defaults_high\[0\]
+ gpio_defaults_block_36/gpio_defaults_low\[10\]
+ gpio_defaults_block_36/gpio_defaults_high\[11\]
+ gpio_defaults_block_36/gpio_defaults_high\[12\]
+ gpio_defaults_block_36/gpio_defaults_low\[1\]
+ gpio_defaults_block_36/gpio_defaults_high\[3\]
+ gpio_defaults_block_36/gpio_defaults_high\[4\]
+ gpio_defaults_block_36/gpio_defaults_high\[5\]
+ gpio_defaults_block_36/gpio_defaults_high\[6\]
+ gpio_defaults_block_36/gpio_defaults_high\[7\]
+ gpio_defaults_block_36/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[11\]
+ gpio_defaults_block_4/gpio_defaults_high\[7\]
+ gpio_defaults_block_4/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[11\]
+ gpio_defaults_block_6/gpio_defaults_high\[12\]
+ gpio_defaults_block_6/gpio_defaults_low\[1\]
+ gpio_defaults_block_6/gpio_defaults_high\[2\]
+ gpio_defaults_block_6/gpio_defaults_high\[3\]
+ gpio_defaults_block_6/gpio_defaults_high\[4\]
+ gpio_defaults_block_6/gpio_defaults_high\[5\]
+ gpio_defaults_block_6/gpio_defaults_high\[6\]
+ gpio_defaults_block_6/gpio_defaults_high\[7\]
+ gpio_defaults_block_6/gpio_defaults_high\[8\]
+ gpio_defaults_block_6/gpio_defaults_high\[9\]
+ gpio_defaults_block_7/gpio_defaults_high\[0\]
+ gpio_defaults_block_7/gpio_defaults_low\[10\]
+ gpio_defaults_block_7/gpio_defaults_high\[12\]
+ gpio_defaults_block_7/gpio_defaults_low\[1\]
+ gpio_defaults_block_7/gpio_defaults_high\[2\]
+ gpio_defaults_block_7/gpio_defaults_high\[3\]
+ gpio_defaults_block_7/gpio_defaults_high\[4\]
+ gpio_defaults_block_7/gpio_defaults_high\[5\]
+ gpio_defaults_block_7/gpio_defaults_high\[6\]
+ gpio_defaults_block_7/gpio_defaults_high\[7\]
+ gpio_defaults_block_7/gpio_defaults_high\[8\]
+ gpio_defaults_block_7/gpio_defaults_high\[9\]
+ gpio_defaults_block_4/gpio_defaults_low\[1\]
+ gpio_defaults_block_4/gpio_defaults_high\[2\]
+ gpio_defaults_block_4/gpio_defaults_high\[3\]
+ gpio_defaults_block_4/gpio_defaults_high\[4\]
+ gpio_defaults_block_4/gpio_defaults_high\[5\]
+ gpio_defaults_block_4/gpio_defaults_high\[6\]
+ gpio_defaults_block_4/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[0\]
+ gpio_defaults_block_5/gpio_defaults_low\[10\]
+ gpio_defaults_block_5/gpio_defaults_high\[11\]
+ gpio_defaults_block_5/gpio_defaults_high\[12\]
+ gpio_defaults_block_5/gpio_defaults_low\[1\]
+ gpio_defaults_block_5/gpio_defaults_high\[2\]
+ gpio_defaults_block_5/gpio_defaults_high\[3\]
+ gpio_defaults_block_5/gpio_defaults_high\[4\]
+ gpio_defaults_block_5/gpio_defaults_high\[5\]
+ gpio_defaults_block_5/gpio_defaults_high\[6\]
+ gpio_defaults_block_5/gpio_defaults_high\[7\]
+ gpio_defaults_block_5/gpio_defaults_high\[8\]
+ gpio_defaults_block_5/gpio_defaults_high\[9\]
+ gpio_defaults_block_6/gpio_defaults_high\[0\]
+ gpio_defaults_block_6/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[11\]
+ gpio_defaults_block_8/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[0\]
+ gpio_defaults_block_9/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[0\]
+ gpio_defaults_block_8/gpio_defaults_low\[10\]
+ gpio_defaults_block_8/gpio_defaults_high\[12\]
+ gpio_defaults_block_8/gpio_defaults_low\[1\]
+ gpio_defaults_block_8/gpio_defaults_high\[2\]
+ gpio_defaults_block_8/gpio_defaults_high\[3\]
+ gpio_defaults_block_8/gpio_defaults_high\[4\]
+ gpio_defaults_block_8/gpio_defaults_high\[5\]
+ gpio_defaults_block_8/gpio_defaults_high\[6\]
+ gpio_defaults_block_8/gpio_defaults_high\[7\]
+ gpio_defaults_block_8/gpio_defaults_high\[9\]
+ gpio_defaults_block_9/gpio_defaults_low\[10\]
+ gpio_defaults_block_9/gpio_defaults_high\[11\]
+ gpio_defaults_block_9/gpio_defaults_high\[12\]
+ gpio_defaults_block_9/gpio_defaults_high\[2\]
+ gpio_defaults_block_9/gpio_defaults_high\[3\]
+ gpio_defaults_block_9/gpio_defaults_high\[4\]
+ gpio_defaults_block_9/gpio_defaults_high\[5\]
+ gpio_defaults_block_9/gpio_defaults_high\[6\]
+ gpio_defaults_block_9/gpio_defaults_high\[7\]
+ gpio_defaults_block_9/gpio_defaults_high\[8\]
+ gpio_defaults_block_9/gpio_defaults_high\[9\]
+ padframe/flash_io1_di_core
+ padframe/clock_core
+ padframe/mprj_analog_io[6]
+ padframe/gpio_in_core
+ padframe/flash_io1
+ padframe/mprj_analog_io[27]
+ padframe/mprj_analog_io[28]
+ padframe/mprj_analog_io[24]
+ padframe/mprj_analog_io[25]
+ padframe/mprj_analog_io[5]
+ padframe/mprj_analog_io[8]
+ padframe/mprj_analog_io[12]
+ padframe/mprj_analog_io[11]
+ padframe/mprj_analog_io[10]
+ padframe/mprj_analog_io[14]
+ padframe/mprj_analog_io[16]
+ padframe/mprj_analog_io[15]
+ padframe/mprj_analog_io[17]
+ padframe/mprj_analog_io[19]
+ padframe/mprj_analog_io[21]
+ padframe/mprj_analog_io[22]
+ padframe/mprj_analog_io[23]
+ padframe/mprj_io[28]
+ padframe/gpio
+ padframe/mprj_io[34]
+ padframe/flash_csb
+ padframe/mprj_analog_io[18]
+ padframe/mprj_analog_io[13]
+ padframe/mprj_io[8]
+ padframe/mprj_io[10]
+ padframe/mprj_io[21]
+ padframe/mprj_io[22]
+ padframe/clock
+ padframe/mprj_io[25]
+ padframe/mprj_analog_io[2]
+ padframe/mprj_io[17]
+ mprj/mprj/p[5]
+ padframe/mprj_io[0]
+ mprj/mprj/p[7]
+ mprj/mprj/p[6]
+ mprj/mprj/p[4]
+ padframe/mprj_io[9]
+ padframe/mprj_io[11]
+ padframe/mprj_io[33]
+ mgmt_buffers/mprj2_logic_high_inst/HI
+ mgmt_buffers/mprj_logic_high_inst/HI[462]
+ mgmt_buffers/mprj_logic_high_inst/HI[461]
+ mgmt_buffers/mprj_logic_high_inst/HI[460]
+ mgmt_buffers/mprj_logic_high_inst/HI[459]
+ mgmt_buffers/mprj_logic_high_inst/HI[458]
+ mgmt_buffers/mprj_logic_high_inst/HI[457]
+ mgmt_buffers/mprj_logic_high_inst/HI[456]
+ mgmt_buffers/mprj_logic_high_inst/HI[455]
+ mgmt_buffers/mprj_logic_high_inst/HI[454]
+ mgmt_buffers/mprj_logic_high_inst/HI[453]
+ mgmt_buffers/mprj_logic_high_inst/HI[452]
+ mgmt_buffers/mprj_logic_high_inst/HI[451]
+ mgmt_buffers/mprj_logic_high_inst/HI[450]
+ mgmt_buffers/mprj_logic_high_inst/HI[449]
+ mgmt_buffers/mprj_logic_high_inst/HI[448]
+ mgmt_buffers/mprj_logic_high_inst/HI[447]
+ mgmt_buffers/mprj_logic_high_inst/HI[446]
+ mgmt_buffers/mprj_logic_high_inst/HI[445]
+ mgmt_buffers/mprj_logic_high_inst/HI[444]
+ padframe/mprj_io[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[443]
+ mgmt_buffers/mprj_logic_high_inst/HI[442]
+ mgmt_buffers/mprj_logic_high_inst/HI[441]
+ mgmt_buffers/mprj_logic_high_inst/HI[440]
+ mgmt_buffers/mprj_logic_high_inst/HI[439]
+ mgmt_buffers/mprj_logic_high_inst/HI[438]
+ mgmt_buffers/mprj_logic_high_inst/HI[437]
+ mgmt_buffers/mprj_logic_high_inst/HI[436]
+ mgmt_buffers/mprj_logic_high_inst/HI[435]
+ mgmt_buffers/mprj_logic_high_inst/HI[434]
+ mgmt_buffers/mprj_logic_high_inst/HI[433]
+ mgmt_buffers/mprj_logic_high_inst/HI[432]
+ mgmt_buffers/mprj_logic_high_inst/HI[431]
+ mgmt_buffers/mprj_logic_high_inst/HI[430]
+ mgmt_buffers/mprj_logic_high_inst/HI[429]
+ mgmt_buffers/mprj_logic_high_inst/HI[428]
+ mgmt_buffers/mprj_logic_high_inst/HI[427]
+ mgmt_buffers/mprj_logic_high_inst/HI[426]
+ padframe/mprj_io[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[425]
+ mgmt_buffers/mprj_logic_high_inst/HI[424]
+ mgmt_buffers/mprj_logic_high_inst/HI[423]
+ mgmt_buffers/mprj_logic_high_inst/HI[422]
+ mgmt_buffers/mprj_logic_high_inst/HI[421]
+ mgmt_buffers/mprj_logic_high_inst/HI[420]
+ mgmt_buffers/mprj_logic_high_inst/HI[419]
+ mgmt_buffers/mprj_logic_high_inst/HI[418]
+ mgmt_buffers/mprj_logic_high_inst/HI[417]
+ mgmt_buffers/mprj_logic_high_inst/HI[416]
+ mgmt_buffers/mprj_logic_high_inst/HI[415]
+ mgmt_buffers/mprj_logic_high_inst/HI[414]
+ mgmt_buffers/mprj_logic_high_inst/HI[413]
+ mgmt_buffers/mprj_logic_high_inst/HI[412]
+ mgmt_buffers/mprj_logic_high_inst/HI[411]
+ mgmt_buffers/mprj_logic_high_inst/HI[410]
+ mgmt_buffers/mprj_logic_high_inst/HI[409]
+ mgmt_buffers/mprj_logic_high_inst/HI[408]
+ mgmt_buffers/mprj_logic_high_inst/HI[407]
+ mgmt_buffers/mprj_logic_high_inst/HI[406]
+ mgmt_buffers/mprj_logic_high_inst/HI[405]
+ mgmt_buffers/mprj_logic_high_inst/HI[404]
+ mgmt_buffers/mprj_logic_high_inst/HI[403]
+ mgmt_buffers/mprj_logic_high_inst/HI[402]
+ mgmt_buffers/mprj_logic_high_inst/HI[401]
+ mgmt_buffers/mprj_logic_high_inst/HI[400]
+ mgmt_buffers/mprj_logic_high_inst/HI[399]
+ mgmt_buffers/mprj_logic_high_inst/HI[398]
+ mgmt_buffers/mprj_logic_high_inst/HI[397]
+ mgmt_buffers/mprj_logic_high_inst/HI[396]
+ mgmt_buffers/mprj_logic_high_inst/HI[395]
+ mgmt_buffers/mprj_logic_high_inst/HI[394]
+ mgmt_buffers/mprj_logic_high_inst/HI[393]
+ mgmt_buffers/mprj_logic_high_inst/HI[392]
+ mgmt_buffers/mprj_logic_high_inst/HI[391]
+ mgmt_buffers/mprj_logic_high_inst/HI[390]
+ mgmt_buffers/mprj_logic_high_inst/HI[389]
+ mgmt_buffers/mprj_logic_high_inst/HI[388]
+ mgmt_buffers/mprj_logic_high_inst/HI[387]
+ mgmt_buffers/mprj_logic_high_inst/HI[386]
+ mgmt_buffers/mprj_logic_high_inst/HI[385]
+ mgmt_buffers/mprj_logic_high_inst/HI[384]
+ mgmt_buffers/mprj_logic_high_inst/HI[383]
+ mgmt_buffers/mprj_logic_high_inst/HI[382]
+ mgmt_buffers/mprj_logic_high_inst/HI[381]
+ mgmt_buffers/mprj_logic_high_inst/HI[380]
+ mgmt_buffers/mprj_logic_high_inst/HI[379]
+ mgmt_buffers/mprj_logic_high_inst/HI[378]
+ mgmt_buffers/mprj_logic_high_inst/HI[377]
+ mgmt_buffers/mprj_logic_high_inst/HI[376]
+ mgmt_buffers/mprj_logic_high_inst/HI[375]
+ mgmt_buffers/mprj_logic_high_inst/HI[374]
+ mgmt_buffers/mprj_logic_high_inst/HI[373]
+ mgmt_buffers/mprj_logic_high_inst/HI[372]
+ mgmt_buffers/mprj_logic_high_inst/HI[371]
+ mgmt_buffers/mprj_logic_high_inst/HI[370]
+ mgmt_buffers/mprj_logic_high_inst/HI[369]
+ mgmt_buffers/mprj_logic_high_inst/HI[368]
+ mgmt_buffers/mprj_logic_high_inst/HI[367]
+ mgmt_buffers/mprj_logic_high_inst/HI[366]
+ mgmt_buffers/mprj_logic_high_inst/HI[365]
+ mgmt_buffers/mprj_logic_high_inst/HI[364]
+ mgmt_buffers/mprj_logic_high_inst/HI[363]
+ padframe/mprj_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[362]
+ mgmt_buffers/mprj_logic_high_inst/HI[361]
+ mgmt_buffers/mprj_logic_high_inst/HI[360]
+ mgmt_buffers/mprj_logic_high_inst/HI[359]
+ mgmt_buffers/mprj_logic_high_inst/HI[358]
+ mgmt_buffers/mprj_logic_high_inst/HI[357]
+ mgmt_buffers/mprj_logic_high_inst/HI[356]
+ mgmt_buffers/mprj_logic_high_inst/HI[355]
+ mgmt_buffers/mprj_logic_high_inst/HI[354]
+ mgmt_buffers/mprj_logic_high_inst/HI[353]
+ mgmt_buffers/mprj_logic_high_inst/HI[352]
+ mgmt_buffers/mprj_logic_high_inst/HI[351]
+ mgmt_buffers/mprj_logic_high_inst/HI[350]
+ mgmt_buffers/mprj_logic_high_inst/HI[349]
+ mgmt_buffers/mprj_logic_high_inst/HI[348]
+ mgmt_buffers/mprj_logic_high_inst/HI[347]
+ mgmt_buffers/mprj_logic_high_inst/HI[346]
+ mgmt_buffers/mprj_logic_high_inst/HI[345]
+ mgmt_buffers/mprj_logic_high_inst/HI[344]
+ mgmt_buffers/mprj_logic_high_inst/HI[343]
+ mgmt_buffers/mprj_logic_high_inst/HI[342]
+ mgmt_buffers/mprj_logic_high_inst/HI[341]
+ mgmt_buffers/mprj_logic_high_inst/HI[340]
+ mgmt_buffers/mprj_logic_high_inst/HI[339]
+ mgmt_buffers/mprj_logic_high_inst/HI[338]
+ mgmt_buffers/mprj_logic_high_inst/HI[337]
+ mgmt_buffers/mprj_logic_high_inst/HI[336]
+ mgmt_buffers/mprj_logic_high_inst/HI[335]
+ mgmt_buffers/mprj_logic_high_inst/HI[334]
+ mgmt_buffers/mprj_logic_high_inst/HI[333]
+ mgmt_buffers/mprj_logic_high_inst/HI[332]
+ mgmt_buffers/mprj_logic_high_inst/HI[331]
+ mgmt_buffers/mprj_logic_high_inst/HI[330]
+ mgmt_buffers/mprj_logic_high_inst/HI[329]
+ mgmt_buffers/mprj_logic_high_inst/HI[328]
+ mgmt_buffers/mprj_logic_high_inst/HI[327]
+ mgmt_buffers/mprj_logic_high_inst/HI[326]
+ mgmt_buffers/mprj_logic_high_inst/HI[325]
+ mgmt_buffers/mprj_logic_high_inst/HI[324]
+ mgmt_buffers/mprj_logic_high_inst/HI[323]
+ mgmt_buffers/mprj_logic_high_inst/HI[322]
+ padframe/mprj_io[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[321]
+ mgmt_buffers/mprj_logic_high_inst/HI[320]
+ mgmt_buffers/mprj_logic_high_inst/HI[319]
+ mgmt_buffers/mprj_logic_high_inst/HI[318]
+ mgmt_buffers/mprj_logic_high_inst/HI[317]
+ mgmt_buffers/mprj_logic_high_inst/HI[316]
+ mgmt_buffers/mprj_logic_high_inst/HI[315]
+ mgmt_buffers/mprj_logic_high_inst/HI[314]
+ mgmt_buffers/mprj_logic_high_inst/HI[313]
+ mgmt_buffers/mprj_logic_high_inst/HI[312]
+ mgmt_buffers/mprj_logic_high_inst/HI[311]
+ mgmt_buffers/mprj_logic_high_inst/HI[310]
+ mgmt_buffers/mprj_logic_high_inst/HI[309]
+ mgmt_buffers/mprj_logic_high_inst/HI[308]
+ mgmt_buffers/mprj_logic_high_inst/HI[307]
+ mgmt_buffers/mprj_logic_high_inst/HI[306]
+ mgmt_buffers/mprj_logic_high_inst/HI[305]
+ mgmt_buffers/mprj_logic_high_inst/HI[304]
+ mgmt_buffers/mprj_logic_high_inst/HI[303]
+ mgmt_buffers/mprj_logic_high_inst/HI[302]
+ mgmt_buffers/mprj_logic_high_inst/HI[301]
+ mgmt_buffers/mprj_logic_high_inst/HI[300]
+ mgmt_buffers/mprj_logic_high_inst/HI[299]
+ mgmt_buffers/mprj_logic_high_inst/HI[298]
+ mgmt_buffers/mprj_logic_high_inst/HI[297]
+ mgmt_buffers/mprj_logic_high_inst/HI[296]
+ mgmt_buffers/mprj_logic_high_inst/HI[295]
+ mgmt_buffers/mprj_logic_high_inst/HI[294]
+ mgmt_buffers/mprj_logic_high_inst/HI[293]
+ mgmt_buffers/mprj_logic_high_inst/HI[292]
+ mgmt_buffers/mprj_logic_high_inst/HI[291]
+ padframe/mprj_analog_io[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[290]
+ mgmt_buffers/mprj_logic_high_inst/HI[289]
+ mgmt_buffers/mprj_logic_high_inst/HI[288]
+ mgmt_buffers/mprj_logic_high_inst/HI[287]
+ mgmt_buffers/mprj_logic_high_inst/HI[286]
+ mgmt_buffers/mprj_logic_high_inst/HI[285]
+ mgmt_buffers/mprj_logic_high_inst/HI[284]
+ mgmt_buffers/mprj_logic_high_inst/HI[283]
+ mgmt_buffers/mprj_logic_high_inst/HI[282]
+ mgmt_buffers/mprj_logic_high_inst/HI[281]
+ mgmt_buffers/mprj_logic_high_inst/HI[280]
+ mgmt_buffers/mprj_logic_high_inst/HI[279]
+ mgmt_buffers/mprj_logic_high_inst/HI[278]
+ mgmt_buffers/mprj_logic_high_inst/HI[277]
+ mgmt_buffers/mprj_logic_high_inst/HI[276]
+ mgmt_buffers/mprj_logic_high_inst/HI[275]
+ mgmt_buffers/mprj_logic_high_inst/HI[274]
+ mgmt_buffers/mprj_logic_high_inst/HI[273]
+ mgmt_buffers/mprj_logic_high_inst/HI[272]
+ mgmt_buffers/mprj_logic_high_inst/HI[271]
+ mgmt_buffers/mprj_logic_high_inst/HI[270]
+ mgmt_buffers/mprj_logic_high_inst/HI[269]
+ padframe/mprj_analog_io[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[268]
+ mgmt_buffers/mprj_logic_high_inst/HI[267]
+ mgmt_buffers/mprj_logic_high_inst/HI[266]
+ mgmt_buffers/mprj_logic_high_inst/HI[265]
+ mgmt_buffers/mprj_logic_high_inst/HI[264]
+ mgmt_buffers/mprj_logic_high_inst/HI[263]
+ mgmt_buffers/mprj_logic_high_inst/HI[262]
+ mgmt_buffers/mprj_logic_high_inst/HI[261]
+ mgmt_buffers/mprj_logic_high_inst/HI[260]
+ mgmt_buffers/mprj_logic_high_inst/HI[259]
+ mgmt_buffers/mprj_logic_high_inst/HI[258]
+ mgmt_buffers/mprj_logic_high_inst/HI[257]
+ mgmt_buffers/mprj_logic_high_inst/HI[256]
+ mgmt_buffers/mprj_logic_high_inst/HI[255]
+ mgmt_buffers/mprj_logic_high_inst/HI[254]
+ mgmt_buffers/mprj_logic_high_inst/HI[253]
+ mgmt_buffers/mprj_logic_high_inst/HI[252]
+ mgmt_buffers/mprj_logic_high_inst/HI[251]
+ mgmt_buffers/mprj_logic_high_inst/HI[250]
+ mgmt_buffers/mprj_logic_high_inst/HI[249]
+ mgmt_buffers/mprj_logic_high_inst/HI[248]
+ mgmt_buffers/mprj_logic_high_inst/HI[247]
+ mgmt_buffers/mprj_logic_high_inst/HI[246]
+ mgmt_buffers/mprj_logic_high_inst/HI[245]
+ mgmt_buffers/mprj_logic_high_inst/HI[244]
+ mgmt_buffers/mprj_logic_high_inst/HI[243]
+ mgmt_buffers/mprj_logic_high_inst/HI[242]
+ mgmt_buffers/mprj_logic_high_inst/HI[241]
+ mgmt_buffers/mprj_logic_high_inst/HI[240]
+ mgmt_buffers/mprj_logic_high_inst/HI[239]
+ mgmt_buffers/mprj_logic_high_inst/HI[238]
+ mgmt_buffers/mprj_logic_high_inst/HI[237]
+ mgmt_buffers/mprj_logic_high_inst/HI[236]
+ mgmt_buffers/mprj_logic_high_inst/HI[235]
+ mgmt_buffers/mprj_logic_high_inst/HI[234]
+ mgmt_buffers/mprj_logic_high_inst/HI[233]
+ mgmt_buffers/mprj_logic_high_inst/HI[232]
+ mgmt_buffers/mprj_logic_high_inst/HI[231]
+ mgmt_buffers/mprj_logic_high_inst/HI[230]
+ mgmt_buffers/mprj_logic_high_inst/HI[229]
+ mgmt_buffers/mprj_logic_high_inst/HI[228]
+ padframe/mprj_analog_io[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[227]
+ mgmt_buffers/mprj_logic_high_inst/HI[226]
+ mgmt_buffers/mprj_logic_high_inst/HI[225]
+ mgmt_buffers/mprj_logic_high_inst/HI[224]
+ mgmt_buffers/mprj_logic_high_inst/HI[223]
+ mgmt_buffers/mprj_logic_high_inst/HI[222]
+ mgmt_buffers/mprj_logic_high_inst/HI[221]
+ mgmt_buffers/mprj_logic_high_inst/HI[220]
+ mgmt_buffers/mprj_logic_high_inst/HI[219]
+ mgmt_buffers/mprj_logic_high_inst/HI[218]
+ mgmt_buffers/mprj_logic_high_inst/HI[217]
+ mgmt_buffers/mprj_logic_high_inst/HI[216]
+ mgmt_buffers/mprj_logic_high_inst/HI[215]
+ mgmt_buffers/mprj_logic_high_inst/HI[214]
+ mgmt_buffers/mprj_logic_high_inst/HI[213]
+ mgmt_buffers/mprj_logic_high_inst/HI[212]
+ mgmt_buffers/mprj_logic_high_inst/HI[211]
+ mgmt_buffers/mprj_logic_high_inst/HI[210]
+ mgmt_buffers/mprj_logic_high_inst/HI[209]
+ mgmt_buffers/mprj_logic_high_inst/HI[208]
+ mgmt_buffers/mprj_logic_high_inst/HI[207]
+ mgmt_buffers/mprj_logic_high_inst/HI[206]
+ mgmt_buffers/mprj_logic_high_inst/HI[205]
+ mgmt_buffers/mprj_logic_high_inst/HI[204]
+ mgmt_buffers/mprj_logic_high_inst/HI[203]
+ mgmt_buffers/mprj_logic_high_inst/HI[202]
+ mgmt_buffers/mprj_logic_high_inst/HI[201]
+ mgmt_buffers/mprj_logic_high_inst/HI[200]
+ mgmt_buffers/mprj_logic_high_inst/HI[199]
+ mgmt_buffers/mprj_logic_high_inst/HI[198]
+ mgmt_buffers/mprj_logic_high_inst/HI[197]
+ mgmt_buffers/mprj_logic_high_inst/HI[196]
+ mgmt_buffers/mprj_logic_high_inst/HI[195]
+ mgmt_buffers/mprj_logic_high_inst/HI[194]
+ mgmt_buffers/mprj_logic_high_inst/HI[193]
+ mgmt_buffers/mprj_logic_high_inst/HI[192]
+ mgmt_buffers/mprj_logic_high_inst/HI[191]
+ mgmt_buffers/mprj_logic_high_inst/HI[190]
+ mgmt_buffers/mprj_logic_high_inst/HI[189]
+ mgmt_buffers/mprj_logic_high_inst/HI[188]
+ padframe/mprj_io[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[187]
+ mgmt_buffers/mprj_logic_high_inst/HI[186]
+ mgmt_buffers/mprj_logic_high_inst/HI[185]
+ mgmt_buffers/mprj_logic_high_inst/HI[184]
+ mgmt_buffers/mprj_logic_high_inst/HI[183]
+ mgmt_buffers/mprj_logic_high_inst/HI[182]
+ mgmt_buffers/mprj_logic_high_inst/HI[181]
+ mgmt_buffers/mprj_logic_high_inst/HI[180]
+ mgmt_buffers/mprj_logic_high_inst/HI[179]
+ mgmt_buffers/mprj_logic_high_inst/HI[178]
+ mgmt_buffers/mprj_logic_high_inst/HI[177]
+ mgmt_buffers/mprj_logic_high_inst/HI[176]
+ mgmt_buffers/mprj_logic_high_inst/HI[175]
+ mgmt_buffers/mprj_logic_high_inst/HI[174]
+ mgmt_buffers/mprj_logic_high_inst/HI[173]
+ mgmt_buffers/mprj_logic_high_inst/HI[172]
+ mgmt_buffers/mprj_logic_high_inst/HI[171]
+ mgmt_buffers/mprj_logic_high_inst/HI[170]
+ mgmt_buffers/mprj_logic_high_inst/HI[169]
+ mgmt_buffers/mprj_logic_high_inst/HI[168]
+ mgmt_buffers/mprj_logic_high_inst/HI[167]
+ mgmt_buffers/mprj_logic_high_inst/HI[166]
+ mgmt_buffers/mprj_logic_high_inst/HI[165]
+ mgmt_buffers/mprj_logic_high_inst/HI[164]
+ mgmt_buffers/mprj_logic_high_inst/HI[163]
+ mgmt_buffers/mprj_logic_high_inst/HI[162]
+ mgmt_buffers/mprj_logic_high_inst/HI[161]
+ mgmt_buffers/mprj_logic_high_inst/HI[160]
+ mgmt_buffers/mprj_logic_high_inst/HI[159]
+ mgmt_buffers/mprj_logic_high_inst/HI[158]
+ mgmt_buffers/mprj_logic_high_inst/HI[157]
+ mgmt_buffers/mprj_logic_high_inst/HI[156]
+ mgmt_buffers/mprj_logic_high_inst/HI[155]
+ mgmt_buffers/mprj_logic_high_inst/HI[154]
+ mgmt_buffers/mprj_logic_high_inst/HI[153]
+ mgmt_buffers/mprj_logic_high_inst/HI[152]
+ mgmt_buffers/mprj_logic_high_inst/HI[151]
+ mgmt_buffers/mprj_logic_high_inst/HI[150]
+ mgmt_buffers/mprj_logic_high_inst/HI[149]
+ mgmt_buffers/mprj_logic_high_inst/HI[148]
+ mgmt_buffers/mprj_logic_high_inst/HI[147]
+ mgmt_buffers/mprj_logic_high_inst/HI[146]
+ mgmt_buffers/mprj_logic_high_inst/HI[145]
+ mgmt_buffers/mprj_logic_high_inst/HI[144]
+ mgmt_buffers/mprj_logic_high_inst/HI[143]
+ mgmt_buffers/mprj_logic_high_inst/HI[142]
+ mgmt_buffers/mprj_logic_high_inst/HI[141]
+ mgmt_buffers/mprj_logic_high_inst/HI[140]
+ mgmt_buffers/mprj_logic_high_inst/HI[139]
+ mgmt_buffers/mprj_logic_high_inst/HI[138]
+ padframe/mprj_analog_io[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[137]
+ mgmt_buffers/mprj_logic_high_inst/HI[136]
+ mgmt_buffers/mprj_logic_high_inst/HI[135]
+ mgmt_buffers/mprj_logic_high_inst/HI[134]
+ mgmt_buffers/mprj_logic_high_inst/HI[133]
+ mgmt_buffers/mprj_logic_high_inst/HI[132]
+ mgmt_buffers/mprj_logic_high_inst/HI[131]
+ mgmt_buffers/mprj_logic_high_inst/HI[130]
+ mgmt_buffers/mprj_logic_high_inst/HI[129]
+ mgmt_buffers/mprj_logic_high_inst/HI[128]
+ mgmt_buffers/mprj_logic_high_inst/HI[127]
+ mgmt_buffers/mprj_logic_high_inst/HI[126]
+ mgmt_buffers/mprj_logic_high_inst/HI[125]
+ mgmt_buffers/mprj_logic_high_inst/HI[124]
+ mgmt_buffers/mprj_logic_high_inst/HI[123]
+ mgmt_buffers/mprj_logic_high_inst/HI[122]
+ mgmt_buffers/mprj_logic_high_inst/HI[121]
+ mgmt_buffers/mprj_logic_high_inst/HI[120]
+ mgmt_buffers/mprj_logic_high_inst/HI[119]
+ mgmt_buffers/mprj_logic_high_inst/HI[118]
+ mgmt_buffers/mprj_logic_high_inst/HI[117]
+ mgmt_buffers/mprj_logic_high_inst/HI[116]
+ mgmt_buffers/mprj_logic_high_inst/HI[115]
+ mgmt_buffers/mprj_logic_high_inst/HI[114]
+ mgmt_buffers/mprj_logic_high_inst/HI[113]
+ mgmt_buffers/mprj_logic_high_inst/HI[112]
+ mgmt_buffers/mprj_logic_high_inst/HI[111]
+ mgmt_buffers/mprj_logic_high_inst/HI[110]
+ mgmt_buffers/mprj_logic_high_inst/HI[109]
+ mgmt_buffers/mprj_logic_high_inst/HI[108]
+ mgmt_buffers/mprj_logic_high_inst/HI[107]
+ mgmt_buffers/mprj_logic_high_inst/HI[106]
+ mgmt_buffers/mprj_logic_high_inst/HI[105]
+ mgmt_buffers/mprj_logic_high_inst/HI[104]
+ mgmt_buffers/mprj_logic_high_inst/HI[103]
+ mgmt_buffers/mprj_logic_high_inst/HI[102]
+ mgmt_buffers/mprj_logic_high_inst/HI[101]
+ mgmt_buffers/mprj_logic_high_inst/HI[100]
+ mgmt_buffers/mprj_logic_high_inst/HI[99]
+ mgmt_buffers/mprj_logic_high_inst/HI[98]
+ mgmt_buffers/mprj_logic_high_inst/HI[97]
+ mgmt_buffers/mprj_logic_high_inst/HI[96]
+ mgmt_buffers/mprj_logic_high_inst/HI[95]
+ mgmt_buffers/mprj_logic_high_inst/HI[94]
+ mgmt_buffers/mprj_logic_high_inst/HI[93]
+ mgmt_buffers/mprj_logic_high_inst/HI[92]
+ mgmt_buffers/mprj_logic_high_inst/HI[91]
+ padframe/mprj_io[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[90]
+ mgmt_buffers/mprj_logic_high_inst/HI[89]
+ mgmt_buffers/mprj_logic_high_inst/HI[88]
+ mgmt_buffers/mprj_logic_high_inst/HI[87]
+ mgmt_buffers/mprj_logic_high_inst/HI[86]
+ mgmt_buffers/mprj_logic_high_inst/HI[85]
+ mgmt_buffers/mprj_logic_high_inst/HI[84]
+ mgmt_buffers/mprj_logic_high_inst/HI[83]
+ mgmt_buffers/mprj_logic_high_inst/HI[82]
+ mgmt_buffers/mprj_logic_high_inst/HI[81]
+ mgmt_buffers/mprj_logic_high_inst/HI[80]
+ mgmt_buffers/mprj_logic_high_inst/HI[79]
+ mgmt_buffers/mprj_logic_high_inst/HI[78]
+ mgmt_buffers/mprj_logic_high_inst/HI[77]
+ mgmt_buffers/mprj_logic_high_inst/HI[76]
+ mgmt_buffers/mprj_logic_high_inst/HI[75]
+ mgmt_buffers/mprj_logic_high_inst/HI[74]
+ mgmt_buffers/mprj_logic_high_inst/HI[73]
+ mgmt_buffers/mprj_logic_high_inst/HI[72]
+ mgmt_buffers/mprj_logic_high_inst/HI[71]
+ mgmt_buffers/mprj_logic_high_inst/HI[70]
+ mgmt_buffers/mprj_logic_high_inst/HI[69]
+ padframe/mprj_io[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[68]
+ mgmt_buffers/mprj_logic_high_inst/HI[67]
+ mgmt_buffers/mprj_logic_high_inst/HI[66]
+ mgmt_buffers/mprj_logic_high_inst/HI[65]
+ mgmt_buffers/mprj_logic_high_inst/HI[64]
+ mgmt_buffers/mprj_logic_high_inst/HI[63]
+ mgmt_buffers/mprj_logic_high_inst/HI[62]
+ mgmt_buffers/mprj_logic_high_inst/HI[61]
+ mgmt_buffers/mprj_logic_high_inst/HI[60]
+ mgmt_buffers/mprj_logic_high_inst/HI[59]
+ mgmt_buffers/mprj_logic_high_inst/HI[58]
+ mgmt_buffers/mprj_logic_high_inst/HI[57]
+ mgmt_buffers/mprj_logic_high_inst/HI[56]
+ mgmt_buffers/mprj_logic_high_inst/HI[55]
+ mgmt_buffers/mprj_logic_high_inst/HI[54]
+ mgmt_buffers/mprj_logic_high_inst/HI[53]
+ mgmt_buffers/mprj_logic_high_inst/HI[52]
+ mgmt_buffers/mprj_logic_high_inst/HI[51]
+ mgmt_buffers/mprj_logic_high_inst/HI[50]
+ mgmt_buffers/mprj_logic_high_inst/HI[49]
+ mgmt_buffers/mprj_logic_high_inst/HI[48]
+ mgmt_buffers/mprj_logic_high_inst/HI[47]
+ mgmt_buffers/mprj_logic_high_inst/HI[46]
+ mgmt_buffers/mprj_logic_high_inst/HI[45]
+ mgmt_buffers/mprj_logic_high_inst/HI[44]
+ mgmt_buffers/mprj_logic_high_inst/HI[43]
+ mgmt_buffers/mprj_logic_high_inst/HI[42]
+ mgmt_buffers/mprj_logic_high_inst/HI[41]
+ mgmt_buffers/mprj_logic_high_inst/HI[40]
+ mgmt_buffers/mprj_logic_high_inst/HI[39]
+ mgmt_buffers/mprj_logic_high_inst/HI[38]
+ mgmt_buffers/mprj_logic_high_inst/HI[37]
+ mgmt_buffers/mprj_logic_high_inst/HI[36]
+ mgmt_buffers/mprj_logic_high_inst/HI[35]
+ mgmt_buffers/mprj_logic_high_inst/HI[34]
+ mgmt_buffers/mprj_logic_high_inst/HI[33]
+ mgmt_buffers/mprj_logic_high_inst/HI[32]
+ mgmt_buffers/mprj_logic_high_inst/HI[31]
+ mgmt_buffers/mprj_logic_high_inst/HI[30]
+ mgmt_buffers/mprj_logic_high_inst/HI[29]
+ mgmt_buffers/mprj_logic_high_inst/HI[28]
+ mgmt_buffers/mprj_logic_high_inst/HI[27]
+ mgmt_buffers/mprj_logic_high_inst/HI[26]
+ mgmt_buffers/mprj_logic_high_inst/HI[25]
+ mgmt_buffers/mprj_logic_high_inst/HI[24]
+ mgmt_buffers/mprj_logic_high_inst/HI[23]
+ mgmt_buffers/mprj_logic_high_inst/HI[22]
+ mgmt_buffers/mprj_logic_high_inst/HI[21]
+ mgmt_buffers/mprj_logic_high_inst/HI[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[19]
+ mgmt_buffers/mprj_logic_high_inst/HI[18]
+ mgmt_buffers/mprj_logic_high_inst/HI[17]
+ mgmt_buffers/mprj_logic_high_inst/HI[16]
+ padframe/mprj_analog_io[20]
+ mgmt_buffers/mprj_logic_high_inst/HI[15]
+ mgmt_buffers/mprj_logic_high_inst/HI[14]
+ mgmt_buffers/mprj_logic_high_inst/HI[13]
+ mgmt_buffers/mprj_logic_high_inst/HI[12]
+ mgmt_buffers/mprj_logic_high_inst/HI[11]
+ mgmt_buffers/mprj_logic_high_inst/HI[10]
+ mgmt_buffers/mprj_logic_high_inst/HI[9]
+ mgmt_buffers/mprj_logic_high_inst/HI[8]
+ mgmt_buffers/mprj_logic_high_inst/HI[7]
+ mgmt_buffers/mprj_logic_high_inst/HI[6]
+ mgmt_buffers/mprj_logic_high_inst/HI[5]
+ mgmt_buffers/mprj_logic_high_inst/HI[4]
+ mgmt_buffers/mprj_logic_high_inst/HI[3]
+ mgmt_buffers/mprj_logic_high_inst/HI[2]
+ mgmt_buffers/mprj_logic_high_inst/HI[1]
+ mgmt_buffers/mprj_logic_high_inst/HI[0]
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1
+ mgmt_buffers/powergood_check/mprj_vdd_logic1
+ mgmt_buffers/powergood_check/mprj2_vdd_logic1_h
+ mgmt_buffers/powergood_check/mprj_vdd_logic1_h
+ padframe/mprj_io[35]
+ mprj/mprj/p[3]
+ mprj/mprj/p[2]
+ mprj/mprj/p[1]
+ mprj/mprj/p[0]
+ padframe/mprj_io[30]
+ padframe/mprj_io[14]
+ padframe/mprj_io[13]
+ padframe/mprj_io[12]
+ padframe/mprj_io[19]
+ padframe/mprj_analog_io[0]
+ padframe/mprj_io[36]
+ padframe/mprj_io[32]
+ padframe/mprj_io[29]
+ padframe/mprj_io[31]
+ padframe/mprj_io[15]
+ padframe/mprj_io[16]
+ padframe/mprj_io[1]
+ padframe/mprj_io[2]
+ padframe/mprj_io[3]
+ padframe/mprj_io[4]
+ padframe/mprj_io[5]
+ padframe/mprj_io[6]
+ padframe/mprj_io[7]
+ padframe/resetb
+ padframe/resetb_core_h
+ padframe/vccd1_pad
+ padframe/vccd2_pad
+ padframe/vccd_pad
+ padframe/vdda1_pad
+ padframe/vdda1_pad2
+ padframe/vdda2_pad
+ padframe/vdda_pad
+ padframe/vddio_pad
+ padframe/vddio_pad2
+ padframe/vssa1_pad
+ padframe/vssa1_pad2
+ padframe/vssa2_pad
+ padframe/vssa_pad
+ padframe/vssd1_pad
+ padframe/vssd2_pad
+ padframe/vssd_pad
+ padframe/vssio_pad
+ padframe/vssio_pad2
+ padframe/mprj_pads.analog_a
+ padframe/mprj_pads.analog_b
+ padframe/loop_zero_clock
+ padframe/loop_one_clock
+ padframe/loop_zero_flash_clk
+ padframe/loop_one_flash_clk
+ padframe/loop_zero_flash_csb
+ padframe/loop_one_flash_csb
+ padframe/loop_zero_flash_io0
+ padframe/loop_one_flash_io0
+ padframe/loop_zero_flash_io1
+ padframe/loop_one_flash_io1
+ padframe/loop_zero_gpio
+ padframe/loop_one_gpio
+ padframe/mprj_pads.loop0_io\[0\]
+ padframe/mprj_pads.loop1_io\[0\]
+ padframe/mprj_pads.io_in\[0\]
+ padframe/mprj_pads.io_in_3v3\[0\]
+ padframe/mprj_pads.no_connect_1b\[0\]
+ padframe/mprj_pads.no_connect_1a\[0\]
+ padframe/mprj_pads.loop0_io\[10\]
+ padframe/mprj_pads.loop1_io\[10\]
+ padframe/mprj_pads.io_in\[10\]
+ padframe/mprj_pads.io_in_3v3\[10\]
+ padframe/mprj_pads.analog_noesd_io\[3\]
+ padframe/mprj_pads.loop0_io\[11\]
+ padframe/mprj_pads.loop1_io\[11\]
+ padframe/mprj_pads.io_in\[11\]
+ padframe/mprj_pads.io_in_3v3\[11\]
+ padframe/mprj_pads.analog_noesd_io\[4\]
+ padframe/mprj_pads.loop0_io\[12\]
+ padframe/mprj_pads.loop1_io\[12\]
+ padframe/mprj_pads.io_in\[12\]
+ padframe/mprj_pads.io_in_3v3\[12\]
+ padframe/mprj_pads.analog_noesd_io\[5\]
+ padframe/mprj_pads.loop0_io\[13\]
+ padframe/mprj_pads.loop1_io\[13\]
+ padframe/mprj_pads.io_in\[13\]
+ padframe/mprj_pads.io_in_3v3\[13\]
+ padframe/mprj_pads.analog_noesd_io\[6\]
+ padframe/mprj_pads.loop0_io\[14\]
+ padframe/mprj_pads.loop1_io\[14\]
+ padframe/mprj_pads.io_in\[14\]
+ padframe/mprj_pads.io_in_3v3\[14\]
+ padframe/mprj_pads.analog_noesd_io\[7\]
+ padframe/mprj_pads.loop0_io\[15\]
+ padframe/mprj_pads.loop1_io\[15\]
+ padframe/mprj_pads.io_in\[15\]
+ padframe/mprj_pads.io_in_3v3\[15\]
+ padframe/mprj_pads.analog_noesd_io\[8\]
+ padframe/mprj_pads.loop0_io\[16\]
+ padframe/mprj_pads.loop1_io\[16\]
+ padframe/mprj_pads.io_in\[16\]
+ padframe/mprj_pads.io_in_3v3\[16\]
+ padframe/mprj_pads.analog_noesd_io\[9\]
+ padframe/mprj_pads.loop0_io\[17\]
+ padframe/mprj_pads.loop1_io\[17\]
+ padframe/mprj_pads.io_in\[17\]
+ padframe/mprj_pads.io_in_3v3\[17\]
+ padframe/mprj_pads.analog_noesd_io\[10\]
+ padframe/mprj_pads.loop0_io\[18\]
+ padframe/mprj_pads.loop1_io\[18\]
+ padframe/mprj_pads.io_in\[18\]
+ padframe/mprj_pads.io_in_3v3\[18\]
+ padframe/mprj_pads.analog_noesd_io\[11\]
+ padframe/mprj_pads.loop0_io\[1\]
+ padframe/mprj_pads.loop1_io\[1\]
+ padframe/mprj_pads.io_in\[1\]
+ padframe/mprj_pads.io_in_3v3\[1\]
+ padframe/mprj_pads.no_connect_1b\[1\]
+ padframe/mprj_pads.no_connect_1a\[1\]
+ padframe/mprj_pads.loop0_io\[2\]
+ padframe/mprj_pads.loop1_io\[2\]
+ padframe/mprj_pads.io_in\[2\]
+ padframe/mprj_pads.io_in_3v3\[2\]
+ padframe/mprj_pads.no_connect_1b\[2\]
+ padframe/mprj_pads.no_connect_1a\[2\]
+ padframe/mprj_pads.loop0_io\[3\]
+ padframe/mprj_pads.loop1_io\[3\]
+ padframe/mprj_pads.io_in\[3\]
+ padframe/mprj_pads.io_in_3v3\[3\]
+ padframe/mprj_pads.no_connect_1b\[3\]
+ padframe/mprj_pads.no_connect_1a\[3\]
+ padframe/mprj_pads.loop0_io\[4\]
+ padframe/mprj_pads.loop1_io\[4\]
+ padframe/mprj_pads.io_in\[4\]
+ padframe/mprj_pads.io_in_3v3\[4\]
+ padframe/mprj_pads.no_connect_1b\[4\]
+ padframe/mprj_pads.no_connect_1a\[4\]
+ padframe/mprj_pads.loop0_io\[5\]
+ padframe/mprj_pads.loop1_io\[5\]
+ padframe/mprj_pads.io_in\[5\]
+ padframe/mprj_pads.io_in_3v3\[5\]
+ padframe/mprj_pads.no_connect_1b\[5\]
+ padframe/mprj_pads.no_connect_1a\[5\]
+ padframe/mprj_pads.loop0_io\[6\]
+ padframe/mprj_pads.loop1_io\[6\]
+ padframe/mprj_pads.io_in\[6\]
+ padframe/mprj_pads.io_in_3v3\[6\]
+ padframe/mprj_pads.no_connect_1b\[6\]
+ padframe/mprj_pads.no_connect_1a\[6\]
+ padframe/mprj_pads.loop0_io\[7\]
+ padframe/mprj_pads.loop1_io\[7\]
+ padframe/mprj_pads.io_in\[7\]
+ padframe/mprj_pads.io_in_3v3\[7\]
+ padframe/mprj_pads.analog_noesd_io\[0\]
+ padframe/mprj_pads.loop0_io\[8\]
+ padframe/mprj_pads.loop1_io\[8\]
+ padframe/mprj_pads.io_in\[8\]
+ padframe/mprj_pads.io_in_3v3\[8\]
+ padframe/mprj_pads.analog_noesd_io\[1\]
+ padframe/mprj_pads.loop0_io\[9\]
+ padframe/mprj_pads.loop1_io\[9\]
+ padframe/mprj_pads.io_in\[9\]
+ padframe/mprj_pads.io_in_3v3\[9\]
+ padframe/mprj_pads.analog_noesd_io\[2\]
+ padframe/mprj_pads.loop0_io\[19\]
+ padframe/mprj_pads.loop1_io\[19\]
+ padframe/mprj_pads.io_in\[19\]
+ padframe/mprj_pads.io_in_3v3\[19\]
+ padframe/mprj_pads.analog_noesd_io\[12\]
+ padframe/mprj_pads.loop0_io\[29\]
+ padframe/mprj_pads.loop1_io\[29\]
+ padframe/mprj_pads.io_in\[29\]
+ padframe/mprj_pads.io_in_3v3\[29\]
+ padframe/mprj_pads.analog_noesd_io\[22\]
+ padframe/mprj_pads.loop0_io\[30\]
+ padframe/mprj_pads.loop1_io\[30\]
+ padframe/mprj_pads.io_in\[30\]
+ padframe/mprj_pads.io_in_3v3\[30\]
+ padframe/mprj_pads.analog_noesd_io\[23\]
+ padframe/mprj_pads.loop0_io\[31\]
+ padframe/mprj_pads.loop1_io\[31\]
+ padframe/mprj_pads.io_in\[31\]
+ padframe/mprj_pads.io_in_3v3\[31\]
+ padframe/mprj_pads.analog_noesd_io\[24\]
+ padframe/mprj_pads.loop0_io\[32\]
+ padframe/mprj_pads.loop1_io\[32\]
+ padframe/mprj_pads.io_in\[32\]
+ padframe/mprj_pads.io_in_3v3\[32\]
+ padframe/mprj_pads.analog_noesd_io\[25\]
+ padframe/mprj_pads.loop0_io\[33\]
+ padframe/mprj_pads.loop1_io\[33\]
+ padframe/mprj_pads.io_in\[33\]
+ padframe/mprj_pads.io_in_3v3\[33\]
+ padframe/mprj_pads.analog_noesd_io\[26\]
+ padframe/mprj_pads.loop0_io\[34\]
+ padframe/mprj_pads.loop1_io\[34\]
+ padframe/mprj_pads.io_in\[34\]
+ padframe/mprj_pads.io_in_3v3\[34\]
+ padframe/mprj_pads.analog_noesd_io\[27\]
+ padframe/mprj_pads.loop0_io\[35\]
+ padframe/mprj_pads.loop1_io\[35\]
+ padframe/mprj_pads.io_in\[35\]
+ padframe/mprj_pads.io_in_3v3\[35\]
+ padframe/mprj_pads.analog_noesd_io\[28\]
+ padframe/mprj_pads.loop0_io\[36\]
+ padframe/mprj_pads.loop1_io\[36\]
+ padframe/mprj_pads.io_in\[36\]
+ padframe/mprj_pads.io_in_3v3\[36\]
+ padframe/mprj_pads.no_connect_2b\[0\]
+ padframe/mprj_pads.no_connect_2a\[0\]
+ padframe/mprj_pads.loop0_io\[37\]
+ padframe/mprj_pads.loop1_io\[37\]
+ padframe/mprj_pads.io_in\[37\]
+ padframe/mprj_pads.io_in_3v3\[37\]
+ padframe/mprj_pads.no_connect_2b\[1\]
+ padframe/mprj_pads.no_connect_2a\[1\]
+ padframe/mprj_pads.loop0_io\[20\]
+ padframe/mprj_pads.loop1_io\[20\]
+ padframe/mprj_pads.io_in\[20\]
+ padframe/mprj_pads.io_in_3v3\[20\]
+ padframe/mprj_pads.analog_noesd_io\[13\]
+ padframe/mprj_pads.loop0_io\[21\]
+ padframe/mprj_pads.loop1_io\[21\]
+ padframe/mprj_pads.io_in\[21\]
+ padframe/mprj_pads.io_in_3v3\[21\]
+ padframe/mprj_pads.analog_noesd_io\[14\]
+ padframe/mprj_pads.loop0_io\[22\]
+ padframe/mprj_pads.loop1_io\[22\]
+ padframe/mprj_pads.io_in\[22\]
+ padframe/mprj_pads.io_in_3v3\[22\]
+ padframe/mprj_pads.analog_noesd_io\[15\]
+ padframe/mprj_pads.loop0_io\[23\]
+ padframe/mprj_pads.loop1_io\[23\]
+ padframe/mprj_pads.io_in\[23\]
+ padframe/mprj_pads.io_in_3v3\[23\]
+ padframe/mprj_pads.analog_noesd_io\[16\]
+ padframe/mprj_pads.loop0_io\[24\]
+ padframe/mprj_pads.loop1_io\[24\]
+ padframe/mprj_pads.io_in\[24\]
+ padframe/mprj_pads.io_in_3v3\[24\]
+ padframe/mprj_pads.analog_noesd_io\[17\]
+ padframe/mprj_pads.loop0_io\[25\]
+ padframe/mprj_pads.loop1_io\[25\]
+ padframe/mprj_pads.io_in\[25\]
+ padframe/mprj_pads.io_in_3v3\[25\]
+ padframe/mprj_pads.analog_noesd_io\[18\]
+ padframe/mprj_pads.loop0_io\[26\]
+ padframe/mprj_pads.loop1_io\[26\]
+ padframe/mprj_pads.io_in\[26\]
+ padframe/mprj_pads.io_in_3v3\[26\]
+ padframe/mprj_pads.analog_noesd_io\[19\]
+ padframe/mprj_pads.loop0_io\[27\]
+ padframe/mprj_pads.loop1_io\[27\]
+ padframe/mprj_pads.io_in\[27\]
+ padframe/mprj_pads.io_in_3v3\[27\]
+ padframe/mprj_pads.analog_noesd_io\[20\]
+ padframe/mprj_pads.loop0_io\[28\]
+ padframe/mprj_pads.loop1_io\[28\]
+ padframe/mprj_pads.io_in\[28\]
+ padframe/mprj_pads.io_in_3v3\[28\]
+ padframe/mprj_pads.analog_noesd_io\[21\]
+ padframe/xres_vss_loop
+ padframe/xresloop
+ sigbuf/buf_out\[0\]
+ sigbuf/buf_out\[100\]
+ sigbuf/buf_in\[102\]
+ sigbuf/buf_out\[102\]
+ sigbuf/buf_in\[104\]
+ sigbuf/buf_out\[104\]
+ sigbuf/buf_in\[106\]
+ sigbuf/buf_in\[107\]
+ sigbuf/buf_out\[107\]
+ sigbuf/buf_in\[109\]
+ sigbuf/buf_in\[110\]
+ sigbuf/buf_in\[11\]
+ sigbuf/buf_out\[110\]
+ sigbuf/buf_in\[112\]
+ sigbuf/buf_in\[113\]
+ sigbuf/buf_out\[113\]
+ sigbuf/buf_in\[115\]
+ sigbuf/buf_in\[116\]
+ sigbuf/buf_in\[117\]
+ sigbuf/buf_out\[117\]
+ sigbuf/buf_in\[119\]
+ sigbuf/buf_in\[120\]
+ sigbuf/buf_in\[12\]
+ sigbuf/buf_in\[121\]
+ sigbuf/buf_in\[122\]
+ sigbuf/buf_in\[123\]
+ sigbuf/buf_out\[123\]
+ sigbuf/buf_in\[125\]
+ sigbuf/buf_in\[126\]
+ sigbuf/buf_in\[127\]
+ sigbuf/buf_in\[128\]
+ sigbuf/buf_in\[129\]
+ sigbuf/buf_out\[129\]
+ sigbuf/buf_out\[12\]
+ sigbuf/buf_in\[131\]
+ sigbuf/buf_in\[132\]
+ sigbuf/buf_in\[133\]
+ sigbuf/buf_in\[134\]
+ sigbuf/buf_in\[135\]
+ sigbuf/buf_out\[135\]
+ sigbuf/buf_in\[137\]
+ sigbuf/buf_in\[138\]
+ sigbuf/buf_in\[139\]
+ sigbuf/buf_in\[140\]
+ sigbuf/buf_in\[14\]
+ sigbuf/buf_out\[140\]
+ sigbuf/buf_in\[142\]
+ sigbuf/buf_in\[143\]
+ sigbuf/buf_in\[144\]
+ sigbuf/buf_in\[145\]
+ sigbuf/buf_out\[145\]
+ sigbuf/buf_in\[147\]
+ sigbuf/buf_in\[148\]
+ sigbuf/buf_in\[149\]
+ sigbuf/buf_out\[149\]
+ sigbuf/buf_in\[15\]
+ sigbuf/buf_in\[151\]
+ sigbuf/buf_in\[152\]
+ sigbuf/buf_in\[153\]
+ sigbuf/buf_out\[153\]
+ sigbuf/buf_in\[155\]
+ sigbuf/buf_in\[156\]
+ sigbuf/buf_in\[157\]
+ sigbuf/buf_out\[157\]
+ sigbuf/buf_in\[159\]
+ sigbuf/buf_in\[160\]
+ sigbuf/buf_out\[15\]
+ sigbuf/buf_in\[161\]
+ sigbuf/buf_out\[161\]
+ sigbuf/buf_in\[163\]
+ sigbuf/buf_in\[164\]
+ sigbuf/buf_in\[165\]
+ sigbuf/buf_out\[165\]
+ sigbuf/buf_in\[167\]
+ sigbuf/buf_in\[168\]
+ sigbuf/buf_in\[169\]
+ sigbuf/buf_out\[169\]
+ sigbuf/buf_in\[17\]
+ sigbuf/buf_in\[171\]
+ sigbuf/buf_in\[172\]
+ sigbuf/buf_out\[172\]
+ sigbuf/buf_in\[174\]
+ sigbuf/buf_in\[175\]
+ sigbuf/buf_out\[175\]
+ sigbuf/buf_in\[177\]
+ sigbuf/buf_in\[178\]
+ sigbuf/buf_out\[178\]
+ sigbuf/buf_in\[180\]
+ sigbuf/buf_in\[18\]
+ sigbuf/buf_in\[181\]
+ sigbuf/buf_out\[181\]
+ sigbuf/buf_in\[183\]
+ sigbuf/buf_out\[183\]
+ sigbuf/buf_in\[185\]
+ sigbuf/buf_out\[185\]
+ sigbuf/buf_in\[187\]
+ sigbuf/buf_out\[187\]
+ sigbuf/buf_in\[189\]
+ sigbuf/buf_out\[189\]
+ sigbuf/buf_out\[18\]
+ sigbuf/buf_in\[191\]
+ sigbuf/buf_out\[191\]
+ sigbuf/buf_in\[193\]
+ sigbuf/buf_out\[193\]
+ sigbuf/buf_in\[195\]
+ sigbuf/buf_out\[195\]
+ sigbuf/buf_in\[20\]
+ sigbuf/buf_out\[1\]
+ sigbuf/buf_in\[21\]
+ sigbuf/buf_in\[22\]
+ sigbuf/buf_out\[22\]
+ sigbuf/buf_in\[24\]
+ sigbuf/buf_in\[25\]
+ sigbuf/buf_in\[26\]
+ sigbuf/buf_in\[27\]
+ sigbuf/buf_in\[28\]
+ sigbuf/buf_out\[28\]
+ sigbuf/buf_in\[30\]
+ sigbuf/buf_out\[2\]
+ sigbuf/buf_in\[31\]
+ sigbuf/buf_in\[32\]
+ sigbuf/buf_in\[33\]
+ sigbuf/buf_in\[34\]
+ sigbuf/buf_out\[34\]
+ sigbuf/buf_in\[36\]
+ sigbuf/buf_in\[37\]
+ sigbuf/buf_in\[38\]
+ sigbuf/buf_in\[39\]
+ sigbuf/buf_in\[40\]
+ sigbuf/buf_out\[3\]
+ sigbuf/buf_out\[40\]
+ sigbuf/buf_in\[42\]
+ sigbuf/buf_in\[43\]
+ sigbuf/buf_in\[44\]
+ sigbuf/buf_in\[45\]
+ sigbuf/buf_out\[45\]
+ sigbuf/buf_in\[47\]
+ sigbuf/buf_in\[48\]
+ sigbuf/buf_in\[49\]
+ sigbuf/buf_in\[50\]
+ sigbuf/buf_out\[4\]
+ sigbuf/buf_out\[50\]
+ sigbuf/buf_in\[52\]
+ sigbuf/buf_in\[53\]
+ sigbuf/buf_in\[54\]
+ sigbuf/buf_out\[54\]
+ sigbuf/buf_in\[56\]
+ sigbuf/buf_in\[57\]
+ sigbuf/buf_in\[58\]
+ sigbuf/buf_out\[58\]
+ sigbuf/buf_in\[60\]
+ sigbuf/buf_out\[5\]
+ sigbuf/buf_in\[61\]
+ sigbuf/buf_in\[62\]
+ sigbuf/buf_out\[62\]
+ sigbuf/buf_in\[64\]
+ sigbuf/buf_in\[65\]
+ sigbuf/buf_in\[66\]
+ sigbuf/buf_out\[66\]
+ sigbuf/buf_in\[68\]
+ sigbuf/buf_in\[69\]
+ sigbuf/buf_in\[70\]
+ sigbuf/buf_in\[7\]
+ sigbuf/buf_out\[70\]
+ sigbuf/buf_in\[72\]
+ sigbuf/buf_in\[73\]
+ sigbuf/buf_in\[74\]
+ sigbuf/buf_out\[74\]
+ sigbuf/buf_in\[76\]
+ sigbuf/buf_in\[77\]
+ sigbuf/buf_out\[77\]
+ sigbuf/buf_in\[79\]
+ sigbuf/buf_in\[80\]
+ sigbuf/buf_out\[7\]
+ sigbuf/buf_out\[80\]
+ sigbuf/buf_in\[82\]
+ sigbuf/buf_in\[83\]
+ sigbuf/buf_out\[83\]
+ sigbuf/buf_in\[85\]
+ sigbuf/buf_in\[86\]
+ sigbuf/buf_out\[86\]
+ sigbuf/buf_in\[88\]
+ sigbuf/buf_out\[88\]
+ sigbuf/buf_in\[90\]
+ sigbuf/buf_in\[9\]
+ sigbuf/buf_out\[90\]
+ sigbuf/buf_in\[92\]
+ sigbuf/buf_out\[92\]
+ sigbuf/buf_in\[94\]
+ sigbuf/buf_out\[94\]
+ sigbuf/buf_out\[95\]
+ sigbuf/buf_out\[96\]
+ sigbuf/buf_out\[97\]
+ sigbuf/buf_out\[98\]
+ sigbuf/buf_out\[99\]
+ sigbuf/buf_out\[9\]
+ user_id_value/mask_rev[10]
+ user_id_value/mask_rev[9]
+ user_id_value/mask_rev[8]
+ user_id_value/mask_rev[7]
+ user_id_value/mask_rev[6]
+ user_id_value/mask_rev[5]
+ user_id_value/mask_rev[4]
+ user_id_value/mask_rev[3]
+ user_id_value/mask_rev[2]
+ user_id_value/mask_rev[1]
+ user_id_value/mask_rev[0]
+ user_id_value/user_proj_id_high\[0\]
+ user_id_value/user_proj_id_high\[10\]
+ user_id_value/user_proj_id_high\[11\]
+ user_id_value/user_proj_id_high\[12\]
+ user_id_value/user_proj_id_high\[13\]
+ user_id_value/user_proj_id_high\[14\]
+ user_id_value/user_proj_id_high\[15\]
+ user_id_value/user_proj_id_high\[16\]
+ user_id_value/user_proj_id_high\[17\]
+ user_id_value/user_proj_id_high\[18\]
+ user_id_value/user_proj_id_high\[19\]
+ user_id_value/user_proj_id_high\[1\]
+ user_id_value/user_proj_id_high\[20\]
+ user_id_value/user_proj_id_high\[21\]
+ user_id_value/user_proj_id_high\[22\]
+ user_id_value/user_proj_id_high\[23\]
+ user_id_value/user_proj_id_high\[24\]
+ user_id_value/user_proj_id_high\[25\]
+ user_id_value/user_proj_id_high\[26\]
+ user_id_value/user_proj_id_high\[27\]
+ user_id_value/user_proj_id_high\[28\]
+ user_id_value/user_proj_id_high\[29\]
+ user_id_value/user_proj_id_high\[2\]
+ user_id_value/user_proj_id_high\[30\]
+ user_id_value/user_proj_id_high\[31\]
+ user_id_value/user_proj_id_high\[3\]
+ user_id_value/user_proj_id_high\[4\]
+ user_id_value/user_proj_id_high\[5\]
+ user_id_value/user_proj_id_high\[6\]
+ user_id_value/user_proj_id_high\[7\]
+ user_id_value/user_proj_id_high\[8\]
+ user_id_value/user_proj_id_high\[9\]
+ spare_logic\[0\]/spare_logic1\[0\]
+ spare_logic\[0\]/spare_logic1\[10\]
+ spare_logic\[0\]/spare_logic1\[11\]
+ spare_logic\[0\]/spare_logic1\[12\]
+ spare_logic\[0\]/spare_logic1\[13\]
+ spare_logic\[0\]/spare_logic1\[14\]
+ spare_logic\[0\]/spare_logic1\[15\]
+ spare_logic\[0\]/spare_logic1\[16\]
+ spare_logic\[0\]/spare_logic1\[17\]
+ spare_logic\[0\]/spare_logic1\[18\]
+ spare_logic\[0\]/spare_logic1\[19\]
+ spare_logic\[0\]/spare_logic1\[1\]
+ spare_logic\[0\]/spare_logic1\[20\]
+ spare_logic\[0\]/spare_logic1\[21\]
+ spare_logic\[0\]/spare_logic1\[22\]
+ spare_logic\[0\]/spare_logic1\[23\]
+ spare_logic\[0\]/spare_logic1\[24\]
+ spare_logic\[0\]/spare_logic1\[25\]
+ spare_logic\[0\]/spare_logic1\[26\]
+ spare_logic\[0\]/spare_logic1\[2\]
+ spare_logic\[0\]/spare_logic1\[3\]
+ spare_logic\[0\]/spare_logic1\[4\]
+ spare_logic\[0\]/spare_logic1\[5\]
+ spare_logic\[0\]/spare_logic1\[6\]
+ spare_logic\[0\]/spare_logic1\[7\]
+ spare_logic\[0\]/spare_logic1\[8\]
+ spare_logic\[0\]/spare_logic1\[9\]
+ spare_logic\[1\]/spare_logic1\[0\]
+ spare_logic\[1\]/spare_logic1\[10\]
+ spare_logic\[1\]/spare_logic1\[11\]
+ spare_logic\[1\]/spare_logic1\[12\]
+ spare_logic\[1\]/spare_logic1\[13\]
+ spare_logic\[1\]/spare_logic1\[14\]
+ spare_logic\[1\]/spare_logic1\[15\]
+ spare_logic\[1\]/spare_logic1\[16\]
+ spare_logic\[1\]/spare_logic1\[17\]
+ spare_logic\[1\]/spare_logic1\[18\]
+ spare_logic\[1\]/spare_logic1\[19\]
+ spare_logic\[1\]/spare_logic1\[1\]
+ spare_logic\[1\]/spare_logic1\[20\]
+ spare_logic\[1\]/spare_logic1\[21\]
+ spare_logic\[1\]/spare_logic1\[22\]
+ spare_logic\[1\]/spare_logic1\[23\]
+ spare_logic\[1\]/spare_logic1\[24\]
+ spare_logic\[1\]/spare_logic1\[25\]
+ spare_logic\[1\]/spare_logic1\[26\]
+ spare_logic\[1\]/spare_logic1\[2\]
+ spare_logic\[1\]/spare_logic1\[3\]
+ spare_logic\[1\]/spare_logic1\[4\]
+ spare_logic\[1\]/spare_logic1\[5\]
+ spare_logic\[1\]/spare_logic1\[6\]
+ spare_logic\[1\]/spare_logic1\[7\]
+ spare_logic\[1\]/spare_logic1\[8\]
+ spare_logic\[1\]/spare_logic1\[9\]
+ spare_logic\[2\]/spare_logic1\[0\]
+ spare_logic\[2\]/spare_logic1\[10\]
+ spare_logic\[2\]/spare_logic1\[11\]
+ spare_logic\[2\]/spare_logic1\[12\]
+ spare_logic\[2\]/spare_logic1\[13\]
+ spare_logic\[2\]/spare_logic1\[14\]
+ spare_logic\[2\]/spare_logic1\[15\]
+ spare_logic\[2\]/spare_logic1\[16\]
+ spare_logic\[2\]/spare_logic1\[17\]
+ spare_logic\[2\]/spare_logic1\[18\]
+ spare_logic\[2\]/spare_logic1\[19\]
+ spare_logic\[2\]/spare_logic1\[1\]
+ spare_logic\[2\]/spare_logic1\[20\]
+ spare_logic\[2\]/spare_logic1\[21\]
+ spare_logic\[2\]/spare_logic1\[22\]
+ spare_logic\[2\]/spare_logic1\[23\]
+ spare_logic\[2\]/spare_logic1\[24\]
+ spare_logic\[2\]/spare_logic1\[25\]
+ spare_logic\[2\]/spare_logic1\[26\]
+ spare_logic\[2\]/spare_logic1\[2\]
+ spare_logic\[2\]/spare_logic1\[3\]
+ spare_logic\[2\]/spare_logic1\[4\]
+ spare_logic\[2\]/spare_logic1\[5\]
+ spare_logic\[2\]/spare_logic1\[6\]
+ spare_logic\[2\]/spare_logic1\[7\]
+ spare_logic\[2\]/spare_logic1\[8\]
+ spare_logic\[2\]/spare_logic1\[9\]
+ spare_logic\[3\]/spare_logic1\[0\]
+ spare_logic\[3\]/spare_logic1\[10\]
+ spare_logic\[3\]/spare_logic1\[11\]
+ spare_logic\[3\]/spare_logic1\[12\]
+ spare_logic\[3\]/spare_logic1\[13\]
+ spare_logic\[3\]/spare_logic1\[14\]
+ spare_logic\[3\]/spare_logic1\[15\]
+ spare_logic\[3\]/spare_logic1\[16\]
+ spare_logic\[3\]/spare_logic1\[17\]
+ spare_logic\[3\]/spare_logic1\[18\]
+ spare_logic\[3\]/spare_logic1\[19\]
+ spare_logic\[3\]/spare_logic1\[1\]
+ spare_logic\[3\]/spare_logic1\[20\]
+ spare_logic\[3\]/spare_logic1\[21\]
+ spare_logic\[3\]/spare_logic1\[22\]
+ spare_logic\[3\]/spare_logic1\[23\]
+ spare_logic\[3\]/spare_logic1\[24\]
+ spare_logic\[3\]/spare_logic1\[25\]
+ spare_logic\[3\]/spare_logic1\[26\]
+ spare_logic\[3\]/spare_logic1\[2\]
+ spare_logic\[3\]/spare_logic1\[3\]
+ spare_logic\[3\]/spare_logic1\[4\]
+ spare_logic\[3\]/spare_logic1\[5\]
+ spare_logic\[3\]/spare_logic1\[6\]
+ spare_logic\[3\]/spare_logic1\[7\]
+ spare_logic\[3\]/spare_logic1\[8\]
+ spare_logic\[3\]/spare_logic1\[9\]
+ user_id_value/mask_rev[31]
+ user_id_value/mask_rev[30]
+ user_id_value/mask_rev[29]
+ user_id_value/mask_rev[28]
+ user_id_value/mask_rev[27]
+ user_id_value/mask_rev[26]
+ user_id_value/mask_rev[25]
+ user_id_value/mask_rev[24]
+ user_id_value/mask_rev[23]
+ user_id_value/mask_rev[22]
+ user_id_value/mask_rev[21]
+ user_id_value/mask_rev[20]
+ user_id_value/mask_rev[19]
+ user_id_value/mask_rev[18]
+ user_id_value/mask_rev[17]
+ user_id_value/mask_rev[16]
+ user_id_value/mask_rev[15]
+ user_id_value/mask_rev[14]
+ user_id_value/mask_rev[13]
+ user_id_value/mask_rev[12]
+ user_id_value/mask_rev[11]
+Found 655 partially unannotated nets.
+ flash_clkrst_buffers/out_s[7]
+  padframe/flash_clk_pad/OE_N
+ flash_clkrst_buffers/out_s[8]
+  padframe/flash_csb_pad/OUT
+ flash_clkrst_buffers/out_s[9]
+  padframe/flash_clk_pad/OUT
+ flash_clkrst_buffers/out_s[0]
+  padframe/flash_io1_pad/OUT
+ flash_clkrst_buffers/out_s[1]
+  padframe/flash_io0_pad/OUT
+ flash_clkrst_buffers/out_s[2]
+  padframe/flash_io1_pad/DM[2]
+  padframe/flash_io1_pad/DM[1]
+  padframe/flash_io1_pad/INP_DIS
+ flash_clkrst_buffers/out_s[3]
+  padframe/flash_io0_pad/DM[2]
+  padframe/flash_io0_pad/DM[1]
+  padframe/flash_io0_pad/INP_DIS
+ flash_clkrst_buffers/out_s[4]
+  padframe/flash_io1_pad/DM[0]
+  padframe/flash_io1_pad/OE_N
+ flash_clkrst_buffers/out_s[5]
+  padframe/flash_io0_pad/DM[0]
+  padframe/flash_io0_pad/OE_N
+ flash_clkrst_buffers/out_s[6]
+  padframe/flash_csb_pad/OE_N
+ gpio_control_bidir_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[0]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[1]
+ gpio_control_bidir_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[0\]/DM[2]
+ gpio_control_bidir_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[0\]/HLD_OVR
+ gpio_control_bidir_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[0\]/INP_DIS
+ gpio_control_bidir_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[0\]/OUT
+ gpio_control_bidir_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[0\]/OE_N
+ gpio_control_bidir_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/SLOW
+ gpio_control_bidir_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/VTRIP_SEL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_EN
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_POL
+ gpio_control_bidir_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[0\]/ANALOG_SEL
+ gpio_control_bidir_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[0]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[1]
+ gpio_control_bidir_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[1\]/DM[2]
+ gpio_control_bidir_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[1\]/HLD_OVR
+ gpio_control_bidir_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[1\]/INP_DIS
+ gpio_control_bidir_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[1\]/OUT
+ gpio_control_bidir_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[1\]/OE_N
+ gpio_control_bidir_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/SLOW
+ gpio_control_bidir_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/VTRIP_SEL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_EN
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_POL
+ gpio_control_bidir_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[1\]/ANALOG_SEL
+ gpio_control_bidir_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[0]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[1]
+ gpio_control_bidir_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[16\]/DM[2]
+ gpio_control_bidir_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[16\]/HLD_OVR
+ gpio_control_bidir_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_bidir_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[16\]/INP_DIS
+ gpio_control_bidir_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[16\]/OUT
+ gpio_control_bidir_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[16\]/OE_N
+ gpio_control_bidir_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/SLOW
+ gpio_control_bidir_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/VTRIP_SEL
+ gpio_control_bidir_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[89\]/A
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_EN
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_POL
+ gpio_control_bidir_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[16\]/ANALOG_SEL
+ gpio_control_bidir_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[0]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[1]
+ gpio_control_bidir_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[17\]/DM[2]
+ gpio_control_bidir_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[17\]/HLD_OVR
+ gpio_control_bidir_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_bidir_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[17\]/INP_DIS
+ gpio_control_bidir_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[17\]/OUT
+ gpio_control_bidir_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[17\]/OE_N
+ gpio_control_bidir_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/SLOW
+ gpio_control_bidir_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/VTRIP_SEL
+ gpio_control_bidir_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[91\]/A
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_EN
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_POL
+ gpio_control_bidir_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[17\]/ANALOG_SEL
+ gpio_control_bidir_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[0]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[1]
+ gpio_control_bidir_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[18\]/DM[2]
+ gpio_control_bidir_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[18\]/HLD_OVR
+ gpio_control_bidir_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_bidir_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[18\]/INP_DIS
+ gpio_control_bidir_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[18\]/OUT
+ gpio_control_bidir_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[18\]/OE_N
+ gpio_control_bidir_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/SLOW
+ gpio_control_bidir_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/VTRIP_SEL
+ gpio_control_bidir_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[93\]/A
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_EN
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_POL
+ gpio_control_bidir_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_1\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[0]
+ gpio_control_in_1\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[1]
+ gpio_control_in_1\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[8\]/DM[2]
+ gpio_control_in_1\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[8\]/HLD_OVR
+ gpio_control_in_1\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_1\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[8\]/INP_DIS
+ gpio_control_in_1\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[8\]/OUT
+ gpio_control_in_1\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[8\]/OE_N
+ gpio_control_in_1\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/SLOW
+ gpio_control_in_1\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_1\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[1\]/A
+ gpio_control_in_1\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_1\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_1\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_1\[10\]/one
+  padframe/mprj_pads.area1_io_pad\[18\]/ENABLE_VDDIO
+ gpio_control_in_1\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[0]
+ gpio_control_in_1\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[1]
+ gpio_control_in_1\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[18\]/DM[2]
+ gpio_control_in_1\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[18\]/HLD_OVR
+ gpio_control_in_1\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/IB_MODE_SEL
+ gpio_control_in_1\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[18\]/INP_DIS
+ gpio_control_in_1\[10\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[18\]/OUT
+ gpio_control_in_1\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[18\]/OE_N
+ gpio_control_in_1\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/SLOW
+ gpio_control_in_1\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/VTRIP_SEL
+ gpio_control_in_1\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[19\]/A
+ gpio_control_in_1\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_EN
+ gpio_control_in_1\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_POL
+ gpio_control_in_1\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[18\]/ANALOG_SEL
+ gpio_control_in_1\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_1\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[0]
+ gpio_control_in_1\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[1]
+ gpio_control_in_1\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[9\]/DM[2]
+ gpio_control_in_1\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[9\]/HLD_OVR
+ gpio_control_in_1\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_1\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[9\]/INP_DIS
+ gpio_control_in_1\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[9\]/OUT
+ gpio_control_in_1\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[9\]/OE_N
+ gpio_control_in_1\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/SLOW
+ gpio_control_in_1\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_1\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[2\]/A
+ gpio_control_in_1\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_1\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_1\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[9\]/ANALOG_SEL
+ gpio_control_in_1\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_1\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[0]
+ gpio_control_in_1\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[1]
+ gpio_control_in_1\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[10\]/DM[2]
+ gpio_control_in_1\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[10\]/HLD_OVR
+ gpio_control_in_1\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_1\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[10\]/INP_DIS
+ gpio_control_in_1\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[10\]/OUT
+ gpio_control_in_1\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[10\]/OE_N
+ gpio_control_in_1\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/SLOW
+ gpio_control_in_1\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_1\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[3\]/A
+ gpio_control_in_1\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_1\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_1\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_1\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_1\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[0]
+ gpio_control_in_1\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[1]
+ gpio_control_in_1\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[11\]/DM[2]
+ gpio_control_in_1\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[11\]/HLD_OVR
+ gpio_control_in_1\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_1\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[11\]/INP_DIS
+ gpio_control_in_1\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[11\]/OUT
+ gpio_control_in_1\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[11\]/OE_N
+ gpio_control_in_1\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/SLOW
+ gpio_control_in_1\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_1\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[4\]/A
+ gpio_control_in_1\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_1\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_1\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_1\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_1\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[0]
+ gpio_control_in_1\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[1]
+ gpio_control_in_1\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[12\]/DM[2]
+ gpio_control_in_1\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[12\]/HLD_OVR
+ gpio_control_in_1\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_1\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[12\]/INP_DIS
+ gpio_control_in_1\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[12\]/OUT
+ gpio_control_in_1\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[12\]/OE_N
+ gpio_control_in_1\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/SLOW
+ gpio_control_in_1\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_1\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[5\]/A
+ gpio_control_in_1\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_1\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_1\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_1\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_1\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[0]
+ gpio_control_in_1\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[1]
+ gpio_control_in_1\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[13\]/DM[2]
+ gpio_control_in_1\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[13\]/HLD_OVR
+ gpio_control_in_1\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_1\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[13\]/INP_DIS
+ gpio_control_in_1\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[13\]/OUT
+ gpio_control_in_1\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[13\]/OE_N
+ gpio_control_in_1\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/SLOW
+ gpio_control_in_1\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_1\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[6\]/A
+ gpio_control_in_1\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_1\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_1\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_1\[6\]/one
+  padframe/mprj_pads.area1_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_1\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[0]
+ gpio_control_in_1\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[1]
+ gpio_control_in_1\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[14\]/DM[2]
+ gpio_control_in_1\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[14\]/HLD_OVR
+ gpio_control_in_1\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_1\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[14\]/INP_DIS
+ gpio_control_in_1\[6\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[14\]/OUT
+ gpio_control_in_1\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[14\]/OE_N
+ gpio_control_in_1\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/SLOW
+ gpio_control_in_1\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_1\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[8\]/A
+ gpio_control_in_1\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_1\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_1\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_1\[7\]/one
+  padframe/mprj_pads.area1_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_1\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[0]
+ gpio_control_in_1\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[1]
+ gpio_control_in_1\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[15\]/DM[2]
+ gpio_control_in_1\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[15\]/HLD_OVR
+ gpio_control_in_1\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_1\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[15\]/INP_DIS
+ gpio_control_in_1\[7\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[15\]/OUT
+ gpio_control_in_1\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[15\]/OE_N
+ gpio_control_in_1\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/SLOW
+ gpio_control_in_1\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_1\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[10\]/A
+ gpio_control_in_1\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_1\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_1\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_1\[8\]/one
+  padframe/mprj_pads.area1_io_pad\[16\]/ENABLE_VDDIO
+ gpio_control_in_1\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[0]
+ gpio_control_in_1\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[1]
+ gpio_control_in_1\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[16\]/DM[2]
+ gpio_control_in_1\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[16\]/HLD_OVR
+ gpio_control_in_1\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/IB_MODE_SEL
+ gpio_control_in_1\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[16\]/INP_DIS
+ gpio_control_in_1\[8\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[16\]/OUT
+ gpio_control_in_1\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[16\]/OE_N
+ gpio_control_in_1\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/SLOW
+ gpio_control_in_1\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/VTRIP_SEL
+ gpio_control_in_1\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[13\]/A
+ gpio_control_in_1\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_EN
+ gpio_control_in_1\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_POL
+ gpio_control_in_1\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[16\]/ANALOG_SEL
+ gpio_control_in_1\[9\]/one
+  padframe/mprj_pads.area1_io_pad\[17\]/ENABLE_VDDIO
+ gpio_control_in_1\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[0]
+ gpio_control_in_1\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[1]
+ gpio_control_in_1\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[17\]/DM[2]
+ gpio_control_in_1\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[17\]/HLD_OVR
+ gpio_control_in_1\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/IB_MODE_SEL
+ gpio_control_in_1\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[17\]/INP_DIS
+ gpio_control_in_1\[9\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[17\]/OUT
+ gpio_control_in_1\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[17\]/OE_N
+ gpio_control_in_1\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/SLOW
+ gpio_control_in_1\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/VTRIP_SEL
+ gpio_control_in_1\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[16\]/A
+ gpio_control_in_1\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_EN
+ gpio_control_in_1\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_POL
+ gpio_control_in_1\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[17\]/ANALOG_SEL
+ gpio_control_in_1a\[0\]/one
+  padframe/mprj_pads.area1_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_1a\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[0]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[1]
+ gpio_control_in_1a\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[2\]/DM[2]
+ gpio_control_in_1a\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[2\]/HLD_OVR
+ gpio_control_in_1a\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[2\]/INP_DIS
+ gpio_control_in_1a\[0\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[2\]/OUT
+ gpio_control_in_1a\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[2\]/OE_N
+ gpio_control_in_1a\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/SLOW
+ gpio_control_in_1a\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_1a\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_1a\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_1a\[1\]/one
+  padframe/mprj_pads.area1_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_1a\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[0]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[1]
+ gpio_control_in_1a\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[3\]/DM[2]
+ gpio_control_in_1a\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[3\]/HLD_OVR
+ gpio_control_in_1a\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[3\]/INP_DIS
+ gpio_control_in_1a\[1\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[3\]/OUT
+ gpio_control_in_1a\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[3\]/OE_N
+ gpio_control_in_1a\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/SLOW
+ gpio_control_in_1a\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_1a\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_1a\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_1a\[2\]/one
+  padframe/mprj_pads.area1_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_1a\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[0]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[1]
+ gpio_control_in_1a\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[4\]/DM[2]
+ gpio_control_in_1a\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[4\]/HLD_OVR
+ gpio_control_in_1a\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[4\]/INP_DIS
+ gpio_control_in_1a\[2\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[4\]/OUT
+ gpio_control_in_1a\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[4\]/OE_N
+ gpio_control_in_1a\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/SLOW
+ gpio_control_in_1a\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_1a\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_1a\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_1a\[3\]/one
+  padframe/mprj_pads.area1_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_1a\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[0]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[1]
+ gpio_control_in_1a\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[5\]/DM[2]
+ gpio_control_in_1a\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[5\]/HLD_OVR
+ gpio_control_in_1a\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[5\]/INP_DIS
+ gpio_control_in_1a\[3\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[5\]/OUT
+ gpio_control_in_1a\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[5\]/OE_N
+ gpio_control_in_1a\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/SLOW
+ gpio_control_in_1a\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_1a\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_1a\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_1a\[4\]/one
+  padframe/mprj_pads.area1_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_1a\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[0]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[1]
+ gpio_control_in_1a\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[6\]/DM[2]
+ gpio_control_in_1a\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[6\]/HLD_OVR
+ gpio_control_in_1a\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[6\]/INP_DIS
+ gpio_control_in_1a\[4\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[6\]/OUT
+ gpio_control_in_1a\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[6\]/OE_N
+ gpio_control_in_1a\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/SLOW
+ gpio_control_in_1a\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_1a\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_1a\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_1a\[5\]/one
+  padframe/mprj_pads.area1_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_1a\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[0]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[1]
+ gpio_control_in_1a\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area1_io_pad\[7\]/DM[2]
+ gpio_control_in_1a\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area1_io_pad\[7\]/HLD_OVR
+ gpio_control_in_1a\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_1a\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area1_io_pad\[7\]/INP_DIS
+ gpio_control_in_1a\[5\]/pad_gpio_out
+  padframe/mprj_pads.area1_io_pad\[7\]/OUT
+ gpio_control_in_1a\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area1_io_pad\[7\]/OE_N
+ gpio_control_in_1a\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/SLOW
+ gpio_control_in_1a\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_1a\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[0\]/A
+ gpio_control_in_1a\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_1a\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_1a\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area1_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[0\]/one
+  padframe/mprj_pads.area2_io_pad\[0\]/ENABLE_VDDIO
+ gpio_control_in_2\[0\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[0]
+ gpio_control_in_2\[0\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[1]
+ gpio_control_in_2\[0\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[0\]/DM[2]
+ gpio_control_in_2\[0\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[0\]/HLD_OVR
+ gpio_control_in_2\[0\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/IB_MODE_SEL
+ gpio_control_in_2\[0\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[0\]/INP_DIS
+ gpio_control_in_2\[0\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[0\]/OUT
+ gpio_control_in_2\[0\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[0\]/OE_N
+ gpio_control_in_2\[0\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/SLOW
+ gpio_control_in_2\[0\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/VTRIP_SEL
+ gpio_control_in_2\[0\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[23\]/A
+ gpio_control_in_2\[0\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_EN
+ gpio_control_in_2\[0\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_POL
+ gpio_control_in_2\[0\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[0\]/ANALOG_SEL
+ gpio_control_in_2\[10\]/one
+  padframe/mprj_pads.area2_io_pad\[10\]/ENABLE_VDDIO
+ gpio_control_in_2\[10\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[0]
+ gpio_control_in_2\[10\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[1]
+ gpio_control_in_2\[10\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[10\]/DM[2]
+ gpio_control_in_2\[10\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[10\]/HLD_OVR
+ gpio_control_in_2\[10\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/IB_MODE_SEL
+ gpio_control_in_2\[10\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[10\]/INP_DIS
+ gpio_control_in_2\[10\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[10\]/OUT
+ gpio_control_in_2\[10\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[10\]/OE_N
+ gpio_control_in_2\[10\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/SLOW
+ gpio_control_in_2\[10\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/VTRIP_SEL
+ gpio_control_in_2\[10\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[71\]/A
+ gpio_control_in_2\[10\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_EN
+ gpio_control_in_2\[10\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_POL
+ gpio_control_in_2\[10\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[10\]/ANALOG_SEL
+ gpio_control_in_2\[11\]/one
+  padframe/mprj_pads.area2_io_pad\[11\]/ENABLE_VDDIO
+ gpio_control_in_2\[11\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[0]
+ gpio_control_in_2\[11\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[1]
+ gpio_control_in_2\[11\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[11\]/DM[2]
+ gpio_control_in_2\[11\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[11\]/HLD_OVR
+ gpio_control_in_2\[11\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/IB_MODE_SEL
+ gpio_control_in_2\[11\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[11\]/INP_DIS
+ gpio_control_in_2\[11\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[11\]/OUT
+ gpio_control_in_2\[11\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[11\]/OE_N
+ gpio_control_in_2\[11\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/SLOW
+ gpio_control_in_2\[11\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/VTRIP_SEL
+ gpio_control_in_2\[11\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[75\]/A
+ gpio_control_in_2\[11\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_EN
+ gpio_control_in_2\[11\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_POL
+ gpio_control_in_2\[11\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[11\]/ANALOG_SEL
+ gpio_control_in_2\[12\]/one
+  padframe/mprj_pads.area2_io_pad\[12\]/ENABLE_VDDIO
+ gpio_control_in_2\[12\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[0]
+ gpio_control_in_2\[12\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[1]
+ gpio_control_in_2\[12\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[12\]/DM[2]
+ gpio_control_in_2\[12\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[12\]/HLD_OVR
+ gpio_control_in_2\[12\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/IB_MODE_SEL
+ gpio_control_in_2\[12\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[12\]/INP_DIS
+ gpio_control_in_2\[12\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[12\]/OUT
+ gpio_control_in_2\[12\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[12\]/OE_N
+ gpio_control_in_2\[12\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/SLOW
+ gpio_control_in_2\[12\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/VTRIP_SEL
+ gpio_control_in_2\[12\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[78\]/A
+ gpio_control_in_2\[12\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_EN
+ gpio_control_in_2\[12\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_POL
+ gpio_control_in_2\[12\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[12\]/ANALOG_SEL
+ gpio_control_in_2\[13\]/one
+  padframe/mprj_pads.area2_io_pad\[13\]/ENABLE_VDDIO
+ gpio_control_in_2\[13\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[0]
+ gpio_control_in_2\[13\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[1]
+ gpio_control_in_2\[13\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[13\]/DM[2]
+ gpio_control_in_2\[13\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[13\]/HLD_OVR
+ gpio_control_in_2\[13\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/IB_MODE_SEL
+ gpio_control_in_2\[13\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[13\]/INP_DIS
+ gpio_control_in_2\[13\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[13\]/OUT
+ gpio_control_in_2\[13\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[13\]/OE_N
+ gpio_control_in_2\[13\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/SLOW
+ gpio_control_in_2\[13\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/VTRIP_SEL
+ gpio_control_in_2\[13\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[81\]/A
+ gpio_control_in_2\[13\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_EN
+ gpio_control_in_2\[13\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_POL
+ gpio_control_in_2\[13\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[13\]/ANALOG_SEL
+ gpio_control_in_2\[14\]/one
+  padframe/mprj_pads.area2_io_pad\[14\]/ENABLE_VDDIO
+ gpio_control_in_2\[14\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[0]
+ gpio_control_in_2\[14\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[1]
+ gpio_control_in_2\[14\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[14\]/DM[2]
+ gpio_control_in_2\[14\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[14\]/HLD_OVR
+ gpio_control_in_2\[14\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/IB_MODE_SEL
+ gpio_control_in_2\[14\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[14\]/INP_DIS
+ gpio_control_in_2\[14\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[14\]/OUT
+ gpio_control_in_2\[14\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[14\]/OE_N
+ gpio_control_in_2\[14\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/SLOW
+ gpio_control_in_2\[14\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/VTRIP_SEL
+ gpio_control_in_2\[14\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[84\]/A
+ gpio_control_in_2\[14\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_EN
+ gpio_control_in_2\[14\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_POL
+ gpio_control_in_2\[14\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[14\]/ANALOG_SEL
+ gpio_control_in_2\[15\]/one
+  padframe/mprj_pads.area2_io_pad\[15\]/ENABLE_VDDIO
+ gpio_control_in_2\[15\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[0]
+ gpio_control_in_2\[15\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[1]
+ gpio_control_in_2\[15\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[15\]/DM[2]
+ gpio_control_in_2\[15\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[15\]/HLD_OVR
+ gpio_control_in_2\[15\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/IB_MODE_SEL
+ gpio_control_in_2\[15\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[15\]/INP_DIS
+ gpio_control_in_2\[15\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[15\]/OUT
+ gpio_control_in_2\[15\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[15\]/OE_N
+ gpio_control_in_2\[15\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/SLOW
+ gpio_control_in_2\[15\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/VTRIP_SEL
+ gpio_control_in_2\[15\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[87\]/A
+ gpio_control_in_2\[15\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_EN
+ gpio_control_in_2\[15\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_POL
+ gpio_control_in_2\[15\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[15\]/ANALOG_SEL
+ gpio_control_in_2\[1\]/one
+  padframe/mprj_pads.area2_io_pad\[1\]/ENABLE_VDDIO
+ gpio_control_in_2\[1\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[0]
+ gpio_control_in_2\[1\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[1]
+ gpio_control_in_2\[1\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[1\]/DM[2]
+ gpio_control_in_2\[1\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[1\]/HLD_OVR
+ gpio_control_in_2\[1\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/IB_MODE_SEL
+ gpio_control_in_2\[1\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[1\]/INP_DIS
+ gpio_control_in_2\[1\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[1\]/OUT
+ gpio_control_in_2\[1\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[1\]/OE_N
+ gpio_control_in_2\[1\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/SLOW
+ gpio_control_in_2\[1\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/VTRIP_SEL
+ gpio_control_in_2\[1\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[29\]/A
+ gpio_control_in_2\[1\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_EN
+ gpio_control_in_2\[1\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_POL
+ gpio_control_in_2\[1\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[1\]/ANALOG_SEL
+ gpio_control_in_2\[2\]/one
+  padframe/mprj_pads.area2_io_pad\[2\]/ENABLE_VDDIO
+ gpio_control_in_2\[2\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[0]
+ gpio_control_in_2\[2\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[1]
+ gpio_control_in_2\[2\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[2\]/DM[2]
+ gpio_control_in_2\[2\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[2\]/HLD_OVR
+ gpio_control_in_2\[2\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/IB_MODE_SEL
+ gpio_control_in_2\[2\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[2\]/INP_DIS
+ gpio_control_in_2\[2\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[2\]/OUT
+ gpio_control_in_2\[2\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[2\]/OE_N
+ gpio_control_in_2\[2\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/SLOW
+ gpio_control_in_2\[2\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/VTRIP_SEL
+ gpio_control_in_2\[2\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[35\]/A
+ gpio_control_in_2\[2\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_EN
+ gpio_control_in_2\[2\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_POL
+ gpio_control_in_2\[2\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[2\]/ANALOG_SEL
+ gpio_control_in_2\[3\]/one
+  padframe/mprj_pads.area2_io_pad\[3\]/ENABLE_VDDIO
+ gpio_control_in_2\[3\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[0]
+ gpio_control_in_2\[3\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[1]
+ gpio_control_in_2\[3\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[3\]/DM[2]
+ gpio_control_in_2\[3\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[3\]/HLD_OVR
+ gpio_control_in_2\[3\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/IB_MODE_SEL
+ gpio_control_in_2\[3\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[3\]/INP_DIS
+ gpio_control_in_2\[3\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[3\]/OUT
+ gpio_control_in_2\[3\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[3\]/OE_N
+ gpio_control_in_2\[3\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/SLOW
+ gpio_control_in_2\[3\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/VTRIP_SEL
+ gpio_control_in_2\[3\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[41\]/A
+ gpio_control_in_2\[3\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_EN
+ gpio_control_in_2\[3\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_POL
+ gpio_control_in_2\[3\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[3\]/ANALOG_SEL
+ gpio_control_in_2\[4\]/one
+  padframe/mprj_pads.area2_io_pad\[4\]/ENABLE_VDDIO
+ gpio_control_in_2\[4\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[0]
+ gpio_control_in_2\[4\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[1]
+ gpio_control_in_2\[4\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[4\]/DM[2]
+ gpio_control_in_2\[4\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[4\]/HLD_OVR
+ gpio_control_in_2\[4\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/IB_MODE_SEL
+ gpio_control_in_2\[4\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[4\]/INP_DIS
+ gpio_control_in_2\[4\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[4\]/OUT
+ gpio_control_in_2\[4\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[4\]/OE_N
+ gpio_control_in_2\[4\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/SLOW
+ gpio_control_in_2\[4\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/VTRIP_SEL
+ gpio_control_in_2\[4\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[46\]/A
+ gpio_control_in_2\[4\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_EN
+ gpio_control_in_2\[4\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_POL
+ gpio_control_in_2\[4\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[4\]/ANALOG_SEL
+ gpio_control_in_2\[5\]/one
+  padframe/mprj_pads.area2_io_pad\[5\]/ENABLE_VDDIO
+ gpio_control_in_2\[5\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[0]
+ gpio_control_in_2\[5\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[1]
+ gpio_control_in_2\[5\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[5\]/DM[2]
+ gpio_control_in_2\[5\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[5\]/HLD_OVR
+ gpio_control_in_2\[5\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/IB_MODE_SEL
+ gpio_control_in_2\[5\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[5\]/INP_DIS
+ gpio_control_in_2\[5\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[5\]/OUT
+ gpio_control_in_2\[5\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[5\]/OE_N
+ gpio_control_in_2\[5\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/SLOW
+ gpio_control_in_2\[5\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/VTRIP_SEL
+ gpio_control_in_2\[5\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[51\]/A
+ gpio_control_in_2\[5\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_EN
+ gpio_control_in_2\[5\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_POL
+ gpio_control_in_2\[5\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[5\]/ANALOG_SEL
+ gpio_control_in_2\[6\]/one
+  padframe/mprj_pads.area2_io_pad\[6\]/ENABLE_VDDIO
+ gpio_control_in_2\[6\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[0]
+ gpio_control_in_2\[6\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[1]
+ gpio_control_in_2\[6\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[6\]/DM[2]
+ gpio_control_in_2\[6\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[6\]/HLD_OVR
+ gpio_control_in_2\[6\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/IB_MODE_SEL
+ gpio_control_in_2\[6\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[6\]/INP_DIS
+ gpio_control_in_2\[6\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[6\]/OUT
+ gpio_control_in_2\[6\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[6\]/OE_N
+ gpio_control_in_2\[6\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/SLOW
+ gpio_control_in_2\[6\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/VTRIP_SEL
+ gpio_control_in_2\[6\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[55\]/A
+ gpio_control_in_2\[6\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_EN
+ gpio_control_in_2\[6\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_POL
+ gpio_control_in_2\[6\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[6\]/ANALOG_SEL
+ gpio_control_in_2\[7\]/one
+  padframe/mprj_pads.area2_io_pad\[7\]/ENABLE_VDDIO
+ gpio_control_in_2\[7\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[0]
+ gpio_control_in_2\[7\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[1]
+ gpio_control_in_2\[7\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[7\]/DM[2]
+ gpio_control_in_2\[7\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[7\]/HLD_OVR
+ gpio_control_in_2\[7\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/IB_MODE_SEL
+ gpio_control_in_2\[7\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[7\]/INP_DIS
+ gpio_control_in_2\[7\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[7\]/OUT
+ gpio_control_in_2\[7\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[7\]/OE_N
+ gpio_control_in_2\[7\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/SLOW
+ gpio_control_in_2\[7\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/VTRIP_SEL
+ gpio_control_in_2\[7\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[59\]/A
+ gpio_control_in_2\[7\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_EN
+ gpio_control_in_2\[7\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_POL
+ gpio_control_in_2\[7\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[7\]/ANALOG_SEL
+ gpio_control_in_2\[8\]/one
+  gpio_control_in_2\[8\]/ANTENNA_input1_A/DIODE
+  gpio_control_in_2\[8\]/input1/A
+  padframe/mprj_pads.area2_io_pad\[8\]/ENABLE_VDDIO
+ gpio_control_in_2\[8\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[0]
+ gpio_control_in_2\[8\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[1]
+ gpio_control_in_2\[8\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[8\]/DM[2]
+ gpio_control_in_2\[8\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[8\]/HLD_OVR
+ gpio_control_in_2\[8\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/IB_MODE_SEL
+ gpio_control_in_2\[8\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[8\]/INP_DIS
+ gpio_control_in_2\[8\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[8\]/OUT
+ gpio_control_in_2\[8\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[8\]/OE_N
+ gpio_control_in_2\[8\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/SLOW
+ gpio_control_in_2\[8\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/VTRIP_SEL
+ gpio_control_in_2\[8\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[63\]/A
+ gpio_control_in_2\[8\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_EN
+ gpio_control_in_2\[8\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_POL
+ gpio_control_in_2\[8\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[8\]/ANALOG_SEL
+ gpio_control_in_2\[9\]/one
+  padframe/mprj_pads.area2_io_pad\[9\]/ENABLE_VDDIO
+ gpio_control_in_2\[9\]/pad_gpio_dm[0]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[0]
+ gpio_control_in_2\[9\]/pad_gpio_dm[1]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[1]
+ gpio_control_in_2\[9\]/pad_gpio_dm[2]
+  padframe/mprj_pads.area2_io_pad\[9\]/DM[2]
+ gpio_control_in_2\[9\]/pad_gpio_holdover
+  padframe/mprj_pads.area2_io_pad\[9\]/HLD_OVR
+ gpio_control_in_2\[9\]/pad_gpio_ib_mode_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/IB_MODE_SEL
+ gpio_control_in_2\[9\]/pad_gpio_inenb
+  padframe/mprj_pads.area2_io_pad\[9\]/INP_DIS
+ gpio_control_in_2\[9\]/pad_gpio_out
+  padframe/mprj_pads.area2_io_pad\[9\]/OUT
+ gpio_control_in_2\[9\]/pad_gpio_outenb
+  padframe/mprj_pads.area2_io_pad\[9\]/OE_N
+ gpio_control_in_2\[9\]/pad_gpio_slow_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/SLOW
+ gpio_control_in_2\[9\]/pad_gpio_vtrip_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/VTRIP_SEL
+ gpio_control_in_2\[9\]/mgmt_gpio_in
+  sigbuf/signal_buffers\[67\]/A
+ gpio_control_in_2\[9\]/pad_gpio_ana_en
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_EN
+ gpio_control_in_2\[9\]/pad_gpio_ana_pol
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_POL
+ gpio_control_in_2\[9\]/pad_gpio_ana_sel
+  padframe/mprj_pads.area2_io_pad\[9\]/ANALOG_SEL
+ gpio_defaults_block_22/gpio_defaults_low\[0\]
+  gpio_control_in_2\[3\]/ANTENNA__068__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__069__B/DIODE
+  gpio_control_in_2\[3\]/_068_/B
+  gpio_control_in_2\[3\]/_069_/B
+ gpio_defaults_block_22/gpio_defaults_high\[10\]
+  gpio_control_in_2\[3\]/ANTENNA__082__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__083__B/DIODE
+  gpio_control_in_2\[3\]/_082_/B
+  gpio_control_in_2\[3\]/_083_/B
+ gpio_defaults_block_22/gpio_defaults_low\[11\]
+  gpio_control_in_2\[3\]/ANTENNA__084__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__085__B/DIODE
+  gpio_control_in_2\[3\]/_084_/B
+  gpio_control_in_2\[3\]/_085_/B
+ gpio_defaults_block_22/gpio_defaults_low\[12\]
+  gpio_control_in_2\[3\]/ANTENNA__086__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__087__B/DIODE
+  gpio_control_in_2\[3\]/_086_/B
+  gpio_control_in_2\[3\]/_087_/B
+ gpio_defaults_block_22/gpio_defaults_high\[1\]
+  gpio_control_in_2\[3\]/ANTENNA__080__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__081__B/DIODE
+  gpio_control_in_2\[3\]/_080_/B
+  gpio_control_in_2\[3\]/_081_/B
+ gpio_defaults_block_22/gpio_defaults_low\[2\]
+  gpio_control_in_2\[3\]/ANTENNA__070__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__071__B/DIODE
+  gpio_control_in_2\[3\]/_070_/B
+  gpio_control_in_2\[3\]/_071_/B
+ gpio_defaults_block_22/gpio_defaults_low\[3\]
+  gpio_control_in_2\[3\]/ANTENNA__076__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__077__B/DIODE
+  gpio_control_in_2\[3\]/_076_/B
+  gpio_control_in_2\[3\]/_077_/B
+ gpio_defaults_block_22/gpio_defaults_low\[4\]
+  gpio_control_in_2\[3\]/ANTENNA__078__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__079__B/DIODE
+  gpio_control_in_2\[3\]/_078_/B
+  gpio_control_in_2\[3\]/_079_/B
+ gpio_defaults_block_22/gpio_defaults_low\[5\]
+  gpio_control_in_2\[3\]/ANTENNA__088__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__089__B/DIODE
+  gpio_control_in_2\[3\]/_088_/B
+  gpio_control_in_2\[3\]/_089_/B
+ gpio_defaults_block_22/gpio_defaults_low\[6\]
+  gpio_control_in_2\[3\]/ANTENNA__090__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__091__B/DIODE
+  gpio_control_in_2\[3\]/_090_/B
+  gpio_control_in_2\[3\]/_091_/B
+ gpio_defaults_block_22/gpio_defaults_low\[7\]
+  gpio_control_in_2\[3\]/ANTENNA__092__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__093__B/DIODE
+  gpio_control_in_2\[3\]/_092_/B
+  gpio_control_in_2\[3\]/_093_/B
+ gpio_defaults_block_22/gpio_defaults_low\[8\]
+  gpio_control_in_2\[3\]/ANTENNA__072__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__073__B/DIODE
+  gpio_control_in_2\[3\]/_072_/B
+  gpio_control_in_2\[3\]/_073_/B
+ gpio_defaults_block_22/gpio_defaults_low\[9\]
+  gpio_control_in_2\[3\]/ANTENNA__074__B/DIODE
+  gpio_control_in_2\[3\]/ANTENNA__075__B/DIODE
+  gpio_control_in_2\[3\]/_074_/B
+  gpio_control_in_2\[3\]/_075_/B
+ housekeeping/mgmt_gpio_out[14]
+  sigbuf/signal_buffers\[103\]/A
+ housekeeping/mgmt_gpio_out[15]
+  sigbuf/signal_buffers\[105\]/A
+ housekeeping/mgmt_gpio_out[9]
+  sigbuf/signal_buffers\[97\]/A
+ housekeeping/mgmt_gpio_oeb[35]
+  sigbuf/signal_buffers\[190\]/A
+ housekeeping/mgmt_gpio_oeb[36]
+  sigbuf/signal_buffers\[192\]/A
+ housekeeping/mgmt_gpio_oeb[37]
+  sigbuf/signal_buffers\[194\]/A
+ housekeeping/mgmt_gpio_out[10]
+  sigbuf/signal_buffers\[98\]/A
+ housekeeping/mgmt_gpio_out[11]
+  sigbuf/signal_buffers\[99\]/A
+ housekeeping/mgmt_gpio_out[12]
+  sigbuf/signal_buffers\[100\]/A
+ housekeeping/mgmt_gpio_out[13]
+  sigbuf/signal_buffers\[101\]/A
+ housekeeping/mgmt_gpio_out[16]
+  sigbuf/signal_buffers\[108\]/A
+ housekeeping/mgmt_gpio_out[17]
+  sigbuf/signal_buffers\[111\]/A
+ housekeeping/mgmt_gpio_out[18]
+  sigbuf/signal_buffers\[114\]/A
+ housekeeping/mgmt_gpio_out[19]
+  sigbuf/signal_buffers\[118\]/A
+ housekeeping/mgmt_gpio_out[20]
+  sigbuf/signal_buffers\[124\]/A
+ housekeeping/mgmt_gpio_out[21]
+  sigbuf/signal_buffers\[130\]/A
+ housekeeping/mgmt_gpio_out[22]
+  sigbuf/signal_buffers\[136\]/A
+ housekeeping/mgmt_gpio_out[23]
+  sigbuf/signal_buffers\[141\]/A
+ housekeeping/mgmt_gpio_out[24]
+  sigbuf/signal_buffers\[146\]/A
+ housekeeping/mgmt_gpio_out[25]
+  sigbuf/signal_buffers\[150\]/A
+ housekeeping/mgmt_gpio_out[26]
+  sigbuf/signal_buffers\[154\]/A
+ housekeeping/mgmt_gpio_out[27]
+  sigbuf/signal_buffers\[158\]/A
+ housekeeping/mgmt_gpio_out[28]
+  sigbuf/signal_buffers\[162\]/A
+ housekeeping/mgmt_gpio_out[29]
+  sigbuf/signal_buffers\[166\]/A
+ housekeeping/mgmt_gpio_out[30]
+  sigbuf/signal_buffers\[170\]/A
+ housekeeping/mgmt_gpio_out[31]
+  sigbuf/signal_buffers\[173\]/A
+ housekeeping/mgmt_gpio_out[32]
+  sigbuf/signal_buffers\[176\]/A
+ housekeeping/mgmt_gpio_out[33]
+  sigbuf/signal_buffers\[179\]/A
+ housekeeping/mgmt_gpio_out[34]
+  sigbuf/signal_buffers\[182\]/A
+ housekeeping/mgmt_gpio_out[35]
+  sigbuf/signal_buffers\[184\]/A
+ housekeeping/mgmt_gpio_out[36]
+  sigbuf/signal_buffers\[186\]/A
+ housekeeping/mgmt_gpio_out[37]
+  sigbuf/signal_buffers\[188\]/A
+ housekeeping/mgmt_gpio_out[7]
+  sigbuf/signal_buffers\[95\]/A
+ housekeeping/mgmt_gpio_out[8]
+  sigbuf/signal_buffers\[96\]/A
+ mgmt_buffers/mprj_dat_o_user[0]
+  mprj/mprj/input1/A
+  mprj/mprj/ANTENNA_input1_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[10]
+  mprj/mprj/input11/A
+  mprj/mprj/ANTENNA_input11_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[11]
+  mprj/mprj/input12/A
+  mprj/mprj/ANTENNA_input12_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[12]
+  mprj/mprj/input13/A
+  mprj/mprj/ANTENNA_input13_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[13]
+  mprj/mprj/input14/A
+  mprj/mprj/ANTENNA_input14_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[14]
+  mprj/mprj/input15/A
+  mprj/mprj/ANTENNA_input15_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[15]
+  mprj/mprj/input16/A
+  mprj/mprj/ANTENNA_input16_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[1]
+  mprj/mprj/input2/A
+  mprj/mprj/ANTENNA_input2_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[2]
+  mprj/mprj/input3/A
+  mprj/mprj/ANTENNA_input3_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[3]
+  mprj/mprj/input4/A
+  mprj/mprj/ANTENNA_input4_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[4]
+  mprj/mprj/input5/A
+  mprj/mprj/ANTENNA_input5_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[5]
+  mprj/mprj/input6/A
+  mprj/mprj/ANTENNA_input6_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[6]
+  mprj/mprj/input7/A
+  mprj/mprj/ANTENNA_input7_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[7]
+  mprj/mprj/input8/A
+  mprj/mprj/ANTENNA_input8_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[8]
+  mprj/mprj/input9/A
+  mprj/mprj/ANTENNA_input9_A/DIODE
+ mgmt_buffers/mprj_dat_o_user[9]
+  mprj/mprj/input10/A
+  mprj/mprj/ANTENNA_input10_A/DIODE
+ padframe/constant_value_inst\[0\]/one
+  padframe/clock_pad/DM[0]
+  padframe/clock_pad/ENABLE_VDDIO
+  padframe/clock_pad/OE_N
+ padframe/constant_value_inst\[0\]/zero
+  padframe/clock_pad/ANALOG_EN
+  padframe/clock_pad/ANALOG_POL
+  padframe/clock_pad/ANALOG_SEL
+  padframe/clock_pad/DM[2]
+  padframe/clock_pad/DM[1]
+  padframe/clock_pad/HLD_OVR
+  padframe/clock_pad/IB_MODE_SEL
+  padframe/clock_pad/OUT
+  padframe/clock_pad/SLOW
+  padframe/clock_pad/VTRIP_SEL
+ padframe/constant_value_inst\[1\]/one
+  padframe/gpio_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[1\]/zero
+  padframe/gpio_pad/ANALOG_EN
+  padframe/gpio_pad/ANALOG_POL
+  padframe/gpio_pad/ANALOG_SEL
+  padframe/gpio_pad/HLD_OVR
+  padframe/gpio_pad/IB_MODE_SEL
+  padframe/gpio_pad/SLOW
+  padframe/gpio_pad/VTRIP_SEL
+ padframe/constant_value_inst\[2\]/one
+  padframe/flash_io0_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[2\]/zero
+  padframe/flash_io0_pad/ANALOG_EN
+  padframe/flash_io0_pad/ANALOG_POL
+  padframe/flash_io0_pad/ANALOG_SEL
+  padframe/flash_io0_pad/HLD_OVR
+  padframe/flash_io0_pad/IB_MODE_SEL
+  padframe/flash_io0_pad/SLOW
+  padframe/flash_io0_pad/VTRIP_SEL
+ padframe/constant_value_inst\[3\]/one
+  padframe/flash_io1_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[3\]/zero
+  padframe/flash_io1_pad/ANALOG_EN
+  padframe/flash_io1_pad/ANALOG_POL
+  padframe/flash_io1_pad/ANALOG_SEL
+  padframe/flash_io1_pad/HLD_OVR
+  padframe/flash_io1_pad/IB_MODE_SEL
+  padframe/flash_io1_pad/SLOW
+  padframe/flash_io1_pad/VTRIP_SEL
+ padframe/constant_value_inst\[4\]/one
+  padframe/flash_csb_pad/DM[2]
+  padframe/flash_csb_pad/DM[1]
+  padframe/flash_csb_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[4\]/zero
+  padframe/flash_csb_pad/ANALOG_EN
+  padframe/flash_csb_pad/ANALOG_POL
+  padframe/flash_csb_pad/ANALOG_SEL
+  padframe/flash_csb_pad/DM[0]
+  padframe/flash_csb_pad/HLD_OVR
+  padframe/flash_csb_pad/IB_MODE_SEL
+  padframe/flash_csb_pad/INP_DIS
+  padframe/flash_csb_pad/SLOW
+  padframe/flash_csb_pad/VTRIP_SEL
+ padframe/constant_value_inst\[5\]/one
+  padframe/flash_clk_pad/DM[2]
+  padframe/flash_clk_pad/DM[1]
+  padframe/flash_clk_pad/ENABLE_VDDIO
+ padframe/constant_value_inst\[5\]/zero
+  padframe/flash_clk_pad/ANALOG_EN
+  padframe/flash_clk_pad/ANALOG_POL
+  padframe/flash_clk_pad/ANALOG_SEL
+  padframe/flash_clk_pad/DM[0]
+  padframe/flash_clk_pad/HLD_OVR
+  padframe/flash_clk_pad/IB_MODE_SEL
+  padframe/flash_clk_pad/INP_DIS
+  padframe/flash_clk_pad/SLOW
+  padframe/flash_clk_pad/VTRIP_SEL
+ padframe/constant_value_inst\[6\]/one
+  padframe/resetb_pad/ENABLE_VDDIO
+ soc/gpio_inenb_pad
+  padframe/gpio_pad/INP_DIS
+ soc/gpio_mode0_pad
+  padframe/gpio_pad/DM[0]
+ soc/gpio_mode1_pad
+  padframe/gpio_pad/DM[2]
+  padframe/gpio_pad/DM[1]
+ soc/gpio_out_pad
+  padframe/gpio_pad/OUT
+ soc/gpio_outenb_pad
+  padframe/gpio_pad/OE_N
+ soc/por_l_out
+  padframe/clock_pad/INP_DIS

signoff/caravel_layout.png

diff --git a/signoff/caravel_layout.png b/signoff/caravel_layout.png
new file mode 100644
index 0000000..2c9213e
--- /dev/null
+++ b/signoff/caravel_layout.png
Binary files differ

signoff/user_proj_example/OPENLANE_VERSION

diff --git a/signoff/user_proj_example/OPENLANE_VERSION b/signoff/user_proj_example/OPENLANE_VERSION
new file mode 100644
index 0000000..fabca1a
--- /dev/null
+++ b/signoff/user_proj_example/OPENLANE_VERSION
@@ -0,0 +1 @@
+OpenLane cb59d1f84deb5cedbb5b0a3e3f3b4129a967c988

signoff/user_proj_example/PDK_SOURCES

diff --git a/signoff/user_proj_example/PDK_SOURCES b/signoff/user_proj_example/PDK_SOURCES
new file mode 100644
index 0000000..59f6ae6
--- /dev/null
+++ b/signoff/user_proj_example/PDK_SOURCES
@@ -0,0 +1 @@
+open_pdks 0059588eebfc704681dc2368bd1d33d96281d10f

signoff/user_proj_example/metrics.csv

diff --git a/signoff/user_proj_example/metrics.csv b/signoff/user_proj_example/metrics.csv
new file mode 100644
index 0000000..1ebbe4d
--- /dev/null
+++ b/signoff/user_proj_example/metrics.csv
@@ -0,0 +1,2 @@
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signoff/user_proj_example/openlane-signoff/spef/user_proj_example.max.spef

diff --git a/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.max.spef b/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.max.spef
new file mode 100644
index 0000000..3d25aa1
--- /dev/null
+++ b/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.max.spef
@@ -0,0 +1,61676 @@
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+*DESIGN "user_proj_example"
+*DATE "11:11:11 Fri 11 11, 1111"
+*VENDOR "OpenRCX"
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+*VERSION "1.0"
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+
+*PORTS
+a[0] I
+a[1] I
+a[2] I
+a[3] I
+a[4] I
+a[5] I
+a[6] I
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+p[7] O
+
+*D_NET *1 0.0014323
+*CONN
+*P a[0] I
+*I *52135:A I *D sky130_fd_sc_hd__clkbuf_4
+*I *391:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
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+2 *52135:A 0.000248478
+3 *391:DIODE 0
+4 *1:8 0.000716148
+*RES
+1 a[0] *1:8 24.0936 
+2 *1:8 *391:DIODE 23 
+3 *1:8 *52135:A 27.4536 
+*END
+
+*D_NET *2 0.0011743
+*CONN
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+*I *392:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52143:A I *D sky130_fd_sc_hd__buf_4
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+3 *52143:A 4.24211e-05
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+3 *2:5 *392:DIODE 40.2579 
+*END
+
+*D_NET *3 0.00127961
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+*I *393:DIODE I *D sky130_fd_sc_hd__diode_2
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+6 *52144:A *272:5 4.2573e-05
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+3 *3:7 *52144:A 23.6214 
+*END
+
+*D_NET *4 0.0016298
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+*I *52145:A I *D sky130_fd_sc_hd__clkbuf_2
+*I *394:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
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+6 *52145:A *278:9 2.4754e-05
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+1 a[3] *4:7 22.9957 
+2 *4:7 *394:DIODE 23 
+3 *4:7 *52145:A 27.4536 
+*END
+
+*D_NET *5 0.00149811
+*CONN
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+*I *395:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52146:A I *D sky130_fd_sc_hd__clkbuf_2
+*CAP
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+6 *52146:A *272:15 5.56356e-05
+7 *52146:A *278:9 2.47321e-05
+*RES
+1 a[4] *5:5 7.99571 
+2 *5:5 *52146:A 39.595 
+3 *5:5 *395:DIODE 40.9621 
+*END
+
+*D_NET *6 0.00147759
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+*I *52147:A I *D sky130_fd_sc_hd__clkbuf_4
+*I *396:DIODE I *D sky130_fd_sc_hd__diode_2
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+5 *396:DIODE *272:25 0.000143655
+6 *396:DIODE *279:5 1.40958e-05
+7 *52147:A *279:5 7.08136e-05
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+1 a[5] *6:7 22.9957 
+2 *6:7 *396:DIODE 25.0507 
+3 *6:7 *52147:A 25.0921 
+*END
+
+*D_NET *7 0.00257054
+*CONN
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+*I *52148:A I *D sky130_fd_sc_hd__clkbuf_1
+*I *397:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 a[6] 0.00041853
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+6 *7:7 *261:16 0
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+1 a[6] *7:7 23.7 
+2 *7:7 *397:DIODE 32.1971 
+3 *7:7 *52148:A 25.5271 
+*END
+
+*D_NET *8 0.00939204
+*CONN
+*P a[7] I
+*I *52149:A I *D sky130_fd_sc_hd__clkbuf_2
+*I *398:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 a[7] 0.000341433
+2 *52149:A 0
+3 *398:DIODE 0
+4 *8:23 0.000518879
+5 *8:13 6.87722e-05
+6 *8:8 0.00231159
+7 *8:7 0.00310313
+8 *8:8 *263:9 0.00122192
+9 *8:8 *282:18 0.00113133
+10 *8:13 *282:10 2.5415e-05
+11 *8:23 *263:9 0.000651216
+12 *8:23 *283:11 1.83667e-05
+*RES
+1 a[7] *8:7 21.9393 
+2 *8:7 *8:8 36.83 
+3 *8:8 *8:13 31.2014 
+4 *8:13 *398:DIODE 23 
+5 *8:7 *8:23 38.845 
+6 *8:23 *52149:A 23 
+*END
+
+*D_NET *9 0.00158062
+*CONN
+*P b[0] I
+*I *399:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52150:A I *D sky130_fd_sc_hd__clkbuf_1
+*CAP
+1 b[0] 0.000406367
+2 *399:DIODE 0.000104209
+3 *52150:A 6.84452e-05
+4 *9:5 0.000579021
+5 *399:DIODE *267:16 0.000141888
+6 *52150:A *267:5 0.00014196
+7 *9:5 *284:6 0.000138727
+*RES
+1 b[0] *9:5 8.7 
+2 *9:5 *52150:A 39.5743 
+3 *9:5 *399:DIODE 40.2579 
+*END
+
+*D_NET *10 0.0014701
+*CONN
+*P b[1] I
+*I *52136:A I *D sky130_fd_sc_hd__clkbuf_2
+*I *384:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[1] 0.000406733
+2 *52136:A 0.000134686
+3 *384:DIODE 0.000102446
+4 *10:7 0.000643866
+5 *384:DIODE *267:5 5.10686e-05
+6 *52136:A *267:5 0.000131304
+7 *10:7 *262:6 0
+*RES
+1 b[1] *10:7 22.9957 
+2 *10:7 *384:DIODE 24.5743 
+3 *10:7 *52136:A 26.0243 
+*END
+
+*D_NET *11 0.0013478
+*CONN
+*P b[2] I
+*I *52137:A I *D sky130_fd_sc_hd__clkbuf_2
+*I *385:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[2] 0.000383617
+2 *52137:A 7.52621e-05
+3 *385:DIODE 9.59401e-05
+4 *11:7 0.000554819
+5 *385:DIODE *267:5 0.000103637
+6 *52137:A *267:5 7.88926e-05
+7 *11:7 *263:6 5.56306e-05
+*RES
+1 b[2] *11:7 23.3479 
+2 *11:7 *385:DIODE 25.0507 
+3 *11:7 *52137:A 24.5743 
+*END
+
+*D_NET *12 0.00125985
+*CONN
+*P b[3] I
+*I *52138:A I *D sky130_fd_sc_hd__buf_2
+*I *386:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[3] 0.00040842
+2 *52138:A 2.33465e-05
+3 *386:DIODE 7.79368e-05
+4 *12:7 0.000509703
+5 *386:DIODE *267:5 0.000185428
+6 *52138:A *267:5 5.50106e-05
+*RES
+1 b[3] *12:7 23.7 
+2 *12:7 *386:DIODE 25.0507 
+3 *12:7 *52138:A 23.6214 
+*END
+
+*D_NET *13 0.00129843
+*CONN
+*P b[4] I
+*I *52139:A I *D sky130_fd_sc_hd__clkbuf_4
+*I *387:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[4] 0.000392995
+2 *52139:A 4.89608e-05
+3 *387:DIODE 0.000115993
+4 *13:7 0.000557949
+5 *387:DIODE *267:5 0.000128391
+6 *52139:A *267:5 5.41385e-05
+*RES
+1 b[4] *13:7 23.3479 
+2 *13:7 *387:DIODE 25.5271 
+3 *13:7 *52139:A 24.0979 
+*END
+
+*D_NET *14 0.00125985
+*CONN
+*P b[5] I
+*I *52140:A I *D sky130_fd_sc_hd__buf_4
+*I *388:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[5] 0.00040842
+2 *52140:A 2.33465e-05
+3 *388:DIODE 7.79368e-05
+4 *14:7 0.000509703
+5 *388:DIODE *267:5 0.000185428
+6 *52140:A *267:5 5.50106e-05
+*RES
+1 b[5] *14:7 23.7 
+2 *14:7 *388:DIODE 25.0507 
+3 *14:7 *52140:A 23.6214 
+*END
+
+*D_NET *15 0.00156949
+*CONN
+*P b[6] I
+*I *52141:A I *D sky130_fd_sc_hd__buf_4
+*I *389:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[6] 0.000456232
+2 *52141:A 0.000153853
+3 *389:DIODE 0
+4 *15:8 0.000610085
+5 *52141:A *267:5 0.000317553
+6 *15:8 *267:5 3.17634e-05
+*RES
+1 b[6] *15:8 24.0936 
+2 *15:8 *389:DIODE 23 
+3 *15:8 *52141:A 27.3293 
+*END
+
+*D_NET *16 0.00116032
+*CONN
+*P b[7] I
+*I *390:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52142:A I *D sky130_fd_sc_hd__buf_4
+*CAP
+1 b[7] 0.00040842
+2 *390:DIODE 0.000105132
+3 *52142:A 4.24211e-05
+4 *16:5 0.000555973
+5 *390:DIODE *268:8 4.83778e-05
+*RES
+1 b[7] *16:5 8.7 
+2 *16:5 *52142:A 38.6214 
+3 *16:5 *390:DIODE 40.2579 
+*END
+
+*D_NET *17 0.00136692
+*CONN
+*P p[0] O
+*I *52151:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[0] 0.000531792
+2 *52151:X 0.000151666
+3 *17:7 0.000683458
+*RES
+1 *52151:X *17:7 40.5271 
+2 *17:7 p[0] 11.5171 
+*END
+
+*D_NET *18 0.00114555
+*CONN
+*P p[1] O
+*I *52152:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[1] 4.49146e-05
+2 *52152:X 0.000527861
+3 *18:6 0.000572776
+*RES
+1 *52152:X *18:6 49.5896 
+2 *18:6 p[1] 1.02536 
+*END
+
+*D_NET *19 0.00114555
+*CONN
+*P p[2] O
+*I *52153:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[2] 4.49146e-05
+2 *52153:X 0.000527861
+3 *19:6 0.000572776
+4 *19:6 *52153:A 0
+*RES
+1 *52153:X *19:6 49.5896 
+2 *19:6 p[2] 1.02536 
+*END
+
+*D_NET *20 0.00115694
+*CONN
+*P p[3] O
+*I *52154:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[3] 4.49146e-05
+2 *52154:X 0.000515763
+3 *20:6 0.000560677
+4 *20:6 *273:12 3.55887e-05
+*RES
+1 *52154:X *20:6 49.5896 
+2 *20:6 p[3] 1.02536 
+*END
+
+*D_NET *21 0.00179201
+*CONN
+*P p[4] O
+*I *52155:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[4] 0.00067876
+2 *52155:X 0.000130926
+3 *21:7 0.000809686
+4 *21:7 *52155:A 0.000103647
+5 *21:7 *275:18 6.89881e-05
+*RES
+1 *52155:X *21:7 41.0036 
+2 *21:7 p[4] 13.5679 
+*END
+
+*D_NET *22 0.00118729
+*CONN
+*P p[5] O
+*I *52156:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[5] 6.5784e-05
+2 *52156:X 0.000527861
+3 *22:6 0.000593645
+*RES
+1 *52156:X *22:6 49.5896 
+2 *22:6 p[5] 1.50179 
+*END
+
+*D_NET *23 0.00121296
+*CONN
+*P p[6] O
+*I *52157:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[6] 0.000531822
+2 *52157:X 5.68615e-05
+3 *23:8 0.000588684
+4 *23:8 *276:20 3.55887e-05
+*RES
+1 *52157:X *23:8 39.6468 
+2 *23:8 p[6] 11.7346 
+*END
+
+*D_NET *24 0.00147761
+*CONN
+*P p[7] O
+*I *52158:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[7] 0.000528662
+2 *52158:X 0.000147214
+3 *24:7 0.000675876
+4 p[7] *52158:A 2.22079e-05
+5 *24:7 *52158:A 0.000103647
+*RES
+1 *52158:X *24:7 41.0036 
+2 *24:7 p[7] 11.5171 
+*END
+
+*D_NET *27 0.00102892
+*CONN
+*I *51969:B I *D sky130_fd_sc_hd__or2_1
+*I *51968:Y O *D sky130_fd_sc_hd__a22oi_1
+*CAP
+1 *51969:B 2.09638e-05
+2 *51968:Y 0.000339642
+3 *27:6 0.000360606
+4 *51969:B *193:38 1.39317e-05
+5 *51969:B *280:35 5.50049e-05
+6 *27:6 *51921:C 0
+7 *27:6 *189:31 9.7097e-05
+8 *27:6 *212:12 0.000135547
+9 *27:6 *262:26 6.12496e-06
+*RES
+1 *51968:Y *27:6 43.075 
+2 *27:6 *51969:B 38.6214 
+*END
+
+*D_NET *28 0.00430773
+*CONN
+*I *51994:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51972:B1 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51969:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51994:A 0
+2 *51972:B1 1.25102e-05
+3 *51969:X 0.000535671
+4 *28:26 0.000182894
+5 *28:15 0.000731074
+6 *51972:B1 *51970:B 3.22879e-05
+7 *51972:B1 *29:8 5.50049e-05
+8 *28:15 *51969:A 1.24376e-05
+9 *28:15 *51970:B 0.000112148
+10 *28:15 *29:8 0.000139357
+11 *28:15 *31:7 5.25848e-05
+12 *28:15 *189:45 0.000381757
+13 *28:15 *189:50 0.000443679
+14 *28:15 *192:37 0.000614968
+15 *28:15 *193:15 0.000233617
+16 *28:15 *193:21 1.56665e-05
+17 *28:15 *193:38 2.02872e-05
+18 *28:15 *262:53 0.000200318
+19 *28:26 *51967:C 0.000133635
+20 *28:26 *51972:B2 0.000222104
+21 *28:26 *51994:B 0.000140949
+22 *28:26 *31:8 0
+23 *28:26 *261:16 0
+24 *28:26 *278:56 3.47776e-05
+*RES
+1 *51969:X *28:15 41.8293 
+2 *28:15 *51972:B1 23.6214 
+3 *28:15 *28:26 35.4271 
+4 *28:26 *51994:A 23 
+*END
+
+*D_NET *29 0.00132635
+*CONN
+*I *51971:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *51970:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51971:A0 0
+2 *51970:Y 0.000302714
+3 *29:8 0.000302714
+4 *29:8 *51967:C 0.000194318
+5 *29:8 *51970:B 8.47306e-05
+6 *29:8 *51971:S 1.22906e-05
+7 *29:8 *51972:B2 5.50049e-05
+8 *29:8 *31:8 0.000168744
+9 *29:8 *272:188 1.14762e-05
+10 *51972:B1 *29:8 5.50049e-05
+11 *28:15 *29:8 0.000139357
+*RES
+1 *51970:Y *29:8 45.5193 
+2 *29:8 *51971:A0 38 
+*END
+
+*D_NET *30 0.000925048
+*CONN
+*I *51994:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51972:B2 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51971:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *51994:B 9.38519e-05
+2 *51972:B2 0.000159643
+3 *51971:X 0
+4 *30:5 0.000253495
+5 *51972:B2 *261:16 0
+6 *51994:B *31:8 0
+7 *51994:B *261:16 0
+8 *28:26 *51972:B2 0.000222104
+9 *28:26 *51994:B 0.000140949
+10 *29:8 *51972:B2 5.50049e-05
+*RES
+1 *51971:X *30:5 38 
+2 *30:5 *51972:B2 41.5836 
+3 *30:5 *51994:B 40.2579 
+*END
+
+*D_NET *31 0.00451467
+*CONN
+*I *51974:B I *D sky130_fd_sc_hd__nor2_1
+*I *51973:B I *D sky130_fd_sc_hd__nand2_1
+*I *51988:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51972:X O *D sky130_fd_sc_hd__o2bb2a_1
+*CAP
+1 *51974:B 3.86302e-05
+2 *51973:B 0.000158588
+3 *51988:B 0.000503619
+4 *51972:X 8.16699e-05
+5 *31:21 0.000287104
+6 *31:8 0.00104123
+7 *31:7 0.000529395
+8 *51973:B *51974:A 7.97144e-05
+9 *51973:B *32:8 2.93845e-05
+10 *51974:B *51974:A 9.5877e-05
+11 *51974:B *51976:B 5.50106e-05
+12 *51988:B *51988:A 1.94693e-05
+13 *51988:B *51989:B 0.000267178
+14 *51988:B *259:20 4.2062e-05
+15 *51988:B *261:23 1.79538e-05
+16 *31:8 *51967:C 2.70366e-05
+17 *31:8 *51971:S 0.000138718
+18 *31:8 *51989:A 0.000166532
+19 *31:8 *33:6 2.60152e-05
+20 *31:8 *34:8 0.000219882
+21 *31:8 *53:8 0
+22 *31:8 *55:8 0
+23 *31:8 *258:8 0.000192077
+24 *31:8 *259:20 2.36844e-05
+25 *31:8 *261:16 0
+26 *31:8 *278:56 3.83778e-05
+27 *31:21 *51977:C 2.46345e-05
+28 *31:21 *34:8 0.000139647
+29 *31:21 *259:20 4.98543e-05
+30 *51994:B *31:8 0
+31 *28:15 *31:7 5.25848e-05
+32 *28:26 *31:8 0
+33 *29:8 *31:8 0.000168744
+*RES
+1 *51972:X *31:7 39.0979 
+2 *31:7 *31:8 11.4136 
+3 *31:8 *51988:B 45.1879 
+4 *31:8 *31:21 17.2579 
+5 *31:21 *51973:B 26.5214 
+6 *31:21 *51974:B 24.0979 
+*END
+
+*D_NET *32 0.000745245
+*CONN
+*I *51975:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *51973:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51975:A2 0
+2 *51973:Y 0.000266756
+3 *32:8 0.000266756
+4 *32:8 *51989:A 0
+5 *32:8 *258:8 0
+6 *32:8 *259:20 7.56417e-05
+7 *32:8 *272:83 0.000106707
+8 *51973:B *32:8 2.93845e-05
+*RES
+1 *51973:Y *32:8 43.3443 
+2 *32:8 *51975:A2 38 
+*END
+
+*D_NET *33 0.00112053
+*CONN
+*I *51975:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *51974:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51975:B1 0.000116306
+2 *51974:Y 0.000154787
+3 *33:6 0.000271093
+4 *51975:B1 *51975:A1 5.50049e-05
+5 *51975:B1 *34:8 2.93845e-05
+6 *33:6 *34:8 0.000299187
+7 *33:6 *48:6 0.000168754
+8 *33:6 *56:6 0
+9 *33:6 *225:22 0
+10 *31:8 *33:6 2.60152e-05
+*RES
+1 *51974:Y *33:6 42.7229 
+2 *33:6 *51975:B1 40.0507 
+*END
+
+*D_NET *34 0.00281086
+*CONN
+*I *51977:C I *D sky130_fd_sc_hd__and3_1
+*I *51976:B I *D sky130_fd_sc_hd__xor2_1
+*I *51975:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *51977:C 0.000359522
+2 *51976:B 0.000329307
+3 *51975:X 0.000180824
+4 *34:8 0.000869652
+5 *51976:B *51974:A 4.95081e-05
+6 *51977:C *225:22 0
+7 *51977:C *225:23 0.000227208
+8 *51977:C *265:57 2.70935e-05
+9 *51977:C *272:83 0
+10 *34:8 *225:22 0
+11 *51974:B *51976:B 5.50106e-05
+12 *51975:B1 *34:8 2.93845e-05
+13 *31:8 *34:8 0.000219882
+14 *31:21 *51977:C 2.46345e-05
+15 *31:21 *34:8 0.000139647
+16 *33:6 *34:8 0.000299187
+*RES
+1 *51975:X *34:8 43.3443 
+2 *34:8 *51976:B 43.8621 
+3 *34:8 *51977:C 43.8207 
+*END
+
+*D_NET *35 0.00132008
+*CONN
+*I *51978:A2 I *D sky130_fd_sc_hd__o21ba_2
+*I *52001:B I *D sky130_fd_sc_hd__xor2_1
+*I *51976:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51978:A2 0.000186262
+2 *52001:B 1.80182e-05
+3 *51976:X 0.000122659
+4 *35:6 0.000326939
+5 *51978:A2 *51978:A1 9.28739e-05
+6 *51978:A2 *261:29 0.000102998
+7 *51978:A2 *266:101 0.000185434
+8 *52001:B *36:10 2.93845e-05
+9 *52001:B *265:57 5.50106e-05
+10 *35:6 *51978:A1 1.22803e-05
+11 *35:6 *256:8 6.58373e-05
+12 *35:6 *261:29 0.000122386
+13 *35:6 *265:77 0
+*RES
+1 *51976:X *35:6 41.3143 
+2 *35:6 *52001:B 38.6214 
+3 *35:6 *51978:A2 43.0129 
+*END
+
+*D_NET *36 0.00183721
+*CONN
+*I *51978:B1_N I *D sky130_fd_sc_hd__o21ba_2
+*I *51977:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *51978:B1_N 0
+2 *51977:X 0.000489392
+3 *36:10 0.000489392
+4 *36:10 *51978:A1 0
+5 *36:10 *60:8 2.93747e-05
+6 *36:10 *256:8 0
+7 *36:10 *257:8 0.000525423
+8 *36:10 *265:57 0.00026961
+9 *36:10 *265:77 4.6318e-06
+10 *52001:B *36:10 2.93845e-05
+*RES
+1 *51977:X *36:10 49.5793 
+2 *36:10 *51978:B1_N 38 
+*END
+
+*D_NET *37 0.00276784
+*CONN
+*I *51979:B I *D sky130_fd_sc_hd__xnor2_4
+*I *51980:B I *D sky130_fd_sc_hd__nor2_1
+*I *51978:X O *D sky130_fd_sc_hd__o21ba_2
+*CAP
+1 *51979:B 0.000177102
+2 *51980:B 3.80527e-05
+3 *51978:X 0.000505367
+4 *37:10 0.000215155
+5 *37:8 0.000505367
+6 *51979:B *51979:A 1.5769e-05
+7 *51979:B *39:8 0.000313249
+8 *51979:B *267:104 9.8971e-06
+9 *51979:B *272:130 0.000269781
+10 *51980:B *51979:A 5.90675e-06
+11 *37:8 *255:8 5.56203e-05
+12 *37:8 *266:101 0.000491451
+13 *37:8 *266:128 0.000139647
+14 *37:8 *272:130 2.54749e-05
+*RES
+1 *51978:X *37:8 47.7564 
+2 *37:8 *37:10 15 
+3 *37:10 *51980:B 23.8493 
+4 *37:10 *51979:B 28.2821 
+*END
+
+*D_NET *38 0.00137239
+*CONN
+*I *51986:B I *D sky130_fd_sc_hd__xor2_4
+*I *51981:A2 I *D sky130_fd_sc_hd__o21bai_2
+*I *51979:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *51986:B 0.000230958
+2 *51981:A2 0.000151625
+3 *51979:Y 5.30716e-05
+4 *38:7 0.000435655
+5 *51981:A2 *51981:A1 3.0647e-05
+6 *51981:A2 *51986:A 5.21127e-05
+7 *51981:A2 *39:8 0
+8 *51986:B *51986:A 0.000122294
+9 *38:7 *267:104 6.71188e-05
+10 *38:7 *272:130 0.000228909
+*RES
+1 *51979:Y *38:7 40.5271 
+2 *38:7 *51981:A2 40.61 
+3 *38:7 *51986:B 42.8886 
+*END
+
+*D_NET *39 0.00118629
+*CONN
+*I *51981:B1_N I *D sky130_fd_sc_hd__o21bai_2
+*I *51980:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51981:B1_N 8.93774e-05
+2 *51980:Y 0.000264143
+3 *39:8 0.000353521
+4 *39:8 *51979:A 0.000150242
+5 *39:8 *51981:A1 0
+6 *39:8 *51986:A 0
+7 *39:8 *255:8 0
+8 *39:8 *267:104 1.57571e-05
+9 *39:8 *272:118 0
+10 *39:8 *272:130 0
+11 *51979:B *39:8 0.000313249
+12 *51981:A2 *39:8 0
+*RES
+1 *51980:Y *39:8 44.4421 
+2 *39:8 *51981:B1_N 39.5743 
+*END
+
+*D_NET *40 0.00465603
+*CONN
+*I *52039:A I *D sky130_fd_sc_hd__nand2_1
+*I *51983:A I *D sky130_fd_sc_hd__xnor2_2
+*I *51981:Y O *D sky130_fd_sc_hd__o21bai_2
+*CAP
+1 *52039:A 0
+2 *51983:A 0
+3 *51981:Y 0.000367459
+4 *40:20 0.00044266
+5 *40:8 0.000703464
+6 *40:7 0.000628263
+7 *40:7 *51961:A 5.10686e-05
+8 *40:7 *51961:B 5.47927e-05
+9 *40:7 *51981:A1 9.75779e-05
+10 *40:7 *232:80 0.000321274
+11 *40:7 *232:95 5.73288e-05
+12 *40:7 *254:7 0.000575797
+13 *40:8 *41:6 0.000141975
+14 *40:8 *250:14 0
+15 *40:8 *272:142 0
+16 *40:20 *52039:B 0.00074623
+17 *40:20 *52040:A2 0
+18 *40:20 *41:6 2.74096e-05
+19 *40:20 *42:6 0
+20 *40:20 *97:8 0.000166504
+21 *40:20 *103:5 0.000274226
+22 *40:20 *252:23 0
+*RES
+1 *51981:Y *40:7 49.1029 
+2 *40:7 *40:8 5.075 
+3 *40:8 *51983:A 38 
+4 *40:8 *40:20 27.0971 
+5 *40:20 *52039:A 23 
+*END
+
+*D_NET *41 0.00198912
+*CONN
+*I *52039:B I *D sky130_fd_sc_hd__nand2_1
+*I *51983:B I *D sky130_fd_sc_hd__xnor2_2
+*I *51982:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52039:B 0.000451394
+2 *51983:B 0
+3 *51982:X 8.53573e-05
+4 *41:6 0.000536751
+5 *52039:B *43:11 0
+6 *40:8 *41:6 0.000141975
+7 *40:20 *52039:B 0.00074623
+8 *40:20 *41:6 2.74096e-05
+*RES
+1 *51982:X *41:6 40.2579 
+2 *41:6 *51983:B 38 
+3 *41:6 *52039:B 48.1707 
+*END
+
+*D_NET *42 0.00125254
+*CONN
+*I *52040:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51984:B I *D sky130_fd_sc_hd__xor2_4
+*I *51983:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52040:A2 0.000241601
+2 *51984:B 0
+3 *51983:Y 0.000115586
+4 *42:6 0.000357187
+5 *52040:A2 *268:70 0
+6 *52040:A2 *268:78 0.000269775
+7 *52040:A2 *272:145 5.57964e-05
+8 *52040:A2 *273:7 0.000103637
+9 *52040:A2 *273:11 2.98648e-05
+10 *42:6 *272:145 7.90939e-05
+11 *40:20 *52040:A2 0
+12 *40:20 *42:6 0
+*RES
+1 *51983:Y *42:6 40.9621 
+2 *42:6 *51984:B 38 
+3 *42:6 *52040:A2 44.1107 
+*END
+
+*D_NET *43 0.00246522
+*CONN
+*I *52045:A1 I *D sky130_fd_sc_hd__a21oi_4
+*I *52009:A I *D sky130_fd_sc_hd__xor2_4
+*I *51984:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52045:A1 0
+2 *52009:A 1.62898e-05
+3 *51984:X 0.000572349
+4 *43:23 0.000342172
+5 *43:11 0.00093081
+6 *52009:A *268:78 4.73456e-05
+7 *52009:A *273:11 1.94693e-05
+8 *43:11 *268:78 0.000259146
+9 *43:11 *273:11 0.0001042
+10 *43:23 *52045:A2 0
+11 *43:23 *67:8 0
+12 *43:23 *103:5 0.000173442
+13 *52039:B *43:11 0
+*RES
+1 *51984:X *43:11 41.0511 
+2 *43:11 *52009:A 23.6214 
+3 *43:11 *43:23 36.7943 
+4 *43:23 *52045:A1 23 
+*END
+
+*D_NET *44 0.00203429
+*CONN
+*I *52008:A I *D sky130_fd_sc_hd__xor2_4
+*I *52044:A I *D sky130_fd_sc_hd__nor2_1
+*I *51985:X O *D sky130_fd_sc_hd__and2_2
+*CAP
+1 *52008:A 0
+2 *52044:A 0.000191261
+3 *51985:X 0.000465292
+4 *44:10 0.000191261
+5 *44:8 0.000465292
+6 *52044:A *52008:B 0.000353295
+7 *52044:A *102:8 0.000176355
+8 *44:8 *52044:B 0
+9 *44:8 *45:7 9.30575e-05
+10 *44:8 *66:8 9.84794e-05
+*RES
+1 *51985:X *44:8 44.6907 
+2 *44:8 *44:10 15 
+3 *44:10 *52044:A 29.525 
+4 *44:10 *52008:A 23 
+*END
+
+*D_NET *45 0.0021143
+*CONN
+*I *52007:A1 I *D sky130_fd_sc_hd__a21boi_2
+*I *52134:A I *D sky130_fd_sc_hd__xnor2_4
+*I *51986:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52007:A1 0
+2 *52134:A 0
+3 *51986:X 0.00064343
+4 *45:12 0.00018425
+5 *45:7 0.00082768
+6 *45:7 *51985:B 0.00022296
+7 *45:7 *52007:A2 3.22879e-05
+8 *45:7 *66:8 9.86623e-05
+9 *45:12 *51985:B 1.19692e-05
+10 *45:12 *64:14 0
+11 *45:12 *267:117 0
+12 *44:8 *45:7 9.30575e-05
+*RES
+1 *51986:X *45:7 13.4332 
+2 *45:7 *45:12 33.3143 
+3 *45:12 *52134:A 23 
+4 *45:7 *52007:A1 23 
+*END
+
+*D_NET *46 0.00272041
+*CONN
+*I *52006:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52005:A I *D sky130_fd_sc_hd__nand3_1
+*I *51987:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52006:B1 0
+2 *52005:A 0.000171209
+3 *51987:Y 0.000633968
+4 *46:10 0.000171209
+5 *46:8 0.000633968
+6 *52005:A *52005:B 0.00028119
+7 *52005:A *52005:C 3.33773e-05
+8 *52005:A *52006:A2 0.000101475
+9 *52005:A *64:9 4.39488e-05
+10 *46:8 *52004:B 1.76557e-05
+11 *46:8 *184:7 0.000491451
+12 *46:8 *185:6 0.000140958
+*RES
+1 *51987:Y *46:8 48.15 
+2 *46:8 *46:10 15 
+3 *46:10 *52005:A 27.9507 
+4 *46:10 *52006:B1 23 
+*END
+
+*D_NET *47 0.000608189
+*CONN
+*I *51989:B I *D sky130_fd_sc_hd__xor2_1
+*I *51988:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51989:B 0.000101162
+2 *51988:Y 0.000101162
+3 *51989:B *259:20 0.00012103
+4 *51989:B *261:23 1.76557e-05
+5 *51988:B *51989:B 0.000267178
+*RES
+1 *51988:Y *51989:B 49.5007 
+*END
+
+*D_NET *48 0.000825357
+*CONN
+*I *51999:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51989:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51999:A1 0.000232566
+2 *51989:X 8.8508e-05
+3 *48:6 0.000321074
+4 *48:6 *55:8 0
+5 *48:6 *56:6 0
+6 *48:6 *225:22 1.44546e-05
+7 *33:6 *48:6 0.000168754
+*RES
+1 *51989:X *48:6 40.2579 
+2 *48:6 *51999:A1 41.0036 
+*END
+
+*D_NET *49 0.000944527
+*CONN
+*I *51992:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51990:X O *D sky130_fd_sc_hd__and2b_1
+*CAP
+1 *51992:A2 3.83793e-05
+2 *51990:X 0.000143247
+3 *49:6 0.000181627
+4 *51992:A2 *282:5 5.67058e-05
+5 *49:6 *51990:A_N 0.000100383
+6 *49:6 *50:8 2.26385e-05
+7 *49:6 *193:27 0.000289695
+8 *49:6 *232:8 0.000111852
+*RES
+1 *51990:X *49:6 42.0186 
+2 *49:6 *51992:A2 38.6214 
+*END
+
+*D_NET *50 0.000442829
+*CONN
+*I *51992:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *51991:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *51992:B1 0
+2 *51991:X 0.000158604
+3 *50:8 0.000158604
+4 *50:8 *51:6 4.334e-05
+5 *50:8 *193:27 0
+6 *50:8 *232:8 4.6318e-06
+7 *50:8 *281:45 5.50106e-05
+8 *49:6 *50:8 2.26385e-05
+*RES
+1 *51991:X *50:8 40.8793 
+2 *50:8 *51992:B1 38 
+*END
+
+*D_NET *51 0.00203182
+*CONN
+*I *51993:B I *D sky130_fd_sc_hd__nand2_1
+*I *51995:B I *D sky130_fd_sc_hd__nor2_1
+*I *51992:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *51993:B 0
+2 *51995:B 6.65628e-05
+3 *51992:X 0.000725371
+4 *51:8 6.65628e-05
+5 *51:6 0.000725371
+6 *51995:B *207:13 0.000270682
+7 *51995:B *258:5 0.0001042
+8 *51:6 *51990:A_N 2.15048e-05
+9 *51:6 *51991:A1 8.22421e-06
+10 *51:6 *51991:B2 0
+11 *51:6 *52:8 0
+12 *51:6 *192:37 0
+13 *51:6 *193:15 0
+14 *51:6 *232:8 0
+15 *51:6 *278:81 0
+16 *51:6 *281:45 0
+17 *50:8 *51:6 4.334e-05
+*RES
+1 *51992:X *51:6 48.3571 
+2 *51:6 *51:8 15 
+3 *51:8 *51995:B 26.0036 
+4 *51:8 *51993:B 23 
+*END
+
+*D_NET *52 0.0011654
+*CONN
+*I *51996:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51993:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51996:A1 4.15645e-05
+2 *51993:Y 0.000258642
+3 *52:8 0.000300206
+4 *51996:A1 *51971:A1 0.000141052
+5 *51996:A1 *278:70 7.44257e-05
+6 *52:8 *54:8 0.000110913
+7 *52:8 *55:8 1.22906e-05
+8 *52:8 *207:13 0.000226306
+9 *51:6 *52:8 0
+*RES
+1 *51993:Y *52:8 42.4329 
+2 *52:8 *51996:A1 39.5743 
+*END
+
+*D_NET *53 0.000980957
+*CONN
+*I *51996:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *51994:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51996:A2 0
+2 *51994:Y 0.000354043
+3 *53:8 0.000354043
+4 *53:8 *55:8 6.68587e-05
+5 *53:8 *207:13 1.24376e-05
+6 *53:8 *207:19 0.000193575
+7 *31:8 *53:8 0
+*RES
+1 *51994:Y *53:8 43.8621 
+2 *53:8 *51996:A2 38 
+*END
+
+*D_NET *54 0.000584105
+*CONN
+*I *51996:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51995:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51996:B1 0
+2 *51995:Y 0.000133204
+3 *54:8 0.000133204
+4 *54:8 *55:8 0.000110913
+5 *54:8 *207:13 9.58714e-05
+6 *52:8 *54:8 0.000110913
+*RES
+1 *51995:Y *54:8 40.6514 
+2 *54:8 *51996:B1 38 
+*END
+
+*D_NET *55 0.00226437
+*CONN
+*I *51998:A2 I *D sky130_fd_sc_hd__o21ai_1
+*I *51997:B I *D sky130_fd_sc_hd__nand2_1
+*I *51996:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *51998:A2 8.2873e-05
+2 *51997:B 0
+3 *51996:Y 0.000425551
+4 *55:10 8.2873e-05
+5 *55:8 0.000425551
+6 *51998:A2 *225:15 0.000356724
+7 *51998:A2 *261:23 0.000269775
+8 *55:8 *51971:A1 5.50106e-05
+9 *55:8 *51971:S 0
+10 *55:8 *56:6 6.93449e-05
+11 *55:8 *58:6 0.0002499
+12 *55:8 *279:31 5.67058e-05
+13 *31:8 *55:8 0
+14 *48:6 *55:8 0
+15 *52:8 *55:8 1.22906e-05
+16 *53:8 *55:8 6.68587e-05
+17 *54:8 *55:8 0.000110913
+*RES
+1 *51996:Y *55:8 47.57 
+2 *55:8 *55:10 15 
+3 *55:10 *51997:B 23 
+4 *55:10 *51998:A2 26.9564 
+*END
+
+*D_NET *56 0.000252672
+*CONN
+*I *51999:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *51997:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51999:A2 0
+2 *51997:Y 9.16635e-05
+3 *56:6 9.16635e-05
+4 *33:6 *56:6 0
+5 *48:6 *56:6 0
+6 *55:8 *56:6 6.93449e-05
+*RES
+1 *51997:Y *56:6 39.9057 
+2 *56:6 *51999:A2 38 
+*END
+
+*D_NET *57 0.000500739
+*CONN
+*I *51999:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51998:Y O *D sky130_fd_sc_hd__o21ai_1
+*CAP
+1 *51999:B1 0.00015502
+2 *51998:Y 9.53488e-05
+3 *57:6 0.000250369
+4 *57:6 *58:6 0
+*RES
+1 *51998:Y *57:6 39.5536 
+2 *57:6 *51999:B1 40.5271 
+*END
+
+*D_NET *58 0.0025293
+*CONN
+*I *52002:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52000:B I *D sky130_fd_sc_hd__nand2_1
+*I *51999:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52002:B1 0.000316844
+2 *52000:B 0
+3 *51999:Y 0
+4 *58:6 0.000953114
+5 *58:5 0.000636269
+6 *52002:B1 *52003:B 0.000226306
+7 *52002:B1 *59:8 0
+8 *52002:B1 *60:8 0
+9 *52002:B1 *261:29 9.84851e-05
+10 *52002:B1 *266:114 0
+11 *58:6 *60:8 0
+12 *58:6 *225:22 0
+13 *58:6 *257:8 4.83778e-05
+14 *58:6 *261:29 0
+15 *58:6 *265:68 0
+16 *55:8 *58:6 0.0002499
+17 *57:6 *58:6 0
+*RES
+1 *51999:Y *58:5 38 
+2 *58:5 *58:6 12.1179 
+3 *58:6 *52000:B 38 
+4 *58:6 *52002:B1 44.235 
+*END
+
+*D_NET *59 0.00200804
+*CONN
+*I *52006:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *52005:B I *D sky130_fd_sc_hd__nand3_1
+*I *52003:A I *D sky130_fd_sc_hd__and2_1
+*I *52000:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52006:A1 0
+2 *52005:B 0.000238435
+3 *52003:A 0
+4 *52000:Y 0.0001733
+5 *59:21 0.000570427
+6 *59:8 0.000505292
+7 *52005:B *52005:C 1.76557e-05
+8 *59:8 *60:8 0
+9 *59:8 *266:101 1.32314e-05
+10 *59:8 *266:103 0.00010018
+11 *59:8 *266:114 0
+12 *59:21 *60:8 0
+13 *59:21 *62:6 2.20458e-05
+14 *59:21 *63:18 0
+15 *59:21 *185:6 8.62783e-05
+16 *52002:B1 *59:8 0
+17 *52005:A *52005:B 0.00028119
+*RES
+1 *52000:Y *59:8 41.0036 
+2 *59:8 *52003:A 38 
+3 *59:8 *59:21 20.8414 
+4 *59:21 *52005:B 26.9771 
+5 *59:21 *52006:A1 23 
+*END
+
+*D_NET *60 0.00326704
+*CONN
+*I *52130:A I *D sky130_fd_sc_hd__or2_1
+*I *52004:A I *D sky130_fd_sc_hd__nand2_1
+*I *52001:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52130:A 7.81803e-05
+2 *52004:A 0.00050209
+3 *52001:X 0.00043522
+4 *60:10 0.000580271
+5 *60:8 0.00043522
+6 *52004:A *52130:B 0.000154236
+7 *52004:A *52131:A 0.000546164
+8 *52130:A *52130:B 5.50106e-05
+9 *52130:A *184:7 4.95081e-05
+10 *60:8 *62:6 0
+11 *60:8 *261:29 0.000348456
+12 *60:8 *261:38 0
+13 *60:8 *265:57 5.3304e-05
+14 *52002:B1 *60:8 0
+15 *36:10 *60:8 2.93747e-05
+16 *58:6 *60:8 0
+17 *59:8 *60:8 0
+18 *59:21 *60:8 0
+*RES
+1 *52001:X *60:8 46.8657 
+2 *60:8 *60:10 15 
+3 *60:10 *52004:A 32.4871 
+4 *60:10 *52130:A 25.0714 
+*END
+
+*D_NET *61 0.000575688
+*CONN
+*I *52003:B I *D sky130_fd_sc_hd__and2_1
+*I *52002:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52003:B 0.000174691
+2 *52002:X 0.000174691
+3 *52002:B1 *52003:B 0.000226306
+*RES
+1 *52002:X *52003:B 49.9564 
+*END
+
+*D_NET *62 0.00175077
+*CONN
+*I *52130:B I *D sky130_fd_sc_hd__or2_1
+*I *52004:B I *D sky130_fd_sc_hd__nand2_1
+*I *52003:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52130:B 5.20022e-05
+2 *52004:B 0.000157951
+3 *52003:X 0.000172215
+4 *62:8 0.000209954
+5 *62:6 0.000172215
+6 *52004:B *52131:A 0.000407278
+7 *52004:B *184:7 3.46158e-05
+8 *52130:B *52131:A 2.32101e-05
+9 *52130:B *184:7 0.000272383
+10 *52004:A *52130:B 0.000154236
+11 *52130:A *52130:B 5.50106e-05
+12 *46:8 *52004:B 1.76557e-05
+13 *59:21 *62:6 2.20458e-05
+14 *60:8 *62:6 0
+*RES
+1 *52003:X *62:6 40.2579 
+2 *62:6 *62:8 15 
+3 *62:8 *52004:B 27.9507 
+4 *62:8 *52130:B 26.0036 
+*END
+
+*D_NET *63 0.0023522
+*CONN
+*I *52006:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52005:C I *D sky130_fd_sc_hd__nand3_1
+*I *52131:A I *D sky130_fd_sc_hd__and2_1
+*I *52004:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52006:A2 5.52635e-05
+2 *52005:C 0.000109343
+3 *52131:A 0.000158548
+4 *52004:Y 0
+5 *63:18 0.000332752
+6 *63:4 0.000326694
+7 *52005:C *64:9 5.50049e-05
+8 *52006:A2 *64:9 0.000185434
+9 *63:18 *185:6 0
+10 *52004:A *52131:A 0.000546164
+11 *52004:B *52131:A 0.000407278
+12 *52005:A *52005:C 3.33773e-05
+13 *52005:A *52006:A2 0.000101475
+14 *52005:B *52005:C 1.76557e-05
+15 *52130:B *52131:A 2.32101e-05
+16 *59:21 *63:18 0
+*RES
+1 *52004:Y *63:4 23 
+2 *63:4 *52131:A 29.96 
+3 *63:4 *63:18 32.2579 
+4 *63:18 *52005:C 25.5479 
+5 *63:18 *52006:A2 25.5479 
+*END
+
+*D_NET *64 0.00254964
+*CONN
+*I *52007:A2 I *D sky130_fd_sc_hd__a21boi_2
+*I *52133:B I *D sky130_fd_sc_hd__nand2_1
+*I *52005:Y O *D sky130_fd_sc_hd__nand3_1
+*CAP
+1 *52007:A2 8.50498e-05
+2 *52133:B 0
+3 *52005:Y 0.000458814
+4 *64:14 0.000260293
+5 *64:9 0.000804157
+6 *52007:A2 *66:8 0.000184527
+7 *64:9 *52007:B1_N 5.50106e-05
+8 *64:9 *65:5 0.000228903
+9 *64:14 *65:11 8.33529e-05
+10 *64:14 *186:6 7.28526e-05
+11 *52005:A *64:9 4.39488e-05
+12 *52005:C *64:9 5.50049e-05
+13 *52006:A2 *64:9 0.000185434
+14 *45:7 *52007:A2 3.22879e-05
+15 *45:12 *64:14 0
+*RES
+1 *52005:Y *64:9 32.3629 
+2 *64:9 *64:14 35.4271 
+3 *64:14 *52133:B 23 
+4 *64:9 *52007:A2 25.5271 
+*END
+
+*D_NET *65 0.00129952
+*CONN
+*I *52007:B1_N I *D sky130_fd_sc_hd__a21boi_2
+*I *52133:A I *D sky130_fd_sc_hd__nand2_1
+*I *52006:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52007:B1_N 1.9587e-05
+2 *52133:A 0
+3 *52006:X 8.2013e-05
+4 *65:11 0.000264966
+5 *65:5 0.000366566
+6 *65:11 *185:6 0
+7 *65:11 *186:6 0.00014411
+8 *65:11 *270:6 0
+9 *65:11 *271:5 5.50106e-05
+10 *64:9 *52007:B1_N 5.50106e-05
+11 *64:9 *65:5 0.000228903
+12 *64:14 *65:11 8.33529e-05
+*RES
+1 *52006:X *65:5 25.5271 
+2 *65:5 *65:11 36.0486 
+3 *65:11 *52133:A 23 
+4 *65:5 *52007:B1_N 23.6214 
+*END
+
+*D_NET *66 0.00293802
+*CONN
+*I *52044:B I *D sky130_fd_sc_hd__nor2_1
+*I *52008:B I *D sky130_fd_sc_hd__xor2_4
+*I *52007:Y O *D sky130_fd_sc_hd__a21boi_2
+*CAP
+1 *52044:B 4.26344e-05
+2 *52008:B 0.000347758
+3 *52007:Y 0.000512338
+4 *66:8 0.00090273
+5 *52044:B *268:85 0
+6 *66:8 *51985:B 0.000397602
+7 *66:8 *268:85 0
+8 *52007:A2 *66:8 0.000184527
+9 *52044:A *52008:B 0.000353295
+10 *44:8 *52044:B 0
+11 *44:8 *66:8 9.84794e-05
+12 *45:7 *66:8 9.86623e-05
+*RES
+1 *52007:Y *66:8 49.1029 
+2 *66:8 *52008:B 45.3329 
+3 *66:8 *52044:B 38.8493 
+*END
+
+*D_NET *67 0.000685612
+*CONN
+*I *52045:A2 I *D sky130_fd_sc_hd__a21oi_4
+*I *52009:B I *D sky130_fd_sc_hd__xor2_4
+*I *52008:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52045:A2 0.00016547
+2 *52009:B 0
+3 *52008:X 0.000177335
+4 *67:8 0.000342806
+5 *52045:A2 *102:8 0
+6 *52045:A2 *273:12 0
+7 *67:8 *102:8 0
+8 *43:23 *52045:A2 0
+9 *43:23 *67:8 0
+*RES
+1 *52008:X *67:8 17.8068 
+2 *67:8 *52009:B 38 
+3 *67:8 *52045:A2 40.9621 
+*END
+
+*D_NET *68 0.00452448
+*CONN
+*I *52014:A I *D sky130_fd_sc_hd__xor2_1
+*I *52050:B I *D sky130_fd_sc_hd__and2b_1
+*I *52010:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52014:A 0
+2 *52050:B 0.000362752
+3 *52010:Y 0.00126386
+4 *68:18 9.75048e-05
+5 *68:5 0.00172412
+6 *52050:B *52050:A_N 8.38096e-05
+7 *52050:B *107:8 0.00014196
+8 *68:5 *190:23 0.000270682
+9 *68:5 *283:31 0.00044107
+10 *68:18 *191:6 0
+11 *68:18 *193:113 0.000138727
+*RES
+1 *52010:Y *68:5 40.7729 
+2 *68:5 *52050:B 30.4157 
+3 *68:5 *68:18 31.9057 
+4 *68:18 *52014:A 23 
+*END
+
+*D_NET *69 0.00298251
+*CONN
+*I *52013:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *52011:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52013:A0 0.000122534
+2 *52011:Y 0.000661254
+3 *69:7 0.000783788
+4 *52013:A0 *187:44 0.000292865
+5 *52013:A0 *193:113 0.000259401
+6 *69:7 *51902:B 0.000669959
+7 *69:7 *187:104 0.000182826
+8 *69:7 *203:69 9.88574e-06
+*RES
+1 *52011:Y *69:7 48.15 
+2 *69:7 *52013:A0 42.0186 
+*END
+
+*D_NET *70 0.00146736
+*CONN
+*I *52051:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52013:S I *D sky130_fd_sc_hd__mux2_1
+*I *52012:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52051:A2 1.61085e-05
+2 *52013:S 0
+3 *52012:X 0.00024065
+4 *70:12 0.000128626
+5 *70:7 0.000385384
+6 *52051:A2 *187:39 1.94812e-05
+7 *52051:A2 *283:39 2.4754e-05
+8 *70:7 *187:39 0.000261203
+9 *70:7 *283:11 7.44354e-05
+10 *70:7 *283:39 0.000205566
+11 *70:12 *193:117 0.000111148
+*RES
+1 *52012:X *70:7 31.1407 
+2 *70:7 *70:12 32.9621 
+3 *70:12 *52013:S 23 
+4 *70:7 *52051:A2 23.6214 
+*END
+
+*D_NET *71 0.00158828
+*CONN
+*I *52050:A_N I *D sky130_fd_sc_hd__and2b_1
+*I *52014:B I *D sky130_fd_sc_hd__xor2_1
+*I *52013:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *52050:A_N 0.000356751
+2 *52014:B 0
+3 *52013:X 0
+4 *71:9 0.000199902
+5 *71:4 0.000556653
+6 *71:9 *187:44 5.26204e-05
+7 *71:9 *207:73 0.000221992
+8 *71:9 *281:104 0.000116554
+9 *52050:B *52050:A_N 8.38096e-05
+*RES
+1 *52013:X *71:4 23 
+2 *71:4 *71:9 34.785 
+3 *71:9 *52014:B 23 
+4 *71:4 *52050:A_N 28.4064 
+*END
+
+*D_NET *72 0.00119133
+*CONN
+*I *52018:A I *D sky130_fd_sc_hd__nor2_1
+*I *52019:A I *D sky130_fd_sc_hd__and2_1
+*I *52014:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52018:A 0.00019497
+2 *52019:A 0.000136867
+3 *52014:X 7.5314e-05
+4 *72:6 0.000407151
+5 *52018:A *74:5 5.50049e-05
+6 *52018:A *75:18 0
+7 *52018:A *197:6 0
+8 *52019:A *203:69 0.000177909
+9 *72:6 *187:44 0.00014411
+*RES
+1 *52014:X *72:6 39.9057 
+2 *72:6 *52019:A 41.48 
+3 *72:6 *52018:A 41.5836 
+*END
+
+*D_NET *73 0.00139805
+*CONN
+*I *52017:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52056:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52015:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52017:A 0
+2 *52056:A1 0
+3 *52015:Y 0.000271359
+4 *73:15 0.000189042
+5 *73:9 0.000261234
+6 *73:6 0.00034355
+7 *73:6 *75:18 0
+8 *73:6 *77:8 0
+9 *73:6 *225:108 0
+10 *73:9 *74:16 5.50106e-05
+11 *73:9 *76:5 3.17516e-05
+12 *73:15 *74:16 0.00021673
+13 *73:15 *264:9 2.93747e-05
+*RES
+1 *52015:Y *73:6 42.7229 
+2 *73:6 *73:9 16.5743 
+3 *73:9 *73:15 33.9357 
+4 *73:15 *52056:A1 23 
+5 *73:9 *52017:A 23 
+*END
+
+*D_NET *74 0.00214238
+*CONN
+*I *52056:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52017:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52016:Y O *D sky130_fd_sc_hd__a22oi_2
+*CAP
+1 *52056:A2 0
+2 *52017:B 0
+3 *52016:Y 0.00042967
+4 *74:16 0.000148837
+5 *74:5 0.000578507
+6 *74:5 *52016:B2 5.50049e-05
+7 *74:5 *52018:B 0.000230604
+8 *74:5 *75:18 4.94073e-05
+9 *74:5 *76:5 0.000205566
+10 *74:5 *195:13 1.57571e-05
+11 *74:16 *76:5 4.9662e-05
+12 *74:16 *76:18 5.26204e-05
+13 *74:16 *225:108 0
+14 *52018:A *74:5 5.50049e-05
+15 *73:9 *74:16 5.50106e-05
+16 *73:15 *74:16 0.00021673
+*RES
+1 *52016:Y *74:5 33.6264 
+2 *74:5 *52017:B 23 
+3 *74:5 *74:16 34.06 
+4 *74:16 *52056:A2 23 
+*END
+
+*D_NET *75 0.000971845
+*CONN
+*I *52019:B I *D sky130_fd_sc_hd__and2_1
+*I *52018:B I *D sky130_fd_sc_hd__nor2_1
+*I *52017:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52019:B 0
+2 *52018:B 0.000121581
+3 *52017:Y 0
+4 *75:18 0.000224336
+5 *75:4 0.000345917
+6 *52018:A *75:18 0
+7 *73:6 *75:18 0
+8 *74:5 *52018:B 0.000230604
+9 *74:5 *75:18 4.94073e-05
+*RES
+1 *52017:Y *75:4 23 
+2 *75:4 *52018:B 26.3764 
+3 *75:4 *75:18 33.48 
+4 *75:18 *52019:B 23 
+*END
+
+*D_NET *76 0.00184145
+*CONN
+*I *52056:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52020:A I *D sky130_fd_sc_hd__or2_1
+*I *52018:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52056:B1_N 0
+2 *52020:A 0.000210984
+3 *52018:Y 0.000417679
+4 *76:18 0.000122263
+5 *76:5 0.000750926
+6 *76:18 *225:108 0
+7 *73:9 *76:5 3.17516e-05
+8 *74:5 *76:5 0.000205566
+9 *74:16 *76:5 4.9662e-05
+10 *74:16 *76:18 5.26204e-05
+*RES
+1 *52018:Y *76:5 29.3386 
+2 *76:5 *52020:A 26.7286 
+3 *76:5 *76:18 32.2579 
+4 *76:18 *52056:B1_N 23 
+*END
+
+*D_NET *77 0.000852853
+*CONN
+*I *52020:B I *D sky130_fd_sc_hd__or2_1
+*I *52019:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52020:B 0
+2 *52019:X 0.000208278
+3 *77:8 0.000208278
+4 *77:8 *203:69 0.000269775
+5 *77:8 *225:108 0.000166522
+6 *73:6 *77:8 0
+*RES
+1 *52019:X *77:8 43.2614 
+2 *77:8 *52020:B 38 
+*END
+
+*D_NET *78 0.00168431
+*CONN
+*I *52025:A I *D sky130_fd_sc_hd__and2_1
+*I *52024:A I *D sky130_fd_sc_hd__nor2_1
+*I *52020:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52025:A 0.000193396
+2 *52024:A 0
+3 *52020:X 0.000260534
+4 *78:8 0.00045393
+5 *52025:A *52024:B 2.3529e-05
+6 *52025:A *52025:B 0.000263562
+7 *52025:A *52058:A 0
+8 *52025:A *119:9 0.000272383
+9 *52025:A *265:13 4.95081e-05
+10 *78:8 *52024:B 6.07611e-06
+11 *78:8 *52058:A 0
+12 *78:8 *111:6 0
+13 *78:8 *225:108 0.000161393
+*RES
+1 *52020:X *78:8 43.3443 
+2 *78:8 *52024:A 38 
+3 *78:8 *52025:A 43.9657 
+*END
+
+*D_NET *79 0.00141409
+*CONN
+*I *52062:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52023:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52021:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52062:A1 0
+2 *52023:A 0.000181136
+3 *52021:Y 0.000414141
+4 *79:8 0.000595277
+5 *52023:A *80:18 9.28739e-05
+6 *52023:A *82:8 0
+7 *52023:A *225:108 0
+8 *79:8 *52026:A 9.91798e-05
+9 *79:8 *80:18 6.07611e-06
+10 *79:8 *83:8 2.54046e-05
+*RES
+1 *52021:Y *79:8 43.8621 
+2 *79:8 *52023:A 41.3143 
+3 *79:8 *52062:A1 38 
+*END
+
+*D_NET *80 0.00147748
+*CONN
+*I *52062:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52023:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52022:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52062:A2 0
+2 *52023:B 2.34823e-05
+3 *52022:Y 0.00015622
+4 *80:18 0.000157884
+5 *80:5 0.000337586
+6 *80:5 *52022:B1 1.32314e-05
+7 *80:5 *266:64 0.000491451
+8 *80:18 *82:8 5.93278e-05
+9 *80:18 *266:64 0.000139352
+10 *52023:A *80:18 9.28739e-05
+11 *79:8 *80:18 6.07611e-06
+*RES
+1 *52022:Y *80:5 28.3857 
+2 *80:5 *52023:B 23.4971 
+3 *80:5 *80:18 34.1843 
+4 *80:18 *52062:A2 23 
+*END
+
+*D_NET *81 0.00176028
+*CONN
+*I *52025:B I *D sky130_fd_sc_hd__and2_1
+*I *52024:B I *D sky130_fd_sc_hd__nor2_1
+*I *52023:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52025:B 0.000150321
+2 *52024:B 2.96061e-05
+3 *52023:Y 6.76884e-05
+4 *81:7 0.000247616
+5 *52024:B *225:108 6.16439e-05
+6 *52025:B *52021:A 8.94487e-05
+7 *52025:B *119:9 4.5051e-05
+8 *52025:B *225:108 9.85378e-05
+9 *52025:B *265:13 0.000272383
+10 *81:7 *82:8 0.000181125
+11 *81:7 *266:64 0.000223692
+12 *52025:A *52024:B 2.3529e-05
+13 *52025:A *52025:B 0.000263562
+14 *78:8 *52024:B 6.07611e-06
+*RES
+1 *52023:Y *81:7 40.5271 
+2 *81:7 *52024:B 38.8493 
+3 *81:7 *52025:B 43.6136 
+*END
+
+*D_NET *82 0.00142522
+*CONN
+*I *52026:A I *D sky130_fd_sc_hd__or2_1
+*I *52062:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52024:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52026:A 0.000211559
+2 *52062:B1_N 0
+3 *52024:Y 0.000232648
+4 *82:8 0.000444206
+5 *52026:A *52021:A 5.58068e-05
+6 *52026:A *83:8 5.21127e-05
+7 *82:8 *52021:A 2.96909e-05
+8 *82:8 *225:108 3.63546e-05
+9 *82:8 *266:64 2.32101e-05
+10 *52023:A *82:8 0
+11 *79:8 *52026:A 9.91798e-05
+12 *80:18 *82:8 5.93278e-05
+13 *81:7 *82:8 0.000181125
+*RES
+1 *52024:Y *82:8 43.4893 
+2 *82:8 *52062:B1_N 38 
+3 *82:8 *52026:A 42.6607 
+*END
+
+*D_NET *83 0.0012713
+*CONN
+*I *52026:B I *D sky130_fd_sc_hd__or2_1
+*I *52025:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52026:B 0
+2 *52025:X 0.000375507
+3 *83:8 0.000375507
+4 *83:8 *265:13 0.000442771
+5 *52026:A *83:8 5.21127e-05
+6 *79:8 *83:8 2.54046e-05
+*RES
+1 *52025:X *83:8 44.4629 
+2 *83:8 *52026:B 38 
+*END
+
+*D_NET *84 0.00155654
+*CONN
+*I *52031:A I *D sky130_fd_sc_hd__and2_1
+*I *52030:A I *D sky130_fd_sc_hd__nor2_1
+*I *52026:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52031:A 0
+2 *52030:A 0.000315871
+3 *52026:X 0.000260149
+4 *84:5 0.00057602
+5 *52030:A *52030:B 0.000361027
+6 *52030:A *87:11 4.34745e-05
+*RES
+1 *52026:X *84:5 27.9093 
+2 *84:5 *52030:A 29.8564 
+3 *84:5 *52031:A 23 
+*END
+
+*D_NET *85 0.0019272
+*CONN
+*I *52029:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52067:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52027:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52029:A 0.000257777
+2 *52067:A1 2.48439e-05
+3 *52027:Y 5.52961e-05
+4 *85:5 0.000337917
+5 *52029:A *52029:B 0.000320422
+6 *52029:A *86:5 4.5051e-05
+7 *52029:A *124:7 0.000401899
+8 *52029:A *266:72 5.50049e-05
+9 *52067:A1 *52027:B 0
+10 *52067:A1 *52067:A2 5.90675e-06
+11 *52067:A1 *266:72 0
+12 *85:5 *86:5 0.000151601
+13 *85:5 *266:72 0.000271476
+*RES
+1 *52027:Y *85:5 26.0036 
+2 *85:5 *52067:A1 23.4971 
+3 *85:5 *52029:A 31.265 
+*END
+
+*D_NET *86 0.00188243
+*CONN
+*I *52029:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52067:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52028:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52029:B 0.000249633
+2 *52067:A2 2.14194e-05
+3 *52028:X 0.000296997
+4 *86:5 0.000568049
+5 *52029:B *87:8 5.50106e-05
+6 *86:5 *266:72 1.22822e-05
+7 *86:5 *266:74 0.000156058
+8 *52029:A *52029:B 0.000320422
+9 *52029:A *86:5 4.5051e-05
+10 *52067:A1 *52067:A2 5.90675e-06
+11 *85:5 *86:5 0.000151601
+*RES
+1 *52028:X *86:5 30.2914 
+2 *86:5 *52067:A2 23.4971 
+3 *86:5 *52029:B 29.3386 
+*END
+
+*D_NET *87 0.00118391
+*CONN
+*I *52031:B I *D sky130_fd_sc_hd__and2_1
+*I *52030:B I *D sky130_fd_sc_hd__nor2_1
+*I *52029:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52031:B 0
+2 *52030:B 8.05672e-05
+3 *52029:Y 0.000151623
+4 *87:11 0.000101334
+5 *87:8 0.00017239
+6 *52030:B *88:8 5.83407e-05
+7 *52030:B *89:8 4.06849e-05
+8 *87:8 *89:8 0.000114083
+9 *87:8 *266:72 0
+10 *87:11 *89:8 5.37348e-06
+11 *52029:B *87:8 5.50106e-05
+12 *52030:A *52030:B 0.000361027
+13 *52030:A *87:11 4.34745e-05
+*RES
+1 *52029:Y *87:8 41.2314 
+2 *87:8 *87:11 15.6214 
+3 *87:11 *52030:B 26.9564 
+4 *87:11 *52031:B 23 
+*END
+
+*D_NET *88 0.00118735
+*CONN
+*I *52032:A I *D sky130_fd_sc_hd__nor2_1
+*I *52067:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52030:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52032:A 0.000190549
+2 *52067:B1_N 0
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+4 *88:8 0.000422545
+5 *52032:A *89:8 0
+6 *52032:A *90:5 0.00014196
+7 *52032:A *90:14 0
+8 *52032:A *212:99 0.00014196
+9 *52032:A *266:72 0
+10 *88:8 *89:8 0
+11 *88:8 *266:72 0
+12 *52030:B *88:8 5.83407e-05
+*RES
+1 *52030:Y *88:8 41.8321 
+2 *88:8 *52067:B1_N 38 
+3 *88:8 *52032:A 42.1843 
+*END
+
+*D_NET *89 0.000833695
+*CONN
+*I *52032:B I *D sky130_fd_sc_hd__nor2_1
+*I *52031:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52032:B 0
+2 *52031:X 0.000336777
+3 *89:8 0.000336777
+4 *52030:B *89:8 4.06849e-05
+5 *52032:A *89:8 0
+6 *87:8 *89:8 0.000114083
+7 *87:11 *89:8 5.37348e-06
+8 *88:8 *89:8 0
+*RES
+1 *52031:X *89:8 43.8207 
+2 *89:8 *52032:B 38 
+*END
+
+*D_NET *90 0.00338138
+*CONN
+*I *52072:A1 I *D sky130_fd_sc_hd__a21boi_1
+*I *52037:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52036:A I *D sky130_fd_sc_hd__and3_1
+*I *52032:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52072:A1 0.000345267
+2 *52037:B1 0.00011139
+3 *52036:A 0.000127854
+4 *52032:Y 0.000216405
+5 *90:14 0.000621614
+6 *90:5 0.000509217
+7 *52036:A *52036:C 0.000105587
+8 *52036:A *212:99 0.000100733
+9 *52037:B1 *52037:A1 2.4754e-05
+10 *52037:B1 *52037:A2 0.000228909
+11 *52037:B1 *52071:B 0.000202663
+12 *52037:B1 *268:60 0
+13 *52072:A1 *52036:B 5.01986e-05
+14 *52072:A1 *52072:B1_N 0.000111852
+15 *52072:A1 *95:6 0
+16 *52072:A1 *129:5 1.57571e-05
+17 *52072:A1 *267:85 0.000135037
+18 *90:5 *212:99 0.000168821
+19 *90:14 *52036:B 0.000163361
+20 *90:14 *52036:C 0
+21 *90:14 *95:6 0
+22 *90:14 *212:99 0
+23 *52032:A *90:5 0.00014196
+24 *52032:A *90:14 0
+*RES
+1 *52032:Y *90:5 27.9093 
+2 *90:5 *52036:A 26.0036 
+3 *90:5 *90:14 18.3143 
+4 *90:14 *52037:B1 42.4536 
+5 *90:14 *52072:A1 43.2614 
+*END
+
+*D_NET *91 0.00265775
+*CONN
+*I *52035:C1 I *D sky130_fd_sc_hd__a211o_1
+*I *52034:A2 I *D sky130_fd_sc_hd__o211ai_1
+*I *52033:X O *D sky130_fd_sc_hd__and3b_1
+*CAP
+1 *52035:C1 6.07802e-05
+2 *52034:A2 0.0001615
+3 *52033:X 0.000518678
+4 *91:8 0.000740958
+5 *52034:A2 *52034:A1 0.000334083
+6 *52034:A2 *232:98 0.00035673
+7 *52034:A2 *249:28 5.50106e-05
+8 *52034:A2 *267:90 2.55136e-05
+9 *52035:C1 *52035:A2 0
+10 *91:8 *51959:A 0
+11 *91:8 *52035:A2 0
+12 *91:8 *52036:C 0
+13 *91:8 *232:95 0
+14 *91:8 *251:8 0
+15 *91:8 *266:74 0.000404502
+*RES
+1 *52033:X *91:8 46.8036 
+2 *91:8 *52034:A2 43.8621 
+3 *91:8 *52035:C1 38.8493 
+*END
+
+*D_NET *92 0.00218124
+*CONN
+*I *52037:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52072:B1_N I *D sky130_fd_sc_hd__a21boi_1
+*I *52036:B I *D sky130_fd_sc_hd__and3_1
+*I *52034:Y O *D sky130_fd_sc_hd__o211ai_1
+*CAP
+1 *52037:A1 0.000125253
+2 *52072:B1_N 0.00010763
+3 *52036:B 0.000213053
+4 *52034:Y 0
+5 *92:7 0.000361635
+6 *92:4 0.000166205
+7 *52036:B *52036:C 0
+8 *52036:B *94:6 0.000187057
+9 *52036:B *212:99 0.00014196
+10 *52037:A1 *52037:A2 0.000216471
+11 *52072:B1_N *94:6 0.000151898
+12 *52072:B1_N *129:5 5.3304e-05
+13 *52072:B1_N *267:85 5.3304e-05
+14 *92:7 *52037:A2 5.3304e-05
+15 *52037:B1 *52037:A1 2.4754e-05
+16 *52072:A1 *52036:B 5.01986e-05
+17 *52072:A1 *52072:B1_N 0.000111852
+18 *90:14 *52036:B 0.000163361
+*RES
+1 *52034:Y *92:4 23 
+2 *92:4 *92:7 15.6214 
+3 *92:7 *52036:B 43.0336 
+4 *92:7 *52072:B1_N 40.8793 
+5 *92:4 *52037:A1 26.0036 
+*END
+
+*D_NET *93 0.00280828
+*CONN
+*I *52037:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52072:A2 I *D sky130_fd_sc_hd__a21boi_1
+*I *52036:C I *D sky130_fd_sc_hd__and3_1
+*I *52035:X O *D sky130_fd_sc_hd__a211o_1
+*CAP
+1 *52037:A2 0.000278475
+2 *52072:A2 0.000110804
+3 *52036:C 0.000392413
+4 *52035:X 9.63283e-05
+5 *93:7 0.000503216
+6 *93:5 0.000374804
+7 *52036:C *52035:A2 0
+8 *52036:C *94:6 0
+9 *52036:C *212:99 3.2457e-05
+10 *52036:C *232:95 0
+11 *52036:C *267:85 0
+12 *52037:A2 *52034:B1 5.3304e-05
+13 *52037:A2 *52034:C1 2.02872e-05
+14 *52037:A2 *52071:B 8.48502e-06
+15 *52037:A2 *267:90 0.000191482
+16 *52072:A2 *94:6 0
+17 *52072:A2 *99:12 0
+18 *52072:A2 *267:85 0
+19 *93:5 *267:90 0.000141954
+20 *52036:A *52036:C 0.000105587
+21 *52036:B *52036:C 0
+22 *52037:A1 *52037:A2 0.000216471
+23 *52037:B1 *52037:A2 0.000228909
+24 *90:14 *52036:C 0
+25 *91:8 *52036:C 0
+26 *92:7 *52037:A2 5.3304e-05
+*RES
+1 *52035:X *93:5 24.5743 
+2 *93:5 *93:7 15 
+3 *93:7 *52036:C 44.38 
+4 *93:7 *52072:A2 39.9057 
+5 *93:5 *52037:A2 29.8564 
+*END
+
+*D_NET *94 0.00190542
+*CONN
+*I *52038:A I *D sky130_fd_sc_hd__or2_2
+*I *52036:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52038:A 4.56634e-05
+2 *52036:X 0.000498738
+3 *94:6 0.000544402
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+5 *52038:A *268:66 7.44354e-05
+6 *94:6 *95:6 0
+7 *94:6 *96:6 7.81176e-05
+8 *94:6 *100:6 0
+9 *94:6 *104:8 0
+10 *94:6 *267:85 0.000185755
+11 *52036:B *94:6 0.000187057
+12 *52036:C *94:6 0
+13 *52072:A2 *94:6 0
+14 *52072:B1_N *94:6 0.000151898
+*RES
+1 *52036:X *94:6 48.005 
+2 *94:6 *52038:A 39.5743 
+*END
+
+*D_NET *95 0.0015367
+*CONN
+*I *52038:B I *D sky130_fd_sc_hd__or2_2
+*I *52037:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52038:B 4.37463e-05
+2 *52037:Y 0.000545955
+3 *95:6 0.000589702
+4 *52038:B *105:7 0.000228903
+5 *52038:B *268:66 0.000128391
+6 *95:6 *96:6 0
+7 *95:6 *267:78 0
+8 *95:6 *268:65 0
+9 *52072:A1 *95:6 0
+10 *90:14 *95:6 0
+11 *94:6 *95:6 0
+*RES
+1 *52037:Y *95:6 46.5964 
+2 *95:6 *52038:B 40.5271 
+*END
+
+*D_NET *96 0.00164206
+*CONN
+*I *52047:A I *D sky130_fd_sc_hd__or2_1
+*I *52043:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52038:X O *D sky130_fd_sc_hd__or2_2
+*CAP
+1 *52047:A 0.000313381
+2 *52043:A 0
+3 *52038:X 0.00023307
+4 *96:8 0.000313381
+5 *96:6 0.00023307
+6 *52047:A *52043:B 0.000315857
+7 *52047:A *52047:B 5.50049e-05
+8 *52047:A *104:8 0.00010018
+9 *96:6 *104:8 0
+10 *94:6 *96:6 7.81176e-05
+11 *95:6 *96:6 0
+*RES
+1 *52038:X *96:6 41.6664 
+2 *96:6 *96:8 15 
+3 *96:8 *52043:A 23 
+4 *96:8 *52047:A 29.8357 
+*END
+
+*D_NET *97 0.00104528
+*CONN
+*I *52040:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *52039:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52040:B1 0
+2 *52039:Y 0.000296831
+3 *97:8 0.000296831
+4 *97:8 *103:5 0.000270659
+5 *97:8 *252:23 1.44546e-05
+6 *40:20 *97:8 0.000166504
+*RES
+1 *52039:Y *97:8 43.2614 
+2 *97:8 *52040:B1 38 
+*END
+
+*D_NET *98 0.00368998
+*CONN
+*I *52048:A1 I *D sky130_fd_sc_hd__o21ai_4
+*I *52042:A I *D sky130_fd_sc_hd__xnor2_2
+*I *52040:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *52048:A1 0.000102048
+2 *52042:A 0.000429426
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+4 *98:7 0.00112207
+5 *52042:A *99:12 0
+6 *52042:A *252:8 0
+7 *52042:A *252:23 0
+8 *52048:A1 *354:DIODE 0
+9 *52048:A1 *99:7 0.000359332
+10 *52048:A1 *268:66 0.000304321
+11 *52048:A1 *268:70 5.50106e-05
+12 *52048:A1 *272:145 0
+13 *98:7 *99:7 0.000185428
+14 *98:7 *268:70 5.98028e-05
+15 *98:7 *268:78 0.000481943
+*RES
+1 *52040:X *98:7 47.1971 
+2 *98:7 *52042:A 45.6021 
+3 *98:7 *52048:A1 42.8057 
+*END
+
+*D_NET *99 0.00209739
+*CONN
+*I *52048:A2 I *D sky130_fd_sc_hd__o21ai_4
+*I *52042:B I *D sky130_fd_sc_hd__xnor2_2
+*I *52041:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52048:A2 4.08397e-05
+2 *52042:B 0
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+4 *99:12 0.000355428
+5 *99:7 0.00065813
+6 *52048:A2 *268:66 9.84851e-05
+7 *99:7 *268:66 4.04206e-05
+8 *99:7 *268:70 9.74625e-05
+9 *99:12 *100:6 0
+10 *99:12 *104:8 0
+11 *52042:A *99:12 0
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+13 *52072:A2 *99:12 0
+14 *98:7 *99:7 0.000185428
+*RES
+1 *52041:X *99:7 30.3121 
+2 *99:7 *99:12 35.7793 
+3 *99:12 *52042:B 23 
+4 *99:7 *52048:A2 24.0979 
+*END
+
+*D_NET *100 0.00105662
+*CONN
+*I *52043:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52047:B I *D sky130_fd_sc_hd__or2_1
+*I *52042:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52043:B 0.000110146
+2 *52047:B 7.92231e-05
+3 *52042:Y 0.000153511
+4 *100:8 0.000189369
+5 *100:6 0.000153511
+6 *52047:A *52043:B 0.000315857
+7 *52047:A *52047:B 5.50049e-05
+8 *94:6 *100:6 0
+9 *99:12 *100:6 0
+*RES
+1 *52042:Y *100:6 40.9621 
+2 *100:6 *100:8 15 
+3 *100:8 *52047:B 24.5743 
+4 *100:8 *52043:B 26.48 
+*END
+
+*D_NET *101 0.00195396
+*CONN
+*I *52076:A I *D sky130_fd_sc_hd__nand3_1
+*I *52075:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52046:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52043:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52076:A 0.00022424
+2 *52075:A1 0.000345201
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+5 *101:8 0.000477956
+6 *101:5 0.000480259
+7 *52075:A1 *52075:B1 0
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+9 *52075:A1 *103:17 0.000272383
+10 *52075:A1 *103:26 2.4754e-05
+11 *52076:A *133:7 5.90675e-06
+12 *101:8 *103:10 0
+13 *101:8 *103:26 0
+14 *101:8 *268:65 0
+*RES
+1 *52043:Y *101:5 25.0507 
+2 *101:5 *101:8 17.2579 
+3 *101:8 *52046:A 38 
+4 *101:8 *52075:A1 45.1464 
+5 *101:5 *52076:A 26.9771 
+*END
+
+*D_NET *102 0.0011053
+*CONN
+*I *52045:B1 I *D sky130_fd_sc_hd__a21oi_4
+*I *52044:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52045:B1 0
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+4 *102:8 *273:12 0
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+6 *52045:A2 *102:8 0
+7 *67:8 *102:8 0
+*RES
+1 *52044:Y *102:8 46.9071 
+2 *102:8 *52045:B1 38 
+*END
+
+*D_NET *103 0.00728487
+*CONN
+*I *52075:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52076:B I *D sky130_fd_sc_hd__nand3_1
+*I *52046:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52045:Y O *D sky130_fd_sc_hd__a21oi_4
+*CAP
+1 *52075:A2 0
+2 *52076:B 0
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+7 *103:10 0.000147813
+8 *103:5 0.00265872
+9 *103:4 0.00226512
+10 *103:5 *354:DIODE 0.000141954
+11 *103:10 *268:65 1.83564e-05
+12 *103:26 *52075:B1 0.000186594
+13 *103:26 *131:8 6.07611e-06
+14 *52075:A1 *103:10 0
+15 *52075:A1 *103:17 0.000272383
+16 *52075:A1 *103:26 2.4754e-05
+17 *40:20 *103:5 0.000274226
+18 *43:23 *103:5 0.000173442
+19 *97:8 *103:5 0.000270659
+20 *101:8 *103:10 0
+21 *101:8 *103:26 0
+*RES
+1 *52045:Y *103:4 23 
+2 *103:4 *103:5 41.5943 
+3 *103:5 *103:10 32.61 
+4 *103:10 *52046:B 23 
+5 *103:5 *103:17 5.75857 
+6 *103:17 *103:26 36.67 
+7 *103:26 *52076:B 23 
+8 *103:17 *52075:A2 23 
+*END
+
+*D_NET *104 0.000462474
+*CONN
+*I *52048:B1 I *D sky130_fd_sc_hd__o21ai_4
+*I *52047:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52048:B1 0
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+4 *52047:A *104:8 0.00010018
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+6 *96:6 *104:8 0
+7 *99:12 *104:8 0
+*RES
+1 *52047:X *104:8 41.0036 
+2 *104:8 *52048:B1 38 
+*END
+
+*D_NET *105 0.00443757
+*CONN
+*I *52078:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52081:A1 I *D sky130_fd_sc_hd__a21o_2
+*I *52048:Y O *D sky130_fd_sc_hd__o21ai_4
+*CAP
+1 *52078:A 0
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+5 *105:7 0.00191684
+6 *105:7 *268:66 0.000181494
+7 *105:18 *52077:A 0
+8 *105:18 *132:8 0
+9 *105:18 *134:8 0
+10 *105:18 *137:5 5.41288e-05
+11 *52038:A *105:7 0.000139357
+12 *52038:B *105:7 0.000228903
+*RES
+1 *52048:Y *105:7 43.6521 
+2 *105:7 *52081:A1 23 
+3 *105:7 *105:18 37.0221 
+4 *105:18 *52078:A 23 
+*END
+
+*D_NET *106 0.001988
+*CONN
+*I *52054:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52084:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52049:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52054:A 0
+2 *52084:A1 0
+3 *52049:Y 0.000148046
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+5 *106:5 0.000647628
+6 *106:5 *52084:A2 5.67058e-05
+7 *106:5 *108:9 0.000100488
+8 *106:5 *283:39 5.50049e-05
+9 *106:17 *52049:B 0
+10 *106:17 *52054:B 0
+11 *106:17 *52084:A2 5.50049e-05
+12 *106:17 *207:89 0.000153155
+13 *106:17 *281:115 0.000272383
+*RES
+1 *52049:Y *106:5 26.48 
+2 *106:5 *52084:A1 23 
+3 *106:5 *106:17 39.7564 
+4 *106:17 *52054:A 23 
+*END
+
+*D_NET *107 0.00108678
+*CONN
+*I *52051:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52050:X O *D sky130_fd_sc_hd__and2b_1
+*CAP
+1 *52051:B1 3.82061e-05
+2 *52050:X 0.000254099
+3 *107:8 0.000292305
+4 *52051:B1 *52049:A 0.000228903
+5 *52051:B1 *283:39 0.000131304
+6 *107:8 *187:44 0
+7 *107:8 *193:117 0
+8 *52050:B *107:8 0.00014196
+*RES
+1 *52050:X *107:8 41.8321 
+2 *107:8 *52051:B1 40.5271 
+*END
+
+*D_NET *108 0.00288034
+*CONN
+*I *52053:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52083:C I *D sky130_fd_sc_hd__and3_1
+*I *52051:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52053:A 0
+2 *52083:C 6.16946e-05
+3 *52051:X 0.000212177
+4 *108:25 0.000182334
+5 *108:9 0.000456206
+6 *52083:C *52084:B1 0
+7 *52083:C *207:113 0
+8 *108:9 *52049:A 0.000228001
+9 *108:9 *52084:A2 0.000362111
+10 *108:9 *140:5 0.00031495
+11 *108:9 *187:49 0.000633247
+12 *108:9 *283:39 9.24795e-06
+13 *108:25 *52084:A2 3.39128e-05
+14 *108:25 *140:5 9.84794e-05
+15 *108:25 *187:57 0.000141236
+16 *108:25 *207:98 3.61069e-05
+17 *108:25 *207:102 0
+18 *108:25 *283:46 1.01436e-05
+19 *106:5 *108:9 0.000100488
+*RES
+1 *52051:X *108:9 34.2686 
+2 *108:9 *52083:C 24.362 
+3 *108:9 *108:25 34.6814 
+4 *108:25 *52053:A 23 
+*END
+
+*D_NET *109 0.000683288
+*CONN
+*I *52053:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52052:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52053:B 6.97144e-05
+2 *52052:Y 6.97144e-05
+3 *52053:B *52052:A 0.000228909
+4 *52053:B *187:57 0.00031495
+*RES
+1 *52052:Y *52053:B 49.48 
+*END
+
+*D_NET *110 0.00158819
+*CONN
+*I *52054:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52084:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52053:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52054:B 0.000118178
+2 *52084:A2 0.00029965
+3 *52053:Y 0
+4 *110:5 0.000417827
+5 *52054:B *207:92 0
+6 *52054:B *281:115 3.3123e-05
+7 *52084:A2 *52084:B1 0.000156058
+8 *52084:A2 *187:57 5.56203e-05
+9 *52084:A2 *207:92 0
+10 *106:5 *52084:A2 5.67058e-05
+11 *106:17 *52054:B 0
+12 *106:17 *52084:A2 5.50049e-05
+13 *108:9 *52084:A2 0.000362111
+14 *108:25 *52084:A2 3.39128e-05
+*RES
+1 *52053:Y *110:5 38 
+2 *110:5 *52084:A2 46.4514 
+3 *110:5 *52054:B 40.2579 
+*END
+
+*D_NET *111 0.00189984
+*CONN
+*I *52058:A I *D sky130_fd_sc_hd__nor2_1
+*I *52059:A I *D sky130_fd_sc_hd__and2_1
+*I *52054:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52058:A 0.00023797
+2 *52059:A 1.80182e-05
+3 *52054:Y 0.000437623
+4 *111:6 0.000693611
+5 *52058:A *52058:B 0
+6 *52058:A *114:6 0
+7 *52058:A *266:64 5.47927e-05
+8 *52059:A *113:5 2.93845e-05
+9 *52059:A *264:9 5.50106e-05
+10 *111:6 *347:DIODE 0.000216721
+11 *111:6 *365:DIODE 4.48568e-05
+12 *111:6 *113:11 0
+13 *111:6 *114:6 0
+14 *111:6 *225:108 0
+15 *111:6 *225:114 0
+16 *111:6 *281:115 0.000111852
+17 *52025:A *52058:A 0
+18 *78:8 *52058:A 0
+19 *78:8 *111:6 0
+*RES
+1 *52054:Y *111:6 45.8921 
+2 *111:6 *52059:A 38.6214 
+3 *111:6 *52058:A 42.5364 
+*END
+
+*D_NET *112 0.000923754
+*CONN
+*I *52090:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52057:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52055:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52090:A1 0.000226983
+2 *52057:A 4.24511e-05
+3 *52055:Y 0.000110804
+4 *112:6 0.000380238
+5 *52090:A1 *52090:A2 6.81213e-05
+6 *52090:A1 *113:11 6.28695e-05
+7 *52090:A1 *203:76 0
+8 *52090:A1 *264:9 3.22879e-05
+9 *112:6 *203:69 0
+10 *112:6 *203:76 0
+*RES
+1 *52055:Y *112:6 39.9057 
+2 *112:6 *52057:A 38.6214 
+3 *112:6 *52090:A1 42.7021 
+*END
+
+*D_NET *113 0.00220566
+*CONN
+*I *52090:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52057:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52056:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52090:A2 8.16766e-05
+2 *52057:B 0
+3 *52056:X 0.000384491
+4 *113:11 0.000173506
+5 *113:5 0.000639674
+6 *52090:A2 *116:8 5.50106e-05
+7 *52090:A2 *264:9 2.44913e-05
+8 *113:5 *52059:B 0.000185428
+9 *113:5 *116:8 0.000182826
+10 *113:5 *264:9 0.000205913
+11 *113:11 *52058:B 1.58805e-05
+12 *113:11 *114:6 9.63918e-05
+13 *113:11 *115:20 0
+14 *113:11 *203:76 0
+15 *52059:A *113:5 2.93845e-05
+16 *52090:A1 *52090:A2 6.81213e-05
+17 *52090:A1 *113:11 6.28695e-05
+18 *111:6 *113:11 0
+*RES
+1 *52056:X *113:5 31.7207 
+2 *113:5 *113:11 33.9357 
+3 *113:11 *52057:B 23 
+4 *113:5 *52090:A2 25.0714 
+*END
+
+*D_NET *114 0.00122317
+*CONN
+*I *52058:B I *D sky130_fd_sc_hd__nor2_1
+*I *52059:B I *D sky130_fd_sc_hd__and2_1
+*I *52057:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52058:B 0.000181566
+2 *52059:B 3.73224e-05
+3 *52057:Y 0.000124961
+4 *114:6 0.00034385
+5 *52058:B *115:9 9.84794e-05
+6 *52058:B *115:20 0
+7 *52058:B *116:8 3.56537e-05
+8 *52059:B *264:9 0.000103637
+9 *52058:A *52058:B 0
+10 *52058:A *114:6 0
+11 *111:6 *114:6 0
+12 *113:5 *52059:B 0.000185428
+13 *113:11 *52058:B 1.58805e-05
+14 *113:11 *114:6 9.63918e-05
+*RES
+1 *52057:Y *114:6 40.61 
+2 *114:6 *52059:B 40.0507 
+3 *114:6 *52058:B 41.7079 
+*END
+
+*D_NET *115 0.00110874
+*CONN
+*I *52090:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52060:A I *D sky130_fd_sc_hd__or2_1
+*I *52058:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52090:B1_N 0
+2 *52060:A 0
+3 *52058:Y 0.000147659
+4 *115:20 0.000195356
+5 *115:9 0.000343015
+6 *115:9 *266:58 1.32314e-05
+7 *115:9 *266:64 0.000173278
+8 *115:20 *116:8 0
+9 *115:20 *203:76 4.83778e-05
+10 *115:20 *203:85 1.7992e-05
+11 *115:20 *266:58 7.1349e-05
+12 *52058:B *115:9 9.84794e-05
+13 *52058:B *115:20 0
+14 *113:11 *115:20 0
+*RES
+1 *52058:Y *115:9 27.4743 
+2 *115:9 *52060:A 23 
+3 *115:9 *115:20 34.1843 
+4 *115:20 *52090:B1_N 23 
+*END
+
+*D_NET *116 0.000765807
+*CONN
+*I *52060:B I *D sky130_fd_sc_hd__or2_1
+*I *52059:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52060:B 0
+2 *52059:X 0.000246158
+3 *116:8 0.000246158
+4 *52058:B *116:8 3.56537e-05
+5 *52090:A2 *116:8 5.50106e-05
+6 *113:5 *116:8 0.000182826
+7 *115:20 *116:8 0
+*RES
+1 *52059:X *116:8 42.0807 
+2 *116:8 *52060:B 38 
+*END
+
+*D_NET *117 0.00286636
+*CONN
+*I *52064:A I *D sky130_fd_sc_hd__nor2_1
+*I *52065:A I *D sky130_fd_sc_hd__and2_1
+*I *52060:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52064:A 0.000324349
+2 *52065:A 0.000205589
+3 *52060:X 0.00026256
+4 *117:6 0.000792499
+5 *52064:A *52064:B 0.000330899
+6 *52064:A *121:7 9.84851e-05
+7 *52064:A *122:8 5.56203e-05
+8 *52064:A *203:120 0
+9 *52064:A *203:125 3.53115e-05
+10 *52065:A *52021:B 3.53115e-05
+11 *52065:A *52065:B 0.0002263
+12 *52065:A *119:15 5.50106e-05
+13 *52065:A *122:8 0.000151601
+14 *52065:A *203:94 5.24457e-05
+15 *117:6 *119:15 0.000101657
+16 *117:6 *203:85 0
+17 *117:6 *203:94 0.000138718
+18 *117:6 *203:120 0
+*RES
+1 *52060:X *117:6 43.075 
+2 *117:6 *52065:A 43.8621 
+3 *117:6 *52064:A 45.54 
+*END
+
+*D_NET *118 0.00134904
+*CONN
+*I *52063:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52095:A1 I *D sky130_fd_sc_hd__o21bai_2
+*I *52061:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52063:A 0
+2 *52095:A1 0
+3 *52061:Y 0.000188968
+4 *118:14 0.000133643
+5 *118:7 0.000322612
+6 *118:7 *52061:A 8.60475e-05
+7 *118:7 *203:94 0.000141954
+8 *118:7 *265:13 6.22712e-05
+9 *118:14 *52064:B 4.6318e-06
+10 *118:14 *119:9 5.50049e-05
+11 *118:14 *119:15 0.000191157
+12 *118:14 *120:6 6.6869e-05
+13 *118:14 *265:13 9.5877e-05
+*RES
+1 *52061:Y *118:7 27.4536 
+2 *118:7 *118:14 33.7079 
+3 *118:14 *52095:A1 23 
+4 *118:7 *52063:A 23 
+*END
+
+*D_NET *119 0.0022217
+*CONN
+*I *52063:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52095:A2 I *D sky130_fd_sc_hd__o21bai_2
+*I *52062:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52063:B 0
+2 *52095:A2 0
+3 *52062:X 0.000456991
+4 *119:15 0.000128895
+5 *119:9 0.000585885
+6 *119:9 *225:100 5.50049e-05
+7 *119:9 *265:13 0.000245277
+8 *119:15 *203:94 2.93845e-05
+9 *52025:A *119:9 0.000272383
+10 *52025:B *119:9 4.5051e-05
+11 *52065:A *119:15 5.50106e-05
+12 *117:6 *119:15 0.000101657
+13 *118:14 *119:9 5.50049e-05
+14 *118:14 *119:15 0.000191157
+*RES
+1 *52062:X *119:9 33.7921 
+2 *119:9 *119:15 33.5836 
+3 *119:15 *52095:A2 23 
+4 *119:9 *52063:B 23 
+*END
+
+*D_NET *120 0.00222859
+*CONN
+*I *52064:B I *D sky130_fd_sc_hd__nor2_1
+*I *52065:B I *D sky130_fd_sc_hd__and2_1
+*I *52063:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52064:B 0.000358124
+2 *52065:B 6.22971e-05
+3 *52063:Y 9.7432e-05
+4 *120:6 0.000517853
+5 *52064:B *52066:A 0.000226295
+6 *52064:B *122:8 4.3407e-05
+7 *52064:B *203:108 0
+8 *52064:B *203:125 4.79641e-05
+9 *52064:B *267:62 0.00011641
+10 *52065:B *52021:B 2.93747e-05
+11 *52065:B *203:94 0.000100733
+12 *120:6 *203:108 0
+13 *52064:A *52064:B 0.000330899
+14 *52065:A *52065:B 0.0002263
+15 *118:14 *52064:B 4.6318e-06
+16 *118:14 *120:6 6.6869e-05
+*RES
+1 *52063:Y *120:6 39.9057 
+2 *120:6 *52065:B 40.5271 
+3 *120:6 *52064:B 47.3214 
+*END
+
+*D_NET *121 0.00131735
+*CONN
+*I *52066:A I *D sky130_fd_sc_hd__or2_1
+*I *52095:B1_N I *D sky130_fd_sc_hd__o21bai_2
+*I *52064:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52066:A 0.000112261
+2 *52095:B1_N 8.4949e-05
+3 *52064:Y 6.93947e-05
+4 *121:7 0.000266605
+5 *52066:A *203:120 7.48331e-05
+6 *52066:A *203:125 5.3304e-05
+7 *52066:A *267:62 0.000159321
+8 *52095:B1_N *203:120 0.000171906
+9 *52064:A *121:7 9.84851e-05
+10 *52064:B *52066:A 0.000226295
+*RES
+1 *52064:Y *121:7 39.0979 
+2 *121:7 *52095:B1_N 40.2579 
+3 *121:7 *52066:A 41.7286 
+*END
+
+*D_NET *122 0.000834938
+*CONN
+*I *52066:B I *D sky130_fd_sc_hd__or2_1
+*I *52065:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52066:B 0
+2 *52065:X 0.000292155
+3 *122:8 0.000292155
+4 *122:8 *203:120 0
+5 *52064:A *122:8 5.56203e-05
+6 *52064:B *122:8 4.3407e-05
+7 *52065:A *122:8 0.000151601
+*RES
+1 *52065:X *122:8 43.2614 
+2 *122:8 *52066:B 38 
+*END
+
+*D_NET *123 0.00131286
+*CONN
+*I *52070:A I *D sky130_fd_sc_hd__xor2_1
+*I *52100:A I *D sky130_fd_sc_hd__nor2_1
+*I *52066:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52070:A 0.000311635
+2 *52100:A 0
+3 *52066:X 0.000225291
+4 *123:8 0.000536926
+5 *52070:A *52070:B 0
+6 *52070:A *52100:B 0
+7 *52070:A *52102:A1 6.57448e-05
+8 *52070:A *52102:B1 0
+9 *52070:A *52103:A 2.96051e-05
+10 *52070:A *127:6 0
+11 *52070:A *157:12 0
+12 *123:8 *157:12 0
+13 *123:8 *267:62 0.000143655
+14 *123:8 *268:43 0
+*RES
+1 *52066:X *123:8 41.48 
+2 *123:8 *52100:A 38 
+3 *123:8 *52070:A 43.8414 
+*END
+
+*D_NET *124 0.00344633
+*CONN
+*I *52099:A I *D sky130_fd_sc_hd__nor2_1
+*I *52069:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52067:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52099:A 4.73326e-05
+2 *52069:A 0
+3 *52067:X 0.000663208
+4 *124:11 0.000174441
+5 *124:7 0.000790316
+6 *52099:A *52099:B 0.000347796
+7 *52099:A *125:9 5.67058e-05
+8 *52099:A *157:9 0.00039127
+9 *124:7 *212:105 0.000120867
+10 *124:7 *267:72 5.50106e-05
+11 *124:11 *125:6 6.4393e-05
+12 *124:11 *125:9 5.50106e-05
+13 *124:11 *157:9 0.000139357
+14 *124:11 *267:72 0.000138727
+15 *52029:A *124:7 0.000401899
+*RES
+1 *52067:X *124:7 48.15 
+2 *124:7 *124:11 18.48 
+3 *124:11 *52069:A 23 
+4 *124:11 *52099:A 27.4329 
+*END
+
+*D_NET *125 0.00145232
+*CONN
+*I *52099:B I *D sky130_fd_sc_hd__nor2_1
+*I *52069:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52068:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52099:B 0.000111383
+2 *52069:B 0
+3 *52068:Y 0.000117749
+4 *125:9 0.000157807
+5 *125:6 0.000164173
+6 *52099:B *126:7 0.000317553
+7 *52099:B *157:9 4.95081e-05
+8 *125:6 *267:72 1.02387e-05
+9 *52099:A *52099:B 0.000347796
+10 *52099:A *125:9 5.67058e-05
+11 *124:11 *125:6 6.4393e-05
+12 *124:11 *125:9 5.50106e-05
+*RES
+1 *52068:Y *125:6 40.2579 
+2 *125:6 *125:9 16.0979 
+3 *125:9 *52069:B 23 
+4 *125:9 *52099:B 28.4064 
+*END
+
+*D_NET *126 0.00161178
+*CONN
+*I *52070:B I *D sky130_fd_sc_hd__xor2_1
+*I *52100:B I *D sky130_fd_sc_hd__nor2_1
+*I *52069:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52070:B 0.000134665
+2 *52100:B 6.8152e-05
+3 *52069:Y 0.000194537
+4 *126:7 0.000397354
+5 *52070:B *127:6 0
+6 *52100:B *155:7 2.80512e-05
+7 *52100:B *156:5 7.53384e-06
+8 *52100:B *268:43 0.00010018
+9 *126:7 *155:7 0.000269775
+10 *126:7 *157:9 9.24795e-06
+11 *126:7 *268:43 8.47306e-05
+12 *52070:A *52070:B 0
+13 *52070:A *52100:B 0
+14 *52099:B *126:7 0.000317553
+*RES
+1 *52069:Y *126:7 44.3386 
+2 *126:7 *52100:B 39.9471 
+3 *126:7 *52070:B 40.2579 
+*END
+
+*D_NET *127 0.00120073
+*CONN
+*I *52080:A1 I *D sky130_fd_sc_hd__a21o_2
+*I *52074:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52070:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52080:A1 0
+2 *52074:A 0.000197646
+3 *52070:X 0.000130638
+4 *127:9 0.000355773
+5 *127:6 0.000288765
+6 *52074:A *52080:A2 0.000180812
+7 *127:6 *135:8 3.31683e-05
+8 *127:9 *136:5 1.39317e-05
+9 *52070:A *127:6 0
+10 *52070:B *127:6 0
+*RES
+1 *52070:X *127:6 40.61 
+2 *127:6 *127:9 17.5271 
+3 *127:9 *52074:A 27.4536 
+4 *127:9 *52080:A1 23 
+*END
+
+*D_NET *128 0.000927283
+*CONN
+*I *52073:A I *D sky130_fd_sc_hd__xor2_1
+*I *52079:A I *D sky130_fd_sc_hd__nor2_1
+*I *52071:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52073:A 0
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+3 *52071:X 0
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+5 *128:4 0.000244224
+6 *52079:A *268:60 0.000269742
+7 *128:17 *129:5 5.50106e-05
+8 *128:17 *129:14 0
+9 *128:17 *267:78 0.000114083
+10 *128:17 *268:65 0
+*RES
+1 *52071:X *128:4 23 
+2 *128:4 *52079:A 26.3764 
+3 *128:4 *128:17 32.5271 
+4 *128:17 *52073:A 23 
+*END
+
+*D_NET *129 0.00222536
+*CONN
+*I *52073:B I *D sky130_fd_sc_hd__xor2_1
+*I *52079:B I *D sky130_fd_sc_hd__nor2_1
+*I *52072:Y O *D sky130_fd_sc_hd__a21boi_1
+*CAP
+1 *52073:B 0
+2 *52079:B 0
+3 *52072:Y 0.00048883
+4 *129:14 0.000294942
+5 *129:5 0.000783772
+6 *129:5 *267:78 0.000173442
+7 *129:5 *267:85 0.000261827
+8 *129:14 *130:5 9.84794e-05
+9 *129:14 *267:78 0
+10 *52072:A1 *129:5 1.57571e-05
+11 *52072:B1_N *129:5 5.3304e-05
+12 *128:17 *129:5 5.50106e-05
+13 *128:17 *129:14 0
+*RES
+1 *52072:Y *129:5 34.1029 
+2 *129:5 *129:14 35.6343 
+3 *129:14 *52079:B 23 
+4 *129:5 *52073:B 23 
+*END
+
+*D_NET *130 0.00102647
+*CONN
+*I *52080:A2 I *D sky130_fd_sc_hd__a21o_2
+*I *52074:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52073:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52080:A2 0.000172456
+2 *52074:B 0
+3 *52073:X 0.000184989
+4 *130:5 0.000357445
+5 *130:5 *131:8 3.22879e-05
+6 *52074:A *52080:A2 0.000180812
+7 *129:14 *130:5 9.84794e-05
+*RES
+1 *52073:X *130:5 26.9564 
+2 *130:5 *52074:B 23 
+3 *130:5 *52080:A2 27.4536 
+*END
+
+*D_NET *131 0.00116486
+*CONN
+*I *52075:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52076:C I *D sky130_fd_sc_hd__nand3_1
+*I *52074:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52075:B1 0.000270533
+2 *52076:C 0
+3 *52074:Y 0.000189681
+4 *131:8 0.000460214
+5 *52075:B1 *52077:A 0
+6 *52075:B1 *132:8 1.94693e-05
+7 *52075:B1 *133:12 0
+8 *131:8 *52077:A 0
+9 *131:8 *133:12 0
+10 *52075:A1 *52075:B1 0
+11 *103:26 *52075:B1 0.000186594
+12 *103:26 *131:8 6.07611e-06
+13 *130:5 *131:8 3.22879e-05
+*RES
+1 *52074:Y *131:8 41.2314 
+2 *131:8 *52076:C 38 
+3 *131:8 *52075:B1 44.0486 
+*END
+
+*D_NET *132 0.00142404
+*CONN
+*I *52081:B1 I *D sky130_fd_sc_hd__a21o_2
+*I *52077:A I *D sky130_fd_sc_hd__or2b_1
+*I *52075:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52081:B1 0
+2 *52077:A 0.000172923
+3 *52075:Y 0.000503052
+4 *132:8 0.000675975
+5 *52077:A *133:12 5.26204e-05
+6 *52075:B1 *52077:A 0
+7 *52075:B1 *132:8 1.94693e-05
+8 *105:18 *52077:A 0
+9 *105:18 *132:8 0
+10 *131:8 *52077:A 0
+*RES
+1 *52075:Y *132:8 45.1671 
+2 *132:8 *52077:A 41.6664 
+3 *132:8 *52081:B1 38 
+*END
+
+*D_NET *133 0.000897976
+*CONN
+*I *52077:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *52081:A2 I *D sky130_fd_sc_hd__a21o_2
+*I *52076:Y O *D sky130_fd_sc_hd__nand3_1
+*CAP
+1 *52077:B_N 5.97544e-05
+2 *52081:A2 0
+3 *52076:Y 0.000243505
+4 *133:12 0.000116465
+5 *133:7 0.000419724
+6 *52075:B1 *133:12 0
+7 *52076:A *133:7 5.90675e-06
+8 *52077:A *133:12 5.26204e-05
+9 *131:8 *133:12 0
+*RES
+1 *52076:Y *133:7 27.3293 
+2 *133:7 *133:12 32.2579 
+3 *133:12 *52081:A2 23 
+4 *133:7 *52077:B_N 24.0979 
+*END
+
+*D_NET *134 0.00104336
+*CONN
+*I *52078:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52077:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *52078:B 0
+2 *52077:X 0.00052168
+3 *134:8 0.00052168
+4 *134:8 *274:6 0
+5 *105:18 *134:8 0
+*RES
+1 *52077:X *134:8 47.6114 
+2 *134:8 *52078:B 38 
+*END
+
+*D_NET *135 0.00166611
+*CONN
+*I *52080:B1 I *D sky130_fd_sc_hd__a21o_2
+*I *52079:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52080:B1 0
+2 *52079:Y 0.000678078
+3 *135:8 0.000678078
+4 *135:8 *268:48 2.05898e-05
+5 *135:8 *268:50 0.000128964
+6 *135:8 *268:52 9.01041e-05
+7 *135:8 *268:60 3.71251e-05
+8 *127:6 *135:8 3.31683e-05
+*RES
+1 *52079:Y *135:8 48.6264 
+2 *135:8 *52080:B1 38 
+*END
+
+*D_NET *136 0.00530174
+*CONN
+*I *52107:A I *D sky130_fd_sc_hd__xor2_4
+*I *52109:A1 I *D sky130_fd_sc_hd__a21boi_2
+*I *52080:X O *D sky130_fd_sc_hd__a21o_2
+*CAP
+1 *52107:A 0.000174484
+2 *52109:A1 0
+3 *52080:X 0.00201911
+4 *136:8 0.000292517
+5 *136:5 0.00213714
+6 *52107:A *52107:B 0.000270722
+7 *52107:A *52109:A2 0.000169674
+8 *52107:A *164:6 0.000140223
+9 *136:5 *160:13 1.94812e-05
+10 *136:5 *161:8 2.5214e-05
+11 *136:8 *52109:A2 3.92407e-05
+12 *136:8 *182:8 0
+13 *127:9 *136:5 1.39317e-05
+*RES
+1 *52080:X *136:5 49.825 
+2 *136:5 *136:8 17.2579 
+3 *136:8 *52109:A1 38 
+4 *136:8 *52107:A 44.4007 
+*END
+
+*D_NET *137 0.00241045
+*CONN
+*I *52106:A I *D sky130_fd_sc_hd__xor2_4
+*I *52108:A I *D sky130_fd_sc_hd__nand2_1
+*I *52081:X O *D sky130_fd_sc_hd__a21o_2
+*CAP
+1 *52106:A 0
+2 *52108:A 0
+3 *52081:X 0.00102107
+4 *137:10 0.00010715
+5 *137:5 0.00112822
+6 *137:10 *52106:B 9.3813e-05
+7 *137:10 *161:8 6.07611e-06
+8 *105:18 *137:5 5.41288e-05
+*RES
+1 *52081:X *137:5 41.7257 
+2 *137:5 *137:10 32.61 
+3 *137:10 *52108:A 23 
+4 *137:5 *52106:A 23 
+*END
+
+*D_NET *138 0.000785301
+*CONN
+*I *52085:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52119:A1 I *D sky130_fd_sc_hd__o21ai_1
+*I *52082:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52085:A 0
+2 *52119:A1 0.000206199
+3 *52082:Y 9.42895e-05
+4 *138:6 0.000300489
+5 *52119:A1 *140:16 0.000128693
+6 *52119:A1 *141:9 0
+7 *52119:A1 *283:56 0
+8 *138:6 *141:9 0
+9 *138:6 *187:68 5.56306e-05
+*RES
+1 *52082:Y *138:6 39.9057 
+2 *138:6 *52119:A1 42.0807 
+3 *138:6 *52085:A 38 
+*END
+
+*D_NET *139 0.000558099
+*CONN
+*I *52084:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52083:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52084:B1 0.00020102
+2 *52083:X 0.00020102
+3 *52083:C *52084:B1 0
+4 *52084:A2 *52084:B1 0.000156058
+*RES
+1 *52083:X *52084:B1 49.5007 
+*END
+
+*D_NET *140 0.00282983
+*CONN
+*I *52085:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52119:A2 I *D sky130_fd_sc_hd__o21ai_1
+*I *52084:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52085:B 0
+2 *52119:A2 0
+3 *52084:Y 0.000411819
+4 *140:16 9.2825e-05
+5 *140:5 0.000504644
+6 *140:5 *355:DIODE 9.84851e-05
+7 *140:5 *187:49 0.000358425
+8 *140:5 *283:56 0.000701923
+9 *140:16 *141:9 2.04774e-05
+10 *140:16 *283:56 9.91051e-05
+11 *52119:A1 *140:16 0.000128693
+12 *108:9 *140:5 0.00031495
+13 *108:25 *140:5 9.84794e-05
+*RES
+1 *52084:Y *140:5 35.5321 
+2 *140:5 *52119:A2 23 
+3 *140:5 *140:16 32.8793 
+4 *140:16 *52085:B 23 
+*END
+
+*D_NET *141 0.00165575
+*CONN
+*I *52087:C I *D sky130_fd_sc_hd__nand3_1
+*I *52086:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52085:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52087:C 0
+2 *52086:B1 0
+3 *52085:Y 0
+4 *141:20 0.000249902
+5 *141:9 0.00021864
+6 *141:4 0.000468542
+7 *141:9 *52086:A2 0
+8 *141:9 *52119:B1 0.000185434
+9 *141:9 *142:19 3.53115e-05
+10 *141:9 *174:8 0.000274078
+11 *141:9 *187:68 1.83667e-05
+12 *141:9 *283:56 0.000164282
+13 *141:9 *283:71 0
+14 *141:9 *283:86 0
+15 *141:20 *187:68 0
+16 *141:20 *283:61 2.07145e-05
+17 *141:20 *283:86 0
+18 *52119:A1 *141:9 0
+19 *138:6 *141:9 0
+20 *140:16 *141:9 2.04774e-05
+*RES
+1 *52085:Y *141:4 23 
+2 *141:4 *141:9 37.0221 
+3 *141:9 *52086:B1 23 
+4 *141:4 *141:20 33.6043 
+5 *141:20 *52087:C 23 
+*END
+
+*D_NET *142 0.00205783
+*CONN
+*I *52088:A I *D sky130_fd_sc_hd__nand2_1
+*I *52119:B1 I *D sky130_fd_sc_hd__o21ai_1
+*I *52086:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52088:A 0
+2 *52119:B1 0.000161335
+3 *52086:X 0
+4 *142:19 0.000631848
+5 *142:4 0.000793184
+6 *52119:B1 *174:8 1.72202e-05
+7 *52119:B1 *283:56 5.50049e-05
+8 *142:19 *364:DIODE 1.54424e-05
+9 *142:19 *52086:A2 1.94812e-05
+10 *142:19 *52118:B1 5.50106e-05
+11 *142:19 *174:8 8.85587e-05
+12 *142:19 *175:8 0
+13 *142:19 *225:136 0
+14 *142:19 *281:162 0
+15 *141:9 *52119:B1 0.000185434
+16 *141:9 *142:19 3.53115e-05
+*RES
+1 *52086:X *142:4 23 
+2 *142:4 *52119:B1 26.8529 
+3 *142:4 *142:19 39.7771 
+4 *142:19 *52088:A 23 
+*END
+
+*D_NET *143 0.000556424
+*CONN
+*I *52088:B I *D sky130_fd_sc_hd__nand2_1
+*I *52087:Y O *D sky130_fd_sc_hd__nand3_1
+*CAP
+1 *52088:B 0.000212209
+2 *52087:Y 0.000212209
+3 *52088:B *52087:B 5.50049e-05
+4 *52088:B *52118:B1 7.70008e-05
+*RES
+1 *52087:Y *52088:B 49.3764 
+*END
+
+*D_NET *144 0.00290779
+*CONN
+*I *52093:A I *D sky130_fd_sc_hd__and2_1
+*I *52092:A I *D sky130_fd_sc_hd__nor2_1
+*I *52088:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52093:A 0.000175826
+2 *52092:A 0.000518531
+3 *52088:Y 0.000477011
+4 *144:8 0.00117137
+5 *52092:A *52091:A 5.50049e-05
+6 *52092:A *52092:B 0.000139892
+7 *52092:A *146:11 3.22879e-05
+8 *52093:A *203:76 0
+9 *52093:A *266:40 0
+10 *144:8 *52120:B 0
+11 *144:8 *175:8 2.29192e-05
+12 *144:8 *203:69 0
+13 *144:8 *203:76 0
+14 *144:8 *225:128 0.00031495
+15 *144:8 *266:40 0
+*RES
+1 *52088:Y *144:8 45.8507 
+2 *144:8 *52092:A 47.6943 
+3 *144:8 *52093:A 41.3143 
+*END
+
+*D_NET *145 0.000985668
+*CONN
+*I *52116:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52091:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52089:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52116:A1 0.000212951
+2 *52091:A 1.80505e-05
+3 *52089:Y 0.000117331
+4 *145:6 0.000348332
+5 *52091:A *52092:B 2.93747e-05
+6 *52116:A1 *52116:A2 6.81213e-05
+7 *52116:A1 *146:11 5.93485e-05
+8 *52116:A1 *148:8 4.48671e-05
+9 *52116:A1 *264:9 3.22879e-05
+10 *52116:A1 *266:40 0
+11 *145:6 *266:40 0
+12 *52092:A *52091:A 5.50049e-05
+*RES
+1 *52089:Y *145:6 39.9057 
+2 *145:6 *52091:A 38.6214 
+3 *145:6 *52116:A1 42.7021 
+*END
+
+*D_NET *146 0.00235057
+*CONN
+*I *52116:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52091:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52090:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52116:A2 5.44181e-05
+2 *52091:B 0
+3 *52090:X 0.000368561
+4 *146:11 0.000153689
+5 *146:5 0.000576668
+6 *52116:A2 *149:8 0.00014196
+7 *52116:A2 *264:9 2.44913e-05
+8 *146:5 *147:19 0.0002263
+9 *146:5 *149:8 0.000182826
+10 *146:5 *264:9 0.000213173
+11 *146:11 *52092:B 5.50106e-05
+12 *146:11 *52094:A 0
+13 *146:11 *147:19 0.000166522
+14 *146:11 *148:8 0
+15 *146:11 *266:40 2.71951e-05
+16 *52092:A *146:11 3.22879e-05
+17 *52116:A1 *52116:A2 6.81213e-05
+18 *52116:A1 *146:11 5.93485e-05
+*RES
+1 *52090:X *146:5 31.7207 
+2 *146:5 *146:11 33.9357 
+3 *146:11 *52091:B 23 
+4 *146:5 *52116:A2 25.0714 
+*END
+
+*D_NET *147 0.00174807
+*CONN
+*I *52093:B I *D sky130_fd_sc_hd__and2_1
+*I *52092:B I *D sky130_fd_sc_hd__nor2_1
+*I *52091:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52093:B 0
+2 *52092:B 0.000253707
+3 *52091:Y 0
+4 *147:19 0.000137168
+5 *147:4 0.000390875
+6 *52092:B *148:8 0.000143655
+7 *147:19 *264:9 0.000123934
+8 *147:19 *266:40 8.16356e-05
+9 *52091:A *52092:B 2.93747e-05
+10 *52092:A *52092:B 0.000139892
+11 *146:5 *147:19 0.0002263
+12 *146:11 *52092:B 5.50106e-05
+13 *146:11 *147:19 0.000166522
+*RES
+1 *52091:Y *147:4 23 
+2 *147:4 *52092:B 29.2557 
+3 *147:4 *147:19 34.785 
+4 *147:19 *52093:B 23 
+*END
+
+*D_NET *148 0.000887857
+*CONN
+*I *52094:A I *D sky130_fd_sc_hd__nor2_2
+*I *52116:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52092:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52094:A 0.000121411
+2 *52116:B1_N 0
+3 *52092:Y 0.00020531
+4 *148:8 0.000326721
+5 *52094:A *149:8 4.58924e-05
+6 *52094:A *267:39 0
+7 *148:8 *267:39 0
+8 *52092:B *148:8 0.000143655
+9 *52116:A1 *148:8 4.48671e-05
+10 *146:11 *52094:A 0
+11 *146:11 *148:8 0
+*RES
+1 *52092:Y *148:8 41.8321 
+2 *148:8 *52116:B1_N 38 
+3 *148:8 *52094:A 40.61 
+*END
+
+*D_NET *149 0.000998973
+*CONN
+*I *52094:B I *D sky130_fd_sc_hd__nor2_2
+*I *52093:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52094:B 0
+2 *52093:X 0.000314147
+3 *149:8 0.000314147
+4 *149:8 *266:40 0
+5 *149:8 *266:50 0
+6 *52094:A *149:8 4.58924e-05
+7 *52116:A2 *149:8 0.00014196
+8 *146:5 *149:8 0.000182826
+*RES
+1 *52093:X *149:8 43.3857 
+2 *149:8 *52094:B 38 
+*END
+
+*D_NET *150 0.00159574
+*CONN
+*I *52112:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52098:A I *D sky130_fd_sc_hd__xor2_4
+*I *52094:Y O *D sky130_fd_sc_hd__nor2_2
+*CAP
+1 *52112:A1 0.000142315
+2 *52098:A 0
+3 *52094:Y 0.000248988
+4 *150:9 0.000176705
+5 *150:6 0.000283378
+6 *52112:A1 *52098:B 0
+7 *52112:A1 *52112:A2 7.659e-05
+8 *52112:A1 *52112:B1 0.000228903
+9 *52112:A1 *167:7 0.000148678
+10 *150:6 *151:23 5.94125e-05
+11 *150:6 *152:8 0.000104123
+12 *150:6 *153:6 0
+13 *150:6 *266:50 0
+14 *150:9 *52112:A2 9.67842e-05
+15 *150:9 *167:7 2.98648e-05
+*RES
+1 *52094:Y *150:6 43.075 
+2 *150:6 *150:9 16.0979 
+3 *150:9 *52098:A 23 
+4 *150:9 *52112:A1 27.9507 
+*END
+
+*D_NET *151 0.0032167
+*CONN
+*I *52111:C I *D sky130_fd_sc_hd__and3_1
+*I *52097:A I *D sky130_fd_sc_hd__xnor2_2
+*I *52095:Y O *D sky130_fd_sc_hd__o21bai_2
+*CAP
+1 *52111:C 0
+2 *52097:A 0
+3 *52095:Y 0.000658177
+4 *151:23 0.000446164
+5 *151:12 8.94166e-05
+6 *151:7 0.00119376
+7 *151:7 *52112:A2 0.000359326
+8 *151:12 *152:8 0.000138718
+9 *151:12 *266:50 2.76611e-06
+10 *151:23 *52112:A2 0.000178517
+11 *151:23 *152:8 5.05552e-05
+12 *151:23 *154:5 0
+13 *151:23 *267:43 0
+14 *151:23 *267:50 3.9889e-05
+15 *150:6 *151:23 5.94125e-05
+*RES
+1 *52095:Y *151:7 32.6943 
+2 *151:7 *151:12 31.9057 
+3 *151:12 *52097:A 23 
+4 *151:7 *151:23 36.8771 
+5 *151:23 *52111:C 23 
+*END
+
+*D_NET *152 0.00136567
+*CONN
+*I *52097:B I *D sky130_fd_sc_hd__xnor2_2
+*I *52096:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52097:B 0
+2 *52096:Y 0.000336209
+3 *152:8 0.000336209
+4 *152:8 *166:8 0.000214425
+5 *152:8 *203:131 0.000185428
+6 *152:8 *266:50 0
+7 *150:6 *152:8 0.000104123
+8 *151:12 *152:8 0.000138718
+9 *151:23 *152:8 5.05552e-05
+*RES
+1 *52096:Y *152:8 45.4779 
+2 *152:8 *52097:B 38 
+*END
+
+*D_NET *153 0.00181338
+*CONN
+*I *52098:B I *D sky130_fd_sc_hd__xor2_4
+*I *52112:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52097:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52098:B 2.34823e-05
+2 *52112:A2 0.000214895
+3 *52097:Y 0.000101381
+4 *153:9 0.000292631
+5 *153:6 0.000155636
+6 *52112:A2 *52112:B1 0.000230604
+7 *52112:A2 *167:7 4.61435e-05
+8 *153:6 *154:5 4.6318e-06
+9 *153:6 *267:39 0
+10 *153:9 *167:7 1.32939e-05
+11 *153:9 *267:43 1.94693e-05
+12 *52112:A1 *52098:B 0
+13 *52112:A1 *52112:A2 7.659e-05
+14 *150:6 *153:6 0
+15 *150:9 *52112:A2 9.67842e-05
+16 *151:7 *52112:A2 0.000359326
+17 *151:23 *52112:A2 0.000178517
+*RES
+1 *52097:Y *153:6 39.5536 
+2 *153:6 *153:9 16.0979 
+3 *153:9 *52112:A2 30.7886 
+4 *153:9 *52098:B 23.4971 
+*END
+
+*D_NET *154 0.00215731
+*CONN
+*I *52105:A I *D sky130_fd_sc_hd__xor2_4
+*I *52110:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52098:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52105:A 0.000134635
+2 *52110:A1 0.000143484
+3 *52098:X 0.000461905
+4 *154:5 0.000740024
+5 *52105:A *160:13 0
+6 *52105:A *161:8 0
+7 *52110:A1 *160:7 3.22879e-05
+8 *52110:A1 *165:5 0.000400198
+9 *154:5 *368:DIODE 9.9979e-05
+10 *154:5 *160:13 0
+11 *154:5 *167:11 7.30875e-05
+12 *154:5 *267:39 0
+13 *154:5 *267:43 6.7081e-05
+14 *154:5 *268:38 0
+15 *151:23 *154:5 0
+16 *153:6 *154:5 4.6318e-06
+*RES
+1 *52098:X *154:5 24.6529 
+2 *154:5 *52110:A1 42.4329 
+3 *154:5 *52105:A 40.2579 
+*END
+
+*D_NET *155 0.00287139
+*CONN
+*I *52102:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *52103:A I *D sky130_fd_sc_hd__nor3_1
+*I *52099:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52102:A1 5.22103e-05
+2 *52103:A 0.000136866
+3 *52099:Y 0.000377211
+4 *155:7 0.000566288
+5 *52102:A1 *52102:B1 2.95125e-05
+6 *52102:A1 *156:10 8.62876e-05
+7 *52103:A *52102:B1 1.12487e-05
+8 *52103:A *52103:B 0.000432142
+9 *52103:A *52103:C 0.000359332
+10 *52103:A *156:5 5.50106e-05
+11 *52103:A *156:10 3.47781e-05
+12 *52103:A *159:8 3.22879e-05
+13 *52103:A *268:43 0.000122217
+14 *155:7 *156:5 0.000182826
+15 *52070:A *52102:A1 6.57448e-05
+16 *52070:A *52103:A 2.96051e-05
+17 *52100:B *155:7 2.80512e-05
+18 *126:7 *155:7 0.000269775
+*RES
+1 *52099:Y *155:7 43.8621 
+2 *155:7 *52103:A 45.1879 
+3 *155:7 *52102:A1 39.9057 
+*END
+
+*D_NET *156 0.00165144
+*CONN
+*I *52103:B I *D sky130_fd_sc_hd__nor3_1
+*I *52102:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *52100:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52103:B 0.000209597
+2 *52102:A2 0
+3 *52100:Y 7.95497e-05
+4 *156:10 5.03385e-05
+5 *156:5 0.000339486
+6 *156:5 *268:43 5.98028e-05
+7 *156:10 *52102:B1 0.000114092
+8 *52100:B *156:5 7.53384e-06
+9 *52102:A1 *156:10 8.62876e-05
+10 *52103:A *52103:B 0.000432142
+11 *52103:A *156:5 5.50106e-05
+12 *52103:A *156:10 3.47781e-05
+13 *155:7 *156:5 0.000182826
+*RES
+1 *52100:Y *156:5 25.5271 
+2 *156:5 *156:10 31.5536 
+3 *156:10 *52102:A2 23 
+4 *156:5 *52103:B 27.9093 
+*END
+
+*D_NET *157 0.00439915
+*CONN
+*I *52102:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *52103:C I *D sky130_fd_sc_hd__nor3_1
+*I *52101:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52102:B1 0.000193668
+2 *52103:C 5.11825e-05
+3 *52101:Y 0.000845565
+4 *157:12 0.000303533
+5 *157:9 0.000904247
+6 *52103:C *268:43 0.000359332
+7 *157:9 *267:72 5.38135e-05
+8 *157:9 *268:43 0.000574096
+9 *157:12 *203:182 1.01436e-05
+10 *52070:A *52102:B1 0
+11 *52070:A *157:12 0
+12 *52099:A *157:9 0.00039127
+13 *52099:B *157:9 4.95081e-05
+14 *52102:A1 *52102:B1 2.95125e-05
+15 *52103:A *52102:B1 1.12487e-05
+16 *52103:A *52103:C 0.000359332
+17 *123:8 *157:12 0
+18 *124:11 *157:9 0.000139357
+19 *126:7 *157:9 9.24795e-06
+20 *156:10 *52102:B1 0.000114092
+*RES
+1 *52101:Y *157:9 39.5093 
+2 *157:9 *157:12 15.8493 
+3 *157:12 *52103:C 41.9564 
+4 *157:12 *52102:B1 41.9357 
+*END
+
+*D_NET *158 0.000936961
+*CONN
+*I *52110:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52104:A I *D sky130_fd_sc_hd__nor2_2
+*I *52102:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *52110:B1 0.00024448
+2 *52104:A 0
+3 *52102:X 0.000158349
+4 *158:5 0.000402829
+5 *52110:B1 *160:7 0.000131304
+*RES
+1 *52102:X *158:5 26.0036 
+2 *158:5 *52104:A 23 
+3 *158:5 *52110:B1 27.93 
+*END
+
+*D_NET *159 0.000364771
+*CONN
+*I *52104:B I *D sky130_fd_sc_hd__nor2_2
+*I *52103:Y O *D sky130_fd_sc_hd__nor3_1
+*CAP
+1 *52104:B 0
+2 *52103:Y 0.000166242
+3 *159:8 0.000166242
+4 *159:8 *160:13 0
+5 *52103:A *159:8 3.22879e-05
+*RES
+1 *52103:Y *159:8 40.8793 
+2 *159:8 *52104:B 38 
+*END
+
+*D_NET *160 0.000961327
+*CONN
+*I *52110:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52105:B I *D sky130_fd_sc_hd__xor2_4
+*I *52104:Y O *D sky130_fd_sc_hd__nor2_2
+*CAP
+1 *52110:A2 0
+2 *52105:B 0
+3 *52104:Y 0.000174989
+4 *160:13 0.000199902
+5 *160:7 0.00037489
+6 *160:7 *165:5 1.65043e-05
+7 *160:13 *161:8 1.19692e-05
+8 *52105:A *160:13 0
+9 *52110:A1 *160:7 3.22879e-05
+10 *52110:B1 *160:7 0.000131304
+11 *136:5 *160:13 1.94812e-05
+12 *154:5 *160:13 0
+13 *159:8 *160:13 0
+*RES
+1 *52104:Y *160:7 27.4536 
+2 *160:7 *160:13 33.2314 
+3 *160:13 *52105:B 23 
+4 *160:7 *52110:A2 23 
+*END
+
+*D_NET *161 0.00109541
+*CONN
+*I *52106:B I *D sky130_fd_sc_hd__xor2_4
+*I *52108:B I *D sky130_fd_sc_hd__nand2_1
+*I *52105:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52106:B 0.000225401
+2 *52108:B 0
+3 *52105:X 0.000253769
+4 *161:8 0.00047917
+5 *52105:A *161:8 0
+6 *136:5 *161:8 2.5214e-05
+7 *137:10 *52106:B 9.3813e-05
+8 *137:10 *161:8 6.07611e-06
+9 *160:13 *161:8 1.19692e-05
+*RES
+1 *52105:X *161:8 19.6918 
+2 *161:8 *52108:B 38 
+3 *161:8 *52106:B 42.6607 
+*END
+
+*D_NET *162 0.00128275
+*CONN
+*I *52107:B I *D sky130_fd_sc_hd__xor2_4
+*I *52109:A2 I *D sky130_fd_sc_hd__a21boi_2
+*I *52106:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52107:B 0.000124012
+2 *52109:A2 9.87291e-05
+3 *52106:X 0.000178815
+4 *162:7 0.000401556
+5 *52107:B *182:8 0
+6 *52109:A2 *182:8 0
+7 *52107:A *52107:B 0.000270722
+8 *52107:A *52109:A2 0.000169674
+9 *136:8 *52109:A2 3.92407e-05
+*RES
+1 *52106:X *162:7 17.4546 
+2 *162:7 *52109:A2 40.61 
+3 *162:7 *52107:B 41.6664 
+*END
+
+*D_NET *163 0.000709962
+*CONN
+*I *52109:B1_N I *D sky130_fd_sc_hd__a21boi_2
+*I *52108:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52109:B1_N 0
+2 *52108:Y 0.000354981
+3 *163:5 0.000354981
+*RES
+1 *52108:Y *163:5 29.3386 
+2 *163:5 *52109:B1_N 23 
+*END
+
+*D_NET *164 0.00100132
+*CONN
+*I *52128:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52109:Y O *D sky130_fd_sc_hd__a21boi_2
+*CAP
+1 *52128:A 6.80678e-05
+2 *52109:Y 0.000362483
+3 *164:6 0.000430551
+4 *164:6 *275:5 0
+5 *52107:A *164:6 0.000140223
+*RES
+1 *52109:Y *164:6 45.8921 
+2 *164:6 *52128:A 39.0979 
+*END
+
+*D_NET *165 0.00235975
+*CONN
+*I *52127:A I *D sky130_fd_sc_hd__xnor2_2
+*I *52110:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52127:A 0
+2 *52110:Y 0.000850004
+3 *165:10 8.63323e-05
+4 *165:5 0.000936337
+5 *165:10 *181:8 7.03766e-05
+6 *52110:A1 *165:5 0.000400198
+7 *160:7 *165:5 1.65043e-05
+*RES
+1 *52110:Y *165:5 35.0246 
+2 *165:5 *165:10 31.9057 
+3 *165:10 *52127:A 23 
+*END
+
+*D_NET *166 0.00123685
+*CONN
+*I *52112:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52111:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52112:B1 3.15638e-05
+2 *52111:X 0.000225914
+3 *166:8 0.000257478
+4 *166:8 *203:131 4.79641e-05
+5 *52112:A1 *52112:B1 0.000228903
+6 *52112:A2 *52112:B1 0.000230604
+7 *152:8 *166:8 0.000214425
+*RES
+1 *52111:X *166:8 41.8321 
+2 *166:8 *52112:B1 40.5271 
+*END
+
+*D_NET *167 0.00335175
+*CONN
+*I *52113:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52114:C I *D sky130_fd_sc_hd__and3_1
+*I *52112:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52113:B1 0.000234549
+2 *52114:C 0
+3 *52112:Y 0.000622082
+4 *167:11 0.00056039
+5 *167:7 0.000947923
+6 *52113:B1 *268:24 5.90675e-06
+7 *52113:B1 *268:28 0.000164516
+8 *167:7 *267:43 0.000269781
+9 *167:11 *180:10 5.86328e-05
+10 *167:11 *203:137 8.85299e-06
+11 *167:11 *268:28 5.38131e-05
+12 *167:11 *268:38 0.000114233
+13 *52112:A1 *167:7 0.000148678
+14 *52112:A2 *167:7 4.61435e-05
+15 *150:9 *167:7 2.98648e-05
+16 *153:9 *167:7 1.32939e-05
+17 *154:5 *167:11 7.30875e-05
+*RES
+1 *52112:Y *167:7 47.1971 
+2 *167:7 *167:11 21.0486 
+3 *167:11 *52114:C 23 
+4 *167:11 *52113:B1 26.8943 
+*END
+
+*D_NET *168 0.00180463
+*CONN
+*I *52115:A I *D sky130_fd_sc_hd__nor2_1
+*I *52129:B1 I *D sky130_fd_sc_hd__a21o_4
+*I *52113:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52115:A 0.000221874
+2 *52129:B1 0
+3 *52113:Y 0
+4 *168:11 0.000269716
+5 *168:4 0.00049159
+6 *52115:A *373:DIODE 3.53115e-05
+7 *52115:A *169:9 0.000376074
+8 *52115:A *203:156 8.52481e-05
+9 *168:11 *374:DIODE 2.42772e-05
+10 *168:11 *169:9 5.50106e-05
+11 *168:11 *170:8 3.83778e-05
+12 *168:11 *170:13 0.000103637
+13 *168:11 *180:10 0
+14 *168:11 *181:8 4.06849e-05
+15 *168:11 *203:156 6.28308e-05
+*RES
+1 *52113:Y *168:4 23 
+2 *168:4 *168:11 35.9864 
+3 *168:11 *52129:B1 23 
+4 *168:4 *52115:A 28.7586 
+*END
+
+*D_NET *169 0.00131966
+*CONN
+*I *52115:B I *D sky130_fd_sc_hd__nor2_1
+*I *52114:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52115:B 0
+2 *52114:X 0.000169126
+3 *169:9 0.000169126
+4 *169:9 *373:DIODE 7.27182e-05
+5 *169:9 *203:156 9.90162e-05
+6 *169:9 *268:24 6.53382e-05
+7 *169:9 *268:28 0.000313249
+8 *52115:A *169:9 0.000376074
+9 *168:11 *169:9 5.50106e-05
+*RES
+1 *52114:X *169:9 30.3329 
+2 *169:9 *52115:B 23 
+*END
+
+*D_NET *170 0.00316615
+*CONN
+*I *52129:A1 I *D sky130_fd_sc_hd__a21o_4
+*I *52126:A I *D sky130_fd_sc_hd__xor2_1
+*I *52115:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52129:A1 2.34823e-05
+2 *52126:A 0.000156747
+3 *52115:Y 0.000307073
+4 *170:13 0.000536303
+5 *170:8 0.000663147
+6 *52126:A *52126:B 0.000409919
+7 *52126:A *181:8 1.14876e-05
+8 *52126:A *268:38 0.000409011
+9 *170:8 *373:DIODE 0.000185434
+10 *170:8 *374:DIODE 8.4047e-05
+11 *170:8 *268:24 0.000140259
+12 *170:8 *268:28 2.32004e-05
+13 *170:13 *181:8 1.90232e-05
+14 *170:13 *277:5 5.50049e-05
+15 *168:11 *170:8 3.83778e-05
+16 *168:11 *170:13 0.000103637
+*RES
+1 *52115:Y *170:8 43.1579 
+2 *170:8 *170:13 20.4064 
+3 *170:13 *52126:A 28.8829 
+4 *170:13 *52129:A1 23.4971 
+*END
+
+*D_NET *171 0.0008968
+*CONN
+*I *52125:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52116:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52125:A 0
+2 *52116:X 0.000259668
+3 *171:5 0.000259668
+4 *171:5 *180:7 3.22879e-05
+5 *171:5 *264:9 0.000345176
+*RES
+1 *52116:X *171:5 29.815 
+2 *171:5 *52125:A 23 
+*END
+
+*D_NET *172 0.00149475
+*CONN
+*I *52122:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52123:B I *D sky130_fd_sc_hd__and3_1
+*I *52117:Y O *D sky130_fd_sc_hd__nand4_1
+*CAP
+1 *52122:A1 0
+2 *52123:B 0
+3 *52117:Y 0.000297808
+4 *172:10 0.000128139
+5 *172:5 0.000425948
+6 *172:5 *52122:B1 9.5877e-05
+7 *172:5 *176:7 0.000311554
+8 *172:10 *173:10 8.4047e-05
+9 *172:10 *176:12 1.37349e-05
+10 *172:10 *177:6 0.000100625
+11 *172:10 *178:8 3.70187e-05
+12 *172:10 *267:39 0
+*RES
+1 *52117:Y *172:5 27.4329 
+2 *172:5 *172:10 32.9621 
+3 *172:10 *52123:B 23 
+4 *172:5 *52122:A1 23 
+*END
+
+*D_NET *173 0.00112824
+*CONN
+*I *52123:C I *D sky130_fd_sc_hd__and3_1
+*I *52122:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52118:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *52123:C 5.269e-05
+2 *52122:A2 0
+3 *52118:X 0.000207833
+4 *173:10 7.72722e-05
+5 *173:5 0.000337796
+6 *52123:C *267:19 2.99898e-05
+7 *173:5 *52118:A1 0.000141954
+8 *173:5 *267:19 6.53382e-05
+9 *173:10 *52117:A 6.7177e-06
+10 *173:10 *176:12 0.000108681
+11 *173:10 *177:6 1.59208e-05
+12 *172:10 *173:10 8.4047e-05
+*RES
+1 *52118:X *173:5 26.0036 
+2 *173:5 *173:10 31.9057 
+3 *173:10 *52122:A2 23 
+4 *173:5 *52123:C 23.7043 
+*END
+
+*D_NET *174 0.00163498
+*CONN
+*I *52121:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52119:Y O *D sky130_fd_sc_hd__o21ai_1
+*CAP
+1 *52121:A 0
+2 *52119:Y 0.000224058
+3 *174:8 0.000224058
+4 *174:8 *364:DIODE 0.00010018
+5 *174:8 *52086:A2 0.000135855
+6 *174:8 *175:8 3.92407e-05
+7 *174:8 *207:113 0.000447976
+8 *174:8 *283:56 5.67058e-05
+9 *174:8 *283:71 2.70469e-05
+10 *52119:B1 *174:8 1.72202e-05
+11 *141:9 *174:8 0.000274078
+12 *142:19 *174:8 8.85587e-05
+*RES
+1 *52119:Y *174:8 47.5286 
+2 *174:8 *52121:A 38 
+*END
+
+*D_NET *175 0.0012289
+*CONN
+*I *52121:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52120:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52121:B 0
+2 *52120:Y 0.000433133
+3 *175:8 0.000433133
+4 *175:8 *281:134 9.91798e-05
+5 *175:8 *283:71 6.48049e-05
+6 *175:8 *283:86 0.000136486
+7 *142:19 *175:8 0
+8 *144:8 *175:8 2.29192e-05
+9 *174:8 *175:8 3.92407e-05
+*RES
+1 *52120:Y *175:8 45.1257 
+2 *175:8 *52121:B 38 
+*END
+
+*D_NET *176 0.00221763
+*CONN
+*I *52122:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52123:A I *D sky130_fd_sc_hd__and3_1
+*I *52121:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52122:B1 9.88158e-05
+2 *52123:A 0
+3 *52121:Y 0.000265929
+4 *176:12 8.496e-05
+5 *176:7 0.000449705
+6 *176:7 *52117:A 0.000227208
+7 *176:7 *52117:D 0.000278081
+8 *176:7 *225:136 0.00010018
+9 *176:7 *281:152 0.00010018
+10 *176:7 *281:162 1.72202e-05
+11 *176:12 *52117:A 6.08751e-05
+12 *176:12 *267:39 4.6318e-06
+13 *172:5 *52122:B1 9.5877e-05
+14 *172:5 *176:7 0.000311554
+15 *172:10 *176:12 1.37349e-05
+16 *173:10 *176:12 0.000108681
+*RES
+1 *52121:Y *176:7 31.7414 
+2 *176:7 *176:12 31.9057 
+3 *176:12 *52123:A 23 
+4 *176:7 *52122:B1 25.0507 
+*END
+
+*D_NET *177 0.0010744
+*CONN
+*I *52124:A I *D sky130_fd_sc_hd__or2_1
+*I *52122:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52124:A 2.71283e-05
+2 *52122:Y 0.000261651
+3 *177:6 0.00028878
+4 *52124:A *179:8 6.17437e-06
+5 *52124:A *266:27 5.50049e-05
+6 *177:6 *366:DIODE 2.46345e-05
+7 *177:6 *178:8 5.08899e-05
+8 *177:6 *225:151 0
+9 *177:6 *266:12 0.000243587
+10 *172:10 *177:6 0.000100625
+11 *173:10 *177:6 1.59208e-05
+*RES
+1 *52122:Y *177:6 44.4836 
+2 *177:6 *52124:A 38.6214 
+*END
+
+*D_NET *178 0.000644746
+*CONN
+*I *52124:B I *D sky130_fd_sc_hd__or2_1
+*I *52123:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52124:B 0
+2 *52123:X 0.000176071
+3 *178:8 0.000176071
+4 *178:8 *225:146 0.000139352
+5 *178:8 *267:39 6.53445e-05
+6 *172:10 *178:8 3.70187e-05
+7 *177:6 *178:8 5.08899e-05
+*RES
+1 *52123:X *178:8 42.1843 
+2 *178:8 *52124:B 38 
+*END
+
+*D_NET *179 0.000705333
+*CONN
+*I *52125:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52124:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52125:B 0
+2 *52124:X 0.000301457
+3 *179:8 0.000301457
+4 *179:8 *366:DIODE 8.4047e-05
+5 *179:8 *266:27 1.21972e-05
+6 *179:8 *267:39 0
+7 *52124:A *179:8 6.17437e-06
+*RES
+1 *52124:X *179:8 43.3443 
+2 *179:8 *52125:B 38 
+*END
+
+*D_NET *180 0.00279364
+*CONN
+*I *52129:A2 I *D sky130_fd_sc_hd__a21o_4
+*I *52126:B I *D sky130_fd_sc_hd__xor2_1
+*I *52125:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52129:A2 0
+2 *52126:B 0.000145037
+3 *52125:Y 4.00017e-05
+4 *180:10 0.000691126
+5 *180:7 0.000586091
+6 *52126:B *181:8 0.0001042
+7 *180:10 *203:142 0.000299178
+8 *180:10 *267:39 0.000318482
+9 *180:10 *268:38 0.000108681
+10 *52126:A *52126:B 0.000409919
+11 *167:11 *180:10 5.86328e-05
+12 *168:11 *180:10 0
+13 *171:5 *180:7 3.22879e-05
+*RES
+1 *52125:Y *180:7 38.6214 
+2 *180:7 *180:10 28.1743 
+3 *180:10 *52126:B 27.93 
+4 *180:10 *52129:A2 23 
+*END
+
+*D_NET *181 0.00157534
+*CONN
+*I *52127:B I *D sky130_fd_sc_hd__xnor2_2
+*I *52126:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52127:B 0
+2 *52126:X 0.000664785
+3 *181:8 0.000664785
+4 *52126:A *181:8 1.14876e-05
+5 *52126:B *181:8 0.0001042
+6 *165:10 *181:8 7.03766e-05
+7 *168:11 *181:8 4.06849e-05
+8 *170:13 *181:8 1.90232e-05
+*RES
+1 *52126:X *181:8 49.0614 
+2 *181:8 *52127:B 38 
+*END
+
+*D_NET *182 0.00125573
+*CONN
+*I *52128:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52127:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52128:B 0
+2 *52127:Y 0.000598557
+3 *182:8 0.000598557
+4 *182:8 *275:5 5.86165e-05
+5 *52107:B *182:8 0
+6 *52109:A2 *182:8 0
+7 *136:8 *182:8 0
+*RES
+1 *52127:Y *182:8 49.6829 
+2 *182:8 *52128:B 38 
+*END
+
+*D_NET *183 0.0115916
+*CONN
+*I *51901:A I *D sky130_fd_sc_hd__and3_1
+*I *52012:A I *D sky130_fd_sc_hd__and3_1
+*I *51895:A I *D sky130_fd_sc_hd__nand2_2
+*I *51942:A1 I *D sky130_fd_sc_hd__a22oi_1
+*I *52010:A I *D sky130_fd_sc_hd__nand2_1
+*I *51908:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *51922:A1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51968:A1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51991:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *51967:B I *D sky130_fd_sc_hd__and4_1
+*I *51893:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51901:A 0
+2 *52012:A 0.000149109
+3 *51895:A 1.75705e-05
+4 *51942:A1 7.41589e-05
+5 *52010:A 0.000208002
+6 *51908:A1 0
+7 *51922:A1 0
+8 *51968:A1 0
+9 *51991:A2 1.68912e-05
+10 *51967:B 0.0001845
+11 *51893:X 0
+12 *183:88 0.000631586
+13 *183:80 0.000839319
+14 *183:59 0.00059598
+15 *183:54 0.000755325
+16 *183:51 0.00110283
+17 *183:45 0.00073298
+18 *183:15 0.000650039
+19 *183:7 0.000767706
+20 *183:4 0.00061681
+21 *51895:A *51895:B 1.14154e-05
+22 *51942:A1 *199:20 0.000109352
+23 *51942:A1 *203:8 0
+24 *51967:B *51991:A1 9.84794e-05
+25 *51967:B *51991:B1 1.56762e-05
+26 *51967:B *51991:B2 0.00013635
+27 *51967:B *280:29 0.000135716
+28 *51967:B *281:45 0.000226306
+29 *51991:A2 *51991:B1 2.45725e-05
+30 *52010:A *51908:A2 5.67058e-05
+31 *52010:A *281:79 6.30615e-05
+32 *52010:A *283:31 2.02517e-05
+33 *52010:A *284:28 2.4754e-05
+34 *52012:A *51895:B 7.53384e-06
+35 *52012:A *187:33 6.24237e-05
+36 *52012:A *188:8 5.70419e-05
+37 *183:7 *51968:B1 2.30292e-05
+38 *183:7 *189:17 7.75317e-05
+39 *183:7 *212:23 8.1796e-05
+40 *183:7 *263:40 9.24795e-06
+41 *183:7 *281:53 1.32314e-05
+42 *183:15 *51941:B 0.000228903
+43 *183:15 *51968:A2 0.000256034
+44 *183:15 *51991:B1 6.48914e-05
+45 *183:15 *189:45 1.01436e-05
+46 *183:15 *193:27 0
+47 *183:15 *232:33 7.48331e-05
+48 *183:15 *262:26 8.98318e-06
+49 *183:15 *263:40 2.45645e-05
+50 *183:15 *263:42 2.18506e-05
+51 *183:15 *280:29 4.01634e-05
+52 *183:15 *281:45 0.000512174
+53 *183:15 *282:10 1.22906e-05
+54 *183:45 *189:15 3.58084e-06
+55 *183:45 *281:53 0.000404502
+56 *183:51 *51910:A 0.000255882
+57 *183:51 *189:15 8.10475e-05
+58 *183:51 *215:8 0.000148524
+59 *183:51 *280:49 1.55941e-05
+60 *183:54 *199:20 3.43144e-05
+61 *183:54 *215:8 0
+62 *183:54 *263:12 9.5956e-06
+63 *183:54 *263:30 8.62192e-05
+64 *183:59 *51908:B1 5.50106e-05
+65 *183:59 *199:20 5.3304e-05
+66 *183:59 *284:28 0.000112248
+67 *183:80 *189:7 4.6595e-05
+68 *183:80 *189:15 0.000173452
+69 *183:80 *189:105 0.000116257
+70 *183:88 *51895:B 3.22879e-05
+71 *183:88 *51901:C 6.42666e-05
+72 *183:88 *189:105 9.24795e-06
+73 *183:88 *189:121 3.75698e-05
+*RES
+1 *51893:X *183:4 23 
+2 *183:4 *183:7 5.40643 
+3 *183:7 *183:15 42.18 
+4 *183:15 *51967:B 29.67 
+5 *183:15 *51991:A2 23.7664 
+6 *183:7 *51968:A1 23 
+7 *183:4 *183:45 5.40643 
+8 *183:45 *51922:A1 23 
+9 *183:45 *183:51 9.19714 
+10 *183:51 *183:54 19.3707 
+11 *183:54 *183:59 20.4064 
+12 *183:59 *51908:A1 23 
+13 *183:59 *52010:A 27.4536 
+14 *183:54 *51942:A1 39.5536 
+15 *183:51 *183:80 7.76786 
+16 *183:80 *183:88 7.47786 
+17 *183:88 *51895:A 23.4971 
+18 *183:88 *52012:A 26.48 
+19 *183:80 *51901:A 23 
+*END
+
+*D_NET *184 0.00106408
+*CONN
+*I *52131:B I *D sky130_fd_sc_hd__and2_1
+*I *52130:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52131:B 0
+2 *52130:X 0.000108061
+3 *184:7 0.000108061
+4 *52004:B *184:7 3.46158e-05
+5 *52130:A *184:7 4.95081e-05
+6 *52130:B *184:7 0.000272383
+7 *46:8 *184:7 0.000491451
+*RES
+1 *52130:X *184:7 28.8829 
+2 *184:7 *52131:B 23 
+*END
+
+*D_NET *185 0.00106051
+*CONN
+*I *52132:A I *D sky130_fd_sc_hd__buf_6
+*I *52131:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52132:A 0.000170685
+2 *52131:X 0.000245954
+3 *185:6 0.000416638
+4 *185:6 *270:6 0
+5 *46:8 *185:6 0.000140958
+6 *59:21 *185:6 8.62783e-05
+7 *63:18 *185:6 0
+8 *65:11 *185:6 0
+*RES
+1 *52131:X *185:6 43.075 
+2 *185:6 *52132:A 41.0036 
+*END
+
+*D_NET *186 0.000310114
+*CONN
+*I *52134:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52133:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52134:B 0
+2 *52133:Y 4.65756e-05
+3 *186:6 4.65756e-05
+4 *64:14 *186:6 7.28526e-05
+5 *65:11 *186:6 0.00014411
+*RES
+1 *52133:Y *186:6 39.9057 
+2 *186:6 *52134:B 38 
+*END
+
+*D_NET *187 0.0141923
+*CONN
+*I *51909:A1 I *D sky130_fd_sc_hd__a21bo_1
+*I *51903:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *52011:B I *D sky130_fd_sc_hd__nand2_1
+*I *52083:B I *D sky130_fd_sc_hd__and3_1
+*I *52120:B I *D sky130_fd_sc_hd__nand2_1
+*I *52082:B I *D sky130_fd_sc_hd__nand2_1
+*I *52052:B I *D sky130_fd_sc_hd__nand2_1
+*I *51902:A I *D sky130_fd_sc_hd__and2_1
+*I *52012:B I *D sky130_fd_sc_hd__and3_1
+*I *51895:B I *D sky130_fd_sc_hd__nand2_2
+*I *51894:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51909:A1 0
+2 *51903:B1 0
+3 *52011:B 2.91006e-05
+4 *52083:B 0
+5 *52120:B 0.000319276
+6 *52082:B 0
+7 *52052:B 0
+8 *51902:A 0
+9 *52012:B 0
+10 *51895:B 7.60912e-05
+11 *51894:X 0.000299303
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+13 *187:91 0.000462284
+14 *187:68 0.000733683
+15 *187:57 0.000779415
+16 *187:49 0.00108945
+17 *187:44 0.000287585
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+21 *187:15 0.000763265
+22 *187:10 0.000175593
+23 *187:8 0.000299303
+24 *52011:B *51902:B 0
+25 *52011:B *194:22 0
+26 *52011:B *194:36 5.0554e-05
+27 *52120:B *281:134 0.000272383
+28 *187:8 *51894:A 0
+29 *187:8 *193:68 0.000274078
+30 *187:8 *193:86 4.17736e-05
+31 *187:8 *194:8 6.07611e-06
+32 *187:8 *194:22 6.42902e-05
+33 *187:15 *51909:A2 5.50049e-05
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+35 *187:15 *207:73 0.000128391
+36 *187:15 *281:96 9.0102e-05
+37 *187:22 *188:8 0
+38 *187:22 *189:121 0
+39 *187:22 *190:8 9.20311e-06
+40 *187:22 *194:8 0
+41 *187:22 *283:31 7.21237e-05
+42 *187:33 *188:8 5.41288e-05
+43 *187:33 *190:23 1.39431e-05
+44 *187:39 *52049:A 5.41385e-05
+45 *187:39 *190:23 2.31199e-06
+46 *187:39 *283:39 3.58084e-06
+47 *187:44 *193:113 2.81917e-05
+48 *187:44 *193:117 9.63918e-05
+49 *187:49 *52049:A 4.19743e-05
+50 *187:91 *193:86 0.000270682
+51 *187:91 *194:22 9.84851e-05
+52 *187:91 *194:36 0.000136969
+53 *187:91 *207:73 0
+54 *187:91 *283:31 2.50227e-05
+55 *187:104 *51902:B 8.43466e-05
+56 *187:104 *192:104 0.000187986
+57 *187:104 *194:36 0.000116135
+58 *187:104 *194:41 8.93663e-05
+59 *187:104 *283:11 1.02387e-05
+60 *51895:A *51895:B 1.14154e-05
+61 *52012:A *51895:B 7.53384e-06
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+63 *52013:A0 *187:44 0.000292865
+64 *52051:A2 *187:39 1.94812e-05
+65 *52053:B *187:57 0.00031495
+66 *52084:A2 *187:57 5.56203e-05
+67 *69:7 *187:104 0.000182826
+68 *70:7 *187:39 0.000261203
+69 *71:9 *187:44 5.26204e-05
+70 *72:6 *187:44 0.00014411
+71 *107:8 *187:44 0
+72 *108:9 *187:49 0.000633247
+73 *108:25 *187:57 0.000141236
+74 *138:6 *187:68 5.56306e-05
+75 *140:5 *187:49 0.000358425
+76 *141:9 *187:68 1.83667e-05
+77 *141:20 *187:68 0
+78 *144:8 *52120:B 0
+79 *183:88 *51895:B 3.22879e-05
+*RES
+1 *51894:X *187:8 43.3857 
+2 *187:8 *187:10 15 
+3 *187:10 *187:15 20.8829 
+4 *187:15 *187:22 20.4893 
+5 *187:22 *51895:B 24.9679 
+6 *187:22 *187:33 4.43286 
+7 *187:33 *52012:B 23 
+8 *187:33 *187:39 10.15 
+9 *187:39 *187:44 37.54 
+10 *187:44 *51902:A 23 
+11 *187:39 *187:49 12.0557 
+12 *187:49 *187:57 37.7886 
+13 *187:57 *52052:B 23 
+14 *187:57 *187:68 22.1879 
+15 *187:68 *52082:B 38 
+16 *187:68 *52120:B 44.3179 
+17 *187:49 *52083:B 23 
+18 *187:15 *187:91 21.5664 
+19 *187:91 *52011:B 23.8493 
+20 *187:91 *187:104 35.4893 
+21 *187:104 *51903:B1 23 
+22 *187:10 *51909:A1 23 
+*END
+
+*D_NET *188 0.000493893
+*CONN
+*I *51898:A I *D sky130_fd_sc_hd__xnor2_4
+*I *51895:Y O *D sky130_fd_sc_hd__nand2_2
+*CAP
+1 *51898:A 0
+2 *51895:Y 0.000188323
+3 *188:8 0.000188323
+4 *188:8 *190:8 6.07611e-06
+5 *188:8 *190:23 0
+6 *52012:A *188:8 5.70419e-05
+7 *187:22 *188:8 0
+8 *187:33 *188:8 5.41288e-05
+*RES
+1 *51895:Y *188:8 42.06 
+2 *188:8 *51898:A 38 
+*END
+
+*D_NET *189 0.0133495
+*CONN
+*I *51897:A I *D sky130_fd_sc_hd__nand2_2
+*I *51901:B I *D sky130_fd_sc_hd__and3_1
+*I *51942:B2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51908:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *51922:B2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51941:C I *D sky130_fd_sc_hd__and4_1
+*I *51990:B I *D sky130_fd_sc_hd__and2b_1
+*I *51991:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *51967:D I *D sky130_fd_sc_hd__and4_1
+*I *51968:B1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51896:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51897:A 0
+2 *51901:B 2.34823e-05
+3 *51942:B2 0.000215507
+4 *51908:B2 0
+5 *51922:B2 3.0228e-05
+6 *51941:C 0
+7 *51990:B 0
+8 *51991:B2 0.00018581
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+10 *51968:B1 3.53901e-05
+11 *51896:X 0
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+14 *189:89 0.000332033
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+19 *189:15 0.00111056
+20 *189:7 0.00108197
+21 *189:4 0.000302356
+22 *51922:B2 *281:53 5.67058e-05
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+24 *51942:B2 *192:8 4.83941e-05
+25 *51942:B2 *282:18 3.92407e-05
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+28 *51967:D *260:8 1.69733e-05
+29 *51967:D *262:53 0.000108978
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+31 *51968:B1 *263:40 5.90075e-05
+32 *51991:B2 *51967:A 2.04318e-05
+33 *51991:B2 *262:53 0
+34 *51991:B2 *280:29 0.000142098
+35 *189:15 *192:8 7.73389e-05
+36 *189:15 *203:8 5.50049e-05
+37 *189:15 *215:8 0.000260457
+38 *189:15 *281:53 9.88574e-06
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+40 *189:17 *232:47 9.0102e-05
+41 *189:17 *263:40 0.000313255
+42 *189:17 *281:53 0.000173278
+43 *189:31 *51921:C 4.6318e-06
+44 *189:31 *212:23 5.50049e-05
+45 *189:31 *234:8 2.18506e-05
+46 *189:31 *262:26 4.5051e-05
+47 *189:45 *51941:B 0.000182826
+48 *189:45 *193:21 9.58714e-05
+49 *189:45 *193:27 0
+50 *189:45 *193:38 0.000299117
+51 *189:45 *234:8 0.000148171
+52 *189:45 *234:17 5.01986e-05
+53 *189:45 *262:26 0.000195392
+54 *189:45 *262:53 8.68016e-06
+55 *189:45 *278:81 0
+56 *189:45 *281:45 7.39261e-05
+57 *189:50 *193:15 1.83667e-05
+58 *189:50 *193:21 0.000443679
+59 *189:89 *192:8 4.90994e-05
+60 *189:89 *263:30 0
+61 *189:89 *282:18 0.000164932
+62 *189:105 *51901:C 1.94812e-05
+63 *189:121 *51897:B 4.07902e-05
+64 *189:121 *51901:C 3.07056e-06
+65 *189:121 *194:8 0.000216356
+66 *189:121 *207:73 1.03955e-05
+67 *189:121 *281:96 0.000398503
+68 *51967:B *51991:B2 0.00013635
+69 *27:6 *189:31 9.7097e-05
+70 *28:15 *189:45 0.000381757
+71 *28:15 *189:50 0.000443679
+72 *51:6 *51991:B2 0
+73 *183:7 *51968:B1 2.30292e-05
+74 *183:7 *189:17 7.75317e-05
+75 *183:15 *189:45 1.01436e-05
+76 *183:45 *189:15 3.58084e-06
+77 *183:51 *189:15 8.10475e-05
+78 *183:80 *189:7 4.6595e-05
+79 *183:80 *189:15 0.000173452
+80 *183:80 *189:105 0.000116257
+81 *183:88 *189:105 9.24795e-06
+82 *183:88 *189:121 3.75698e-05
+83 *187:15 *189:121 0.000314157
+84 *187:22 *189:121 0
+*RES
+1 *51896:X *189:4 23 
+2 *189:4 *189:7 1.595 
+3 *189:7 *189:15 15.3286 
+4 *189:15 *189:17 7.76786 
+5 *189:17 *51968:B1 24.1186 
+6 *189:17 *189:31 34.06 
+7 *189:31 *189:45 41.89 
+8 *189:45 *189:50 20.9346 
+9 *189:50 *51967:D 43.0854 
+10 *189:50 *51991:B2 42.1532 
+11 *189:45 *51990:B 23 
+12 *189:31 *51941:C 23 
+13 *189:15 *51922:B2 24.1186 
+14 *189:7 *189:89 17.9621 
+15 *189:89 *51908:B2 38 
+16 *189:89 *51942:B2 42.3086 
+17 *189:4 *189:105 4.43286 
+18 *189:105 *51901:B 23.4971 
+19 *189:105 *189:121 41.2271 
+20 *189:121 *51897:A 23 
+*END
+
+*D_NET *190 0.0016334
+*CONN
+*I *52012:C I *D sky130_fd_sc_hd__and3_1
+*I *51898:B I *D sky130_fd_sc_hd__xnor2_4
+*I *51897:Y O *D sky130_fd_sc_hd__nand2_2
+*CAP
+1 *52012:C 0
+2 *51898:B 0
+3 *51897:Y 0.000162014
+4 *190:23 0.000394721
+5 *190:10 0.000394721
+6 *190:8 0.000162014
+7 *190:8 *51897:B 6.17437e-06
+8 *190:8 *281:96 5.50106e-05
+9 *190:8 *283:11 2.32101e-05
+10 *190:8 *283:31 0.000133316
+11 *190:23 *283:11 0
+12 *68:5 *190:23 0.000270682
+13 *187:22 *190:8 9.20311e-06
+14 *187:33 *190:23 1.39431e-05
+15 *187:39 *190:23 2.31199e-06
+16 *188:8 *190:8 6.07611e-06
+17 *188:8 *190:23 0
+*RES
+1 *51897:Y *190:8 40.8793 
+2 *190:8 *190:10 15 
+3 *190:10 *51898:B 23 
+4 *190:10 *190:23 38.2236 
+5 *190:23 *52012:C 23 
+*END
+
+*D_NET *191 0.0017802
+*CONN
+*I *51905:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52016:B2 I *D sky130_fd_sc_hd__a22oi_2
+*I *51898:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *51905:A 0.000126692
+2 *52016:B2 3.148e-05
+3 *51898:Y 0.000421294
+4 *191:6 0.000579466
+5 *51905:A *193:100 7.75329e-06
+6 *51905:A *197:6 0.000246757
+7 *52016:B2 *195:13 6.17437e-06
+8 *191:6 *192:104 0
+9 *191:6 *193:100 2.72158e-05
+10 *191:6 *193:113 0
+11 *191:6 *193:117 0
+12 *191:6 *195:13 0.000136486
+13 *191:6 *196:6 0
+14 *191:6 *197:6 0.000141879
+15 *191:6 *283:11 0
+16 *68:18 *191:6 0
+17 *74:5 *52016:B2 5.50049e-05
+*RES
+1 *51898:Y *191:6 45.8921 
+2 *191:6 *52016:B2 38.6214 
+3 *191:6 *51905:A 41.3143 
+*END
+
+*D_NET *192 0.0151909
+*CONN
+*I *51903:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *52011:A I *D sky130_fd_sc_hd__nand2_1
+*I *51911:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51925:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *51945:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *51944:B I *D sky130_fd_sc_hd__nand2_1
+*I *51971:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *51900:A I *D sky130_fd_sc_hd__buf_2
+*I *51970:B I *D sky130_fd_sc_hd__nand2_1
+*I *51912:A I *D sky130_fd_sc_hd__nand2_1
+*I *51899:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51903:A1 0
+2 *52011:A 0
+3 *51911:A1 0
+4 *51925:A1 0
+5 *51945:A1 0
+6 *51944:B 2.14194e-05
+7 *51971:A1 0.000250151
+8 *51900:A 0
+9 *51970:B 0.000275886
+10 *51912:A 0
+11 *51899:X 0.000451239
+12 *192:104 0.000210587
+13 *192:93 0.000476223
+14 *192:84 7.52493e-05
+15 *192:79 0.000753981
+16 *192:53 0.000295053
+17 *192:37 0.000546517
+18 *192:31 0.000412999
+19 *192:27 0.000778477
+20 *192:25 0.000984511
+21 *192:17 0.000754777
+22 *192:11 2.88603e-05
+23 *192:8 0.000463338
+24 *51944:B *237:9 0
+25 *51944:B *278:70 5.90675e-06
+26 *51970:B *51972:A2_N 5.50049e-05
+27 *51970:B *193:15 0.000251793
+28 *51970:B *262:53 0.000109692
+29 *51970:B *272:188 0.000418749
+30 *51971:A1 *278:70 0.000354203
+31 *51971:A1 *279:31 0.00042994
+32 *192:8 *51894:A 0
+33 *192:8 *199:20 1.42006e-05
+34 *192:8 *203:24 0.000119921
+35 *192:8 *263:30 0.000172375
+36 *192:11 *51907:B 5.50049e-05
+37 *192:17 *51907:B 1.14154e-05
+38 *192:25 *51907:B 7.22188e-05
+39 *192:25 *51925:S 3.46255e-05
+40 *192:25 *51943:B 9.67842e-05
+41 *192:25 *193:68 0.000142311
+42 *192:25 *205:8 1.32314e-05
+43 *192:27 *51925:S 0.000521097
+44 *192:27 *51943:B 0.00022812
+45 *192:27 *237:9 5.67058e-05
+46 *192:27 *238:8 2.30292e-05
+47 *192:27 *279:31 0.000195119
+48 *192:31 *237:9 0.000315027
+49 *192:31 *278:70 7.44161e-06
+50 *192:31 *279:31 0.000441076
+51 *192:37 *51990:A_N 9.67842e-05
+52 *192:37 *193:27 8.4047e-05
+53 *192:37 *262:53 0.000463694
+54 *192:37 *278:81 2.68708e-05
+55 *192:53 *237:9 0
+56 *192:79 *51907:B 0.000514737
+57 *192:79 *51911:B1 0.00014196
+58 *192:79 *193:86 7.43025e-06
+59 *192:79 *194:22 0.000178671
+60 *192:79 *194:36 5.50049e-05
+61 *192:79 *200:8 0.000182832
+62 *192:79 *205:8 0.000447976
+63 *192:84 *193:86 1.86869e-05
+64 *192:84 *207:73 0
+65 *192:93 *194:36 0.000237082
+66 *192:104 *51902:B 0.000140259
+67 *192:104 *193:86 0
+68 *192:104 *194:36 5.50049e-05
+69 *192:104 *194:41 6.7177e-06
+70 *192:104 *196:6 4.55577e-05
+71 *192:104 *203:69 0.000141954
+72 *192:104 *283:11 1.83564e-05
+73 *51942:B2 *192:8 4.83941e-05
+74 *51972:B1 *51970:B 3.22879e-05
+75 *51996:A1 *51971:A1 0.000141052
+76 *28:15 *51970:B 0.000112148
+77 *28:15 *192:37 0.000614968
+78 *29:8 *51970:B 8.47306e-05
+79 *51:6 *192:37 0
+80 *55:8 *51971:A1 5.50106e-05
+81 *187:104 *192:104 0.000187986
+82 *189:15 *192:8 7.73389e-05
+83 *189:89 *192:8 4.90994e-05
+84 *191:6 *192:104 0
+*RES
+1 *51899:X *192:8 47.4664 
+2 *192:8 *192:11 15.6214 
+3 *192:11 *51912:A 23 
+4 *192:11 *192:17 0.497143 
+5 *192:17 *192:25 7.47786 
+6 *192:25 *192:27 15.8671 
+7 *192:27 *192:31 5.40643 
+8 *192:31 *192:37 39.425 
+9 *192:37 *51970:B 32.2386 
+10 *192:37 *51900:A 23 
+11 *192:31 *192:53 0.497143 
+12 *192:53 *51971:A1 33.7921 
+13 *192:53 *51944:B 23.4971 
+14 *192:27 *51945:A1 23 
+15 *192:25 *51925:A1 23 
+16 *192:17 *192:79 13.485 
+17 *192:79 *192:84 30.8493 
+18 *192:84 *51911:A1 23 
+19 *192:79 *192:93 4.82643 
+20 *192:93 *52011:A 23 
+21 *192:93 *192:104 35.365 
+22 *192:104 *51903:A1 23 
+*END
+
+*D_NET *193 0.0186982
+*CONN
+*I *52013:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *52049:A I *D sky130_fd_sc_hd__nand2_1
+*I *52051:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *51904:A1 I *D sky130_fd_sc_hd__a21bo_1
+*I *52016:A1 I *D sky130_fd_sc_hd__a22oi_2
+*I *51907:A I *D sky130_fd_sc_hd__and2_1
+*I *51926:A1_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51946:A1_N I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51992:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51972:A1_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51900:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *52013:A1 0
+2 *52049:A 0.000124611
+3 *52051:A1 0
+4 *51904:A1 0
+5 *52016:A1 2.0995e-05
+6 *51907:A 1.79949e-05
+7 *51926:A1_N 8.58067e-05
+8 *51946:A1_N 0
+9 *51992:A1 0
+10 *51972:A1_N 0
+11 *51900:X 0
+12 *193:117 0.000331274
+13 *193:113 0.000554358
+14 *193:100 0.000573949
+15 *193:86 0.00124296
+16 *193:68 0.00182244
+17 *193:52 0.00144246
+18 *193:38 0.00142913
+19 *193:27 0.00033598
+20 *193:21 0.00161325
+21 *193:15 0.000241062
+22 *193:4 0.000637128
+23 *51907:A *51907:B 0
+24 *51926:A1_N *51937:A 0.000163361
+25 *51926:A1_N *203:8 1.34354e-05
+26 *51926:A1_N *212:41 1.37702e-05
+27 *51926:A1_N *216:8 1.01436e-05
+28 *51926:A1_N *217:8 0.000111852
+29 *51926:A1_N *263:30 1.4649e-05
+30 *52016:A1 *195:13 1.14154e-05
+31 *52049:A *283:39 7.06229e-05
+32 *193:15 *51971:S 0
+33 *193:27 *263:42 5.50049e-05
+34 *193:27 *278:81 8.92738e-05
+35 *193:27 *280:35 8.62876e-05
+36 *193:38 *51969:A 3.34247e-05
+37 *193:38 *212:12 0.000123944
+38 *193:38 *212:29 3.22879e-05
+39 *193:38 *238:8 0
+40 *193:38 *279:31 2.29192e-05
+41 *193:38 *280:35 1.07659e-05
+42 *193:38 *281:206 2.5415e-05
+43 *193:38 *281:216 8.83341e-05
+44 *193:52 *51937:A 0.000328022
+45 *193:52 *207:7 0.00030974
+46 *193:52 *207:55 0.000235019
+47 *193:52 *217:8 8.62876e-05
+48 *193:52 *219:6 7.55595e-05
+49 *193:52 *236:11 0.000190835
+50 *193:68 *51907:B 0.000360168
+51 *193:68 *51925:S 0.000136743
+52 *193:86 *51907:B 5.70419e-05
+53 *193:86 *51911:B1 0
+54 *193:86 *194:22 0.000209405
+55 *193:86 *194:41 0
+56 *193:86 *195:13 2.30292e-05
+57 *193:86 *203:65 0.000227208
+58 *193:86 *204:6 0
+59 *193:100 *51902:B 5.67058e-05
+60 *193:100 *52016:B1 0.000138718
+61 *193:100 *195:13 0.000128474
+62 *193:100 *196:6 8.94394e-05
+63 *193:100 *203:69 2.93845e-05
+64 *193:113 *51902:B 0.000386967
+65 *193:113 *195:5 0.00031495
+66 *193:113 *203:69 4.6595e-05
+67 *51905:A *193:100 7.75329e-06
+68 *51967:D *193:15 7.47155e-05
+69 *51969:B *193:38 1.39317e-05
+70 *51970:B *193:15 0.000251793
+71 *52013:A0 *193:113 0.000259401
+72 *52051:B1 *52049:A 0.000228903
+73 *28:15 *193:15 0.000233617
+74 *28:15 *193:21 1.56665e-05
+75 *28:15 *193:38 2.02872e-05
+76 *49:6 *193:27 0.000289695
+77 *50:8 *193:27 0
+78 *51:6 *193:15 0
+79 *68:18 *193:113 0.000138727
+80 *70:12 *193:117 0.000111148
+81 *107:8 *193:117 0
+82 *108:9 *52049:A 0.000228001
+83 *183:15 *193:27 0
+84 *187:8 *193:68 0.000274078
+85 *187:8 *193:86 4.17736e-05
+86 *187:39 *52049:A 5.41385e-05
+87 *187:44 *193:113 2.81917e-05
+88 *187:44 *193:117 9.63918e-05
+89 *187:49 *52049:A 4.19743e-05
+90 *187:91 *193:86 0.000270682
+91 *189:45 *193:21 9.58714e-05
+92 *189:45 *193:27 0
+93 *189:45 *193:38 0.000299117
+94 *189:50 *193:15 1.83667e-05
+95 *189:50 *193:21 0.000443679
+96 *191:6 *193:100 2.72158e-05
+97 *191:6 *193:113 0
+98 *191:6 *193:117 0
+99 *192:25 *193:68 0.000142311
+100 *192:37 *193:27 8.4047e-05
+101 *192:79 *193:86 7.43025e-06
+102 *192:84 *193:86 1.86869e-05
+103 *192:104 *193:86 0
+*RES
+1 *51900:X *193:4 23 
+2 *193:4 *193:15 35.7637 
+3 *193:15 *51972:A1_N 23 
+4 *193:4 *193:21 6.33857 
+5 *193:21 *193:27 37.4571 
+6 *193:27 *51992:A1 23 
+7 *193:21 *193:38 44.3964 
+8 *193:38 *51946:A1_N 23 
+9 *193:38 *193:52 29.4793 
+10 *193:52 *51926:A1_N 40.4184 
+11 *193:52 *193:68 29.1271 
+12 *193:68 *51907:A 23.4971 
+13 *193:68 *193:86 47.3379 
+14 *193:86 *52016:A1 23.4971 
+15 *193:86 *193:100 35.9864 
+16 *193:100 *51904:A1 23 
+17 *193:100 *193:113 25.2743 
+18 *193:113 *193:117 18.6664 
+19 *193:117 *52051:A1 23 
+20 *193:117 *52049:A 28.4271 
+21 *193:113 *52013:A1 38 
+*END
+
+*D_NET *194 0.00560146
+*CONN
+*I *51902:B I *D sky130_fd_sc_hd__and2_1
+*I *51903:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *51911:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51909:A2 I *D sky130_fd_sc_hd__a21bo_1
+*I *51901:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *51902:B 0.000237558
+2 *51903:B2 0
+3 *51911:A2 0
+4 *51909:A2 2.95294e-05
+5 *51901:X 0.000267211
+6 *194:41 0.000160722
+7 *194:36 0.000524589
+8 *194:22 0.00039624
+9 *194:8 0.000566671
+10 *51902:B *203:69 7.3685e-05
+11 *194:8 *51901:C 4.08537e-05
+12 *194:8 *281:96 0.000108672
+13 *194:22 *51911:B1 0.000143655
+14 *194:22 *202:6 0.000138718
+15 *194:22 *207:73 0
+16 *194:41 *283:31 0
+17 *52011:B *51902:B 0
+18 *52011:B *194:22 0
+19 *52011:B *194:36 5.0554e-05
+20 *69:7 *51902:B 0.000669959
+21 *187:8 *194:8 6.07611e-06
+22 *187:8 *194:22 6.42902e-05
+23 *187:15 *51909:A2 5.50049e-05
+24 *187:22 *194:8 0
+25 *187:91 *194:22 9.84851e-05
+26 *187:91 *194:36 0.000136969
+27 *187:104 *51902:B 8.43466e-05
+28 *187:104 *194:36 0.000116135
+29 *187:104 *194:41 8.93663e-05
+30 *189:121 *194:8 0.000216356
+31 *192:79 *194:22 0.000178671
+32 *192:79 *194:36 5.50049e-05
+33 *192:93 *194:36 0.000237082
+34 *192:104 *51902:B 0.000140259
+35 *192:104 *194:36 5.50049e-05
+36 *192:104 *194:41 6.7177e-06
+37 *193:86 *194:22 0.000209405
+38 *193:86 *194:41 0
+39 *193:100 *51902:B 5.67058e-05
+40 *193:113 *51902:B 0.000386967
+*RES
+1 *51901:X *194:8 43.6964 
+2 *194:8 *51909:A2 38.6214 
+3 *194:8 *194:22 23.4929 
+4 *194:22 *51911:A2 23 
+5 *194:22 *194:36 6.06929 
+6 *194:36 *194:41 32.9621 
+7 *194:41 *51903:B2 23 
+8 *194:36 *51902:B 33.2121 
+*END
+
+*D_NET *195 0.0017783
+*CONN
+*I *51904:A2 I *D sky130_fd_sc_hd__a21bo_1
+*I *52016:A2 I *D sky130_fd_sc_hd__a22oi_2
+*I *51902:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51904:A2 0
+2 *52016:A2 0
+3 *51902:X 5.45484e-05
+4 *195:13 0.000359835
+5 *195:5 0.000414384
+6 *195:5 *203:69 0.000313249
+7 *52016:A1 *195:13 1.14154e-05
+8 *52016:B2 *195:13 6.17437e-06
+9 *74:5 *195:13 1.57571e-05
+10 *191:6 *195:13 0.000136486
+11 *193:86 *195:13 2.30292e-05
+12 *193:100 *195:13 0.000128474
+13 *193:113 *195:5 0.00031495
+*RES
+1 *51902:X *195:5 26.48 
+2 *195:5 *195:13 36.235 
+3 *195:13 *52016:A2 23 
+4 *195:5 *51904:A2 23 
+*END
+
+*D_NET *196 0.000977827
+*CONN
+*I *52016:B1 I *D sky130_fd_sc_hd__a22oi_2
+*I *51904:B1_N I *D sky130_fd_sc_hd__a21bo_1
+*I *51903:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *52016:B1 8.12728e-05
+2 *51904:B1_N 6.94194e-05
+3 *51903:X 0.000152124
+4 *196:6 0.000302816
+5 *51904:B1_N *203:69 9.84794e-05
+6 *52016:B1 *203:65 0
+7 *196:6 *203:65 0
+8 *191:6 *196:6 0
+9 *192:104 *196:6 4.55577e-05
+10 *193:100 *52016:B1 0.000138718
+11 *193:100 *196:6 8.94394e-05
+*RES
+1 *51903:X *196:6 40.9621 
+2 *196:6 *51904:B1_N 39.0979 
+3 *196:6 *52016:B1 39.9057 
+*END
+
+*D_NET *197 0.000799097
+*CONN
+*I *51905:B I *D sky130_fd_sc_hd__xnor2_4
+*I *51904:X O *D sky130_fd_sc_hd__a21bo_1
+*CAP
+1 *51905:B 0
+2 *51904:X 0.000205231
+3 *197:6 0.000205231
+4 *197:6 *198:6 0
+5 *51905:A *197:6 0.000246757
+6 *52018:A *197:6 0
+7 *191:6 *197:6 0.000141879
+*RES
+1 *51904:X *197:6 43.075 
+2 *197:6 *51905:B 38 
+*END
+
+*D_NET *198 0.000716064
+*CONN
+*I *51918:A I *D sky130_fd_sc_hd__xor2_4
+*I *52022:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51905:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *51918:A 0.000205498
+2 *52022:A1 0
+3 *51905:Y 0.000152534
+4 *198:6 0.000358032
+5 *51918:A *210:8 0
+6 *197:6 *198:6 0
+*RES
+1 *51905:Y *198:6 40.9621 
+2 *198:6 *52022:A1 38 
+3 *198:6 *51918:A 41.3143 
+*END
+
+*D_NET *199 0.0040228
+*CONN
+*I *51907:B I *D sky130_fd_sc_hd__and2_1
+*I *51912:B I *D sky130_fd_sc_hd__nand2_1
+*I *51923:A I *D sky130_fd_sc_hd__or2_1
+*I *51906:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51907:B 0.000216439
+2 *51912:B 0
+3 *51923:A 0
+4 *51906:X 0.000151757
+5 *199:20 0.000539944
+6 *199:10 0.000323505
+7 *199:8 0.000151757
+8 *199:8 *203:8 0
+9 *199:8 *215:8 1.62015e-05
+10 *199:8 *281:67 0.000313931
+11 *199:8 *284:28 0.000231303
+12 *199:20 *203:24 0.000244526
+13 *199:20 *212:54 0.000219177
+14 *199:20 *216:8 0.000100069
+15 *199:20 *263:30 0.000108681
+16 *199:20 *284:28 0.000123753
+17 *51907:A *51907:B 0
+18 *51942:A1 *199:20 0.000109352
+19 *183:54 *199:20 3.43144e-05
+20 *183:59 *199:20 5.3304e-05
+21 *192:8 *199:20 1.42006e-05
+22 *192:11 *51907:B 5.50049e-05
+23 *192:17 *51907:B 1.14154e-05
+24 *192:25 *51907:B 7.22188e-05
+25 *192:79 *51907:B 0.000514737
+26 *193:68 *51907:B 0.000360168
+27 *193:86 *51907:B 5.70419e-05
+*RES
+1 *51906:X *199:8 42.6814 
+2 *199:8 *199:10 15 
+3 *199:10 *51923:A 23 
+4 *199:10 *199:20 37.9543 
+5 *199:20 *51912:B 23 
+6 *199:20 *51907:B 32.5286 
+*END
+
+*D_NET *200 0.00322997
+*CONN
+*I *51915:A1 I *D sky130_fd_sc_hd__o211a_1
+*I *51916:B1 I *D sky130_fd_sc_hd__a211o_1
+*I *51907:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51915:A1 0.000266602
+2 *51916:B1 0
+3 *51907:X 0.000321333
+4 *200:17 0.000205655
+5 *200:10 0.000472257
+6 *200:8 0.000321333
+7 *51915:A1 *51915:A2 3.05601e-05
+8 *51915:A1 *51915:B1 0.000169637
+9 *51915:A1 *264:9 2.67281e-05
+10 *200:8 *51911:B1 0.000138727
+11 *200:8 *51916:A1 3.47781e-05
+12 *200:8 *51916:A2 7.64636e-05
+13 *200:8 *203:42 0.000203764
+14 *200:8 *207:73 0.000188926
+15 *200:8 *207:172 0.000212377
+16 *200:17 *51915:B1 5.3304e-05
+17 *200:17 *203:39 1.03836e-05
+18 *200:17 *206:25 0.000114083
+19 *200:17 *220:9 5.50049e-05
+20 *200:17 *220:14 0.000139647
+21 *200:17 *224:22 5.5683e-06
+22 *192:79 *200:8 0.000182832
+*RES
+1 *51907:X *200:8 45.83 
+2 *200:8 *200:10 15 
+3 *200:10 *200:17 33.6975 
+4 *200:17 *51916:B1 23 
+5 *200:10 *51915:A1 27.8471 
+*END
+
+*D_NET *201 0.00015277
+*CONN
+*I *51909:B1_N I *D sky130_fd_sc_hd__a21bo_1
+*I *51908:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *51909:B1_N 0
+2 *51908:X 7.63852e-05
+3 *201:6 7.63852e-05
+4 *201:6 *51894:A 0
+5 *201:6 *281:96 0
+*RES
+1 *51908:X *201:6 39.2014 
+2 *201:6 *51909:B1_N 38 
+*END
+
+*D_NET *202 0.00124326
+*CONN
+*I *51913:A_N I *D sky130_fd_sc_hd__and3b_1
+*I *51928:B1_N I *D sky130_fd_sc_hd__a21bo_1
+*I *51909:X O *D sky130_fd_sc_hd__a21bo_1
+*CAP
+1 *51913:A_N 1.74373e-05
+2 *51928:B1_N 2.53514e-05
+3 *51909:X 0.000223674
+4 *202:8 4.27887e-05
+5 *202:6 0.000223674
+6 *51913:A_N *51913:C 8.60475e-05
+7 *51913:A_N *51928:A2 9.84851e-05
+8 *51928:B1_N *51913:C 0.000141954
+9 *51928:B1_N *51928:A2 0.000141954
+10 *202:6 *205:8 0
+11 *202:6 *207:73 0.000103176
+12 *194:22 *202:6 0.000138718
+*RES
+1 *51909:X *202:6 42.7229 
+2 *202:6 *202:8 15 
+3 *202:8 *51928:B1_N 24.5743 
+4 *202:8 *51913:A_N 24.0979 
+*END
+
+*D_NET *203 0.0302893
+*CONN
+*I *51915:C1 I *D sky130_fd_sc_hd__o211a_1
+*I *51916:A2 I *D sky130_fd_sc_hd__a211o_1
+*I *369:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *372:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52096:B I *D sky130_fd_sc_hd__nand2_1
+*I *52113:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *374:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52114:B I *D sky130_fd_sc_hd__and3_1
+*I *376:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52111:B I *D sky130_fd_sc_hd__and3_1
+*I *52061:A I *D sky130_fd_sc_hd__nand2_1
+*I *349:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52021:B I *D sky130_fd_sc_hd__nand2_1
+*I *358:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *294:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *297:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51911:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *299:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *315:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51942:B1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51910:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51915:C1 3.57202e-05
+2 *51916:A2 0.000190088
+3 *369:DIODE 0.000419211
+4 *372:DIODE 0
+5 *52096:B 0
+6 *52113:A2 6.76104e-05
+7 *374:DIODE 0.000236462
+8 *52114:B 0
+9 *376:DIODE 0
+10 *52111:B 0
+11 *52061:A 1.74373e-05
+12 *349:DIODE 0
+13 *52021:B 0.000425078
+14 *358:DIODE 0.000244478
+15 *294:DIODE 0
+16 *297:DIODE 0
+17 *51911:B1 0.000114648
+18 *299:DIODE 0
+19 *315:DIODE 0.00106749
+20 *51942:B1 0
+21 *51910:X 0.000406911
+22 *203:182 0.000542095
+23 *203:156 0.000598219
+24 *203:147 0.000361524
+25 *203:142 0.000165965
+26 *203:137 0.000731132
+27 *203:131 0.000662766
+28 *203:125 0.00033989
+29 *203:120 0.000588025
+30 *203:108 0.000232872
+31 *203:94 0.00110861
+32 *203:87 0.000468099
+33 *203:85 0.000505144
+34 *203:76 0.000757685
+35 *203:69 0.00184091
+36 *203:65 0.00183046
+37 *203:54 0.000495408
+38 *203:42 0.000474373
+39 *203:41 0.000342247
+40 *203:39 0.000385937
+41 *203:31 0.000424493
+42 *203:24 0.00154342
+43 *203:13 0.00069321
+44 *203:8 0.000698463
+45 *315:DIODE *295:DIODE 5.72217e-05
+46 *315:DIODE *51920:B 5.40241e-05
+47 *315:DIODE *51927:B 5.50049e-05
+48 *315:DIODE *213:7 0.00010667
+49 *315:DIODE *220:9 3.6348e-05
+50 *315:DIODE *264:40 0.000443673
+51 *315:DIODE *264:48 8.90115e-05
+52 *315:DIODE *281:216 0.000574096
+53 *358:DIODE *266:58 5.38249e-05
+54 *369:DIODE *268:43 0.000663653
+55 *374:DIODE *268:21 6.7177e-06
+56 *374:DIODE *277:5 0.00014196
+57 *51911:B1 *204:6 0.000138718
+58 *51911:B1 *207:73 2.49733e-05
+59 *51915:C1 *51915:A2 1.05096e-05
+60 *51915:C1 *51915:B1 3.52069e-05
+61 *51915:C1 *206:9 2.32101e-05
+62 *51916:A2 *51916:A1 6.57448e-05
+63 *51916:A2 *208:6 0
+64 *51916:A2 *224:22 2.0045e-05
+65 *52061:A *265:13 9.84851e-05
+66 *52113:A2 *268:21 2.39911e-05
+67 *203:8 *215:8 0.000146072
+68 *203:8 *217:8 4.6318e-06
+69 *203:8 *235:8 3.47781e-05
+70 *203:8 *262:14 0
+71 *203:13 *212:41 2.81138e-05
+72 *203:13 *235:8 0.000361186
+73 *203:13 *263:30 5.61255e-06
+74 *203:24 *212:54 0.000166986
+75 *203:24 *221:6 0
+76 *203:24 *263:30 2.64616e-05
+77 *203:31 *220:9 3.6485e-05
+78 *203:39 *51915:B1 4.67488e-05
+79 *203:39 *51929:A 0.000128391
+80 *203:39 *51929:B_N 0.000272383
+81 *203:39 *206:9 0.000116554
+82 *203:39 *220:9 0.00023789
+83 *203:42 *204:6 3.47781e-05
+84 *203:42 *206:6 2.54046e-05
+85 *203:54 *51913:C 5.3304e-05
+86 *203:54 *51928:A2 5.3304e-05
+87 *203:69 *52055:A 0.000230604
+88 *203:69 *225:108 0.000482844
+89 *203:69 *225:164 0.00014196
+90 *203:69 *281:126 4.95081e-05
+91 *203:69 *281:134 0.00010655
+92 *203:85 *266:58 0
+93 *203:94 *265:13 0.000140259
+94 *203:108 *267:62 1.39317e-05
+95 *203:125 *267:62 0.000596956
+96 *203:131 *267:50 0.00031495
+97 *203:131 *267:62 3.58447e-05
+98 *203:137 *267:46 9.88574e-06
+99 *203:137 *267:50 3.53115e-05
+100 *203:137 *268:28 3.7122e-06
+101 *203:137 *268:38 1.95443e-05
+102 *203:147 *268:28 3.71369e-05
+103 *203:156 *268:21 1.00765e-05
+104 *203:156 *268:28 3.53115e-05
+105 *51902:B *203:69 7.3685e-05
+106 *51904:B1_N *203:69 9.84794e-05
+107 *51926:A1_N *203:8 1.34354e-05
+108 *51942:A1 *203:8 0
+109 *52016:B1 *203:65 0
+110 *52019:A *203:69 0.000177909
+111 *52064:A *203:120 0
+112 *52064:A *203:125 3.53115e-05
+113 *52064:B *203:108 0
+114 *52064:B *203:125 4.79641e-05
+115 *52065:A *52021:B 3.53115e-05
+116 *52065:A *203:94 5.24457e-05
+117 *52065:B *52021:B 2.93747e-05
+118 *52065:B *203:94 0.000100733
+119 *52066:A *203:120 7.48331e-05
+120 *52066:A *203:125 5.3304e-05
+121 *52090:A1 *203:76 0
+122 *52093:A *203:76 0
+123 *52095:B1_N *203:120 0.000171906
+124 *52115:A *203:156 8.52481e-05
+125 *69:7 *203:69 9.88574e-06
+126 *77:8 *203:69 0.000269775
+127 *112:6 *203:69 0
+128 *112:6 *203:76 0
+129 *113:11 *203:76 0
+130 *115:20 *203:76 4.83778e-05
+131 *115:20 *203:85 1.7992e-05
+132 *117:6 *203:85 0
+133 *117:6 *203:94 0.000138718
+134 *117:6 *203:120 0
+135 *118:7 *52061:A 8.60475e-05
+136 *118:7 *203:94 0.000141954
+137 *119:15 *203:94 2.93845e-05
+138 *120:6 *203:108 0
+139 *122:8 *203:120 0
+140 *144:8 *203:69 0
+141 *144:8 *203:76 0
+142 *152:8 *203:131 0.000185428
+143 *157:12 *203:182 1.01436e-05
+144 *166:8 *203:131 4.79641e-05
+145 *167:11 *203:137 8.85299e-06
+146 *168:11 *374:DIODE 2.42772e-05
+147 *168:11 *203:156 6.28308e-05
+148 *169:9 *203:156 9.90162e-05
+149 *170:8 *374:DIODE 8.4047e-05
+150 *180:10 *203:142 0.000299178
+151 *189:15 *203:8 5.50049e-05
+152 *192:8 *203:24 0.000119921
+153 *192:79 *51911:B1 0.00014196
+154 *192:104 *203:69 0.000141954
+155 *193:86 *51911:B1 0
+156 *193:86 *203:65 0.000227208
+157 *193:100 *203:69 2.93845e-05
+158 *193:113 *203:69 4.6595e-05
+159 *194:22 *51911:B1 0.000143655
+160 *195:5 *203:69 0.000313249
+161 *196:6 *203:65 0
+162 *199:8 *203:8 0
+163 *199:20 *203:24 0.000244526
+164 *200:8 *51911:B1 0.000138727
+165 *200:8 *51916:A2 7.64636e-05
+166 *200:8 *203:42 0.000203764
+167 *200:17 *203:39 1.03836e-05
+*RES
+1 *51910:X *203:8 44.4007 
+2 *203:8 *203:13 20.7586 
+3 *203:13 *51942:B1 23 
+4 *203:13 *203:24 38.8657 
+5 *203:24 *315:DIODE 46.9664 
+6 *203:24 *203:31 1.57429 
+7 *203:31 *299:DIODE 23 
+8 *203:31 *203:39 10.1707 
+9 *203:39 *203:41 15 
+10 *203:41 *203:42 2.96214 
+11 *203:42 *51911:B1 42.1843 
+12 *203:42 *203:54 18.9564 
+13 *203:54 *297:DIODE 23 
+14 *203:54 *203:65 35.2614 
+15 *203:65 *203:69 47.19 
+16 *203:69 *294:DIODE 38 
+17 *203:69 *203:76 5.77929 
+18 *203:76 *358:DIODE 41.48 
+19 *203:76 *203:85 4.01857 
+20 *203:85 *203:87 15 
+21 *203:87 *203:94 38.3893 
+22 *203:94 *52021:B 29.235 
+23 *203:94 *203:108 33.5836 
+24 *203:108 *349:DIODE 23 
+25 *203:87 *52061:A 24.0979 
+26 *203:85 *203:120 6.13143 
+27 *203:120 *203:125 21.8357 
+28 *203:125 *203:131 5.77929 
+29 *203:131 *52111:B 23 
+30 *203:131 *203:137 6.33857 
+31 *203:137 *203:142 34.0186 
+32 *203:142 *376:DIODE 23 
+33 *203:137 *203:147 1.09786 
+34 *203:147 *52114:B 23 
+35 *203:147 *203:156 20.1061 
+36 *203:156 *374:DIODE 42.0082 
+37 *203:156 *52113:A2 39.2946 
+38 *203:125 *52096:B 23 
+39 *203:120 *203:182 16.5536 
+40 *203:182 *372:DIODE 23 
+41 *203:182 *369:DIODE 30.2914 
+42 *203:41 *51916:A2 41.5991 
+43 *203:39 *51915:C1 24.1186 
+*END
+
+*D_NET *204 0.00181743
+*CONN
+*I *51913:B I *D sky130_fd_sc_hd__and3b_1
+*I *51928:A2 I *D sky130_fd_sc_hd__a21bo_1
+*I *51911:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *51913:B 4.01155e-05
+2 *51928:A2 0.000194158
+3 *51911:X 0.000119773
+4 *204:8 0.000234273
+5 *204:6 0.000119773
+6 *51928:A2 *51913:C 0.000152354
+7 *51928:A2 *207:69 0.00048975
+8 *51911:B1 *204:6 0.000138718
+9 *51913:A_N *51928:A2 9.84851e-05
+10 *51928:B1_N *51928:A2 0.000141954
+11 *193:86 *204:6 0
+12 *203:42 *204:6 3.47781e-05
+13 *203:54 *51928:A2 5.3304e-05
+*RES
+1 *51911:X *204:6 40.2579 
+2 *204:6 *204:8 15 
+3 *204:8 *51928:A2 29.815 
+4 *204:8 *51913:B 23.8493 
+*END
+
+*D_NET *205 0.00247134
+*CONN
+*I *51928:A1 I *D sky130_fd_sc_hd__a21bo_1
+*I *51913:C I *D sky130_fd_sc_hd__and3b_1
+*I *51912:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51928:A1 0
+2 *51913:C 0.000355238
+3 *51912:Y 0.000432998
+4 *205:10 0.000355238
+5 *205:8 0.000432998
+6 *51913:A_N *51913:C 8.60475e-05
+7 *51928:A2 *51913:C 0.000152354
+8 *51928:B1_N *51913:C 0.000141954
+9 *192:25 *205:8 1.32314e-05
+10 *192:79 *205:8 0.000447976
+11 *202:6 *205:8 0
+12 *203:54 *51913:C 5.3304e-05
+*RES
+1 *51912:Y *205:8 44.815 
+2 *205:8 *205:10 15 
+3 *205:10 *51913:C 29.8357 
+4 *205:10 *51928:A1 23 
+*END
+
+*D_NET *206 0.0021287
+*CONN
+*I *51915:A2 I *D sky130_fd_sc_hd__o211a_1
+*I *51916:C1 I *D sky130_fd_sc_hd__a211o_1
+*I *51929:A I *D sky130_fd_sc_hd__or2b_1
+*I *51913:X O *D sky130_fd_sc_hd__and3b_1
+*CAP
+1 *51915:A2 7.72739e-05
+2 *51916:C1 0
+3 *51929:A 0.000154917
+4 *51913:X 7.3293e-05
+5 *206:25 0.00021294
+6 *206:9 0.000650493
+7 *206:8 0.00035991
+8 *206:6 7.3293e-05
+9 *51915:A2 *51915:B1 1.03294e-05
+10 *206:9 *51915:B1 2.07242e-05
+11 *206:25 *207:172 2.7908e-05
+12 *206:25 *220:14 1.22906e-05
+13 *206:25 *221:6 0
+14 *206:25 *222:8 0
+15 *206:25 *224:22 6.61436e-06
+16 *51915:A1 *51915:A2 3.05601e-05
+17 *51915:C1 *51915:A2 1.05096e-05
+18 *51915:C1 *206:9 2.32101e-05
+19 *200:17 *206:25 0.000114083
+20 *203:39 *51929:A 0.000128391
+21 *203:39 *206:9 0.000116554
+22 *203:42 *206:6 2.54046e-05
+*RES
+1 *51913:X *206:6 39.2014 
+2 *206:6 *206:8 15 
+3 *206:8 *206:9 3.95643 
+4 *206:9 *51929:A 25.5271 
+5 *206:9 *206:25 34.0911 
+6 *206:25 *51916:C1 23 
+7 *206:8 *51915:A2 25.1284 
+*END
+
+*D_NET *207 0.025298
+*CONN
+*I *51916:A1 I *D sky130_fd_sc_hd__a211o_1
+*I *51915:B1 I *D sky130_fd_sc_hd__o211a_1
+*I *346:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52087:A I *D sky130_fd_sc_hd__nand3_1
+*I *363:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *365:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52052:A I *D sky130_fd_sc_hd__nand2_1
+*I *355:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *364:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52086:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *52083:A I *D sky130_fd_sc_hd__and3_1
+*I *52015:A I *D sky130_fd_sc_hd__nand2_1
+*I *296:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *298:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51993:A I *D sky130_fd_sc_hd__nand2_1
+*I *51995:A I *D sky130_fd_sc_hd__nor2_1
+*I *338:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51966:A I *D sky130_fd_sc_hd__nand2_1
+*I *324:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *339:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51914:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51916:A1 6.40512e-05
+2 *51915:B1 9.63599e-05
+3 *346:DIODE 0
+4 *52087:A 0.000460313
+5 *363:DIODE 0
+6 *365:DIODE 0.000436105
+7 *52052:A 9.40443e-05
+8 *355:DIODE 6.93947e-05
+9 *364:DIODE 0.000189847
+10 *52086:A1 0
+11 *52083:A 8.1395e-05
+12 *52015:A 0
+13 *296:DIODE 0
+14 *298:DIODE 0
+15 *51993:A 0
+16 *51995:A 0
+17 *338:DIODE 0
+18 *51966:A 0
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+20 *339:DIODE 0.00025065
+21 *51914:X 0
+22 *207:172 0.000290507
+23 *207:152 0.000557624
+24 *207:113 0.000922011
+25 *207:102 0.000907489
+26 *207:98 0.000347461
+27 *207:92 0.000437927
+28 *207:91 0.000595852
+29 *207:89 0.000550144
+30 *207:77 0.000580486
+31 *207:73 0.00141747
+32 *207:69 0.00185867
+33 *207:61 0.000638526
+34 *207:55 0.00079189
+35 *207:32 0.000304391
+36 *207:21 0.000396273
+37 *207:19 0.000443955
+38 *207:13 0.000600849
+39 *207:7 0.000872266
+40 *207:4 0.00127683
+41 *324:DIODE *272:74 0.000533224
+42 *339:DIODE *278:47 7.05156e-05
+43 *339:DIODE *278:56 8.38096e-05
+44 *365:DIODE *225:114 0.000114083
+45 *365:DIODE *281:115 0
+46 *365:DIODE *281:126 0.000487147
+47 *365:DIODE *281:134 0.000215671
+48 *51916:A1 *220:14 0.00015637
+49 *52083:A *283:56 7.59794e-05
+50 *52087:A *52087:B 5.67058e-05
+51 *52087:A *225:114 6.64697e-05
+52 *52087:A *225:118 0.000274078
+53 *52087:A *225:128 0.000251716
+54 *207:7 *51946:B2 9.84851e-05
+55 *207:7 *51965:A 2.4754e-05
+56 *207:7 *51965:B 0.000228903
+57 *207:7 *236:11 8.10066e-05
+58 *207:7 *258:5 0.000317553
+59 *207:13 *258:5 4.14597e-05
+60 *207:19 *258:5 0.000158828
+61 *207:19 *278:56 0.000100582
+62 *207:21 *278:56 1.32939e-05
+63 *207:32 *261:16 9.74235e-05
+64 *207:55 *51937:A 4.9662e-05
+65 *207:73 *51897:B 9.58714e-05
+66 *207:73 *281:104 0.000272823
+67 *207:73 *283:11 0.000567191
+68 *207:77 *281:104 0.000274078
+69 *207:89 *52015:B 5.90675e-06
+70 *207:89 *281:104 3.53115e-05
+71 *207:89 *281:115 7.49872e-05
+72 *207:102 *283:46 1.97329e-05
+73 *207:113 *283:56 0.00027474
+74 *207:152 *225:114 3.41422e-05
+75 *207:152 *225:118 0
+76 *207:172 *220:14 1.01436e-05
+77 *51911:B1 *207:73 2.49733e-05
+78 *51915:A1 *51915:B1 0.000169637
+79 *51915:A2 *51915:B1 1.03294e-05
+80 *51915:C1 *51915:B1 3.52069e-05
+81 *51916:A2 *51916:A1 6.57448e-05
+82 *51928:A2 *207:69 0.00048975
+83 *51995:B *207:13 0.000270682
+84 *52053:B *52052:A 0.000228909
+85 *52054:B *207:92 0
+86 *52083:C *207:113 0
+87 *52084:A2 *207:92 0
+88 *52:8 *207:13 0.000226306
+89 *53:8 *207:13 1.24376e-05
+90 *53:8 *207:19 0.000193575
+91 *54:8 *207:13 9.58714e-05
+92 *71:9 *207:73 0.000221992
+93 *106:17 *207:89 0.000153155
+94 *108:25 *207:98 3.61069e-05
+95 *108:25 *207:102 0
+96 *111:6 *365:DIODE 4.48568e-05
+97 *140:5 *355:DIODE 9.84851e-05
+98 *142:19 *364:DIODE 1.54424e-05
+99 *174:8 *364:DIODE 0.00010018
+100 *174:8 *207:113 0.000447976
+101 *187:15 *207:73 0.000128391
+102 *187:91 *207:73 0
+103 *189:121 *207:73 1.03955e-05
+104 *192:84 *207:73 0
+105 *193:52 *207:7 0.00030974
+106 *193:52 *207:55 0.000235019
+107 *194:22 *207:73 0
+108 *200:8 *51916:A1 3.47781e-05
+109 *200:8 *207:73 0.000188926
+110 *200:8 *207:172 0.000212377
+111 *200:17 *51915:B1 5.3304e-05
+112 *202:6 *207:73 0.000103176
+113 *203:39 *51915:B1 4.67488e-05
+114 *206:9 *51915:B1 2.07242e-05
+115 *206:25 *207:172 2.7908e-05
+*RES
+1 *51914:X *207:4 23 
+2 *207:4 *207:7 15.7636 
+3 *207:7 *207:13 5.90357 
+4 *207:13 *207:19 10.1914 
+5 *207:19 *207:21 0.621429 
+6 *207:21 *339:DIODE 28.3857 
+7 *207:21 *207:32 32.61 
+8 *207:32 *324:DIODE 28.8621 
+9 *207:32 *51966:A 23 
+10 *207:19 *338:DIODE 23 
+11 *207:13 *51995:A 23 
+12 *207:7 *51993:A 23 
+13 *207:4 *207:55 11.1029 
+14 *207:55 *298:DIODE 23 
+15 *207:55 *207:61 3.00357 
+16 *207:61 *296:DIODE 23 
+17 *207:61 *207:69 24.1971 
+18 *207:69 *207:73 41.4107 
+19 *207:73 *207:77 3.85286 
+20 *207:77 *52015:A 23 
+21 *207:77 *207:89 9.61143 
+22 *207:89 *207:91 15 
+23 *207:91 *207:92 2.61 
+24 *207:92 *207:98 3.02429 
+25 *207:98 *207:102 16.5536 
+26 *207:102 *52083:A 24.5743 
+27 *207:102 *207:113 12.6979 
+28 *207:113 *52086:A1 23 
+29 *207:113 *364:DIODE 26.0036 
+30 *207:98 *355:DIODE 39.0979 
+31 *207:92 *52052:A 40.5271 
+32 *207:91 *365:DIODE 48.3779 
+33 *207:89 *207:152 2.21643 
+34 *207:152 *363:DIODE 23 
+35 *207:152 *52087:A 34.2686 
+36 *207:73 *346:DIODE 23 
+37 *207:69 *207:172 2.96214 
+38 *207:172 *51915:B1 40.9 
+39 *207:172 *51916:A1 40.2579 
+*END
+
+*D_NET *208 0.00236347
+*CONN
+*I *52022:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51917:A I *D sky130_fd_sc_hd__or2b_1
+*I *51915:X O *D sky130_fd_sc_hd__o211a_1
+*CAP
+1 *52022:B1 0.000194134
+2 *51917:A 4.01155e-05
+3 *51915:X 0.000139907
+4 *208:9 0.000361353
+5 *208:6 0.00026701
+6 *52022:B1 *52022:A2 0.000608643
+7 *52022:B1 *210:8 0.00012377
+8 *52022:B1 *266:64 0.000286222
+9 *208:9 *52022:A2 0.000143655
+10 *208:9 *209:5 0.000185434
+11 *51916:A2 *208:6 0
+12 *80:5 *52022:B1 1.32314e-05
+*RES
+1 *51915:X *208:6 40.2579 
+2 *208:6 *208:9 18.48 
+3 *208:9 *51917:A 23.8493 
+4 *208:9 *52022:B1 31.7414 
+*END
+
+*D_NET *209 0.00201618
+*CONN
+*I *52022:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *51917:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *51916:X O *D sky130_fd_sc_hd__a211o_1
+*CAP
+1 *52022:A2 0.000275095
+2 *51917:B_N 0
+3 *51916:X 0.000252616
+4 *209:5 0.000527711
+5 *209:5 *224:22 2.30292e-05
+6 *52022:B1 *52022:A2 0.000608643
+7 *208:9 *52022:A2 0.000143655
+8 *208:9 *209:5 0.000185434
+*RES
+1 *51916:X *209:5 28.3857 
+2 *209:5 *51917:B_N 23 
+3 *209:5 *52022:A2 31.2443 
+*END
+
+*D_NET *210 0.000918272
+*CONN
+*I *51918:B I *D sky130_fd_sc_hd__xor2_4
+*I *51917:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *51918:B 0
+2 *51917:X 0.000286484
+3 *210:8 0.000286484
+4 *210:8 *266:64 5.50106e-05
+5 *210:8 *266:72 0.000166522
+6 *51918:A *210:8 0
+7 *52022:B1 *210:8 0.00012377
+*RES
+1 *51917:X *210:8 43.2614 
+2 *210:8 *51918:B 38 
+*END
+
+*D_NET *211 0.00248343
+*CONN
+*I *52028:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *51936:A I *D sky130_fd_sc_hd__xor2_4
+*I *51918:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52028:A1 0.000189398
+2 *51936:A 6.80678e-05
+3 *51918:X 0.000194353
+4 *211:8 0.000451819
+5 *52028:A1 *52028:A2 0.000210659
+6 *52028:A1 *52028:B1_N 0.000139346
+7 *52028:A1 *266:74 7.4416e-05
+8 *211:8 *52028:A2 6.48142e-05
+9 *211:8 *212:87 0.000402806
+10 *211:8 *225:72 2.30292e-05
+11 *211:8 *225:80 1.57571e-05
+12 *211:8 *225:92 1.4969e-05
+13 *211:8 *227:8 0.000108681
+14 *211:8 *265:21 0.00052531
+*RES
+1 *51918:X *211:8 23.0475 
+2 *211:8 *51936:A 39.0979 
+3 *211:8 *52028:A1 43.0336 
+*END
+
+*D_NET *212 0.0149824
+*CONN
+*I *51933:C1 I *D sky130_fd_sc_hd__o211a_1
+*I *52101:B I *D sky130_fd_sc_hd__nand2_1
+*I *52068:B I *D sky130_fd_sc_hd__nand2_1
+*I *52027:A I *D sky130_fd_sc_hd__nand2_1
+*I *51934:A2 I *D sky130_fd_sc_hd__a211oi_1
+*I *51920:B I *D sky130_fd_sc_hd__nand2_1
+*I *51942:A2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51924:B I *D sky130_fd_sc_hd__nand2_1
+*I *51968:B2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51941:D I *D sky130_fd_sc_hd__and4_1
+*I *51919:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51933:C1 0
+2 *52101:B 0
+3 *52068:B 0
+4 *52027:A 0
+5 *51934:A2 0
+6 *51920:B 3.1026e-05
+7 *51942:A2 0
+8 *51924:B 2.14194e-05
+9 *51968:B2 0
+10 *51941:D 0
+11 *51919:X 2.34823e-05
+12 *212:105 0.00026299
+13 *212:99 0.000988343
+14 *212:87 0.001178
+15 *212:77 0.000518444
+16 *212:72 0.000779702
+17 *212:66 0.00111553
+18 *212:54 0.000942059
+19 *212:41 0.000767103
+20 *212:29 0.00046853
+21 *212:23 0.000350936
+22 *212:12 0.000549085
+23 *212:5 0.000411043
+24 *51920:B *220:9 5.40241e-05
+25 *51924:B *51924:A 5.90675e-06
+26 *212:12 *51921:C 4.90891e-05
+27 *212:12 *279:31 7.75329e-06
+28 *212:12 *280:35 8.46575e-05
+29 *212:23 *51921:C 0.000112665
+30 *212:23 *234:8 9.84851e-05
+31 *212:23 *262:26 2.80512e-05
+32 *212:23 *263:40 6.0039e-05
+33 *212:29 *263:40 0.000144231
+34 *212:29 *280:35 4.56951e-05
+35 *212:41 *51926:B1 0.000185428
+36 *212:41 *217:8 0.000527112
+37 *212:41 *235:8 0.000303692
+38 *212:41 *263:30 0.000452558
+39 *212:41 *263:40 4.6595e-05
+40 *212:54 *219:6 0
+41 *212:54 *221:6 0
+42 *212:54 *235:8 2.85818e-05
+43 *212:54 *263:30 9.57026e-06
+44 *212:54 *264:18 0
+45 *212:66 *225:64 0.00019975
+46 *212:66 *245:6 7.50825e-05
+47 *212:66 *264:25 0
+48 *212:66 *265:21 0.000357631
+49 *212:72 *224:11 2.64506e-05
+50 *212:72 *225:64 9.84851e-05
+51 *212:72 *225:72 0.000861682
+52 *212:72 *225:80 4.17736e-05
+53 *212:77 *220:14 0
+54 *212:77 *224:22 0
+55 *212:77 *225:85 3.47781e-05
+56 *212:87 *225:80 2.64616e-05
+57 *212:87 *225:92 0.000202663
+58 *212:87 *266:72 0
+59 *212:99 *266:72 0
+60 *212:99 *267:72 0.000180812
+61 *212:105 *267:72 5.67058e-05
+62 *212:105 *268:109 6.07611e-06
+63 *315:DIODE *51920:B 5.40241e-05
+64 *51926:A1_N *212:41 1.37702e-05
+65 *52032:A *212:99 0.00014196
+66 *52036:A *212:99 0.000100733
+67 *52036:B *212:99 0.00014196
+68 *52036:C *212:99 3.2457e-05
+69 *27:6 *212:12 0.000135547
+70 *90:5 *212:99 0.000168821
+71 *90:14 *212:99 0
+72 *124:7 *212:105 0.000120867
+73 *183:7 *212:23 8.1796e-05
+74 *189:17 *212:23 0.000141954
+75 *189:31 *212:23 5.50049e-05
+76 *193:38 *212:12 0.000123944
+77 *193:38 *212:29 3.22879e-05
+78 *199:20 *212:54 0.000219177
+79 *203:13 *212:41 2.81138e-05
+80 *203:24 *212:54 0.000166986
+81 *211:8 *212:87 0.000402806
+*RES
+1 *51919:X *212:5 23.4971 
+2 *212:5 *212:12 35.1371 
+3 *212:12 *51941:D 23 
+4 *212:12 *212:23 37.7679 
+5 *212:23 *51968:B2 23 
+6 *212:5 *212:29 4.43286 
+7 *212:29 *51924:B 23.4971 
+8 *212:29 *212:41 11.5586 
+9 *212:41 *51942:A2 23 
+10 *212:41 *212:54 25.0464 
+11 *212:54 *51920:B 39.0979 
+12 *212:54 *212:66 24.7357 
+13 *212:66 *212:72 42.3043 
+14 *212:72 *212:77 31.2014 
+15 *212:77 *51934:A2 23 
+16 *212:77 *212:87 25.8336 
+17 *212:87 *52027:A 38 
+18 *212:87 *212:99 31.4679 
+19 *212:99 *212:105 35.6136 
+20 *212:105 *52068:B 23 
+21 *212:99 *52101:B 23 
+22 *212:66 *51933:C1 23 
+*END
+
+*D_NET *213 0.00135559
+*CONN
+*I *51927:A I *D sky130_fd_sc_hd__nor2_1
+*I *51930:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51920:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51927:A 0
+2 *51930:A 0
+3 *51920:Y 8.15358e-05
+4 *213:13 0.000182751
+5 *213:7 0.000264287
+6 *213:7 *51927:B 5.90675e-06
+7 *213:7 *220:9 0.000272322
+8 *213:13 *51930:B 0.000246153
+9 *213:13 *232:60 7.53384e-06
+10 *213:13 *264:25 0.000188435
+11 *315:DIODE *213:7 0.00010667
+*RES
+1 *51920:Y *213:7 26.5007 
+2 *213:7 *213:13 34.1843 
+3 *213:13 *51930:A 23 
+4 *213:7 *51927:A 23 
+*END
+
+*D_NET *214 0.00306499
+*CONN
+*I *51943:A I *D sky130_fd_sc_hd__or2_1
+*I *51925:S I *D sky130_fd_sc_hd__mux2_1
+*I *51926:A2_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51921:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51943:A 4.76744e-05
+2 *51925:S 0.000299426
+3 *51926:A2_N 0.000296006
+4 *51921:X 6.66574e-05
+5 *214:15 0.000578293
+6 *214:6 0.000593857
+7 *51926:A2_N *263:30 0.000431241
+8 *51926:A2_N *263:40 1.24376e-05
+9 *51943:A *51926:B2 0
+10 *51943:A *232:50 0
+11 *214:6 *216:8 0
+12 *214:6 *280:38 4.08537e-05
+13 *214:6 *280:43 6.07611e-06
+14 *214:15 *51926:B2 0
+15 *214:15 *51937:A 0
+16 *214:15 *216:8 0
+17 *214:15 *232:50 0
+18 *192:25 *51925:S 3.46255e-05
+19 *192:27 *51925:S 0.000521097
+20 *193:68 *51925:S 0.000136743
+*RES
+1 *51921:X *214:6 39.2014 
+2 *214:6 *51926:A2_N 42.9093 
+3 *214:6 *214:15 3.31429 
+4 *214:15 *51925:S 44.8357 
+5 *214:15 *51943:A 38.8493 
+*END
+
+*D_NET *215 0.00155482
+*CONN
+*I *51923:B I *D sky130_fd_sc_hd__or2_1
+*I *51922:Y O *D sky130_fd_sc_hd__a22oi_1
+*CAP
+1 *51923:B 1.80182e-05
+2 *51922:Y 0.000290459
+3 *215:8 0.000308477
+4 *51923:B *216:8 2.93845e-05
+5 *51923:B *284:28 5.50106e-05
+6 *215:8 *51910:A 0.000267554
+7 *215:8 *262:14 0
+8 *215:8 *280:49 1.46586e-05
+9 *183:51 *215:8 0.000148524
+10 *183:54 *215:8 0
+11 *189:15 *215:8 0.000260457
+12 *199:8 *215:8 1.62015e-05
+13 *203:8 *215:8 0.000146072
+*RES
+1 *51922:Y *215:8 46.8243 
+2 *215:8 *51923:B 38.6214 
+*END
+
+*D_NET *216 0.00317096
+*CONN
+*I *51937:A I *D sky130_fd_sc_hd__xor2_1
+*I *51926:B1 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51923:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51937:A 0.000236772
+2 *51926:B1 3.05231e-05
+3 *51923:X 0.000481712
+4 *216:8 0.000749008
+5 *51926:B1 *263:30 0.000185428
+6 *51937:A *51926:B2 0.00021356
+7 *51937:A *51937:B 0.000136486
+8 *51937:A *219:6 6.7177e-06
+9 *216:8 *284:28 0.00026468
+10 *51923:B *216:8 2.93845e-05
+11 *51926:A1_N *51937:A 0.000163361
+12 *51926:A1_N *216:8 1.01436e-05
+13 *193:52 *51937:A 0.000328022
+14 *199:20 *216:8 0.000100069
+15 *207:55 *51937:A 4.9662e-05
+16 *212:41 *51926:B1 0.000185428
+17 *214:6 *216:8 0
+18 *214:15 *51937:A 0
+19 *214:15 *216:8 0
+*RES
+1 *51923:X *216:8 45.2914 
+2 *216:8 *51926:B1 40.0507 
+3 *216:8 *51937:A 44.8771 
+*END
+
+*D_NET *217 0.00165684
+*CONN
+*I *51925:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *51924:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51925:A0 0
+2 *51924:Y 0.000329679
+3 *217:8 0.000329679
+4 *217:8 *51926:B2 0.00010018
+5 *217:8 *219:6 0.000162422
+6 *217:8 *235:8 4.99753e-06
+7 *51926:A1_N *217:8 0.000111852
+8 *193:52 *217:8 8.62876e-05
+9 *203:8 *217:8 4.6318e-06
+10 *212:41 *217:8 0.000527112
+*RES
+1 *51924:Y *217:8 46.4721 
+2 *217:8 *51925:A0 38 
+*END
+
+*D_NET *218 0.00122245
+*CONN
+*I *51937:B I *D sky130_fd_sc_hd__xor2_1
+*I *51926:B2 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51925:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *51937:B 0.000107143
+2 *51926:B2 0.000208958
+3 *51925:X 4.25104e-05
+4 *218:7 0.000358611
+5 *51926:B2 *236:6 0
+6 *51937:B *219:6 0
+7 *51937:B *236:6 0
+8 *218:7 *51943:B 5.50049e-05
+9 *51937:A *51926:B2 0.00021356
+10 *51937:A *51937:B 0.000136486
+11 *51943:A *51926:B2 0
+12 *214:15 *51926:B2 0
+13 *217:8 *51926:B2 0.00010018
+*RES
+1 *51925:X *218:7 38.6214 
+2 *218:7 *51926:B2 42.06 
+3 *218:7 *51937:B 40.2579 
+*END
+
+*D_NET *219 0.00193047
+*CONN
+*I *51930:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51927:B I *D sky130_fd_sc_hd__nor2_1
+*I *51926:X O *D sky130_fd_sc_hd__o2bb2a_1
+*CAP
+1 *51930:B 0.000191661
+2 *51927:B 4.77973e-05
+3 *51926:X 0.000405116
+4 *219:6 0.000644575
+5 *51927:B *220:9 3.7122e-06
+6 *51930:B *230:6 0
+7 *51930:B *231:6 0
+8 *51930:B *264:18 0
+9 *219:6 *230:6 0
+10 *219:6 *235:8 8.58484e-05
+11 *315:DIODE *51927:B 5.50049e-05
+12 *51937:A *219:6 6.7177e-06
+13 *51937:B *219:6 0
+14 *193:52 *219:6 7.55595e-05
+15 *212:54 *219:6 0
+16 *213:7 *51927:B 5.90675e-06
+17 *213:13 *51930:B 0.000246153
+18 *217:8 *219:6 0.000162422
+*RES
+1 *51926:X *219:6 45.54 
+2 *219:6 *51927:B 39.1186 
+3 *219:6 *51930:B 41.9357 
+*END
+
+*D_NET *220 0.00486029
+*CONN
+*I *51934:B1 I *D sky130_fd_sc_hd__a211oi_1
+*I *51933:A1 I *D sky130_fd_sc_hd__o211a_1
+*I *51927:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51934:B1 7.76842e-05
+2 *51933:A1 8.15768e-05
+3 *51927:Y 0.000884165
+4 *220:14 0.000419391
+5 *220:9 0.0011443
+6 *51933:A1 *225:72 0.000239784
+7 *51933:A1 *265:21 0.000311003
+8 *51934:B1 *51934:A1 2.02517e-05
+9 *51934:B1 *225:72 0.000142523
+10 *51934:B1 *227:8 0.00010018
+11 *51934:B1 *265:21 9.61128e-05
+12 *220:9 *51929:B_N 0.000272383
+13 *220:9 *222:8 5.67058e-05
+14 *220:14 *224:22 0
+15 *315:DIODE *220:9 3.6348e-05
+16 *51916:A1 *220:14 0.00015637
+17 *51920:B *220:9 5.40241e-05
+18 *51927:B *220:9 3.7122e-06
+19 *200:17 *220:9 5.50049e-05
+20 *200:17 *220:14 0.000139647
+21 *203:31 *220:9 3.6485e-05
+22 *203:39 *220:9 0.00023789
+23 *206:25 *220:14 1.22906e-05
+24 *207:172 *220:14 1.01436e-05
+25 *212:77 *220:14 0
+26 *213:7 *220:9 0.000272322
+*RES
+1 *51927:Y *220:9 39.0329 
+2 *220:9 *220:14 35.4271 
+3 *220:14 *51933:A1 27.6711 
+4 *220:14 *51934:B1 26.5007 
+*END
+
+*D_NET *221 0.000931482
+*CONN
+*I *51929:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *51928:X O *D sky130_fd_sc_hd__a21bo_1
+*CAP
+1 *51929:B_N 4.08391e-05
+2 *51928:X 0.000152519
+3 *221:6 0.000193358
+4 *203:24 *221:6 0
+5 *203:39 *51929:B_N 0.000272383
+6 *206:25 *221:6 0
+7 *212:54 *221:6 0
+8 *220:9 *51929:B_N 0.000272383
+*RES
+1 *51928:X *221:6 40.2579 
+2 *221:6 *51929:B_N 41.0036 
+*END
+
+*D_NET *222 0.0010665
+*CONN
+*I *51931:A I *D sky130_fd_sc_hd__nor2_1
+*I *51952:A I *D sky130_fd_sc_hd__xor2_1
+*I *51929:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *51931:A 4.31763e-05
+2 *51952:A 0.000198793
+3 *51929:X 0.00015216
+4 *222:10 0.000241969
+5 *222:8 0.00015216
+6 *51931:A *51931:B 1.14154e-05
+7 *51931:A *224:5 2.18778e-05
+8 *51952:A *51931:B 0.000180812
+9 *51952:A *224:5 7.43025e-06
+10 *206:25 *222:8 0
+11 *220:9 *222:8 5.67058e-05
+*RES
+1 *51929:X *222:8 40.175 
+2 *222:8 *222:10 15 
+3 *222:10 *51952:A 27.4536 
+4 *222:10 *51931:A 24.0875 
+*END
+
+*D_NET *223 0.00120614
+*CONN
+*I *51931:B I *D sky130_fd_sc_hd__nor2_1
+*I *51952:B I *D sky130_fd_sc_hd__xor2_1
+*I *51930:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51931:B 0.000167357
+2 *51952:B 0
+3 *51930:Y 0.000317268
+4 *223:7 0.000484625
+5 *51931:B *224:5 7.53384e-06
+6 *223:7 *264:25 3.71251e-05
+7 *51931:A *51931:B 1.14154e-05
+8 *51952:A *51931:B 0.000180812
+*RES
+1 *51930:Y *223:7 27.93 
+2 *223:7 *51952:B 23 
+3 *223:7 *51931:B 27.4536 
+*END
+
+*D_NET *224 0.00212346
+*CONN
+*I *51934:C1 I *D sky130_fd_sc_hd__a211oi_1
+*I *51933:A2 I *D sky130_fd_sc_hd__o211a_1
+*I *51931:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51934:C1 0
+2 *51933:A2 0
+3 *51931:Y 7.42613e-05
+4 *224:22 0.000738068
+5 *224:11 0.000179824
+6 *224:5 0.000992153
+7 *224:11 *225:72 6.83591e-06
+8 *224:11 *265:21 1.37702e-05
+9 *51916:A2 *224:22 2.0045e-05
+10 *51931:A *224:5 2.18778e-05
+11 *51931:B *224:5 7.53384e-06
+12 *51952:A *224:5 7.43025e-06
+13 *200:17 *224:22 5.5683e-06
+14 *206:25 *224:22 6.61436e-06
+15 *209:5 *224:22 2.30292e-05
+16 *212:72 *224:11 2.64506e-05
+17 *212:77 *224:22 0
+18 *220:14 *224:22 0
+*RES
+1 *51931:Y *224:5 24.0979 
+2 *224:5 *224:11 32.4184 
+3 *224:11 *51933:A2 23 
+4 *224:5 *224:22 39.6736 
+5 *224:22 *51934:C1 23 
+*END
+
+*D_NET *225 0.0237466
+*CONN
+*I *52021:A I *D sky130_fd_sc_hd__nand2_1
+*I *52055:A I *D sky130_fd_sc_hd__nand2_1
+*I *356:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *362:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *382:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *378:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52118:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *52117:B I *D sky130_fd_sc_hd__nand4_1
+*I *52082:A I *D sky130_fd_sc_hd__nand2_1
+*I *348:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *310:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51934:A1 I *D sky130_fd_sc_hd__a211oi_1
+*I *51933:B1 I *D sky130_fd_sc_hd__o211a_1
+*I *309:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51998:A1 I *D sky130_fd_sc_hd__o21ai_1
+*I *51997:A I *D sky130_fd_sc_hd__nand2_1
+*I *51977:A I *D sky130_fd_sc_hd__and3_1
+*I *329:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *341:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *340:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51932:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *52021:A 0.000167133
+2 *52055:A 2.66457e-05
+3 *356:DIODE 0
+4 *362:DIODE 0
+5 *382:DIODE 0
+6 *378:DIODE 0
+7 *52118:B2 0
+8 *52117:B 0
+9 *52082:A 0
+10 *348:DIODE 0
+11 *310:DIODE 0
+12 *51934:A1 3.3043e-05
+13 *51933:B1 4.01155e-05
+14 *309:DIODE 0
+15 *51998:A1 0
+16 *51997:A 0
+17 *51977:A 0
+18 *329:DIODE 0
+19 *341:DIODE 0
+20 *340:DIODE 0.000149943
+21 *51932:X 0
+22 *225:164 4.92547e-05
+23 *225:151 0.000144962
+24 *225:146 0.000531313
+25 *225:136 0.000185608
+26 *225:130 0.00020909
+27 *225:128 0.000866498
+28 *225:118 0.00060122
+29 *225:114 0.000486946
+30 *225:108 0.00104755
+31 *225:100 0.00129281
+32 *225:92 0.00119473
+33 *225:85 9.54636e-05
+34 *225:80 0.000898163
+35 *225:72 0.000262962
+36 *225:64 0.000747654
+37 *225:58 0.00127207
+38 *225:28 0.000627714
+39 *225:23 0.000834968
+40 *225:22 0.000726243
+41 *225:15 0.000669769
+42 *225:10 0.000667951
+43 *225:4 0.00111058
+44 *340:DIODE *259:6 0
+45 *340:DIODE *261:66 0
+46 *52055:A *281:126 0.000217372
+47 *225:10 *256:7 0.000106351
+48 *225:10 *261:29 5.61414e-05
+49 *225:10 *265:77 3.22879e-05
+50 *225:15 *261:23 5.41437e-05
+51 *225:22 *261:23 9.84851e-05
+52 *225:23 *322:DIODE 5.83407e-05
+53 *225:23 *265:57 3.17516e-05
+54 *225:23 *272:86 4.05309e-05
+55 *225:23 *272:92 7.57176e-05
+56 *225:28 *261:66 0
+57 *225:28 *261:76 0
+58 *225:58 *320:DIODE 5.83407e-05
+59 *225:58 *231:9 0.000202653
+60 *225:58 *256:7 0.000159527
+61 *225:58 *265:21 5.37348e-06
+62 *225:64 *51953:A 2.93431e-05
+63 *225:64 *265:21 0.000242485
+64 *225:72 *265:21 4.38307e-05
+65 *225:92 *265:13 8.48243e-05
+66 *225:92 *265:21 0.00022826
+67 *225:100 *265:13 0.000139838
+68 *225:108 *347:DIODE 0
+69 *225:108 *281:118 1.21972e-05
+70 *225:108 *281:126 0.000183733
+71 *225:128 *52087:B 1.03836e-05
+72 *225:128 *52118:B1 0.000395957
+73 *225:130 *52118:B1 0
+74 *225:136 *281:152 0
+75 *225:146 *52118:A1 0.000142513
+76 *225:146 *52118:B1 5.41385e-05
+77 *225:146 *267:19 0.000480242
+78 *225:151 *267:16 0
+79 *225:164 *281:126 0.000129522
+80 *365:DIODE *225:114 0.000114083
+81 *51933:A1 *225:72 0.000239784
+82 *51934:B1 *51934:A1 2.02517e-05
+83 *51934:B1 *225:72 0.000142523
+84 *51977:C *225:22 0
+85 *51977:C *225:23 0.000227208
+86 *51998:A2 *225:15 0.000356724
+87 *52023:A *225:108 0
+88 *52024:B *225:108 6.16439e-05
+89 *52025:B *52021:A 8.94487e-05
+90 *52025:B *225:108 9.85378e-05
+91 *52026:A *52021:A 5.58068e-05
+92 *52087:A *225:114 6.64697e-05
+93 *52087:A *225:118 0.000274078
+94 *52087:A *225:128 0.000251716
+95 *33:6 *225:22 0
+96 *34:8 *225:22 0
+97 *48:6 *225:22 1.44546e-05
+98 *58:6 *225:22 0
+99 *73:6 *225:108 0
+100 *74:16 *225:108 0
+101 *76:18 *225:108 0
+102 *77:8 *225:108 0.000166522
+103 *78:8 *225:108 0.000161393
+104 *82:8 *52021:A 2.96909e-05
+105 *82:8 *225:108 3.63546e-05
+106 *111:6 *225:108 0
+107 *111:6 *225:114 0
+108 *119:9 *225:100 5.50049e-05
+109 *142:19 *225:136 0
+110 *144:8 *225:128 0.00031495
+111 *176:7 *225:136 0.00010018
+112 *177:6 *225:151 0
+113 *178:8 *225:146 0.000139352
+114 *203:69 *52055:A 0.000230604
+115 *203:69 *225:108 0.000482844
+116 *203:69 *225:164 0.00014196
+117 *207:152 *225:114 3.41422e-05
+118 *207:152 *225:118 0
+119 *211:8 *225:72 2.30292e-05
+120 *211:8 *225:80 1.57571e-05
+121 *211:8 *225:92 1.4969e-05
+122 *212:66 *225:64 0.00019975
+123 *212:72 *225:64 9.84851e-05
+124 *212:72 *225:72 0.000861682
+125 *212:72 *225:80 4.17736e-05
+126 *212:77 *225:85 3.47781e-05
+127 *212:87 *225:80 2.64616e-05
+128 *212:87 *225:92 0.000202663
+129 *224:11 *225:72 6.83591e-06
+*RES
+1 *51932:X *225:4 23 
+2 *225:4 *225:10 37.5193 
+3 *225:10 *225:15 6.38 
+4 *225:15 *225:22 36.525 
+5 *225:22 *225:23 8.24429 
+6 *225:23 *225:28 23.3271 
+7 *225:28 *340:DIODE 40.9621 
+8 *225:28 *341:DIODE 38 
+9 *225:23 *329:DIODE 23 
+10 *225:22 *51977:A 23 
+11 *225:15 *51997:A 23 
+12 *225:10 *51998:A1 23 
+13 *225:4 *225:58 14.9143 
+14 *225:58 *309:DIODE 23 
+15 *225:58 *225:64 11.5793 
+16 *225:64 *51933:B1 23.8493 
+17 *225:64 *225:72 9.67357 
+18 *225:72 *51934:A1 23.8493 
+19 *225:72 *225:80 1.09786 
+20 *225:80 *225:85 31.5536 
+21 *225:85 *310:DIODE 23 
+22 *225:80 *225:92 15.8879 
+23 *225:92 *348:DIODE 23 
+24 *225:92 *225:100 21.3386 
+25 *225:100 *225:108 31.5093 
+26 *225:108 *225:114 35.7379 
+27 *225:114 *225:118 4.205 
+28 *225:118 *52082:A 23 
+29 *225:118 *225:128 12.9257 
+30 *225:128 *225:130 0.497143 
+31 *225:130 *225:136 33.0036 
+32 *225:136 *52117:B 23 
+33 *225:130 *52118:B2 23 
+34 *225:128 *225:146 9.67357 
+35 *225:146 *225:151 32.2579 
+36 *225:151 *378:DIODE 23 
+37 *225:146 *382:DIODE 23 
+38 *225:114 *362:DIODE 23 
+39 *225:108 *225:164 1.57429 
+40 *225:164 *356:DIODE 23 
+41 *225:164 *52055:A 25.5271 
+42 *225:100 *52021:A 41.6664 
+*END
+
+*D_NET *226 0.00242193
+*CONN
+*I *52028:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *51935:A I *D sky130_fd_sc_hd__or2_1
+*I *51933:X O *D sky130_fd_sc_hd__o211a_1
+*CAP
+1 *52028:B1_N 0.000571888
+2 *51935:A 0.000148048
+3 *51933:X 0.000100618
+4 *226:6 0.000820554
+5 *51935:A *51935:B 0.000228903
+6 *51935:A *228:13 4.95081e-05
+7 *52028:B1_N *52033:A_N 6.17437e-06
+8 *52028:B1_N *52033:B 0.00014196
+9 *52028:B1_N *229:7 0
+10 *52028:B1_N *250:14 0
+11 *52028:B1_N *266:74 0.000214931
+12 *52028:A1 *52028:B1_N 0.000139346
+*RES
+1 *51933:X *226:6 39.5536 
+2 *226:6 *51935:A 41.48 
+3 *226:6 *52028:B1_N 49.5793 
+*END
+
+*D_NET *227 0.00278484
+*CONN
+*I *52028:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *51935:B I *D sky130_fd_sc_hd__or2_1
+*I *51934:Y O *D sky130_fd_sc_hd__a211oi_1
+*CAP
+1 *52028:A2 0.000166998
+2 *51935:B 0.000433613
+3 *51934:Y 0.000101975
+4 *227:8 0.000702586
+5 *51935:B *228:13 0.000567948
+6 *52028:A2 *229:7 0
+7 *227:8 *265:21 9.84794e-05
+8 *51934:B1 *227:8 0.00010018
+9 *51935:A *51935:B 0.000228903
+10 *52028:A1 *52028:A2 0.000210659
+11 *211:8 *52028:A2 6.48142e-05
+12 *211:8 *227:8 0.000108681
+*RES
+1 *51934:Y *227:8 40.6514 
+2 *227:8 *51935:B 47.715 
+3 *227:8 *52028:A2 42.0186 
+*END
+
+*D_NET *228 0.00140469
+*CONN
+*I *51936:B I *D sky130_fd_sc_hd__xor2_4
+*I *51935:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51936:B 0
+2 *51935:X 0.000393616
+3 *228:13 0.000393616
+4 *51935:A *228:13 4.95081e-05
+5 *51935:B *228:13 0.000567948
+*RES
+1 *51935:X *228:13 33.6057 
+2 *228:13 *51936:B 23 
+*END
+
+*D_NET *229 0.0010874
+*CONN
+*I *51959:A I *D sky130_fd_sc_hd__xor2_4
+*I *52033:C I *D sky130_fd_sc_hd__and3b_1
+*I *51936:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *51959:A 0.0001091
+2 *52033:C 4.25104e-05
+3 *51936:X 0.000364586
+4 *229:7 0.000516196
+5 *51959:A *52033:A_N 0
+6 *51959:A *251:8 0
+7 *52033:C *266:74 5.50049e-05
+8 *229:7 *52033:A_N 0
+9 *229:7 *250:14 0
+10 *52028:A2 *229:7 0
+11 *52028:B1_N *229:7 0
+12 *91:8 *51959:A 0
+*RES
+1 *51936:X *229:7 19.9921 
+2 *229:7 *52033:C 38.6214 
+3 *229:7 *51959:A 39.9057 
+*END
+
+*D_NET *230 0.000258345
+*CONN
+*I *51938:A I *D sky130_fd_sc_hd__inv_2
+*I *51937:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51938:A 0
+2 *51937:X 0.000129173
+3 *230:6 0.000129173
+4 *230:6 *232:50 0
+5 *51930:B *230:6 0
+6 *219:6 *230:6 0
+*RES
+1 *51937:X *230:6 40.2579 
+2 *230:6 *51938:A 38 
+*END
+
+*D_NET *231 0.0015088
+*CONN
+*I *51963:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51949:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51938:Y O *D sky130_fd_sc_hd__inv_2
+*CAP
+1 *51963:A 0
+2 *51949:A1 0
+3 *51938:Y 0.000302689
+4 *231:14 9.19107e-05
+5 *231:9 0.000250536
+6 *231:6 0.000461315
+7 *231:6 *51949:A2 0
+8 *231:6 *232:50 0
+9 *231:6 *232:60 0
+10 *231:6 *240:8 0
+11 *231:14 *51949:A2 0.000199701
+12 *231:14 *243:19 0
+13 *51930:B *231:6 0
+14 *225:58 *231:9 0.000202653
+*RES
+1 *51938:Y *231:6 43.075 
+2 *231:6 *231:9 18.9564 
+3 *231:9 *231:14 32.61 
+4 *231:14 *51949:A1 23 
+5 *231:9 *51963:A 23 
+*END
+
+*D_NET *232 0.0171164
+*CONN
+*I *51957:A1 I *D sky130_fd_sc_hd__a211o_1
+*I *52035:A2 I *D sky130_fd_sc_hd__a211o_1
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+*I *51991:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *51939:X O *D sky130_fd_sc_hd__buf_2
+*CAP
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+49 *232:50 *281:216 8.83341e-05
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+*RES
+1 *51939:X *232:4 23 
+2 *232:4 *232:8 19.5571 
+3 *232:8 *51991:B1 40.5271 
+4 *232:8 *51990:A_N 42.2464 
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+13 *232:74 *232:80 36.7943 
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+16 *232:95 *232:98 19.9093 
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+19 *232:95 *52035:A2 39.2014 
+20 *232:74 *51957:A1 25.5479 
+*END
+
+*D_NET *233 0.00104591
+*CONN
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+*I *51947:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51940:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51948:A 0
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+5 *233:4 0.000308779
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+10 *232:50 *233:14 1.22803e-05
+*RES
+1 *51940:X *233:4 23 
+2 *233:4 *51947:A 27.4329 
+3 *233:4 *233:14 32.61 
+4 *233:14 *51948:A 23 
+*END
+
+*D_NET *234 0.00318539
+*CONN
+*I *51946:A2_N I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51945:S I *D sky130_fd_sc_hd__mux2_1
+*I *51969:A I *D sky130_fd_sc_hd__or2_1
+*I *51941:X O *D sky130_fd_sc_hd__and4_1
+*CAP
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+20 *193:38 *51969:A 3.34247e-05
+21 *212:23 *234:8 9.84851e-05
+*RES
+1 *51941:X *234:8 43.8621 
+2 *234:8 *51969:A 39.0979 
+3 *234:8 *234:17 2.96214 
+4 *234:17 *51945:S 38 
+5 *234:17 *51946:A2_N 45.6436 
+*END
+
+*D_NET *235 0.0023466
+*CONN
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+*I *51942:Y O *D sky130_fd_sc_hd__a22oi_1
+*CAP
+1 *51943:B 0.000300413
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+*RES
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+*END
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+*D_NET *236 0.00192262
+*CONN
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+*I *51965:A I *D sky130_fd_sc_hd__xor2_1
+*I *51943:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51946:B1 0
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+16 *232:50 *236:6 5.56203e-05
+*RES
+1 *51943:X *236:6 39.5536 
+2 *236:6 *236:11 22.3121 
+3 *236:11 *51965:A 26.48 
+4 *236:11 *51946:B1 23 
+*END
+
+*D_NET *237 0.000843581
+*CONN
+*I *51945:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *51944:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
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+4 *237:9 *278:70 1.76557e-05
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+6 *51944:B *237:9 0
+7 *192:27 *237:9 5.67058e-05
+8 *192:31 *237:9 0.000315027
+9 *192:53 *237:9 0
+*RES
+1 *51944:Y *237:9 28.5514 
+2 *237:9 *51945:A0 23 
+*END
+
+*D_NET *238 0.00117368
+*CONN
+*I *51946:B2 I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51965:B I *D sky130_fd_sc_hd__xor2_1
+*I *51945:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *51946:B2 1.86895e-05
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+9 *192:27 *238:8 2.30292e-05
+10 *193:38 *238:8 0
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+*RES
+1 *51945:X *238:8 40.8793 
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+*END
+
+*D_NET *239 0.00123414
+*CONN
+*I *51947:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51948:B I *D sky130_fd_sc_hd__nand2_1
+*I *51946:Y O *D sky130_fd_sc_hd__o2bb2ai_1
+*CAP
+1 *51947:B 0.000196145
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+4 *239:6 0.000480876
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+8 *239:6 *281:216 0
+9 *233:14 *51947:B 0
+*RES
+1 *51946:Y *239:6 40.2579 
+2 *239:6 *51948:B 41.0036 
+3 *239:6 *51947:B 40.9621 
+*END
+
+*D_NET *240 0.00130519
+*CONN
+*I *51949:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51963:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51947:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51949:A2 6.50816e-05
+2 *51963:B 0
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+6 *240:8 *241:6 6.68793e-05
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+8 *51947:A *240:8 0.000102289
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+11 *231:14 *51949:A2 0.000199701
+*RES
+1 *51947:Y *240:8 43.3857 
+2 *240:8 *51963:B 38 
+3 *240:8 *51949:A2 40.9621 
+*END
+
+*D_NET *241 0.0010379
+*CONN
+*I *51949:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *51948:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
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+*RES
+1 *51948:Y *241:6 45.54 
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+*END
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+*D_NET *242 0.00120423
+*CONN
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+*I *51954:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51949:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *51951:A 7.03717e-05
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+7 *51951:A *265:31 0.00014196
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+9 *242:10 *243:19 0
+*RES
+1 *51949:X *242:5 26.48 
+2 *242:5 *242:10 32.9621 
+3 *242:10 *51954:A 23 
+4 *242:5 *51951:A 25.0714 
+*END
+
+*D_NET *243 0.00145109
+*CONN
+*I *51954:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51951:B I *D sky130_fd_sc_hd__nor2_1
+*I *51950:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51954:B 0
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+3 *51950:Y 5.05608e-05
+4 *243:19 0.000270875
+5 *243:5 0.000365826
+6 *51951:B *244:8 0.00010018
+7 *51951:B *265:31 3.71251e-05
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+12 *243:19 *51955:B 0
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+14 *243:19 *265:26 1.19796e-05
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+17 *231:14 *243:19 0
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+19 *242:10 *243:19 0
+*RES
+1 *51950:Y *243:5 25.0507 
+2 *243:5 *51951:B 24.595 
+3 *243:5 *243:19 36.3179 
+4 *243:19 *51954:B 23 
+*END
+
+*D_NET *244 0.00309498
+*CONN
+*I *51956:A1 I *D sky130_fd_sc_hd__o211a_1
+*I *51957:B1 I *D sky130_fd_sc_hd__a211o_1
+*I *51951:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51956:A1 0
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+6 *244:8 0.000681333
+7 *244:8 *319:DIODE 4.16868e-05
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+9 *244:8 *246:18 0.000148688
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+11 *244:8 *248:17 1.14452e-05
+12 *244:8 *265:31 1.32939e-05
+13 *244:25 *51956:A2 0.000135016
+14 *244:25 *248:17 0
+15 *244:25 *266:80 5.79559e-05
+16 *244:25 *266:86 1.10658e-05
+17 *244:25 *266:155 0.000110184
+18 *51951:B *244:8 0.00010018
+19 *51957:A1 *244:25 5.95135e-05
+20 *232:95 *244:25 1.76557e-05
+21 *243:5 *244:8 0.000171296
+*RES
+1 *51951:Y *244:8 49.31 
+2 *244:8 *244:10 15 
+3 *244:10 *51957:B1 23 
+4 *244:10 *244:25 36.525 
+5 *244:25 *51956:A1 23 
+*END
+
+*D_NET *245 0.000415875
+*CONN
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+*I *51952:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51953:A 1.87628e-05
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+4 *51953:A *265:21 5.56356e-05
+5 *212:66 *245:6 7.50825e-05
+6 *225:64 *51953:A 2.93431e-05
+7 *232:60 *245:6 0
+*RES
+1 *51952:X *245:6 40.2579 
+2 *245:6 *51953:A 38.6214 
+*END
+
+*D_NET *246 0.00181115
+*CONN
+*I *51955:A I *D sky130_fd_sc_hd__nor2_1
+*I *51960:A I *D sky130_fd_sc_hd__and2_1
+*I *51953:Y O *D sky130_fd_sc_hd__inv_2
+*CAP
+1 *51955:A 0
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+6 *246:8 0.000193574
+7 *246:8 *319:DIODE 0
+8 *246:8 *265:21 5.79559e-05
+9 *246:11 *51955:B 5.56279e-05
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+11 *246:18 *51955:B 0.000400144
+12 *246:18 *51960:B 1.37349e-05
+13 *246:18 *266:97 9.21347e-06
+14 *232:60 *246:18 1.14452e-05
+15 *232:74 *246:18 0.000194318
+16 *244:8 *246:18 0.000148688
+*RES
+1 *51953:Y *246:8 40.5271 
+2 *246:8 *246:11 15.6214 
+3 *246:11 *246:18 37.395 
+4 *246:18 *51960:A 23 
+5 *246:11 *51955:A 23 
+*END
+
+*D_NET *247 0.00217207
+*CONN
+*I *51960:B I *D sky130_fd_sc_hd__and2_1
+*I *51955:B I *D sky130_fd_sc_hd__nor2_1
+*I *51954:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51960:B 3.54117e-05
+2 *51955:B 0.000362122
+3 *51954:Y 0.000169718
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+5 *51955:B *248:8 0.000151306
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+14 *246:11 *51955:B 5.56279e-05
+15 *246:18 *51955:B 0.000400144
+16 *246:18 *51960:B 1.37349e-05
+*RES
+1 *51954:Y *247:7 41.48 
+2 *247:7 *51955:B 47.0936 
+3 *247:7 *51960:B 38.8493 
+*END
+
+*D_NET *248 0.00232413
+*CONN
+*I *51956:A2 I *D sky130_fd_sc_hd__o211a_1
+*I *51961:A I *D sky130_fd_sc_hd__or2_2
+*I *51957:C1 I *D sky130_fd_sc_hd__a211o_1
+*I *51955:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51956:A2 0.000178107
+2 *51961:A 0.000113664
+3 *51957:C1 0
+4 *51955:Y 0.000279697
+5 *248:17 0.000376919
+6 *248:8 0.000364845
+7 *51956:A2 *266:155 5.79559e-05
+8 *248:8 *319:DIODE 5.56203e-05
+9 *248:8 *266:97 1.12487e-05
+10 *248:17 *266:155 0
+11 *51955:B *248:8 0.000151306
+12 *51956:B1 *51956:A2 1.12349e-05
+13 *40:7 *51961:A 5.10686e-05
+14 *232:80 *51956:A2 0.000117719
+15 *232:80 *51961:A 2.64616e-05
+16 *232:80 *248:8 3.70187e-05
+17 *232:80 *248:17 0.000158229
+18 *232:95 *51956:A2 2.32101e-05
+19 *244:8 *248:8 0.000163361
+20 *244:8 *248:17 1.14452e-05
+21 *244:25 *51956:A2 0.000135016
+22 *244:25 *248:17 0
+*RES
+1 *51955:Y *248:8 43.2614 
+2 *248:8 *51957:C1 38 
+3 *248:8 *248:17 17.2579 
+4 *248:17 *51961:A 25.0507 
+5 *248:17 *51956:A2 26.9771 
+*END
+
+*D_NET *249 0.00391268
+*CONN
+*I *52034:A1 I *D sky130_fd_sc_hd__o211ai_1
+*I *52035:B1 I *D sky130_fd_sc_hd__a211o_1
+*I *51958:A I *D sky130_fd_sc_hd__or2b_1
+*I *52033:A_N I *D sky130_fd_sc_hd__and3b_1
+*I *51956:X O *D sky130_fd_sc_hd__o211a_1
+*CAP
+1 *52034:A1 0.000108818
+2 *52035:B1 2.14194e-05
+3 *51958:A 0
+4 *52033:A_N 0.000213281
+5 *51956:X 0.000326025
+6 *249:28 0.000379862
+7 *249:20 0.000359642
+8 *249:7 0.000649324
+9 *52033:A_N *52033:B 1.57571e-05
+10 *52033:A_N *250:14 0
+11 *52033:A_N *251:8 0
+12 *52033:A_N *252:8 0.000115022
+13 *52033:A_N *266:74 5.50049e-05
+14 *52034:A1 *52035:A1 4.00259e-06
+15 *52034:A1 *267:90 0.000290273
+16 *52034:A1 *267:92 5.70419e-05
+17 *52035:B1 *52035:A1 5.90675e-06
+18 *249:20 *252:8 7.39034e-05
+19 *249:28 *251:8 0.000202653
+20 *249:28 *267:92 0.000396238
+21 *51959:A *52033:A_N 0
+22 *52028:B1_N *52033:A_N 6.17437e-06
+23 *52034:A2 *52034:A1 0.000334083
+24 *52034:A2 *249:28 5.50106e-05
+25 *229:7 *52033:A_N 0
+26 *232:95 *249:7 0.000243237
+*RES
+1 *51956:X *249:7 42.9093 
+2 *249:7 *52033:A_N 42.2879 
+3 *249:7 *249:20 16.8229 
+4 *249:20 *51958:A 23 
+5 *249:20 *249:28 8.61714 
+6 *249:28 *52035:B1 23.4971 
+7 *249:28 *52034:A1 28.5514 
+*END
+
+*D_NET *250 0.00222876
+*CONN
+*I *52033:B I *D sky130_fd_sc_hd__and3b_1
+*I *51958:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *51957:X O *D sky130_fd_sc_hd__a211o_1
+*CAP
+1 *52033:B 0.000218615
+2 *51958:B_N 0
+3 *51957:X 0.000273017
+4 *250:14 0.000355247
+5 *250:9 0.000846879
+6 *52033:B *266:74 3.6485e-05
+7 *250:9 *266:74 6.28529e-05
+8 *250:9 *266:78 0.000173256
+9 *250:9 *266:80 7.51453e-06
+10 *250:14 *252:8 9.25396e-05
+11 *250:14 *272:142 4.6318e-06
+12 *52028:B1_N *52033:B 0.00014196
+13 *52028:B1_N *250:14 0
+14 *52033:A_N *52033:B 1.57571e-05
+15 *52033:A_N *250:14 0
+16 *40:8 *250:14 0
+17 *229:7 *250:14 0
+*RES
+1 *51957:X *250:9 29.0279 
+2 *250:9 *250:14 36.8357 
+3 *250:14 *51958:B_N 23 
+4 *250:9 *52033:B 26.48 
+*END
+
+*D_NET *251 0.000981318
+*CONN
+*I *51959:B I *D sky130_fd_sc_hd__xor2_4
+*I *51958:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *51959:B 0
+2 *51958:X 0.000389332
+3 *251:8 0.000389332
+4 *51959:A *251:8 0
+5 *52033:A_N *251:8 0
+6 *91:8 *251:8 0
+7 *249:28 *251:8 0.000202653
+*RES
+1 *51958:X *251:8 44.2143 
+2 *251:8 *51959:B 38 
+*END
+
+*D_NET *252 0.00291701
+*CONN
+*I *52040:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51984:A I *D sky130_fd_sc_hd__xor2_4
+*I *51959:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52040:A1 0
+2 *51984:A 3.81433e-05
+3 *51959:X 0.000511459
+4 *252:23 0.000544602
+5 *252:8 0.0010942
+6 *252:8 *272:142 0
+7 *252:8 *272:145 0.000308661
+8 *252:23 *354:DIODE 0
+9 *252:23 *272:145 5.33597e-05
+10 *52033:A_N *252:8 0.000115022
+11 *52042:A *252:8 0
+12 *52042:A *252:23 0
+13 *40:20 *252:23 0
+14 *97:8 *252:23 1.44546e-05
+15 *232:95 *252:8 7.06588e-05
+16 *249:20 *252:8 7.39034e-05
+17 *250:14 *252:8 9.25396e-05
+*RES
+1 *51959:X *252:8 25.8025 
+2 *252:8 *51984:A 38.6214 
+3 *252:8 *252:23 37.54 
+4 *252:23 *52040:A1 38 
+*END
+
+*D_NET *253 0.00040428
+*CONN
+*I *51961:B I *D sky130_fd_sc_hd__or2_2
+*I *51960:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51961:B 7.9365e-05
+2 *51960:X 9.53785e-05
+3 *253:6 0.000174744
+4 *40:7 *51961:B 5.47927e-05
+5 *232:80 *253:6 0
+*RES
+1 *51960:X *253:6 39.5536 
+2 *253:6 *51961:B 39.5743 
+*END
+
+*D_NET *254 0.00234146
+*CONN
+*I *51986:A I *D sky130_fd_sc_hd__xor2_4
+*I *51981:A1 I *D sky130_fd_sc_hd__o21bai_2
+*I *51961:X O *D sky130_fd_sc_hd__or2_2
+*CAP
+1 *51986:A 0.000215863
+2 *51981:A1 0.000114705
+3 *51961:X 0.000400947
+4 *254:7 0.000731516
+5 *51981:A2 *51981:A1 3.0647e-05
+6 *51981:A2 *51986:A 5.21127e-05
+7 *51986:B *51986:A 0.000122294
+8 *39:8 *51981:A1 0
+9 *39:8 *51986:A 0
+10 *40:7 *51981:A1 9.75779e-05
+11 *40:7 *254:7 0.000575797
+*RES
+1 *51961:X *254:7 44.815 
+2 *254:7 *51981:A1 40.9207 
+3 *254:7 *51986:A 42.7229 
+*END
+
+*D_NET *255 0.00146157
+*CONN
+*I *51979:A I *D sky130_fd_sc_hd__xnor2_4
+*I *51980:A I *D sky130_fd_sc_hd__nor2_1
+*I *51962:Y O *D sky130_fd_sc_hd__nand2_2
+*CAP
+1 *51979:A 0.000139163
+2 *51980:A 0
+3 *51962:Y 0.000160539
+4 *255:10 0.000139163
+5 *255:8 0.000160539
+6 *51979:A *267:104 0.000491451
+7 *51979:A *272:130 5.31757e-05
+8 *255:8 *52002:A2 3.7122e-06
+9 *255:8 *272:130 8.62876e-05
+10 *51979:B *51979:A 1.5769e-05
+11 *51980:B *51979:A 5.90675e-06
+12 *37:8 *255:8 5.56203e-05
+13 *39:8 *51979:A 0.000150242
+14 *39:8 *255:8 0
+*RES
+1 *51962:Y *255:8 40.8793 
+2 *255:8 *255:10 15 
+3 *255:10 *51980:A 23 
+4 *255:10 *51979:A 29.38 
+*END
+
+*D_NET *256 0.00264266
+*CONN
+*I *51978:A1 I *D sky130_fd_sc_hd__o21ba_2
+*I *52001:A I *D sky130_fd_sc_hd__xor2_1
+*I *51963:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51978:A1 0.000176279
+2 *52001:A 0
+3 *51963:Y 0.000736684
+4 *256:8 0.000280544
+5 *256:7 0.000840949
+6 *256:7 *320:DIODE 0.000141954
+7 *256:7 *265:77 2.93747e-05
+8 *51978:A2 *51978:A1 9.28739e-05
+9 *35:6 *51978:A1 1.22803e-05
+10 *35:6 *256:8 6.58373e-05
+11 *36:10 *51978:A1 0
+12 *36:10 *256:8 0
+13 *225:10 *256:7 0.000106351
+14 *225:58 *256:7 0.000159527
+*RES
+1 *51963:Y *256:7 49.5793 
+2 *256:7 *256:8 1.90571 
+3 *256:8 *52001:A 38 
+4 *256:8 *51978:A1 40.9621 
+*END
+
+*D_NET *257 0.00159491
+*CONN
+*I *51976:A I *D sky130_fd_sc_hd__xor2_1
+*I *51964:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51976:A 0
+2 *51964:Y 0.000462614
+3 *257:8 0.000462614
+4 *257:8 *261:29 7.03663e-05
+5 *257:8 *265:45 1.32314e-05
+6 *257:8 *265:57 1.22822e-05
+7 *36:10 *257:8 0.000525423
+8 *58:6 *257:8 4.83778e-05
+*RES
+1 *51964:Y *257:8 46.2443 
+2 *257:8 *51976:A 38 
+*END
+
+*D_NET *258 0.00319641
+*CONN
+*I *51989:A I *D sky130_fd_sc_hd__xor2_1
+*I *51975:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *51965:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51989:A 9.33183e-05
+2 *51975:A1 8.81138e-05
+3 *51965:X 0.000792576
+4 *258:8 0.000285486
+5 *258:5 0.000896629
+6 *51989:A *259:20 4.6318e-06
+7 *258:8 *261:16 0
+8 *51975:B1 *51975:A1 5.50049e-05
+9 *51995:B *258:5 0.0001042
+10 *31:8 *51989:A 0.000166532
+11 *31:8 *258:8 0.000192077
+12 *32:8 *51989:A 0
+13 *32:8 *258:8 0
+14 *207:7 *258:5 0.000317553
+15 *207:13 *258:5 4.14597e-05
+16 *207:19 *258:5 0.000158828
+*RES
+1 *51965:X *258:5 35.5321 
+2 *258:5 *258:8 17.61 
+3 *258:8 *51975:A1 39.5743 
+4 *258:8 *51989:A 40.2579 
+*END
+
+*D_NET *259 0.00218183
+*CONN
+*I *51974:A I *D sky130_fd_sc_hd__nor2_1
+*I *51973:A I *D sky130_fd_sc_hd__nand2_1
+*I *51988:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51966:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51974:A 0.000203596
+2 *51973:A 0
+3 *51988:A 3.43162e-05
+4 *51966:Y 7.51353e-05
+5 *259:20 0.000474461
+6 *259:8 0.000305181
+7 *259:6 7.51353e-05
+8 *259:6 *261:16 0.000116314
+9 *259:6 *261:66 2.55642e-05
+10 *259:20 *261:23 0.000310653
+11 *259:20 *272:83 0
+12 *340:DIODE *259:6 0
+13 *51973:B *51974:A 7.97144e-05
+14 *51974:B *51974:A 9.5877e-05
+15 *51976:B *51974:A 4.95081e-05
+16 *51988:B *51988:A 1.94693e-05
+17 *51988:B *259:20 4.2062e-05
+18 *51989:A *259:20 4.6318e-06
+19 *51989:B *259:20 0.00012103
+20 *31:8 *259:20 2.36844e-05
+21 *31:21 *259:20 4.98543e-05
+22 *32:8 *259:20 7.56417e-05
+*RES
+1 *51966:Y *259:6 39.9057 
+2 *259:6 *259:8 15 
+3 *259:8 *51988:A 23.6214 
+4 *259:8 *259:20 37.2707 
+5 *259:20 *51973:A 23 
+6 *259:20 *51974:A 27.4743 
+*END
+
+*D_NET *260 0.00100081
+*CONN
+*I *51971:S I *D sky130_fd_sc_hd__mux2_1
+*I *51972:A2_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51967:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51971:S 0.000181777
+2 *51972:A2_N 4.25104e-05
+3 *51967:X 0.000109042
+4 *260:8 0.000333329
+5 *51971:S *51967:C 2.7636e-05
+6 *260:8 *51967:C 3.74072e-05
+7 *260:8 *272:188 2.98653e-05
+8 *260:8 *280:29 3.41998e-06
+9 *51967:D *51971:S 1.28427e-05
+10 *51967:D *260:8 1.69733e-05
+11 *51970:B *51972:A2_N 5.50049e-05
+12 *29:8 *51971:S 1.22906e-05
+13 *31:8 *51971:S 0.000138718
+14 *55:8 *51971:S 0
+15 *193:15 *51971:S 0
+*RES
+1 *51967:X *260:8 39.8229 
+2 *260:8 *51972:A2_N 38.6214 
+3 *260:8 *51971:S 41.6664 
+*END
+
+*D_NET *261 0.0629844
+*CONN
+*I *344:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *335:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *342:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51998:B1 I *D sky130_fd_sc_hd__o21ai_1
+*I *334:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51985:B I *D sky130_fd_sc_hd__and2_2
+*I *51987:A I *D sky130_fd_sc_hd__nand2_1
+*I *52002:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *52135:X O *D sky130_fd_sc_hd__clkbuf_4
+*CAP
+1 *344:DIODE 0
+2 *335:DIODE 0
+3 *342:DIODE 0
+4 *51998:B1 0
+5 *334:DIODE 0.000147496
+6 *51985:B 0.000286052
+7 *51987:A 0
+8 *52002:A1 0
+9 *52135:X 7.99533e-05
+10 *261:81 0.000154421
+11 *261:76 0.000691758
+12 *261:66 0.000650575
+13 *261:38 0.00050398
+14 *261:35 0.000520352
+15 *261:29 0.000693483
+16 *261:23 0.00124133
+17 *261:16 0.00193158
+18 *261:9 0.0270255
+19 *261:8 0.0259099
+20 *261:6 7.99533e-05
+21 *334:DIODE *52002:A2 0.000128401
+22 *51985:B *267:117 0
+23 *261:16 *51967:C 0
+24 *261:16 *272:83 7.91596e-05
+25 *261:16 *279:12 0
+26 *261:16 *279:22 0
+27 *261:35 *52002:A2 0.000103637
+28 *261:66 *272:83 9.28842e-05
+29 *261:76 *330:DIODE 3.72639e-05
+30 *261:76 *272:83 0.000187405
+31 *340:DIODE *261:66 0
+32 *51972:B2 *261:16 0
+33 *51978:A2 *261:29 0.000102998
+34 *51988:B *261:23 1.79538e-05
+35 *51989:B *261:23 1.76557e-05
+36 *51994:B *261:16 0
+37 *51998:A2 *261:23 0.000269775
+38 *52002:B1 *261:29 9.84851e-05
+39 *7:7 *261:16 0
+40 *28:26 *261:16 0
+41 *31:8 *261:16 0
+42 *35:6 *261:29 0.000122386
+43 *45:7 *51985:B 0.00022296
+44 *45:12 *51985:B 1.19692e-05
+45 *58:6 *261:29 0
+46 *60:8 *261:29 0.000348456
+47 *60:8 *261:38 0
+48 *66:8 *51985:B 0.000397602
+49 *207:32 *261:16 9.74235e-05
+50 *225:10 *261:29 5.61414e-05
+51 *225:15 *261:23 5.41437e-05
+52 *225:22 *261:23 9.84851e-05
+53 *225:28 *261:66 0
+54 *225:28 *261:76 0
+55 *257:8 *261:29 7.03663e-05
+56 *258:8 *261:16 0
+57 *259:6 *261:16 0.000116314
+58 *259:6 *261:66 2.55642e-05
+59 *259:20 *261:23 0.000310653
+*RES
+1 *52135:X *261:6 39.2014 
+2 *261:6 *261:8 15 
+3 *261:8 *261:9 345.556 
+4 *261:9 *261:16 34.2229 
+5 *261:16 *261:23 28.5264 
+6 *261:23 *261:29 42.4079 
+7 *261:29 *52002:A1 23 
+8 *261:29 *261:35 2.52714 
+9 *261:35 *261:38 19.0186 
+10 *261:38 *51987:A 38 
+11 *261:38 *51985:B 45.8921 
+12 *261:35 *334:DIODE 25.5271 
+13 *261:23 *51998:B1 23 
+14 *261:16 *261:66 2.61 
+15 *261:66 *342:DIODE 38 
+16 *261:66 *261:76 25.6471 
+17 *261:76 *261:81 32.9621 
+18 *261:81 *335:DIODE 23 
+19 *261:76 *344:DIODE 23 
+*END
+
+*D_NET *262 0.031108
+*CONN
+*I *51906:A I *D sky130_fd_sc_hd__and4_1
+*I *51893:A I *D sky130_fd_sc_hd__buf_2
+*I *51921:A I *D sky130_fd_sc_hd__and4_1
+*I *289:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *313:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *302:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *285:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51941:A I *D sky130_fd_sc_hd__and4_1
+*I *52136:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *51906:A 0
+2 *51893:A 0
+3 *51921:A 0
+4 *289:DIODE 0
+5 *313:DIODE 0.000197547
+6 *302:DIODE 0
+7 *285:DIODE 0
+8 *51941:A 1.49804e-05
+9 *52136:X 0.000139862
+10 *262:98 0.000112505
+11 *262:71 0.000214208
+12 *262:64 0.000339483
+13 *262:61 0.000836515
+14 *262:56 0.000781656
+15 *262:53 0.00116825
+16 *262:26 0.00122436
+17 *262:17 0.000339939
+18 *262:15 0.000341152
+19 *262:14 0.00052876
+20 *262:9 0.00465277
+21 *262:8 0.00432181
+22 *262:6 0.000139862
+23 *313:DIODE *304:DIODE 0
+24 *313:DIODE *272:52 0
+25 *313:DIODE *279:12 0.000140671
+26 *313:DIODE *279:22 3.72639e-05
+27 *51941:A *51941:B 5.50106e-05
+28 *262:9 *263:9 0.00312886
+29 *262:9 *282:18 0.00114187
+30 *262:9 *284:9 0.00622488
+31 *262:14 *280:49 0.000185755
+32 *262:14 *281:63 7.76364e-06
+33 *262:15 *51906:C 4.08664e-05
+34 *262:15 *51921:B 1.22822e-05
+35 *262:15 *51921:C 4.96717e-05
+36 *262:15 *280:43 0.000272377
+37 *262:15 *281:63 0.000137651
+38 *262:17 *51921:C 2.93747e-05
+39 *262:26 *51921:C 0.000167431
+40 *262:26 *281:45 0.000566283
+41 *262:53 *51967:A 1.23486e-05
+42 *262:53 *51991:A1 0
+43 *262:53 *280:29 2.35393e-05
+44 *262:53 *280:35 0.000349807
+45 *262:53 *281:45 0
+46 *262:56 *51967:C 3.17516e-05
+47 *262:56 *280:29 4.79641e-05
+48 *262:56 *281:29 0.000228903
+49 *262:61 *279:12 3.83778e-05
+50 *262:61 *280:14 0
+51 *262:61 *281:17 5.50106e-05
+52 *262:61 *281:29 0.000603438
+53 *262:64 *280:17 0.000183733
+54 *262:64 *281:17 4.04206e-05
+55 *262:71 *304:DIODE 0
+56 *262:71 *278:34 0
+57 *262:71 *280:14 0
+58 *262:71 *281:11 0.000118026
+59 *262:71 *281:17 0.000128401
+60 *262:98 *281:53 7.81176e-05
+61 *262:98 *281:63 0
+62 *262:98 *281:206 1.58805e-05
+63 *51967:D *262:53 0.000108978
+64 *51969:A *262:53 5.3304e-05
+65 *51970:B *262:53 0.000109692
+66 *51990:A_N *262:53 9.67842e-05
+67 *51991:B2 *262:53 0
+68 *10:7 *262:6 0
+69 *27:6 *262:26 6.12496e-06
+70 *28:15 *262:53 0.000200318
+71 *183:15 *262:26 8.98318e-06
+72 *189:31 *262:26 4.5051e-05
+73 *189:45 *262:26 0.000195392
+74 *189:45 *262:53 8.68016e-06
+75 *192:37 *262:53 0.000463694
+76 *203:8 *262:14 0
+77 *212:23 *262:26 2.80512e-05
+78 *215:8 *262:14 0
+79 *232:50 *262:98 0.000111852
+80 *234:8 *51941:A 5.50106e-05
+81 *234:8 *262:53 0.000108681
+*RES
+1 *52136:X *262:6 40.2579 
+2 *262:6 *262:8 15 
+3 *262:8 *262:9 141.168 
+4 *262:9 *262:14 35.4271 
+5 *262:14 *262:15 4.90929 
+6 *262:15 *262:17 0.621429 
+7 *262:17 *262:26 23.7829 
+8 *262:26 *51941:A 38.6214 
+9 *262:26 *262:53 49.3264 
+10 *262:53 *262:56 19.4329 
+11 *262:56 *262:61 23.4929 
+12 *262:61 *262:64 18.0036 
+13 *262:64 *262:71 34.785 
+14 *262:71 *285:DIODE 23 
+15 *262:64 *302:DIODE 23 
+16 *262:61 *313:DIODE 42.7229 
+17 *262:56 *289:DIODE 23 
+18 *262:17 *51921:A 23 
+19 *262:15 *262:98 32.61 
+20 *262:98 *51893:A 23 
+21 *262:14 *51906:A 23 
+*END
+
+*D_NET *263 0.0372347
+*CONN
+*I *51924:A I *D sky130_fd_sc_hd__nand2_1
+*I *286:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *307:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51899:A I *D sky130_fd_sc_hd__buf_2
+*I *52137:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *51924:A 2.14194e-05
+2 *286:DIODE 0
+3 *307:DIODE 0.000171842
+4 *51899:A 0
+5 *52137:X 7.58908e-05
+6 *263:42 0.00060805
+7 *263:40 0.000898028
+8 *263:30 0.00127948
+9 *263:12 0.000938767
+10 *263:9 0.00806476
+11 *263:8 0.00792224
+12 *263:6 7.58908e-05
+13 *307:DIODE *282:5 0.000105934
+14 *263:9 *282:18 0.000272377
+15 *263:9 *283:46 0.000795772
+16 *263:9 *284:9 0.00622148
+17 *263:12 *282:18 0
+18 *263:30 *282:18 0
+19 *263:40 *51921:C 0
+20 *263:40 *280:35 0.000265472
+21 *263:40 *281:53 0.000108681
+22 *263:40 *281:206 0.000231212
+23 *263:42 *282:5 0.00117492
+24 *51924:B *51924:A 5.90675e-06
+25 *51926:A1_N *263:30 1.4649e-05
+26 *51926:A2_N *263:30 0.000431241
+27 *51926:A2_N *263:40 1.24376e-05
+28 *51926:B1 *263:30 0.000185428
+29 *51968:A2 *263:40 1.50677e-05
+30 *51968:A2 *263:42 0.000139352
+31 *51968:B1 *263:40 5.90075e-05
+32 *8:8 *263:9 0.00122192
+33 *8:23 *263:9 0.000651216
+34 *11:7 *263:6 5.56306e-05
+35 *183:7 *263:40 9.24795e-06
+36 *183:15 *263:40 2.45645e-05
+37 *183:15 *263:42 2.18506e-05
+38 *183:54 *263:12 9.5956e-06
+39 *183:54 *263:30 8.62192e-05
+40 *189:17 *263:40 0.000313255
+41 *189:89 *263:30 0
+42 *192:8 *263:30 0.000172375
+43 *193:27 *263:42 5.50049e-05
+44 *199:20 *263:30 0.000108681
+45 *203:13 *263:30 5.61255e-06
+46 *203:24 *263:30 2.64616e-05
+47 *212:23 *263:40 6.0039e-05
+48 *212:29 *263:40 0.000144231
+49 *212:41 *263:30 0.000452558
+50 *212:41 *263:40 4.6595e-05
+51 *212:54 *263:30 9.57026e-06
+52 *232:47 *263:40 0.000481943
+53 *232:47 *263:42 4.04303e-05
+54 *235:8 *263:30 1.34914e-05
+55 *262:9 *263:9 0.00312886
+*RES
+1 *52137:X *263:6 39.5536 
+2 *263:6 *263:8 15 
+3 *263:8 *263:9 188.811 
+4 *263:9 *263:12 17.2579 
+5 *263:12 *51899:A 38 
+6 *263:12 *263:30 33.0629 
+7 *263:30 *263:40 44.5621 
+8 *263:40 *263:42 13.9614 
+9 *263:42 *307:DIODE 26.8529 
+10 *263:42 *286:DIODE 23 
+11 *263:30 *51924:A 23.4971 
+*END
+
+*D_NET *264 0.038229
+*CONN
+*I *51920:A I *D sky130_fd_sc_hd__nand2_1
+*I *51940:A I *D sky130_fd_sc_hd__and2_1
+*I *312:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *295:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *301:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51914:A I *D sky130_fd_sc_hd__buf_2
+*I *52138:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51920:A 0
+2 *51940:A 2.14194e-05
+3 *312:DIODE 0
+4 *295:DIODE 0.000344884
+5 *301:DIODE 0
+6 *51914:A 0.000114667
+7 *52138:X 0
+8 *264:59 7.99533e-05
+9 *264:48 0.00069901
+10 *264:40 0.000384958
+11 *264:30 0.000383919
+12 *264:25 0.000811083
+13 *264:18 0.00216029
+14 *264:9 0.0150905
+15 *264:8 0.0142412
+16 *264:5 0.000679825
+17 *51914:A *281:216 7.81176e-05
+18 *315:DIODE *295:DIODE 5.72217e-05
+19 *315:DIODE *264:40 0.000443673
+20 *315:DIODE *264:48 8.90115e-05
+21 *51915:A1 *264:9 2.67281e-05
+22 *51930:B *264:18 0
+23 *51947:B *264:59 0
+24 *51948:B *264:40 0.000272383
+25 *52059:A *264:9 5.50106e-05
+26 *52059:B *264:9 0.000103637
+27 *52090:A1 *264:9 3.22879e-05
+28 *52090:A2 *264:9 2.44913e-05
+29 *52116:A1 *264:9 3.22879e-05
+30 *52116:A2 *264:9 2.44913e-05
+31 *73:15 *264:9 2.93747e-05
+32 *113:5 *264:9 0.000205913
+33 *146:5 *264:9 0.000213173
+34 *147:19 *264:9 0.000123934
+35 *171:5 *264:9 0.000345176
+36 *212:54 *264:18 0
+37 *212:66 *264:25 0
+38 *213:13 *264:25 0.000188435
+39 *223:7 *264:25 3.71251e-05
+40 *232:50 *51914:A 0.000215791
+41 *232:50 *264:30 0.000195248
+42 *232:60 *51940:A 5.90675e-06
+43 *232:60 *264:25 0.000206422
+44 *232:60 *264:30 3.71369e-05
+45 *233:14 *264:30 0.000171906
+46 *240:8 *264:30 2.45549e-06
+*RES
+1 *52138:X *264:5 38 
+2 *264:5 *264:8 27.8221 
+3 *264:8 *264:9 234.548 
+4 *264:9 *264:18 34.9698 
+5 *264:18 *264:25 27.0764 
+6 *264:25 *264:30 19.1843 
+7 *264:30 *51914:A 40.9621 
+8 *264:30 *264:40 19.9093 
+9 *264:40 *301:DIODE 23 
+10 *264:40 *264:48 4.68143 
+11 *264:48 *295:DIODE 27.9093 
+12 *264:48 *264:59 31.2014 
+13 *264:59 *312:DIODE 23 
+14 *264:25 *51940:A 23.4971 
+15 *264:18 *51920:A 38 
+*END
+
+*D_NET *265 0.0555783
+*CONN
+*I *51950:A I *D sky130_fd_sc_hd__nand2_1
+*I *51932:A I *D sky130_fd_sc_hd__buf_2
+*I *308:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *322:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51964:A I *D sky130_fd_sc_hd__nand2_1
+*I *317:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52139:X O *D sky130_fd_sc_hd__clkbuf_4
+*CAP
+1 *51950:A 8.29755e-06
+2 *51932:A 0
+3 *308:DIODE 0
+4 *322:DIODE 2.8279e-05
+5 *51964:A 0
+6 *317:DIODE 5.66008e-05
+7 *52139:X 0
+8 *265:77 0.000159989
+9 *265:68 0.000105488
+10 *265:57 0.000446925
+11 *265:45 0.000368632
+12 *265:41 0.000523294
+13 *265:31 0.000868088
+14 *265:26 0.000632536
+15 *265:21 0.00212753
+16 *265:13 0.00603567
+17 *265:11 0.0040522
+18 *265:9 0.0121351
+19 *265:8 0.0131658
+20 *265:5 0.00105421
+21 *317:DIODE *272:108 2.93747e-05
+22 *322:DIODE *272:92 0.000141954
+23 *265:9 *268:9 0.00536264
+24 *265:13 *266:50 0.00044458
+25 *265:13 *268:9 0.00153621
+26 *265:41 *272:100 9.8971e-06
+27 *265:41 *272:108 0.000446275
+28 *265:45 *272:100 1.57925e-05
+29 *265:57 *272:92 0.000185434
+30 *265:57 *272:100 0.000697107
+31 *51933:A1 *265:21 0.000311003
+32 *51934:B1 *265:21 9.61128e-05
+33 *51951:A *265:31 0.00014196
+34 *51951:B *265:31 3.71251e-05
+35 *51953:A *265:21 5.56356e-05
+36 *51977:C *265:57 2.70935e-05
+37 *52001:B *265:57 5.50106e-05
+38 *52025:A *265:13 4.95081e-05
+39 *52025:B *265:13 0.000272383
+40 *52061:A *265:13 9.84851e-05
+41 *35:6 *265:77 0
+42 *36:10 *265:57 0.00026961
+43 *36:10 *265:77 4.6318e-06
+44 *58:6 *265:68 0
+45 *60:8 *265:57 5.3304e-05
+46 *83:8 *265:13 0.000442771
+47 *118:7 *265:13 6.22712e-05
+48 *118:14 *265:13 9.5877e-05
+49 *119:9 *265:13 0.000245277
+50 *203:94 *265:13 0.000140259
+51 *211:8 *265:21 0.00052531
+52 *212:66 *265:21 0.000357631
+53 *224:11 *265:21 1.37702e-05
+54 *225:10 *265:77 3.22879e-05
+55 *225:23 *322:DIODE 5.83407e-05
+56 *225:23 *265:57 3.17516e-05
+57 *225:58 *265:21 5.37348e-06
+58 *225:64 *265:21 0.000242485
+59 *225:72 *265:21 4.38307e-05
+60 *225:92 *265:13 8.48243e-05
+61 *225:92 *265:21 0.00022826
+62 *225:100 *265:13 0.000139838
+63 *227:8 *265:21 9.84794e-05
+64 *232:60 *265:26 7.56417e-05
+65 *242:5 *265:31 0.000315852
+66 *243:5 *51950:A 3.5536e-06
+67 *243:5 *265:31 8.67684e-05
+68 *243:19 *265:26 1.19796e-05
+69 *244:8 *265:31 1.32939e-05
+70 *246:8 *265:21 5.79559e-05
+71 *256:7 *265:77 2.93747e-05
+72 *257:8 *265:45 1.32314e-05
+73 *257:8 *265:57 1.22822e-05
+*RES
+1 *52139:X *265:5 38 
+2 *265:5 *265:8 35.2171 
+3 *265:8 *265:9 193.337 
+4 *265:9 *265:11 0.497143 
+5 *265:11 *265:13 85.9021 
+6 *265:13 *265:21 36.3018 
+7 *265:21 *265:26 32.2579 
+8 *265:26 *265:31 10.6679 
+9 *265:31 *317:DIODE 24.0979 
+10 *265:31 *265:41 7.06357 
+11 *265:41 *265:45 1.11857 
+12 *265:45 *51964:A 23 
+13 *265:45 *265:57 12.2421 
+14 *265:57 *322:DIODE 24.5743 
+15 *265:57 *265:68 31.5536 
+16 *265:68 *308:DIODE 23 
+17 *265:41 *265:77 32.8793 
+18 *265:77 *51932:A 23 
+19 *265:26 *51950:A 23.1864 
+*END
+
+*D_NET *266 0.0599822
+*CONN
+*I *366:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52089:A I *D sky130_fd_sc_hd__nand2_1
+*I *383:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52061:B I *D sky130_fd_sc_hd__nand2_1
+*I *350:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52027:B I *D sky130_fd_sc_hd__nand2_1
+*I *318:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51956:C1 I *D sky130_fd_sc_hd__o211a_1
+*I *51957:A2 I *D sky130_fd_sc_hd__a211o_1
+*I *321:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51962:B I *D sky130_fd_sc_hd__nand2_2
+*I *52002:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52000:A I *D sky130_fd_sc_hd__nand2_1
+*I *345:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *343:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *319:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *359:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52120:A I *D sky130_fd_sc_hd__nand2_1
+*I *52140:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *366:DIODE 0.00032298
+2 *52089:A 0
+3 *383:DIODE 0
+4 *52061:B 0
+5 *350:DIODE 0
+6 *52027:B 2.34823e-05
+7 *318:DIODE 0
+8 *51956:C1 0
+9 *51957:A2 0
+10 *321:DIODE 0
+11 *51962:B 0
+12 *52002:A2 0.000368377
+13 *52000:A 2.34823e-05
+14 *345:DIODE 0
+15 *343:DIODE 9.55744e-05
+16 *319:DIODE 0.000206304
+17 *359:DIODE 0
+18 *52120:A 9.83959e-05
+19 *52140:X 0.000297407
+20 *266:155 0.00023341
+21 *266:128 0.000444209
+22 *266:114 9.74302e-05
+23 *266:103 0.000399475
+24 *266:101 0.000872696
+25 *266:99 0.000755269
+26 *266:97 0.000837346
+27 *266:86 0.00119512
+28 *266:80 0.000232339
+29 *266:78 0.000428146
+30 *266:74 0.000746783
+31 *266:72 0.0013883
+32 *266:64 0.00231207
+33 *266:58 0.00196125
+34 *266:50 0.000739628
+35 *266:40 0.000735236
+36 *266:31 0.000536361
+37 *266:29 0.0001094
+38 *266:27 0.000609503
+39 *266:12 0.000992918
+40 *266:9 0.0174452
+41 *266:8 0.0173
+42 *266:6 0.000297407
+43 *366:DIODE *267:39 0
+44 *52120:A *281:134 0.000228909
+45 *266:9 *267:19 0.000441978
+46 *266:27 *52089:B 2.28308e-05
+47 *266:27 *281:134 6.82285e-05
+48 *266:27 *281:142 0.000210182
+49 *266:29 *281:134 0.000217372
+50 *266:31 *281:134 4.34745e-05
+51 *266:128 *272:118 8.26672e-05
+52 *334:DIODE *52002:A2 0.000128401
+53 *358:DIODE *266:58 5.38249e-05
+54 *51956:A2 *266:155 5.79559e-05
+55 *51957:A1 *266:86 0.000208791
+56 *51960:B *266:97 0
+57 *51978:A2 *266:101 0.000185434
+58 *52002:B1 *266:114 0
+59 *52022:B1 *266:64 0.000286222
+60 *52028:A1 *266:74 7.4416e-05
+61 *52028:B1_N *266:74 0.000214931
+62 *52029:A *266:72 5.50049e-05
+63 *52032:A *266:72 0
+64 *52033:A_N *266:74 5.50049e-05
+65 *52033:B *266:74 3.6485e-05
+66 *52033:C *266:74 5.50049e-05
+67 *52058:A *266:64 5.47927e-05
+68 *52067:A1 *52027:B 0
+69 *52067:A1 *266:72 0
+70 *52093:A *266:40 0
+71 *52116:A1 *266:40 0
+72 *52124:A *266:27 5.50049e-05
+73 *37:8 *266:101 0.000491451
+74 *37:8 *266:128 0.000139647
+75 *59:8 *266:101 1.32314e-05
+76 *59:8 *266:103 0.00010018
+77 *59:8 *266:114 0
+78 *80:5 *266:64 0.000491451
+79 *80:18 *266:64 0.000139352
+80 *81:7 *266:64 0.000223692
+81 *82:8 *266:64 2.32101e-05
+82 *85:5 *266:72 0.000271476
+83 *86:5 *266:72 1.22822e-05
+84 *86:5 *266:74 0.000156058
+85 *87:8 *266:72 0
+86 *88:8 *266:72 0
+87 *91:8 *266:74 0.000404502
+88 *115:9 *266:58 1.32314e-05
+89 *115:9 *266:64 0.000173278
+90 *115:20 *266:58 7.1349e-05
+91 *144:8 *266:40 0
+92 *145:6 *266:40 0
+93 *146:11 *266:40 2.71951e-05
+94 *147:19 *266:40 8.16356e-05
+95 *149:8 *266:40 0
+96 *149:8 *266:50 0
+97 *150:6 *266:50 0
+98 *151:12 *266:50 2.76611e-06
+99 *152:8 *266:50 0
+100 *177:6 *366:DIODE 2.46345e-05
+101 *177:6 *266:12 0.000243587
+102 *179:8 *366:DIODE 8.4047e-05
+103 *179:8 *266:27 1.21972e-05
+104 *203:85 *266:58 0
+105 *210:8 *266:64 5.50106e-05
+106 *210:8 *266:72 0.000166522
+107 *212:87 *266:72 0
+108 *212:99 *266:72 0
+109 *232:60 *319:DIODE 0
+110 *232:74 *266:86 5.50106e-05
+111 *232:74 *266:97 7.33354e-05
+112 *232:80 *266:97 6.25829e-05
+113 *232:80 *266:155 5.56279e-05
+114 *243:19 *266:97 0.000153145
+115 *244:8 *319:DIODE 4.16868e-05
+116 *244:25 *266:80 5.79559e-05
+117 *244:25 *266:86 1.10658e-05
+118 *244:25 *266:155 0.000110184
+119 *246:8 *319:DIODE 0
+120 *246:18 *319:DIODE 6.03737e-05
+121 *246:18 *266:97 9.21347e-06
+122 *247:7 *266:97 6.51763e-05
+123 *248:8 *319:DIODE 5.56203e-05
+124 *248:8 *266:97 1.12487e-05
+125 *248:17 *266:155 0
+126 *250:9 *266:74 6.28529e-05
+127 *250:9 *266:78 0.000173256
+128 *250:9 *266:80 7.51453e-06
+129 *255:8 *52002:A2 3.7122e-06
+130 *261:35 *52002:A2 0.000103637
+131 *265:13 *266:50 0.00044458
+*RES
+1 *52140:X *266:6 43.4271 
+2 *266:6 *266:8 15 
+3 *266:8 *266:9 297.913 
+4 *266:9 *266:12 18.3143 
+5 *266:12 *266:27 26.1236 
+6 *266:27 *266:29 2.52714 
+7 *266:29 *266:31 0.621429 
+8 *266:31 *52120:A 25.5271 
+9 *266:31 *266:40 22.54 
+10 *266:40 *359:DIODE 38 
+11 *266:40 *266:50 23.9279 
+12 *266:50 *266:58 38.0164 
+13 *266:58 *266:64 24.6086 
+14 *266:64 *266:72 43.4021 
+15 *266:72 *266:74 15.3907 
+16 *266:74 *266:78 3.97714 
+17 *266:78 *266:80 1.09786 
+18 *266:80 *266:86 18.8529 
+19 *266:86 *319:DIODE 42.3707 
+20 *266:86 *266:97 29.6864 
+21 *266:97 *266:99 0.621429 
+22 *266:99 *266:101 13.485 
+23 *266:101 *266:103 3.95643 
+24 *266:103 *343:DIODE 24.5743 
+25 *266:103 *266:114 31.5536 
+26 *266:114 *345:DIODE 23 
+27 *266:101 *52000:A 23.4971 
+28 *266:99 *266:128 32.2579 
+29 *266:128 *52002:A2 30.7679 
+30 *266:128 *51962:B 23 
+31 *266:97 *321:DIODE 23 
+32 *266:80 *51957:A2 23 
+33 *266:78 *266:155 33.9979 
+34 *266:155 *51956:C1 23 
+35 *266:74 *318:DIODE 23 
+36 *266:72 *52027:B 23.4971 
+37 *266:64 *350:DIODE 23 
+38 *266:50 *52061:B 23 
+39 *266:29 *383:DIODE 23 
+40 *266:27 *52089:A 23 
+41 *266:12 *366:DIODE 42.785 
+*END
+
+*D_NET *267 0.0644525
+*CONN
+*I *380:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *371:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *368:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52111:A I *D sky130_fd_sc_hd__and3_1
+*I *360:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52068:A I *D sky130_fd_sc_hd__nand2_1
+*I *352:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *351:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52034:B1 I *D sky130_fd_sc_hd__o211ai_1
+*I *52035:A1 I *D sky130_fd_sc_hd__a211o_1
+*I *331:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *336:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51987:B I *D sky130_fd_sc_hd__nand2_1
+*I *51982:A I *D sky130_fd_sc_hd__and2_1
+*I *52096:A I *D sky130_fd_sc_hd__nand2_1
+*I *52117:A I *D sky130_fd_sc_hd__nand4_1
+*I *52118:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *377:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52141:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *380:DIODE 0
+2 *371:DIODE 0.000366869
+3 *368:DIODE 0.000270734
+4 *52111:A 0
+5 *360:DIODE 0
+6 *52068:A 2.34823e-05
+7 *352:DIODE 0
+8 *351:DIODE 0
+9 *52034:B1 1.99747e-05
+10 *52035:A1 1.96641e-05
+11 *331:DIODE 0
+12 *336:DIODE 0
+13 *51987:B 0.000125373
+14 *51982:A 2.13128e-05
+15 *52096:A 0
+16 *52117:A 0.000228994
+17 *52118:A1 0.000103387
+18 *377:DIODE 0.000191684
+19 *52141:X 0
+20 *267:117 0.000397406
+21 *267:104 0.00187844
+22 *267:94 0.00157191
+23 *267:92 0.00081388
+24 *267:90 0.000796916
+25 *267:85 0.000627343
+26 *267:78 0.000901093
+27 *267:72 0.00103774
+28 *267:64 0.000780249
+29 *267:62 0.00114228
+30 *267:50 0.00114508
+31 *267:46 0.000210901
+32 *267:43 0.000617796
+33 *267:39 0.00154373
+34 *267:27 0.00109583
+35 *267:19 0.000394278
+36 *267:16 0.000561254
+37 *267:5 0.0192779
+38 *267:4 0.0188158
+39 *51982:A *272:130 5.47983e-06
+40 *52117:A *281:152 0
+41 *267:39 *281:145 0
+42 *267:39 *281:152 0
+43 *267:72 *268:109 3.24466e-05
+44 *267:78 *268:65 5.26204e-05
+45 *267:78 *268:109 0
+46 *267:92 *272:142 0.000172197
+47 *267:94 *272:130 2.16575e-05
+48 *267:94 *272:142 0.00031749
+49 *267:104 *272:130 7.45823e-05
+50 *267:117 *268:85 0
+51 *366:DIODE *267:39 0
+52 *384:DIODE *267:5 5.10686e-05
+53 *385:DIODE *267:5 0.000103637
+54 *386:DIODE *267:5 0.000185428
+55 *387:DIODE *267:5 0.000128391
+56 *388:DIODE *267:5 0.000185428
+57 *399:DIODE *267:16 0.000141888
+58 *51979:A *267:104 0.000491451
+59 *51979:B *267:104 9.8971e-06
+60 *51985:B *267:117 0
+61 *52034:A1 *52035:A1 4.00259e-06
+62 *52034:A1 *267:90 0.000290273
+63 *52034:A1 *267:92 5.70419e-05
+64 *52034:A2 *267:90 2.55136e-05
+65 *52034:C1 *52034:B1 1.24376e-05
+66 *52034:C1 *267:90 4.00259e-06
+67 *52035:B1 *52035:A1 5.90675e-06
+68 *52036:C *267:85 0
+69 *52037:A2 *52034:B1 5.3304e-05
+70 *52037:A2 *267:90 0.000191482
+71 *52064:B *267:62 0.00011641
+72 *52066:A *267:62 0.000159321
+73 *52072:A1 *267:85 0.000135037
+74 *52072:A2 *267:85 0
+75 *52072:B1_N *267:85 5.3304e-05
+76 *52094:A *267:39 0
+77 *52123:C *267:19 2.99898e-05
+78 *52136:A *267:5 0.000131304
+79 *52137:A *267:5 7.88926e-05
+80 *52138:A *267:5 5.50106e-05
+81 *52139:A *267:5 5.41385e-05
+82 *52140:A *267:5 5.50106e-05
+83 *52141:A *267:5 0.000317553
+84 *52150:A *267:5 0.00014196
+85 *15:8 *267:5 3.17634e-05
+86 *38:7 *267:104 6.71188e-05
+87 *39:8 *267:104 1.57571e-05
+88 *45:12 *267:117 0
+89 *93:5 *267:90 0.000141954
+90 *94:6 *267:85 0.000185755
+91 *95:6 *267:78 0
+92 *123:8 *267:62 0.000143655
+93 *124:7 *267:72 5.50106e-05
+94 *124:11 *267:72 0.000138727
+95 *125:6 *267:72 1.02387e-05
+96 *128:17 *267:78 0.000114083
+97 *129:5 *267:78 0.000173442
+98 *129:5 *267:85 0.000261827
+99 *129:14 *267:78 0
+100 *148:8 *267:39 0
+101 *151:23 *267:43 0
+102 *151:23 *267:50 3.9889e-05
+103 *153:6 *267:39 0
+104 *153:9 *267:43 1.94693e-05
+105 *154:5 *368:DIODE 9.9979e-05
+106 *154:5 *267:39 0
+107 *154:5 *267:43 6.7081e-05
+108 *157:9 *267:72 5.38135e-05
+109 *167:7 *267:43 0.000269781
+110 *172:10 *267:39 0
+111 *173:5 *52118:A1 0.000141954
+112 *173:5 *267:19 6.53382e-05
+113 *173:10 *52117:A 6.7177e-06
+114 *176:7 *52117:A 0.000227208
+115 *176:12 *52117:A 6.08751e-05
+116 *176:12 *267:39 4.6318e-06
+117 *178:8 *267:39 6.53445e-05
+118 *179:8 *267:39 0
+119 *180:10 *267:39 0.000318482
+120 *203:108 *267:62 1.39317e-05
+121 *203:125 *267:62 0.000596956
+122 *203:131 *267:50 0.00031495
+123 *203:131 *267:62 3.58447e-05
+124 *203:137 *267:46 9.88574e-06
+125 *203:137 *267:50 3.53115e-05
+126 *212:99 *267:72 0.000180812
+127 *212:105 *267:72 5.67058e-05
+128 *225:146 *52118:A1 0.000142513
+129 *225:146 *267:19 0.000480242
+130 *225:151 *267:16 0
+131 *232:98 *52034:B1 1.56665e-05
+132 *232:98 *267:90 2.4754e-05
+133 *249:28 *267:92 0.000396238
+134 *266:9 *267:19 0.000441978
+*RES
+1 *52141:X *267:4 23 
+2 *267:4 *267:5 354.608 
+3 *267:5 *377:DIODE 26.48 
+4 *267:5 *267:16 35.4271 
+5 *267:16 *267:19 8.74143 
+6 *267:19 *52118:A1 26.0036 
+7 *267:19 *267:27 15 
+8 *267:27 *52117:A 42.785 
+9 *267:27 *267:39 33.1043 
+10 *267:39 *267:43 21.4421 
+11 *267:43 *267:46 15.6214 
+12 *267:46 *267:50 4.93 
+13 *267:50 *52096:A 23 
+14 *267:50 *267:62 18.7879 
+15 *267:62 *267:64 3.00357 
+16 *267:64 *267:72 40.7507 
+17 *267:72 *267:78 37.8507 
+18 *267:78 *267:85 38.4721 
+19 *267:85 *267:90 5.90357 
+20 *267:90 *267:92 13.0086 
+21 *267:92 *267:94 4.43286 
+22 *267:94 *51982:A 23.4971 
+23 *267:94 *267:104 20.1757 
+24 *267:104 *51987:B 24.9471 
+25 *267:104 *267:117 36.8357 
+26 *267:117 *336:DIODE 23 
+27 *267:92 *331:DIODE 23 
+28 *267:90 *52035:A1 23.4971 
+29 *267:85 *52034:B1 23.6214 
+30 *267:78 *351:DIODE 23 
+31 *267:72 *352:DIODE 23 
+32 *267:64 *52068:A 23.4971 
+33 *267:62 *360:DIODE 23 
+34 *267:46 *52111:A 23 
+35 *267:43 *368:DIODE 42.3707 
+36 *267:39 *371:DIODE 28.8829 
+37 *267:16 *380:DIODE 23 
+*END
+
+*D_NET *268 0.0708756
+*CONN
+*I *373:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52113:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52114:A I *D sky130_fd_sc_hd__and3_1
+*I *361:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *370:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52101:A I *D sky130_fd_sc_hd__nand2_1
+*I *52071:A I *D sky130_fd_sc_hd__and2_1
+*I *353:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52041:A I *D sky130_fd_sc_hd__and2_1
+*I *333:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51985:A I *D sky130_fd_sc_hd__and2_2
+*I *375:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52142:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *373:DIODE 0.000194752
+2 *52113:A1 0
+3 *52114:A 0
+4 *361:DIODE 0
+5 *370:DIODE 0
+6 *52101:A 0
+7 *52071:A 0
+8 *353:DIODE 0
+9 *52041:A 0
+10 *333:DIODE 0
+11 *51985:A 0
+12 *375:DIODE 0
+13 *52142:X 0
+14 *268:109 0.000157329
+15 *268:85 0.000355852
+16 *268:78 0.00164501
+17 *268:70 0.00139222
+18 *268:66 0.000510226
+19 *268:65 0.000887191
+20 *268:60 0.000784727
+21 *268:52 0.000563238
+22 *268:50 0.000226432
+23 *268:48 0.000421685
+24 *268:43 0.000969628
+25 *268:38 0.00112248
+26 *268:28 0.000594259
+27 *268:24 0.000212996
+28 *268:21 0.00041387
+29 *268:12 0.000379893
+30 *268:9 0.0210885
+31 *268:8 0.0218264
+32 *268:5 0.000966711
+33 *268:66 *273:7 0.00148876
+34 *268:70 *273:7 0.000401899
+35 *268:78 *271:5 0.000396582
+36 *268:78 *273:7 1.03955e-05
+37 *268:78 *273:11 0.000193469
+38 *268:85 *271:5 9.84851e-05
+39 *369:DIODE *268:43 0.000663653
+40 *374:DIODE *268:21 6.7177e-06
+41 *390:DIODE *268:8 4.83778e-05
+42 *52009:A *268:78 4.73456e-05
+43 *52037:B1 *268:60 0
+44 *52038:A *268:66 7.44354e-05
+45 *52038:B *268:66 0.000128391
+46 *52040:A2 *268:70 0
+47 *52040:A2 *268:78 0.000269775
+48 *52044:B *268:85 0
+49 *52048:A1 *268:66 0.000304321
+50 *52048:A1 *268:70 5.50106e-05
+51 *52048:A2 *268:66 9.84851e-05
+52 *52071:B *268:60 7.91876e-05
+53 *52079:A *268:60 0.000269742
+54 *52100:B *268:43 0.00010018
+55 *52103:A *268:43 0.000122217
+56 *52103:C *268:43 0.000359332
+57 *52113:A2 *268:21 2.39911e-05
+58 *52113:B1 *268:24 5.90675e-06
+59 *52113:B1 *268:28 0.000164516
+60 *52115:A *373:DIODE 3.53115e-05
+61 *52126:A *268:38 0.000409011
+62 *43:11 *268:78 0.000259146
+63 *66:8 *268:85 0
+64 *95:6 *268:65 0
+65 *98:7 *268:70 5.98028e-05
+66 *98:7 *268:78 0.000481943
+67 *99:7 *268:66 4.04206e-05
+68 *99:7 *268:70 9.74625e-05
+69 *101:8 *268:65 0
+70 *103:10 *268:65 1.83564e-05
+71 *105:7 *268:66 0.000181494
+72 *123:8 *268:43 0
+73 *126:7 *268:43 8.47306e-05
+74 *128:17 *268:65 0
+75 *135:8 *268:48 2.05898e-05
+76 *135:8 *268:50 0.000128964
+77 *135:8 *268:52 9.01041e-05
+78 *135:8 *268:60 3.71251e-05
+79 *154:5 *268:38 0
+80 *156:5 *268:43 5.98028e-05
+81 *157:9 *268:43 0.000574096
+82 *167:11 *268:28 5.38131e-05
+83 *167:11 *268:38 0.000114233
+84 *169:9 *373:DIODE 7.27182e-05
+85 *169:9 *268:24 6.53382e-05
+86 *169:9 *268:28 0.000313249
+87 *170:8 *373:DIODE 0.000185434
+88 *170:8 *268:24 0.000140259
+89 *170:8 *268:28 2.32004e-05
+90 *180:10 *268:38 0.000108681
+91 *203:137 *268:28 3.7122e-06
+92 *203:137 *268:38 1.95443e-05
+93 *203:147 *268:28 3.71369e-05
+94 *203:156 *268:21 1.00765e-05
+95 *203:156 *268:28 3.53115e-05
+96 *212:105 *268:109 6.07611e-06
+97 *265:9 *268:9 0.00536264
+98 *265:13 *268:9 0.00153621
+99 *267:72 *268:109 3.24466e-05
+100 *267:78 *268:65 5.26204e-05
+101 *267:78 *268:109 0
+102 *267:117 *268:85 0
+*RES
+1 *52142:X *268:5 38 
+2 *268:5 *268:8 34.1607 
+3 *268:8 *268:9 408.921 
+4 *268:9 *268:12 19.3707 
+5 *268:12 *375:DIODE 38 
+6 *268:12 *268:21 17.61 
+7 *268:21 *268:24 2.07143 
+8 *268:24 *268:28 5.88286 
+9 *268:28 *268:38 38.0579 
+10 *268:38 *268:43 35.3829 
+11 *268:43 *268:48 19.3293 
+12 *268:48 *268:50 3.48 
+13 *268:50 *268:52 2.52714 
+14 *268:52 *268:60 7.35357 
+15 *268:60 *268:65 38.5964 
+16 *268:65 *268:66 18.2493 
+17 *268:66 *268:70 4.93 
+18 *268:70 *268:78 25.1057 
+19 *268:78 *268:85 36.1729 
+20 *268:85 *51985:A 23 
+21 *268:78 *333:DIODE 23 
+22 *268:70 *52041:A 23 
+23 *268:66 *353:DIODE 23 
+24 *268:60 *52071:A 23 
+25 *268:52 *268:109 32.9621 
+26 *268:109 *52101:A 23 
+27 *268:50 *370:DIODE 23 
+28 *268:48 *361:DIODE 23 
+29 *268:28 *52114:A 23 
+30 *268:24 *52113:A1 23 
+31 *268:21 *373:DIODE 27.9093 
+*END
+
+*D_NET *269 0.0941173
+*CONN
+*I *52151:A I *D sky130_fd_sc_hd__buf_2
+*I *400:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52132:X O *D sky130_fd_sc_hd__buf_6
+*CAP
+1 *52151:A 0.000223082
+2 *400:DIODE 0
+3 *52132:X 0
+4 *269:14 0.00034283
+5 *269:9 0.0133171
+6 *269:8 0.0131973
+7 *269:6 0.0282957
+8 *269:5 0.0282957
+9 *269:9 *270:9 0.0104456
+*RES
+1 *52132:X *269:5 38 
+2 *269:5 *269:6 554.77 
+3 *269:6 *269:8 15 
+4 *269:8 *269:9 319.352 
+5 *269:9 *269:14 31.9057 
+6 *269:14 *400:DIODE 23 
+7 *269:14 *52151:A 27.205 
+*END
+
+*D_NET *270 0.093337
+*CONN
+*I *52152:A I *D sky130_fd_sc_hd__buf_2
+*I *401:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52134:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52152:A 0.000302338
+2 *401:DIODE 0
+3 *52134:Y 0
+4 *270:15 0.000569091
+5 *270:9 0.0127824
+6 *270:8 0.0125157
+7 *270:6 0.028361
+8 *270:5 0.028361
+9 *65:11 *270:6 0
+10 *185:6 *270:6 0
+11 *269:9 *270:9 0.0104456
+*RES
+1 *52134:Y *270:5 38 
+2 *270:5 *270:6 556.179 
+3 *270:6 *270:8 15 
+4 *270:8 *270:9 208.821 
+5 *270:9 *270:15 33.2521 
+6 *270:15 *401:DIODE 23 
+7 *270:15 *52152:A 28.6343 
+*END
+
+*D_NET *271 0.0704337
+*CONN
+*I *52153:A I *D sky130_fd_sc_hd__buf_2
+*I *402:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52009:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52153:A 0.000201233
+2 *402:DIODE 0
+3 *52009:X 0.00643482
+4 *271:8 0.028507
+5 *271:7 0.0283058
+6 *271:5 0.00643482
+7 *19:6 *52153:A 0
+8 *65:11 *271:5 5.50106e-05
+9 *268:78 *271:5 0.000396582
+10 *268:85 *271:5 9.84851e-05
+*RES
+1 *52009:X *271:5 112.033 
+2 *271:5 *271:7 15 
+3 *271:7 *271:8 554.77 
+4 *271:8 *402:DIODE 38 
+5 *271:8 *52153:A 41.7286 
+*END
+
+*D_NET *272 0.0660296
+*CONN
+*I *51970:A I *D sky130_fd_sc_hd__nand2_1
+*I *51991:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *51967:A I *D sky130_fd_sc_hd__and4_1
+*I *337:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *330:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *332:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *354:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52041:B I *D sky130_fd_sc_hd__and2_1
+*I *51982:B I *D sky130_fd_sc_hd__and2_1
+*I *51962:A I *D sky130_fd_sc_hd__nand2_2
+*I *320:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51964:B I *D sky130_fd_sc_hd__nand2_1
+*I *51977:B I *D sky130_fd_sc_hd__and3_1
+*I *323:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51966:B I *D sky130_fd_sc_hd__nand2_1
+*I *325:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *328:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *326:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52143:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *51970:A 0
+2 *51991:A1 0.000433397
+3 *51967:A 4.02843e-05
+4 *337:DIODE 0
+5 *330:DIODE 6.01374e-05
+6 *332:DIODE 9.1958e-05
+7 *354:DIODE 0.000240651
+8 *52041:B 0
+9 *51982:B 0
+10 *51962:A 0
+11 *320:DIODE 0.000181864
+12 *51964:B 0
+13 *51977:B 0
+14 *323:DIODE 0
+15 *51966:B 0
+16 *325:DIODE 4.50142e-05
+17 *328:DIODE 0
+18 *326:DIODE 0
+19 *52143:X 0
+20 *272:188 0.00139387
+21 *272:178 0.00129198
+22 *272:145 0.000463939
+23 *272:142 0.00078312
+24 *272:130 0.00167584
+25 *272:118 0.00150355
+26 *272:108 0.000625391
+27 *272:100 0.000869621
+28 *272:92 0.00110926
+29 *272:86 0.000495566
+30 *272:83 0.000601907
+31 *272:74 0.000896754
+32 *272:65 0.000649632
+33 *272:56 0.000446721
+34 *272:52 0.000514588
+35 *272:47 0.000810201
+36 *272:41 0.00058614
+37 *272:35 0.00222303
+38 *272:34 0.00211927
+39 *272:25 0.0024436
+40 *272:24 0.00232036
+41 *272:15 0.00230956
+42 *272:14 0.0023001
+43 *272:5 0.00593379
+44 *272:4 0.005813
+45 *51991:A1 *280:29 2.18506e-05
+46 *272:5 *278:7 0.0014108
+47 *272:5 *278:9 0.00198962
+48 *272:15 *278:9 0.00496715
+49 *272:25 *278:9 0.00509805
+50 *272:25 *279:5 2.18409e-05
+51 *272:35 *278:21 0.0042343
+52 *272:35 *279:5 2.18506e-05
+53 *272:41 *278:24 0.000160191
+54 *272:41 *278:34 0.00027019
+55 *272:41 *278:37 0
+56 *272:47 *278:34 0.000120857
+57 *272:52 *278:37 0
+58 *272:52 *278:47 0
+59 *272:56 *278:47 8.62783e-05
+60 *272:188 *51967:C 7.23805e-05
+61 *313:DIODE *272:52 0
+62 *317:DIODE *272:108 2.93747e-05
+63 *322:DIODE *272:92 0.000141954
+64 *324:DIODE *272:74 0.000533224
+65 *393:DIODE *272:5 0.000185428
+66 *395:DIODE *272:24 2.21614e-05
+67 *396:DIODE *272:25 0.000143655
+68 *51967:B *51991:A1 9.84794e-05
+69 *51970:B *272:188 0.000418749
+70 *51977:C *272:83 0
+71 *51979:A *272:130 5.31757e-05
+72 *51979:B *272:130 0.000269781
+73 *51982:A *272:130 5.47983e-06
+74 *51991:B1 *51991:A1 5.50049e-05
+75 *51991:B2 *51967:A 2.04318e-05
+76 *52040:A2 *272:145 5.57964e-05
+77 *52048:A1 *354:DIODE 0
+78 *52048:A1 *272:145 0
+79 *52144:A *272:5 4.2573e-05
+80 *52145:A *272:5 0.000315857
+81 *52146:A *272:15 5.56356e-05
+82 *29:8 *272:188 1.14762e-05
+83 *32:8 *272:83 0.000106707
+84 *37:8 *272:130 2.54749e-05
+85 *38:7 *272:130 0.000228909
+86 *39:8 *272:118 0
+87 *39:8 *272:130 0
+88 *40:8 *272:142 0
+89 *42:6 *272:145 7.90939e-05
+90 *51:6 *51991:A1 8.22421e-06
+91 *103:5 *354:DIODE 0.000141954
+92 *225:23 *272:86 4.05309e-05
+93 *225:23 *272:92 7.57176e-05
+94 *225:58 *320:DIODE 5.83407e-05
+95 *241:6 *320:DIODE 0
+96 *250:14 *272:142 4.6318e-06
+97 *252:8 *272:142 0
+98 *252:8 *272:145 0.000308661
+99 *252:23 *354:DIODE 0
+100 *252:23 *272:145 5.33597e-05
+101 *255:8 *272:130 8.62876e-05
+102 *256:7 *320:DIODE 0.000141954
+103 *259:20 *272:83 0
+104 *260:8 *272:188 2.98653e-05
+105 *261:16 *272:83 7.91596e-05
+106 *261:66 *272:83 9.28842e-05
+107 *261:76 *330:DIODE 3.72639e-05
+108 *261:76 *272:83 0.000187405
+109 *262:53 *51967:A 1.23486e-05
+110 *262:53 *51991:A1 0
+111 *265:41 *272:100 9.8971e-06
+112 *265:41 *272:108 0.000446275
+113 *265:45 *272:100 1.57925e-05
+114 *265:57 *272:92 0.000185434
+115 *265:57 *272:100 0.000697107
+116 *266:128 *272:118 8.26672e-05
+117 *267:92 *272:142 0.000172197
+118 *267:94 *272:130 2.16575e-05
+119 *267:94 *272:142 0.00031749
+120 *267:104 *272:130 7.45823e-05
+*RES
+1 *52143:X *272:4 23 
+2 *272:4 *272:5 117.823 
+3 *272:5 *272:14 31.74 
+4 *272:14 *272:15 54.4579 
+5 *272:15 *272:24 31.74 
+6 *272:24 *272:25 56.3636 
+7 *272:25 *272:34 32.6929 
+8 *272:34 *272:35 46.835 
+9 *272:35 *272:41 37.7057 
+10 *272:41 *326:DIODE 23 
+11 *272:41 *272:47 4.90929 
+12 *272:47 *272:52 34.0186 
+13 *272:52 *272:56 20.0129 
+14 *272:56 *328:DIODE 38 
+15 *272:56 *272:65 17.61 
+16 *272:65 *325:DIODE 23.6214 
+17 *272:65 *272:74 9.69429 
+18 *272:74 *51966:B 23 
+19 *272:74 *272:83 25.3986 
+20 *272:83 *272:86 16.5743 
+21 *272:86 *323:DIODE 23 
+22 *272:86 *272:92 6.33857 
+23 *272:92 *51977:B 23 
+24 *272:92 *272:100 11.3514 
+25 *272:100 *51964:B 23 
+26 *272:100 *272:108 19.9093 
+27 *272:108 *320:DIODE 41.8321 
+28 *272:108 *272:118 5.77929 
+29 *272:118 *51962:A 38 
+30 *272:118 *272:130 34.3264 
+31 *272:130 *51982:B 23 
+32 *272:130 *272:142 39.3421 
+33 *272:142 *272:145 21.4836 
+34 *272:145 *52041:B 38 
+35 *272:145 *354:DIODE 41.8321 
+36 *272:142 *332:DIODE 24.0979 
+37 *272:83 *330:DIODE 39.2014 
+38 *272:52 *337:DIODE 23 
+39 *272:47 *272:178 6.33857 
+40 *272:178 *272:188 31.0892 
+41 *272:188 *51967:A 46.6732 
+42 *272:188 *51991:A1 48.2291 
+43 *272:178 *51970:A 23 
+*END
+
+*D_NET *273 0.0633152
+*CONN
+*I *403:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52154:A I *D sky130_fd_sc_hd__buf_2
+*I *52046:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *403:DIODE 0.000145008
+2 *52154:A 0
+3 *52046:Y 0.000969094
+4 *273:14 0.000145008
+5 *273:12 0.0282631
+6 *273:11 0.0293499
+7 *273:7 0.00205585
+8 *52009:A *273:11 1.94693e-05
+9 *52040:A2 *273:7 0.000103637
+10 *52040:A2 *273:11 2.98648e-05
+11 *52045:A2 *273:12 0
+12 *20:6 *273:12 3.55887e-05
+13 *43:11 *273:11 0.0001042
+14 *102:8 *273:12 0
+15 *268:66 *273:7 0.00148876
+16 *268:70 *273:7 0.000401899
+17 *268:78 *273:7 1.03955e-05
+18 *268:78 *273:11 0.000193469
+*RES
+1 *52046:Y *273:7 46.5107 
+2 *273:7 *273:11 30.3907 
+3 *273:11 *273:12 554.418 
+4 *273:12 *273:14 15 
+5 *273:14 *52154:A 23 
+6 *273:14 *403:DIODE 25.5271 
+*END
+
+*D_NET *274 0.0656234
+*CONN
+*I *52155:A I *D sky130_fd_sc_hd__buf_2
+*I *404:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52078:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52155:A 0.00016479
+2 *404:DIODE 0
+3 *52078:Y 0
+4 *274:9 0.00393022
+5 *274:8 0.00376543
+6 *274:6 0.0281266
+7 *274:5 0.0281266
+8 *52155:A *275:10 3.44446e-05
+9 *52155:A *275:18 0.000237249
+10 *274:9 *275:10 0.0011344
+11 *21:7 *52155:A 0.000103647
+12 *134:8 *274:6 0
+*RES
+1 *52078:Y *274:5 38 
+2 *274:5 *274:6 551.601 
+3 *274:6 *274:8 15 
+4 *274:8 *274:9 55.4107 
+5 *274:9 *404:DIODE 23 
+6 *274:9 *52155:A 27.8264 
+*END
+
+*D_NET *275 0.0728083
+*CONN
+*I *52156:A I *D sky130_fd_sc_hd__buf_2
+*I *405:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52107:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52156:A 0.000132357
+2 *405:DIODE 0
+3 *52107:X 0
+4 *275:20 0.00563715
+5 *275:18 0.00612314
+6 *275:10 0.00186994
+7 *275:5 0.0293818
+8 *275:4 0.0281302
+9 *275:5 *276:6 0
+10 *52155:A *275:10 3.44446e-05
+11 *52155:A *275:18 0.000237249
+12 *21:7 *275:18 6.89881e-05
+13 *164:6 *275:5 0
+14 *182:8 *275:5 5.86165e-05
+15 *274:9 *275:10 0.0011344
+*RES
+1 *52107:X *275:4 15 
+2 *275:4 *275:5 551.953 
+3 *275:5 *275:10 47.0864 
+4 *275:10 *275:18 12.8325 
+5 *275:18 *275:20 102.339 
+6 *275:20 *405:DIODE 23 
+7 *275:20 *52156:A 25.5271 
+*END
+
+*D_NET *276 0.0948698
+*CONN
+*I *52157:A I *D sky130_fd_sc_hd__buf_2
+*I *406:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52128:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52157:A 0
+2 *406:DIODE 0
+3 *52128:Y 0
+4 *276:20 0.000270689
+5 *276:9 0.0196275
+6 *276:8 0.0193569
+7 *276:6 0.0277896
+8 *276:5 0.0277896
+9 *23:8 *276:20 3.55887e-05
+10 *275:5 *276:6 0
+*RES
+1 *52128:Y *276:5 38 
+2 *276:5 *276:6 544.91 
+3 *276:6 *276:8 15 
+4 *276:8 *276:9 258.369 
+5 *276:9 *406:DIODE 23 
+6 *276:9 *276:20 35.1164 
+7 *276:20 *52157:A 23 
+*END
+
+*D_NET *277 0.102606
+*CONN
+*I *52158:A I *D sky130_fd_sc_hd__buf_2
+*I *407:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52129:X O *D sky130_fd_sc_hd__a21o_4
+*CAP
+1 *52158:A 0.00022304
+2 *407:DIODE 0
+3 *52129:X 0
+4 *277:8 0.029083
+5 *277:7 0.0288599
+6 *277:5 0.0220588
+7 *277:4 0.0220588
+8 p[7] *52158:A 2.22079e-05
+9 *374:DIODE *277:5 0.00014196
+10 *24:7 *52158:A 0.000103647
+11 *170:13 *277:5 5.50049e-05
+*RES
+1 *52129:X *277:4 23 
+2 *277:4 *277:5 379.382 
+3 *277:5 *277:7 15 
+4 *277:7 *277:8 566.039 
+5 *277:8 *407:DIODE 38 
+6 *277:8 *52158:A 42.6814 
+*END
+
+*D_NET *278 0.0516041
+*CONN
+*I *314:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51941:B I *D sky130_fd_sc_hd__and4_1
+*I *51939:A I *D sky130_fd_sc_hd__buf_2
+*I *51944:A I *D sky130_fd_sc_hd__nand2_1
+*I *51967:C I *D sky130_fd_sc_hd__and4_1
+*I *316:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *327:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *311:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52144:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *314:DIODE 0
+2 *51941:B 0.000160493
+3 *51939:A 0
+4 *51944:A 0
+5 *51967:C 0.000368861
+6 *316:DIODE 0
+7 *327:DIODE 0
+8 *311:DIODE 0
+9 *52144:X 0
+10 *278:81 0.000513439
+11 *278:70 0.00120758
+12 *278:56 0.00180966
+13 *278:47 0.0011504
+14 *278:37 0.000727263
+15 *278:34 0.000483835
+16 *278:24 0.0004387
+17 *278:21 0.000661467
+18 *278:20 0.000608913
+19 *278:17 0.000315121
+20 *278:9 0.00224261
+21 *278:7 0.00373264
+22 *278:4 0.00173982
+23 *51941:B *281:45 1.56762e-05
+24 *51967:C *280:29 0.000280128
+25 *278:9 *279:5 0.0100936
+26 *278:17 *280:5 0.000270682
+27 *278:21 *279:5 0.00427347
+28 *278:24 *281:11 0
+29 *278:34 *281:11 0
+30 *278:70 *279:31 5.85822e-06
+31 *278:81 *280:35 8.4047e-05
+32 *339:DIODE *278:47 7.05156e-05
+33 *339:DIODE *278:56 8.38096e-05
+34 *51941:A *51941:B 5.50106e-05
+35 *51944:B *278:70 5.90675e-06
+36 *51971:A1 *278:70 0.000354203
+37 *51971:S *51967:C 2.7636e-05
+38 *51996:A1 *278:70 7.44257e-05
+39 *52145:A *278:9 2.4754e-05
+40 *52146:A *278:9 2.47321e-05
+41 *28:26 *51967:C 0.000133635
+42 *28:26 *278:56 3.47776e-05
+43 *29:8 *51967:C 0.000194318
+44 *31:8 *51967:C 2.70366e-05
+45 *31:8 *278:56 3.83778e-05
+46 *51:6 *278:81 0
+47 *183:15 *51941:B 0.000228903
+48 *189:45 *51941:B 0.000182826
+49 *189:45 *278:81 0
+50 *192:31 *278:70 7.44161e-06
+51 *192:37 *278:81 2.68708e-05
+52 *193:27 *278:81 8.92738e-05
+53 *207:19 *278:56 0.000100582
+54 *207:21 *278:56 1.32939e-05
+55 *234:8 *51941:B 6.97953e-05
+56 *237:9 *278:70 1.76557e-05
+57 *237:9 *278:81 5.50049e-05
+58 *260:8 *51967:C 3.74072e-05
+59 *261:16 *51967:C 0
+60 *262:56 *51967:C 3.17516e-05
+61 *262:71 *278:34 0
+62 *272:5 *278:7 0.0014108
+63 *272:5 *278:9 0.00198962
+64 *272:15 *278:9 0.00496715
+65 *272:25 *278:9 0.00509805
+66 *272:35 *278:21 0.0042343
+67 *272:41 *278:24 0.000160191
+68 *272:41 *278:34 0.00027019
+69 *272:41 *278:37 0
+70 *272:47 *278:34 0.000120857
+71 *272:52 *278:37 0
+72 *272:52 *278:47 0
+73 *272:56 *278:47 8.62783e-05
+74 *272:188 *51967:C 7.23805e-05
+*RES
+1 *52144:X *278:4 23 
+2 *278:4 *278:7 39.3468 
+3 *278:7 *278:9 133.783 
+4 *278:9 *278:17 49.205 
+5 *278:17 *278:20 16.2014 
+6 *278:20 *278:21 46.835 
+7 *278:21 *278:24 17.2579 
+8 *278:24 *311:DIODE 38 
+9 *278:24 *278:34 21.4421 
+10 *278:34 *278:37 17.9621 
+11 *278:37 *327:DIODE 38 
+12 *278:37 *278:47 23.8243 
+13 *278:47 *316:DIODE 23 
+14 *278:47 *278:56 23.9693 
+15 *278:56 *51967:C 47.9636 
+16 *278:56 *278:70 27.905 
+17 *278:70 *51944:A 23 
+18 *278:70 *278:81 36.4007 
+19 *278:81 *51939:A 23 
+20 *278:81 *51941:B 27.9093 
+21 *278:34 *314:DIODE 23 
+*END
+
+*D_NET *279 0.03958
+*CONN
+*I *51919:A I *D sky130_fd_sc_hd__buf_2
+*I *51921:C I *D sky130_fd_sc_hd__and4_1
+*I *303:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *300:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52145:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *51919:A 0
+2 *51921:C 0.000353781
+3 *303:DIODE 0
+4 *300:DIODE 0
+5 *52145:X 0
+6 *279:31 0.0020687
+7 *279:22 0.00205123
+8 *279:12 0.000730132
+9 *279:5 0.00363971
+10 *279:4 0.00324589
+11 *51921:C *51921:B 5.50106e-05
+12 *51921:C *281:206 0
+13 *279:5 *293:DIODE 0.000173898
+14 *279:5 *280:5 0.0100946
+15 *279:5 *280:11 8.6949e-05
+16 *279:12 *280:14 0
+17 *279:31 *281:206 0
+18 *313:DIODE *279:12 0.000140671
+19 *313:DIODE *279:22 3.72639e-05
+20 *396:DIODE *279:5 1.40958e-05
+21 *397:DIODE *279:5 0.000795772
+22 *51971:A1 *279:31 0.00042994
+23 *52147:A *279:5 7.08136e-05
+24 *27:6 *51921:C 0
+25 *55:8 *279:31 5.67058e-05
+26 *189:31 *51921:C 4.6318e-06
+27 *192:27 *279:31 0.000195119
+28 *192:31 *279:31 0.000441076
+29 *193:38 *279:31 2.29192e-05
+30 *212:12 *51921:C 4.90891e-05
+31 *212:12 *279:31 7.75329e-06
+32 *212:23 *51921:C 0.000112665
+33 *234:17 *279:31 0
+34 *261:16 *279:12 0
+35 *261:16 *279:22 0
+36 *262:15 *51921:C 4.96717e-05
+37 *262:17 *51921:C 2.93747e-05
+38 *262:26 *51921:C 0.000167431
+39 *262:61 *279:12 3.83778e-05
+40 *263:40 *51921:C 0
+41 *272:25 *279:5 2.18409e-05
+42 *272:35 *279:5 2.18506e-05
+43 *278:9 *279:5 0.0100936
+44 *278:21 *279:5 0.00427347
+45 *278:70 *279:31 5.85822e-06
+*RES
+1 *52145:X *279:4 23 
+2 *279:4 *279:5 169.277 
+3 *279:5 *279:12 22.25 
+4 *279:12 *300:DIODE 38 
+5 *279:12 *279:22 19.6814 
+6 *279:22 *303:DIODE 23 
+7 *279:22 *279:31 40.7479 
+8 *279:31 *51921:C 45.5193 
+9 *279:31 *51919:A 38 
+*END
+
+*D_NET *280 0.0314953
+*CONN
+*I *293:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *304:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51921:D I *D sky130_fd_sc_hd__and4_1
+*I *51906:C I *D sky130_fd_sc_hd__and4_1
+*I *51910:A I *D sky130_fd_sc_hd__buf_2
+*I *51922:A2 I *D sky130_fd_sc_hd__a22oi_1
+*I *290:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *305:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52146:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *293:DIODE 8.42091e-05
+2 *304:DIODE 0.000131647
+3 *51921:D 0
+4 *51906:C 5.81083e-05
+5 *51910:A 4.79643e-05
+6 *51922:A2 0
+7 *290:DIODE 0
+8 *305:DIODE 0
+9 *52146:X 0
+10 *280:49 0.000169378
+11 *280:43 0.000286697
+12 *280:38 0.000157177
+13 *280:35 0.000997241
+14 *280:29 0.00184202
+15 *280:17 0.00109333
+16 *280:14 0.000470059
+17 *280:11 0.000270692
+18 *280:5 0.00297632
+19 *280:4 0.0029297
+20 *51906:C *51906:D 3.91386e-05
+21 *51906:C *51921:B 7.88926e-05
+22 *51906:C *281:63 0.000106496
+23 *51906:C *284:28 2.4754e-05
+24 *280:5 *281:5 0.00449164
+25 *280:17 *281:17 0.000226306
+26 *280:17 *281:29 0.000356724
+27 *280:29 *281:29 0.000475617
+28 *280:43 *51921:B 0.000150242
+29 *280:49 *281:63 8.16149e-05
+30 *313:DIODE *304:DIODE 0
+31 *51967:B *280:29 0.000135716
+32 *51967:C *280:29 0.000280128
+33 *51967:D *280:29 3.55303e-05
+34 *51969:A *280:35 2.32101e-05
+35 *51969:B *280:35 5.50049e-05
+36 *51991:A1 *280:29 2.18506e-05
+37 *51991:B1 *280:29 0.0002263
+38 *51991:B2 *280:29 0.000142098
+39 *183:15 *280:29 4.01634e-05
+40 *183:51 *51910:A 0.000255882
+41 *183:51 *280:49 1.55941e-05
+42 *193:27 *280:35 8.62876e-05
+43 *193:38 *280:35 1.07659e-05
+44 *212:12 *280:35 8.46575e-05
+45 *212:29 *280:35 4.56951e-05
+46 *214:6 *280:38 4.08537e-05
+47 *214:6 *280:43 6.07611e-06
+48 *215:8 *51910:A 0.000267554
+49 *215:8 *280:49 1.46586e-05
+50 *232:50 *280:38 3.47776e-05
+51 *232:50 *280:43 4.334e-05
+52 *232:50 *280:49 0
+53 *260:8 *280:29 3.41998e-06
+54 *262:14 *280:49 0.000185755
+55 *262:15 *51906:C 4.08664e-05
+56 *262:15 *280:43 0.000272377
+57 *262:53 *280:29 2.35393e-05
+58 *262:53 *280:35 0.000349807
+59 *262:56 *280:29 4.79641e-05
+60 *262:61 *280:14 0
+61 *262:64 *280:17 0.000183733
+62 *262:71 *304:DIODE 0
+63 *262:71 *280:14 0
+64 *263:40 *280:35 0.000265472
+65 *278:17 *280:5 0.000270682
+66 *278:81 *280:35 8.4047e-05
+67 *279:5 *293:DIODE 0.000173898
+68 *279:5 *280:5 0.0100946
+69 *279:5 *280:11 8.6949e-05
+70 *279:12 *280:14 0
+*RES
+1 *52146:X *280:4 23 
+2 *280:4 *280:5 110.676 
+3 *280:5 *305:DIODE 23 
+4 *280:5 *280:11 1.09786 
+5 *280:11 *280:14 17.2579 
+6 *280:14 *280:17 21.3386 
+7 *280:17 *290:DIODE 23 
+8 *280:17 *280:29 47.2136 
+9 *280:29 *280:35 44.21 
+10 *280:35 *280:38 16.2014 
+11 *280:38 *280:43 19.205 
+12 *280:43 *280:49 33.133 
+13 *280:49 *51922:A2 23 
+14 *280:49 *51910:A 25.9777 
+15 *280:43 *51906:C 25.5479 
+16 *280:38 *51921:D 38 
+17 *280:14 *304:DIODE 40.2579 
+18 *280:11 *293:DIODE 25.0507 
+*END
+
+*D_NET *281 0.0406251
+*CONN
+*I *292:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *288:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51922:B1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51906:D I *D sky130_fd_sc_hd__and4_1
+*I *347:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *367:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52118:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *52117:C I *D sky130_fd_sc_hd__nand4_1
+*I *379:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *381:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52089:B I *D sky130_fd_sc_hd__nand2_1
+*I *52055:B I *D sky130_fd_sc_hd__nand2_1
+*I *357:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52015:B I *D sky130_fd_sc_hd__nand2_1
+*I *51903:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *51901:C I *D sky130_fd_sc_hd__and3_1
+*I *51908:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *287:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *291:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *306:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52147:X O *D sky130_fd_sc_hd__clkbuf_4
+*CAP
+1 *292:DIODE 0
+2 *288:DIODE 0
+3 *51922:B1 0
+4 *51906:D 2.81634e-05
+5 *347:DIODE 0.000233264
+6 *367:DIODE 0
+7 *52118:A2 0
+8 *52117:C 0
+9 *379:DIODE 0.000434303
+10 *381:DIODE 0
+11 *52089:B 1.85078e-05
+12 *52055:B 2.34823e-05
+13 *357:DIODE 0
+14 *52015:B 2.14194e-05
+15 *51903:A2 2.00578e-05
+16 *51901:C 0.000182487
+17 *51908:A2 5.4822e-05
+18 *287:DIODE 0
+19 *291:DIODE 0
+20 *306:DIODE 0
+21 *52147:X 0
+22 *281:216 0.000611629
+23 *281:206 0.00083923
+24 *281:162 0.000670928
+25 *281:152 0.000474231
+26 *281:145 0.00040421
+27 *281:142 0.000257804
+28 *281:134 0.000498741
+29 *281:126 0.000585275
+30 *281:118 0.000227048
+31 *281:115 0.000696128
+32 *281:104 0.0011671
+33 *281:96 0.00171748
+34 *281:79 0.00130274
+35 *281:67 0.00104247
+36 *281:63 0.00126181
+37 *281:53 0.000606121
+38 *281:47 0.000427796
+39 *281:45 0.000943203
+40 *281:29 0.00141597
+41 *281:17 0.000721599
+42 *281:11 0.000376408
+43 *281:5 0.00294309
+44 *281:4 0.00281552
+45 *51901:C *284:12 0
+46 *51901:C *284:28 0
+47 *51906:D *284:28 0
+48 *51908:A2 *284:28 5.23699e-05
+49 *281:29 *282:5 0.000361027
+50 *281:45 *282:5 0.000130423
+51 *281:63 *284:28 1.76557e-05
+52 *281:67 *284:28 0.000368432
+53 *281:96 *51897:B 8.48502e-06
+54 *281:96 *282:18 0
+55 *281:96 *283:11 0.000203472
+56 *281:96 *284:28 0
+57 *281:104 *283:11 2.93747e-05
+58 *281:162 *52117:D 5.50106e-05
+59 *315:DIODE *281:216 0.000574096
+60 *365:DIODE *281:115 0
+61 *365:DIODE *281:126 0.000487147
+62 *365:DIODE *281:134 0.000215671
+63 *51906:C *51906:D 3.91386e-05
+64 *51906:C *281:63 0.000106496
+65 *51914:A *281:216 7.81176e-05
+66 *51921:C *281:206 0
+67 *51922:B2 *281:53 5.67058e-05
+68 *51941:B *281:45 1.56762e-05
+69 *51967:B *281:45 0.000226306
+70 *52010:A *51908:A2 5.67058e-05
+71 *52010:A *281:79 6.30615e-05
+72 *52054:B *281:115 3.3123e-05
+73 *52055:A *281:126 0.000217372
+74 *52117:A *281:152 0
+75 *52120:A *281:134 0.000228909
+76 *52120:B *281:134 0.000272383
+77 *50:8 *281:45 5.50106e-05
+78 *51:6 *281:45 0
+79 *71:9 *281:104 0.000116554
+80 *106:17 *281:115 0.000272383
+81 *111:6 *347:DIODE 0.000216721
+82 *111:6 *281:115 0.000111852
+83 *142:19 *281:162 0
+84 *175:8 *281:134 9.91798e-05
+85 *176:7 *281:152 0.00010018
+86 *176:7 *281:162 1.72202e-05
+87 *183:7 *281:53 1.32314e-05
+88 *183:15 *281:45 0.000512174
+89 *183:45 *281:53 0.000404502
+90 *183:88 *51901:C 6.42666e-05
+91 *187:15 *281:96 9.0102e-05
+92 *189:15 *281:53 9.88574e-06
+93 *189:17 *281:53 0.000173278
+94 *189:45 *281:45 7.39261e-05
+95 *189:105 *51901:C 1.94812e-05
+96 *189:121 *51901:C 3.07056e-06
+97 *189:121 *281:96 0.000398503
+98 *190:8 *281:96 5.50106e-05
+99 *193:38 *281:206 2.5415e-05
+100 *193:38 *281:216 8.83341e-05
+101 *194:8 *51901:C 4.08537e-05
+102 *194:8 *281:96 0.000108672
+103 *199:8 *281:67 0.000313931
+104 *201:6 *281:96 0
+105 *203:69 *281:126 4.95081e-05
+106 *203:69 *281:134 0.00010655
+107 *207:73 *281:104 0.000272823
+108 *207:77 *281:104 0.000274078
+109 *207:89 *52015:B 5.90675e-06
+110 *207:89 *281:104 3.53115e-05
+111 *207:89 *281:115 7.49872e-05
+112 *225:108 *347:DIODE 0
+113 *225:108 *281:118 1.21972e-05
+114 *225:108 *281:126 0.000183733
+115 *225:136 *281:152 0
+116 *225:164 *281:126 0.000129522
+117 *232:8 *281:45 0.000267167
+118 *232:33 *281:45 0.00018282
+119 *232:50 *281:63 0
+120 *232:50 *281:206 0.000124429
+121 *232:50 *281:216 8.83341e-05
+122 *239:6 *281:216 0
+123 *262:14 *281:63 7.76364e-06
+124 *262:15 *281:63 0.000137651
+125 *262:26 *281:45 0.000566283
+126 *262:53 *281:45 0
+127 *262:56 *281:29 0.000228903
+128 *262:61 *281:17 5.50106e-05
+129 *262:61 *281:29 0.000603438
+130 *262:64 *281:17 4.04206e-05
+131 *262:71 *281:11 0.000118026
+132 *262:71 *281:17 0.000128401
+133 *262:98 *281:53 7.81176e-05
+134 *262:98 *281:63 0
+135 *262:98 *281:206 1.58805e-05
+136 *263:40 *281:53 0.000108681
+137 *263:40 *281:206 0.000231212
+138 *266:27 *52089:B 2.28308e-05
+139 *266:27 *281:134 6.82285e-05
+140 *266:27 *281:142 0.000210182
+141 *266:29 *281:134 0.000217372
+142 *266:31 *281:134 4.34745e-05
+143 *267:39 *281:145 0
+144 *267:39 *281:152 0
+145 *278:24 *281:11 0
+146 *278:34 *281:11 0
+147 *279:31 *281:206 0
+148 *280:5 *281:5 0.00449164
+149 *280:17 *281:17 0.000226306
+150 *280:17 *281:29 0.000356724
+151 *280:29 *281:29 0.000475617
+152 *280:49 *281:63 8.16149e-05
+*RES
+1 *52147:X *281:4 23 
+2 *281:4 *281:5 49.2171 
+3 *281:5 *281:11 32.175 
+4 *281:11 *306:DIODE 23 
+5 *281:11 *281:17 5.86214 
+6 *281:17 *291:DIODE 23 
+7 *281:17 *281:29 44.7071 
+8 *281:29 *287:DIODE 23 
+9 *281:29 *281:45 49.6371 
+10 *281:45 *281:47 15 
+11 *281:47 *281:53 22.1879 
+12 *281:53 *281:63 36.7321 
+13 *281:63 *281:67 12.5529 
+14 *281:67 *51908:A2 24.8229 
+15 *281:67 *281:79 17.5271 
+16 *281:79 *51901:C 41.3143 
+17 *281:79 *281:96 31.1364 
+18 *281:96 *51903:A2 23.4971 
+19 *281:96 *281:104 14.9143 
+20 *281:104 *52015:B 23.4971 
+21 *281:104 *281:115 22.5193 
+22 *281:115 *281:118 15.6214 
+23 *281:118 *357:DIODE 23 
+24 *281:118 *281:126 7.66429 
+25 *281:126 *52055:B 23.4971 
+26 *281:126 *281:134 12.5321 
+27 *281:134 *52089:B 23.4971 
+28 *281:134 *281:142 2.52714 
+29 *281:142 *281:145 17.9621 
+30 *281:145 *281:152 19.3293 
+31 *281:152 *281:162 34.1221 
+32 *281:162 *381:DIODE 23 
+33 *281:162 *379:DIODE 28.8621 
+34 *281:152 *52117:C 23 
+35 *281:145 *52118:A2 38 
+36 *281:142 *367:DIODE 23 
+37 *281:115 *347:DIODE 42.06 
+38 *281:63 *51906:D 23.8493 
+39 *281:53 *51922:B1 23 
+40 *281:47 *281:206 5.77929 
+41 *281:206 *288:DIODE 38 
+42 *281:206 *281:216 27.1179 
+43 *281:216 *292:DIODE 23 
+*END
+
+*D_NET *282 0.00955313
+*CONN
+*I *51894:A I *D sky130_fd_sc_hd__buf_2
+*I *51908:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *52148:X O *D sky130_fd_sc_hd__clkbuf_1
+*CAP
+1 *51894:A 0.000320697
+2 *51908:B1 1.80182e-05
+3 *52148:X 0.00072949
+4 *282:18 0.00130496
+5 *282:10 0.00115468
+6 *282:5 0.000917926
+7 *51908:B1 *284:28 2.93845e-05
+8 *282:18 *284:12 8.93766e-05
+9 *282:18 *284:28 7.71238e-05
+10 *307:DIODE *282:5 0.000105934
+11 *51942:B2 *51894:A 0.000127272
+12 *51942:B2 *282:18 3.92407e-05
+13 *51968:A2 *282:10 5.94125e-05
+14 *51992:A2 *282:5 5.67058e-05
+15 *8:8 *282:18 0.00113133
+16 *8:13 *282:10 2.5415e-05
+17 *183:15 *282:10 1.22906e-05
+18 *183:59 *51908:B1 5.50106e-05
+19 *187:8 *51894:A 0
+20 *189:89 *282:18 0.000164932
+21 *192:8 *51894:A 0
+22 *201:6 *51894:A 0
+23 *232:47 *282:5 5.3304e-05
+24 *262:9 *282:18 0.00114187
+25 *263:9 *282:18 0.000272377
+26 *263:12 *282:18 0
+27 *263:30 *282:18 0
+28 *263:42 *282:5 0.00117492
+29 *281:29 *282:5 0.000361027
+30 *281:45 *282:5 0.000130423
+31 *281:96 *282:18 0
+*RES
+1 *52148:X *282:5 42.6786 
+2 *282:5 *282:10 33.3143 
+3 *282:10 *282:18 46.8171 
+4 *282:18 *51908:B1 38.6214 
+5 *282:18 *51894:A 43.4271 
+*END
+
+*D_NET *283 0.014135
+*CONN
+*I *52049:B I *D sky130_fd_sc_hd__nand2_1
+*I *52118:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *52087:B I *D sky130_fd_sc_hd__nand3_1
+*I *52117:D I *D sky130_fd_sc_hd__nand4_1
+*I *52086:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52010:B I *D sky130_fd_sc_hd__nand2_1
+*I *51897:B I *D sky130_fd_sc_hd__nand2_2
+*I *52149:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *52049:B 5.90904e-05
+2 *52118:B1 0.000316987
+3 *52087:B 3.55238e-05
+4 *52117:D 0.000302924
+5 *52086:A2 0.000131319
+6 *52010:B 0
+7 *51897:B 6.15446e-05
+8 *52149:X 0
+9 *283:86 0.00044669
+10 *283:71 0.000447057
+11 *283:61 0.000528236
+12 *283:56 0.000642997
+13 *283:46 0.00102574
+14 *283:39 0.00139531
+15 *283:31 0.000406128
+16 *283:11 0.00110688
+17 *283:4 0.00124572
+18 *52010:A *283:31 2.02517e-05
+19 *52049:A *283:39 7.06229e-05
+20 *52051:A2 *283:39 2.4754e-05
+21 *52051:B1 *283:39 0.000131304
+22 *52083:A *283:56 7.59794e-05
+23 *52087:A *52087:B 5.67058e-05
+24 *52088:B *52087:B 5.50049e-05
+25 *52088:B *52118:B1 7.70008e-05
+26 *52119:A1 *283:56 0
+27 *52119:B1 *283:56 5.50049e-05
+28 *8:23 *283:11 1.83667e-05
+29 *68:5 *283:31 0.00044107
+30 *70:7 *283:11 7.44354e-05
+31 *70:7 *283:39 0.000205566
+32 *106:5 *283:39 5.50049e-05
+33 *106:17 *52049:B 0
+34 *108:9 *283:39 9.24795e-06
+35 *108:25 *283:46 1.01436e-05
+36 *140:5 *283:56 0.000701923
+37 *140:16 *283:56 9.91051e-05
+38 *141:9 *52086:A2 0
+39 *141:9 *283:56 0.000164282
+40 *141:9 *283:71 0
+41 *141:9 *283:86 0
+42 *141:20 *283:61 2.07145e-05
+43 *141:20 *283:86 0
+44 *142:19 *52086:A2 1.94812e-05
+45 *142:19 *52118:B1 5.50106e-05
+46 *174:8 *52086:A2 0.000135855
+47 *174:8 *283:56 5.67058e-05
+48 *174:8 *283:71 2.70469e-05
+49 *175:8 *283:71 6.48049e-05
+50 *175:8 *283:86 0.000136486
+51 *176:7 *52117:D 0.000278081
+52 *187:22 *283:31 7.21237e-05
+53 *187:39 *283:39 3.58084e-06
+54 *187:91 *283:31 2.50227e-05
+55 *187:104 *283:11 1.02387e-05
+56 *189:121 *51897:B 4.07902e-05
+57 *190:8 *51897:B 6.17437e-06
+58 *190:8 *283:11 2.32101e-05
+59 *190:8 *283:31 0.000133316
+60 *190:23 *283:11 0
+61 *191:6 *283:11 0
+62 *192:104 *283:11 1.83564e-05
+63 *194:41 *283:31 0
+64 *207:73 *51897:B 9.58714e-05
+65 *207:73 *283:11 0.000567191
+66 *207:102 *283:46 1.97329e-05
+67 *207:113 *283:56 0.00027474
+68 *225:128 *52087:B 1.03836e-05
+69 *225:128 *52118:B1 0.000395957
+70 *225:130 *52118:B1 0
+71 *225:146 *52118:B1 5.41385e-05
+72 *263:9 *283:46 0.000795772
+73 *281:96 *51897:B 8.48502e-06
+74 *281:96 *283:11 0.000203472
+75 *281:104 *283:11 2.93747e-05
+76 *281:162 *52117:D 5.50106e-05
+*RES
+1 *52149:X *283:4 23 
+2 *283:4 *283:11 44.7486 
+3 *283:11 *51897:B 24.595 
+4 *283:11 *283:31 39.135 
+5 *283:31 *52010:B 23 
+6 *283:4 *283:39 25.15 
+7 *283:39 *283:46 42.18 
+8 *283:46 *283:56 42.0971 
+9 *283:56 *283:61 34.4329 
+10 *283:61 *52086:A2 40.8793 
+11 *283:61 *283:71 1.55357 
+12 *283:71 *52117:D 44.5043 
+13 *283:71 *283:86 16.9057 
+14 *283:86 *52087:B 24.0979 
+15 *283:86 *52118:B1 31.6586 
+16 *283:39 *52049:B 38.8493 
+*END
+
+*D_NET *284 0.0180102
+*CONN
+*I *51906:B I *D sky130_fd_sc_hd__and4_1
+*I *51921:B I *D sky130_fd_sc_hd__and4_1
+*I *51896:A I *D sky130_fd_sc_hd__buf_2
+*I *52150:X O *D sky130_fd_sc_hd__clkbuf_1
+*CAP
+1 *51906:B 0
+2 *51921:B 0.000257858
+3 *51896:A 0
+4 *52150:X 8.85311e-05
+5 *284:28 0.000825304
+6 *284:12 0.000707863
+7 *284:9 0.000915093
+8 *284:8 0.000774676
+9 *284:6 8.85311e-05
+10 *51901:C *284:12 0
+11 *51901:C *284:28 0
+12 *51906:C *51921:B 7.88926e-05
+13 *51906:C *284:28 2.4754e-05
+14 *51906:D *284:28 0
+15 *51908:A2 *284:28 5.23699e-05
+16 *51908:B1 *284:28 2.93845e-05
+17 *51921:C *51921:B 5.50106e-05
+18 *51923:B *284:28 5.50106e-05
+19 *52010:A *284:28 2.4754e-05
+20 *9:5 *284:6 0.000138727
+21 *183:59 *284:28 0.000112248
+22 *199:8 *284:28 0.000231303
+23 *199:20 *284:28 0.000123753
+24 *216:8 *284:28 0.00026468
+25 *262:9 *284:9 0.00622488
+26 *262:15 *51921:B 1.22822e-05
+27 *263:9 *284:9 0.00622148
+28 *280:43 *51921:B 0.000150242
+29 *281:63 *284:28 1.76557e-05
+30 *281:67 *284:28 0.000368432
+31 *281:96 *284:28 0
+32 *282:18 *284:12 8.93766e-05
+33 *282:18 *284:28 7.71238e-05
+*RES
+1 *52150:X *284:6 39.9057 
+2 *284:6 *284:8 15 
+3 *284:8 *284:9 68.2743 
+4 *284:9 *284:12 17.61 
+5 *284:12 *51896:A 38 
+6 *284:12 *284:28 31.6336 
+7 *284:28 *51921:B 28.3857 
+8 *284:28 *51906:B 23 
+*END

signoff/user_proj_example/openlane-signoff/spef/user_proj_example.min.spef

diff --git a/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.min.spef b/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.min.spef
new file mode 100644
index 0000000..f5bdcde
--- /dev/null
+++ b/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.min.spef
@@ -0,0 +1,61144 @@
+*SPEF "ieee 1481-1999"
+*DESIGN "user_proj_example"
+*DATE "11:11:11 Fri 11 11, 1111"
+*VENDOR "OpenRCX"
+*PROGRAM "Parallel Extraction"
+*VERSION "1.0"
+*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE"
+*DIVIDER /
+*DELIMITER :
+*BUS_DELIMITER []
+*T_UNIT 1 NS
+*C_UNIT 1 PF
+*R_UNIT 1 OHM
+*L_UNIT 1 HENRY
+
+*NAME_MAP
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+*D_NET *1 0.00126022
+*CONN
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+*I *391:DIODE I *D sky130_fd_sc_hd__diode_2
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+
+*D_NET *2 0.00100019
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+*D_NET *4 0.0014158
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+*D_NET *5 0.00124801
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+*D_NET *6 0.00126708
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+*D_NET *7 0.00224156
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+*D_NET *8 0.00814899
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+*D_NET *9 0.00131044
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+*D_NET *11 0.00116661
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+*RES
+1 b[2] *11:7 8.045 
+2 *11:7 *385:DIODE 3.085 
+3 *11:7 *52137:A 2.74 
+*END
+
+*D_NET *12 0.00109511
+*CONN
+*P b[3] I
+*I *52138:A I *D sky130_fd_sc_hd__buf_2
+*I *386:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[3] 0.000359372
+2 *52138:A 1.77632e-05
+3 *386:DIODE 6.46756e-05
+4 *12:7 0.000441811
+5 *386:DIODE *267:5 0.000163199
+6 *52138:A *267:5 4.82919e-05
+*RES
+1 b[3] *12:7 8.3 
+2 *12:7 *386:DIODE 3.085 
+3 *12:7 *52138:A 2.05 
+*END
+
+*D_NET *13 0.00113857
+*CONN
+*P b[4] I
+*I *52139:A I *D sky130_fd_sc_hd__clkbuf_4
+*I *387:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[4] 0.000345326
+2 *52139:A 4.01423e-05
+3 *387:DIODE 9.8725e-05
+4 *13:7 0.000484194
+5 *387:DIODE *267:5 0.000119631
+6 *52139:A *267:5 5.05521e-05
+*RES
+1 b[4] *13:7 8.045 
+2 *13:7 *387:DIODE 3.43 
+3 *13:7 *52139:A 2.395 
+*END
+
+*D_NET *14 0.00109511
+*CONN
+*P b[5] I
+*I *52140:A I *D sky130_fd_sc_hd__buf_4
+*I *388:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[5] 0.000359372
+2 *52140:A 1.77632e-05
+3 *388:DIODE 6.46756e-05
+4 *14:7 0.000441811
+5 *388:DIODE *267:5 0.000163199
+6 *52140:A *267:5 4.82919e-05
+*RES
+1 b[5] *14:7 8.3 
+2 *14:7 *388:DIODE 3.085 
+3 *14:7 *52140:A 2.05 
+*END
+
+*D_NET *15 0.00137228
+*CONN
+*P b[6] I
+*I *52141:A I *D sky130_fd_sc_hd__buf_4
+*I *389:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[6] 0.000396272
+2 *52141:A 0.000135154
+3 *389:DIODE 0
+4 *15:8 0.000531426
+5 *52141:A *267:5 0.000279787
+6 *15:8 *267:5 2.96426e-05
+*RES
+1 b[6] *15:8 8.585 
+2 *15:8 *389:DIODE 1.6 
+3 *15:8 *52141:A 4.735 
+*END
+
+*D_NET *16 0.00099791
+*CONN
+*P b[7] I
+*I *390:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52142:A I *D sky130_fd_sc_hd__buf_4
+*CAP
+1 b[7] 0.000359372
+2 *390:DIODE 8.12781e-05
+3 *52142:A 3.37454e-05
+4 *16:5 0.000474396
+5 *390:DIODE *268:8 4.91189e-05
+*RES
+1 b[7] *16:5 6.3 
+2 *16:5 *52142:A 4.05 
+3 *16:5 *390:DIODE 5.235 
+*END
+
+*D_NET *17 0.00121158
+*CONN
+*P p[0] O
+*I *52151:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[0] 0.000605789
+2 *52151:X 0.000605789
+*RES
+1 *52151:X p[0] 13.77 
+*END
+
+*D_NET *18 0.0010246
+*CONN
+*P p[1] O
+*I *52152:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[1] 0.000512299
+2 *52152:X 0.000512299
+*RES
+1 *52152:X p[1] 12.735 
+*END
+
+*D_NET *19 0.0010246
+*CONN
+*P p[2] O
+*I *52153:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[2] 0.000512299
+2 *52153:X 0.000512299
+3 p[2] *52153:A 0
+*RES
+1 *52153:X p[2] 12.735 
+*END
+
+*D_NET *20 0.00103415
+*CONN
+*P p[3] O
+*I *52154:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[3] 0.00050087
+2 *52154:X 0.00050087
+3 p[3] *273:12 3.24046e-05
+*RES
+1 *52154:X p[3] 12.735 
+*END
+
+*D_NET *21 0.00157025
+*CONN
+*P p[4] O
+*I *52155:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[4] 0.000706208
+2 *52155:X 0.000706208
+3 p[4] *52155:A 9.66106e-05
+4 p[4] *275:18 6.12198e-05
+*RES
+1 *52155:X p[4] 15.6 
+*END
+
+*D_NET *22 0.0010626
+*CONN
+*P p[5] O
+*I *52156:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[5] 0.000531302
+2 *52156:X 0.000531302
+*RES
+1 *52156:X p[5] 13.08 
+*END
+
+*D_NET *23 0.00108511
+*CONN
+*P p[6] O
+*I *52157:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[6] 0.000526355
+2 *52157:X 0.000526355
+3 p[6] *52157:A 3.24046e-05
+*RES
+1 *52157:X p[6] 13.29 
+*END
+
+*D_NET *24 0.00130732
+*CONN
+*P p[7] O
+*I *52158:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[7] 0.000594139
+2 *52158:X 0.000594139
+3 p[7] *52158:A 0.000119044
+*RES
+1 *52158:X p[7] 14.115 
+*END
+
+*D_NET *27 0.000764492
+*CONN
+*I *51969:B I *D sky130_fd_sc_hd__or2_1
+*I *51968:Y O *D sky130_fd_sc_hd__a22oi_1
+*CAP
+1 *51969:B 0.000244449
+2 *51968:Y 0.000244449
+3 *51969:B *51921:C 0
+4 *51969:B *189:31 9.25515e-05
+5 *51969:B *193:38 1.4389e-05
+6 *51969:B *212:12 0.00011379
+7 *51969:B *262:26 6.57653e-06
+8 *51969:B *280:38 4.82863e-05
+*RES
+1 *51968:Y *51969:B 11.325 
+*END
+
+*D_NET *28 0.0036031
+*CONN
+*I *51994:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51972:B1 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51969:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51994:A 0.0001254
+2 *51972:B1 8.964e-06
+3 *51969:X 0.000405354
+4 *28:15 0.000539719
+5 *51972:B1 *51970:B 3.00381e-05
+6 *51972:B1 *51971:A0 4.82863e-05
+7 *51994:A *51967:C 0.000124744
+8 *51994:A *51972:B2 0.000185398
+9 *51994:A *51994:B 0.000117825
+10 *51994:A *31:8 0
+11 *51994:A *261:16 0
+12 *51994:A *278:56 3.31204e-05
+13 *28:15 *51969:A 1.08758e-05
+14 *28:15 *51970:B 0.000105288
+15 *28:15 *51971:A0 0.000122337
+16 *28:15 *51972:A1_N 0.000208448
+17 *28:15 *31:8 4.92062e-05
+18 *28:15 *189:45 0.000335365
+19 *28:15 *189:50 0.000390466
+20 *28:15 *192:37 0.000541113
+21 *28:15 *193:21 1.46744e-05
+22 *28:15 *193:38 1.91597e-05
+23 *28:15 *262:56 0.000187316
+*RES
+1 *51969:X *28:15 15.235 
+2 *28:15 *51972:B1 2.05 
+3 *28:15 *51994:A 9.53 
+*END
+
+*D_NET *29 0.00108806
+*CONN
+*I *51971:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *51970:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51971:A0 0.000232217
+2 *51970:Y 0.000232217
+3 *51971:A0 *51967:C 0.000162325
+4 *51971:A0 *51970:B 7.8192e-05
+5 *51971:A0 *51971:S 1.15688e-05
+6 *51971:A0 *51972:B2 4.82863e-05
+7 *51971:A0 *31:8 0.000140905
+8 *51971:A0 *272:188 1.17309e-05
+9 *51972:B1 *51971:A0 4.82863e-05
+10 *28:15 *51971:A0 0.000122337
+*RES
+1 *51970:Y *51971:A0 12.645 
+*END
+
+*D_NET *30 0.000742076
+*CONN
+*I *51994:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51972:B2 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51971:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *51994:B 7.18576e-05
+2 *51972:B2 0.000123426
+3 *51971:X 0
+4 *30:5 0.000195284
+5 *51972:B2 *261:16 0
+6 *51994:B *31:8 0
+7 *51994:B *261:16 0
+8 *51971:A0 *51972:B2 4.82863e-05
+9 *51994:A *51972:B2 0.000185398
+10 *51994:A *51994:B 0.000117825
+*RES
+1 *51971:X *30:5 3.6 
+2 *30:5 *51972:B2 6.195 
+3 *30:5 *51994:B 5.235 
+*END
+
+*D_NET *31 0.00363635
+*CONN
+*I *51974:B I *D sky130_fd_sc_hd__nor2_1
+*I *51973:B I *D sky130_fd_sc_hd__nand2_1
+*I *51988:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51972:X O *D sky130_fd_sc_hd__o2bb2a_1
+*CAP
+1 *51974:B 2.55445e-05
+2 *51973:B 0.000127407
+3 *51988:B 0.000407128
+4 *51972:X 0.000384322
+5 *31:21 0.000208647
+6 *31:8 0.000847145
+7 *51973:B *51974:A 7.46474e-05
+8 *51973:B *51975:A2 2.75229e-05
+9 *51974:B *51974:A 8.40269e-05
+10 *51974:B *51976:B 4.82919e-05
+11 *51988:B *51988:A 1.83756e-05
+12 *51988:B *51989:B 0.000234685
+13 *51988:B *259:20 4.01778e-05
+14 *51988:B *261:23 1.90662e-05
+15 *31:8 *51967:C 2.4997e-05
+16 *31:8 *51971:S 0.000116158
+17 *31:8 *51975:B1 2.42236e-05
+18 *31:8 *51989:A 0.000139252
+19 *31:8 *51996:A2 0
+20 *31:8 *34:8 0.000183738
+21 *31:8 *55:10 0
+22 *31:8 *258:8 0.000160651
+23 *31:8 *259:20 2.46007e-05
+24 *31:8 *261:16 0
+25 *31:8 *278:56 3.67779e-05
+26 *31:21 *51977:C 2.07184e-05
+27 *31:21 *34:8 0.000116853
+28 *31:21 *259:20 5.12859e-05
+29 *51971:A0 *31:8 0.000140905
+30 *51994:A *31:8 0
+31 *51994:B *31:8 0
+32 *28:15 *31:8 4.92062e-05
+*RES
+1 *51972:X *31:8 12.66 
+2 *31:8 *51988:B 8.805 
+3 *31:8 *31:21 3.635 
+4 *31:21 *51973:B 4.15 
+5 *31:21 *51974:B 2.395 
+*END
+
+*D_NET *32 0.000589132
+*CONN
+*I *51975:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *51973:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51975:A2 0.000189579
+2 *51973:Y 0.000189579
+3 *51975:A2 *51989:A 0
+4 *51975:A2 *258:8 0
+5 *51975:A2 *259:20 7.17811e-05
+6 *51975:A2 *272:83 0.00011067
+7 *51973:B *51975:A2 2.75229e-05
+*RES
+1 *51973:Y *51975:A2 11.07 
+*END
+
+*D_NET *33 0.000894387
+*CONN
+*I *51975:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *51974:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51975:B1 0.000201757
+2 *51974:Y 0.000201757
+3 *51975:B1 *51975:A1 4.82863e-05
+4 *51975:B1 *51999:A1 0.000140912
+5 *51975:B1 *51999:A2 0
+6 *51975:B1 *34:8 0.000277451
+7 *51975:B1 *225:22 0
+8 *31:8 *51975:B1 2.42236e-05
+*RES
+1 *51974:Y *51975:B1 12.105 
+*END
+
+*D_NET *34 0.00229914
+*CONN
+*I *51977:C I *D sky130_fd_sc_hd__and3_1
+*I *51976:B I *D sky130_fd_sc_hd__xor2_1
+*I *51975:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *51977:C 0.000290697
+2 *51976:B 0.000273186
+3 *51975:X 0.000125523
+4 *34:8 0.000689406
+5 *51976:B *51974:A 4.60584e-05
+6 *51977:C *225:22 0
+7 *51977:C *225:23 0.000199833
+8 *51977:C *265:57 2.73883e-05
+9 *51977:C *272:83 0
+10 *34:8 *225:22 0
+11 *51974:B *51976:B 4.82919e-05
+12 *51975:B1 *34:8 0.000277451
+13 *31:8 *34:8 0.000183738
+14 *31:21 *51977:C 2.07184e-05
+15 *31:21 *34:8 0.000116853
+*RES
+1 *51975:X *34:8 7.47 
+2 *34:8 *51976:B 7.845 
+3 *34:8 *51977:C 7.815 
+*END
+
+*D_NET *35 0.00107432
+*CONN
+*I *51978:A2 I *D sky130_fd_sc_hd__o21ba_2
+*I *52001:B I *D sky130_fd_sc_hd__xor2_1
+*I *51976:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51978:A2 0.000134909
+2 *52001:B 1.17375e-05
+3 *51976:X 8.56049e-05
+4 *35:6 0.000232251
+5 *51978:A2 *51978:A1 8.70923e-05
+6 *51978:A2 *261:29 9.60896e-05
+7 *51978:A2 *266:101 0.000163204
+8 *52001:B *51978:B1_N 2.75229e-05
+9 *52001:B *265:57 4.82919e-05
+10 *35:6 *51932:A 0
+11 *35:6 *51978:A1 1.1561e-05
+12 *35:6 *256:8 6.20952e-05
+13 *35:6 *261:29 0.000113964
+*RES
+1 *51976:X *35:6 6 
+2 *35:6 *52001:B 4.05 
+3 *35:6 *51978:A2 7.23 
+*END
+
+*D_NET *36 0.00152353
+*CONN
+*I *51978:B1_N I *D sky130_fd_sc_hd__o21ba_2
+*I *51977:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *51978:B1_N 0.000375448
+2 *51977:X 0.000375448
+3 *51978:B1_N *51932:A 4.43871e-06
+4 *51978:B1_N *51976:A 0.000461947
+5 *51978:B1_N *51978:A1 0
+6 *51978:B1_N *60:10 2.75145e-05
+7 *51978:B1_N *256:8 0
+8 *51978:B1_N *265:57 0.000251215
+9 *52001:B *51978:B1_N 2.75229e-05
+*RES
+1 *51977:X *51978:B1_N 15.585 
+*END
+
+*D_NET *37 0.00234342
+*CONN
+*I *51979:B I *D sky130_fd_sc_hd__xnor2_4
+*I *51980:B I *D sky130_fd_sc_hd__nor2_1
+*I *51978:X O *D sky130_fd_sc_hd__o21ba_2
+*CAP
+1 *51979:B 0.000137787
+2 *51980:B 3.36214e-05
+3 *51978:X 0.000414956
+4 *37:10 0.000586365
+5 *51979:B *51979:A 1.47347e-05
+6 *51979:B *51981:B1_N 0.000275548
+7 *51979:B *267:104 1.03423e-05
+8 *51979:B *272:130 0.000237249
+9 *51980:B *51979:A 5.4155e-06
+10 *37:10 *255:10 5.20968e-05
+11 *37:10 *266:101 0.000433003
+12 *37:10 *266:128 0.000116853
+13 *37:10 *272:130 2.54523e-05
+*RES
+1 *51978:X *37:10 12.665 
+2 *37:10 *51980:B 2.215 
+3 *37:10 *51979:B 5.425 
+*END
+
+*D_NET *38 0.0011253
+*CONN
+*I *51986:B I *D sky130_fd_sc_hd__xor2_4
+*I *51981:A2 I *D sky130_fd_sc_hd__o21bai_2
+*I *51979:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *51986:B 0.000185295
+2 *51981:A2 0.000107032
+3 *51979:Y 4.0179e-05
+4 *38:7 0.000332506
+5 *51981:A2 *51981:A1 2.86623e-05
+6 *51981:A2 *51981:B1_N 0
+7 *51981:A2 *51986:A 4.94404e-05
+8 *51986:B *51986:A 0.000112963
+9 *38:7 *267:104 6.77162e-05
+10 *38:7 *272:130 0.000201508
+*RES
+1 *51979:Y *38:7 5.43 
+2 *38:7 *51981:A2 5.49 
+3 *38:7 *51986:B 7.14 
+*END
+
+*D_NET *39 0.000989672
+*CONN
+*I *51981:B1_N I *D sky130_fd_sc_hd__o21bai_2
+*I *51980:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51981:B1_N 0.000279627
+2 *51980:Y 0.000279627
+3 *51981:B1_N *51979:A 0.000140145
+4 *51981:B1_N *51981:A1 0
+5 *51981:B1_N *51986:A 0
+6 *51981:B1_N *255:10 0
+7 *51981:B1_N *267:104 1.47256e-05
+8 *51981:B1_N *272:118 0
+9 *51981:B1_N *272:130 0
+10 *51979:B *51981:B1_N 0.000275548
+11 *51981:A2 *51981:B1_N 0
+*RES
+1 *51980:Y *51981:B1_N 13.005 
+*END
+
+*D_NET *40 0.00383885
+*CONN
+*I *52039:A I *D sky130_fd_sc_hd__nand2_1
+*I *51983:A I *D sky130_fd_sc_hd__xnor2_2
+*I *51981:Y O *D sky130_fd_sc_hd__o21bai_2
+*CAP
+1 *52039:A 0.000334825
+2 *51983:A 0
+3 *51981:Y 0.000514869
+4 *40:8 0.000849695
+5 *52039:A *52039:B 0.000615281
+6 *52039:A *52040:A1 0
+7 *52039:A *52040:A2 0
+8 *52039:A *52040:B1 0.000139231
+9 *52039:A *41:6 2.20948e-05
+10 *52039:A *42:6 0
+11 *52039:A *103:5 0.000233557
+12 *40:8 *51958:B_N 0
+13 *40:8 *51961:A 4.70919e-05
+14 *40:8 *51961:B 5.0751e-05
+15 *40:8 *51981:A1 8.57024e-05
+16 *40:8 *41:6 0.000115614
+17 *40:8 *232:80 0.000273643
+18 *40:8 *232:95 4.94474e-05
+19 *40:8 *254:7 0.000507048
+20 *40:8 *272:142 0
+*RES
+1 *51981:Y *40:8 15.315 
+2 *40:8 *51983:A 3.6 
+3 *40:8 *52039:A 12.36 
+*END
+
+*D_NET *41 0.0015854
+*CONN
+*I *52039:B I *D sky130_fd_sc_hd__nand2_1
+*I *51983:B I *D sky130_fd_sc_hd__xnor2_2
+*I *51982:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52039:B 0.000346747
+2 *51983:B 0
+3 *51982:X 6.94567e-05
+4 *41:6 0.000416204
+5 *52039:B *43:11 0
+6 *52039:A *52039:B 0.000615281
+7 *52039:A *41:6 2.20948e-05
+8 *40:8 *41:6 0.000115614
+*RES
+1 *51982:X *41:6 5.235 
+2 *41:6 *51983:B 3.6 
+3 *41:6 *52039:B 10.965 
+*END
+
+*D_NET *42 0.00103444
+*CONN
+*I *52040:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51984:B I *D sky130_fd_sc_hd__xor2_4
+*I *51983:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52040:A2 0.000173984
+2 *51984:B 0
+3 *51983:Y 9.31644e-05
+4 *42:6 0.000267148
+5 *52040:A2 *268:70 0
+6 *52040:A2 *268:78 0.000237243
+7 *52040:A2 *272:145 5.84984e-05
+8 *52040:A2 *273:11 0.000124787
+9 *42:6 *272:145 7.96171e-05
+10 *52039:A *52040:A2 0
+11 *52039:A *42:6 0
+*RES
+1 *51983:Y *42:6 5.745 
+2 *42:6 *51984:B 3.6 
+3 *42:6 *52040:A2 8.025 
+*END
+
+*D_NET *43 0.00206032
+*CONN
+*I *52045:A1 I *D sky130_fd_sc_hd__a21oi_4
+*I *52009:A I *D sky130_fd_sc_hd__xor2_4
+*I *51984:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52045:A1 0.000275119
+2 *52009:A 1.15875e-05
+3 *51984:X 0.00046983
+4 *43:11 0.000756537
+5 *52009:A *268:78 4.23245e-05
+6 *52009:A *273:11 1.83756e-05
+7 *52045:A1 *52045:A2 0
+8 *52045:A1 *67:8 0
+9 *52045:A1 *103:5 0.000161829
+10 *43:11 *268:78 0.000228149
+11 *43:11 *273:11 9.65676e-05
+12 *52039:B *43:11 0
+*RES
+1 *51984:X *43:11 12.0025 
+2 *43:11 *52009:A 2.05 
+3 *43:11 *52045:A1 10.52 
+*END
+
+*D_NET *44 0.00170673
+*CONN
+*I *52008:A I *D sky130_fd_sc_hd__xor2_4
+*I *52044:A I *D sky130_fd_sc_hd__nor2_1
+*I *51985:X O *D sky130_fd_sc_hd__and2_2
+*CAP
+1 *52008:A 0
+2 *52044:A 0.000157135
+3 *51985:X 0.000369541
+4 *44:10 0.000526676
+5 *52044:A *52008:B 0.00030913
+6 *52044:A *52045:B1 0.000164352
+7 *44:10 *52044:B 0
+8 *44:10 *45:7 9.3305e-05
+9 *44:10 *66:8 8.65905e-05
+*RES
+1 *51985:X *44:10 10.445 
+2 *44:10 *52044:A 6.325 
+3 *44:10 *52008:A 1.6 
+*END
+
+*D_NET *45 0.00184221
+*CONN
+*I *52007:A1 I *D sky130_fd_sc_hd__a21boi_2
+*I *52134:A I *D sky130_fd_sc_hd__xnor2_4
+*I *51986:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52007:A1 0
+2 *52134:A 0.000147273
+3 *51986:X 0.000556719
+4 *45:7 0.000703992
+5 *52134:A *336:DIODE 0
+6 *52134:A *51985:B 1.22676e-05
+7 *52134:A *52133:B 0
+8 *45:7 *51985:B 0.000207896
+9 *45:7 *52007:A2 3.00381e-05
+10 *45:7 *66:8 9.0716e-05
+11 *44:10 *45:7 9.3305e-05
+*RES
+1 *51986:X *45:7 9.7275 
+2 *45:7 *52134:A 8 
+3 *45:7 *52007:A1 1.6 
+*END
+
+*D_NET *46 0.00229799
+*CONN
+*I *52006:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52005:A I *D sky130_fd_sc_hd__nand3_1
+*I *51987:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52006:B1 0
+2 *52005:A 0.000129565
+3 *51987:Y 0.000528565
+4 *46:10 0.00065813
+5 *52005:A *52005:B 0.000246778
+6 *52005:A *52005:C 3.15199e-05
+7 *52005:A *52006:A2 9.47848e-05
+8 *52005:A *64:9 4.16262e-05
+9 *46:10 *52004:B 1.61831e-05
+10 *46:10 *52131:B 0.000433003
+11 *46:10 *52132:A 0.000117832
+*RES
+1 *51987:Y *46:10 12.95 
+2 *46:10 *52005:A 5.185 
+3 *46:10 *52006:B1 1.6 
+*END
+
+*D_NET *47 0.000510367
+*CONN
+*I *51989:B I *D sky130_fd_sc_hd__xor2_1
+*I *51988:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51989:B 7.31217e-05
+2 *51988:Y 7.31217e-05
+3 *51989:B *259:20 0.000113255
+4 *51989:B *261:23 1.61831e-05
+5 *51988:B *51989:B 0.000234685
+*RES
+1 *51988:Y *51989:B 5.735 
+*END
+
+*D_NET *48 0.00068605
+*CONN
+*I *51999:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51989:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51999:A1 0.000265393
+2 *51989:X 0.000265393
+3 *51999:A1 *51999:A2 0
+4 *51999:A1 *55:10 0
+5 *51999:A1 *225:22 1.43521e-05
+6 *51975:B1 *51999:A1 0.000140912
+*RES
+1 *51989:X *51999:A1 11.01 
+*END
+
+*D_NET *49 0.00073466
+*CONN
+*I *51992:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51990:X O *D sky130_fd_sc_hd__and2b_1
+*CAP
+1 *51992:A2 0.00011961
+2 *51990:X 0.00011961
+3 *51992:A2 *51990:A_N 8.51453e-05
+4 *51992:A2 *51992:A1 0.000242837
+5 *51992:A2 *51992:B1 2.37234e-05
+6 *51992:A2 *232:8 9.37731e-05
+7 *51992:A2 *282:18 4.99619e-05
+*RES
+1 *51990:X *51992:A2 10.56 
+*END
+
+*D_NET *50 0.000351217
+*CONN
+*I *51992:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *51991:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *51992:B1 0.000117113
+2 *51991:X 0.000117113
+3 *51992:B1 *51992:A1 0
+4 *51992:B1 *51:8 4.05358e-05
+5 *51992:B1 *232:8 4.43871e-06
+6 *51992:B1 *281:47 4.82919e-05
+7 *51992:A2 *51992:B1 2.37234e-05
+*RES
+1 *51991:X *51992:B1 9.285 
+*END
+
+*D_NET *51 0.00157516
+*CONN
+*I *51993:B I *D sky130_fd_sc_hd__nand2_1
+*I *51995:B I *D sky130_fd_sc_hd__nor2_1
+*I *51992:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *51993:B 0
+2 *51995:B 4.8489e-05
+3 *51992:X 0.000536958
+4 *51:8 0.000585447
+5 *51995:B *207:13 0.000238137
+6 *51995:B *258:8 9.65676e-05
+7 *51:8 *51972:A1_N 0
+8 *51:8 *51990:A_N 2.06083e-05
+9 *51:8 *51991:A1 8.41703e-06
+10 *51:8 *51991:B2 0
+11 *51:8 *51996:A1 0
+12 *51:8 *192:37 0
+13 *51:8 *232:8 0
+14 *51:8 *278:81 0
+15 *51:8 *281:47 0
+16 *51992:B1 *51:8 4.05358e-05
+*RES
+1 *51992:X *51:8 13.1 
+2 *51:8 *51995:B 3.775 
+3 *51:8 *51993:B 1.6 
+*END
+
+*D_NET *52 0.000955364
+*CONN
+*I *51996:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51993:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51996:A1 0.00022903
+2 *51993:Y 0.00022903
+3 *51996:A1 *51971:A1 0.000124007
+4 *51996:A1 *51996:B1 9.30717e-05
+5 *51996:A1 *55:10 1.15688e-05
+6 *51996:A1 *207:13 0.000198945
+7 *51996:A1 *278:70 6.97118e-05
+8 *51:8 *51996:A1 0
+*RES
+1 *51993:Y *51996:A1 11.55 
+*END
+
+*D_NET *53 0.000824485
+*CONN
+*I *51996:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *51994:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51996:A2 0.000285184
+2 *51994:Y 0.000285184
+3 *51996:A2 *55:10 6.28687e-05
+4 *51996:A2 *207:13 1.08758e-05
+5 *51996:A2 *207:19 0.000180373
+6 *31:8 *51996:A2 0
+*RES
+1 *51994:Y *51996:A2 11.445 
+*END
+
+*D_NET *54 0.0004575
+*CONN
+*I *51996:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51995:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51996:B1 9.36676e-05
+2 *51995:Y 9.36676e-05
+3 *51996:B1 *55:10 9.30717e-05
+4 *51996:B1 *207:13 8.40213e-05
+5 *51996:A1 *51996:B1 9.30717e-05
+*RES
+1 *51995:Y *51996:B1 9.12 
+*END
+
+*D_NET *55 0.00185721
+*CONN
+*I *51998:A2 I *D sky130_fd_sc_hd__o21ai_1
+*I *51997:B I *D sky130_fd_sc_hd__nand2_1
+*I *51996:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *51998:A2 6.44245e-05
+2 *51997:B 0
+3 *51996:Y 0.000319135
+4 *55:10 0.00038356
+5 *51998:A2 *225:15 0.000313852
+6 *51998:A2 *261:23 0.000237243
+7 *55:10 *51971:A1 4.82919e-05
+8 *55:10 *51971:S 0
+9 *55:10 *51999:A2 6.47516e-05
+10 *55:10 *58:6 0.000208477
+11 *55:10 *279:31 4.99619e-05
+12 *51996:A1 *55:10 1.15688e-05
+13 *51996:A2 *55:10 6.28687e-05
+14 *51996:B1 *55:10 9.30717e-05
+15 *51999:A1 *55:10 0
+16 *31:8 *55:10 0
+*RES
+1 *51996:Y *55:10 12.53 
+2 *55:10 *51997:B 1.6 
+3 *55:10 *51998:A2 4.465 
+*END
+
+*D_NET *56 0.000199155
+*CONN
+*I *51999:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *51997:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51999:A2 6.72019e-05
+2 *51997:Y 6.72019e-05
+3 *51975:B1 *51999:A2 0
+4 *51999:A1 *51999:A2 0
+5 *55:10 *51999:A2 6.47516e-05
+*RES
+1 *51997:Y *51999:A2 8.58 
+*END
+
+*D_NET *57 0.000418357
+*CONN
+*I *51999:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51998:Y O *D sky130_fd_sc_hd__o21ai_1
+*CAP
+1 *51999:B1 0.000209178
+2 *51998:Y 0.000209178
+3 *51999:B1 *58:6 0
+*RES
+1 *51998:Y *51999:B1 10.155 
+*END
+
+*D_NET *58 0.00205729
+*CONN
+*I *52002:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52000:B I *D sky130_fd_sc_hd__nand2_1
+*I *51999:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52002:B1 0.000256719
+2 *52000:B 0
+3 *51999:Y 0.000500356
+4 *58:6 0.000757076
+5 *52002:B1 *345:DIODE 0
+6 *52002:B1 *52003:B 0.000198945
+7 *52002:B1 *59:8 0
+8 *52002:B1 *60:10 0
+9 *52002:B1 *261:29 8.65961e-05
+10 *58:6 *308:DIODE 0
+11 *58:6 *51976:A 4.91189e-05
+12 *58:6 *60:10 0
+13 *58:6 *225:22 0
+14 *58:6 *261:29 0
+15 *51999:B1 *58:6 0
+16 *55:10 *58:6 0.000208477
+*RES
+1 *51999:Y *58:6 12.375 
+2 *58:6 *52000:B 3.6 
+3 *58:6 *52002:B1 8.115 
+*END
+
+*D_NET *59 0.00164934
+*CONN
+*I *52006:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *52005:B I *D sky130_fd_sc_hd__nand3_1
+*I *52003:A I *D sky130_fd_sc_hd__and2_1
+*I *52000:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52006:A1 0
+2 *52005:B 0.000200389
+3 *52003:A 0
+4 *52000:Y 0.000142954
+5 *59:21 0.000452555
+6 *59:8 0.00039512
+7 *52005:B *52005:C 1.61831e-05
+8 *59:8 *345:DIODE 0
+9 *59:8 *60:10 0
+10 *59:8 *266:101 1.16578e-05
+11 *59:8 *266:103 8.8266e-05
+12 *59:21 *52132:A 7.23533e-05
+13 *59:21 *60:10 0
+14 *59:21 *62:8 2.3087e-05
+15 *59:21 *63:18 0
+16 *52002:B1 *59:8 0
+17 *52005:A *52005:B 0.000246778
+*RES
+1 *52000:Y *59:8 5.775 
+2 *59:8 *52003:A 3.6 
+3 *59:8 *59:21 6.23 
+4 *59:21 *52005:B 4.48 
+5 *59:21 *52006:A1 1.6 
+*END
+
+*D_NET *60 0.00271701
+*CONN
+*I *52130:A I *D sky130_fd_sc_hd__or2_1
+*I *52004:A I *D sky130_fd_sc_hd__nand2_1
+*I *52001:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52130:A 6.56321e-05
+2 *52004:A 0.000423989
+3 *52001:X 0.000333118
+4 *60:10 0.000822739
+5 *52004:A *52130:B 0.000136152
+6 *52004:A *52131:A 0.000475535
+7 *52130:A *52130:B 4.82919e-05
+8 *52130:A *52131:B 4.60584e-05
+9 *60:10 *62:8 0
+10 *60:10 *261:29 0.000291365
+11 *60:10 *261:38 0
+12 *60:10 *265:57 4.66108e-05
+13 *51978:B1_N *60:10 2.75145e-05
+14 *52002:B1 *60:10 0
+15 *58:6 *60:10 0
+16 *59:8 *60:10 0
+17 *59:21 *60:10 0
+*RES
+1 *52001:X *60:10 12.02 
+2 *60:10 *52004:A 8.47 
+3 *60:10 *52130:A 3.1 
+*END
+
+*D_NET *61 0.000494509
+*CONN
+*I *52003:B I *D sky130_fd_sc_hd__and2_1
+*I *52002:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52003:B 0.000147782
+2 *52002:X 0.000147782
+3 *52002:B1 *52003:B 0.000198945
+*RES
+1 *52002:X *52003:B 6.065 
+*END
+
+*D_NET *62 0.00144967
+*CONN
+*I *52130:B I *D sky130_fd_sc_hd__or2_1
+*I *52004:B I *D sky130_fd_sc_hd__nand2_1
+*I *52003:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52130:B 3.82455e-05
+2 *52004:B 0.000131139
+3 *52003:X 0.000119196
+4 *62:8 0.000288581
+5 *52004:B *52131:A 0.000356075
+6 *52004:B *52131:B 3.12176e-05
+7 *52130:B *52131:A 2.16917e-05
+8 *52130:B *52131:B 0.000239813
+9 *52004:A *52130:B 0.000136152
+10 *52130:A *52130:B 4.82919e-05
+11 *46:10 *52004:B 1.61831e-05
+12 *59:21 *62:8 2.3087e-05
+13 *60:10 *62:8 0
+*RES
+1 *52003:X *62:8 7.235 
+2 *62:8 *52004:B 5.185 
+3 *62:8 *52130:B 3.775 
+*END
+
+*D_NET *63 0.0019819
+*CONN
+*I *52006:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52005:C I *D sky130_fd_sc_hd__nand3_1
+*I *52131:A I *D sky130_fd_sc_hd__and2_1
+*I *52004:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52006:A2 4.46855e-05
+2 *52005:C 9.23447e-05
+3 *52131:A 0.000125341
+4 *52004:Y 0
+5 *63:18 0.000261967
+6 *63:4 0.000250278
+7 *52005:C *64:9 4.82863e-05
+8 *52006:A2 *64:9 0.000163204
+9 *63:18 *52132:A 0
+10 *52004:A *52131:A 0.000475535
+11 *52004:B *52131:A 0.000356075
+12 *52005:A *52005:C 3.15199e-05
+13 *52005:A *52006:A2 9.47848e-05
+14 *52005:B *52005:C 1.61831e-05
+15 *52130:B *52131:A 2.16917e-05
+16 *59:21 *63:18 0
+*RES
+1 *52004:Y *63:4 1.6 
+2 *63:4 *52131:A 6.64 
+3 *63:4 *63:18 5.635 
+4 *63:18 *52005:C 3.445 
+5 *63:18 *52006:A2 3.445 
+*END
+
+*D_NET *64 0.00216255
+*CONN
+*I *52007:A2 I *D sky130_fd_sc_hd__a21boi_2
+*I *52133:B I *D sky130_fd_sc_hd__nand2_1
+*I *52005:Y O *D sky130_fd_sc_hd__nand3_1
+*CAP
+1 *52007:A2 7.10556e-05
+2 *52133:B 0.000197847
+3 *52005:Y 0.000388188
+4 *64:9 0.00065709
+5 *52007:A2 *66:8 0.000162311
+6 *52133:B *52133:A 8.56966e-05
+7 *52133:B *52134:B 6.74079e-05
+8 *64:9 *52007:B1_N 4.82919e-05
+9 *64:9 *65:5 0.000201503
+10 *52005:A *64:9 4.16262e-05
+11 *52005:C *64:9 4.82863e-05
+12 *52006:A2 *64:9 0.000163204
+13 *52134:A *52133:B 0
+14 *45:7 *52007:A2 3.00381e-05
+*RES
+1 *52005:Y *64:9 8.38 
+2 *64:9 *52133:B 9.53 
+3 *64:9 *52007:A2 3.43 
+*END
+
+*D_NET *65 0.00108426
+*CONN
+*I *52007:B1_N I *D sky130_fd_sc_hd__a21boi_2
+*I *52133:A I *D sky130_fd_sc_hd__nand2_1
+*I *52006:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52007:B1_N 1.58418e-05
+2 *52133:A 0.000202276
+3 *52006:X 7.20296e-05
+4 *65:5 0.000290147
+5 *52133:A *52132:A 0
+6 *52133:A *52134:B 0.000120186
+7 *52133:A *270:6 0
+8 *52133:A *271:5 4.82919e-05
+9 *52133:B *52133:A 8.56966e-05
+10 *64:9 *52007:B1_N 4.82919e-05
+11 *64:9 *65:5 0.000201503
+*RES
+1 *52006:X *65:5 3.43 
+2 *65:5 *52133:A 9.98 
+3 *65:5 *52007:B1_N 2.05 
+*END
+
+*D_NET *66 0.00251045
+*CONN
+*I *52044:B I *D sky130_fd_sc_hd__nor2_1
+*I *52008:B I *D sky130_fd_sc_hd__xor2_4
+*I *52007:Y O *D sky130_fd_sc_hd__a21boi_2
+*CAP
+1 *52044:B 3.4877e-05
+2 *52008:B 0.000300928
+3 *52007:Y 0.000420249
+4 *66:8 0.000756054
+5 *52044:B *51985:A 0
+6 *66:8 *51985:A 0
+7 *66:8 *51985:B 0.000349598
+8 *52007:A2 *66:8 0.000162311
+9 *52044:A *52008:B 0.00030913
+10 *44:10 *52044:B 0
+11 *44:10 *66:8 8.65905e-05
+12 *45:7 *66:8 9.0716e-05
+*RES
+1 *52007:Y *66:8 11.64 
+2 *66:8 *52008:B 8.91 
+3 *66:8 *52044:B 4.215 
+*END
+
+*D_NET *67 0.000544538
+*CONN
+*I *52045:A2 I *D sky130_fd_sc_hd__a21oi_4
+*I *52009:B I *D sky130_fd_sc_hd__xor2_4
+*I *52008:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52045:A2 0.00013285
+2 *52009:B 0
+3 *52008:X 0.000139419
+4 *67:8 0.000272269
+5 *52045:A2 *52045:B1 0
+6 *52045:A2 *273:12 0
+7 *67:8 *52045:B1 0
+8 *52045:A1 *52045:A2 0
+9 *52045:A1 *67:8 0
+*RES
+1 *52008:X *67:8 4.0325 
+2 *67:8 *52009:B 3.6 
+3 *67:8 *52045:A2 5.745 
+*END
+
+*D_NET *68 0.00384418
+*CONN
+*I *52014:A I *D sky130_fd_sc_hd__xor2_1
+*I *52050:B I *D sky130_fd_sc_hd__and2b_1
+*I *52010:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52014:A 6.82738e-05
+2 *52050:B 0.000305244
+3 *52010:Y 0.001073
+4 *68:5 0.00144652
+5 *52014:A *191:6 0
+6 *52014:A *193:113 0.000116165
+7 *52050:B *52050:A_N 8.40325e-05
+8 *52050:B *52051:B1 0.0001249
+9 *68:5 *52010:B 0.000387896
+10 *68:5 *52012:C 0.000238137
+*RES
+1 *52010:Y *68:5 14.47 
+2 *68:5 *52050:B 6.97 
+3 *68:5 *52014:A 6.98 
+*END
+
+*D_NET *69 0.00246199
+*CONN
+*I *52013:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *52011:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52013:A0 0.000617634
+2 *52011:Y 0.000617634
+3 *52013:A0 *51902:A 0.000245206
+4 *52013:A0 *51902:B 0.000590187
+5 *52013:A0 *51903:B1 0.000160635
+6 *52013:A0 *193:113 0.000220359
+7 *52013:A0 *203:69 1.03323e-05
+*RES
+1 *52011:Y *52013:A0 17.46 
+*END
+
+*D_NET *70 0.00125143
+*CONN
+*I *52051:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52013:S I *D sky130_fd_sc_hd__mux2_1
+*I *52012:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52051:A2 1.1356e-05
+2 *52013:S 9.79171e-05
+3 *52012:X 0.000193277
+4 *70:7 0.00030255
+5 *52013:S *193:117 0.000103192
+6 *52051:A2 *187:39 1.83847e-05
+7 *52051:A2 *283:39 2.30292e-05
+8 *70:7 *187:39 0.000240758
+9 *70:7 *283:11 6.97202e-05
+10 *70:7 *283:39 0.000191243
+*RES
+1 *52012:X *70:7 7.495 
+2 *70:7 *52013:S 7.745 
+3 *70:7 *52051:A2 2.05 
+*END
+
+*D_NET *71 0.0013363
+*CONN
+*I *52050:A_N I *D sky130_fd_sc_hd__and2b_1
+*I *52014:B I *D sky130_fd_sc_hd__xor2_1
+*I *52013:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *52050:A_N 0.000309337
+2 *52014:B 0.000137633
+3 *52013:X 0
+4 *71:4 0.00044697
+5 *52014:B *51902:A 5.4256e-05
+6 *52014:B *207:73 0.000194694
+7 *52014:B *281:104 0.000109377
+8 *52050:B *52050:A_N 8.40325e-05
+*RES
+1 *52013:X *71:4 1.6 
+2 *71:4 *52014:B 9.065 
+3 *71:4 *52050:A_N 5.515 
+*END
+
+*D_NET *72 0.000989141
+*CONN
+*I *52018:A I *D sky130_fd_sc_hd__nor2_1
+*I *52019:A I *D sky130_fd_sc_hd__and2_1
+*I *52014:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52018:A 0.000155116
+2 *52019:A 0.000114565
+3 *52014:X 5.78043e-05
+4 *72:6 0.000327485
+5 *52018:A *51905:B 0
+6 *52018:A *52019:B 0
+7 *52018:A *74:5 4.82863e-05
+8 *52019:A *203:69 0.000165698
+9 *72:6 *51902:A 0.000120186
+*RES
+1 *52014:X *72:6 4.98 
+2 *72:6 *52019:A 6.12 
+3 *72:6 *52018:A 6.195 
+*END
+
+*D_NET *73 0.00110975
+*CONN
+*I *52017:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52056:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52015:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52017:A 0
+2 *52056:A1 0.000138063
+3 *52015:Y 0.0002734
+4 *73:9 0.000411463
+5 *52056:A1 *52056:A2 0.000181383
+6 *52056:A1 *264:9 2.75145e-05
+7 *73:9 *52019:B 0
+8 *73:9 *52020:B 0
+9 *73:9 *52056:A2 4.82919e-05
+10 *73:9 *76:5 2.96334e-05
+11 *73:9 *225:108 0
+*RES
+1 *52015:Y *73:9 10.16 
+2 *73:9 *52056:A1 8.45 
+3 *73:9 *52017:A 1.6 
+*END
+
+*D_NET *74 0.00180248
+*CONN
+*I *52056:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52017:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52016:Y O *D sky130_fd_sc_hd__a22oi_2
+*CAP
+1 *52056:A2 0.000100488
+2 *52017:B 0
+3 *52016:Y 0.00035968
+4 *74:5 0.000460168
+5 *52056:A2 *52056:B1_N 5.4256e-05
+6 *52056:A2 *76:5 4.66742e-05
+7 *52056:A2 *225:108 0
+8 *74:5 *52016:A2 1.47256e-05
+9 *74:5 *52016:B2 4.82863e-05
+10 *74:5 *52018:B 0.000203178
+11 *74:5 *52019:B 4.58166e-05
+12 *74:5 *76:5 0.000191243
+13 *52018:A *74:5 4.82863e-05
+14 *52056:A1 *52056:A2 0.000181383
+15 *73:9 *52056:A2 4.82919e-05
+*RES
+1 *52016:Y *74:5 9.295 
+2 *74:5 *52017:B 1.6 
+3 *74:5 *52056:A2 8.54 
+*END
+
+*D_NET *75 0.000824493
+*CONN
+*I *52019:B I *D sky130_fd_sc_hd__and2_1
+*I *52018:B I *D sky130_fd_sc_hd__nor2_1
+*I *52017:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52019:B 0.000180859
+2 *52018:B 0.00010689
+3 *52017:Y 0
+4 *75:4 0.000287749
+5 *52018:A *52019:B 0
+6 *73:9 *52019:B 0
+7 *74:5 *52018:B 0.000203178
+8 *74:5 *52019:B 4.58166e-05
+*RES
+1 *52017:Y *75:4 1.6 
+2 *75:4 *52018:B 4.045 
+3 *75:4 *52019:B 8.12 
+*END
+
+*D_NET *76 0.00155123
+*CONN
+*I *52056:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52020:A I *D sky130_fd_sc_hd__or2_1
+*I *52018:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52056:B1_N 8.78858e-05
+2 *52020:A 0.000178377
+3 *52018:Y 0.00034845
+4 *76:5 0.000614713
+5 *52056:B1_N *225:108 0
+6 *52056:A2 *52056:B1_N 5.4256e-05
+7 *52056:A2 *76:5 4.66742e-05
+8 *73:9 *76:5 2.96334e-05
+9 *74:5 *76:5 0.000191243
+*RES
+1 *52018:Y *76:5 6.19 
+2 *76:5 *52020:A 4.3 
+3 *76:5 *52056:B1_N 7.235 
+*END
+
+*D_NET *77 0.000704338
+*CONN
+*I *52020:B I *D sky130_fd_sc_hd__or2_1
+*I *52019:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52020:B 0.000163925
+2 *52019:X 0.000163925
+3 *52020:B *203:69 0.000237243
+4 *52020:B *225:108 0.000139245
+5 *73:9 *52020:B 0
+*RES
+1 *52019:X *52020:B 11.01 
+*END
+
+*D_NET *78 0.00138909
+*CONN
+*I *52025:A I *D sky130_fd_sc_hd__and2_1
+*I *52024:A I *D sky130_fd_sc_hd__nor2_1
+*I *52020:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52025:A 0.0001422
+2 *52024:A 0
+3 *52020:X 0.000201071
+4 *78:8 0.000343271
+5 *52025:A *52024:B 2.23407e-05
+6 *52025:A *52025:B 0.000236868
+7 *52025:A *52058:A 0
+8 *52025:A *119:9 0.000239813
+9 *52025:A *265:13 4.60584e-05
+10 *78:8 *52024:B 5.53249e-06
+11 *78:8 *52058:A 0
+12 *78:8 *111:6 0
+13 *78:8 *225:108 0.000151933
+*RES
+1 *52020:X *78:8 7.47 
+2 *78:8 *52024:A 3.6 
+3 *78:8 *52025:A 7.92 
+*END
+
+*D_NET *79 0.001142
+*CONN
+*I *52062:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52023:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52021:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52062:A1 0
+2 *52023:A 0.000136039
+3 *52021:Y 0.000328931
+4 *79:8 0.000464969
+5 *52023:A *52062:A2 8.70923e-05
+6 *52023:A *82:8 0
+7 *52023:A *225:108 0
+8 *79:8 *52026:A 9.2741e-05
+9 *79:8 *52026:B 2.66935e-05
+10 *79:8 *52062:A2 5.53249e-06
+*RES
+1 *52021:Y *79:8 7.845 
+2 *79:8 *52023:A 6 
+3 *79:8 *52062:A1 3.6 
+*END
+
+*D_NET *80 0.0012609
+*CONN
+*I *52062:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52023:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52022:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52062:A2 0.000111113
+2 *52023:B 2.08101e-05
+3 *52022:Y 0.000137989
+4 *80:5 0.000269912
+5 *52062:A2 *82:8 6.14602e-05
+6 *52062:A2 *266:64 0.000122331
+7 *80:5 *52022:B1 1.16578e-05
+8 *80:5 *266:64 0.000433003
+9 *52023:A *52062:A2 8.70923e-05
+10 *79:8 *52062:A2 5.53249e-06
+*RES
+1 *52022:Y *80:5 5.5 
+2 *80:5 *52023:B 1.96 
+3 *80:5 *52062:A2 8.63 
+*END
+
+*D_NET *81 0.00144301
+*CONN
+*I *52025:B I *D sky130_fd_sc_hd__and2_1
+*I *52024:B I *D sky130_fd_sc_hd__nor2_1
+*I *52023:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52025:B 0.000100819
+2 *52024:B 1.85441e-05
+3 *52023:Y 4.64842e-05
+4 *81:7 0.000165847
+5 *52024:B *225:108 5.16348e-05
+6 *52025:B *52021:A 7.47215e-05
+7 *52025:B *119:9 4.21973e-05
+8 *52025:B *225:108 8.28738e-05
+9 *52025:B *265:13 0.000239813
+10 *81:7 *82:8 0.00015896
+11 *81:7 *266:64 0.00019637
+12 *52025:A *52024:B 2.23407e-05
+13 *52025:A *52025:B 0.000236868
+14 *78:8 *52024:B 5.53249e-06
+*RES
+1 *52023:Y *81:7 5.43 
+2 *81:7 *52024:B 4.215 
+3 *81:7 *52025:B 7.665 
+*END
+
+*D_NET *82 0.00115423
+*CONN
+*I *52026:A I *D sky130_fd_sc_hd__or2_1
+*I *52062:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52024:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52026:A 0.000152785
+2 *52062:B1_N 0
+3 *52024:Y 0.000168593
+4 *82:8 0.000321377
+5 *52026:A *52021:A 5.85071e-05
+6 *52026:A *52026:B 4.94404e-05
+7 *82:8 *52021:A 2.96383e-05
+8 *82:8 *225:108 3.90349e-05
+9 *82:8 *266:64 2.16917e-05
+10 *52023:A *82:8 0
+11 *52062:A2 *82:8 6.14602e-05
+12 *79:8 *52026:A 9.2741e-05
+13 *81:7 *82:8 0.00015896
+*RES
+1 *52024:Y *82:8 7.575 
+2 *82:8 *52062:B1_N 3.6 
+3 *82:8 *52026:A 6.975 
+*END
+
+*D_NET *83 0.00106821
+*CONN
+*I *52026:B I *D sky130_fd_sc_hd__or2_1
+*I *52025:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52026:B 0.000301251
+2 *52025:X 0.000301251
+3 *52026:B *265:13 0.000389572
+4 *52026:A *52026:B 4.94404e-05
+5 *79:8 *52026:B 2.66935e-05
+*RES
+1 *52025:X *52026:B 11.88 
+*END
+
+*D_NET *84 0.00137408
+*CONN
+*I *52031:A I *D sky130_fd_sc_hd__and2_1
+*I *52030:A I *D sky130_fd_sc_hd__nor2_1
+*I *52026:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52031:A 0
+2 *52030:A 0.000276629
+3 *52026:X 0.000232216
+4 *84:5 0.000508845
+5 *52030:A *52030:B 0.000318091
+6 *52030:A *87:11 3.83041e-05
+*RES
+1 *52026:X *84:5 5.155 
+2 *84:5 *52030:A 6.565 
+3 *84:5 *52031:A 1.6 
+*END
+
+*D_NET *85 0.00166891
+*CONN
+*I *52029:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52067:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52027:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52029:A 0.000207105
+2 *52067:A1 2.19157e-05
+3 *52027:Y 4.11166e-05
+4 *85:5 0.000270137
+5 *52029:A *52029:B 0.000298666
+6 *52029:A *86:5 4.21973e-05
+7 *52029:A *124:11 0.000353831
+8 *52029:A *266:72 4.82863e-05
+9 *52067:A1 *52027:B 0
+10 *52067:A1 *52067:A2 5.4155e-06
+11 *52067:A1 *266:72 0
+12 *85:5 *86:5 0.000141323
+13 *85:5 *266:72 0.000238919
+*RES
+1 *52027:Y *85:5 3.775 
+2 *85:5 *52067:A1 1.96 
+3 *85:5 *52029:A 7.585 
+*END
+
+*D_NET *86 0.00162262
+*CONN
+*I *52029:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52067:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52028:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52029:B 0.000201209
+2 *52067:A2 1.88809e-05
+3 *52028:X 0.000245051
+4 *86:5 0.000465141
+5 *52029:B *87:11 4.82919e-05
+6 *86:5 *266:72 1.12578e-05
+7 *86:5 *266:74 0.000145184
+8 *52029:A *52029:B 0.000298666
+9 *52029:A *86:5 4.21973e-05
+10 *52067:A1 *52067:A2 5.4155e-06
+11 *85:5 *86:5 0.000141323
+*RES
+1 *52028:X *86:5 6.88 
+2 *86:5 *52067:A2 1.96 
+3 *86:5 *52029:B 6.19 
+*END
+
+*D_NET *87 0.00100738
+*CONN
+*I *52031:B I *D sky130_fd_sc_hd__and2_1
+*I *52030:B I *D sky130_fd_sc_hd__nor2_1
+*I *52029:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52031:B 0
+2 *52030:B 6.94892e-05
+3 *52029:Y 0.000136293
+4 *87:11 0.000205782
+5 *52030:B *52032:B 3.72916e-05
+6 *52030:B *88:8 5.34747e-05
+7 *87:11 *52032:B 0.000100365
+8 *87:11 *266:72 0
+9 *52029:B *87:11 4.82919e-05
+10 *52030:A *52030:B 0.000318091
+11 *52030:A *87:11 3.83041e-05
+*RES
+1 *52029:Y *87:11 8.39 
+2 *87:11 *52030:B 4.465 
+3 *87:11 *52031:B 1.6 
+*END
+
+*D_NET *88 0.000971338
+*CONN
+*I *52032:A I *D sky130_fd_sc_hd__nor2_1
+*I *52067:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52030:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52032:A 0.000144299
+2 *52067:B1_N 0
+3 *52030:Y 0.000189733
+4 *88:8 0.000334031
+5 *52032:A *52032:B 0
+6 *52032:A *90:5 0.0001249
+7 *52032:A *90:14 0
+8 *52032:A *212:99 0.0001249
+9 *52032:A *266:72 0
+10 *88:8 *52032:B 0
+11 *88:8 *266:72 0
+12 *52030:B *88:8 5.34747e-05
+*RES
+1 *52030:Y *88:8 6.375 
+2 *88:8 *52067:B1_N 3.6 
+3 *88:8 *52032:A 6.63 
+*END
+
+*D_NET *89 0.000667145
+*CONN
+*I *52032:B I *D sky130_fd_sc_hd__nor2_1
+*I *52031:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52032:B 0.000264744
+2 *52031:X 0.000264744
+3 *52030:B *52032:B 3.72916e-05
+4 *52032:A *52032:B 0
+5 *87:11 *52032:B 0.000100365
+6 *88:8 *52032:B 0
+*RES
+1 *52031:X *52032:B 11.415 
+*END
+
+*D_NET *90 0.0028236
+*CONN
+*I *52072:A1 I *D sky130_fd_sc_hd__a21boi_1
+*I *52037:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52036:A I *D sky130_fd_sc_hd__and3_1
+*I *52032:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52072:A1 0.000263508
+2 *52037:B1 9.05771e-05
+3 *52036:A 0.000105167
+4 *52032:Y 0.000184476
+5 *90:14 0.000478158
+6 *90:5 0.000413716
+7 *52036:A *52036:C 9.28053e-05
+8 *52036:A *212:99 9.4087e-05
+9 *52037:B1 *52037:A1 2.30292e-05
+10 *52037:B1 *52037:A2 0.000201508
+11 *52037:B1 *52071:B 0.000188727
+12 *52037:B1 *268:60 0
+13 *52072:A1 *52036:B 4.21314e-05
+14 *52072:A1 *52038:B 0
+15 *52072:A1 *52072:B1_N 9.37731e-05
+16 *52072:A1 *129:5 1.47256e-05
+17 *52072:A1 *267:85 0.000118081
+18 *90:5 *212:99 0.000157343
+19 *90:14 *52036:B 0.000136884
+20 *90:14 *52036:C 0
+21 *90:14 *52038:B 0
+22 *90:14 *212:99 0
+23 *52032:A *90:5 0.0001249
+24 *52032:A *90:14 0
+*RES
+1 *52032:Y *90:5 5.155 
+2 *90:5 *52036:A 3.775 
+3 *90:5 *90:14 4.4 
+4 *90:14 *52037:B1 6.825 
+5 *90:14 *52072:A1 7.41 
+*END
+
+*D_NET *91 0.00224711
+*CONN
+*I *52035:C1 I *D sky130_fd_sc_hd__a211o_1
+*I *52034:A2 I *D sky130_fd_sc_hd__o211ai_1
+*I *52033:X O *D sky130_fd_sc_hd__and3b_1
+*CAP
+1 *52035:C1 4.61501e-05
+2 *52034:A2 0.000126717
+3 *52033:X 0.000429835
+4 *91:8 0.000602702
+5 *52034:A2 *52034:A1 0.000300242
+6 *52034:A2 *232:98 0.000313857
+7 *52034:A2 *249:28 4.82919e-05
+8 *52034:A2 *267:90 2.29156e-05
+9 *52035:C1 *52035:A2 0
+10 *91:8 *51959:A 0
+11 *91:8 *51959:B 0
+12 *91:8 *52035:A2 0
+13 *91:8 *52036:C 0
+14 *91:8 *232:95 0
+15 *91:8 *266:74 0.000356395
+*RES
+1 *52033:X *91:8 9.975 
+2 *91:8 *52034:A2 7.845 
+3 *91:8 *52035:C1 4.215 
+*END
+
+*D_NET *92 0.00175234
+*CONN
+*I *52037:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52072:B1_N I *D sky130_fd_sc_hd__a21boi_1
+*I *52036:B I *D sky130_fd_sc_hd__and3_1
+*I *52034:Y O *D sky130_fd_sc_hd__o211ai_1
+*CAP
+1 *52037:A1 0.000109239
+2 *52072:B1_N 6.79863e-05
+3 *52036:B 0.000152218
+4 *52034:Y 0
+5 *92:7 0.000249204
+6 *92:4 0.000138238
+7 *52036:B *52036:C 0
+8 *52036:B *52038:A 0.000156901
+9 *52036:B *212:99 0.0001249
+10 *52037:A1 *52037:A2 0.000190633
+11 *52072:B1_N *52038:A 0.000127366
+12 *52072:B1_N *129:5 4.66108e-05
+13 *52072:B1_N *267:85 4.66108e-05
+14 *92:7 *52037:A2 4.66108e-05
+15 *52037:B1 *52037:A1 2.30292e-05
+16 *52072:A1 *52036:B 4.21314e-05
+17 *52072:A1 *52072:B1_N 9.37731e-05
+18 *90:14 *52036:B 0.000136884
+*RES
+1 *52034:Y *92:4 1.6 
+2 *92:4 *92:7 2.45 
+3 *92:7 *52036:B 7.245 
+4 *92:7 *52072:B1_N 5.685 
+5 *92:4 *52037:A1 3.775 
+*END
+
+*D_NET *93 0.00232122
+*CONN
+*I *52037:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52072:A2 I *D sky130_fd_sc_hd__a21boi_1
+*I *52036:C I *D sky130_fd_sc_hd__and3_1
+*I *52035:X O *D sky130_fd_sc_hd__a211o_1
+*CAP
+1 *52037:A2 0.000216317
+2 *52072:A2 8.83727e-05
+3 *52036:C 0.000309549
+4 *52035:X 8.10885e-05
+5 *93:7 0.000397921
+6 *93:5 0.000297406
+7 *52036:C *52035:A2 0
+8 *52036:C *52038:A 0
+9 *52036:C *212:99 3.26084e-05
+10 *52036:C *232:95 0
+11 *52036:C *267:85 0
+12 *52037:A2 *52034:B1 4.66108e-05
+13 *52037:A2 *52034:C1 1.91597e-05
+14 *52037:A2 *52071:B 8.34281e-06
+15 *52037:A2 *267:90 0.000167389
+16 *52072:A2 *52038:A 0
+17 *52072:A2 *52042:B 0
+18 *52072:A2 *267:85 0
+19 *93:5 *267:90 0.000124895
+20 *52036:A *52036:C 9.28053e-05
+21 *52036:B *52036:C 0
+22 *52037:A1 *52037:A2 0.000190633
+23 *52037:B1 *52037:A2 0.000201508
+24 *90:14 *52036:C 0
+25 *91:8 *52036:C 0
+26 *92:7 *52037:A2 4.66108e-05
+*RES
+1 *52035:X *93:5 2.74 
+2 *93:5 *93:7 2 
+3 *93:7 *52036:C 8.22 
+4 *93:7 *52072:A2 4.98 
+5 *93:5 *52037:A2 6.565 
+*END
+
+*D_NET *94 0.0014809
+*CONN
+*I *52038:A I *D sky130_fd_sc_hd__or2_2
+*I *52036:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52038:A 0.000387493
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+3 *52038:A *52038:B 0
+4 *52038:A *52048:B1 0
+5 *52038:A *96:8 7.36562e-05
+6 *52038:A *100:8 0
+7 *52038:A *105:7 0.000122337
+8 *52038:A *267:85 0.000155928
+9 *52038:A *268:66 6.97202e-05
+10 *52036:B *52038:A 0.000156901
+11 *52036:C *52038:A 0
+12 *52072:A2 *52038:A 0
+13 *52072:B1_N *52038:A 0.000127366
+*RES
+1 *52036:X *52038:A 15.585 
+*END
+
+*D_NET *95 0.00123184
+*CONN
+*I *52038:B I *D sky130_fd_sc_hd__or2_2
+*I *52037:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52038:B 0.000455351
+2 *52037:Y 0.000455351
+3 *52038:B *96:8 0
+4 *52038:B *105:7 0.000201503
+5 *52038:B *267:78 0
+6 *52038:B *268:66 0.000119631
+7 *52038:A *52038:B 0
+8 *52072:A1 *52038:B 0
+9 *90:14 *52038:B 0
+*RES
+1 *52037:Y *52038:B 15.255 
+*END
+
+*D_NET *96 0.00135677
+*CONN
+*I *52047:A I *D sky130_fd_sc_hd__or2_1
+*I *52043:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52038:X O *D sky130_fd_sc_hd__or2_2
+*CAP
+1 *52047:A 0.00026854
+2 *52043:A 0
+3 *52038:X 0.000165683
+4 *96:8 0.000434223
+5 *52047:A *52043:B 0.000278117
+6 *52047:A *52047:B 4.82863e-05
+7 *52047:A *52048:B1 8.8266e-05
+8 *96:8 *52048:B1 0
+9 *52038:A *96:8 7.36562e-05
+10 *52038:B *96:8 0
+*RES
+1 *52038:X *96:8 8.255 
+2 *96:8 *52043:A 1.6 
+3 *96:8 *52047:A 6.55 
+*END
+
+*D_NET *97 0.000844521
+*CONN
+*I *52040:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *52039:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52040:B1 0.000229579
+2 *52039:Y 0.000229579
+3 *52040:B1 *52040:A1 1.43521e-05
+4 *52040:B1 *103:5 0.00023178
+5 *52039:A *52040:B1 0.000139231
+*RES
+1 *52039:Y *52040:B1 11.01 
+*END
+
+*D_NET *98 0.0031291
+*CONN
+*I *52048:A1 I *D sky130_fd_sc_hd__o21ai_4
+*I *52042:A I *D sky130_fd_sc_hd__xnor2_2
+*I *52040:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *52048:A1 8.09567e-05
+2 *52042:A 0.000357353
+3 *52040:X 0.000488588
+4 *98:7 0.000926898
+5 *52042:A *52040:A1 0
+6 *52042:A *52042:B 0
+7 *52042:A *252:8 0
+8 *52048:A1 *354:DIODE 0
+9 *52048:A1 *99:7 0.000316421
+10 *52048:A1 *268:66 0.000268129
+11 *52048:A1 *268:70 4.82919e-05
+12 *52048:A1 *272:145 0
+13 *98:7 *99:7 0.000163199
+14 *98:7 *268:70 5.5626e-05
+15 *98:7 *268:78 0.000423637
+*RES
+1 *52040:X *98:7 10.26 
+2 *98:7 *52042:A 9.105 
+3 *98:7 *52048:A1 7.08 
+*END
+
+*D_NET *99 0.00176561
+*CONN
+*I *52048:A2 I *D sky130_fd_sc_hd__o21ai_4
+*I *52042:B I *D sky130_fd_sc_hd__xnor2_2
+*I *52041:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52048:A2 3.2692e-05
+2 *52042:B 0.000279392
+3 *52041:X 0.000223377
+4 *99:7 0.000535461
+5 *52042:B *52048:B1 0
+6 *52042:B *100:8 0
+7 *52048:A2 *268:66 8.65961e-05
+8 *99:7 *268:66 3.77036e-05
+9 *99:7 *268:70 9.07709e-05
+10 *52042:A *52042:B 0
+11 *52048:A1 *99:7 0.000316421
+12 *52072:A2 *52042:B 0
+13 *98:7 *99:7 0.000163199
+*RES
+1 *52041:X *99:7 6.895 
+2 *99:7 *52042:B 9.785 
+3 *99:7 *52048:A2 2.395 
+*END
+
+*D_NET *100 0.000910509
+*CONN
+*I *52043:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52047:B I *D sky130_fd_sc_hd__or2_1
+*I *52042:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52043:B 9.61711e-05
+2 *52047:B 6.69862e-05
+3 *52042:Y 0.000128896
+4 *100:8 0.000292053
+5 *52038:A *100:8 0
+6 *52042:B *100:8 0
+7 *52047:A *52043:B 0.000278117
+8 *52047:A *52047:B 4.82863e-05
+*RES
+1 *52042:Y *100:8 7.745 
+2 *100:8 *52047:B 2.74 
+3 *100:8 *52043:B 4.12 
+*END
+
+*D_NET *101 0.00167284
+*CONN
+*I *52076:A I *D sky130_fd_sc_hd__nand3_1
+*I *52075:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52046:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52043:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52076:A 0.000198816
+2 *52075:A1 0.000289613
+3 *52046:A 0
+4 *52043:Y 0.000108492
+5 *101:8 0.000394983
+6 *101:5 0.000412679
+7 *52075:A1 *52046:B 0
+8 *52075:A1 *52075:B1 0
+9 *52075:A1 *52076:B 2.30292e-05
+10 *52075:A1 *103:17 0.000239813
+11 *52076:A *133:7 5.4155e-06
+12 *101:8 *52046:B 0
+13 *101:8 *52076:B 0
+14 *101:8 *268:66 0
+*RES
+1 *52043:Y *101:5 3.085 
+2 *101:5 *101:8 3.635 
+3 *101:8 *52046:A 3.6 
+4 *101:8 *52075:A1 8.775 
+5 *101:5 *52076:A 4.48 
+*END
+
+*D_NET *102 0.000930142
+*CONN
+*I *52045:B1 I *D sky130_fd_sc_hd__a21oi_4
+*I *52044:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52045:B1 0.000382895
+2 *52044:Y 0.000382895
+3 *52045:B1 *273:12 0
+4 *52044:A *52045:B1 0.000164352
+5 *52045:A2 *52045:B1 0
+6 *67:8 *52045:B1 0
+*RES
+1 *52044:Y *52045:B1 13.65 
+*END
+
+*D_NET *103 0.00631758
+*CONN
+*I *52075:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52076:B I *D sky130_fd_sc_hd__nand3_1
+*I *52046:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52045:Y O *D sky130_fd_sc_hd__a21oi_4
+*CAP
+1 *52075:A2 0
+2 *52076:B 0.000236053
+3 *52046:B 0.000116302
+4 *52045:Y 0.00198925
+5 *103:17 0.000447997
+6 *103:5 0.00231749
+7 *52046:B *268:66 1.70935e-05
+8 *52076:B *52075:B1 0.000172964
+9 *52076:B *131:8 5.53249e-06
+10 *103:5 *354:DIODE 0.000124895
+11 *52039:A *103:5 0.000233557
+12 *52040:B1 *103:5 0.00023178
+13 *52045:A1 *103:5 0.000161829
+14 *52075:A1 *52046:B 0
+15 *52075:A1 *52076:B 2.30292e-05
+16 *52075:A1 *103:17 0.000239813
+17 *101:8 *52046:B 0
+18 *101:8 *52076:B 0
+*RES
+1 *52045:Y *103:5 31.72 
+2 *103:5 *52046:B 7.49 
+3 *103:5 *103:17 4.17 
+4 *103:17 *52076:B 10.43 
+5 *103:17 *52075:A2 1.6 
+*END
+
+*D_NET *104 0.000380627
+*CONN
+*I *52048:B1 I *D sky130_fd_sc_hd__o21ai_4
+*I *52047:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52048:B1 0.00014618
+2 *52047:X 0.00014618
+3 *52038:A *52048:B1 0
+4 *52042:B *52048:B1 0
+5 *52047:A *52048:B1 8.8266e-05
+6 *96:8 *52048:B1 0
+*RES
+1 *52047:X *52048:B1 9.375 
+*END
+
+*D_NET *105 0.00378254
+*CONN
+*I *52078:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52081:A1 I *D sky130_fd_sc_hd__a21o_2
+*I *52048:Y O *D sky130_fd_sc_hd__o21ai_4
+*CAP
+1 *52078:A 0.000362907
+2 *52081:A1 0
+3 *52048:Y 0.00125745
+4 *105:7 0.00162035
+5 *52078:A *52077:A 0
+6 *52078:A *52078:B 0
+7 *52078:A *132:8 0
+8 *52078:A *137:5 5.05437e-05
+9 *105:7 *268:66 0.000167451
+10 *52038:A *105:7 0.000122337
+11 *52038:B *105:7 0.000201503
+*RES
+1 *52048:Y *105:7 16.555 
+2 *105:7 *52081:A1 1.6 
+3 *105:7 *52078:A 10.685 
+*END
+
+*D_NET *106 0.00163652
+*CONN
+*I *52054:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52084:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52049:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52054:A 0.000382919
+2 *52084:A1 0
+3 *52049:Y 0.000124374
+4 *106:5 0.000507293
+5 *52054:A *52049:B 0
+6 *52054:A *52054:B 0
+7 *52054:A *52084:A2 4.82863e-05
+8 *52054:A *207:89 0.000142669
+9 *52054:A *281:115 0.000239813
+10 *106:5 *52084:A2 4.99619e-05
+11 *106:5 *108:9 9.29176e-05
+12 *106:5 *283:39 4.82863e-05
+*RES
+1 *52049:Y *106:5 4.12 
+2 *106:5 *52084:A1 1.6 
+3 *106:5 *52054:A 12.665 
+*END
+
+*D_NET *107 0.00091275
+*CONN
+*I *52051:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52050:X O *D sky130_fd_sc_hd__and2b_1
+*CAP
+1 *52051:B1 0.000232096
+2 *52050:X 0.000232096
+3 *52051:B1 *51902:A 0
+4 *52051:B1 *52049:A 0.000201503
+5 *52051:B1 *193:117 0
+6 *52051:B1 *283:39 0.000122155
+7 *52050:B *52051:B1 0.0001249
+*RES
+1 *52050:X *52051:B1 11.805 
+*END
+
+*D_NET *108 0.00244559
+*CONN
+*I *52053:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52083:C I *D sky130_fd_sc_hd__and3_1
+*I *52051:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52053:A 0.000130754
+2 *52083:C 5.47031e-05
+3 *52051:X 0.000163425
+4 *108:9 0.000348882
+5 *52053:A *52084:A2 3.47581e-05
+6 *52053:A *140:5 8.65905e-05
+7 *52053:A *187:57 0.000121296
+8 *52053:A *207:98 3.71091e-05
+9 *52053:A *207:102 0
+10 *52053:A *283:61 8.53113e-06
+11 *52083:C *52084:B1 0
+12 *52083:C *207:113 0
+13 *108:9 *52049:A 0.000200615
+14 *108:9 *52084:A2 0.000321154
+15 *108:9 *140:5 0.000277223
+16 *108:9 *187:49 0.000558359
+17 *108:9 *283:39 9.27255e-06
+18 *106:5 *108:9 9.29176e-05
+*RES
+1 *52051:X *108:9 9.76 
+2 *108:9 *52083:C 2.58625 
+3 *108:9 *52053:A 8.99 
+*END
+
+*D_NET *109 0.000590892
+*CONN
+*I *52053:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52052:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52053:B 5.60804e-05
+2 *52052:Y 5.60804e-05
+3 *52053:B *52052:A 0.000201508
+4 *52053:B *187:57 0.000277223
+*RES
+1 *52052:Y *52053:B 5.72 
+*END
+
+*D_NET *110 0.00132294
+*CONN
+*I *52054:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52084:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52053:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52054:B 9.15648e-05
+2 *52084:A2 0.000228915
+3 *52053:Y 0
+4 *110:5 0.00032048
+5 *52054:B *207:92 0
+6 *52054:B *281:115 3.05373e-05
+7 *52084:A2 *52084:B1 0.000145184
+8 *52084:A2 *187:57 5.20968e-05
+9 *52084:A2 *207:92 0
+10 *52053:A *52084:A2 3.47581e-05
+11 *52054:A *52054:B 0
+12 *52054:A *52084:A2 4.82863e-05
+13 *106:5 *52084:A2 4.99619e-05
+14 *108:9 *52084:A2 0.000321154
+*RES
+1 *52053:Y *110:5 3.6 
+2 *110:5 *52084:A2 9.72 
+3 *110:5 *52054:B 5.235 
+*END
+
+*D_NET *111 0.00148466
+*CONN
+*I *52058:A I *D sky130_fd_sc_hd__nor2_1
+*I *52059:A I *D sky130_fd_sc_hd__and2_1
+*I *52054:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52058:A 0.00019212
+2 *52059:A 1.17375e-05
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+4 *111:6 0.000518391
+5 *52058:A *52058:B 0
+6 *52058:A *114:6 0
+7 *52058:A *266:64 5.0751e-05
+8 *52059:A *113:5 2.75229e-05
+9 *52059:A *264:9 4.82919e-05
+10 *111:6 *347:DIODE 0.000181376
+11 *111:6 *365:DIODE 4.61658e-05
+12 *111:6 *52057:B 0
+13 *111:6 *114:6 0
+14 *111:6 *225:108 0
+15 *111:6 *225:114 0
+16 *111:6 *281:115 9.37731e-05
+17 *52025:A *52058:A 0
+18 *78:8 *52058:A 0
+19 *78:8 *111:6 0
+*RES
+1 *52054:Y *111:6 9.315 
+2 *111:6 *52059:A 4.05 
+3 *111:6 *52058:A 6.885 
+*END
+
+*D_NET *112 0.000754612
+*CONN
+*I *52090:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52057:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52055:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52090:A1 0.000178192
+2 *52057:A 3.37585e-05
+3 *52055:Y 8.83727e-05
+4 *112:6 0.000300324
+5 *52090:A1 *52057:B 6.44307e-05
+6 *52090:A1 *52090:A2 5.94962e-05
+7 *52090:A1 *203:76 0
+8 *52090:A1 *264:9 3.00381e-05
+9 *112:6 *203:69 0
+10 *112:6 *203:76 0
+*RES
+1 *52055:Y *112:6 4.98 
+2 *112:6 *52057:A 4.05 
+3 *112:6 *52090:A1 7.005 
+*END
+
+*D_NET *113 0.00185595
+*CONN
+*I *52090:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52057:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52056:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52090:A2 6.70872e-05
+2 *52057:B 0.000129011
+3 *52056:X 0.000310245
+4 *113:5 0.000506343
+5 *52057:B *52058:B 1.52184e-05
+6 *52057:B *52090:B1_N 0
+7 *52057:B *114:6 8.97564e-05
+8 *52057:B *203:76 0
+9 *52090:A2 *52060:B 4.82919e-05
+10 *52090:A2 *264:9 2.32597e-05
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+12 *113:5 *52060:B 0.000160635
+13 *113:5 *264:9 0.000191454
+14 *52059:A *113:5 2.75229e-05
+15 *52090:A1 *52057:B 6.44307e-05
+16 *52090:A1 *52090:A2 5.94962e-05
+17 *111:6 *52057:B 0
+*RES
+1 *52056:X *113:5 7.915 
+2 *113:5 *52057:B 8.45 
+3 *113:5 *52090:A2 3.1 
+*END
+
+*D_NET *114 0.00100381
+*CONN
+*I *52058:B I *D sky130_fd_sc_hd__nor2_1
+*I *52059:B I *D sky130_fd_sc_hd__and2_1
+*I *52057:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52058:B 0.000136813
+2 *52059:B 2.78608e-05
+3 *52057:Y 9.3116e-05
+4 *114:6 0.00025779
+5 *52058:B *52060:B 3.68682e-05
+6 *52058:B *52090:B1_N 0
+7 *52058:B *115:9 8.65905e-05
+8 *52059:B *264:9 9.66021e-05
+9 *52057:B *52058:B 1.52184e-05
+10 *52057:B *114:6 8.97564e-05
+11 *52058:A *52058:B 0
+12 *52058:A *114:6 0
+13 *111:6 *114:6 0
+14 *113:5 *52059:B 0.000163199
+*RES
+1 *52057:Y *114:6 5.49 
+2 *114:6 *52059:B 5.085 
+3 *114:6 *52058:B 6.285 
+*END
+
+*D_NET *115 0.000946318
+*CONN
+*I *52090:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52060:A I *D sky130_fd_sc_hd__or2_1
+*I *52058:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52090:B1_N 0.000152386
+2 *52060:A 0
+3 *52058:Y 0.000124082
+4 *115:9 0.000276467
+5 *52090:B1_N *52060:B 0
+6 *52090:B1_N *203:76 4.91189e-05
+7 *52090:B1_N *203:85 1.82476e-05
+8 *52090:B1_N *266:64 6.6564e-05
+9 *115:9 *266:64 0.000172862
+10 *52057:B *52090:B1_N 0
+11 *52058:B *52090:B1_N 0
+12 *52058:B *115:9 8.65905e-05
+*RES
+1 *52058:Y *115:9 4.84 
+2 *115:9 *52060:A 1.6 
+3 *115:9 *52090:B1_N 8.63 
+*END
+
+*D_NET *116 0.000633791
+*CONN
+*I *52060:B I *D sky130_fd_sc_hd__or2_1
+*I *52059:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52060:B 0.000193998
+2 *52059:X 0.000193998
+3 *52058:B *52060:B 3.68682e-05
+4 *52090:A2 *52060:B 4.82919e-05
+5 *52090:B1_N *52060:B 0
+6 *113:5 *52060:B 0.000160635
+*RES
+1 *52059:X *52060:B 10.155 
+*END
+
+*D_NET *117 0.00236051
+*CONN
+*I *52064:A I *D sky130_fd_sc_hd__nor2_1
+*I *52065:A I *D sky130_fd_sc_hd__and2_1
+*I *52060:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52064:A 0.000258699
+2 *52065:A 0.00015532
+3 *52060:X 0.000193402
+4 *117:6 0.000607421
+5 *52064:A *52064:B 0.000291551
+6 *52064:A *52066:B 5.20968e-05
+7 *52064:A *121:7 8.65961e-05
+8 *52064:A *203:120 0
+9 *52064:A *203:125 3.23663e-05
+10 *52065:A *52021:B 3.23663e-05
+11 *52065:A *52065:B 0.000198939
+12 *52065:A *52066:B 0.000141323
+13 *52065:A *52095:A2 4.82919e-05
+14 *52065:A *203:94 4.99782e-05
+15 *117:6 *52095:A2 9.60047e-05
+16 *117:6 *203:85 0
+17 *117:6 *203:94 0.000116158
+18 *117:6 *203:120 0
+*RES
+1 *52060:X *117:6 7.275 
+2 *117:6 *52065:A 7.845 
+3 *117:6 *52064:A 9.06 
+*END
+
+*D_NET *118 0.00110434
+*CONN
+*I *52063:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52095:A1 I *D sky130_fd_sc_hd__o21bai_2
+*I *52061:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52063:A 0
+2 *52095:A1 8.92877e-05
+3 *52061:Y 0.000153669
+4 *118:7 0.000242957
+5 *52095:A1 *52064:B 4.43871e-06
+6 *52095:A1 *52095:A2 0.000159964
+7 *52095:A1 *119:9 4.82863e-05
+8 *52095:A1 *120:6 6.28765e-05
+9 *52095:A1 *265:13 8.40269e-05
+10 *118:7 *52061:A 7.57202e-05
+11 *118:7 *203:94 0.000124895
+12 *118:7 *265:13 5.82176e-05
+*RES
+1 *52061:Y *118:7 4.825 
+2 *118:7 *52095:A1 8.285 
+3 *118:7 *52063:A 1.6 
+*END
+
+*D_NET *119 0.00186914
+*CONN
+*I *52063:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52095:A2 I *D sky130_fd_sc_hd__o21bai_2
+*I *52062:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52063:B 0
+2 *52095:A2 8.26243e-05
+3 *52062:X 0.000382702
+4 *119:9 0.000465327
+5 *52095:A2 *203:94 2.75229e-05
+6 *119:9 *225:100 4.82863e-05
+7 *119:9 *265:13 0.000228124
+8 *52025:A *119:9 0.000239813
+9 *52025:B *119:9 4.21973e-05
+10 *52065:A *52095:A2 4.82919e-05
+11 *52095:A1 *52095:A2 0.000159964
+12 *52095:A1 *119:9 4.82863e-05
+13 *117:6 *52095:A2 9.60047e-05
+*RES
+1 *52062:X *119:9 9.415 
+2 *119:9 *52095:A2 8.195 
+3 *119:9 *52063:B 1.6 
+*END
+
+*D_NET *120 0.0018388
+*CONN
+*I *52064:B I *D sky130_fd_sc_hd__nor2_1
+*I *52065:B I *D sky130_fd_sc_hd__and2_1
+*I *52063:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52064:B 0.000268244
+2 *52065:B 4.27554e-05
+3 *52063:Y 7.00122e-05
+4 *120:6 0.000381011
+5 *52064:B *349:DIODE 0
+6 *52064:B *52066:A 0.000198934
+7 *52064:B *52066:B 4.49498e-05
+8 *52064:B *203:125 4.47209e-05
+9 *52064:B *267:62 0.00010877
+10 *52065:B *52021:B 2.75145e-05
+11 *52065:B *203:94 9.4087e-05
+12 *120:6 *349:DIODE 0
+13 *52064:A *52064:B 0.000291551
+14 *52065:A *52065:B 0.000198939
+15 *52095:A1 *52064:B 4.43871e-06
+16 *52095:A1 *120:6 6.28765e-05
+*RES
+1 *52063:Y *120:6 4.98 
+2 *120:6 *52065:B 5.43 
+3 *120:6 *52064:B 10.35 
+*END
+
+*D_NET *121 0.00108253
+*CONN
+*I *52066:A I *D sky130_fd_sc_hd__or2_1
+*I *52095:B1_N I *D sky130_fd_sc_hd__o21bai_2
+*I *52064:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52066:A 7.75124e-05
+2 *52095:B1_N 6.65285e-05
+3 *52064:Y 5.74715e-05
+4 *121:7 0.000201512
+5 *52066:A *203:120 6.28498e-05
+6 *52066:A *203:125 4.66108e-05
+7 *52066:A *267:62 0.000141245
+8 *52095:B1_N *203:120 0.000143266
+9 *52064:A *121:7 8.65961e-05
+10 *52064:B *52066:A 0.000198934
+*RES
+1 *52064:Y *121:7 4.395 
+2 *121:7 *52095:B1_N 5.235 
+3 *121:7 *52066:A 6.3 
+*END
+
+*D_NET *122 0.000698878
+*CONN
+*I *52066:B I *D sky130_fd_sc_hd__or2_1
+*I *52065:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52066:B 0.000230254
+2 *52065:X 0.000230254
+3 *52066:B *203:120 0
+4 *52064:A *52066:B 5.20968e-05
+5 *52064:B *52066:B 4.49498e-05
+6 *52065:A *52066:B 0.000141323
+*RES
+1 *52065:X *52066:B 11.01 
+*END
+
+*D_NET *123 0.0010705
+*CONN
+*I *52070:A I *D sky130_fd_sc_hd__xor2_1
+*I *52100:A I *D sky130_fd_sc_hd__nor2_1
+*I *52066:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52070:A 0.000249899
+2 *52100:A 0
+3 *52066:X 0.000177584
+4 *123:8 0.000427483
+5 *52070:A *52070:B 0
+6 *52070:A *52100:B 0
+7 *52070:A *52102:A1 6.10941e-05
+8 *52070:A *52102:B1 0
+9 *52070:A *52103:A 2.78732e-05
+10 *52070:A *127:9 0
+11 *52070:A *157:12 0
+12 *123:8 *157:12 0
+13 *123:8 *267:62 0.00012657
+14 *123:8 *268:48 0
+*RES
+1 *52066:X *123:8 6.12 
+2 *123:8 *52100:A 3.6 
+3 *123:8 *52070:A 7.83 
+*END
+
+*D_NET *124 0.00294709
+*CONN
+*I *52099:A I *D sky130_fd_sc_hd__nor2_1
+*I *52069:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52067:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52099:A 4.07698e-05
+2 *52069:A 0
+3 *52067:X 0.000650932
+4 *124:11 0.000691702
+5 *52099:A *52099:B 0.000306433
+6 *52099:A *125:9 4.99619e-05
+7 *52099:A *157:12 0.000344737
+8 *124:11 *52068:B 0.000112631
+9 *124:11 *125:9 0.000109293
+10 *124:11 *157:12 0.000122337
+11 *124:11 *267:72 0.000164457
+12 *52029:A *124:11 0.000353831
+*RES
+1 *52067:X *124:11 15.47 
+2 *124:11 *52069:A 1.6 
+3 *124:11 *52099:A 4.81 
+*END
+
+*D_NET *125 0.00123794
+*CONN
+*I *52099:B I *D sky130_fd_sc_hd__nor2_1
+*I *52069:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52068:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52099:B 9.68964e-05
+2 *52069:B 0
+3 *52068:Y 0.000121221
+4 *125:9 0.000218118
+5 *52099:B *126:7 0.000279787
+6 *52099:B *157:12 4.60584e-05
+7 *125:9 *267:72 1.01661e-05
+8 *52099:A *52099:B 0.000306433
+9 *52099:A *125:9 4.99619e-05
+10 *124:11 *125:9 0.000109293
+*RES
+1 *52068:Y *125:9 8.03 
+2 *125:9 *52069:B 1.6 
+3 *125:9 *52099:B 5.515 
+*END
+
+*D_NET *126 0.00137217
+*CONN
+*I *52070:B I *D sky130_fd_sc_hd__xor2_1
+*I *52100:B I *D sky130_fd_sc_hd__nor2_1
+*I *52069:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52070:B 0.000104779
+2 *52100:B 5.41172e-05
+3 *52069:Y 0.000164307
+4 *126:7 0.000323203
+5 *52070:B *127:9 0
+6 *52100:B *155:7 2.59926e-05
+7 *52100:B *156:5 7.00889e-06
+8 *52100:B *268:48 8.8266e-05
+9 *126:7 *155:7 0.000237243
+10 *126:7 *157:12 9.27255e-06
+11 *126:7 *268:48 7.8192e-05
+12 *52070:A *52070:B 0
+13 *52070:A *52100:B 0
+14 *52099:B *126:7 0.000279787
+*RES
+1 *52069:Y *126:7 8.19 
+2 *126:7 *52100:B 5.01 
+3 *126:7 *52070:B 5.235 
+*END
+
+*D_NET *127 0.00103559
+*CONN
+*I *52080:A1 I *D sky130_fd_sc_hd__a21o_2
+*I *52074:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52070:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52080:A1 0
+2 *52074:A 0.000175665
+3 *52070:X 0.000233439
+4 *127:9 0.000409104
+5 *52074:A *52080:A2 0.000168213
+6 *127:9 *52080:B1 3.47837e-05
+7 *127:9 *136:8 1.4389e-05
+8 *52070:A *127:9 0
+9 *52070:B *127:9 0
+*RES
+1 *52070:X *127:9 9.32 
+2 *127:9 *52074:A 4.825 
+3 *127:9 *52080:A1 1.6 
+*END
+
+*D_NET *128 0.000774867
+*CONN
+*I *52073:A I *D sky130_fd_sc_hd__xor2_1
+*I *52079:A I *D sky130_fd_sc_hd__nor2_1
+*I *52071:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52073:A 9.48034e-05
+2 *52079:A 0.000102831
+3 *52071:X 0
+4 *128:4 0.000197634
+5 *52073:A *52079:B 0
+6 *52073:A *129:5 4.82919e-05
+7 *52073:A *267:78 9.54399e-05
+8 *52073:A *268:66 0
+9 *52079:A *268:60 0.000235867
+*RES
+1 *52071:X *128:4 1.6 
+2 *128:4 *52079:A 4.045 
+3 *128:4 *52073:A 7.43 
+*END
+
+*D_NET *129 0.00188149
+*CONN
+*I *52073:B I *D sky130_fd_sc_hd__xor2_1
+*I *52079:B I *D sky130_fd_sc_hd__nor2_1
+*I *52072:Y O *D sky130_fd_sc_hd__a21boi_1
+*CAP
+1 *52073:B 0
+2 *52079:B 0.000244249
+3 *52072:Y 0.000395345
+4 *129:5 0.000639594
+5 *52079:B *130:5 8.65905e-05
+6 *52079:B *267:78 0
+7 *129:5 *267:78 0.000161829
+8 *129:5 *267:85 0.000244253
+9 *52072:A1 *129:5 1.47256e-05
+10 *52072:B1_N *129:5 4.66108e-05
+11 *52073:A *52079:B 0
+12 *52073:A *129:5 4.82919e-05
+*RES
+1 *52072:Y *129:5 9.64 
+2 *129:5 *52079:B 9.68 
+3 *129:5 *52073:B 1.6 
+*END
+
+*D_NET *130 0.000908348
+*CONN
+*I *52080:A2 I *D sky130_fd_sc_hd__a21o_2
+*I *52074:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52073:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52080:A2 0.000150262
+2 *52074:B 0
+3 *52073:X 0.000161491
+4 *130:5 0.000311753
+5 *130:5 *131:8 3.00381e-05
+6 *52074:A *52080:A2 0.000168213
+7 *52079:B *130:5 8.65905e-05
+*RES
+1 *52073:X *130:5 4.465 
+2 *130:5 *52074:B 1.6 
+3 *130:5 *52080:A2 4.825 
+*END
+
+*D_NET *131 0.000945294
+*CONN
+*I *52075:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52076:C I *D sky130_fd_sc_hd__nand3_1
+*I *52074:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52075:B1 0.000207013
+2 *52076:C 0
+3 *52074:Y 0.00015218
+4 *131:8 0.000359192
+5 *52075:B1 *52077:A 0
+6 *52075:B1 *52081:A2 0
+7 *52075:B1 *132:8 1.83756e-05
+8 *131:8 *52077:A 0
+9 *131:8 *52081:A2 0
+10 *52075:A1 *52075:B1 0
+11 *52076:B *52075:B1 0.000172964
+12 *52076:B *131:8 5.53249e-06
+13 *130:5 *131:8 3.00381e-05
+*RES
+1 *52074:Y *131:8 5.94 
+2 *131:8 *52076:C 3.6 
+3 *131:8 *52075:B1 7.98 
+*END
+
+*D_NET *132 0.00119855
+*CONN
+*I *52081:B1 I *D sky130_fd_sc_hd__a21o_2
+*I *52077:A I *D sky130_fd_sc_hd__or2b_1
+*I *52075:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52081:B1 0
+2 *52077:A 0.000138736
+3 *52075:Y 0.000424222
+4 *132:8 0.000562958
+5 *52077:A *52081:A2 5.4256e-05
+6 *52075:B1 *52077:A 0
+7 *52075:B1 *132:8 1.83756e-05
+8 *52078:A *52077:A 0
+9 *52078:A *132:8 0
+10 *131:8 *52077:A 0
+*RES
+1 *52075:Y *132:8 8.79 
+2 *132:8 *52077:A 6.255 
+3 *132:8 *52081:B1 3.6 
+*END
+
+*D_NET *133 0.000752301
+*CONN
+*I *52077:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *52081:A2 I *D sky130_fd_sc_hd__a21o_2
+*I *52076:Y O *D sky130_fd_sc_hd__nand3_1
+*CAP
+1 *52077:B_N 5.12763e-05
+2 *52081:A2 8.63801e-05
+3 *52076:Y 0.000208658
+4 *133:7 0.000346315
+5 *52075:B1 *52081:A2 0
+6 *52076:A *133:7 5.4155e-06
+7 *52077:A *52081:A2 5.4256e-05
+8 *131:8 *52081:A2 0
+*RES
+1 *52076:Y *133:7 4.735 
+2 *133:7 *52081:A2 7.235 
+3 *133:7 *52077:B_N 2.395 
+*END
+
+*D_NET *134 0.00088281
+*CONN
+*I *52078:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52077:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *52078:B 0.000441405
+2 *52077:X 0.000441405
+3 *52078:B *274:6 0
+4 *52078:A *52078:B 0
+*RES
+1 *52077:X *52078:B 14.16 
+*END
+
+*D_NET *135 0.00142283
+*CONN
+*I *52080:B1 I *D sky130_fd_sc_hd__a21o_2
+*I *52079:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52080:B1 0.000565956
+2 *52079:Y 0.000565956
+3 *52080:B1 *268:48 2.0248e-05
+4 *52080:B1 *268:50 0.000118207
+5 *52080:B1 *268:52 8.31173e-05
+6 *52080:B1 *268:60 3.45588e-05
+7 *127:9 *52080:B1 3.47837e-05
+*RES
+1 *52079:Y *52080:B1 14.895 
+*END
+
+*D_NET *136 0.00456944
+*CONN
+*I *52107:A I *D sky130_fd_sc_hd__xor2_4
+*I *52109:A1 I *D sky130_fd_sc_hd__a21boi_2
+*I *52080:X O *D sky130_fd_sc_hd__a21o_2
+*CAP
+1 *52107:A 0.000130717
+2 *52109:A1 0
+3 *52080:X 0.00185401
+4 *136:8 0.00198473
+5 *52107:A *52107:B 0.000225394
+6 *52107:A *52109:A2 0.000141599
+7 *52107:A *52128:A 0.000141938
+8 *136:8 *52105:B 1.83847e-05
+9 *136:8 *52109:A2 3.25831e-05
+10 *136:8 *52128:B 0
+11 *136:8 *161:8 2.56999e-05
+12 *127:9 *136:8 1.4389e-05
+*RES
+1 *52080:X *136:8 24.66 
+2 *136:8 *52109:A1 3.6 
+3 *136:8 *52107:A 8.235 
+*END
+
+*D_NET *137 0.00209987
+*CONN
+*I *52106:A I *D sky130_fd_sc_hd__xor2_4
+*I *52108:A I *D sky130_fd_sc_hd__nand2_1
+*I *52081:X O *D sky130_fd_sc_hd__a21o_2
+*CAP
+1 *52106:A 0
+2 *52108:A 8.33204e-05
+3 *52081:X 0.00089514
+4 *137:5 0.00097846
+5 *52108:A *52106:B 8.68724e-05
+6 *52108:A *161:8 5.53249e-06
+7 *52078:A *137:5 5.05437e-05
+*RES
+1 *52081:X *137:5 15.16 
+2 *137:5 *52108:A 7.49 
+3 *137:5 *52106:A 1.6 
+*END
+
+*D_NET *138 0.000625611
+*CONN
+*I *52085:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52119:A1 I *D sky130_fd_sc_hd__o21ai_1
+*I *52082:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52085:A 0
+2 *52119:A1 0.000160374
+3 *52082:Y 7.0775e-05
+4 *138:6 0.000231149
+5 *52119:A1 *52085:B 0.000111209
+6 *52119:A1 *52086:B1 0
+7 *52119:A1 *283:61 0
+8 *138:6 *52086:B1 0
+9 *138:6 *187:68 5.21046e-05
+*RES
+1 *52082:Y *138:6 4.98 
+2 *138:6 *52119:A1 6.555 
+3 *138:6 *52085:A 3.6 
+*END
+
+*D_NET *139 0.000495985
+*CONN
+*I *52084:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52083:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52084:B1 0.0001754
+2 *52083:X 0.0001754
+3 *52083:C *52084:B1 0
+4 *52084:A2 *52084:B1 0.000145184
+*RES
+1 *52083:X *52084:B1 5.735 
+*END
+
+*D_NET *140 0.00242536
+*CONN
+*I *52085:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52119:A2 I *D sky130_fd_sc_hd__o21ai_1
+*I *52084:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52085:B 6.68345e-05
+2 *52119:A2 0
+3 *52084:Y 0.000343041
+4 *140:5 0.000409876
+5 *52085:B *52086:B1 2.03321e-05
+6 *52085:B *283:61 9.04087e-05
+7 *140:5 *355:DIODE 8.65961e-05
+8 *140:5 *187:49 0.000315527
+9 *140:5 *283:61 0.000617727
+10 *52053:A *140:5 8.65905e-05
+11 *52119:A1 *52085:B 0.000111209
+12 *108:9 *140:5 0.000277223
+*RES
+1 *52084:Y *140:5 10.675 
+2 *140:5 *52119:A2 1.6 
+3 *140:5 *52085:B 7.685 
+*END
+
+*D_NET *141 0.00137941
+*CONN
+*I *52087:C I *D sky130_fd_sc_hd__nand3_1
+*I *52086:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52085:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52087:C 0.000203471
+2 *52086:B1 0.000169931
+3 *52085:Y 0
+4 *141:4 0.000373402
+5 *52086:B1 *52086:A2 0
+6 *52086:B1 *52088:A 3.23663e-05
+7 *52086:B1 *52119:B1 0.000163204
+8 *52086:B1 *52121:A 0.000241483
+9 *52086:B1 *187:68 1.71013e-05
+10 *52086:B1 *283:61 0.000137571
+11 *52086:B1 *283:71 0
+12 *52086:B1 *283:86 0
+13 *52087:C *187:68 0
+14 *52087:C *283:61 2.05498e-05
+15 *52087:C *283:86 0
+16 *52085:B *52086:B1 2.03321e-05
+17 *52119:A1 *52086:B1 0
+18 *138:6 *52086:B1 0
+*RES
+1 *52085:Y *141:4 1.6 
+2 *141:4 *52086:B1 10.685 
+3 *141:4 *52087:C 8.21 
+*END
+
+*D_NET *142 0.00171182
+*CONN
+*I *52088:A I *D sky130_fd_sc_hd__nand2_1
+*I *52119:B1 I *D sky130_fd_sc_hd__o21ai_1
+*I *52086:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52088:A 0.000507669
+2 *52119:B1 0.000132303
+3 *52086:X 0
+4 *142:4 0.000639972
+5 *52088:A *364:DIODE 1.5186e-05
+6 *52088:A *52086:A2 1.83847e-05
+7 *52088:A *52117:B 0
+8 *52088:A *52118:B1 4.82919e-05
+9 *52088:A *52121:A 9.01345e-05
+10 *52088:A *52121:B 0
+11 *52088:A *281:162 0
+12 *52119:B1 *52121:A 1.60203e-05
+13 *52119:B1 *283:61 4.82863e-05
+14 *52086:B1 *52088:A 3.23663e-05
+15 *52086:B1 *52119:B1 0.000163204
+*RES
+1 *52086:X *142:4 1.6 
+2 *142:4 *52119:B1 4.39 
+3 *142:4 *52088:A 12.68 
+*END
+
+*D_NET *143 0.000467819
+*CONN
+*I *52088:B I *D sky130_fd_sc_hd__nand2_1
+*I *52087:Y O *D sky130_fd_sc_hd__nand3_1
+*CAP
+1 *52088:B 0.000173353
+2 *52087:Y 0.000173353
+3 *52088:B *52087:B 4.82863e-05
+4 *52088:B *52118:B1 7.28266e-05
+*RES
+1 *52087:Y *52088:B 5.645 
+*END
+
+*D_NET *144 0.00245179
+*CONN
+*I *52093:A I *D sky130_fd_sc_hd__and2_1
+*I *52092:A I *D sky130_fd_sc_hd__nor2_1
+*I *52088:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52093:A 0.000144603
+2 *52092:A 0.000445492
+3 *52088:Y 0.000381467
+4 *144:8 0.000971561
+5 *52092:A *52091:A 4.82863e-05
+6 *52092:A *52091:B 3.00381e-05
+7 *52092:A *52092:B 0.000128507
+8 *52093:A *203:76 0
+9 *52093:A *266:40 0
+10 *144:8 *52120:B 0
+11 *144:8 *52121:B 2.46089e-05
+12 *144:8 *203:69 0
+13 *144:8 *203:76 0
+14 *144:8 *225:128 0.000277223
+15 *144:8 *266:40 0
+*RES
+1 *52088:Y *144:8 9.285 
+2 *144:8 *52092:A 10.62 
+3 *144:8 *52093:A 6 
+*END
+
+*D_NET *145 0.00080198
+*CONN
+*I *52116:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52091:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52089:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52116:A1 0.000161418
+2 *52091:A 1.17533e-05
+3 *52089:Y 9.1325e-05
+4 *145:6 0.000264497
+5 *52091:A *52092:B 2.75145e-05
+6 *52116:A1 *52091:B 6.14776e-05
+7 *52116:A1 *52116:A2 5.94962e-05
+8 *52116:A1 *148:8 4.61744e-05
+9 *52116:A1 *264:9 3.00381e-05
+10 *52116:A1 *266:40 0
+11 *145:6 *266:40 0
+12 *52092:A *52091:A 4.82863e-05
+*RES
+1 *52089:Y *145:6 4.98 
+2 *145:6 *52091:A 4.05 
+3 *145:6 *52116:A1 7.005 
+*END
+
+*D_NET *146 0.00198132
+*CONN
+*I *52116:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52091:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52090:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52116:A2 4.2229e-05
+2 *52091:B 0.000109244
+3 *52090:X 0.000303357
+4 *146:5 0.000454831
+5 *52091:B *52092:B 4.82919e-05
+6 *52091:B *52093:B 0.000139245
+7 *52091:B *52094:A 0
+8 *52091:B *148:8 0
+9 *52091:B *266:40 2.75451e-05
+10 *52116:A2 *52094:B 0.0001249
+11 *52116:A2 *264:9 2.32597e-05
+12 *146:5 *52093:B 0.000198939
+13 *146:5 *52094:B 0.000160635
+14 *146:5 *264:9 0.000197828
+15 *52092:A *52091:B 3.00381e-05
+16 *52116:A1 *52091:B 6.14776e-05
+17 *52116:A1 *52116:A2 5.94962e-05
+*RES
+1 *52090:X *146:5 7.915 
+2 *146:5 *52091:B 8.45 
+3 *146:5 *52116:A2 3.1 
+*END
+
+*D_NET *147 0.00146454
+*CONN
+*I *52093:B I *D sky130_fd_sc_hd__and2_1
+*I *52092:B I *D sky130_fd_sc_hd__nor2_1
+*I *52091:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52093:B 8.98142e-05
+2 *52092:B 0.000211877
+3 *52091:Y 0
+4 *147:4 0.000301691
+5 *52092:B *148:8 0.00012657
+6 *52093:B *264:9 0.00011577
+7 *52093:B *266:40 7.63204e-05
+8 *52091:A *52092:B 2.75145e-05
+9 *52091:B *52092:B 4.82919e-05
+10 *52091:B *52093:B 0.000139245
+11 *52092:A *52092:B 0.000128507
+12 *146:5 *52093:B 0.000198939
+*RES
+1 *52091:Y *147:4 1.6 
+2 *147:4 *52092:B 6.13 
+3 *147:4 *52093:B 9.065 
+*END
+
+*D_NET *148 0.000738017
+*CONN
+*I *52094:A I *D sky130_fd_sc_hd__nor2_2
+*I *52116:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52092:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52094:A 9.4606e-05
+2 *52116:B1_N 0
+3 *52092:Y 0.000164513
+4 *148:8 0.000259119
+5 *52094:A *52094:B 4.70343e-05
+6 *52094:A *267:39 0
+7 *148:8 *267:39 0
+8 *52091:B *52094:A 0
+9 *52091:B *148:8 0
+10 *52092:B *148:8 0.00012657
+11 *52116:A1 *148:8 4.61744e-05
+*RES
+1 *52092:Y *148:8 6.375 
+2 *148:8 *52116:B1_N 3.6 
+3 *148:8 *52094:A 5.49 
+*END
+
+*D_NET *149 0.000840207
+*CONN
+*I *52094:B I *D sky130_fd_sc_hd__nor2_2
+*I *52093:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52094:B 0.000253819
+2 *52093:X 0.000253819
+3 *52094:B *266:40 0
+4 *52094:B *266:50 0
+5 *52094:A *52094:B 4.70343e-05
+6 *52116:A2 *52094:B 0.0001249
+7 *146:5 *52094:B 0.000160635
+*RES
+1 *52093:X *52094:B 11.1 
+*END
+
+*D_NET *150 0.00132349
+*CONN
+*I *52112:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52098:A I *D sky130_fd_sc_hd__xor2_4
+*I *52094:Y O *D sky130_fd_sc_hd__nor2_2
+*CAP
+1 *52112:A1 0.000114591
+2 *52098:A 0
+3 *52094:Y 0.000211401
+4 *150:9 0.000325992
+5 *52112:A1 *52098:B 0
+6 *52112:A1 *52112:A2 7.02671e-05
+7 *52112:A1 *52112:B1 0.000201503
+8 *52112:A1 *167:11 0.000138791
+9 *150:9 *52097:B 9.7872e-05
+10 *150:9 *52111:C 4.9968e-05
+11 *150:9 *52112:A2 8.49205e-05
+12 *150:9 *153:9 0
+13 *150:9 *167:11 2.8185e-05
+14 *150:9 *266:50 0
+*RES
+1 *52094:Y *150:9 10.07 
+2 *150:9 *52098:A 1.6 
+3 *150:9 *52112:A1 5.185 
+*END
+
+*D_NET *151 0.00265882
+*CONN
+*I *52111:C I *D sky130_fd_sc_hd__and3_1
+*I *52097:A I *D sky130_fd_sc_hd__xnor2_2
+*I *52095:Y O *D sky130_fd_sc_hd__o21bai_2
+*CAP
+1 *52111:C 0.000330642
+2 *52097:A 6.35238e-05
+3 *52095:Y 0.000570081
+4 *151:7 0.000964248
+5 *52097:A *52097:B 0.000116158
+6 *52097:A *266:50 2.97004e-06
+7 *52111:C *52097:B 5.34525e-05
+8 *52111:C *52112:A2 0.00015639
+9 *52111:C *154:5 0
+10 *52111:C *267:43 0
+11 *52111:C *267:50 3.49688e-05
+12 *151:7 *52112:A2 0.000316415
+13 *150:9 *52111:C 4.9968e-05
+*RES
+1 *52095:Y *151:7 8.62 
+2 *151:7 *52097:A 6.98 
+3 *151:7 *52111:C 10.58 
+*END
+
+*D_NET *152 0.00106504
+*CONN
+*I *52097:B I *D sky130_fd_sc_hd__xnor2_2
+*I *52096:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52097:B 0.000226271
+2 *52096:Y 0.000226271
+3 *52097:B *52112:B1 0.000181821
+4 *52097:B *203:131 0.000163199
+5 *52097:B *266:50 0
+6 *52097:A *52097:B 0.000116158
+7 *52111:C *52097:B 5.34525e-05
+8 *150:9 *52097:B 9.7872e-05
+*RES
+1 *52096:Y *52097:B 12.615 
+*END
+
+*D_NET *153 0.00153443
+*CONN
+*I *52098:B I *D sky130_fd_sc_hd__xor2_4
+*I *52112:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52097:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52098:B 2.08101e-05
+2 *52112:A2 0.000168056
+3 *52097:Y 0.000121123
+4 *153:9 0.00030999
+5 *52112:A2 *52112:B1 0.000203178
+6 *52112:A2 *167:11 4.71333e-05
+7 *153:9 *154:5 4.43871e-06
+8 *153:9 *167:11 1.33293e-05
+9 *153:9 *267:39 0
+10 *153:9 *267:43 1.83756e-05
+11 *52111:C *52112:A2 0.00015639
+12 *52112:A1 *52098:B 0
+13 *52112:A1 *52112:A2 7.02671e-05
+14 *150:9 *52112:A2 8.49205e-05
+15 *150:9 *153:9 0
+16 *151:7 *52112:A2 0.000316415
+*RES
+1 *52097:Y *153:9 7.52 
+2 *153:9 *52112:A2 7.24 
+3 *153:9 *52098:B 1.96 
+*END
+
+*D_NET *154 0.001765
+*CONN
+*I *52105:A I *D sky130_fd_sc_hd__xor2_4
+*I *52110:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52098:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52105:A 0.000104765
+2 *52110:A1 0.000117044
+3 *52098:X 0.000343591
+4 *154:5 0.0005654
+5 *52105:A *52105:B 0
+6 *52105:A *161:8 0
+7 *52110:A1 *52127:A 0.000352156
+8 *52110:A1 *160:7 3.00381e-05
+9 *154:5 *368:DIODE 0.000103449
+10 *154:5 *52105:B 0
+11 *154:5 *167:11 7.45794e-05
+12 *154:5 *267:39 0
+13 *154:5 *267:43 6.95418e-05
+14 *154:5 *268:48 0
+15 *52111:C *154:5 0
+16 *153:9 *154:5 4.43871e-06
+*RES
+1 *52098:X *154:5 8.99 
+2 *154:5 *52110:A1 6.81 
+3 *154:5 *52105:A 5.235 
+*END
+
+*D_NET *155 0.00243601
+*CONN
+*I *52102:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *52103:A I *D sky130_fd_sc_hd__nor3_1
+*I *52099:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52102:A1 3.47055e-05
+2 *52103:A 0.000101657
+3 *52099:Y 0.000311077
+4 *155:7 0.000447439
+5 *52102:A1 *52102:A2 7.23602e-05
+6 *52102:A1 *52102:B1 2.68721e-05
+7 *52103:A *52102:A2 2.92496e-05
+8 *52103:A *52102:B1 1.07797e-05
+9 *52103:A *52103:B 0.000380478
+10 *52103:A *52103:C 0.000316421
+11 *52103:A *52104:B 3.00381e-05
+12 *52103:A *156:5 4.82919e-05
+13 *52103:A *268:48 0.0001138
+14 *155:7 *156:5 0.000160635
+15 *52070:A *52102:A1 6.10941e-05
+16 *52070:A *52103:A 2.78732e-05
+17 *52100:B *155:7 2.59926e-05
+18 *126:7 *155:7 0.000237243
+*RES
+1 *52099:Y *155:7 7.845 
+2 *155:7 *52103:A 8.805 
+3 *155:7 *52102:A1 4.98 
+*END
+
+*D_NET *156 0.00138393
+*CONN
+*I *52103:B I *D sky130_fd_sc_hd__nor3_1
+*I *52102:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *52100:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52103:B 0.000180163
+2 *52102:A2 3.08256e-05
+3 *52100:Y 5.64292e-05
+4 *156:5 0.000267418
+5 *52102:A2 *52102:B1 9.54469e-05
+6 *156:5 *268:48 5.5626e-05
+7 *52100:B *156:5 7.00889e-06
+8 *52102:A1 *52102:A2 7.23602e-05
+9 *52103:A *52102:A2 2.92496e-05
+10 *52103:A *52103:B 0.000380478
+11 *52103:A *156:5 4.82919e-05
+12 *155:7 *156:5 0.000160635
+*RES
+1 *52100:Y *156:5 3.43 
+2 *156:5 *52102:A2 6.725 
+3 *156:5 *52103:B 5.155 
+*END
+
+*D_NET *157 0.00376772
+*CONN
+*I *52102:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *52103:C I *D sky130_fd_sc_hd__nor3_1
+*I *52101:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52102:B1 0.000148331
+2 *52103:C 4.09014e-05
+3 *52101:Y 0.000766314
+4 *157:12 0.000955546
+5 *52103:C *268:48 0.000316421
+6 *157:12 *203:182 8.53113e-06
+7 *157:12 *267:72 5.43769e-05
+8 *157:12 *268:48 0.000505372
+9 *52070:A *52102:B1 0
+10 *52070:A *157:12 0
+11 *52099:A *157:12 0.000344737
+12 *52099:B *157:12 4.60584e-05
+13 *52102:A1 *52102:B1 2.68721e-05
+14 *52102:A2 *52102:B1 9.54469e-05
+15 *52103:A *52102:B1 1.07797e-05
+16 *52103:A *52103:C 0.000316421
+17 *123:8 *157:12 0
+18 *124:11 *157:12 0.000122337
+19 *126:7 *157:12 9.27255e-06
+*RES
+1 *52101:Y *157:12 16.17 
+2 *157:12 *52103:C 6.465 
+3 *157:12 *52102:B1 6.45 
+*END
+
+*D_NET *158 0.000834784
+*CONN
+*I *52110:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52104:A I *D sky130_fd_sc_hd__nor2_2
+*I *52102:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *52110:B1 0.00021497
+2 *52104:A 0
+3 *52102:X 0.000141344
+4 *158:5 0.000356315
+5 *52110:B1 *160:7 0.000122155
+*RES
+1 *52102:X *158:5 3.775 
+2 *158:5 *52104:A 1.6 
+3 *158:5 *52110:B1 5.17 
+*END
+
+*D_NET *159 0.000301089
+*CONN
+*I *52104:B I *D sky130_fd_sc_hd__nor2_2
+*I *52103:Y O *D sky130_fd_sc_hd__nor3_1
+*CAP
+1 *52104:B 0.000135526
+2 *52103:Y 0.000135526
+3 *52104:B *52105:B 0
+4 *52103:A *52104:B 3.00381e-05
+*RES
+1 *52103:Y *52104:B 9.285 
+*END
+
+*D_NET *160 0.000803349
+*CONN
+*I *52110:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52105:B I *D sky130_fd_sc_hd__xor2_4
+*I *52104:Y O *D sky130_fd_sc_hd__nor2_2
+*CAP
+1 *52110:A2 0
+2 *52105:B 0.000150331
+3 *52104:Y 0.000152357
+4 *160:7 0.000302688
+5 *52105:B *161:8 1.22676e-05
+6 *160:7 *52127:A 1.51277e-05
+7 *52104:B *52105:B 0
+8 *52105:A *52105:B 0
+9 *52110:A1 *160:7 3.00381e-05
+10 *52110:B1 *160:7 0.000122155
+11 *136:8 *52105:B 1.83847e-05
+12 *154:5 *52105:B 0
+*RES
+1 *52104:Y *160:7 4.825 
+2 *160:7 *52105:B 7.94 
+3 *160:7 *52110:A2 1.6 
+*END
+
+*D_NET *161 0.00090959
+*CONN
+*I *52106:B I *D sky130_fd_sc_hd__xor2_4
+*I *52108:B I *D sky130_fd_sc_hd__nand2_1
+*I *52105:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52106:B 0.000184787
+2 *52108:B 0
+3 *52105:X 0.000204821
+4 *161:8 0.000389609
+5 *52105:A *161:8 0
+6 *52105:B *161:8 1.22676e-05
+7 *52108:A *52106:B 8.68724e-05
+8 *52108:A *161:8 5.53249e-06
+9 *136:8 *161:8 2.56999e-05
+*RES
+1 *52105:X *161:8 5.3975 
+2 *161:8 *52108:B 3.6 
+3 *161:8 *52106:B 6.975 
+*END
+
+*D_NET *162 0.00104409
+*CONN
+*I *52107:B I *D sky130_fd_sc_hd__xor2_4
+*I *52109:A2 I *D sky130_fd_sc_hd__a21boi_2
+*I *52106:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52107:B 0.000101335
+2 *52109:A2 7.75089e-05
+3 *52106:X 0.000143411
+4 *162:7 0.000322255
+5 *52107:B *52128:B 0
+6 *52109:A2 *52128:B 0
+7 *52107:A *52107:B 0.000225394
+8 *52107:A *52109:A2 0.000141599
+9 *136:8 *52109:A2 3.25831e-05
+*RES
+1 *52106:X *162:7 3.7775 
+2 *162:7 *52109:A2 5.49 
+3 *162:7 *52107:B 6.255 
+*END
+
+*D_NET *163 0.000620952
+*CONN
+*I *52109:B1_N I *D sky130_fd_sc_hd__a21boi_2
+*I *52108:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52109:B1_N 0.000310476
+2 *52108:Y 0.000310476
+*RES
+1 *52108:Y *52109:B1_N 7.79 
+*END
+
+*D_NET *164 0.000833213
+*CONN
+*I *52128:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52109:Y O *D sky130_fd_sc_hd__a21boi_2
+*CAP
+1 *52128:A 0.000345638
+2 *52109:Y 0.000345638
+3 *52128:A *275:5 0
+4 *52107:A *52128:A 0.000141938
+*RES
+1 *52109:Y *52128:A 13.71 
+*END
+
+*D_NET *165 0.00202124
+*CONN
+*I *52127:A I *D sky130_fd_sc_hd__xnor2_2
+*I *52110:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52127:A 0.000794211
+2 *52110:Y 0.000794211
+3 *52127:A *52127:B 6.55328e-05
+4 *52110:A1 *52127:A 0.000352156
+5 *160:7 *52127:A 1.51277e-05
+*RES
+1 *52110:Y *52127:A 17.2875 
+*END
+
+*D_NET *166 0.00101916
+*CONN
+*I *52112:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52111:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52112:B1 0.000193971
+2 *52111:X 0.000193971
+3 *52112:B1 *203:131 4.47209e-05
+4 *52097:B *52112:B1 0.000181821
+5 *52112:A1 *52112:B1 0.000201503
+6 *52112:A2 *52112:B1 0.000203178
+*RES
+1 *52111:X *52112:B1 11.805 
+*END
+
+*D_NET *167 0.00283638
+*CONN
+*I *52113:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52114:C I *D sky130_fd_sc_hd__and3_1
+*I *52112:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52113:B1 0.000198757
+2 *52114:C 0
+3 *52112:Y 0.000760275
+4 *167:11 0.000959033
+5 *52113:B1 *268:24 5.4155e-06
+6 *52113:B1 *268:28 0.000153338
+7 *167:11 *180:10 6.02273e-05
+8 *167:11 *203:137 8.88523e-06
+9 *167:11 *267:43 0.000237249
+10 *167:11 *268:28 5.00635e-05
+11 *167:11 *268:48 0.00010112
+12 *52112:A1 *167:11 0.000138791
+13 *52112:A2 *167:11 4.71333e-05
+14 *150:9 *167:11 2.8185e-05
+15 *153:9 *167:11 1.33293e-05
+16 *154:5 *167:11 7.45794e-05
+*RES
+1 *52112:Y *167:11 16.64 
+2 *167:11 *52114:C 1.6 
+3 *167:11 *52113:B1 4.42 
+*END
+
+*D_NET *168 0.00151463
+*CONN
+*I *52115:A I *D sky130_fd_sc_hd__nor2_1
+*I *52129:B1 I *D sky130_fd_sc_hd__a21o_4
+*I *52113:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52115:A 0.000187063
+2 *52129:B1 0.000200466
+3 *52113:Y 0
+4 *168:4 0.00038753
+5 *52115:A *373:DIODE 3.23663e-05
+6 *52115:A *52115:B 0.000331531
+7 *52115:A *203:156 7.49327e-05
+8 *52129:B1 *374:DIODE 2.52371e-05
+9 *52129:B1 *52115:B 4.82919e-05
+10 *52129:B1 *52127:B 3.72916e-05
+11 *52129:B1 *170:13 0.00013338
+12 *52129:B1 *180:10 0
+13 *52129:B1 *203:156 5.65384e-05
+*RES
+1 *52113:Y *168:4 1.6 
+2 *168:4 *52129:B1 9.935 
+3 *168:4 *52115:A 5.77 
+*END
+
+*D_NET *169 0.00113066
+*CONN
+*I *52115:B I *D sky130_fd_sc_hd__nor2_1
+*I *52114:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52115:B 0.000127033
+2 *52114:X 0.000127033
+3 *52115:B *373:DIODE 6.77501e-05
+4 *52115:B *203:156 9.21168e-05
+5 *52115:B *268:24 6.1357e-05
+6 *52115:B *268:28 0.000275548
+7 *52115:A *52115:B 0.000331531
+8 *52129:B1 *52115:B 4.82919e-05
+*RES
+1 *52114:X *52115:B 8.51 
+*END
+
+*D_NET *170 0.00267875
+*CONN
+*I *52129:A1 I *D sky130_fd_sc_hd__a21o_4
+*I *52126:A I *D sky130_fd_sc_hd__xor2_1
+*I *52115:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52129:A1 2.08101e-05
+2 *52126:A 0.000118236
+3 *52115:Y 0.000545298
+4 *170:13 0.000684344
+5 *52126:A *52126:B 0.00036002
+6 *52126:A *52127:B 1.17409e-05
+7 *52126:A *268:48 0.000359126
+8 *170:13 *373:DIODE 0.000163204
+9 *170:13 *374:DIODE 7.06865e-05
+10 *170:13 *52127:B 1.87074e-05
+11 *170:13 *268:24 0.000123225
+12 *170:13 *268:28 2.16833e-05
+13 *170:13 *277:5 4.82863e-05
+14 *52129:B1 *170:13 0.00013338
+*RES
+1 *52115:Y *170:13 13.25 
+2 *170:13 *52126:A 5.86 
+3 *170:13 *52129:A1 1.96 
+*END
+
+*D_NET *171 0.00078218
+*CONN
+*I *52125:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52116:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52125:A 0.000215223
+2 *52116:X 0.000215223
+3 *52125:A *180:10 3.00381e-05
+4 *52125:A *264:9 0.000321696
+*RES
+1 *52116:X *52125:A 8.135 
+*END
+
+*D_NET *172 0.00121331
+*CONN
+*I *52122:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52123:B I *D sky130_fd_sc_hd__and3_1
+*I *52117:Y O *D sky130_fd_sc_hd__nand4_1
+*CAP
+1 *52122:A1 0
+2 *52123:B 8.33547e-05
+3 *52117:Y 0.000239603
+4 *172:5 0.000322957
+5 *52123:B *52122:A2 7.06865e-05
+6 *52123:B *52123:A 1.26626e-05
+7 *52123:B *52124:A 9.52234e-05
+8 *52123:B *52124:B 3.09233e-05
+9 *52123:B *267:39 0
+10 *172:5 *52122:B1 8.40269e-05
+11 *172:5 *176:7 0.000273878
+*RES
+1 *52117:Y *172:5 4.81 
+2 *172:5 *52123:B 7.745 
+3 *172:5 *52122:A1 1.6 
+*END
+
+*D_NET *173 0.000903142
+*CONN
+*I *52123:C I *D sky130_fd_sc_hd__and3_1
+*I *52122:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52118:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *52123:C 3.80857e-05
+2 *52122:A2 4.66536e-05
+3 *52118:X 0.000166637
+4 *173:5 0.000251376
+5 *52122:A2 *52117:A 7.21296e-06
+6 *52122:A2 *52123:A 9.14049e-05
+7 *52122:A2 *52124:A 1.65105e-05
+8 *52123:C *267:19 2.8323e-05
+9 *173:5 *52118:A1 0.000124895
+10 *173:5 *267:19 6.1357e-05
+11 *52123:B *52122:A2 7.06865e-05
+*RES
+1 *52118:X *173:5 3.775 
+2 *173:5 *52122:A2 6.98 
+3 *173:5 *52123:C 2.11 
+*END
+
+*D_NET *174 0.00140202
+*CONN
+*I *52121:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52119:Y O *D sky130_fd_sc_hd__o21ai_1
+*CAP
+1 *52121:A 0.000169734
+2 *52119:Y 0.000169734
+3 *52121:A *364:DIODE 8.8266e-05
+4 *52121:A *52086:A2 0.000124399
+5 *52121:A *52121:B 3.25831e-05
+6 *52121:A *207:113 0.000394699
+7 *52121:A *283:61 4.99619e-05
+8 *52121:A *283:71 2.50049e-05
+9 *52086:B1 *52121:A 0.000241483
+10 *52088:A *52121:A 9.01345e-05
+11 *52119:B1 *52121:A 1.60203e-05
+*RES
+1 *52119:Y *52121:A 14.1 
+*END
+
+*D_NET *175 0.000968995
+*CONN
+*I *52121:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52120:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52121:B 0.000325287
+2 *52120:Y 0.000325287
+3 *52121:B *281:134 9.2741e-05
+4 *52121:B *283:71 5.39961e-05
+5 *52121:B *283:86 0.000114492
+6 *52088:A *52121:B 0
+7 *52121:A *52121:B 3.25831e-05
+8 *144:8 *52121:B 2.46089e-05
+*RES
+1 *52120:Y *52121:B 12.36 
+*END
+
+*D_NET *176 0.00187991
+*CONN
+*I *52122:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52123:A I *D sky130_fd_sc_hd__and3_1
+*I *52121:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52122:B1 8.17092e-05
+2 *52123:A 5.13453e-05
+3 *52121:Y 0.000225589
+4 *176:7 0.000358644
+5 *52123:A *52117:A 5.83373e-05
+6 *52123:A *267:39 4.43871e-06
+7 *176:7 *52117:A 0.000199833
+8 *176:7 *52117:B 8.8266e-05
+9 *176:7 *52117:D 0.000245488
+10 *176:7 *281:152 8.8266e-05
+11 *176:7 *281:162 1.60203e-05
+12 *52122:A2 *52123:A 9.14049e-05
+13 *52123:B *52123:A 1.26626e-05
+14 *172:5 *52122:B1 8.40269e-05
+15 *172:5 *176:7 0.000273878
+*RES
+1 *52121:Y *176:7 7.93 
+2 *176:7 *52123:A 6.98 
+3 *176:7 *52122:B1 3.085 
+*END
+
+*D_NET *177 0.00085331
+*CONN
+*I *52124:A I *D sky130_fd_sc_hd__or2_1
+*I *52122:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52124:A 0.000205412
+2 *52122:Y 0.000205412
+3 *52124:A *366:DIODE 2.07184e-05
+4 *52124:A *378:DIODE 0
+5 *52124:A *52124:B 5.21545e-05
+6 *52124:A *52125:B 5.83121e-06
+7 *52124:A *266:12 0.000203762
+8 *52124:A *266:27 4.82863e-05
+9 *52122:A2 *52124:A 1.65105e-05
+10 *52123:B *52124:A 9.52234e-05
+*RES
+1 *52122:Y *52124:A 12.345 
+*END
+
+*D_NET *178 0.000525563
+*CONN
+*I *52124:B I *D sky130_fd_sc_hd__or2_1
+*I *52123:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52124:B 0.000126824
+2 *52123:X 0.000126824
+3 *52124:B *225:146 0.000122331
+4 *52124:B *267:39 6.65066e-05
+5 *52123:B *52124:B 3.09233e-05
+6 *52124:A *52124:B 5.21545e-05
+*RES
+1 *52123:X *52124:B 10.23 
+*END
+
+*D_NET *179 0.000564329
+*CONN
+*I *52125:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52124:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52125:B 0.000237909
+2 *52124:X 0.000237909
+3 *52125:B *366:DIODE 7.06865e-05
+4 *52125:B *266:27 1.19928e-05
+5 *52125:B *267:39 0
+6 *52124:A *52125:B 5.83121e-06
+*RES
+1 *52124:X *52125:B 11.07 
+*END
+
+*D_NET *180 0.0022815
+*CONN
+*I *52129:A2 I *D sky130_fd_sc_hd__a21o_4
+*I *52126:B I *D sky130_fd_sc_hd__xor2_1
+*I *52125:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52129:A2 0
+2 *52126:B 0.000112779
+3 *52125:Y 0.000436821
+4 *180:10 0.0005496
+5 *52126:B *52127:B 9.65676e-05
+6 *180:10 *376:DIODE 0.000249921
+7 *180:10 *267:39 0.000294124
+8 *180:10 *268:48 9.14049e-05
+9 *52125:A *180:10 3.00381e-05
+10 *52126:A *52126:B 0.00036002
+11 *52129:B1 *180:10 0
+12 *167:11 *180:10 6.02273e-05
+*RES
+1 *52125:Y *180:10 15.59 
+2 *180:10 *52126:B 5.17 
+3 *180:10 *52129:A2 1.6 
+*END
+
+*D_NET *181 0.0013324
+*CONN
+*I *52127:B I *D sky130_fd_sc_hd__xnor2_2
+*I *52126:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52127:B 0.000551281
+2 *52126:X 0.000551281
+3 *52126:A *52127:B 1.17409e-05
+4 *52126:B *52127:B 9.65676e-05
+5 *52127:A *52127:B 6.55328e-05
+6 *52129:B1 *52127:B 3.72916e-05
+7 *170:13 *52127:B 1.87074e-05
+*RES
+1 *52126:X *52127:B 15.21 
+*END
+
+*D_NET *182 0.00104918
+*CONN
+*I *52128:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52127:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52128:B 0.000494947
+2 *52127:Y 0.000494947
+3 *52128:B *275:5 5.92849e-05
+4 *52107:B *52128:B 0
+5 *52109:A2 *52128:B 0
+6 *136:8 *52128:B 0
+*RES
+1 *52127:Y *52128:B 15.66 
+*END
+
+*D_NET *183 0.00985168
+*CONN
+*I *51901:A I *D sky130_fd_sc_hd__and3_1
+*I *52012:A I *D sky130_fd_sc_hd__and3_1
+*I *51895:A I *D sky130_fd_sc_hd__nand2_2
+*I *51942:A1 I *D sky130_fd_sc_hd__a22oi_1
+*I *52010:A I *D sky130_fd_sc_hd__nand2_1
+*I *51908:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *51922:A1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51968:A1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51991:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *51967:B I *D sky130_fd_sc_hd__and4_1
+*I *51893:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51901:A 0
+2 *52012:A 0.000131066
+3 *51895:A 1.55346e-05
+4 *51942:A1 5.2421e-05
+5 *52010:A 0.000177007
+6 *51908:A1 0
+7 *51922:A1 0
+8 *51968:A1 0
+9 *51991:A2 1.48869e-05
+10 *51967:B 0.000154389
+11 *51893:X 0
+12 *183:88 0.000554414
+13 *183:80 0.000717345
+14 *183:59 0.000484378
+15 *183:54 0.000560026
+16 *183:51 0.000873373
+17 *183:45 0.000624945
+18 *183:15 0.000504555
+19 *183:7 0.00061285
+20 *183:4 0.000538908
+21 *51895:A *51895:B 9.53428e-06
+22 *51942:A1 *199:20 9.03138e-05
+23 *51942:A1 *203:13 0
+24 *51967:B *51991:A1 8.65905e-05
+25 *51967:B *51991:B1 1.46828e-05
+26 *51967:B *51991:B2 0.00012083
+27 *51967:B *280:38 0.000123298
+28 *51967:B *281:47 0.000198945
+29 *51991:A2 *51991:B1 2.16502e-05
+30 *52010:A *51908:A2 4.99619e-05
+31 *52010:A *52010:B 1.85674e-05
+32 *52010:A *281:79 6.36494e-05
+33 *52010:A *284:28 2.30292e-05
+34 *52012:A *51895:B 7.00889e-06
+35 *52012:A *51898:A 5.30673e-05
+36 *52012:A *187:33 6.25897e-05
+37 *183:7 *51968:B1 2.11084e-05
+38 *183:7 *51968:B2 7.60965e-05
+39 *183:7 *189:17 7.10651e-05
+40 *183:7 *263:42 9.27255e-06
+41 *183:7 *281:53 1.16578e-05
+42 *183:15 *51941:B 0.000201503
+43 *183:15 *51968:A2 0.000221349
+44 *183:15 *51991:B1 6.05564e-05
+45 *183:15 *51992:A1 0
+46 *183:15 *189:45 8.53113e-06
+47 *183:15 *232:33 6.28498e-05
+48 *183:15 *262:26 8.99634e-06
+49 *183:15 *263:42 4.30297e-05
+50 *183:15 *280:38 3.87203e-05
+51 *183:15 *281:47 0.000450272
+52 *183:15 *282:18 1.15688e-05
+53 *183:45 *189:15 3.52139e-06
+54 *183:45 *281:53 0.000356395
+55 *183:51 *51910:A 0.000225179
+56 *183:51 *51923:B 0.000138175
+57 *183:51 *189:15 8.52652e-05
+58 *183:51 *280:49 1.37395e-05
+59 *183:54 *51923:B 0
+60 *183:54 *199:20 2.84864e-05
+61 *183:54 *263:12 1.0555e-05
+62 *183:54 *263:30 8.68314e-05
+63 *183:59 *51908:B1 4.82919e-05
+64 *183:59 *199:20 4.66108e-05
+65 *183:59 *284:28 0.000105604
+66 *183:80 *189:7 4.35348e-05
+67 *183:80 *189:15 0.000161837
+68 *183:80 *189:105 0.000107652
+69 *183:88 *51895:B 3.00381e-05
+70 *183:88 *51897:A 3.76697e-05
+71 *183:88 *51901:C 5.66235e-05
+72 *183:88 *189:105 9.27255e-06
+*RES
+1 *51893:X *183:4 1.6 
+2 *183:4 *183:7 3.915 
+3 *183:7 *183:15 12.82 
+4 *183:15 *51967:B 6.43 
+5 *183:15 *51991:A2 2.155 
+6 *183:7 *51968:A1 1.6 
+7 *183:4 *183:45 3.915 
+8 *183:45 *51922:A1 1.6 
+9 *183:45 *183:51 6.66 
+10 *183:51 *183:54 5.165 
+11 *183:54 *183:59 5.915 
+12 *183:59 *51908:A1 1.6 
+13 *183:59 *52010:A 4.825 
+14 *183:54 *51942:A1 4.725 
+15 *183:51 *183:80 5.625 
+16 *183:80 *183:88 5.415 
+17 *183:88 *51895:A 1.96 
+18 *183:88 *52012:A 4.12 
+19 *183:80 *51901:A 1.6 
+*END
+
+*D_NET *184 0.000932182
+*CONN
+*I *52131:B I *D sky130_fd_sc_hd__and2_1
+*I *52130:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52131:B 9.10449e-05
+2 *52130:X 9.10449e-05
+3 *52004:B *52131:B 3.12176e-05
+4 *52130:A *52131:B 4.60584e-05
+5 *52130:B *52131:B 0.000239813
+6 *46:10 *52131:B 0.000433003
+*RES
+1 *52130:X *52131:B 7.46 
+*END
+
+*D_NET *185 0.000865754
+*CONN
+*I *52132:A I *D sky130_fd_sc_hd__buf_6
+*I *52131:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52132:A 0.000337784
+2 *52131:X 0.000337784
+3 *52132:A *270:6 0
+4 *52133:A *52132:A 0
+5 *46:10 *52132:A 0.000117832
+6 *59:21 *52132:A 7.23533e-05
+7 *63:18 *52132:A 0
+*RES
+1 *52131:X *52132:A 13.05 
+*END
+
+*D_NET *186 0.000251609
+*CONN
+*I *52134:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52133:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52134:B 3.20073e-05
+2 *52133:Y 3.20073e-05
+3 *52133:A *52134:B 0.000120186
+4 *52133:B *52134:B 6.74079e-05
+*RES
+1 *52133:Y *52134:B 8.58 
+*END
+
+*D_NET *187 0.0118895
+*CONN
+*I *51909:A1 I *D sky130_fd_sc_hd__a21bo_1
+*I *51903:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *52011:B I *D sky130_fd_sc_hd__nand2_1
+*I *52083:B I *D sky130_fd_sc_hd__and3_1
+*I *52120:B I *D sky130_fd_sc_hd__nand2_1
+*I *52082:B I *D sky130_fd_sc_hd__nand2_1
+*I *52052:B I *D sky130_fd_sc_hd__nand2_1
+*I *51902:A I *D sky130_fd_sc_hd__and2_1
+*I *52012:B I *D sky130_fd_sc_hd__and3_1
+*I *51895:B I *D sky130_fd_sc_hd__nand2_2
+*I *51894:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51909:A1 0
+2 *51903:B1 0.000116862
+3 *52011:B 2.56275e-05
+4 *52083:B 0
+5 *52120:B 0.000257915
+6 *52082:B 0
+7 *52052:B 0
+8 *51902:A 0.000201497
+9 *52012:B 0
+10 *51895:B 6.67599e-05
+11 *51894:X 0.000244635
+12 *187:91 0.000341061
+13 *187:68 0.000600854
+14 *187:57 0.000638822
+15 *187:49 0.00091158
+16 *187:39 0.00138502
+17 *187:33 0.000817684
+18 *187:22 0.000559445
+19 *187:15 0.000580457
+20 *187:10 0.000383693
+21 *51902:A *193:113 2.7862e-05
+22 *51902:A *193:117 8.97564e-05
+23 *51903:B1 *51902:B 7.40446e-05
+24 *51903:B1 *51903:A1 0.000157595
+25 *51903:B1 *51903:B2 8.44359e-05
+26 *51903:B1 *194:36 0.000102774
+27 *51903:B1 *283:11 1.01661e-05
+28 *52011:B *51902:B 0
+29 *52011:B *194:22 0
+30 *52011:B *194:36 4.22232e-05
+31 *52120:B *281:134 0.000239813
+32 *187:10 *51894:A 0
+33 *187:10 *193:68 0.000241483
+34 *187:10 *193:86 3.66286e-05
+35 *187:10 *194:8 5.53249e-06
+36 *187:10 *194:22 5.99925e-05
+37 *187:15 *51897:A 0.000276441
+38 *187:15 *51909:A2 4.82863e-05
+39 *187:15 *207:73 0.000119631
+40 *187:15 *281:96 8.43946e-05
+41 *187:22 *51897:A 0
+42 *187:22 *51898:A 0
+43 *187:22 *52010:B 6.9117e-05
+44 *187:22 *190:10 9.29751e-06
+45 *187:22 *194:8 0
+46 *187:33 *51898:A 5.05437e-05
+47 *187:33 *52012:C 1.4399e-05
+48 *187:39 *52012:C 2.31814e-06
+49 *187:39 *52049:A 5.05521e-05
+50 *187:39 *283:39 3.52139e-06
+51 *187:49 *52049:A 3.90495e-05
+52 *187:91 *52010:B 2.32724e-05
+53 *187:91 *193:86 0.000238137
+54 *187:91 *194:22 8.65961e-05
+55 *187:91 *194:36 0.000127468
+56 *187:91 *207:73 0
+57 *51895:A *51895:B 9.53428e-06
+58 *52012:A *51895:B 7.00889e-06
+59 *52012:A *187:33 6.25897e-05
+60 *52013:A0 *51902:A 0.000245206
+61 *52013:A0 *51903:B1 0.000160635
+62 *52014:B *51902:A 5.4256e-05
+63 *52051:A2 *187:39 1.83847e-05
+64 *52051:B1 *51902:A 0
+65 *52053:A *187:57 0.000121296
+66 *52053:B *187:57 0.000277223
+67 *52084:A2 *187:57 5.20968e-05
+68 *52086:B1 *187:68 1.71013e-05
+69 *52087:C *187:68 0
+70 *70:7 *187:39 0.000240758
+71 *72:6 *51902:A 0.000120186
+72 *108:9 *187:49 0.000558359
+73 *138:6 *187:68 5.21046e-05
+74 *140:5 *187:49 0.000315527
+75 *144:8 *52120:B 0
+76 *183:88 *51895:B 3.00381e-05
+*RES
+1 *51894:X *187:10 9.5 
+2 *187:10 *187:15 6.26 
+3 *187:15 *187:22 5.975 
+4 *187:22 *51895:B 3.025 
+5 *187:22 *187:33 3.21 
+6 *187:33 *52012:B 1.6 
+7 *187:33 *187:39 7.35 
+8 *187:39 *51902:A 11.06 
+9 *187:39 *187:49 8.73 
+10 *187:49 *187:57 9.64 
+11 *187:57 *52052:B 1.6 
+12 *187:57 *187:68 7.205 
+13 *187:68 *52082:B 3.6 
+14 *187:68 *52120:B 8.175 
+15 *187:49 *52083:B 1.6 
+16 *187:15 *187:91 6.755 
+17 *187:91 *52011:B 2.215 
+18 *187:91 *51903:B1 9.575 
+19 *187:10 *51909:A1 1.6 
+*END
+
+*D_NET *188 0.000409918
+*CONN
+*I *51898:A I *D sky130_fd_sc_hd__xnor2_4
+*I *51895:Y O *D sky130_fd_sc_hd__nand2_2
+*CAP
+1 *51898:A 0.000150387
+2 *51895:Y 0.000150387
+3 *51898:A *52012:C 0
+4 *51898:A *190:10 5.53249e-06
+5 *52012:A *51898:A 5.30673e-05
+6 *187:22 *51898:A 0
+7 *187:33 *51898:A 5.05437e-05
+*RES
+1 *51895:Y *51898:A 10.14 
+*END
+
+*D_NET *189 0.0110377
+*CONN
+*I *51897:A I *D sky130_fd_sc_hd__nand2_2
+*I *51901:B I *D sky130_fd_sc_hd__and3_1
+*I *51942:B2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51908:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *51922:B2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51941:C I *D sky130_fd_sc_hd__and4_1
+*I *51990:B I *D sky130_fd_sc_hd__and2b_1
+*I *51991:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *51967:D I *D sky130_fd_sc_hd__and4_1
+*I *51968:B1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51896:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51897:A 0.000301216
+2 *51901:B 2.08101e-05
+3 *51942:B2 0.000164551
+4 *51908:B2 0
+5 *51922:B2 2.66205e-05
+6 *51941:C 0
+7 *51990:B 0
+8 *51991:B2 0.000141297
+9 *51967:D 0.000277322
+10 *51968:B1 2.89383e-05
+11 *51896:X 0
+12 *189:105 0.000509997
+13 *189:89 0.000243093
+14 *189:50 0.00051762
+15 *189:45 0.000367927
+16 *189:31 0.000409752
+17 *189:17 0.000317006
+18 *189:15 0.000905695
+19 *189:7 0.000867747
+20 *189:4 0.000245343
+21 *51897:A *51897:B 3.70488e-05
+22 *51897:A *51901:C 2.81446e-06
+23 *51897:A *194:8 0.00019893
+24 *51897:A *207:73 9.80943e-06
+25 *51897:A *281:96 0.000350486
+26 *51922:B2 *281:53 4.99619e-05
+27 *51942:B2 *51894:A 0.000106655
+28 *51942:B2 *192:11 5.00612e-05
+29 *51942:B2 *282:18 3.25831e-05
+30 *51967:D *51971:S 1.37895e-05
+31 *51967:D *51972:A1_N 6.31682e-05
+32 *51967:D *260:8 1.88727e-05
+33 *51967:D *262:56 9.20028e-05
+34 *51967:D *280:38 2.99445e-05
+35 *51968:B1 *263:42 5.22918e-05
+36 *51991:B2 *51967:A 2.00134e-05
+37 *51991:B2 *262:56 0
+38 *51991:B2 *280:38 0.000124577
+39 *189:15 *51923:B 0.000243067
+40 *189:15 *192:11 7.22354e-05
+41 *189:15 *203:13 4.82863e-05
+42 *189:15 *281:53 1.03323e-05
+43 *189:17 *51968:B2 0.000124895
+44 *189:17 *232:50 8.43946e-05
+45 *189:17 *263:42 0.000275553
+46 *189:17 *281:53 0.000161204
+47 *189:31 *51921:C 4.43871e-06
+48 *189:31 *51968:B2 4.82863e-05
+49 *189:31 *234:8 2.0514e-05
+50 *189:31 *262:26 4.21973e-05
+51 *189:45 *51941:B 0.000160635
+52 *189:45 *51992:A1 0
+53 *189:45 *193:21 8.40213e-05
+54 *189:45 *193:38 0.000263002
+55 *189:45 *234:8 0.000125264
+56 *189:45 *234:17 4.21314e-05
+57 *189:45 *262:26 0.000170045
+58 *189:45 *262:56 7.90356e-06
+59 *189:45 *278:81 0
+60 *189:45 *281:47 6.59822e-05
+61 *189:50 *51972:A1_N 1.71013e-05
+62 *189:50 *193:21 0.000390466
+63 *189:89 *192:11 5.13029e-05
+64 *189:89 *263:30 0
+65 *189:89 *282:18 0.000143009
+66 *189:105 *51901:C 1.83847e-05
+67 *51967:B *51991:B2 0.00012083
+68 *51969:B *189:31 9.25515e-05
+69 *28:15 *189:45 0.000335365
+70 *28:15 *189:50 0.000390466
+71 *51:8 *51991:B2 0
+72 *183:7 *51968:B1 2.11084e-05
+73 *183:7 *189:17 7.10651e-05
+74 *183:15 *189:45 8.53113e-06
+75 *183:45 *189:15 3.52139e-06
+76 *183:51 *189:15 8.52652e-05
+77 *183:80 *189:7 4.35348e-05
+78 *183:80 *189:15 0.000161837
+79 *183:80 *189:105 0.000107652
+80 *183:88 *51897:A 3.76697e-05
+81 *183:88 *189:105 9.27255e-06
+82 *187:15 *51897:A 0.000276441
+83 *187:22 *51897:A 0
+*RES
+1 *51896:X *189:4 1.6 
+2 *189:4 *189:7 1.155 
+3 *189:7 *189:15 11.1 
+4 *189:15 *189:17 5.625 
+5 *189:17 *51968:B1 2.41 
+6 *189:17 *189:31 6.94 
+7 *189:31 *189:45 12.61 
+8 *189:45 *189:50 6.2975 
+9 *189:50 *51967:D 7.2825 
+10 *189:50 *51991:B2 6.6075 
+11 *189:45 *51990:B 1.6 
+12 *189:31 *51941:C 1.6 
+13 *189:15 *51922:B2 2.41 
+14 *189:7 *189:89 4.145 
+15 *189:89 *51908:B2 3.6 
+16 *189:89 *51942:B2 6.72 
+17 *189:4 *189:105 3.21 
+18 *189:105 *51901:B 1.96 
+19 *189:105 *51897:A 13.73 
+*END
+
+*D_NET *190 0.00131529
+*CONN
+*I *52012:C I *D sky130_fd_sc_hd__and3_1
+*I *51898:B I *D sky130_fd_sc_hd__xnor2_4
+*I *51897:Y O *D sky130_fd_sc_hd__nand2_2
+*CAP
+1 *52012:C 0.000324254
+2 *51898:B 0
+3 *51897:Y 0.00010458
+4 *190:10 0.000428834
+5 *52012:C *283:11 0
+6 *190:10 *51897:B 5.83121e-06
+7 *190:10 *52010:B 0.000112123
+8 *190:10 *281:96 4.82919e-05
+9 *190:10 *283:11 2.16917e-05
+10 *51898:A *52012:C 0
+11 *51898:A *190:10 5.53249e-06
+12 *68:5 *52012:C 0.000238137
+13 *187:22 *190:10 9.29751e-06
+14 *187:33 *52012:C 1.4399e-05
+15 *187:39 *52012:C 2.31814e-06
+*RES
+1 *51897:Y *190:10 7.685 
+2 *190:10 *51898:B 1.6 
+3 *190:10 *52012:C 11.555 
+*END
+
+*D_NET *191 0.00139046
+*CONN
+*I *51905:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52016:B2 I *D sky130_fd_sc_hd__a22oi_2
+*I *51898:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *51905:A 9.52258e-05
+2 *52016:B2 2.19186e-05
+3 *51898:Y 0.000313636
+4 *191:6 0.00043078
+5 *51905:A *51905:B 0.00020613
+6 *51905:A *193:100 8.08153e-06
+7 *52016:B2 *52016:A2 5.83121e-06
+8 *191:6 *51903:A1 0
+9 *191:6 *51905:B 0.00011852
+10 *191:6 *52016:A2 0.000114492
+11 *191:6 *193:100 2.75625e-05
+12 *191:6 *193:113 0
+13 *191:6 *193:117 0
+14 *191:6 *196:6 0
+15 *191:6 *283:11 0
+16 *52014:A *191:6 0
+17 *74:5 *52016:B2 4.82863e-05
+*RES
+1 *51898:Y *191:6 9.315 
+2 *191:6 *52016:B2 4.05 
+3 *191:6 *51905:A 6 
+*END
+
+*D_NET *192 0.0127637
+*CONN
+*I *51903:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *52011:A I *D sky130_fd_sc_hd__nand2_1
+*I *51911:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51925:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *51945:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *51944:B I *D sky130_fd_sc_hd__nand2_1
+*I *51971:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *51900:A I *D sky130_fd_sc_hd__buf_2
+*I *51970:B I *D sky130_fd_sc_hd__nand2_1
+*I *51912:A I *D sky130_fd_sc_hd__nand2_1
+*I *51899:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51903:A1 0.000138634
+2 *52011:A 0
+3 *51911:A1 5.12065e-05
+4 *51925:A1 0
+5 *51945:A1 0
+6 *51944:B 1.88809e-05
+7 *51971:A1 0.000189555
+8 *51900:A 0
+9 *51970:B 0.000210185
+10 *51912:A 0
+11 *51899:X 0.000332249
+12 *192:93 0.000363761
+13 *192:79 0.000612351
+14 *192:53 0.000229246
+15 *192:37 0.000400472
+16 *192:31 0.000299849
+17 *192:27 0.000616819
+18 *192:25 0.000787623
+19 *192:17 0.000610487
+20 *192:11 0.000347163
+21 *51903:A1 *51902:B 0.000123225
+22 *51903:A1 *51903:B2 7.21296e-06
+23 *51903:A1 *193:86 0
+24 *51903:A1 *194:36 4.82863e-05
+25 *51903:A1 *196:6 4.83324e-05
+26 *51903:A1 *203:69 0.000124895
+27 *51903:A1 *283:11 1.70935e-05
+28 *51911:A1 *193:86 1.94805e-05
+29 *51911:A1 *207:73 0
+30 *51944:B *51945:A0 0
+31 *51944:B *278:70 5.4155e-06
+32 *51970:B *51972:A1_N 0.000220898
+33 *51970:B *51972:A2_N 4.82863e-05
+34 *51970:B *262:56 9.59856e-05
+35 *51970:B *272:188 0.000369048
+36 *51971:A1 *278:70 0.00032776
+37 *51971:A1 *279:31 0.000400378
+38 *192:11 *51894:A 0
+39 *192:11 *51907:B 4.82863e-05
+40 *192:11 *199:20 1.44177e-05
+41 *192:11 *203:24 0.000112097
+42 *192:11 *263:30 0.000155847
+43 *192:17 *51907:B 9.53428e-06
+44 *192:25 *51907:B 6.47951e-05
+45 *192:25 *51925:S 3.1226e-05
+46 *192:25 *51943:B 8.49205e-05
+47 *192:25 *193:68 0.000136714
+48 *192:25 *205:10 1.16578e-05
+49 *192:27 *51925:S 0.000457685
+50 *192:27 *51943:B 0.000213468
+51 *192:27 *51945:A0 4.99619e-05
+52 *192:27 *238:10 2.11084e-05
+53 *192:27 *279:31 0.00018171
+54 *192:31 *51945:A0 0.000281862
+55 *192:31 *278:70 7.68414e-06
+56 *192:31 *279:31 0.000387902
+57 *192:37 *51990:A_N 8.49205e-05
+58 *192:37 *51992:A1 7.06865e-05
+59 *192:37 *262:56 0.000410867
+60 *192:37 *278:81 2.88519e-05
+61 *192:53 *51945:A0 0
+62 *192:79 *51907:B 0.000459334
+63 *192:79 *51911:B1 0.0001249
+64 *192:79 *193:86 7.67415e-06
+65 *192:79 *194:22 0.000166979
+66 *192:79 *194:36 4.82863e-05
+67 *192:79 *200:10 0.000160641
+68 *192:79 *205:10 0.000394699
+69 *192:93 *194:36 0.000212122
+70 *51903:B1 *51903:A1 0.000157595
+71 *51942:B2 *192:11 5.00612e-05
+72 *51971:A0 *51970:B 7.8192e-05
+73 *51972:B1 *51970:B 3.00381e-05
+74 *51996:A1 *51971:A1 0.000124007
+75 *28:15 *51970:B 0.000105288
+76 *28:15 *192:37 0.000541113
+77 *51:8 *192:37 0
+78 *55:10 *51971:A1 4.82919e-05
+79 *189:15 *192:11 7.22354e-05
+80 *189:89 *192:11 5.13029e-05
+81 *191:6 *51903:A1 0
+*RES
+1 *51899:X *192:11 12.905 
+2 *192:11 *51912:A 1.6 
+3 *192:11 *192:17 0.36 
+4 *192:17 *192:25 5.415 
+5 *192:25 *192:27 11.49 
+6 *192:27 *192:31 3.915 
+7 *192:31 *192:37 10.825 
+8 *192:37 *51970:B 8.29 
+9 *192:37 *51900:A 1.6 
+10 *192:31 *192:53 0.36 
+11 *192:53 *51971:A1 9.415 
+12 *192:53 *51944:B 1.96 
+13 *192:27 *51945:A1 1.6 
+14 *192:25 *51925:A1 1.6 
+15 *192:17 *192:79 9.765 
+16 *192:79 *51911:A1 6.215 
+17 *192:79 *192:93 3.495 
+18 *192:93 *52011:A 1.6 
+19 *192:93 *51903:A1 9.485 
+*END
+
+*D_NET *193 0.0154731
+*CONN
+*I *52013:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *52049:A I *D sky130_fd_sc_hd__nand2_1
+*I *52051:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *51904:A1 I *D sky130_fd_sc_hd__a21bo_1
+*I *52016:A1 I *D sky130_fd_sc_hd__a22oi_2
+*I *51907:A I *D sky130_fd_sc_hd__and2_1
+*I *51926:A1_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51946:A1_N I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51992:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51972:A1_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51900:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *52013:A1 0
+2 *52049:A 0.000100811
+3 *52051:A1 0
+4 *51904:A1 0
+5 *52016:A1 1.85694e-05
+6 *51907:A 1.58461e-05
+7 *51926:A1_N 5.27966e-05
+8 *51946:A1_N 0
+9 *51992:A1 0.000233573
+10 *51972:A1_N 0.00018503
+11 *51900:X 0
+12 *193:117 0.000243056
+13 *193:113 0.000394864
+14 *193:100 0.000414814
+15 *193:86 0.00098912
+16 *193:68 0.00147424
+17 *193:52 0.00112354
+18 *193:38 0.00112378
+19 *193:21 0.00126733
+20 *193:4 0.00051571
+21 *51907:A *51907:B 0
+22 *51926:A1_N *51925:A0 9.37731e-05
+23 *51926:A1_N *51937:A 0.000136884
+24 *51926:A1_N *203:13 1.44259e-05
+25 *51926:A1_N *212:41 1.20411e-05
+26 *51926:A1_N *216:8 8.53113e-06
+27 *51926:A1_N *263:30 1.29068e-05
+28 *51972:A1_N *51971:S 0
+29 *51992:A1 *263:42 4.82863e-05
+30 *51992:A1 *278:81 8.34348e-05
+31 *51992:A1 *280:38 7.23602e-05
+32 *52016:A1 *52016:A2 9.53428e-06
+33 *52049:A *283:39 6.47326e-05
+34 *193:38 *292:DIODE 8.98743e-05
+35 *193:38 *51969:A 3.09179e-05
+36 *193:38 *212:12 0.000115779
+37 *193:38 *212:29 3.00381e-05
+38 *193:38 *238:10 0
+39 *193:38 *279:31 2.46089e-05
+40 *193:38 *280:38 1.0779e-05
+41 *193:38 *281:206 2.67022e-05
+42 *193:52 *51925:A0 7.23602e-05
+43 *193:52 *51937:A 0.000278286
+44 *193:52 *207:7 0.00027209
+45 *193:52 *207:55 0.000213141
+46 *193:52 *219:6 7.07879e-05
+47 *193:52 *236:11 0.000178482
+48 *193:68 *51907:B 0.000335822
+49 *193:68 *51925:S 0.000119762
+50 *193:86 *51903:B2 0
+51 *193:86 *51907:B 5.30673e-05
+52 *193:86 *51911:B1 0
+53 *193:86 *52016:A2 2.11084e-05
+54 *193:86 *194:22 0.000195671
+55 *193:86 *203:69 0.000199833
+56 *193:86 *204:8 0
+57 *193:100 *51902:B 4.99619e-05
+58 *193:100 *52016:A2 0.000120686
+59 *193:100 *52016:B1 0.000116158
+60 *193:100 *196:6 7.47145e-05
+61 *193:100 *203:69 2.75229e-05
+62 *193:113 *51902:B 0.000340498
+63 *193:113 *195:5 0.000277223
+64 *193:113 *203:69 4.35348e-05
+65 *51902:A *193:113 2.7862e-05
+66 *51902:A *193:117 8.97564e-05
+67 *51903:A1 *193:86 0
+68 *51905:A *193:100 8.08153e-06
+69 *51911:A1 *193:86 1.94805e-05
+70 *51967:D *51972:A1_N 6.31682e-05
+71 *51969:B *193:38 1.4389e-05
+72 *51970:B *51972:A1_N 0.000220898
+73 *51992:A2 *51992:A1 0.000242837
+74 *51992:B1 *51992:A1 0
+75 *52013:A0 *193:113 0.000220359
+76 *52013:S *193:117 0.000103192
+77 *52014:A *193:113 0.000116165
+78 *52051:B1 *52049:A 0.000201503
+79 *52051:B1 *193:117 0
+80 *28:15 *51972:A1_N 0.000208448
+81 *28:15 *193:21 1.46744e-05
+82 *28:15 *193:38 1.91597e-05
+83 *51:8 *51972:A1_N 0
+84 *108:9 *52049:A 0.000200615
+85 *183:15 *51992:A1 0
+86 *187:10 *193:68 0.000241483
+87 *187:10 *193:86 3.66286e-05
+88 *187:39 *52049:A 5.05521e-05
+89 *187:49 *52049:A 3.90495e-05
+90 *187:91 *193:86 0.000238137
+91 *189:45 *51992:A1 0
+92 *189:45 *193:21 8.40213e-05
+93 *189:45 *193:38 0.000263002
+94 *189:50 *51972:A1_N 1.71013e-05
+95 *189:50 *193:21 0.000390466
+96 *191:6 *193:100 2.75625e-05
+97 *191:6 *193:113 0
+98 *191:6 *193:117 0
+99 *192:25 *193:68 0.000136714
+100 *192:37 *51992:A1 7.06865e-05
+101 *192:79 *193:86 7.67415e-06
+*RES
+1 *51900:X *193:4 1.6 
+2 *193:4 *51972:A1_N 9.77375 
+3 *193:4 *193:21 4.59 
+4 *193:21 *51992:A1 11 
+5 *193:21 *193:38 14.425 
+6 *193:38 *51946:A1_N 1.6 
+7 *193:38 *193:52 12.485 
+8 *193:52 *51926:A1_N 5.35125 
+9 *193:52 *193:68 12.23 
+10 *193:68 *51907:A 1.96 
+11 *193:68 *193:86 16.555 
+12 *193:86 *52016:A1 1.96 
+13 *193:86 *193:100 8.335 
+14 *193:100 *51904:A1 1.6 
+15 *193:100 *193:113 9.44 
+16 *193:113 *193:117 4.655 
+17 *193:117 *52051:A1 1.6 
+18 *193:117 *52049:A 5.53 
+19 *193:113 *52013:A1 3.6 
+*END
+
+*D_NET *194 0.00465529
+*CONN
+*I *51902:B I *D sky130_fd_sc_hd__and2_1
+*I *51903:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *51911:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51909:A2 I *D sky130_fd_sc_hd__a21bo_1
+*I *51901:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *51902:B 0.000178089
+2 *51903:B2 0.000114445
+3 *51911:A2 0
+4 *51909:A2 2.22788e-05
+5 *51901:X 0.000190894
+6 *194:36 0.000387404
+7 *194:22 0.000289776
+8 *194:8 0.000408079
+9 *51902:B *203:69 6.89124e-05
+10 *51903:B2 *52010:B 0
+11 *194:8 *51901:C 3.86529e-05
+12 *194:8 *281:96 0.000101317
+13 *194:22 *51911:B1 0.00012657
+14 *194:22 *202:8 0.000116158
+15 *194:22 *207:73 0
+16 *51897:A *194:8 0.00019893
+17 *51903:A1 *51902:B 0.000123225
+18 *51903:A1 *51903:B2 7.21296e-06
+19 *51903:A1 *194:36 4.82863e-05
+20 *51903:B1 *51902:B 7.40446e-05
+21 *51903:B1 *51903:B2 8.44359e-05
+22 *51903:B1 *194:36 0.000102774
+23 *52011:B *51902:B 0
+24 *52011:B *194:22 0
+25 *52011:B *194:36 4.22232e-05
+26 *52013:A0 *51902:B 0.000590187
+27 *187:10 *194:8 5.53249e-06
+28 *187:10 *194:22 5.99925e-05
+29 *187:15 *51909:A2 4.82863e-05
+30 *187:22 *194:8 0
+31 *187:91 *194:22 8.65961e-05
+32 *187:91 *194:36 0.000127468
+33 *192:79 *194:22 0.000166979
+34 *192:79 *194:36 4.82863e-05
+35 *192:93 *194:36 0.000212122
+36 *193:86 *51903:B2 0
+37 *193:86 *194:22 0.000195671
+38 *193:100 *51902:B 4.99619e-05
+39 *193:113 *51902:B 0.000340498
+*RES
+1 *51901:X *194:8 7.725 
+2 *194:8 *51909:A2 4.05 
+3 *194:8 *194:22 8.15 
+4 *194:22 *51911:A2 1.6 
+5 *194:22 *194:36 4.395 
+6 *194:36 *51903:B2 7.745 
+7 *194:36 *51902:B 8.995 
+*END
+
+*D_NET *195 0.00148216
+*CONN
+*I *51904:A2 I *D sky130_fd_sc_hd__a21bo_1
+*I *52016:A2 I *D sky130_fd_sc_hd__a22oi_2
+*I *51902:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51904:A2 0
+2 *52016:A2 0.000281006
+3 *51902:X 4.0499e-05
+4 *195:5 0.000321505
+5 *195:5 *203:69 0.000275548
+6 *52016:A1 *52016:A2 9.53428e-06
+7 *52016:B2 *52016:A2 5.83121e-06
+8 *74:5 *52016:A2 1.47256e-05
+9 *191:6 *52016:A2 0.000114492
+10 *193:86 *52016:A2 2.11084e-05
+11 *193:100 *52016:A2 0.000120686
+12 *193:113 *195:5 0.000277223
+*RES
+1 *51902:X *195:5 4.12 
+2 *195:5 *52016:A2 10.115 
+3 *195:5 *51904:A2 1.6 
+*END
+
+*D_NET *196 0.000774426
+*CONN
+*I *52016:B1 I *D sky130_fd_sc_hd__a22oi_2
+*I *51904:B1_N I *D sky130_fd_sc_hd__a21bo_1
+*I *51903:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *52016:B1 5.97707e-05
+2 *51904:B1_N 5.74818e-05
+3 *51903:X 0.000107063
+4 *196:6 0.000224315
+5 *51904:B1_N *203:69 8.65905e-05
+6 *52016:B1 *203:69 0
+7 *196:6 *203:69 0
+8 *51903:A1 *196:6 4.83324e-05
+9 *191:6 *196:6 0
+10 *193:100 *52016:B1 0.000116158
+11 *193:100 *196:6 7.47145e-05
+*RES
+1 *51903:X *196:6 5.745 
+2 *196:6 *51904:B1_N 4.395 
+3 *196:6 *52016:B1 4.98 
+*END
+
+*D_NET *197 0.000637655
+*CONN
+*I *51905:B I *D sky130_fd_sc_hd__xnor2_4
+*I *51904:X O *D sky130_fd_sc_hd__a21bo_1
+*CAP
+1 *51905:B 0.000156503
+2 *51904:X 0.000156503
+3 *51905:B *198:6 0
+4 *51905:A *51905:B 0.00020613
+5 *52018:A *51905:B 0
+6 *191:6 *51905:B 0.00011852
+*RES
+1 *51904:X *51905:B 10.875 
+*END
+
+*D_NET *198 0.000586823
+*CONN
+*I *51918:A I *D sky130_fd_sc_hd__xor2_4
+*I *52022:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51905:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *51918:A 0.00016336
+2 *52022:A1 0
+3 *51905:Y 0.000130051
+4 *198:6 0.000293411
+5 *51918:A *51918:B 0
+6 *51905:B *198:6 0
+*RES
+1 *51905:Y *198:6 5.745 
+2 *198:6 *52022:A1 3.6 
+3 *198:6 *51918:A 6 
+*END
+
+*D_NET *199 0.00327469
+*CONN
+*I *51907:B I *D sky130_fd_sc_hd__and2_1
+*I *51912:B I *D sky130_fd_sc_hd__nand2_1
+*I *51923:A I *D sky130_fd_sc_hd__or2_1
+*I *51906:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51907:B 0.000161429
+2 *51912:B 0
+3 *51923:A 0
+4 *51906:X 0.000108178
+5 *199:20 0.00036856
+6 *199:10 0.000315308
+7 *199:10 *51923:B 1.7396e-05
+8 *199:10 *203:13 0
+9 *199:10 *281:67 0.000273352
+10 *199:10 *284:28 0.000204214
+11 *199:20 *203:24 0.000204463
+12 *199:20 *212:54 0.000181736
+13 *199:20 *216:8 8.52883e-05
+14 *199:20 *263:30 9.14049e-05
+15 *199:20 *284:28 0.000112697
+16 *51907:A *51907:B 0
+17 *51942:A1 *199:20 9.03138e-05
+18 *183:54 *199:20 2.84864e-05
+19 *183:59 *199:20 4.66108e-05
+20 *192:11 *51907:B 4.82863e-05
+21 *192:11 *199:20 1.44177e-05
+22 *192:17 *51907:B 9.53428e-06
+23 *192:25 *51907:B 6.47951e-05
+24 *192:79 *51907:B 0.000459334
+25 *193:68 *51907:B 0.000335822
+26 *193:86 *51907:B 5.30673e-05
+*RES
+1 *51906:X *199:10 8.99 
+2 *199:10 *51923:A 1.6 
+3 *199:10 *199:20 9.76 
+4 *199:20 *51912:B 1.6 
+5 *199:20 *51907:B 8.5 
+*END
+
+*D_NET *200 0.00259323
+*CONN
+*I *51915:A1 I *D sky130_fd_sc_hd__o211a_1
+*I *51916:B1 I *D sky130_fd_sc_hd__a211o_1
+*I *51907:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51915:A1 0.000223014
+2 *51916:B1 0.000147958
+3 *51907:X 0.000224122
+4 *200:10 0.000595094
+5 *51915:A1 *51915:A2 2.81272e-05
+6 *51915:A1 *51915:B1 0.000150095
+7 *51915:A1 *264:9 2.52564e-05
+8 *51916:B1 *51915:B1 4.66108e-05
+9 *51916:B1 *51916:C1 9.54399e-05
+10 *51916:B1 *51934:C1 5.47497e-06
+11 *51916:B1 *203:39 9.80032e-06
+12 *51916:B1 *220:14 0.000165139
+13 *200:10 *51911:B1 0.000116165
+14 *200:10 *51916:A1 2.92496e-05
+15 *200:10 *51916:A2 6.41227e-05
+16 *200:10 *203:42 0.000170591
+17 *200:10 *207:73 0.000158297
+18 *200:10 *207:172 0.000178034
+19 *192:79 *200:10 0.000160641
+*RES
+1 *51907:X *200:10 11.27 
+2 *200:10 *51916:B1 8.2775 
+3 *200:10 *51915:A1 5.11 
+*END
+
+*D_NET *201 0.000117335
+*CONN
+*I *51909:B1_N I *D sky130_fd_sc_hd__a21bo_1
+*I *51908:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *51909:B1_N 5.86673e-05
+2 *51908:X 5.86673e-05
+3 *51909:B1_N *51894:A 0
+4 *51909:B1_N *281:96 0
+*RES
+1 *51908:X *51909:B1_N 8.07 
+*END
+
+*D_NET *202 0.00100876
+*CONN
+*I *51913:A_N I *D sky130_fd_sc_hd__and3b_1
+*I *51928:B1_N I *D sky130_fd_sc_hd__a21bo_1
+*I *51909:X O *D sky130_fd_sc_hd__a21bo_1
+*CAP
+1 *51913:A_N 1.25806e-05
+2 *51928:B1_N 1.86412e-05
+3 *51909:X 0.000155173
+4 *202:8 0.000186395
+5 *51913:A_N *51913:C 7.57202e-05
+6 *51913:A_N *51928:A2 8.65961e-05
+7 *51928:B1_N *51913:C 0.000124895
+8 *51928:B1_N *51928:A2 0.000124895
+9 *202:8 *205:10 0
+10 *202:8 *207:73 0.000107709
+11 *194:22 *202:8 0.000116158
+*RES
+1 *51909:X *202:8 9.02 
+2 *202:8 *51928:B1_N 2.74 
+3 *202:8 *51913:A_N 2.395 
+*END
+
+*D_NET *203 0.0252984
+*CONN
+*I *51915:C1 I *D sky130_fd_sc_hd__o211a_1
+*I *51916:A2 I *D sky130_fd_sc_hd__a211o_1
+*I *369:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *372:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52096:B I *D sky130_fd_sc_hd__nand2_1
+*I *52113:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *374:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52114:B I *D sky130_fd_sc_hd__and3_1
+*I *376:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52111:B I *D sky130_fd_sc_hd__and3_1
+*I *52061:A I *D sky130_fd_sc_hd__nand2_1
+*I *349:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52021:B I *D sky130_fd_sc_hd__nand2_1
+*I *358:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *294:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *297:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51911:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *299:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *315:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51942:B1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51910:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51915:C1 2.7095e-05
+2 *51916:A2 0.00014049
+3 *369:DIODE 0.000364359
+4 *372:DIODE 0
+5 *52096:B 0
+6 *52113:A2 5.38008e-05
+7 *374:DIODE 0.000169949
+8 *52114:B 0
+9 *376:DIODE 0.000125208
+10 *52111:B 0
+11 *52061:A 1.25806e-05
+12 *349:DIODE 0.000181031
+13 *52021:B 0.000371517
+14 *358:DIODE 0.000209289
+15 *294:DIODE 0
+16 *297:DIODE 0
+17 *51911:B1 7.79152e-05
+18 *299:DIODE 0
+19 *315:DIODE 0.000898919
+20 *51942:B1 0
+21 *51910:X 0.000522108
+22 *203:182 0.000453257
+23 *203:156 0.00047059
+24 *203:147 0.000302222
+25 *203:137 0.000589075
+26 *203:131 0.000543894
+27 *203:125 0.000281855
+28 *203:120 0.000455465
+29 *203:94 0.000897583
+30 *203:87 0.000357616
+31 *203:85 0.000391134
+32 *203:76 0.000619638
+33 *203:69 0.0017589
+34 *203:54 0.0016955
+35 *203:42 0.000360312
+36 *203:41 0.000246952
+37 *203:39 0.000298228
+38 *203:31 0.000333051
+39 *203:24 0.00124217
+40 *203:13 0.000803445
+41 *315:DIODE *292:DIODE 0.000505372
+42 *315:DIODE *295:DIODE 5.73739e-05
+43 *315:DIODE *51920:B 4.88478e-05
+44 *315:DIODE *51927:B 4.82863e-05
+45 *315:DIODE *213:7 9.95101e-05
+46 *315:DIODE *220:14 3.78863e-05
+47 *315:DIODE *264:40 0.00039046
+48 *315:DIODE *264:48 8.92483e-05
+49 *349:DIODE *267:62 1.4389e-05
+50 *358:DIODE *266:64 5.43869e-05
+51 *369:DIODE *268:48 0.00058455
+52 *374:DIODE *268:21 7.21296e-06
+53 *374:DIODE *277:5 0.0001249
+54 *51911:B1 *204:8 0.000116158
+55 *51911:B1 *207:73 2.34345e-05
+56 *51915:C1 *51915:A2 1.04639e-05
+57 *51915:C1 *51915:B1 3.29789e-05
+58 *51915:C1 *206:9 2.16917e-05
+59 *51916:A2 *51916:A1 6.10941e-05
+60 *51916:A2 *51934:C1 1.89033e-05
+61 *51916:A2 *208:9 0
+62 *52061:A *265:13 8.65961e-05
+63 *52113:A2 *268:21 2.24912e-05
+64 *203:13 *51923:B 0.000134398
+65 *203:13 *51925:A0 4.43871e-06
+66 *203:13 *51943:B 0.000339426
+67 *203:13 *212:41 2.55587e-05
+68 *203:13 *262:14 0
+69 *203:13 *263:30 6.07575e-06
+70 *203:24 *51929:B_N 0
+71 *203:24 *212:54 0.000158408
+72 *203:24 *263:30 2.49909e-05
+73 *203:31 *220:14 3.70009e-05
+74 *203:39 *51915:B1 4.41506e-05
+75 *203:39 *51929:A 0.000119631
+76 *203:39 *51929:B_N 0.000239813
+77 *203:39 *206:9 0.000109377
+78 *203:39 *220:14 0.00022073
+79 *203:42 *204:8 2.92496e-05
+80 *203:42 *206:8 2.66935e-05
+81 *203:54 *51913:C 4.66108e-05
+82 *203:54 *51928:A2 4.66108e-05
+83 *203:69 *52055:A 0.000203178
+84 *203:69 *225:108 0.000424525
+85 *203:69 *225:164 0.0001249
+86 *203:69 *281:126 4.60584e-05
+87 *203:69 *281:134 9.91257e-05
+88 *203:85 *266:64 0
+89 *203:94 *265:13 0.000123225
+90 *203:125 *267:62 0.000526509
+91 *203:131 *267:50 0.000277223
+92 *203:131 *267:62 3.28565e-05
+93 *203:137 *267:46 1.03323e-05
+94 *203:137 *267:50 3.23663e-05
+95 *203:137 *268:28 3.64998e-06
+96 *203:137 *268:48 2.04648e-05
+97 *203:147 *268:28 3.45679e-05
+98 *203:156 *268:21 1.08194e-05
+99 *203:156 *268:28 3.23663e-05
+100 *51902:B *203:69 6.89124e-05
+101 *51903:A1 *203:69 0.000124895
+102 *51904:B1_N *203:69 8.65905e-05
+103 *51916:B1 *203:39 9.80032e-06
+104 *51926:A1_N *203:13 1.44259e-05
+105 *51942:A1 *203:13 0
+106 *52013:A0 *203:69 1.03323e-05
+107 *52016:B1 *203:69 0
+108 *52019:A *203:69 0.000165698
+109 *52020:B *203:69 0.000237243
+110 *52057:B *203:76 0
+111 *52064:A *203:120 0
+112 *52064:A *203:125 3.23663e-05
+113 *52064:B *349:DIODE 0
+114 *52064:B *203:125 4.47209e-05
+115 *52065:A *52021:B 3.23663e-05
+116 *52065:A *203:94 4.99782e-05
+117 *52065:B *52021:B 2.75145e-05
+118 *52065:B *203:94 9.4087e-05
+119 *52066:A *203:120 6.28498e-05
+120 *52066:A *203:125 4.66108e-05
+121 *52066:B *203:120 0
+122 *52090:A1 *203:76 0
+123 *52090:B1_N *203:76 4.91189e-05
+124 *52090:B1_N *203:85 1.82476e-05
+125 *52093:A *203:76 0
+126 *52095:A2 *203:94 2.75229e-05
+127 *52095:B1_N *203:120 0.000143266
+128 *52097:B *203:131 0.000163199
+129 *52112:B1 *203:131 4.47209e-05
+130 *52115:A *203:156 7.49327e-05
+131 *52115:B *203:156 9.21168e-05
+132 *52129:B1 *374:DIODE 2.52371e-05
+133 *52129:B1 *203:156 5.65384e-05
+134 *112:6 *203:69 0
+135 *112:6 *203:76 0
+136 *117:6 *203:85 0
+137 *117:6 *203:94 0.000116158
+138 *117:6 *203:120 0
+139 *118:7 *52061:A 7.57202e-05
+140 *118:7 *203:94 0.000124895
+141 *120:6 *349:DIODE 0
+142 *144:8 *203:69 0
+143 *144:8 *203:76 0
+144 *157:12 *203:182 8.53113e-06
+145 *167:11 *203:137 8.88523e-06
+146 *170:13 *374:DIODE 7.06865e-05
+147 *180:10 *376:DIODE 0.000249921
+148 *189:15 *203:13 4.82863e-05
+149 *192:11 *203:24 0.000112097
+150 *192:79 *51911:B1 0.0001249
+151 *193:86 *51911:B1 0
+152 *193:86 *203:69 0.000199833
+153 *193:100 *203:69 2.75229e-05
+154 *193:113 *203:69 4.35348e-05
+155 *194:22 *51911:B1 0.00012657
+156 *195:5 *203:69 0.000275548
+157 *196:6 *203:69 0
+158 *199:10 *203:13 0
+159 *199:20 *203:24 0.000204463
+160 *200:10 *51911:B1 0.000116165
+161 *200:10 *51916:A2 6.41227e-05
+162 *200:10 *203:42 0.000170591
+*RES
+1 *51910:X *203:13 14.405 
+2 *203:13 *51942:B1 1.6 
+3 *203:13 *203:24 10.42 
+4 *203:24 *315:DIODE 18.955 
+5 *203:24 *203:31 1.14 
+6 *203:31 *299:DIODE 1.6 
+7 *203:31 *203:39 7.365 
+8 *203:39 *203:41 2 
+9 *203:41 *203:42 2.145 
+10 *203:42 *51911:B1 6.63 
+11 *203:42 *203:54 4.865 
+12 *203:54 *297:DIODE 1.6 
+13 *203:54 *203:69 33.12 
+14 *203:69 *294:DIODE 3.6 
+15 *203:69 *203:76 4.185 
+16 *203:76 *358:DIODE 6.12 
+17 *203:76 *203:85 2.91 
+18 *203:85 *203:87 2 
+19 *203:87 *203:94 10.075 
+20 *203:94 *52021:B 6.115 
+21 *203:94 *349:DIODE 8.195 
+22 *203:87 *52061:A 2.395 
+23 *203:85 *203:120 4.44 
+24 *203:120 *203:125 6.95 
+25 *203:125 *203:131 4.185 
+26 *203:131 *52111:B 1.6 
+27 *203:131 *203:137 4.59 
+28 *203:137 *376:DIODE 8.51 
+29 *203:137 *203:147 0.795 
+30 *203:147 *52114:B 1.6 
+31 *203:147 *203:156 5.6975 
+32 *203:156 *374:DIODE 6.5025 
+33 *203:156 *52113:A2 4.5375 
+34 *203:125 *52096:B 1.6 
+35 *203:120 *203:182 3.125 
+36 *203:182 *372:DIODE 1.6 
+37 *203:182 *369:DIODE 6.88 
+38 *203:41 *51916:A2 6.20625 
+39 *203:39 *51915:C1 2.41 
+*END
+
+*D_NET *204 0.00149615
+*CONN
+*I *51913:B I *D sky130_fd_sc_hd__and3b_1
+*I *51928:A2 I *D sky130_fd_sc_hd__a21bo_1
+*I *51911:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *51913:B 3.55506e-05
+2 *51928:A2 0.000140676
+3 *51911:X 8.31327e-05
+4 *204:8 0.000259359
+5 *51928:A2 *51913:C 0.000142595
+6 *51928:A2 *207:69 0.000431328
+7 *51911:B1 *204:8 0.000116158
+8 *51913:A_N *51928:A2 8.65961e-05
+9 *51928:B1_N *51928:A2 0.000124895
+10 *193:86 *204:8 0
+11 *203:42 *204:8 2.92496e-05
+12 *203:54 *51928:A2 4.66108e-05
+*RES
+1 *51911:X *204:8 7.235 
+2 *204:8 *51928:A2 6.535 
+3 *204:8 *51913:B 2.215 
+*END
+
+*D_NET *205 0.00206974
+*CONN
+*I *51928:A1 I *D sky130_fd_sc_hd__a21bo_1
+*I *51913:C I *D sky130_fd_sc_hd__and3b_1
+*I *51912:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51928:A1 0
+2 *51913:C 0.000283717
+3 *51912:Y 0.000353062
+4 *205:10 0.000636779
+5 *51913:A_N *51913:C 7.57202e-05
+6 *51928:A2 *51913:C 0.000142595
+7 *51928:B1_N *51913:C 0.000124895
+8 *192:25 *205:10 1.16578e-05
+9 *192:79 *205:10 0.000394699
+10 *202:8 *205:10 0
+11 *203:54 *51913:C 4.66108e-05
+*RES
+1 *51912:Y *205:10 10.535 
+2 *205:10 *51913:C 6.55 
+3 *205:10 *51928:A1 1.6 
+*END
+
+*D_NET *206 0.00174244
+*CONN
+*I *51915:A2 I *D sky130_fd_sc_hd__o211a_1
+*I *51916:C1 I *D sky130_fd_sc_hd__a211o_1
+*I *51929:A I *D sky130_fd_sc_hd__or2b_1
+*I *51913:X O *D sky130_fd_sc_hd__and3b_1
+*CAP
+1 *51915:A2 6.51434e-05
+2 *51916:C1 0.000154884
+3 *51929:A 0.000132858
+4 *51913:X 5.08459e-05
+5 *206:9 0.000510798
+6 *206:8 0.000339045
+7 *51915:A2 *51915:B1 8.83796e-06
+8 *51916:C1 *51929:B_N 0
+9 *51916:C1 *51934:C1 6.31064e-06
+10 *51916:C1 *207:172 2.97192e-05
+11 *51916:C1 *220:14 1.15688e-05
+12 *51916:C1 *222:10 0
+13 *206:9 *51915:B1 2.10034e-05
+14 *51915:A1 *51915:A2 2.81272e-05
+15 *51915:C1 *51915:A2 1.04639e-05
+16 *51915:C1 *206:9 2.16917e-05
+17 *51916:B1 *51916:C1 9.54399e-05
+18 *203:39 *51929:A 0.000119631
+19 *203:39 *206:9 0.000109377
+20 *203:42 *206:8 2.66935e-05
+*RES
+1 *51913:X *206:8 6.47 
+2 *206:8 *206:9 2.865 
+3 *206:9 *51929:A 3.43 
+4 *206:9 *51916:C1 8.5625 
+5 *206:8 *51915:A2 3.14125 
+*END
+
+*D_NET *207 0.0216439
+*CONN
+*I *51916:A1 I *D sky130_fd_sc_hd__a211o_1
+*I *51915:B1 I *D sky130_fd_sc_hd__o211a_1
+*I *346:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52087:A I *D sky130_fd_sc_hd__nand3_1
+*I *363:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *365:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52052:A I *D sky130_fd_sc_hd__nand2_1
+*I *355:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *364:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52086:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *52083:A I *D sky130_fd_sc_hd__and3_1
+*I *52015:A I *D sky130_fd_sc_hd__nand2_1
+*I *296:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *298:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51993:A I *D sky130_fd_sc_hd__nand2_1
+*I *51995:A I *D sky130_fd_sc_hd__nor2_1
+*I *338:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51966:A I *D sky130_fd_sc_hd__nand2_1
+*I *324:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *339:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51914:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51916:A1 4.13697e-05
+2 *51915:B1 6.50947e-05
+3 *346:DIODE 0
+4 *52087:A 0.000392116
+5 *363:DIODE 0
+6 *365:DIODE 0.000361143
+7 *52052:A 7.87951e-05
+8 *355:DIODE 5.74715e-05
+9 *364:DIODE 0.000166369
+10 *52086:A1 0
+11 *52083:A 6.59034e-05
+12 *52015:A 0
+13 *296:DIODE 0
+14 *298:DIODE 0
+15 *51993:A 0
+16 *51995:A 0
+17 *338:DIODE 0
+18 *51966:A 0
+19 *324:DIODE 0.000166518
+20 *339:DIODE 0.000217332
+21 *51914:X 0
+22 *207:172 0.000195182
+23 *207:152 0.000474788
+24 *207:113 0.000802747
+25 *207:102 0.000771474
+26 *207:98 0.000264026
+27 *207:92 0.000345866
+28 *207:91 0.000490853
+29 *207:89 0.00046758
+30 *207:77 0.000498964
+31 *207:73 0.00113696
+32 *207:69 0.00150167
+33 *207:61 0.000555712
+34 *207:55 0.000675097
+35 *207:32 0.000253568
+36 *207:21 0.000329339
+37 *207:19 0.000360016
+38 *207:13 0.000480807
+39 *207:7 0.000734289
+40 *207:4 0.00109797
+41 *324:DIODE *272:74 0.000469632
+42 *339:DIODE *278:47 7.07032e-05
+43 *339:DIODE *278:56 8.40325e-05
+44 *365:DIODE *225:114 9.54399e-05
+45 *365:DIODE *281:115 0
+46 *365:DIODE *281:126 0.000428764
+47 *365:DIODE *281:134 0.000189845
+48 *51916:A1 *220:14 0.000130707
+49 *52083:A *283:61 7.10578e-05
+50 *52087:A *52087:B 4.99619e-05
+51 *52087:A *225:114 6.66464e-05
+52 *52087:A *225:118 0.000241483
+53 *52087:A *225:128 0.000234691
+54 *207:7 *51946:B2 8.65961e-05
+55 *207:7 *51965:A 2.30292e-05
+56 *207:7 *51965:B 0.000201503
+57 *207:7 *236:11 7.45329e-05
+58 *207:7 *258:8 0.000279787
+59 *207:13 *258:8 4.20169e-05
+60 *207:19 *258:8 0.000146392
+61 *207:19 *278:56 0.0001032
+62 *207:21 *278:56 1.33293e-05
+63 *207:32 *261:16 9.05377e-05
+64 *207:55 *51937:A 4.66742e-05
+65 *207:73 *51897:B 8.40213e-05
+66 *207:73 *281:104 0.000252537
+67 *207:73 *283:11 0.00049857
+68 *207:77 *281:104 0.000241483
+69 *207:89 *52015:B 5.4155e-06
+70 *207:89 *281:104 3.23663e-05
+71 *207:89 *281:115 6.90062e-05
+72 *207:102 *283:61 2.03578e-05
+73 *207:113 *283:61 0.000252585
+74 *207:152 *225:114 3.30108e-05
+75 *207:152 *225:118 0
+76 *207:172 *220:14 8.53113e-06
+77 *51897:A *207:73 9.80943e-06
+78 *51911:A1 *207:73 0
+79 *51911:B1 *207:73 2.34345e-05
+80 *51915:A1 *51915:B1 0.000150095
+81 *51915:A2 *51915:B1 8.83796e-06
+82 *51915:C1 *51915:B1 3.29789e-05
+83 *51916:A2 *51916:A1 6.10941e-05
+84 *51916:B1 *51915:B1 4.66108e-05
+85 *51916:C1 *207:172 2.97192e-05
+86 *51928:A2 *207:69 0.000431328
+87 *51995:B *207:13 0.000238137
+88 *51996:A1 *207:13 0.000198945
+89 *51996:A2 *207:13 1.08758e-05
+90 *51996:A2 *207:19 0.000180373
+91 *51996:B1 *207:13 8.40213e-05
+92 *52014:B *207:73 0.000194694
+93 *52053:A *207:98 3.71091e-05
+94 *52053:A *207:102 0
+95 *52053:B *52052:A 0.000201508
+96 *52054:A *207:89 0.000142669
+97 *52054:B *207:92 0
+98 *52083:C *207:113 0
+99 *52084:A2 *207:92 0
+100 *52088:A *364:DIODE 1.5186e-05
+101 *52121:A *364:DIODE 8.8266e-05
+102 *52121:A *207:113 0.000394699
+103 *111:6 *365:DIODE 4.61658e-05
+104 *140:5 *355:DIODE 8.65961e-05
+105 *187:15 *207:73 0.000119631
+106 *187:91 *207:73 0
+107 *193:52 *207:7 0.00027209
+108 *193:52 *207:55 0.000213141
+109 *194:22 *207:73 0
+110 *200:10 *51916:A1 2.92496e-05
+111 *200:10 *207:73 0.000158297
+112 *200:10 *207:172 0.000178034
+113 *202:8 *207:73 0.000107709
+114 *203:39 *51915:B1 4.41506e-05
+115 *206:9 *51915:B1 2.10034e-05
+*RES
+1 *51914:X *207:4 1.6 
+2 *207:4 *207:7 11.415 
+3 *207:7 *207:13 4.275 
+4 *207:13 *207:19 7.38 
+5 *207:19 *207:21 0.45 
+6 *207:21 *339:DIODE 5.5 
+7 *207:21 *207:32 5.89 
+8 *207:32 *324:DIODE 5.845 
+9 *207:32 *51966:A 1.6 
+10 *207:19 *338:DIODE 1.6 
+11 *207:13 *51995:A 1.6 
+12 *207:7 *51993:A 1.6 
+13 *207:4 *207:55 8.04 
+14 *207:55 *298:DIODE 1.6 
+15 *207:55 *207:61 2.175 
+16 *207:61 *296:DIODE 1.6 
+17 *207:61 *207:69 8.66 
+18 *207:69 *207:73 21.125 
+19 *207:73 *207:77 2.79 
+20 *207:77 *52015:A 1.6 
+21 *207:77 *207:89 6.96 
+22 *207:89 *207:91 2 
+23 *207:91 *207:92 1.89 
+24 *207:92 *207:98 2.19 
+25 *207:98 *207:102 3.125 
+26 *207:102 *52083:A 2.74 
+27 *207:102 *207:113 9.195 
+28 *207:113 *52086:A1 1.6 
+29 *207:113 *364:DIODE 3.775 
+30 *207:98 *355:DIODE 4.395 
+31 *207:92 *52052:A 5.43 
+32 *207:91 *365:DIODE 11.115 
+33 *207:89 *207:152 1.605 
+34 *207:152 *363:DIODE 1.6 
+35 *207:152 *52087:A 9.76 
+36 *207:73 *346:DIODE 1.6 
+37 *207:69 *207:172 2.145 
+38 *207:172 *51915:B1 5.7 
+39 *207:172 *51916:A1 5.235 
+*END
+
+*D_NET *208 0.00204187
+*CONN
+*I *52022:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51917:A I *D sky130_fd_sc_hd__or2b_1
+*I *51915:X O *D sky130_fd_sc_hd__o211a_1
+*CAP
+1 *52022:B1 0.000161807
+2 *51917:A 3.55506e-05
+3 *51915:X 0.000216343
+4 *208:9 0.000413701
+5 *52022:B1 *51918:B 0.000115146
+6 *52022:B1 *52022:A2 0.000536258
+7 *52022:B1 *266:64 0.00026163
+8 *208:9 *52022:A2 0.00012657
+9 *208:9 *209:5 0.000163204
+10 *51916:A2 *208:9 0
+11 *80:5 *52022:B1 1.16578e-05
+*RES
+1 *51915:X *208:9 9.755 
+2 *208:9 *51917:A 2.215 
+3 *208:9 *52022:B1 7.93 
+*END
+
+*D_NET *209 0.00176421
+*CONN
+*I *52022:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *51917:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *51916:X O *D sky130_fd_sc_hd__a211o_1
+*CAP
+1 *52022:A2 0.000240927
+2 *51917:B_N 0
+3 *51916:X 0.000217606
+4 *209:5 0.000458533
+5 *209:5 *51934:C1 2.11084e-05
+6 *52022:B1 *52022:A2 0.000536258
+7 *208:9 *52022:A2 0.00012657
+8 *208:9 *209:5 0.000163204
+*RES
+1 *51916:X *209:5 5.5 
+2 *209:5 *51917:B_N 1.6 
+3 *209:5 *52022:A2 7.57 
+*END
+
+*D_NET *210 0.000764264
+*CONN
+*I *51918:B I *D sky130_fd_sc_hd__xor2_4
+*I *51917:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *51918:B 0.00023079
+2 *51917:X 0.00023079
+3 *51918:B *266:64 4.82919e-05
+4 *51918:B *266:72 0.000139245
+5 *51918:A *51918:B 0
+6 *52022:B1 *51918:B 0.000115146
+*RES
+1 *51917:X *51918:B 11.01 
+*END
+
+*D_NET *211 0.00206651
+*CONN
+*I *52028:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *51936:A I *D sky130_fd_sc_hd__xor2_4
+*I *51918:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52028:A1 0.000141537
+2 *51936:A 5.66328e-05
+3 *51918:X 0.000145019
+4 *211:8 0.000343189
+5 *52028:A1 *52028:A2 0.000175894
+6 *52028:A1 *52028:B1_N 0.000122325
+7 *52028:A1 *266:74 6.97034e-05
+8 *211:8 *52028:A2 5.4003e-05
+9 *211:8 *212:87 0.000354725
+10 *211:8 *225:72 2.11084e-05
+11 *211:8 *225:80 1.47256e-05
+12 *211:8 *225:92 1.37205e-05
+13 *211:8 *227:8 9.14049e-05
+14 *211:8 *265:26 0.000462524
+*RES
+1 *51918:X *211:8 7.8275 
+2 *211:8 *51936:A 4.395 
+3 *211:8 *52028:A1 7.245 
+*END
+
+*D_NET *212 0.0125262
+*CONN
+*I *51933:C1 I *D sky130_fd_sc_hd__o211a_1
+*I *52101:B I *D sky130_fd_sc_hd__nand2_1
+*I *52068:B I *D sky130_fd_sc_hd__nand2_1
+*I *52027:A I *D sky130_fd_sc_hd__nand2_1
+*I *51934:A2 I *D sky130_fd_sc_hd__a211oi_1
+*I *51920:B I *D sky130_fd_sc_hd__nand2_1
+*I *51942:A2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51924:B I *D sky130_fd_sc_hd__nand2_1
+*I *51968:B2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51941:D I *D sky130_fd_sc_hd__and4_1
+*I *51919:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51933:C1 0
+2 *52101:B 0
+3 *52068:B 0.000214101
+4 *52027:A 0
+5 *51934:A2 0
+6 *51920:B 2.19189e-05
+7 *51942:A2 0
+8 *51924:B 1.88809e-05
+9 *51968:B2 0.000252472
+10 *51941:D 0
+11 *51919:X 2.08101e-05
+12 *212:99 0.000811805
+13 *212:87 0.000961105
+14 *212:77 0.00101286
+15 *212:66 0.00095579
+16 *212:54 0.000713545
+17 *212:41 0.000583248
+18 *212:29 0.000365088
+19 *212:12 0.000385302
+20 *212:5 0.00030189
+21 *51920:B *220:14 4.88478e-05
+22 *51924:B *51924:A 5.4155e-06
+23 *51968:B2 *51921:C 0.000100139
+24 *51968:B2 *234:8 8.65961e-05
+25 *51968:B2 *262:26 2.59926e-05
+26 *51968:B2 *263:42 6.36356e-05
+27 *52068:B *52101:A 5.53249e-06
+28 *52068:B *267:72 4.99619e-05
+29 *212:12 *51921:C 5.12942e-05
+30 *212:12 *279:31 8.08153e-06
+31 *212:12 *280:38 7.8936e-05
+32 *212:29 *263:42 0.000134938
+33 *212:29 *280:38 4.21666e-05
+34 *212:41 *51925:A0 0.000463611
+35 *212:41 *51926:B1 0.000163199
+36 *212:41 *51943:B 0.000260964
+37 *212:41 *263:30 0.000411654
+38 *212:41 *263:42 4.35348e-05
+39 *212:54 *51929:B_N 0
+40 *212:54 *51943:B 2.49381e-05
+41 *212:54 *219:6 0
+42 *212:54 *263:30 8.56054e-06
+43 *212:54 *264:18 0
+44 *212:66 *51953:A 7.1377e-05
+45 *212:66 *225:64 0.000186204
+46 *212:66 *264:25 0
+47 *212:66 *265:26 0.000314745
+48 *212:77 *310:DIODE 2.92496e-05
+49 *212:77 *51933:A2 2.75707e-05
+50 *212:77 *51934:C1 0
+51 *212:77 *220:14 0
+52 *212:77 *225:64 8.65961e-05
+53 *212:77 *225:72 0.000758392
+54 *212:77 *225:80 3.66286e-05
+55 *212:87 *225:80 2.49909e-05
+56 *212:87 *225:92 0.000188727
+57 *212:87 *266:72 0
+58 *212:99 *266:72 0
+59 *212:99 *267:72 0.000168213
+60 *315:DIODE *51920:B 4.88478e-05
+61 *51926:A1_N *212:41 1.20411e-05
+62 *51969:B *212:12 0.00011379
+63 *52032:A *212:99 0.0001249
+64 *52036:A *212:99 9.4087e-05
+65 *52036:B *212:99 0.0001249
+66 *52036:C *212:99 3.26084e-05
+67 *90:5 *212:99 0.000157343
+68 *90:14 *212:99 0
+69 *124:11 *52068:B 0.000112631
+70 *183:7 *51968:B2 7.60965e-05
+71 *189:17 *51968:B2 0.000124895
+72 *189:31 *51968:B2 4.82863e-05
+73 *193:38 *212:12 0.000115779
+74 *193:38 *212:29 3.00381e-05
+75 *199:20 *212:54 0.000181736
+76 *203:13 *212:41 2.55587e-05
+77 *203:24 *212:54 0.000158408
+78 *211:8 *212:87 0.000354725
+*RES
+1 *51919:X *212:5 1.96 
+2 *212:5 *212:12 7.72 
+3 *212:12 *51941:D 1.6 
+4 *212:12 *51968:B2 11.225 
+5 *212:5 *212:29 3.21 
+6 *212:29 *51924:B 1.96 
+7 *212:29 *212:41 8.37 
+8 *212:41 *51942:A2 1.6 
+9 *212:41 *212:54 9.275 
+10 *212:54 *51920:B 4.395 
+11 *212:54 *212:66 9.05 
+12 *212:66 *212:77 17.78 
+13 *212:77 *51934:A2 1.6 
+14 *212:77 *212:87 9.845 
+15 *212:87 *52027:A 3.6 
+16 *212:87 *212:99 13.925 
+17 *212:99 *52068:B 9.665 
+18 *212:99 *52101:B 1.6 
+19 *212:66 *51933:C1 1.6 
+*END
+
+*D_NET *213 0.00109592
+*CONN
+*I *51927:A I *D sky130_fd_sc_hd__nor2_1
+*I *51930:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51920:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51927:A 0
+2 *51930:A 0.000118542
+3 *51920:Y 6.49469e-05
+4 *213:7 0.000183489
+5 *51930:A *51930:B 0.000208243
+6 *51930:A *232:60 7.00889e-06
+7 *51930:A *264:25 0.00017362
+8 *213:7 *51927:B 5.4155e-06
+9 *213:7 *220:14 0.00023515
+10 *315:DIODE *213:7 9.95101e-05
+*RES
+1 *51920:Y *213:7 4.135 
+2 *213:7 *51930:A 8.63 
+3 *213:7 *51927:A 1.6 
+*END
+
+*D_NET *214 0.00253695
+*CONN
+*I *51943:A I *D sky130_fd_sc_hd__or2_1
+*I *51925:S I *D sky130_fd_sc_hd__mux2_1
+*I *51926:A2_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51921:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51943:A 3.71568e-05
+2 *51925:S 0.000235449
+3 *51926:A2_N 0.000251043
+4 *51921:X 4.70491e-05
+5 *214:15 0.000448722
+6 *214:6 0.000474209
+7 *51926:A2_N *263:30 0.00037959
+8 *51926:A2_N *263:42 1.08758e-05
+9 *51943:A *51926:B2 0
+10 *51943:A *232:50 0
+11 *214:6 *216:8 0
+12 *214:6 *280:38 3.86529e-05
+13 *214:6 *280:43 5.53249e-06
+14 *214:15 *51926:B2 0
+15 *214:15 *51937:A 0
+16 *214:15 *216:8 0
+17 *214:15 *232:50 0
+18 *192:25 *51925:S 3.1226e-05
+19 *192:27 *51925:S 0.000457685
+20 *193:68 *51925:S 0.000119762
+*RES
+1 *51921:X *214:6 4.47 
+2 *214:6 *51926:A2_N 7.155 
+3 *214:6 *214:15 2.4 
+4 *214:15 *51925:S 8.55 
+5 *214:15 *51943:A 4.215 
+*END
+
+*D_NET *215 0.00129187
+*CONN
+*I *51923:B I *D sky130_fd_sc_hd__or2_1
+*I *51922:Y O *D sky130_fd_sc_hd__a22oi_1
+*CAP
+1 *51923:B 0.000217452
+2 *51922:Y 0.000217452
+3 *51923:B *51910:A 0.000235301
+4 *51923:B *216:8 2.75229e-05
+5 *51923:B *262:14 0
+6 *51923:B *280:49 1.2818e-05
+7 *51923:B *284:28 4.82919e-05
+8 *183:51 *51923:B 0.000138175
+9 *183:54 *51923:B 0
+10 *189:15 *51923:B 0.000243067
+11 *199:10 *51923:B 1.7396e-05
+12 *203:13 *51923:B 0.000134398
+*RES
+1 *51922:Y *51923:B 14.04 
+*END
+
+*D_NET *216 0.00256644
+*CONN
+*I *51937:A I *D sky130_fd_sc_hd__xor2_1
+*I *51926:B1 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51923:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51937:A 0.000150061
+2 *51926:B1 2.30959e-05
+3 *51923:X 0.000387184
+4 *216:8 0.000560341
+5 *51926:B1 *263:30 0.000163199
+6 *51937:A *51926:B2 0.000179015
+7 *51937:A *51937:B 0.000114492
+8 *51937:A *219:6 7.21296e-06
+9 *216:8 *284:28 0.000235453
+10 *51923:B *216:8 2.75229e-05
+11 *51926:A1_N *51937:A 0.000136884
+12 *51926:A1_N *216:8 8.53113e-06
+13 *193:52 *51937:A 0.000278286
+14 *199:20 *216:8 8.52883e-05
+15 *207:55 *51937:A 4.66742e-05
+16 *212:41 *51926:B1 0.000163199
+17 *214:6 *216:8 0
+18 *214:15 *51937:A 0
+19 *214:15 *216:8 0
+*RES
+1 *51923:X *216:8 8.88 
+2 *216:8 *51926:B1 5.085 
+3 *216:8 *51937:A 8.58 
+*END
+
+*D_NET *217 0.00136433
+*CONN
+*I *51925:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *51924:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51925:A0 0.000250289
+2 *51924:Y 0.000250289
+3 *51925:A0 *51926:B2 8.8266e-05
+4 *51925:A0 *51943:B 5.12017e-06
+5 *51925:A0 *219:6 0.000136182
+6 *51926:A1_N *51925:A0 9.37731e-05
+7 *193:52 *51925:A0 7.23602e-05
+8 *203:13 *51925:A0 4.43871e-06
+9 *212:41 *51925:A0 0.000463611
+*RES
+1 *51924:Y *51925:A0 13.335 
+*END
+
+*D_NET *218 0.000971784
+*CONN
+*I *51937:B I *D sky130_fd_sc_hd__xor2_1
+*I *51926:B2 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51925:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *51937:B 7.7947e-05
+2 *51926:B2 0.00015904
+3 *51925:X 3.38751e-05
+4 *218:7 0.000270862
+5 *51926:B2 *236:11 0
+6 *51937:B *219:6 0
+7 *51937:B *236:11 0
+8 *218:7 *51943:B 4.82863e-05
+9 *51925:A0 *51926:B2 8.8266e-05
+10 *51937:A *51926:B2 0.000179015
+11 *51937:A *51937:B 0.000114492
+12 *51943:A *51926:B2 0
+13 *214:15 *51926:B2 0
+*RES
+1 *51925:X *218:7 4.05 
+2 *218:7 *51926:B2 6.54 
+3 *218:7 *51937:B 5.235 
+*END
+
+*D_NET *219 0.00150286
+*CONN
+*I *51930:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51927:B I *D sky130_fd_sc_hd__nor2_1
+*I *51926:X O *D sky130_fd_sc_hd__o2bb2a_1
+*CAP
+1 *51930:B 0.000144798
+2 *51927:B 3.84847e-05
+3 *51926:X 0.000287373
+4 *219:6 0.000470656
+5 *51927:B *220:14 3.64998e-06
+6 *51930:B *51938:A 0
+7 *51930:B *231:9 0
+8 *51930:B *264:18 0
+9 *219:6 *51938:A 0
+10 *219:6 *51943:B 8.17718e-05
+11 *315:DIODE *51927:B 4.82863e-05
+12 *51925:A0 *219:6 0.000136182
+13 *51930:A *51930:B 0.000208243
+14 *51937:A *219:6 7.21296e-06
+15 *51937:B *219:6 0
+16 *193:52 *219:6 7.07879e-05
+17 *212:54 *219:6 0
+18 *213:7 *51927:B 5.4155e-06
+*RES
+1 *51926:X *219:6 9.06 
+2 *219:6 *51927:B 4.41 
+3 *219:6 *51930:B 6.45 
+*END
+
+*D_NET *220 0.0041256
+*CONN
+*I *51934:B1 I *D sky130_fd_sc_hd__a211oi_1
+*I *51933:A1 I *D sky130_fd_sc_hd__o211a_1
+*I *51927:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51934:B1 5.92724e-05
+2 *51933:A1 6.37068e-05
+3 *51927:Y 0.000928304
+4 *220:14 0.00105128
+5 *51933:A1 *225:72 0.000223263
+6 *51933:A1 *265:26 0.000281374
+7 *51934:B1 *51934:A1 1.85674e-05
+8 *51934:B1 *225:72 0.000132977
+9 *51934:B1 *227:8 8.8266e-05
+10 *51934:B1 *265:26 8.96017e-05
+11 *220:14 *51929:B_N 0.000239813
+12 *220:14 *51934:C1 0
+13 *220:14 *222:10 4.99619e-05
+14 *315:DIODE *220:14 3.78863e-05
+15 *51916:A1 *220:14 0.000130707
+16 *51916:B1 *220:14 0.000165139
+17 *51916:C1 *220:14 1.15688e-05
+18 *51920:B *220:14 4.88478e-05
+19 *51927:B *220:14 3.64998e-06
+20 *203:31 *220:14 3.70009e-05
+21 *203:39 *220:14 0.00022073
+22 *207:172 *220:14 8.53113e-06
+23 *212:77 *220:14 0
+24 *213:7 *220:14 0.00023515
+*RES
+1 *51927:Y *220:14 21.14 
+2 *220:14 *51933:A1 4.9825 
+3 *220:14 *51934:B1 4.135 
+*END
+
+*D_NET *221 0.000778202
+*CONN
+*I *51929:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *51928:X O *D sky130_fd_sc_hd__a21bo_1
+*CAP
+1 *51929:B_N 0.000149288
+2 *51928:X 0.000149288
+3 *51916:C1 *51929:B_N 0
+4 *203:24 *51929:B_N 0
+5 *203:39 *51929:B_N 0.000239813
+6 *212:54 *51929:B_N 0
+7 *220:14 *51929:B_N 0.000239813
+*RES
+1 *51928:X *51929:B_N 11.01 
+*END
+
+*D_NET *222 0.000907491
+*CONN
+*I *51931:A I *D sky130_fd_sc_hd__nor2_1
+*I *51952:A I *D sky130_fd_sc_hd__xor2_1
+*I *51929:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *51931:A 3.62185e-05
+2 *51952:A 0.000172676
+3 *51929:X 0.000117133
+4 *222:10 0.000326027
+5 *51931:A *51931:B 9.53428e-06
+6 *51931:A *224:5 2.0053e-05
+7 *51952:A *51931:B 0.000168213
+8 *51952:A *224:5 7.67415e-06
+9 *51916:C1 *222:10 0
+10 *220:14 *222:10 4.99619e-05
+*RES
+1 *51929:X *222:10 7.175 
+2 *222:10 *51952:A 4.825 
+3 *222:10 *51931:A 2.3875 
+*END
+
+*D_NET *223 0.0010284
+*CONN
+*I *51931:B I *D sky130_fd_sc_hd__nor2_1
+*I *51952:B I *D sky130_fd_sc_hd__xor2_1
+*I *51930:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51931:B 0.000145751
+2 *51952:B 0
+3 *51930:Y 0.000258791
+4 *223:7 0.000404542
+5 *51931:B *224:5 7.00889e-06
+6 *223:7 *264:25 3.45588e-05
+7 *51931:A *51931:B 9.53428e-06
+8 *51952:A *51931:B 0.000168213
+*RES
+1 *51930:Y *223:7 5.17 
+2 *223:7 *51952:B 1.6 
+3 *223:7 *51931:B 4.825 
+*END
+
+*D_NET *224 0.00173263
+*CONN
+*I *51934:C1 I *D sky130_fd_sc_hd__a211oi_1
+*I *51933:A2 I *D sky130_fd_sc_hd__o211a_1
+*I *51931:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51934:C1 0.000609701
+2 *51933:A2 0.000128711
+3 *51931:Y 6.16009e-05
+4 *224:5 0.000800013
+5 *51933:A2 *225:72 6.45599e-06
+6 *51933:A2 *265:26 1.20411e-05
+7 *51916:A2 *51934:C1 1.89033e-05
+8 *51916:B1 *51934:C1 5.47497e-06
+9 *51916:C1 *51934:C1 6.31064e-06
+10 *51931:A *224:5 2.0053e-05
+11 *51931:B *224:5 7.00889e-06
+12 *51952:A *224:5 7.67415e-06
+13 *209:5 *51934:C1 2.11084e-05
+14 *212:77 *51933:A2 2.75707e-05
+15 *212:77 *51934:C1 0
+16 *220:14 *51934:C1 0
+*RES
+1 *51931:Y *224:5 2.395 
+2 *224:5 *51933:A2 7.35125 
+3 *224:5 *51934:C1 12.605 
+*END
+
+*D_NET *225 0.02019
+*CONN
+*I *52021:A I *D sky130_fd_sc_hd__nand2_1
+*I *52055:A I *D sky130_fd_sc_hd__nand2_1
+*I *356:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *362:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *382:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *378:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52118:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *52117:B I *D sky130_fd_sc_hd__nand4_1
+*I *52082:A I *D sky130_fd_sc_hd__nand2_1
+*I *348:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *310:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51934:A1 I *D sky130_fd_sc_hd__a211oi_1
+*I *51933:B1 I *D sky130_fd_sc_hd__o211a_1
+*I *309:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51998:A1 I *D sky130_fd_sc_hd__o21ai_1
+*I *51997:A I *D sky130_fd_sc_hd__nand2_1
+*I *51977:A I *D sky130_fd_sc_hd__and3_1
+*I *329:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *341:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *340:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51932:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *52021:A 0.000118825
+2 *52055:A 2.29512e-05
+3 *356:DIODE 0
+4 *362:DIODE 0
+5 *382:DIODE 0
+6 *378:DIODE 0.000110892
+7 *52118:B2 0
+8 *52117:B 0.000148369
+9 *52082:A 0
+10 *348:DIODE 0
+11 *310:DIODE 7.06278e-05
+12 *51934:A1 2.89361e-05
+13 *51933:B1 3.55506e-05
+14 *309:DIODE 0
+15 *51998:A1 0
+16 *51997:A 0
+17 *51977:A 0
+18 *329:DIODE 0
+19 *341:DIODE 0
+20 *340:DIODE 0.000127282
+21 *51932:X 0
+22 *225:164 3.99864e-05
+23 *225:146 0.000414557
+24 *225:130 0.000169179
+25 *225:128 0.000713721
+26 *225:118 0.000518247
+27 *225:114 0.000406254
+28 *225:108 0.000802197
+29 *225:100 0.000989648
+30 *225:92 0.0010019
+31 *225:80 0.000745216
+32 *225:72 0.000198289
+33 *225:64 0.000609072
+34 *225:58 0.00107903
+35 *225:28 0.000533245
+36 *225:23 0.000699682
+37 *225:22 0.000583404
+38 *225:15 0.000540801
+39 *225:10 0.000553243
+40 *225:4 0.000941391
+41 *340:DIODE *259:8 0
+42 *340:DIODE *261:66 0
+43 *378:DIODE *267:16 0
+44 *52055:A *281:126 0.000191521
+45 *52117:B *281:152 0
+46 *225:10 *51932:A 3.00381e-05
+47 *225:10 *256:8 0.000106634
+48 *225:10 *261:29 5.72091e-05
+49 *225:15 *261:23 5.14364e-05
+50 *225:22 *261:23 8.65961e-05
+51 *225:23 *322:DIODE 5.34747e-05
+52 *225:23 *265:57 2.96334e-05
+53 *225:23 *272:86 4.10576e-05
+54 *225:23 *272:92 7.5919e-05
+55 *225:28 *261:66 0
+56 *225:28 *261:76 0
+57 *225:58 *320:DIODE 5.34747e-05
+58 *225:58 *231:9 0.000188719
+59 *225:58 *256:8 0.000159951
+60 *225:58 *265:26 4.9253e-06
+61 *225:64 *51953:A 2.68526e-05
+62 *225:64 *265:26 0.000226108
+63 *225:72 *265:26 4.15081e-05
+64 *225:92 *265:13 7.77494e-05
+65 *225:92 *265:26 0.000230797
+66 *225:100 *265:13 0.000142138
+67 *225:108 *347:DIODE 0
+68 *225:108 *281:118 1.19928e-05
+69 *225:108 *281:126 0.000161529
+70 *225:128 *52087:B 9.80032e-06
+71 *225:128 *52118:B1 0.000351756
+72 *225:130 *52118:B1 0
+73 *225:146 *52118:A1 0.000132968
+74 *225:146 *52118:B1 5.05521e-05
+75 *225:146 *267:19 0.000421961
+76 *225:164 *281:126 0.000114024
+77 *365:DIODE *225:114 9.54399e-05
+78 *51933:A1 *225:72 0.000223263
+79 *51933:A2 *225:72 6.45599e-06
+80 *51934:B1 *51934:A1 1.85674e-05
+81 *51934:B1 *225:72 0.000132977
+82 *51975:B1 *225:22 0
+83 *51977:C *225:22 0
+84 *51977:C *225:23 0.000199833
+85 *51998:A2 *225:15 0.000313852
+86 *51999:A1 *225:22 1.43521e-05
+87 *52020:B *225:108 0.000139245
+88 *52023:A *225:108 0
+89 *52024:B *225:108 5.16348e-05
+90 *52025:B *52021:A 7.47215e-05
+91 *52025:B *225:108 8.28738e-05
+92 *52026:A *52021:A 5.85071e-05
+93 *52056:A2 *225:108 0
+94 *52056:B1_N *225:108 0
+95 *52087:A *225:114 6.66464e-05
+96 *52087:A *225:118 0.000241483
+97 *52087:A *225:128 0.000234691
+98 *52088:A *52117:B 0
+99 *52124:A *378:DIODE 0
+100 *52124:B *225:146 0.000122331
+101 *34:8 *225:22 0
+102 *58:6 *225:22 0
+103 *73:9 *225:108 0
+104 *78:8 *225:108 0.000151933
+105 *82:8 *52021:A 2.96383e-05
+106 *82:8 *225:108 3.90349e-05
+107 *111:6 *225:108 0
+108 *111:6 *225:114 0
+109 *119:9 *225:100 4.82863e-05
+110 *144:8 *225:128 0.000277223
+111 *176:7 *52117:B 8.8266e-05
+112 *203:69 *52055:A 0.000203178
+113 *203:69 *225:108 0.000424525
+114 *203:69 *225:164 0.0001249
+115 *207:152 *225:114 3.30108e-05
+116 *207:152 *225:118 0
+117 *211:8 *225:72 2.11084e-05
+118 *211:8 *225:80 1.47256e-05
+119 *211:8 *225:92 1.37205e-05
+120 *212:66 *225:64 0.000186204
+121 *212:77 *310:DIODE 2.92496e-05
+122 *212:77 *225:64 8.65961e-05
+123 *212:77 *225:72 0.000758392
+124 *212:77 *225:80 3.66286e-05
+125 *212:87 *225:80 2.49909e-05
+126 *212:87 *225:92 0.000188727
+*RES
+1 *51932:X *225:4 1.6 
+2 *225:4 *225:10 9.445 
+3 *225:10 *225:15 4.62 
+4 *225:15 *225:22 8.725 
+5 *225:22 *225:23 5.97 
+6 *225:23 *225:28 8.03 
+7 *225:28 *340:DIODE 5.745 
+8 *225:28 *341:DIODE 3.6 
+9 *225:23 *329:DIODE 1.6 
+10 *225:22 *51977:A 1.6 
+11 *225:15 *51997:A 1.6 
+12 *225:10 *51998:A1 1.6 
+13 *225:4 *225:58 10.8 
+14 *225:58 *309:DIODE 1.6 
+15 *225:58 *225:64 8.385 
+16 *225:64 *51933:B1 2.215 
+17 *225:64 *225:72 7.005 
+18 *225:72 *51934:A1 2.215 
+19 *225:72 *225:80 0.795 
+20 *225:80 *310:DIODE 6.725 
+21 *225:80 *225:92 11.505 
+22 *225:92 *348:DIODE 1.6 
+23 *225:92 *225:100 6.59 
+24 *225:100 *225:108 13.955 
+25 *225:108 *225:114 8.155 
+26 *225:114 *225:118 3.045 
+27 *225:118 *52082:A 1.6 
+28 *225:118 *225:128 9.36 
+29 *225:128 *225:130 0.36 
+30 *225:130 *52117:B 7.775 
+31 *225:130 *52118:B2 1.6 
+32 *225:128 *225:146 7.005 
+33 *225:146 *378:DIODE 7.235 
+34 *225:146 *382:DIODE 1.6 
+35 *225:114 *362:DIODE 1.6 
+36 *225:108 *225:164 1.14 
+37 *225:164 *356:DIODE 1.6 
+38 *225:164 *52055:A 3.43 
+39 *225:100 *52021:A 6.255 
+*END
+
+*D_NET *226 0.00203166
+*CONN
+*I *52028:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *51935:A I *D sky130_fd_sc_hd__or2_1
+*I *51933:X O *D sky130_fd_sc_hd__o211a_1
+*CAP
+1 *52028:B1_N 0.000459669
+2 *51935:A 0.000128642
+3 *51933:X 7.80227e-05
+4 *226:6 0.000666334
+5 *51935:A *51935:B 0.000201503
+6 *51935:A *51936:B 4.60584e-05
+7 *52028:B1_N *51958:B_N 0
+8 *52028:B1_N *52033:A_N 5.83121e-06
+9 *52028:B1_N *52033:B 0.0001249
+10 *52028:B1_N *229:7 0
+11 *52028:B1_N *266:74 0.000198378
+12 *52028:A1 *52028:B1_N 0.000122325
+*RES
+1 *51933:X *226:6 4.725 
+2 *226:6 *51935:A 6.12 
+3 *226:6 *52028:B1_N 11.985 
+*END
+
+*D_NET *227 0.00234464
+*CONN
+*I *52028:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *51935:B I *D sky130_fd_sc_hd__or2_1
+*I *51934:Y O *D sky130_fd_sc_hd__a211oi_1
+*CAP
+1 *52028:A2 0.000128307
+2 *51935:B 0.000369973
+3 *51934:Y 7.05972e-05
+4 *227:8 0.000568877
+5 *51935:B *51936:B 0.000509225
+6 *52028:A2 *229:7 0
+7 *227:8 *265:26 8.65905e-05
+8 *51934:B1 *227:8 8.8266e-05
+9 *51935:A *51935:B 0.000201503
+10 *52028:A1 *52028:A2 0.000175894
+11 *211:8 *52028:A2 5.4003e-05
+12 *211:8 *227:8 9.14049e-05
+*RES
+1 *51934:Y *227:8 5.52 
+2 *227:8 *51935:B 10.635 
+3 *227:8 *52028:A2 6.51 
+*END
+
+*D_NET *228 0.00122947
+*CONN
+*I *51936:B I *D sky130_fd_sc_hd__xor2_4
+*I *51935:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51936:B 0.000337096
+2 *51935:X 0.000337096
+3 *51935:A *51936:B 4.60584e-05
+4 *51935:B *51936:B 0.000509225
+*RES
+1 *51935:X *51936:B 10.88 
+*END
+
+*D_NET *229 0.000849004
+*CONN
+*I *51959:A I *D sky130_fd_sc_hd__xor2_4
+*I *52033:C I *D sky130_fd_sc_hd__and3b_1
+*I *51936:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *51959:A 8.61467e-05
+2 *52033:C 3.38751e-05
+3 *51936:X 0.000280337
+4 *229:7 0.000400359
+5 *51959:A *51959:B 0
+6 *51959:A *52033:A_N 0
+7 *52033:C *266:74 4.82863e-05
+8 *229:7 *51958:B_N 0
+9 *229:7 *52033:A_N 0
+10 *52028:A2 *229:7 0
+11 *52028:B1_N *229:7 0
+12 *91:8 *51959:A 0
+*RES
+1 *51936:X *229:7 5.615 
+2 *229:7 *52033:C 4.05 
+3 *229:7 *51959:A 4.98 
+*END
+
+*D_NET *230 0.0002075
+*CONN
+*I *51938:A I *D sky130_fd_sc_hd__inv_2
+*I *51937:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51938:A 0.00010375
+2 *51937:X 0.00010375
+3 *51938:A *232:50 0
+4 *51930:B *51938:A 0
+5 *219:6 *51938:A 0
+*RES
+1 *51937:X *51938:A 8.835 
+*END
+
+*D_NET *231 0.00124373
+*CONN
+*I *51963:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51949:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51938:Y O *D sky130_fd_sc_hd__inv_2
+*CAP
+1 *51963:A 0
+2 *51949:A1 7.33159e-05
+3 *51938:Y 0.000371018
+4 *231:9 0.000444334
+5 *51949:A1 *51949:A2 0.000166346
+6 *51949:A1 *51954:B 0
+7 *231:9 *51949:A2 0
+8 *231:9 *232:50 0
+9 *231:9 *232:60 0
+10 *231:9 *240:8 0
+11 *51930:B *231:9 0
+12 *225:58 *231:9 0.000188719
+*RES
+1 *51938:Y *231:9 12.14 
+2 *231:9 *51949:A1 7.49 
+3 *231:9 *51963:A 1.6 
+*END
+
+*D_NET *232 0.0141303
+*CONN
+*I *51957:A1 I *D sky130_fd_sc_hd__a211o_1
+*I *52035:A2 I *D sky130_fd_sc_hd__a211o_1
+*I *52071:B I *D sky130_fd_sc_hd__and2_1
+*I *52034:C1 I *D sky130_fd_sc_hd__o211ai_1
+*I *51956:B1 I *D sky130_fd_sc_hd__o211a_1
+*I *51950:B I *D sky130_fd_sc_hd__nand2_1
+*I *51940:B I *D sky130_fd_sc_hd__and2_1
+*I *51968:A2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51990:A_N I *D sky130_fd_sc_hd__and2b_1
+*I *51991:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *51939:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51957:A1 6.3624e-05
+2 *52035:A2 5.96088e-05
+3 *52071:B 0.000500872
+4 *52034:C1 4.78545e-05
+5 *51956:B1 1.8855e-05
+6 *51950:B 0
+7 *51940:B 0
+8 *51968:A2 5.49444e-05
+9 *51990:A_N 0.000205977
+10 *51991:B1 3.79592e-05
+11 *51939:X 0
+12 *232:98 0.000804049
+13 *232:95 0.00109821
+14 *232:80 0.000962292
+15 *232:74 0.000397343
+16 *232:60 0.000698912
+17 *232:50 0.00151009
+18 *232:33 0.00118917
+19 *232:8 0.000457985
+20 *232:4 0.000363531
+21 *51956:B1 *51956:A2 9.13949e-06
+22 *51957:A1 *51956:A1 5.39837e-05
+23 *51957:A1 *266:86 0.000178111
+24 *51968:A2 *263:42 0.000136349
+25 *51968:A2 *282:18 4.9968e-05
+26 *51990:A_N *262:56 8.49205e-05
+27 *51991:B1 *51991:A1 4.82863e-05
+28 *51991:B1 *280:38 0.000198939
+29 *52034:C1 *52034:B1 1.08758e-05
+30 *52034:C1 *267:90 4.00541e-06
+31 *52071:B *268:60 7.11153e-05
+32 *232:8 *281:47 0.000234674
+33 *232:33 *281:47 0.00016063
+34 *232:50 *292:DIODE 8.98743e-05
+35 *232:50 *51893:A 9.37731e-05
+36 *232:50 *51914:A 0.000180682
+37 *232:50 *51948:A 1.1561e-05
+38 *232:50 *236:11 5.20968e-05
+39 *232:50 *263:42 0.000461349
+40 *232:50 *264:30 0.000163019
+41 *232:50 *280:38 3.31204e-05
+42 *232:50 *280:43 4.05358e-05
+43 *232:50 *280:49 0
+44 *232:50 *281:63 0
+45 *232:50 *281:206 0.000128041
+46 *232:50 *282:18 4.66108e-05
+47 *232:60 *319:DIODE 0
+48 *232:60 *51940:A 5.4155e-06
+49 *232:60 *51953:A 0
+50 *232:60 *51960:A 9.50342e-06
+51 *232:60 *264:25 0.000190016
+52 *232:60 *264:30 3.45679e-05
+53 *232:60 *265:26 7.17811e-05
+54 *232:74 *51954:B 0
+55 *232:74 *51955:B 0.00013994
+56 *232:74 *51960:A 0.000162325
+57 *232:74 *51960:B 8.53113e-06
+58 *232:74 *266:86 4.82919e-05
+59 *232:74 *266:97 6.91499e-05
+60 *232:80 *51956:A2 0.000106311
+61 *232:80 *51956:C1 4.77719e-05
+62 *232:80 *51961:A 2.49909e-05
+63 *232:80 *51961:B 0
+64 *232:80 *248:8 3.09233e-05
+65 *232:80 *248:17 0.000132096
+66 *232:80 *266:97 5.23362e-05
+67 *232:95 *51956:A1 1.61831e-05
+68 *232:95 *51956:A2 2.16917e-05
+69 *232:95 *249:7 0.000227047
+70 *232:95 *252:8 6.62074e-05
+71 *232:98 *52034:B1 1.46744e-05
+72 *232:98 *267:90 2.30292e-05
+73 *51930:A *232:60 7.00889e-06
+74 *51938:A *232:50 0
+75 *51943:A *232:50 0
+76 *51967:B *51991:B1 1.46828e-05
+77 *51991:A2 *51991:B1 2.16502e-05
+78 *51992:A2 *51990:A_N 8.51453e-05
+79 *51992:A2 *232:8 9.37731e-05
+80 *51992:B1 *232:8 4.43871e-06
+81 *52034:A2 *232:98 0.000313857
+82 *52035:C1 *52035:A2 0
+83 *52036:C *52035:A2 0
+84 *52036:C *232:95 0
+85 *52037:A2 *52034:C1 1.91597e-05
+86 *52037:A2 *52071:B 8.34281e-06
+87 *52037:B1 *52071:B 0.000188727
+88 *40:8 *232:80 0.000273643
+89 *40:8 *232:95 4.94474e-05
+90 *51:8 *51990:A_N 2.06083e-05
+91 *51:8 *232:8 0
+92 *91:8 *52035:A2 0
+93 *91:8 *232:95 0
+94 *183:15 *51968:A2 0.000221349
+95 *183:15 *51991:B1 6.05564e-05
+96 *183:15 *232:33 6.28498e-05
+97 *189:17 *232:50 8.43946e-05
+98 *192:37 *51990:A_N 8.49205e-05
+99 *214:15 *232:50 0
+100 *231:9 *232:50 0
+101 *231:9 *232:60 0
+*RES
+1 *51939:X *232:4 1.6 
+2 *232:4 *232:8 5.3 
+3 *232:8 *51991:B1 5.43 
+4 *232:8 *51990:A_N 6.675 
+5 *232:4 *232:33 4.355 
+6 *232:33 *51968:A2 5.82 
+7 *232:33 *232:50 23.895 
+8 *232:50 *51940:B 1.6 
+9 *232:50 *232:60 11.225 
+10 *232:60 *51950:B 3.6 
+11 *232:60 *232:74 6.185 
+12 *232:74 *232:80 8.92 
+13 *232:80 *51956:B1 1.96 
+14 *232:80 *232:95 15.08 
+15 *232:95 *232:98 5.555 
+16 *232:98 *52034:C1 2.77 
+17 *232:98 *52071:B 8.65 
+18 *232:95 *52035:A2 4.47 
+19 *232:74 *51957:A1 3.445 
+*END
+
+*D_NET *233 0.000850738
+*CONN
+*I *51948:A I *D sky130_fd_sc_hd__nand2_1
+*I *51947:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51940:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51948:A 5.44037e-05
+2 *51947:A 0.000186742
+3 *51940:X 0
+4 *233:4 0.000241145
+5 *51947:A *240:8 9.5101e-05
+6 *51948:A *51947:B 0
+7 *51948:A *51949:B1 0.00011852
+8 *51948:A *264:30 0.000143266
+9 *232:50 *51948:A 1.1561e-05
+*RES
+1 *51940:X *233:4 1.6 
+2 *233:4 *51947:A 4.81 
+3 *233:4 *51948:A 7.49 
+*END
+
+*D_NET *234 0.0025845
+*CONN
+*I *51946:A2_N I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51945:S I *D sky130_fd_sc_hd__mux2_1
+*I *51969:A I *D sky130_fd_sc_hd__or2_1
+*I *51941:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51946:A2_N 0.000389576
+2 *51945:S 0
+3 *51969:A 2.23896e-05
+4 *51941:X 0.000264462
+5 *234:17 0.000543151
+6 *234:8 0.000440426
+7 *51946:A2_N *51965:A 0.000131799
+8 *51946:A2_N *236:11 0.000203178
+9 *51946:A2_N *238:10 0
+10 *51969:A *262:56 4.66108e-05
+11 *51969:A *280:38 2.16917e-05
+12 *234:8 *51941:A 4.82919e-05
+13 *234:8 *51941:B 6.52181e-05
+14 *234:8 *262:56 9.14049e-05
+15 *234:17 *279:31 0
+16 *51968:B2 *234:8 8.65961e-05
+17 *28:15 *51969:A 1.08758e-05
+18 *189:31 *234:8 2.0514e-05
+19 *189:45 *234:8 0.000125264
+20 *189:45 *234:17 4.21314e-05
+21 *193:38 *51969:A 3.09179e-05
+*RES
+1 *51941:X *234:8 7.845 
+2 *234:8 *51969:A 4.395 
+3 *234:8 *234:17 2.145 
+4 *234:17 *51945:S 3.6 
+5 *234:17 *51946:A2_N 9.135 
+*END
+
+*D_NET *235 0.00192316
+*CONN
+*I *51943:B I *D sky130_fd_sc_hd__or2_1
+*I *51942:Y O *D sky130_fd_sc_hd__a22oi_1
+*CAP
+1 *51943:B 0.000425573
+2 *51942:Y 0.000425573
+3 *51943:B *263:30 1.31227e-05
+4 *51925:A0 *51943:B 5.12017e-06
+5 *192:25 *51943:B 8.49205e-05
+6 *192:27 *51943:B 0.000213468
+7 *203:13 *51943:B 0.000339426
+8 *212:41 *51943:B 0.000260964
+9 *212:54 *51943:B 2.49381e-05
+10 *218:7 *51943:B 4.82863e-05
+11 *219:6 *51943:B 8.17718e-05
+*RES
+1 *51942:Y *51943:B 16.71 
+*END
+
+*D_NET *236 0.0016273
+*CONN
+*I *51946:B1 I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51965:A I *D sky130_fd_sc_hd__xor2_1
+*I *51943:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51946:B1 0
+2 *51965:A 5.89924e-05
+3 *51943:X 0.000292126
+4 *236:11 0.000351119
+5 *51965:A *51946:B2 3.74161e-05
+6 *51965:A *51965:B 0.000201503
+7 *236:11 *51946:B2 2.30292e-05
+8 *51926:B2 *236:11 0
+9 *51937:B *236:11 0
+10 *51946:A2_N *51965:A 0.000131799
+11 *51946:A2_N *236:11 0.000203178
+12 *193:52 *236:11 0.000178482
+13 *207:7 *51965:A 2.30292e-05
+14 *207:7 *236:11 7.45329e-05
+15 *232:50 *236:11 5.20968e-05
+*RES
+1 *51943:X *236:11 12.02 
+2 *236:11 *51965:A 4.12 
+3 *236:11 *51946:B1 1.6 
+*END
+
+*D_NET *237 0.000723309
+*CONN
+*I *51945:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *51944:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51945:A0 0.000163508
+2 *51944:Y 0.000163508
+3 *51945:A0 *278:70 1.61831e-05
+4 *51945:A0 *278:81 4.82863e-05
+5 *51944:B *51945:A0 0
+6 *192:27 *51945:A0 4.99619e-05
+7 *192:31 *51945:A0 0.000281862
+8 *192:53 *51945:A0 0
+*RES
+1 *51944:Y *51945:A0 7.22 
+*END
+
+*D_NET *238 0.000972904
+*CONN
+*I *51946:B2 I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51965:B I *D sky130_fd_sc_hd__xor2_1
+*I *51945:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *51946:B2 1.34951e-05
+2 *51965:B 2.75505e-05
+3 *51945:X 0.000159829
+4 *238:10 0.000200874
+5 *51946:A2_N *238:10 0
+6 *51965:A *51946:B2 3.74161e-05
+7 *51965:A *51965:B 0.000201503
+8 *192:27 *238:10 2.11084e-05
+9 *193:38 *238:10 0
+10 *207:7 *51946:B2 8.65961e-05
+11 *207:7 *51965:B 0.000201503
+12 *236:11 *51946:B2 2.30292e-05
+*RES
+1 *51945:X *238:10 7.685 
+2 *238:10 *51965:B 3.43 
+3 *238:10 *51946:B2 2.395 
+*END
+
+*D_NET *239 0.000992552
+*CONN
+*I *51947:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51948:B I *D sky130_fd_sc_hd__nand2_1
+*I *51946:Y O *D sky130_fd_sc_hd__o2bb2ai_1
+*CAP
+1 *51947:B 0.00015462
+2 *51948:B 9.29274e-05
+3 *51946:Y 0.000128822
+4 *239:6 0.00037637
+5 *51947:B *312:DIODE 0
+6 *51947:B *51949:B1 0
+7 *51948:B *264:40 0.000239813
+8 *239:6 *292:DIODE 0
+9 *51948:A *51947:B 0
+*RES
+1 *51946:Y *239:6 5.235 
+2 *239:6 *51948:B 5.775 
+3 *239:6 *51947:B 5.745 
+*END
+
+*D_NET *240 0.00107315
+*CONN
+*I *51949:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51963:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51947:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51949:A2 4.83309e-05
+2 *51963:B 0
+3 *51947:Y 0.00027366
+4 *240:8 0.000321991
+5 *51949:A2 *51949:B1 0.000102184
+6 *240:8 *51949:B1 6.28843e-05
+7 *240:8 *264:30 2.65814e-06
+8 *51947:A *240:8 9.5101e-05
+9 *51949:A1 *51949:A2 0.000166346
+10 *231:9 *51949:A2 0
+11 *231:9 *240:8 0
+*RES
+1 *51947:Y *240:8 7.5 
+2 *240:8 *51963:B 3.6 
+3 *240:8 *51949:A2 5.745 
+*END
+
+*D_NET *241 0.000834344
+*CONN
+*I *51949:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *51948:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51949:B1 0.000275378
+2 *51948:Y 0.000275378
+3 *51949:B1 *320:DIODE 0
+4 *51947:B *51949:B1 0
+5 *51948:A *51949:B1 0.00011852
+6 *51949:A2 *51949:B1 0.000102184
+7 *240:8 *51949:B1 6.28843e-05
+*RES
+1 *51948:Y *51949:B1 12.66 
+*END
+
+*D_NET *242 0.00101631
+*CONN
+*I *51951:A I *D sky130_fd_sc_hd__nor2_1
+*I *51954:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51949:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *51951:A 6.11421e-05
+2 *51954:A 0.000135069
+3 *51949:X 0.000107731
+4 *242:5 0.000303943
+5 *51951:A *51951:B 5.4155e-06
+6 *51951:A *265:31 0.0001249
+7 *51954:A *51954:B 0
+8 *242:5 *265:31 0.000278111
+*RES
+1 *51949:X *242:5 4.12 
+2 *242:5 *51954:A 7.745 
+3 *242:5 *51951:A 3.1 
+*END
+
+*D_NET *243 0.00122582
+*CONN
+*I *51954:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51951:B I *D sky130_fd_sc_hd__nor2_1
+*I *51950:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51954:B 0.000217318
+2 *51951:B 3.60518e-05
+3 *51950:Y 3.61538e-05
+4 *243:5 0.000289524
+5 *51951:B *244:10 8.8266e-05
+6 *51951:B *265:31 3.45588e-05
+7 *51954:B *51955:B 0
+8 *51954:B *247:7 0.000124895
+9 *51954:B *265:26 1.22762e-05
+10 *51954:B *266:97 0.000142661
+11 *243:5 *51950:A 3.10739e-06
+12 *243:5 *51955:B 7.00889e-06
+13 *243:5 *244:10 0.000150653
+14 *243:5 *265:31 7.79289e-05
+15 *51949:A1 *51954:B 0
+16 *51951:A *51951:B 5.4155e-06
+17 *51954:A *51954:B 0
+18 *232:74 *51954:B 0
+*RES
+1 *51950:Y *243:5 3.085 
+2 *243:5 *51951:B 2.755 
+3 *243:5 *51954:B 10.175 
+*END
+
+*D_NET *244 0.00256539
+*CONN
+*I *51956:A1 I *D sky130_fd_sc_hd__o211a_1
+*I *51957:B1 I *D sky130_fd_sc_hd__a211o_1
+*I *51951:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51956:A1 0.000269249
+2 *51957:B1 0
+3 *51951:Y 0.000543059
+4 *244:10 0.000812308
+5 *51956:A1 *51956:A2 0.000116716
+6 *51956:A1 *51956:C1 9.08126e-05
+7 *51956:A1 *248:17 0
+8 *51956:A1 *266:80 4.89295e-05
+9 *51956:A1 *266:86 1.05984e-05
+10 *244:10 *319:DIODE 4.2857e-05
+11 *244:10 *51955:B 2.32597e-05
+12 *244:10 *51960:A 0.000138799
+13 *244:10 *248:8 0.000136884
+14 *244:10 *248:17 9.50342e-06
+15 *244:10 *265:31 1.33293e-05
+16 *51951:B *244:10 8.8266e-05
+17 *51957:A1 *51956:A1 5.39837e-05
+18 *232:95 *51956:A1 1.61831e-05
+19 *243:5 *244:10 0.000150653
+*RES
+1 *51951:Y *244:10 13.79 
+2 *244:10 *51957:B1 1.6 
+3 *244:10 *51956:A1 10.325 
+*END
+
+*D_NET *245 0.000334378
+*CONN
+*I *51953:A I *D sky130_fd_sc_hd__inv_2
+*I *51952:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51953:A 9.41864e-05
+2 *51952:X 9.41864e-05
+3 *51953:A *265:26 4.77757e-05
+4 *212:66 *51953:A 7.1377e-05
+5 *225:64 *51953:A 2.68526e-05
+6 *232:60 *51953:A 0
+*RES
+1 *51952:X *51953:A 9.285 
+*END
+
+*D_NET *246 0.00146942
+*CONN
+*I *51955:A I *D sky130_fd_sc_hd__nor2_1
+*I *51960:A I *D sky130_fd_sc_hd__and2_1
+*I *51953:Y O *D sky130_fd_sc_hd__inv_2
+*CAP
+1 *51955:A 0
+2 *51960:A 0.000164548
+3 *51953:Y 0.000150593
+4 *246:11 0.000315141
+5 *51960:A *319:DIODE 6.23375e-05
+6 *51960:A *51955:B 0.000347499
+7 *51960:A *51960:B 1.26626e-05
+8 *51960:A *266:97 9.3062e-06
+9 *246:11 *319:DIODE 0
+10 *246:11 *51955:B 4.77719e-05
+11 *246:11 *265:26 4.89295e-05
+12 *232:60 *51960:A 9.50342e-06
+13 *232:74 *51960:A 0.000162325
+14 *244:10 *51960:A 0.000138799
+*RES
+1 *51953:Y *246:11 7.88 
+2 *246:11 *51960:A 10.955 
+3 *246:11 *51955:A 1.6 
+*END
+
+*D_NET *247 0.00180124
+*CONN
+*I *51960:B I *D sky130_fd_sc_hd__and2_1
+*I *51955:B I *D sky130_fd_sc_hd__nor2_1
+*I *51954:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51960:B 2.81328e-05
+2 *51955:B 0.000277687
+3 *51954:Y 0.000140469
+4 *247:7 0.000446289
+5 *51955:B *248:8 0.000136542
+6 *51960:B *266:97 0
+7 *247:7 *266:97 6.05513e-05
+8 *51954:B *51955:B 0
+9 *51954:B *247:7 0.000124895
+10 *51960:A *51955:B 0.000347499
+11 *51960:A *51960:B 1.26626e-05
+12 *232:74 *51955:B 0.00013994
+13 *232:74 *51960:B 8.53113e-06
+14 *243:5 *51955:B 7.00889e-06
+15 *244:10 *51955:B 2.32597e-05
+16 *246:11 *51955:B 4.77719e-05
+*RES
+1 *51954:Y *247:7 6.12 
+2 *247:7 *51955:B 10.185 
+3 *247:7 *51960:B 4.215 
+*END
+
+*D_NET *248 0.00188513
+*CONN
+*I *51956:A2 I *D sky130_fd_sc_hd__o211a_1
+*I *51961:A I *D sky130_fd_sc_hd__or2_2
+*I *51957:C1 I *D sky130_fd_sc_hd__a211o_1
+*I *51955:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51956:A2 0.000132389
+2 *51961:A 8.98067e-05
+3 *51957:C1 0
+4 *51955:Y 0.000213318
+5 *248:17 0.000287398
+6 *248:8 0.00027852
+7 *51956:A2 *51956:C1 4.89295e-05
+8 *248:8 *319:DIODE 5.20968e-05
+9 *248:8 *266:97 1.07797e-05
+10 *248:17 *51956:C1 0
+11 *51955:B *248:8 0.000136542
+12 *51956:A1 *51956:A2 0.000116716
+13 *51956:A1 *248:17 0
+14 *51956:B1 *51956:A2 9.13949e-06
+15 *40:8 *51961:A 4.70919e-05
+16 *232:80 *51956:A2 0.000106311
+17 *232:80 *51961:A 2.49909e-05
+18 *232:80 *248:8 3.09233e-05
+19 *232:80 *248:17 0.000132096
+20 *232:95 *51956:A2 2.16917e-05
+21 *244:10 *248:8 0.000136884
+22 *244:10 *248:17 9.50342e-06
+*RES
+1 *51955:Y *248:8 7.41 
+2 *248:8 *51957:C1 3.6 
+3 *248:8 *248:17 3.635 
+4 *248:17 *51961:A 3.085 
+5 *248:17 *51956:A2 4.48 
+*END
+
+*D_NET *249 0.00330004
+*CONN
+*I *52034:A1 I *D sky130_fd_sc_hd__o211ai_1
+*I *52035:B1 I *D sky130_fd_sc_hd__a211o_1
+*I *51958:A I *D sky130_fd_sc_hd__or2b_1
+*I *52033:A_N I *D sky130_fd_sc_hd__and3b_1
+*I *51956:X O *D sky130_fd_sc_hd__o211a_1
+*CAP
+1 *52034:A1 8.13107e-05
+2 *52035:B1 1.88809e-05
+3 *51958:A 0
+4 *52033:A_N 0.000162242
+5 *51956:X 0.000268572
+6 *249:28 0.000299779
+7 *249:20 0.000278084
+8 *249:7 0.00050931
+9 *52033:A_N *51958:B_N 0
+10 *52033:A_N *51959:B 0
+11 *52033:A_N *52033:B 1.47256e-05
+12 *52033:A_N *252:8 9.61414e-05
+13 *52033:A_N *266:74 4.82863e-05
+14 *52034:A1 *52035:A1 4.00541e-06
+15 *52034:A1 *267:90 0.000258832
+16 *52034:A1 *267:92 5.30673e-05
+17 *52035:B1 *52035:A1 5.4155e-06
+18 *249:20 *252:8 6.21553e-05
+19 *249:28 *51959:B 0.000188719
+20 *249:28 *267:92 0.0003691
+21 *51959:A *52033:A_N 0
+22 *52028:B1_N *52033:A_N 5.83121e-06
+23 *52034:A2 *52034:A1 0.000300242
+24 *52034:A2 *249:28 4.82919e-05
+25 *229:7 *52033:A_N 0
+26 *232:95 *249:7 0.000227047
+*RES
+1 *51956:X *249:7 7.155 
+2 *249:7 *52033:A_N 6.705 
+3 *249:7 *249:20 3.32 
+4 *249:20 *51958:A 1.6 
+5 *249:20 *249:28 6.24 
+6 *249:28 *52035:B1 1.96 
+7 *249:28 *52034:A1 5.62 
+*END
+
+*D_NET *250 0.00190268
+*CONN
+*I *52033:B I *D sky130_fd_sc_hd__and3b_1
+*I *51958:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *51957:X O *D sky130_fd_sc_hd__a211o_1
+*CAP
+1 *52033:B 0.000182696
+2 *51958:B_N 0.000279309
+3 *51957:X 0.000238564
+4 *250:9 0.000700569
+5 *51958:B_N *252:8 9.40517e-05
+6 *51958:B_N *272:142 4.43871e-06
+7 *52033:B *266:74 3.70009e-05
+8 *250:9 *266:74 5.88817e-05
+9 *250:9 *266:78 0.000160849
+10 *250:9 *266:80 6.69608e-06
+11 *52028:B1_N *51958:B_N 0
+12 *52028:B1_N *52033:B 0.0001249
+13 *52033:A_N *51958:B_N 0
+14 *52033:A_N *52033:B 1.47256e-05
+15 *40:8 *51958:B_N 0
+16 *229:7 *51958:B_N 0
+*RES
+1 *51957:X *250:9 5.965 
+2 *250:9 *51958:B_N 10.55 
+3 *250:9 *52033:B 4.12 
+*END
+
+*D_NET *251 0.000830032
+*CONN
+*I *51959:B I *D sky130_fd_sc_hd__xor2_4
+*I *51958:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *51959:B 0.000320656
+2 *51958:X 0.000320656
+3 *51959:A *51959:B 0
+4 *52033:A_N *51959:B 0
+5 *91:8 *51959:B 0
+6 *249:28 *51959:B 0.000188719
+*RES
+1 *51958:X *51959:B 11.7 
+*END
+
+*D_NET *252 0.00232455
+*CONN
+*I *52040:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51984:A I *D sky130_fd_sc_hd__xor2_4
+*I *51959:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52040:A1 0.000439602
+2 *51984:A 3.03716e-05
+3 *51959:X 0.000375098
+4 *252:8 0.000845072
+5 *52040:A1 *354:DIODE 0
+6 *52040:A1 *272:145 4.44927e-05
+7 *252:8 *272:142 0
+8 *252:8 *272:145 0.000257005
+9 *51958:B_N *252:8 9.40517e-05
+10 *52033:A_N *252:8 9.61414e-05
+11 *52039:A *52040:A1 0
+12 *52040:B1 *52040:A1 1.43521e-05
+13 *52042:A *52040:A1 0
+14 *52042:A *252:8 0
+15 *232:95 *252:8 6.62074e-05
+16 *249:20 *252:8 6.21553e-05
+*RES
+1 *51959:X *252:8 9.8225 
+2 *252:8 *51984:A 4.05 
+3 *252:8 *52040:A1 13.06 
+*END
+
+*D_NET *253 0.000330992
+*CONN
+*I *51961:B I *D sky130_fd_sc_hd__or2_2
+*I *51960:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51961:B 0.00014012
+2 *51960:X 0.00014012
+3 *40:8 *51961:B 5.0751e-05
+4 *232:80 *51961:B 0
+*RES
+1 *51960:X *51961:B 9.465 
+*END
+
+*D_NET *254 0.00198164
+*CONN
+*I *51986:A I *D sky130_fd_sc_hd__xor2_4
+*I *51981:A1 I *D sky130_fd_sc_hd__o21bai_2
+*I *51961:X O *D sky130_fd_sc_hd__or2_2
+*CAP
+1 *51986:A 0.000159769
+2 *51981:A1 9.5442e-05
+3 *51961:X 0.0003437
+4 *254:7 0.000598911
+5 *51981:A2 *51981:A1 2.86623e-05
+6 *51981:A2 *51986:A 4.94404e-05
+7 *51981:B1_N *51981:A1 0
+8 *51981:B1_N *51986:A 0
+9 *51986:B *51986:A 0.000112963
+10 *40:8 *51981:A1 8.57024e-05
+11 *40:8 *254:7 0.000507048
+*RES
+1 *51961:X *254:7 8.535 
+2 *254:7 *51981:A1 5.715 
+3 *254:7 *51986:A 7.02 
+*END
+
+*D_NET *255 0.00123636
+*CONN
+*I *51979:A I *D sky130_fd_sc_hd__xnor2_4
+*I *51980:A I *D sky130_fd_sc_hd__nor2_1
+*I *51962:Y O *D sky130_fd_sc_hd__nand2_2
+*CAP
+1 *51979:A 0.000113053
+2 *51980:A 0
+3 *51962:Y 0.000117764
+4 *255:10 0.000230817
+5 *51979:A *267:104 0.000433003
+6 *51979:A *272:130 5.33172e-05
+7 *255:10 *52002:A2 3.64998e-06
+8 *255:10 *272:130 7.23602e-05
+9 *51979:B *51979:A 1.47347e-05
+10 *51980:B *51979:A 5.4155e-06
+11 *51981:B1_N *51979:A 0.000140145
+12 *51981:B1_N *255:10 0
+13 *37:10 *255:10 5.20968e-05
+*RES
+1 *51962:Y *255:10 7.685 
+2 *255:10 *51980:A 1.6 
+3 *255:10 *51979:A 6.22 
+*END
+
+*D_NET *256 0.00222181
+*CONN
+*I *51978:A1 I *D sky130_fd_sc_hd__o21ba_2
+*I *52001:A I *D sky130_fd_sc_hd__xor2_1
+*I *51963:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51978:A1 0.000121119
+2 *52001:A 0
+3 *51963:Y 0.000699917
+4 *256:8 0.000821036
+5 *256:8 *320:DIODE 0.000124895
+6 *256:8 *51932:A 2.75145e-05
+7 *51978:A2 *51978:A1 8.70923e-05
+8 *51978:B1_N *51978:A1 0
+9 *51978:B1_N *256:8 0
+10 *35:6 *51978:A1 1.1561e-05
+11 *35:6 *256:8 6.20952e-05
+12 *225:10 *256:8 0.000106634
+13 *225:58 *256:8 0.000159951
+*RES
+1 *51963:Y *256:8 13.365 
+2 *256:8 *52001:A 3.6 
+3 *256:8 *51978:A1 5.745 
+*END
+
+*D_NET *257 0.00134826
+*CONN
+*I *51976:A I *D sky130_fd_sc_hd__xor2_1
+*I *51964:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51976:A 0.000374378
+2 *51964:Y 0.000374378
+3 *51976:A *261:29 6.5525e-05
+4 *51976:A *265:45 1.16578e-05
+5 *51976:A *265:57 1.12578e-05
+6 *51978:B1_N *51976:A 0.000461947
+7 *58:6 *51976:A 4.91189e-05
+*RES
+1 *51964:Y *51976:A 13.17 
+*END
+
+*D_NET *258 0.0027084
+*CONN
+*I *51989:A I *D sky130_fd_sc_hd__xor2_1
+*I *51975:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *51965:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51989:A 6.80525e-05
+2 *51975:A1 7.52112e-05
+3 *51965:X 0.00075224
+4 *258:8 0.000895504
+5 *51989:A *259:20 4.43871e-06
+6 *258:8 *261:16 0
+7 *51975:A2 *51989:A 0
+8 *51975:A2 *258:8 0
+9 *51975:B1 *51975:A1 4.82863e-05
+10 *51995:B *258:8 9.65676e-05
+11 *31:8 *51989:A 0.000139252
+12 *31:8 *258:8 0.000160651
+13 *207:7 *258:8 0.000279787
+14 *207:13 *258:8 4.20169e-05
+15 *207:19 *258:8 0.000146392
+*RES
+1 *51965:X *258:8 14.565 
+2 *258:8 *51975:A1 4.74 
+3 *258:8 *51989:A 5.235 
+*END
+
+*D_NET *259 0.00179636
+*CONN
+*I *51974:A I *D sky130_fd_sc_hd__nor2_1
+*I *51973:A I *D sky130_fd_sc_hd__nand2_1
+*I *51988:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51966:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51974:A 0.000170072
+2 *51973:A 0
+3 *51988:A 2.56379e-05
+4 *51966:Y 5.77622e-05
+5 *259:20 0.000354701
+6 *259:8 0.000268029
+7 *259:8 *261:16 9.71067e-05
+8 *259:8 *261:66 2.14129e-05
+9 *259:20 *261:23 0.00027299
+10 *259:20 *272:83 0
+11 *340:DIODE *259:8 0
+12 *51973:B *51974:A 7.46474e-05
+13 *51974:B *51974:A 8.40269e-05
+14 *51975:A2 *259:20 7.17811e-05
+15 *51976:B *51974:A 4.60584e-05
+16 *51988:B *51988:A 1.83756e-05
+17 *51988:B *259:20 4.01778e-05
+18 *51989:A *259:20 4.43871e-06
+19 *51989:B *259:20 0.000113255
+20 *31:8 *259:20 2.46007e-05
+21 *31:21 *259:20 5.12859e-05
+*RES
+1 *51966:Y *259:8 6.98 
+2 *259:8 *51988:A 2.05 
+3 *259:8 *259:20 9.265 
+4 *259:20 *51973:A 1.6 
+5 *259:20 *51974:A 4.84 
+*END
+
+*D_NET *260 0.000786511
+*CONN
+*I *51971:S I *D sky130_fd_sc_hd__mux2_1
+*I *51972:A2_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51967:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51971:S 0.000130185
+2 *51972:A2_N 3.38751e-05
+3 *51967:X 7.6387e-05
+4 *260:8 0.000240447
+5 *51971:S *51967:C 2.88436e-05
+6 *260:8 *51967:C 3.51211e-05
+7 *260:8 *272:188 2.9381e-05
+8 *260:8 *280:38 3.59531e-06
+9 *51967:D *51971:S 1.37895e-05
+10 *51967:D *260:8 1.88727e-05
+11 *51970:B *51972:A2_N 4.82863e-05
+12 *51971:A0 *51971:S 1.15688e-05
+13 *51972:A1_N *51971:S 0
+14 *31:8 *51971:S 0.000116158
+15 *55:10 *51971:S 0
+*RES
+1 *51967:X *260:8 4.92 
+2 *260:8 *51972:A2_N 4.05 
+3 *260:8 *51971:S 6.255 
+*END
+
+*D_NET *261 0.0547225
+*CONN
+*I *344:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *335:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *342:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51998:B1 I *D sky130_fd_sc_hd__o21ai_1
+*I *334:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51985:B I *D sky130_fd_sc_hd__and2_2
+*I *51987:A I *D sky130_fd_sc_hd__nand2_1
+*I *52002:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *52135:X O *D sky130_fd_sc_hd__clkbuf_4
+*CAP
+1 *344:DIODE 0
+2 *335:DIODE 0.00012858
+3 *342:DIODE 0
+4 *51998:B1 0
+5 *334:DIODE 0.000126342
+6 *51985:B 0.000220113
+7 *51987:A 0
+8 *52002:A1 0
+9 *52135:X 6.02813e-05
+10 *261:76 0.000568458
+11 *261:66 0.000523857
+12 *261:38 0.000398624
+13 *261:35 0.000438035
+14 *261:29 0.000538119
+15 *261:23 0.000965591
+16 *261:16 0.00150653
+17 *261:9 0.0236457
+18 *261:8 0.0228441
+19 *334:DIODE *52002:A2 0.00011964
+20 *51985:B *336:DIODE 0
+21 *261:16 *51967:C 0
+22 *261:16 *272:83 7.44453e-05
+23 *261:16 *279:12 0
+24 *261:16 *279:22 0
+25 *261:35 *52002:A2 9.66021e-05
+26 *261:66 *272:83 8.71001e-05
+27 *261:76 *330:DIODE 3.50033e-05
+28 *261:76 *272:83 0.000172248
+29 *340:DIODE *261:66 0
+30 *51972:B2 *261:16 0
+31 *51976:A *261:29 6.5525e-05
+32 *51978:A2 *261:29 9.60896e-05
+33 *51988:B *261:23 1.90662e-05
+34 *51989:B *261:23 1.61831e-05
+35 *51994:A *261:16 0
+36 *51994:B *261:16 0
+37 *51998:A2 *261:23 0.000237243
+38 *52002:B1 *261:29 8.65961e-05
+39 *52134:A *51985:B 1.22676e-05
+40 *7:7 *261:16 0
+41 *31:8 *261:16 0
+42 *35:6 *261:29 0.000113964
+43 *45:7 *51985:B 0.000207896
+44 *58:6 *261:29 0
+45 *60:10 *261:29 0.000291365
+46 *60:10 *261:38 0
+47 *66:8 *51985:B 0.000349598
+48 *207:32 *261:16 9.05377e-05
+49 *225:10 *261:29 5.72091e-05
+50 *225:15 *261:23 5.14364e-05
+51 *225:22 *261:23 8.65961e-05
+52 *225:28 *261:66 0
+53 *225:28 *261:76 0
+54 *258:8 *261:16 0
+55 *259:8 *261:16 9.71067e-05
+56 *259:8 *261:66 2.14129e-05
+57 *259:20 *261:23 0.00027299
+*RES
+1 *52135:X *261:8 6.47 
+2 *261:8 *261:9 250.23 
+3 *261:9 *261:16 15.92 
+4 *261:16 *261:23 11.795 
+5 *261:23 *261:29 12.985 
+6 *261:29 *52002:A1 1.6 
+7 *261:29 *261:35 1.83 
+8 *261:35 *261:38 4.91 
+9 *261:38 *51987:A 3.6 
+10 *261:38 *51985:B 9.315 
+11 *261:35 *334:DIODE 3.43 
+12 *261:23 *51998:B1 1.6 
+13 *261:16 *261:66 1.89 
+14 *261:66 *342:DIODE 3.6 
+15 *261:66 *261:76 9.71 
+16 *261:76 *335:DIODE 7.745 
+17 *261:76 *344:DIODE 1.6 
+*END
+
+*D_NET *262 0.0267887
+*CONN
+*I *51906:A I *D sky130_fd_sc_hd__and4_1
+*I *51893:A I *D sky130_fd_sc_hd__buf_2
+*I *51921:A I *D sky130_fd_sc_hd__and4_1
+*I *289:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *313:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *302:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *285:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51941:A I *D sky130_fd_sc_hd__and4_1
+*I *52136:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *51906:A 0
+2 *51893:A 7.54167e-05
+3 *51921:A 0
+4 *289:DIODE 0
+5 *313:DIODE 0.000151198
+6 *302:DIODE 0
+7 *285:DIODE 0.000169332
+8 *51941:A 9.71884e-06
+9 *52136:X 0.000108585
+10 *262:64 0.00026947
+11 *262:61 0.000676085
+12 *262:56 0.00134209
+13 *262:26 0.0011449
+14 *262:17 0.000240911
+15 *262:15 0.000253056
+16 *262:14 0.00040136
+17 *262:9 0.00400761
+18 *262:8 0.0038694
+19 *285:DIODE *304:DIODE 0
+20 *285:DIODE *278:34 0
+21 *285:DIODE *280:14 0
+22 *285:DIODE *281:11 9.96044e-05
+23 *285:DIODE *281:17 0.00011964
+24 *313:DIODE *304:DIODE 0
+25 *313:DIODE *272:52 0
+26 *313:DIODE *279:12 0.000130072
+27 *313:DIODE *279:22 3.50033e-05
+28 *51893:A *281:53 7.36562e-05
+29 *51893:A *281:63 0
+30 *51893:A *281:206 1.52184e-05
+31 *51941:A *51941:B 4.82919e-05
+32 *262:9 *263:9 0.00291132
+33 *262:9 *282:18 0.0010059
+34 *262:9 *284:9 0.00548402
+35 *262:14 *280:49 0.000155928
+36 *262:14 *281:63 8.09021e-06
+37 *262:15 *51906:C 3.57349e-05
+38 *262:15 *51921:B 1.12578e-05
+39 *262:15 *51921:C 4.66826e-05
+40 *262:15 *280:43 0.000239807
+41 *262:15 *281:63 0.000120655
+42 *262:17 *51921:C 2.75145e-05
+43 *262:26 *51921:C 0.000156622
+44 *262:26 *281:47 0.000497676
+45 *262:56 *51967:A 1.32824e-05
+46 *262:56 *51967:C 2.96334e-05
+47 *262:56 *51991:A1 0
+48 *262:56 *280:38 0.000374107
+49 *262:56 *281:29 0.000201503
+50 *262:56 *281:47 0
+51 *262:61 *279:12 3.67779e-05
+52 *262:61 *280:14 0
+53 *262:61 *281:17 4.82919e-05
+54 *262:61 *281:29 0.000531131
+55 *262:64 *280:17 0.000161529
+56 *262:64 *281:17 3.77036e-05
+57 *51923:B *262:14 0
+58 *51967:D *262:56 9.20028e-05
+59 *51968:B2 *262:26 2.59926e-05
+60 *51969:A *262:56 4.66108e-05
+61 *51969:B *262:26 6.57653e-06
+62 *51970:B *262:56 9.59856e-05
+63 *51990:A_N *262:56 8.49205e-05
+64 *51991:B2 *262:56 0
+65 *10:7 *262:8 0
+66 *28:15 *262:56 0.000187316
+67 *183:15 *262:26 8.99634e-06
+68 *189:31 *262:26 4.21973e-05
+69 *189:45 *262:26 0.000170045
+70 *189:45 *262:56 7.90356e-06
+71 *192:37 *262:56 0.000410867
+72 *203:13 *262:14 0
+73 *232:50 *51893:A 9.37731e-05
+74 *234:8 *51941:A 4.82919e-05
+75 *234:8 *262:56 9.14049e-05
+*RES
+1 *52136:X *262:8 7.235 
+2 *262:8 *262:9 102.225 
+3 *262:9 *262:14 7.93 
+4 *262:14 *262:15 3.555 
+5 *262:15 *262:17 0.45 
+6 *262:17 *262:26 8.36 
+7 *262:26 *51941:A 4.05 
+8 *262:26 *262:56 23.205 
+9 *262:56 *262:61 8.15 
+10 *262:61 *262:64 4.175 
+11 *262:64 *285:DIODE 9.065 
+12 *262:64 *302:DIODE 1.6 
+13 *262:61 *313:DIODE 7.02 
+14 *262:56 *289:DIODE 1.6 
+15 *262:17 *51921:A 1.6 
+16 *262:15 *51893:A 7.49 
+17 *262:14 *51906:A 1.6 
+*END
+
+*D_NET *263 0.0326208
+*CONN
+*I *51924:A I *D sky130_fd_sc_hd__nand2_1
+*I *286:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *307:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51899:A I *D sky130_fd_sc_hd__buf_2
+*I *52137:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *51924:A 1.88809e-05
+2 *286:DIODE 0
+3 *307:DIODE 0.000151786
+4 *51899:A 0
+5 *52137:X 5.53843e-05
+6 *263:42 0.00083762
+7 *263:30 0.0013087
+8 *263:12 0.000711384
+9 *263:9 0.00712819
+10 *263:8 0.00707617
+11 *307:DIODE *282:18 9.70988e-05
+12 *263:9 *282:18 0.000239807
+13 *263:9 *283:61 0.000701132
+14 *263:9 *284:9 0.00548067
+15 *263:12 *282:18 0
+16 *263:30 *282:18 0
+17 *263:42 *51921:C 0
+18 *263:42 *280:38 0.000233004
+19 *263:42 *281:53 9.14049e-05
+20 *263:42 *281:206 0.000193564
+21 *263:42 *282:18 0.00103393
+22 *398:DIODE *263:9 0.0010757
+23 *51924:B *51924:A 5.4155e-06
+24 *51926:A1_N *263:30 1.29068e-05
+25 *51926:A2_N *263:30 0.00037959
+26 *51926:A2_N *263:42 1.08758e-05
+27 *51926:B1 *263:30 0.000163199
+28 *51943:B *263:30 1.31227e-05
+29 *51968:A2 *263:42 0.000136349
+30 *51968:B1 *263:42 5.22918e-05
+31 *51968:B2 *263:42 6.36356e-05
+32 *51992:A1 *263:42 4.82863e-05
+33 *52149:A *263:9 0.000573674
+34 *11:7 *263:8 5.21046e-05
+35 *183:7 *263:42 9.27255e-06
+36 *183:15 *263:42 4.30297e-05
+37 *183:54 *263:12 1.0555e-05
+38 *183:54 *263:30 8.68314e-05
+39 *189:17 *263:42 0.000275553
+40 *189:89 *263:30 0
+41 *192:11 *263:30 0.000155847
+42 *199:20 *263:30 9.14049e-05
+43 *203:13 *263:30 6.07575e-06
+44 *203:24 *263:30 2.49909e-05
+45 *212:29 *263:42 0.000134938
+46 *212:41 *263:30 0.000411654
+47 *212:41 *263:42 4.35348e-05
+48 *212:54 *263:30 8.56054e-06
+49 *232:50 *263:42 0.000461349
+50 *262:9 *263:9 0.00291132
+*RES
+1 *52137:X *263:8 6.725 
+2 *263:8 *263:9 136.725 
+3 *263:9 *263:12 3.635 
+4 *263:12 *51899:A 3.6 
+5 *263:12 *263:30 15.08 
+6 *263:30 *263:42 24.655 
+7 *263:42 *307:DIODE 4.39 
+8 *263:42 *286:DIODE 1.6 
+9 *263:30 *51924:A 1.96 
+*END
+
+*D_NET *264 0.0335551
+*CONN
+*I *51920:A I *D sky130_fd_sc_hd__nand2_1
+*I *51940:A I *D sky130_fd_sc_hd__and2_1
+*I *312:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *295:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *301:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51914:A I *D sky130_fd_sc_hd__buf_2
+*I *52138:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51920:A 0
+2 *51940:A 1.88809e-05
+3 *312:DIODE 6.02813e-05
+4 *295:DIODE 0.000299838
+5 *301:DIODE 0
+6 *51914:A 7.44087e-05
+7 *52138:X 0.00056488
+8 *264:48 0.000596602
+9 *264:40 0.000325237
+10 *264:30 0.000280873
+11 *264:25 0.000645417
+12 *264:18 0.00186942
+13 *264:9 0.0133528
+14 *264:8 0.0125571
+15 *51914:A *292:DIODE 7.36562e-05
+16 *315:DIODE *295:DIODE 5.73739e-05
+17 *315:DIODE *264:40 0.00039046
+18 *315:DIODE *264:48 8.92483e-05
+19 *51915:A1 *264:9 2.52564e-05
+20 *51930:A *264:25 0.00017362
+21 *51930:B *264:18 0
+22 *51947:B *312:DIODE 0
+23 *51948:A *264:30 0.000143266
+24 *51948:B *264:40 0.000239813
+25 *52056:A1 *264:9 2.75145e-05
+26 *52059:A *264:9 4.82919e-05
+27 *52059:B *264:9 9.66021e-05
+28 *52090:A1 *264:9 3.00381e-05
+29 *52090:A2 *264:9 2.32597e-05
+30 *52093:B *264:9 0.00011577
+31 *52116:A1 *264:9 3.00381e-05
+32 *52116:A2 *264:9 2.32597e-05
+33 *52125:A *264:9 0.000321696
+34 *113:5 *264:9 0.000191454
+35 *146:5 *264:9 0.000197828
+36 *212:54 *264:18 0
+37 *212:66 *264:25 0
+38 *223:7 *264:25 3.45588e-05
+39 *232:50 *51914:A 0.000180682
+40 *232:50 *264:30 0.000163019
+41 *232:60 *51940:A 5.4155e-06
+42 *232:60 *264:25 0.000190016
+43 *232:60 *264:30 3.45679e-05
+44 *240:8 *264:30 2.65814e-06
+*RES
+1 *52138:X *264:8 14.885 
+2 *264:8 *264:9 169.845 
+3 *264:9 *264:18 5.73907 
+4 *264:18 *264:25 10.745 
+5 *264:25 *264:30 5.03 
+6 *264:30 *51914:A 5.745 
+7 *264:30 *264:40 5.555 
+8 *264:40 *301:DIODE 1.6 
+9 *264:40 *264:48 3.39 
+10 *264:48 *295:DIODE 5.155 
+11 *264:48 *312:DIODE 6.47 
+12 *264:25 *51940:A 1.96 
+13 *264:18 *51920:A 3.6 
+*END
+
+*D_NET *265 0.0487406
+*CONN
+*I *51950:A I *D sky130_fd_sc_hd__nand2_1
+*I *51932:A I *D sky130_fd_sc_hd__buf_2
+*I *308:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *322:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51964:A I *D sky130_fd_sc_hd__nand2_1
+*I *317:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52139:X O *D sky130_fd_sc_hd__clkbuf_4
+*CAP
+1 *51950:A 5.96502e-06
+2 *51932:A 0.000121403
+3 *308:DIODE 7.89e-05
+4 *322:DIODE 2.19213e-05
+5 *51964:A 0
+6 *317:DIODE 4.45185e-05
+7 *52139:X 0.000882664
+8 *265:57 0.000330068
+9 *265:45 0.000273783
+10 *265:41 0.000432007
+11 *265:31 0.000741907
+12 *265:26 0.00222647
+13 *265:13 0.00526866
+14 *265:11 0.00350028
+15 *265:9 0.0104619
+16 *265:8 0.0113237
+17 *317:DIODE *272:108 2.75145e-05
+18 *322:DIODE *272:92 0.000124895
+19 *265:9 *268:9 0.0053856
+20 *265:13 *266:50 0.000391354
+21 *265:13 *268:9 0.00141254
+22 *265:41 *272:100 1.03423e-05
+23 *265:41 *272:108 0.000393024
+24 *265:45 *272:100 1.57478e-05
+25 *265:57 *272:92 0.000163204
+26 *265:57 *272:100 0.000622287
+27 *51933:A1 *265:26 0.000281374
+28 *51933:A2 *265:26 1.20411e-05
+29 *51934:B1 *265:26 8.96017e-05
+30 *51951:A *265:31 0.0001249
+31 *51951:B *265:31 3.45588e-05
+32 *51953:A *265:26 4.77757e-05
+33 *51954:B *265:26 1.22762e-05
+34 *51976:A *265:45 1.16578e-05
+35 *51976:A *265:57 1.12578e-05
+36 *51977:C *265:57 2.73883e-05
+37 *51978:B1_N *51932:A 4.43871e-06
+38 *51978:B1_N *265:57 0.000251215
+39 *52001:B *265:57 4.82919e-05
+40 *52025:A *265:13 4.60584e-05
+41 *52025:B *265:13 0.000239813
+42 *52026:B *265:13 0.000389572
+43 *52061:A *265:13 8.65961e-05
+44 *52095:A1 *265:13 8.40269e-05
+45 *35:6 *51932:A 0
+46 *58:6 *308:DIODE 0
+47 *60:10 *265:57 4.66108e-05
+48 *118:7 *265:13 5.82176e-05
+49 *119:9 *265:13 0.000228124
+50 *203:94 *265:13 0.000123225
+51 *211:8 *265:26 0.000462524
+52 *212:66 *265:26 0.000314745
+53 *225:10 *51932:A 3.00381e-05
+54 *225:23 *322:DIODE 5.34747e-05
+55 *225:23 *265:57 2.96334e-05
+56 *225:58 *265:26 4.9253e-06
+57 *225:64 *265:26 0.000226108
+58 *225:72 *265:26 4.15081e-05
+59 *225:92 *265:13 7.77494e-05
+60 *225:92 *265:26 0.000230797
+61 *225:100 *265:13 0.000142138
+62 *227:8 *265:26 8.65905e-05
+63 *232:60 *265:26 7.17811e-05
+64 *242:5 *265:31 0.000278111
+65 *243:5 *51950:A 3.10739e-06
+66 *243:5 *265:31 7.79289e-05
+67 *244:10 *265:31 1.33293e-05
+68 *246:11 *265:26 4.89295e-05
+69 *256:8 *51932:A 2.75145e-05
+*RES
+1 *52139:X *265:8 20.24 
+2 *265:8 *265:9 140.003 
+3 *265:9 *265:11 0.36 
+4 *265:11 *265:13 62.205 
+5 *265:13 *265:26 31.9225 
+6 *265:26 *265:31 7.725 
+7 *265:31 *317:DIODE 2.395 
+8 *265:31 *265:41 5.115 
+9 *265:41 *265:45 0.81 
+10 *265:45 *51964:A 1.6 
+11 *265:45 *265:57 8.865 
+12 *265:57 *322:DIODE 2.74 
+13 *265:57 *308:DIODE 6.725 
+14 *265:41 *51932:A 7.685 
+15 *265:26 *51950:A 1.735 
+*END
+
+*D_NET *266 0.0524577
+*CONN
+*I *366:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52089:A I *D sky130_fd_sc_hd__nand2_1
+*I *383:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52061:B I *D sky130_fd_sc_hd__nand2_1
+*I *350:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52027:B I *D sky130_fd_sc_hd__nand2_1
+*I *318:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51956:C1 I *D sky130_fd_sc_hd__o211a_1
+*I *51957:A2 I *D sky130_fd_sc_hd__a211o_1
+*I *321:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51962:B I *D sky130_fd_sc_hd__nand2_2
+*I *52002:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52000:A I *D sky130_fd_sc_hd__nand2_1
+*I *345:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *343:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *319:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *359:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52120:A I *D sky130_fd_sc_hd__nand2_1
+*I *52140:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *366:DIODE 0.000258618
+2 *52089:A 0
+3 *383:DIODE 0
+4 *52061:B 0
+5 *350:DIODE 0
+6 *52027:B 2.08101e-05
+7 *318:DIODE 0
+8 *51956:C1 0.000182165
+9 *51957:A2 0
+10 *321:DIODE 0
+11 *51962:B 0
+12 *52002:A2 0.000309531
+13 *52000:A 2.08101e-05
+14 *345:DIODE 7.52551e-05
+15 *343:DIODE 8.36417e-05
+16 *319:DIODE 0.000146243
+17 *359:DIODE 0
+18 *52120:A 8.06797e-05
+19 *52140:X 0.000243463
+20 *266:128 0.00035985
+21 *266:103 0.000338495
+22 *266:101 0.000747623
+23 *266:99 0.000628367
+24 *266:97 0.000707444
+25 *266:86 0.000974279
+26 *266:80 0.000189149
+27 *266:78 0.000348777
+28 *266:74 0.000626138
+29 *266:72 0.00113684
+30 *266:64 0.00227554
+31 *266:50 0.00192979
+32 *266:40 0.000591545
+33 *266:31 0.000418831
+34 *266:29 9.39185e-05
+35 *266:27 0.000513616
+36 *266:12 0.00080505
+37 *266:9 0.0155969
+38 *266:8 0.0157332
+39 *366:DIODE *267:39 0
+40 *52120:A *281:134 0.000201508
+41 *266:9 *267:19 0.00038879
+42 *266:27 *52089:B 1.90686e-05
+43 *266:27 *281:134 6.13333e-05
+44 *266:27 *281:142 0.000186228
+45 *266:29 *281:134 0.000191521
+46 *266:31 *281:134 3.83041e-05
+47 *266:128 *272:118 7.71016e-05
+48 *334:DIODE *52002:A2 0.00011964
+49 *358:DIODE *266:64 5.43869e-05
+50 *51918:B *266:64 4.82919e-05
+51 *51918:B *266:72 0.000139245
+52 *51954:B *266:97 0.000142661
+53 *51956:A1 *51956:C1 9.08126e-05
+54 *51956:A1 *266:80 4.89295e-05
+55 *51956:A1 *266:86 1.05984e-05
+56 *51956:A2 *51956:C1 4.89295e-05
+57 *51957:A1 *266:86 0.000178111
+58 *51960:A *319:DIODE 6.23375e-05
+59 *51960:A *266:97 9.3062e-06
+60 *51960:B *266:97 0
+61 *51978:A2 *266:101 0.000163204
+62 *52002:B1 *345:DIODE 0
+63 *52022:B1 *266:64 0.00026163
+64 *52028:A1 *266:74 6.97034e-05
+65 *52028:B1_N *266:74 0.000198378
+66 *52029:A *266:72 4.82863e-05
+67 *52032:A *266:72 0
+68 *52033:A_N *266:74 4.82863e-05
+69 *52033:B *266:74 3.70009e-05
+70 *52033:C *266:74 4.82863e-05
+71 *52058:A *266:64 5.0751e-05
+72 *52062:A2 *266:64 0.000122331
+73 *52067:A1 *52027:B 0
+74 *52067:A1 *266:72 0
+75 *52090:B1_N *266:64 6.6564e-05
+76 *52091:B *266:40 2.75451e-05
+77 *52093:A *266:40 0
+78 *52093:B *266:40 7.63204e-05
+79 *52094:B *266:40 0
+80 *52094:B *266:50 0
+81 *52097:A *266:50 2.97004e-06
+82 *52097:B *266:50 0
+83 *52116:A1 *266:40 0
+84 *52124:A *366:DIODE 2.07184e-05
+85 *52124:A *266:12 0.000203762
+86 *52124:A *266:27 4.82863e-05
+87 *52125:B *366:DIODE 7.06865e-05
+88 *52125:B *266:27 1.19928e-05
+89 *37:10 *266:101 0.000433003
+90 *37:10 *266:128 0.000116853
+91 *59:8 *345:DIODE 0
+92 *59:8 *266:101 1.16578e-05
+93 *59:8 *266:103 8.8266e-05
+94 *80:5 *266:64 0.000433003
+95 *81:7 *266:64 0.00019637
+96 *82:8 *266:64 2.16917e-05
+97 *85:5 *266:72 0.000238919
+98 *86:5 *266:72 1.12578e-05
+99 *86:5 *266:74 0.000145184
+100 *87:11 *266:72 0
+101 *88:8 *266:72 0
+102 *91:8 *266:74 0.000356395
+103 *115:9 *266:64 0.000172862
+104 *144:8 *266:40 0
+105 *145:6 *266:40 0
+106 *150:9 *266:50 0
+107 *203:85 *266:64 0
+108 *212:87 *266:72 0
+109 *212:99 *266:72 0
+110 *232:60 *319:DIODE 0
+111 *232:74 *266:86 4.82919e-05
+112 *232:74 *266:97 6.91499e-05
+113 *232:80 *51956:C1 4.77719e-05
+114 *232:80 *266:97 5.23362e-05
+115 *244:10 *319:DIODE 4.2857e-05
+116 *246:11 *319:DIODE 0
+117 *247:7 *266:97 6.05513e-05
+118 *248:8 *319:DIODE 5.20968e-05
+119 *248:8 *266:97 1.07797e-05
+120 *248:17 *51956:C1 0
+121 *250:9 *266:74 5.88817e-05
+122 *250:9 *266:78 0.000160849
+123 *250:9 *266:80 6.69608e-06
+124 *255:10 *52002:A2 3.64998e-06
+125 *261:35 *52002:A2 9.66021e-05
+126 *265:13 *266:50 0.000391354
+*RES
+1 *52140:X *266:8 9.53 
+2 *266:8 *266:9 215.73 
+3 *266:9 *266:12 4.4 
+4 *266:12 *266:27 10.055 
+5 *266:27 *266:29 1.83 
+6 *266:29 *266:31 0.45 
+7 *266:31 *52120:A 3.43 
+8 *266:31 *266:40 7.46 
+9 *266:40 *359:DIODE 3.6 
+10 *266:40 *266:50 8.465 
+11 *266:50 *266:64 27.625 
+12 *266:64 *266:72 13.705 
+13 *266:72 *266:74 11.145 
+14 *266:74 *266:78 2.88 
+15 *266:78 *266:80 0.795 
+16 *266:80 *266:86 4.79 
+17 *266:86 *319:DIODE 6.765 
+18 *266:86 *266:97 12.635 
+19 *266:97 *266:99 0.45 
+20 *266:99 *266:101 9.765 
+21 *266:101 *266:103 2.865 
+22 *266:103 *343:DIODE 2.74 
+23 *266:103 *345:DIODE 6.725 
+24 *266:101 *52000:A 1.96 
+25 *266:99 *266:128 5.635 
+26 *266:128 *52002:A2 7.225 
+27 *266:128 *51962:B 1.6 
+28 *266:97 *321:DIODE 1.6 
+29 *266:80 *51957:A2 1.6 
+30 *266:78 *51956:C1 8.495 
+31 *266:74 *318:DIODE 1.6 
+32 *266:72 *52027:B 1.96 
+33 *266:64 *350:DIODE 1.6 
+34 *266:50 *52061:B 1.6 
+35 *266:29 *383:DIODE 1.6 
+36 *266:27 *52089:A 1.6 
+37 *266:12 *366:DIODE 7.065 
+*END
+
+*D_NET *267 0.0561847
+*CONN
+*I *380:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *371:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *368:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52111:A I *D sky130_fd_sc_hd__and3_1
+*I *360:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52068:A I *D sky130_fd_sc_hd__nand2_1
+*I *352:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *351:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52034:B1 I *D sky130_fd_sc_hd__o211ai_1
+*I *52035:A1 I *D sky130_fd_sc_hd__a211o_1
+*I *331:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *336:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51987:B I *D sky130_fd_sc_hd__nand2_1
+*I *51982:A I *D sky130_fd_sc_hd__and2_1
+*I *52096:A I *D sky130_fd_sc_hd__nand2_1
+*I *52117:A I *D sky130_fd_sc_hd__nand4_1
+*I *52118:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *377:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52141:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *380:DIODE 0
+2 *371:DIODE 0.000312936
+3 *368:DIODE 0.000194042
+4 *52111:A 0
+5 *360:DIODE 0
+6 *52068:A 2.08101e-05
+7 *352:DIODE 0
+8 *351:DIODE 0
+9 *52034:B1 1.20928e-05
+10 *52035:A1 1.71692e-05
+11 *331:DIODE 0
+12 *336:DIODE 0.00031697
+13 *51987:B 0.000108917
+14 *51982:A 1.92299e-05
+15 *52096:A 0
+16 *52117:A 0.00017061
+17 *52118:A1 8.10297e-05
+18 *377:DIODE 0.000169062
+19 *52141:X 0
+20 *267:104 0.00159319
+21 *267:94 0.00135217
+22 *267:92 0.000699406
+23 *267:90 0.000679062
+24 *267:85 0.00047165
+25 *267:78 0.000675175
+26 *267:72 0.000827135
+27 *267:64 0.000657763
+28 *267:62 0.000996769
+29 *267:50 0.00098977
+30 *267:46 0.000175045
+31 *267:43 0.000456596
+32 *267:39 0.00123249
+33 *267:27 0.000856096
+34 *267:19 0.000301926
+35 *267:16 0.00043765
+36 *267:5 0.0171107
+37 *267:4 0.0167249
+38 *336:DIODE *51985:A 0
+39 *51982:A *272:130 5.12969e-06
+40 *52117:A *281:152 0
+41 *267:39 *281:145 0
+42 *267:39 *281:152 0
+43 *267:72 *52101:A 3.25997e-05
+44 *267:78 *52101:A 0
+45 *267:78 *268:66 5.4256e-05
+46 *267:92 *272:142 0.000151541
+47 *267:94 *272:130 2.33708e-05
+48 *267:94 *272:142 0.000275126
+49 *267:104 *272:130 7.43356e-05
+50 *349:DIODE *267:62 1.4389e-05
+51 *366:DIODE *267:39 0
+52 *378:DIODE *267:16 0
+53 *384:DIODE *267:5 4.70919e-05
+54 *385:DIODE *267:5 9.66021e-05
+55 *386:DIODE *267:5 0.000163199
+56 *387:DIODE *267:5 0.000119631
+57 *388:DIODE *267:5 0.000163199
+58 *399:DIODE *267:16 0.000118527
+59 *51979:A *267:104 0.000433003
+60 *51979:B *267:104 1.03423e-05
+61 *51981:B1_N *267:104 1.47256e-05
+62 *51985:B *336:DIODE 0
+63 *52034:A1 *52035:A1 4.00541e-06
+64 *52034:A1 *267:90 0.000258832
+65 *52034:A1 *267:92 5.30673e-05
+66 *52034:A2 *267:90 2.29156e-05
+67 *52034:C1 *52034:B1 1.08758e-05
+68 *52034:C1 *267:90 4.00541e-06
+69 *52035:B1 *52035:A1 5.4155e-06
+70 *52036:C *267:85 0
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+72 *52037:A2 *267:90 0.000167389
+73 *52038:A *267:85 0.000155928
+74 *52038:B *267:78 0
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+78 *52072:A1 *267:85 0.000118081
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+81 *52073:A *267:78 9.54399e-05
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+91 *52124:B *267:39 6.65066e-05
+92 *52125:B *267:39 0
+93 *52134:A *336:DIODE 0
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+95 *52137:A *267:5 7.35813e-05
+96 *52138:A *267:5 4.82919e-05
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+102 *38:7 *267:104 6.77162e-05
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+105 *124:11 *267:72 0.000164457
+106 *125:9 *267:72 1.01661e-05
+107 *129:5 *267:78 0.000161829
+108 *129:5 *267:85 0.000244253
+109 *148:8 *267:39 0
+110 *153:9 *267:39 0
+111 *153:9 *267:43 1.83756e-05
+112 *154:5 *368:DIODE 0.000103449
+113 *154:5 *267:39 0
+114 *154:5 *267:43 6.95418e-05
+115 *157:12 *267:72 5.43769e-05
+116 *167:11 *267:43 0.000237249
+117 *173:5 *52118:A1 0.000124895
+118 *173:5 *267:19 6.1357e-05
+119 *176:7 *52117:A 0.000199833
+120 *180:10 *267:39 0.000294124
+121 *203:125 *267:62 0.000526509
+122 *203:131 *267:50 0.000277223
+123 *203:131 *267:62 3.28565e-05
+124 *203:137 *267:46 1.03323e-05
+125 *203:137 *267:50 3.23663e-05
+126 *212:99 *267:72 0.000168213
+127 *225:146 *52118:A1 0.000132968
+128 *225:146 *267:19 0.000421961
+129 *232:98 *52034:B1 1.46744e-05
+130 *232:98 *267:90 2.30292e-05
+131 *249:28 *267:92 0.0003691
+132 *266:9 *267:19 0.00038879
+*RES
+1 *52141:X *267:4 1.6 
+2 *267:4 *267:5 256.785 
+3 *267:5 *377:DIODE 4.12 
+4 *267:5 *267:16 7.93 
+5 *267:16 *267:19 6.33 
+6 *267:19 *52118:A1 3.775 
+7 *267:19 *267:27 2 
+8 *267:27 *52117:A 7.065 
+9 *267:27 *267:39 15.11 
+10 *267:39 *267:43 6.665 
+11 *267:43 *267:46 2.45 
+12 *267:46 *267:50 3.57 
+13 *267:50 *52096:A 1.6 
+14 *267:50 *267:62 13.605 
+15 *267:62 *267:64 2.175 
+16 *267:64 *267:72 11.785 
+17 *267:72 *267:78 9.685 
+18 *267:78 *267:85 10.135 
+19 *267:85 *267:90 4.275 
+20 *267:90 *267:92 9.42 
+21 *267:92 *267:94 3.21 
+22 *267:94 *51982:A 1.96 
+23 *267:94 *267:104 14.61 
+24 *267:104 *51987:B 3.01 
+25 *267:104 *336:DIODE 10.55 
+26 *267:92 *331:DIODE 1.6 
+27 *267:90 *52035:A1 1.96 
+28 *267:85 *52034:B1 2.05 
+29 *267:78 *351:DIODE 1.6 
+30 *267:72 *352:DIODE 1.6 
+31 *267:64 *52068:A 1.96 
+32 *267:62 *360:DIODE 1.6 
+33 *267:46 *52111:A 1.6 
+34 *267:43 *368:DIODE 6.765 
+35 *267:39 *371:DIODE 5.86 
+36 *267:16 *380:DIODE 1.6 
+*END
+
+*D_NET *268 0.0626303
+*CONN
+*I *373:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52113:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52114:A I *D sky130_fd_sc_hd__and3_1
+*I *361:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *370:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52101:A I *D sky130_fd_sc_hd__nand2_1
+*I *52071:A I *D sky130_fd_sc_hd__and2_1
+*I *353:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52041:A I *D sky130_fd_sc_hd__and2_1
+*I *333:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51985:A I *D sky130_fd_sc_hd__and2_2
+*I *375:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52142:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *373:DIODE 0.000169304
+2 *52113:A1 0
+3 *52114:A 0
+4 *361:DIODE 0
+5 *370:DIODE 0
+6 *52101:A 0.0001259
+7 *52071:A 0
+8 *353:DIODE 0
+9 *52041:A 0
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+26 *268:8 0.0192535
+27 *51985:A *271:5 8.65961e-05
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+30 *268:78 *271:5 0.000349282
+31 *268:78 *273:11 0.000208767
+32 *336:DIODE *51985:A 0
+33 *369:DIODE *268:48 0.00058455
+34 *374:DIODE *268:21 7.21296e-06
+35 *390:DIODE *268:8 4.91189e-05
+36 *52009:A *268:78 4.23245e-05
+37 *52037:B1 *268:60 0
+38 *52038:A *268:66 6.97202e-05
+39 *52038:B *268:66 0.000119631
+40 *52040:A2 *268:70 0
+41 *52040:A2 *268:78 0.000237243
+42 *52044:B *51985:A 0
+43 *52046:B *268:66 1.70935e-05
+44 *52048:A1 *268:66 0.000268129
+45 *52048:A1 *268:70 4.82919e-05
+46 *52048:A2 *268:66 8.65961e-05
+47 *52068:B *52101:A 5.53249e-06
+48 *52071:B *268:60 7.11153e-05
+49 *52073:A *268:66 0
+50 *52079:A *268:60 0.000235867
+51 *52080:B1 *268:48 2.0248e-05
+52 *52080:B1 *268:50 0.000118207
+53 *52080:B1 *268:52 8.31173e-05
+54 *52080:B1 *268:60 3.45588e-05
+55 *52100:B *268:48 8.8266e-05
+56 *52103:A *268:48 0.0001138
+57 *52103:C *268:48 0.000316421
+58 *52113:A2 *268:21 2.24912e-05
+59 *52113:B1 *268:24 5.4155e-06
+60 *52113:B1 *268:28 0.000153338
+61 *52115:A *373:DIODE 3.23663e-05
+62 *52115:B *373:DIODE 6.77501e-05
+63 *52115:B *268:24 6.1357e-05
+64 *52115:B *268:28 0.000275548
+65 *52126:A *268:48 0.000359126
+66 *43:11 *268:78 0.000228149
+67 *66:8 *51985:A 0
+68 *98:7 *268:70 5.5626e-05
+69 *98:7 *268:78 0.000423637
+70 *99:7 *268:66 3.77036e-05
+71 *99:7 *268:70 9.07709e-05
+72 *101:8 *268:66 0
+73 *105:7 *268:66 0.000167451
+74 *123:8 *268:48 0
+75 *126:7 *268:48 7.8192e-05
+76 *154:5 *268:48 0
+77 *156:5 *268:48 5.5626e-05
+78 *157:12 *268:48 0.000505372
+79 *167:11 *268:28 5.00635e-05
+80 *167:11 *268:48 0.00010112
+81 *170:13 *373:DIODE 0.000163204
+82 *170:13 *268:24 0.000123225
+83 *170:13 *268:28 2.16833e-05
+84 *180:10 *268:48 9.14049e-05
+85 *203:137 *268:28 3.64998e-06
+86 *203:137 *268:48 2.04648e-05
+87 *203:147 *268:28 3.45679e-05
+88 *203:156 *268:21 1.08194e-05
+89 *203:156 *268:28 3.23663e-05
+90 *265:9 *268:9 0.0053856
+91 *265:13 *268:9 0.00141254
+92 *267:72 *52101:A 3.25997e-05
+93 *267:78 *52101:A 0
+94 *267:78 *268:66 5.4256e-05
+*RES
+1 *52142:X *268:8 19.475 
+2 *268:8 *268:9 296.115 
+3 *268:9 *268:12 5.165 
+4 *268:12 *375:DIODE 3.6 
+5 *268:12 *268:21 3.89 
+6 *268:21 *268:24 1.5 
+7 *268:24 *268:28 4.26 
+8 *268:28 *268:48 31.73 
+9 *268:48 *268:50 2.52 
+10 *268:50 *268:52 1.83 
+11 *268:52 *268:60 5.325 
+12 *268:60 *268:66 23.44 
+13 *268:66 *268:70 3.57 
+14 *268:70 *268:78 18.18 
+15 *268:78 *51985:A 10.07 
+16 *268:78 *333:DIODE 1.6 
+17 *268:70 *52041:A 1.6 
+18 *268:66 *353:DIODE 1.6 
+19 *268:60 *52071:A 1.6 
+20 *268:52 *52101:A 7.745 
+21 *268:50 *370:DIODE 1.6 
+22 *268:48 *361:DIODE 1.6 
+23 *268:28 *52114:A 1.6 
+24 *268:24 *52113:A1 1.6 
+25 *268:21 *373:DIODE 5.155 
+*END
+
+*D_NET *269 0.0815466
+*CONN
+*I *52151:A I *D sky130_fd_sc_hd__buf_2
+*I *400:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52132:X O *D sky130_fd_sc_hd__buf_6
+*CAP
+1 *52151:A 0.000196602
+2 *400:DIODE 0
+3 *52132:X 0
+4 *269:14 0.000289358
+5 *269:9 0.0117887
+6 *269:8 0.011696
+7 *269:6 0.0239347
+8 *269:5 0.0239347
+9 *269:9 *270:9 0.00970662
+*RES
+1 *52132:X *269:5 3.6 
+2 *269:5 *269:6 401.73 
+3 *269:6 *269:8 2 
+4 *269:8 *269:9 231.255 
+5 *269:9 *269:14 5.38 
+6 *269:14 *400:DIODE 1.6 
+7 *269:14 *52151:A 4.645 
+*END
+
+*D_NET *270 0.0803993
+*CONN
+*I *52152:A I *D sky130_fd_sc_hd__buf_2
+*I *401:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52134:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52152:A 0.00026652
+2 *401:DIODE 0
+3 *52134:Y 0
+4 *270:15 0.000474294
+5 *270:9 0.0110873
+6 *270:8 0.0108796
+7 *270:6 0.0239925
+8 *270:5 0.0239925
+9 *52132:A *270:6 0
+10 *52133:A *270:6 0
+11 *269:9 *270:9 0.00970662
+*RES
+1 *52134:Y *270:5 3.6 
+2 *270:5 *270:6 402.75 
+3 *270:6 *270:8 2 
+4 *270:8 *270:9 151.215 
+5 *270:9 *270:15 6.355 
+6 *270:15 *401:DIODE 1.6 
+7 *270:15 *52152:A 5.68 
+*END
+
+*D_NET *271 0.0601759
+*CONN
+*I *52153:A I *D sky130_fd_sc_hd__buf_2
+*I *402:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52009:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52153:A 0.000174842
+2 *402:DIODE 0
+3 *52009:X 0.00573178
+4 *271:8 0.0241141
+5 *271:7 0.0239392
+6 *271:5 0.00573178
+7 p[2] *52153:A 0
+8 *51985:A *271:5 8.65961e-05
+9 *52133:A *271:5 4.82919e-05
+10 *268:78 *271:5 0.000349282
+*RES
+1 *52009:X *271:5 81.1275 
+2 *271:5 *271:7 2 
+3 *271:7 *271:8 401.73 
+4 *271:8 *402:DIODE 3.6 
+5 *271:8 *52153:A 6.3 
+*END
+
+*D_NET *272 0.0576545
+*CONN
+*I *51970:A I *D sky130_fd_sc_hd__nand2_1
+*I *51991:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *51967:A I *D sky130_fd_sc_hd__and4_1
+*I *337:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *330:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *332:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *354:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52041:B I *D sky130_fd_sc_hd__and2_1
+*I *51982:B I *D sky130_fd_sc_hd__and2_1
+*I *51962:A I *D sky130_fd_sc_hd__nand2_2
+*I *320:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51964:B I *D sky130_fd_sc_hd__nand2_1
+*I *51977:B I *D sky130_fd_sc_hd__and3_1
+*I *323:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51966:B I *D sky130_fd_sc_hd__nand2_1
+*I *325:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *328:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *326:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52143:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *51970:A 0
+2 *51991:A1 0.000391924
+3 *51967:A 2.64431e-05
+4 *337:DIODE 0
+5 *330:DIODE 4.30216e-05
+6 *332:DIODE 7.33597e-05
+7 *354:DIODE 0.000192176
+8 *52041:B 0
+9 *51982:B 0
+10 *51962:A 0
+11 *320:DIODE 0.000136714
+12 *51964:B 0
+13 *51977:B 0
+14 *323:DIODE 0
+15 *51966:B 0
+16 *325:DIODE 3.61979e-05
+17 *328:DIODE 0
+18 *326:DIODE 0
+19 *52143:X 0
+20 *272:188 0.00122481
+21 *272:178 0.00112055
+22 *272:145 0.000355006
+23 *272:142 0.000623866
+24 *272:130 0.00141161
+25 *272:118 0.00125877
+26 *272:108 0.00050001
+27 *272:100 0.000723123
+28 *272:92 0.000926276
+29 *272:86 0.00042115
+30 *272:83 0.0004519
+31 *272:74 0.000725044
+32 *272:65 0.000558366
+33 *272:56 0.000369198
+34 *272:52 0.000428898
+35 *272:47 0.000686569
+36 *272:41 0.00213804
+37 *272:34 0.00412198
+38 *272:24 0.00431962
+39 *272:5 0.00730018
+40 *272:4 0.0051608
+41 *51991:A1 *280:38 2.0514e-05
+42 *272:5 *278:7 0.00129706
+43 *272:5 *278:9 0.00175282
+44 *272:24 *278:9 0.00436925
+45 *272:34 *278:9 0.00449157
+46 *272:34 *279:5 2.05056e-05
+47 *272:41 *278:24 0.00385525
+48 *272:41 *278:34 0.000230474
+49 *272:41 *278:37 0
+50 *272:41 *279:5 2.0514e-05
+51 *272:47 *278:34 0.000112622
+52 *272:52 *278:37 0
+53 *272:52 *278:47 0
+54 *272:56 *278:47 7.23533e-05
+55 *272:188 *51967:C 6.08134e-05
+56 *313:DIODE *272:52 0
+57 *317:DIODE *272:108 2.75145e-05
+58 *322:DIODE *272:92 0.000124895
+59 *324:DIODE *272:74 0.000469632
+60 *393:DIODE *272:5 0.000163199
+61 *395:DIODE *272:24 1.83975e-05
+62 *396:DIODE *272:34 0.00012657
+63 *51949:B1 *320:DIODE 0
+64 *51958:B_N *272:142 4.43871e-06
+65 *51967:B *51991:A1 8.65905e-05
+66 *51970:B *272:188 0.000369048
+67 *51971:A0 *272:188 1.17309e-05
+68 *51975:A2 *272:83 0.00011067
+69 *51977:C *272:83 0
+70 *51979:A *272:130 5.33172e-05
+71 *51979:B *272:130 0.000237249
+72 *51981:B1_N *272:118 0
+73 *51981:B1_N *272:130 0
+74 *51982:A *272:130 5.12969e-06
+75 *51991:B1 *51991:A1 4.82863e-05
+76 *51991:B2 *51967:A 2.00134e-05
+77 *52040:A1 *354:DIODE 0
+78 *52040:A1 *272:145 4.44927e-05
+79 *52040:A2 *272:145 5.84984e-05
+80 *52048:A1 *354:DIODE 0
+81 *52048:A1 *272:145 0
+82 *52144:A *272:5 3.74161e-05
+83 *52145:A *272:5 0.000278117
+84 *52146:A *272:24 4.77757e-05
+85 *37:10 *272:130 2.54523e-05
+86 *38:7 *272:130 0.000201508
+87 *40:8 *272:142 0
+88 *42:6 *272:145 7.96171e-05
+89 *51:8 *51991:A1 8.41703e-06
+90 *103:5 *354:DIODE 0.000124895
+91 *225:23 *272:86 4.10576e-05
+92 *225:23 *272:92 7.5919e-05
+93 *225:58 *320:DIODE 5.34747e-05
+94 *252:8 *272:142 0
+95 *252:8 *272:145 0.000257005
+96 *255:10 *272:130 7.23602e-05
+97 *256:8 *320:DIODE 0.000124895
+98 *259:20 *272:83 0
+99 *260:8 *272:188 2.9381e-05
+100 *261:16 *272:83 7.44453e-05
+101 *261:66 *272:83 8.71001e-05
+102 *261:76 *330:DIODE 3.50033e-05
+103 *261:76 *272:83 0.000172248
+104 *262:56 *51967:A 1.32824e-05
+105 *262:56 *51991:A1 0
+106 *265:41 *272:100 1.03423e-05
+107 *265:41 *272:108 0.000393024
+108 *265:45 *272:100 1.57478e-05
+109 *265:57 *272:92 0.000163204
+110 *265:57 *272:100 0.000622287
+111 *266:128 *272:118 7.71016e-05
+112 *267:92 *272:142 0.000151541
+113 *267:94 *272:130 2.33708e-05
+114 *267:94 *272:142 0.000275126
+115 *267:104 *272:130 7.43356e-05
+*RES
+1 *52143:X *272:4 1.6 
+2 *272:4 *272:5 85.32 
+3 *272:5 *272:24 49.955 
+4 *272:24 *272:34 46.765 
+5 *272:34 *272:41 43.495 
+6 *272:41 *326:DIODE 1.6 
+7 *272:41 *272:47 3.555 
+8 *272:47 *272:52 6.91 
+9 *272:52 *272:56 5.63 
+10 *272:56 *328:DIODE 3.6 
+11 *272:56 *272:65 3.89 
+12 *272:65 *325:DIODE 2.05 
+13 *272:65 *272:74 7.02 
+14 *272:74 *51966:B 1.6 
+15 *272:74 *272:83 9.53 
+16 *272:83 *272:86 3.14 
+17 *272:86 *323:DIODE 1.6 
+18 *272:86 *272:92 4.59 
+19 *272:92 *51977:B 1.6 
+20 *272:92 *272:100 8.22 
+21 *272:100 *51964:B 1.6 
+22 *272:100 *272:108 5.555 
+23 *272:108 *320:DIODE 6.375 
+24 *272:108 *272:118 4.185 
+25 *272:118 *51962:A 3.6 
+26 *272:118 *272:130 15.995 
+27 *272:130 *51982:B 1.6 
+28 *272:130 *272:142 10.765 
+29 *272:142 *272:145 6.695 
+30 *272:145 *52041:B 3.6 
+31 *272:145 *354:DIODE 6.375 
+32 *272:142 *332:DIODE 2.395 
+33 *272:83 *330:DIODE 4.47 
+34 *272:52 *337:DIODE 1.6 
+35 *272:47 *272:178 4.59 
+36 *272:178 *272:188 8.3199 
+37 *272:188 *51967:A 4.5875 
+38 *272:188 *51991:A1 5.67723 
+39 *272:178 *51970:A 1.6 
+*END
+
+*D_NET *273 0.053727
+*CONN
+*I *403:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52154:A I *D sky130_fd_sc_hd__buf_2
+*I *52046:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *403:DIODE 0.000125295
+2 *52154:A 0
+3 *52046:Y 0.0017582
+4 *273:14 0.000125295
+5 *273:12 0.0239069
+6 *273:11 0.0256651
+7 p[3] *273:12 3.24046e-05
+8 *52009:A *273:11 1.83756e-05
+9 *52040:A2 *273:11 0.000124787
+10 *52045:A2 *273:12 0
+11 *52045:B1 *273:12 0
+12 *43:11 *273:11 9.65676e-05
+13 *268:66 *273:11 0.00131143
+14 *268:70 *273:11 0.000353831
+15 *268:78 *273:11 0.000208767
+*RES
+1 *52046:Y *273:11 31.77 
+2 *273:11 *273:12 401.475 
+3 *273:12 *273:14 2 
+4 *273:14 *52154:A 1.6 
+5 *273:14 *403:DIODE 3.43 
+*END
+
+*D_NET *274 0.0557847
+*CONN
+*I *52155:A I *D sky130_fd_sc_hd__buf_2
+*I *404:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52078:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52155:A 0.000138705
+2 *404:DIODE 0
+3 *52078:Y 0
+4 *274:9 0.00340675
+5 *274:6 0.0270626
+6 *274:5 0.0237946
+7 *52155:A *275:18 0.00024053
+8 *274:9 *275:18 0.00104492
+9 p[4] *52155:A 9.66106e-05
+10 *52078:B *274:6 0
+*RES
+1 *52078:Y *274:5 3.6 
+2 *274:5 *274:6 399.435 
+3 *274:6 *274:9 42.125 
+4 *274:9 *404:DIODE 1.6 
+5 *274:9 *52155:A 5.095 
+*END
+
+*D_NET *275 0.0622861
+*CONN
+*I *52156:A I *D sky130_fd_sc_hd__buf_2
+*I *405:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52107:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52156:A 0.00011806
+2 *405:DIODE 0
+3 *52107:X 0
+4 *275:20 0.00503212
+5 *275:18 0.00653265
+6 *275:5 0.0254079
+7 *275:4 0.0237894
+8 *275:5 *276:6 0
+9 p[4] *275:18 6.12198e-05
+10 *52128:A *275:5 0
+11 *52128:B *275:5 5.92849e-05
+12 *52155:A *275:18 0.00024053
+13 *274:9 *275:18 0.00104492
+*RES
+1 *52107:X *275:4 2 
+2 *275:4 *275:5 399.69 
+3 *275:5 *275:18 34.5275 
+4 *275:18 *275:20 74.1075 
+5 *275:20 *405:DIODE 1.6 
+6 *275:20 *52156:A 3.43 
+*END
+
+*D_NET *276 0.0815573
+*CONN
+*I *52157:A I *D sky130_fd_sc_hd__buf_2
+*I *406:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52128:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52157:A 0.000229275
+2 *406:DIODE 0
+3 *52128:Y 0
+4 *276:9 0.0172546
+5 *276:8 0.0170253
+6 *276:6 0.0235078
+7 *276:5 0.0235078
+8 p[6] *52157:A 3.24046e-05
+9 *275:5 *276:6 0
+*RES
+1 *52128:Y *276:5 3.6 
+2 *276:5 *276:6 394.59 
+3 *276:6 *276:8 2 
+4 *276:8 *276:9 187.095 
+5 *276:9 *406:DIODE 1.6 
+6 *276:9 *52157:A 9.305 
+*END
+
+*D_NET *277 0.0890144
+*CONN
+*I *52158:A I *D sky130_fd_sc_hd__buf_2
+*I *407:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52129:X O *D sky130_fd_sc_hd__a21o_4
+*CAP
+1 *52158:A 0.000184505
+2 *407:DIODE 0
+3 *52129:X 0
+4 *277:8 0.0246006
+5 *277:7 0.0244161
+6 *277:5 0.0197605
+7 *277:4 0.0197605
+8 p[7] *52158:A 0.000119044
+9 *374:DIODE *277:5 0.0001249
+10 *170:13 *277:5 4.82863e-05
+*RES
+1 *52129:X *277:4 1.6 
+2 *277:4 *277:5 274.725 
+3 *277:5 *277:7 2 
+4 *277:7 *277:8 409.89 
+5 *277:8 *407:DIODE 3.6 
+6 *277:8 *52158:A 6.99 
+*END
+
+*D_NET *278 0.0448177
+*CONN
+*I *314:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51941:B I *D sky130_fd_sc_hd__and4_1
+*I *51939:A I *D sky130_fd_sc_hd__buf_2
+*I *51944:A I *D sky130_fd_sc_hd__nand2_1
+*I *51967:C I *D sky130_fd_sc_hd__and4_1
+*I *316:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *327:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *311:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52144:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *314:DIODE 0
+2 *51941:B 0.000124862
+3 *51939:A 0
+4 *51944:A 0
+5 *51967:C 0.000268777
+6 *316:DIODE 0
+7 *327:DIODE 0
+8 *311:DIODE 0
+9 *52144:X 0.00153139
+10 *278:81 0.000379946
+11 *278:70 0.000963567
+12 *278:56 0.00144881
+13 *278:47 0.000948239
+14 *278:37 0.000609166
+15 *278:34 0.000399623
+16 *278:24 0.0010607
+17 *278:9 0.0025136
+18 *278:7 0.00325144
+19 *51941:B *281:47 1.46828e-05
+20 *51967:C *280:38 0.000249531
+21 *278:9 *279:5 0.00888568
+22 *278:24 *279:5 0.0037548
+23 *278:24 *280:5 0.000238137
+24 *278:24 *281:11 0
+25 *278:34 *281:11 0
+26 *278:70 *279:31 6.3124e-06
+27 *278:81 *280:38 7.06865e-05
+28 *285:DIODE *278:34 0
+29 *339:DIODE *278:47 7.07032e-05
+30 *339:DIODE *278:56 8.40325e-05
+31 *51941:A *51941:B 4.82919e-05
+32 *51944:B *278:70 5.4155e-06
+33 *51945:A0 *278:70 1.61831e-05
+34 *51945:A0 *278:81 4.82863e-05
+35 *51971:A0 *51967:C 0.000162325
+36 *51971:A1 *278:70 0.00032776
+37 *51971:S *51967:C 2.88436e-05
+38 *51992:A1 *278:81 8.34348e-05
+39 *51994:A *51967:C 0.000124744
+40 *51994:A *278:56 3.31204e-05
+41 *51996:A1 *278:70 6.97118e-05
+42 *52145:A *278:9 2.30292e-05
+43 *52146:A *278:9 2.26739e-05
+44 *31:8 *51967:C 2.4997e-05
+45 *31:8 *278:56 3.67779e-05
+46 *51:8 *278:81 0
+47 *183:15 *51941:B 0.000201503
+48 *189:45 *51941:B 0.000160635
+49 *189:45 *278:81 0
+50 *192:31 *278:70 7.68414e-06
+51 *192:37 *278:81 2.88519e-05
+52 *207:19 *278:56 0.0001032
+53 *207:21 *278:56 1.33293e-05
+54 *234:8 *51941:B 6.52181e-05
+55 *260:8 *51967:C 3.51211e-05
+56 *261:16 *51967:C 0
+57 *262:56 *51967:C 2.96334e-05
+58 *272:5 *278:7 0.00129706
+59 *272:5 *278:9 0.00175282
+60 *272:24 *278:9 0.00436925
+61 *272:34 *278:9 0.00449157
+62 *272:41 *278:24 0.00385525
+63 *272:41 *278:34 0.000230474
+64 *272:41 *278:37 0
+65 *272:47 *278:34 0.000112622
+66 *272:52 *278:37 0
+67 *272:52 *278:47 0
+68 *272:56 *278:47 7.23533e-05
+69 *272:188 *51967:C 6.08134e-05
+*RES
+1 *52144:X *278:7 30.0925 
+2 *278:7 *278:9 96.8775 
+3 *278:9 *278:24 49.465 
+4 *278:24 *311:DIODE 3.6 
+5 *278:24 *278:34 6.665 
+6 *278:34 *278:37 4.145 
+7 *278:37 *327:DIODE 3.6 
+8 *278:37 *278:47 8.39 
+9 *278:47 *316:DIODE 1.6 
+10 *278:47 *278:56 8.495 
+11 *278:56 *51967:C 10.815 
+12 *278:56 *278:70 11.345 
+13 *278:70 *51944:A 1.6 
+14 *278:70 *278:81 8.635 
+15 *278:81 *51939:A 1.6 
+16 *278:81 *51941:B 5.155 
+17 *278:34 *314:DIODE 1.6 
+*END
+
+*D_NET *279 0.0343406
+*CONN
+*I *51919:A I *D sky130_fd_sc_hd__buf_2
+*I *51921:C I *D sky130_fd_sc_hd__and4_1
+*I *303:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *300:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52145:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *51919:A 0
+2 *51921:C 0.000255915
+3 *303:DIODE 0
+4 *300:DIODE 0
+5 *52145:X 0
+6 *279:31 0.00167302
+7 *279:22 0.00169603
+8 *279:12 0.000575419
+9 *279:5 0.0030842
+10 *279:4 0.00278771
+11 *51921:C *51921:B 4.82919e-05
+12 *51921:C *281:206 0
+13 *279:5 *293:DIODE 0.000153217
+14 *279:5 *280:5 0.00888321
+15 *279:5 *280:11 7.66083e-05
+16 *279:12 *280:14 0
+17 *279:31 *281:206 0
+18 *313:DIODE *279:12 0.000130072
+19 *313:DIODE *279:22 3.50033e-05
+20 *396:DIODE *279:5 1.34503e-05
+21 *397:DIODE *279:5 0.000701132
+22 *51968:B2 *51921:C 0.000100139
+23 *51969:B *51921:C 0
+24 *51971:A1 *279:31 0.000400378
+25 *52147:A *279:5 6.34213e-05
+26 *55:10 *279:31 4.99619e-05
+27 *189:31 *51921:C 4.43871e-06
+28 *192:27 *279:31 0.00018171
+29 *192:31 *279:31 0.000387902
+30 *193:38 *279:31 2.46089e-05
+31 *212:12 *51921:C 5.12942e-05
+32 *212:12 *279:31 8.08153e-06
+33 *234:17 *279:31 0
+34 *261:16 *279:12 0
+35 *261:16 *279:22 0
+36 *262:15 *51921:C 4.66826e-05
+37 *262:17 *51921:C 2.75145e-05
+38 *262:26 *51921:C 0.000156622
+39 *262:61 *279:12 3.67779e-05
+40 *263:42 *51921:C 0
+41 *272:34 *279:5 2.05056e-05
+42 *272:41 *279:5 2.0514e-05
+43 *278:9 *279:5 0.00888568
+44 *278:24 *279:5 0.0037548
+45 *278:70 *279:31 6.3124e-06
+*RES
+1 *52145:X *279:4 1.6 
+2 *279:4 *279:5 122.58 
+3 *279:5 *279:12 7.25 
+4 *279:12 *300:DIODE 3.6 
+5 *279:12 *279:22 5.39 
+6 *279:22 *303:DIODE 1.6 
+7 *279:22 *279:31 20.645 
+8 *279:31 *51921:C 9.045 
+9 *279:31 *51919:A 3.6 
+*END
+
+*D_NET *280 0.0272458
+*CONN
+*I *293:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *304:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51921:D I *D sky130_fd_sc_hd__and4_1
+*I *51906:C I *D sky130_fd_sc_hd__and4_1
+*I *51910:A I *D sky130_fd_sc_hd__buf_2
+*I *51922:A2 I *D sky130_fd_sc_hd__a22oi_1
+*I *290:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *305:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52146:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *293:DIODE 7.35181e-05
+2 *304:DIODE 0.000103414
+3 *51921:D 0
+4 *51906:C 4.39188e-05
+5 *51910:A 3.4961e-05
+6 *51922:A2 0
+7 *290:DIODE 0
+8 *305:DIODE 0
+9 *52146:X 0
+10 *280:49 0.000114961
+11 *280:43 0.000203099
+12 *280:38 0.00158648
+13 *280:17 0.00166605
+14 *280:14 0.000370752
+15 *280:11 0.000221859
+16 *280:5 0.00262832
+17 *280:4 0.00258856
+18 *51906:C *51906:D 3.26889e-05
+19 *51906:C *51921:B 7.35813e-05
+20 *51906:C *281:63 9.53114e-05
+21 *51906:C *284:28 2.30292e-05
+22 *280:5 *281:11 0.0039471
+23 *280:17 *281:17 0.000198945
+24 *280:17 *281:29 0.000313852
+25 *280:38 *281:29 0.000418782
+26 *280:43 *51921:B 0.000140145
+27 *280:49 *281:63 7.63047e-05
+28 *285:DIODE *304:DIODE 0
+29 *285:DIODE *280:14 0
+30 *313:DIODE *304:DIODE 0
+31 *51923:B *51910:A 0.000235301
+32 *51923:B *280:49 1.2818e-05
+33 *51967:B *280:38 0.000123298
+34 *51967:C *280:38 0.000249531
+35 *51967:D *280:38 2.99445e-05
+36 *51969:A *280:38 2.16917e-05
+37 *51969:B *280:38 4.82863e-05
+38 *51991:A1 *280:38 2.0514e-05
+39 *51991:B1 *280:38 0.000198939
+40 *51991:B2 *280:38 0.000124577
+41 *51992:A1 *280:38 7.23602e-05
+42 *183:15 *280:38 3.87203e-05
+43 *183:51 *51910:A 0.000225179
+44 *183:51 *280:49 1.37395e-05
+45 *193:38 *280:38 1.0779e-05
+46 *212:12 *280:38 7.8936e-05
+47 *212:29 *280:38 4.21666e-05
+48 *214:6 *280:38 3.86529e-05
+49 *214:6 *280:43 5.53249e-06
+50 *232:50 *280:38 3.31204e-05
+51 *232:50 *280:43 4.05358e-05
+52 *232:50 *280:49 0
+53 *260:8 *280:38 3.59531e-06
+54 *262:14 *280:49 0.000155928
+55 *262:15 *51906:C 3.57349e-05
+56 *262:15 *280:43 0.000239807
+57 *262:56 *280:38 0.000374107
+58 *262:61 *280:14 0
+59 *262:64 *280:17 0.000161529
+60 *263:42 *280:38 0.000233004
+61 *278:24 *280:5 0.000238137
+62 *278:81 *280:38 7.06865e-05
+63 *279:5 *293:DIODE 0.000153217
+64 *279:5 *280:5 0.00888321
+65 *279:5 *280:11 7.66083e-05
+66 *279:12 *280:14 0
+*RES
+1 *52146:X *280:4 1.6 
+2 *280:4 *280:5 80.145 
+3 *280:5 *305:DIODE 1.6 
+4 *280:5 *280:11 0.795 
+5 *280:11 *280:14 3.635 
+6 *280:14 *280:17 6.59 
+7 *280:17 *290:DIODE 1.6 
+8 *280:17 *280:38 33.625 
+9 *280:38 *280:43 5.045 
+10 *280:43 *280:49 6.26875 
+11 *280:49 *51922:A2 1.6 
+12 *280:49 *51910:A 3.75625 
+13 *280:43 *51906:C 3.445 
+14 *280:38 *51921:D 3.6 
+15 *280:14 *304:DIODE 5.235 
+16 *280:11 *293:DIODE 3.085 
+*END
+
+*D_NET *281 0.0345058
+*CONN
+*I *292:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *288:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51922:B1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51906:D I *D sky130_fd_sc_hd__and4_1
+*I *347:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *367:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52118:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *52117:C I *D sky130_fd_sc_hd__nand4_1
+*I *379:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *381:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52089:B I *D sky130_fd_sc_hd__nand2_1
+*I *52055:B I *D sky130_fd_sc_hd__nand2_1
+*I *357:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52015:B I *D sky130_fd_sc_hd__nand2_1
+*I *51903:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *51901:C I *D sky130_fd_sc_hd__and3_1
+*I *51908:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *287:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *291:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *306:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52147:X O *D sky130_fd_sc_hd__clkbuf_4
+*CAP
+1 *292:DIODE 0.000485606
+2 *288:DIODE 0
+3 *51922:B1 0
+4 *51906:D 2.48334e-05
+5 *347:DIODE 0.000177097
+6 *367:DIODE 0
+7 *52118:A2 0
+8 *52117:C 0
+9 *379:DIODE 0.000382718
+10 *381:DIODE 0
+11 *52089:B 1.63287e-05
+12 *52055:B 2.08101e-05
+13 *357:DIODE 0
+14 *52015:B 1.88809e-05
+15 *51903:A2 1.77753e-05
+16 *51901:C 0.000137798
+17 *51908:A2 4.77124e-05
+18 *287:DIODE 0
+19 *291:DIODE 0
+20 *306:DIODE 0
+21 *52147:X 0.002546
+22 *281:206 0.000640111
+23 *281:162 0.00057533
+24 *281:152 0.000381126
+25 *281:145 0.000322539
+26 *281:142 0.000210125
+27 *281:134 0.000417303
+28 *281:126 0.000485244
+29 *281:118 0.000179617
+30 *281:115 0.000525375
+31 *281:104 0.000934814
+32 *281:96 0.00141389
+33 *281:79 0.00106049
+34 *281:67 0.000855474
+35 *281:63 0.00101212
+36 *281:53 0.000457917
+37 *281:47 0.00105353
+38 *281:29 0.00113614
+39 *281:17 0.00058901
+40 *281:11 0.00275379
+41 *51901:C *284:12 0
+42 *51901:C *284:28 0
+43 *51906:D *284:28 0
+44 *51908:A2 *284:28 4.43467e-05
+45 *281:29 *282:18 0.000318091
+46 *281:47 *282:18 0.000114912
+47 *281:63 *284:28 1.61831e-05
+48 *281:67 *284:28 0.000342764
+49 *281:96 *51897:B 8.34281e-06
+50 *281:96 *282:18 0
+51 *281:96 *283:11 0.000186944
+52 *281:96 *284:28 0
+53 *281:104 *283:11 2.75145e-05
+54 *281:162 *52117:D 4.82919e-05
+55 *285:DIODE *281:11 9.96044e-05
+56 *285:DIODE *281:17 0.00011964
+57 *315:DIODE *292:DIODE 0.000505372
+58 *365:DIODE *281:115 0
+59 *365:DIODE *281:126 0.000428764
+60 *365:DIODE *281:134 0.000189845
+61 *51893:A *281:53 7.36562e-05
+62 *51893:A *281:63 0
+63 *51893:A *281:206 1.52184e-05
+64 *51897:A *51901:C 2.81446e-06
+65 *51897:A *281:96 0.000350486
+66 *51906:C *51906:D 3.26889e-05
+67 *51906:C *281:63 9.53114e-05
+68 *51909:B1_N *281:96 0
+69 *51914:A *292:DIODE 7.36562e-05
+70 *51921:C *281:206 0
+71 *51922:B2 *281:53 4.99619e-05
+72 *51941:B *281:47 1.46828e-05
+73 *51967:B *281:47 0.000198945
+74 *51992:B1 *281:47 4.82919e-05
+75 *52010:A *51908:A2 4.99619e-05
+76 *52010:A *281:79 6.36494e-05
+77 *52014:B *281:104 0.000109377
+78 *52054:A *281:115 0.000239813
+79 *52054:B *281:115 3.05373e-05
+80 *52055:A *281:126 0.000191521
+81 *52088:A *281:162 0
+82 *52117:A *281:152 0
+83 *52117:B *281:152 0
+84 *52120:A *281:134 0.000201508
+85 *52120:B *281:134 0.000239813
+86 *52121:B *281:134 9.2741e-05
+87 *51:8 *281:47 0
+88 *111:6 *347:DIODE 0.000181376
+89 *111:6 *281:115 9.37731e-05
+90 *176:7 *281:152 8.8266e-05
+91 *176:7 *281:162 1.60203e-05
+92 *183:7 *281:53 1.16578e-05
+93 *183:15 *281:47 0.000450272
+94 *183:45 *281:53 0.000356395
+95 *183:88 *51901:C 5.66235e-05
+96 *187:15 *281:96 8.43946e-05
+97 *189:15 *281:53 1.03323e-05
+98 *189:17 *281:53 0.000161204
+99 *189:45 *281:47 6.59822e-05
+100 *189:105 *51901:C 1.83847e-05
+101 *190:10 *281:96 4.82919e-05
+102 *193:38 *292:DIODE 8.98743e-05
+103 *193:38 *281:206 2.67022e-05
+104 *194:8 *51901:C 3.86529e-05
+105 *194:8 *281:96 0.000101317
+106 *199:10 *281:67 0.000273352
+107 *203:69 *281:126 4.60584e-05
+108 *203:69 *281:134 9.91257e-05
+109 *207:73 *281:104 0.000252537
+110 *207:77 *281:104 0.000241483
+111 *207:89 *52015:B 5.4155e-06
+112 *207:89 *281:104 3.23663e-05
+113 *207:89 *281:115 6.90062e-05
+114 *225:108 *347:DIODE 0
+115 *225:108 *281:118 1.19928e-05
+116 *225:108 *281:126 0.000161529
+117 *225:164 *281:126 0.000114024
+118 *232:8 *281:47 0.000234674
+119 *232:33 *281:47 0.00016063
+120 *232:50 *292:DIODE 8.98743e-05
+121 *232:50 *281:63 0
+122 *232:50 *281:206 0.000128041
+123 *239:6 *292:DIODE 0
+124 *262:14 *281:63 8.09021e-06
+125 *262:15 *281:63 0.000120655
+126 *262:26 *281:47 0.000497676
+127 *262:56 *281:29 0.000201503
+128 *262:56 *281:47 0
+129 *262:61 *281:17 4.82919e-05
+130 *262:61 *281:29 0.000531131
+131 *262:64 *281:17 3.77036e-05
+132 *263:42 *281:53 9.14049e-05
+133 *263:42 *281:206 0.000193564
+134 *266:27 *52089:B 1.90686e-05
+135 *266:27 *281:134 6.13333e-05
+136 *266:27 *281:142 0.000186228
+137 *266:29 *281:134 0.000191521
+138 *266:31 *281:134 3.83041e-05
+139 *267:39 *281:145 0
+140 *267:39 *281:152 0
+141 *278:24 *281:11 0
+142 *278:34 *281:11 0
+143 *279:31 *281:206 0
+144 *280:5 *281:11 0.0039471
+145 *280:17 *281:17 0.000198945
+146 *280:17 *281:29 0.000313852
+147 *280:38 *281:29 0.000418782
+148 *280:49 *281:63 7.63047e-05
+*RES
+1 *52147:X *281:11 42.815 
+2 *281:11 *306:DIODE 1.6 
+3 *281:11 *281:17 4.245 
+4 *281:17 *291:DIODE 1.6 
+5 *281:17 *281:29 14.65 
+6 *281:29 *287:DIODE 1.6 
+7 *281:29 *281:47 20.22 
+8 *281:47 *281:53 7.205 
+9 *281:53 *281:63 8.875 
+10 *281:63 *281:67 9.09 
+11 *281:67 *51908:A2 2.92 
+12 *281:67 *281:79 3.83 
+13 *281:79 *51901:C 6 
+14 *281:79 *281:96 13.685 
+15 *281:96 *51903:A2 1.96 
+16 *281:96 *281:104 10.8 
+17 *281:104 *52015:B 1.96 
+18 *281:104 *281:115 7.445 
+19 *281:115 *281:118 2.45 
+20 *281:118 *357:DIODE 1.6 
+21 *281:118 *281:126 5.55 
+22 *281:126 *52055:B 1.96 
+23 *281:126 *281:134 9.075 
+24 *281:134 *52089:B 1.96 
+25 *281:134 *281:142 1.83 
+26 *281:142 *281:145 4.145 
+27 *281:145 *281:152 5.135 
+28 *281:152 *281:162 6.985 
+29 *281:162 *381:DIODE 1.6 
+30 *281:162 *379:DIODE 5.845 
+31 *281:152 *52117:C 1.6 
+32 *281:145 *52118:A2 3.6 
+33 *281:142 *367:DIODE 1.6 
+34 *281:115 *347:DIODE 6.54 
+35 *281:63 *51906:D 2.215 
+36 *281:53 *51922:B1 1.6 
+37 *281:47 *281:206 4.185 
+38 *281:206 *288:DIODE 3.6 
+39 *281:206 *292:DIODE 12.375 
+*END
+
+*D_NET *282 0.00811741
+*CONN
+*I *51894:A I *D sky130_fd_sc_hd__buf_2
+*I *51908:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *52148:X O *D sky130_fd_sc_hd__clkbuf_1
+*CAP
+1 *51894:A 0.000249933
+2 *51908:B1 1.17375e-05
+3 *52148:X 0.00151494
+4 *282:18 0.00177661
+5 *51908:B1 *284:28 2.75229e-05
+6 *282:18 *284:12 8.44437e-05
+7 *282:18 *284:28 7.41779e-05
+8 *307:DIODE *282:18 9.70988e-05
+9 *398:DIODE *282:18 0.00107967
+10 *51909:B1_N *51894:A 0
+11 *51942:B2 *51894:A 0.000106655
+12 *51942:B2 *282:18 3.25831e-05
+13 *51968:A2 *282:18 4.9968e-05
+14 *51992:A2 *282:18 4.99619e-05
+15 *183:15 *282:18 1.15688e-05
+16 *183:59 *51908:B1 4.82919e-05
+17 *187:10 *51894:A 0
+18 *189:89 *282:18 0.000143009
+19 *192:11 *51894:A 0
+20 *232:50 *282:18 4.66108e-05
+21 *262:9 *282:18 0.0010059
+22 *263:9 *282:18 0.000239807
+23 *263:12 *282:18 0
+24 *263:30 *282:18 0
+25 *263:42 *282:18 0.00103393
+26 *281:29 *282:18 0.000318091
+27 *281:47 *282:18 0.000114912
+28 *281:96 *282:18 0
+*RES
+1 *52148:X *282:18 47.29 
+2 *282:18 *51908:B1 4.05 
+3 *282:18 *51894:A 7.53 
+*END
+
+*D_NET *283 0.0118951
+*CONN
+*I *52049:B I *D sky130_fd_sc_hd__nand2_1
+*I *52118:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *52087:B I *D sky130_fd_sc_hd__nand3_1
+*I *52117:D I *D sky130_fd_sc_hd__nand4_1
+*I *52086:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52010:B I *D sky130_fd_sc_hd__nand2_1
+*I *51897:B I *D sky130_fd_sc_hd__nand2_2
+*I *52149:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *52049:B 4.53737e-05
+2 *52118:B1 0.000261448
+3 *52087:B 2.79432e-05
+4 *52117:D 0.000251583
+5 *52086:A2 9.41834e-05
+6 *52010:B 0.00030048
+7 *51897:B 4.3935e-05
+8 *52149:X 0
+9 *283:86 0.000354744
+10 *283:71 0.000358042
+11 *283:61 0.00125777
+12 *283:39 0.0016923
+13 *283:11 0.000845171
+14 *283:4 0.0010252
+15 *51897:A *51897:B 3.70488e-05
+16 *51903:A1 *283:11 1.70935e-05
+17 *51903:B1 *283:11 1.01661e-05
+18 *51903:B2 *52010:B 0
+19 *52010:A *52010:B 1.85674e-05
+20 *52012:C *283:11 0
+21 *52049:A *283:39 6.47326e-05
+22 *52051:A2 *283:39 2.30292e-05
+23 *52051:B1 *283:39 0.000122155
+24 *52053:A *283:61 8.53113e-06
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+*END
+
+*D_NET *284 0.0155901
+*CONN
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+*I *51896:A I *D sky130_fd_sc_hd__buf_2
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+*END

signoff/user_proj_example/openlane-signoff/spef/user_proj_example.nom.spef

diff --git a/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.nom.spef b/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.nom.spef
new file mode 100644
index 0000000..6a9241c
--- /dev/null
+++ b/signoff/user_proj_example/openlane-signoff/spef/user_proj_example.nom.spef
@@ -0,0 +1,61174 @@
+*SPEF "ieee 1481-1999"
+*DESIGN "user_proj_example"
+*DATE "11:11:11 Fri 11 11, 1111"
+*VENDOR "OpenRCX"
+*PROGRAM "Parallel Extraction"
+*VERSION "1.0"
+*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE"
+*DIVIDER /
+*DELIMITER :
+*BUS_DELIMITER []
+*T_UNIT 1 NS
+*C_UNIT 1 PF
+*R_UNIT 1 OHM
+*L_UNIT 1 HENRY
+
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+*52151 output17
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+*52154 output20
+*52155 output21
+*52156 output22
+*52157 output23
+*52158 output24
+
+*PORTS
+a[0] I
+a[1] I
+a[2] I
+a[3] I
+a[4] I
+a[5] I
+a[6] I
+a[7] I
+b[0] I
+b[1] I
+b[2] I
+b[3] I
+b[4] I
+b[5] I
+b[6] I
+b[7] I
+p[0] O
+p[1] O
+p[2] O
+p[3] O
+p[4] O
+p[5] O
+p[6] O
+p[7] O
+
+*D_NET *1 0.00135916
+*CONN
+*P a[0] I
+*I *52135:A I *D sky130_fd_sc_hd__clkbuf_4
+*I *391:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 a[0] 0.000440978
+2 *52135:A 0.000238602
+3 *391:DIODE 0
+4 *1:8 0.00067958
+*RES
+1 a[0] *1:8 12.3393 
+2 *1:8 *391:DIODE 9.3 
+3 *1:8 *52135:A 13.1393 
+*END
+
+*D_NET *2 0.00108147
+*CONN
+*P a[1] I
+*I *392:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52143:A I *D sky130_fd_sc_hd__buf_4
+*CAP
+1 a[1] 0.000390829
+2 *392:DIODE 0.000112636
+3 *52143:A 3.72704e-05
+4 *2:5 0.000540735
+*RES
+1 a[1] *2:5 7.5 
+2 *2:5 *52143:A 14.3357 
+3 *2:5 *392:DIODE 15.7464 
+*END
+
+*D_NET *3 0.00119822
+*CONN
+*P a[2] I
+*I *52144:A I *D sky130_fd_sc_hd__buf_2
+*I *393:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 a[2] 0.000397273
+2 *52144:A 2.16932e-05
+3 *393:DIODE 6.54139e-05
+4 *3:7 0.00048438
+5 *393:DIODE *272:5 0.000186662
+6 *52144:A *272:5 4.27935e-05
+*RES
+1 a[2] *3:7 12 
+2 *3:7 *393:DIODE 11.0679 
+3 *3:7 *52144:A 9.83571 
+*END
+
+*D_NET *4 0.0015661
+*CONN
+*P a[3] I
+*I *52145:A I *D sky130_fd_sc_hd__clkbuf_2
+*I *394:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 a[3] 0.000361141
+2 *52145:A 0.000250638
+3 *394:DIODE 0
+4 *4:7 0.000611779
+5 *52145:A *272:5 0.000318107
+6 *52145:A *278:9 2.44318e-05
+*RES
+1 a[3] *4:7 11.3929 
+2 *4:7 *394:DIODE 9.3 
+3 *4:7 *52145:A 13.1393 
+*END
+
+*D_NET *5 0.00137138
+*CONN
+*P a[4] I
+*I *395:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52146:A I *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 a[4] 0.000378011
+2 *395:DIODE 0.000167084
+3 *52146:A 9.09492e-05
+4 *5:5 0.000636044
+5 *395:DIODE *272:24 2.01732e-05
+6 *52146:A *272:15 5.49544e-05
+7 *52146:A *278:9 2.41665e-05
+*RES
+1 a[4] *5:5 6.89286 
+2 *5:5 *52146:A 15.175 
+3 *5:5 *395:DIODE 16.3536 
+*END
+
+*D_NET *6 0.00139667
+*CONN
+*P a[5] I
+*I *52147:A I *D sky130_fd_sc_hd__clkbuf_4
+*I *396:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 a[5] 0.000365555
+2 *52147:A 9.49997e-05
+3 *396:DIODE 0.000122841
+4 *6:7 0.000583395
+5 *396:DIODE *272:25 0.000144773
+6 *396:DIODE *279:5 1.39726e-05
+7 *52147:A *279:5 7.11313e-05
+*RES
+1 a[5] *6:7 11.3929 
+2 *6:7 *396:DIODE 11.0679 
+3 *6:7 *52147:A 11.1036 
+*END
+
+*D_NET *7 0.00246539
+*CONN
+*P a[6] I
+*I *52148:A I *D sky130_fd_sc_hd__clkbuf_1
+*I *397:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 a[6] 0.000390829
+2 *52148:A 0.000129912
+3 *397:DIODE 0.000310969
+4 *7:7 0.000831711
+5 *397:DIODE *279:5 0.000801966
+6 *7:7 *261:16 0
+*RES
+1 a[6] *7:7 12 
+2 *7:7 *397:DIODE 17.2286 
+3 *7:7 *52148:A 11.4786 
+*END
+
+*D_NET *8 0.0091566
+*CONN
+*P a[7] I
+*I *52149:A I *D sky130_fd_sc_hd__clkbuf_2
+*I *398:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 a[7] 0.000316581
+2 *52149:A 0.000496218
+3 *398:DIODE 0
+4 *8:13 0.0022424
+5 *8:7 0.0030552
+6 *52149:A *263:9 0.000656173
+7 *52149:A *283:11 1.76135e-05
+8 *8:13 *263:9 0.00123037
+9 *8:13 *282:10 2.56694e-05
+10 *8:13 *282:18 0.00111637
+*RES
+1 a[7] *8:7 10.4821 
+2 *8:7 *8:13 41.7857 
+3 *8:13 *398:DIODE 9.3 
+4 *8:7 *52149:A 25.925 
+*END
+
+*D_NET *9 0.00143854
+*CONN
+*P b[0] I
+*I *399:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52150:A I *D sky130_fd_sc_hd__clkbuf_1
+*CAP
+1 b[0] 0.00037278
+2 *399:DIODE 8.83224e-05
+3 *52150:A 5.9795e-05
+4 *9:5 0.000520897
+5 *399:DIODE *267:16 0.000128161
+6 *52150:A *267:5 0.000142856
+7 *9:5 *284:8 0.000125731
+*RES
+1 b[0] *9:5 7.5 
+2 *9:5 *52150:A 15.1571 
+3 *9:5 *399:DIODE 15.7464 
+*END
+
+*D_NET *10 0.00137162
+*CONN
+*P b[1] I
+*I *52136:A I *D sky130_fd_sc_hd__clkbuf_2
+*I *384:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[1] 0.000372975
+2 *52136:A 0.000124801
+3 *384:DIODE 9.80046e-05
+4 *10:7 0.000595781
+5 *384:DIODE *267:5 5.04589e-05
+6 *52136:A *267:5 0.000129595
+7 *10:7 *262:8 0
+*RES
+1 b[1] *10:7 11.3929 
+2 *10:7 *384:DIODE 10.6571 
+3 *10:7 *52136:A 11.9071 
+*END
+
+*D_NET *11 0.00125672
+*CONN
+*P b[2] I
+*I *52137:A I *D sky130_fd_sc_hd__clkbuf_2
+*I *385:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[2] 0.000356449
+2 *52137:A 6.68313e-05
+3 *385:DIODE 8.83968e-05
+4 *11:7 0.000511677
+5 *385:DIODE *267:5 0.000102197
+6 *52137:A *267:5 7.77751e-05
+7 *11:7 *263:8 5.33978e-05
+*RES
+1 b[2] *11:7 11.6964 
+2 *11:7 *385:DIODE 11.0679 
+3 *11:7 *52137:A 10.6571 
+*END
+
+*D_NET *12 0.00119343
+*CONN
+*P b[3] I
+*I *52138:A I *D sky130_fd_sc_hd__buf_2
+*I *386:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[3] 0.000384385
+2 *52138:A 2.00869e-05
+3 *386:DIODE 7.1297e-05
+4 *12:7 0.000475769
+5 *386:DIODE *267:5 0.000186662
+6 *52138:A *267:5 5.52302e-05
+*RES
+1 b[3] *12:7 12 
+2 *12:7 *386:DIODE 11.0679 
+3 *12:7 *52138:A 9.83571 
+*END
+
+*D_NET *13 0.00122264
+*CONN
+*P b[4] I
+*I *52139:A I *D sky130_fd_sc_hd__clkbuf_4
+*I *387:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[4] 0.000369531
+2 *52139:A 4.42548e-05
+3 *387:DIODE 0.000107549
+4 *13:7 0.000521335
+5 *387:DIODE *267:5 0.000126629
+6 *52139:A *267:5 5.33433e-05
+*RES
+1 b[4] *13:7 11.6964 
+2 *13:7 *387:DIODE 11.4786 
+3 *13:7 *52139:A 10.2464 
+*END
+
+*D_NET *14 0.00119343
+*CONN
+*P b[5] I
+*I *52140:A I *D sky130_fd_sc_hd__buf_4
+*I *388:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[5] 0.000384385
+2 *52140:A 2.00869e-05
+3 *388:DIODE 7.1297e-05
+4 *14:7 0.000475769
+5 *388:DIODE *267:5 0.000186662
+6 *52140:A *267:5 5.52302e-05
+*RES
+1 b[5] *14:7 12 
+2 *14:7 *388:DIODE 11.0679 
+3 *14:7 *52140:A 9.83571 
+*END
+
+*D_NET *15 0.00150316
+*CONN
+*P b[6] I
+*I *52141:A I *D sky130_fd_sc_hd__buf_4
+*I *389:DIODE I *D sky130_fd_sc_hd__diode_2
+*CAP
+1 b[6] 0.000429374
+2 *52141:A 0.000146483
+3 *389:DIODE 0
+4 *15:8 0.000575857
+5 *52141:A *267:5 0.000320024
+6 *15:8 *267:5 3.14193e-05
+*RES
+1 b[6] *15:8 12.3393 
+2 *15:8 *389:DIODE 9.3 
+3 *15:8 *52141:A 13.0321 
+*END
+
+*D_NET *16 0.00107376
+*CONN
+*P b[7] I
+*I *390:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52142:A I *D sky130_fd_sc_hd__buf_4
+*CAP
+1 b[7] 0.000384385
+2 *390:DIODE 9.12335e-05
+3 *52142:A 3.72704e-05
+4 *16:5 0.000512889
+5 *390:DIODE *268:8 4.79842e-05
+*RES
+1 b[7] *16:5 7.5 
+2 *16:5 *52142:A 14.3357 
+3 *16:5 *390:DIODE 15.7464 
+*END
+
+*D_NET *17 0.00129487
+*CONN
+*P p[0] O
+*I *52151:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[0] 0.000647435
+2 *52151:X 0.000647435
+*RES
+1 *52151:X p[0] 25.9071 
+*END
+
+*D_NET *18 0.00108994
+*CONN
+*P p[1] O
+*I *52152:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[1] 0.000544971
+2 *52152:X 0.000544971
+*RES
+1 *52152:X p[1] 24.675 
+*END
+
+*D_NET *19 0.00108994
+*CONN
+*P p[2] O
+*I *52153:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[2] 0.000544971
+2 *52153:X 0.000544971
+3 p[2] *52153:A 0
+*RES
+1 *52153:X p[2] 24.675 
+*END
+
+*D_NET *20 0.00110019
+*CONN
+*P p[3] O
+*I *52154:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[3] 0.00053309
+2 *52154:X 0.00053309
+3 p[3] *273:12 3.40128e-05
+*RES
+1 *52154:X p[3] 24.675 
+*END
+
+*D_NET *21 0.00169295
+*CONN
+*P p[4] O
+*I *52155:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[4] 0.000760735
+2 *52155:X 0.000760735
+3 p[4] *52155:A 0.000102207
+4 p[4] *275:18 6.9276e-05
+*RES
+1 *52155:X p[4] 28.0857 
+*END
+
+*D_NET *22 0.00113013
+*CONN
+*P p[5] O
+*I *52156:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[5] 0.000565067
+2 *52156:X 0.000565067
+*RES
+1 *52156:X p[5] 25.0857 
+*END
+
+*D_NET *23 0.00115412
+*CONN
+*P p[6] O
+*I *52157:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[6] 0.000560053
+2 *52157:X 0.000560053
+3 p[6] *52157:A 3.40128e-05
+*RES
+1 *52157:X p[6] 25.3357 
+*END
+
+*D_NET *24 0.00139808
+*CONN
+*P p[7] O
+*I *52158:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 p[7] 0.000636951
+2 *52158:X 0.000636951
+3 p[7] *52158:A 0.000124175
+*RES
+1 *52158:X p[7] 26.3179 
+*END
+
+*D_NET *27 0.000866989
+*CONN
+*I *51969:B I *D sky130_fd_sc_hd__or2_1
+*I *51968:Y O *D sky130_fd_sc_hd__a22oi_1
+*CAP
+1 *51969:B 0.000287366
+2 *51968:Y 0.000287366
+3 *51969:B *51921:C 0
+4 *51969:B *189:31 9.34554e-05
+5 *51969:B *193:38 1.40306e-05
+6 *51969:B *212:12 0.000123288
+7 *51969:B *262:26 6.2589e-06
+8 *51969:B *280:37 5.52238e-05
+*RES
+1 *51968:Y *51969:B 32.5107 
+*END
+
+*D_NET *28 0.00404764
+*CONN
+*I *51994:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51972:B1 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51969:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51994:A 0.000147136
+2 *51972:B1 1.03356e-05
+3 *51969:X 0.000463518
+4 *28:15 0.00062099
+5 *51972:B1 *51970:B 3.18676e-05
+6 *51972:B1 *51971:A0 5.52238e-05
+7 *51994:A *51967:C 0.000128205
+8 *51994:A *51972:B2 0.000200406
+9 *51994:A *51994:B 0.000127439
+10 *51994:A *31:8 0
+11 *51994:A *261:16 0
+12 *51994:A *278:56 3.34687e-05
+13 *28:15 *51969:A 1.24368e-05
+14 *28:15 *51970:B 0.000110643
+15 *28:15 *51971:A0 0.000139913
+16 *28:15 *51972:A1_N 0.000232687
+17 *28:15 *31:8 5.17614e-05
+18 *28:15 *189:45 0.000383558
+19 *28:15 *189:50 0.000446603
+20 *28:15 *192:37 0.000618905
+21 *28:15 *193:21 1.54142e-05
+22 *28:15 *193:38 1.98839e-05
+23 *28:15 *262:56 0.000197245
+*RES
+1 *51969:X *28:15 25.5321 
+2 *28:15 *51972:B1 9.83571 
+3 *28:15 *51994:A 22.9786 
+*END
+
+*D_NET *29 0.00120821
+*CONN
+*I *51971:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *51970:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51971:A0 0.000261475
+2 *51970:Y 0.000261475
+3 *51971:A0 *51967:C 0.000175519
+4 *51971:A0 *51970:B 8.3725e-05
+5 *51971:A0 *51971:S 1.18064e-05
+6 *51971:A0 *51972:B2 5.52238e-05
+7 *51971:A0 *31:8 0.000152333
+8 *51971:A0 *272:188 1.15172e-05
+9 *51972:B1 *51971:A0 5.52238e-05
+10 *28:15 *51971:A0 0.000139913
+*RES
+1 *51970:Y *51971:A0 34.0821 
+*END
+
+*D_NET *30 0.000823925
+*CONN
+*I *51994:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51972:B2 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51971:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *51994:B 8.06867e-05
+2 *51972:B2 0.000139742
+3 *51971:X 0
+4 *30:5 0.000220428
+5 *51972:B2 *261:16 0
+6 *51994:B *31:8 0
+7 *51994:B *261:16 0
+8 *51971:A0 *51972:B2 5.52238e-05
+9 *51994:A *51972:B2 0.000200406
+10 *51994:A *51994:B 0.000127439
+*RES
+1 *51971:X *30:5 13.8 
+2 *30:5 *51972:B2 16.8893 
+3 *30:5 *51994:B 15.7464 
+*END
+
+*D_NET *31 0.00406827
+*CONN
+*I *51974:B I *D sky130_fd_sc_hd__nor2_1
+*I *51973:B I *D sky130_fd_sc_hd__nand2_1
+*I *51988:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51972:X O *D sky130_fd_sc_hd__o2bb2a_1
+*CAP
+1 *51974:B 3.01666e-05
+2 *51973:B 0.000141045
+3 *51988:B 0.000467333
+4 *51972:X 0.000443492
+5 *31:21 0.000238496
+6 *31:8 0.000978108
+7 *51973:B *51974:A 7.85197e-05
+8 *51973:B *51975:A2 2.89114e-05
+9 *51974:B *51974:A 9.60939e-05
+10 *51974:B *51976:B 5.52302e-05
+11 *51988:B *51988:A 1.92789e-05
+12 *51988:B *51989:B 0.000268409
+13 *51988:B *259:20 4.16984e-05
+14 *51988:B *261:23 1.82549e-05
+15 *31:8 *51967:C 2.58997e-05
+16 *31:8 *51971:S 0.000125724
+17 *31:8 *51975:B1 2.49484e-05
+18 *31:8 *51989:A 0.000150632
+19 *31:8 *51996:A2 0
+20 *31:8 *34:8 0.000198698
+21 *31:8 *55:10 0
+22 *31:8 *258:8 0.000173797
+23 *31:8 *259:20 2.37761e-05
+24 *31:8 *261:16 0
+25 *31:8 *278:56 3.69697e-05
+26 *31:21 *51977:C 2.24646e-05
+27 *31:21 *34:8 0.000126439
+28 *31:21 *259:20 4.97918e-05
+29 *51971:A0 *31:8 0.000152333
+30 *51994:A *31:8 0
+31 *51994:B *31:8 0
+32 *28:15 *31:8 5.17614e-05
+*RES
+1 *51972:X *31:8 24.5857 
+2 *31:8 *51988:B 19.9964 
+3 *31:8 *31:21 6.44643 
+4 *31:21 *51973:B 12.3357 
+5 *31:21 *51974:B 10.2464 
+*END
+
+*D_NET *32 0.000651687
+*CONN
+*I *51975:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *51973:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51975:A2 0.000221493
+2 *51973:Y 0.000221493
+3 *51975:A2 *51989:A 0
+4 *51975:A2 *258:8 0
+5 *51975:A2 *259:20 7.2754e-05
+6 *51975:A2 *272:83 0.000107035
+7 *51973:B *51975:A2 2.89114e-05
+*RES
+1 *51973:Y *51975:A2 32.2071 
+*END
+
+*D_NET *33 0.000988381
+*CONN
+*I *51975:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *51974:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51975:B1 0.000228357
+2 *51974:Y 0.000228357
+3 *51975:B1 *51975:A1 5.52238e-05
+4 *51975:B1 *51999:A1 0.00015234
+5 *51975:B1 *51999:A2 0
+6 *51975:B1 *34:8 0.000299155
+7 *51975:B1 *225:22 0
+8 *31:8 *51975:B1 2.49484e-05
+*RES
+1 *51974:Y *51975:B1 33.4393 
+*END
+
+*D_NET *34 0.00256059
+*CONN
+*I *51977:C I *D sky130_fd_sc_hd__and3_1
+*I *51976:B I *D sky130_fd_sc_hd__xor2_1
+*I *51975:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *51977:C 0.000330762
+2 *51976:B 0.000298421
+3 *51975:X 0.000147866
+4 *34:8 0.000777049
+5 *51976:B *51974:A 4.88637e-05
+6 *51977:C *225:22 0
+7 *51977:C *225:23 0.000228558
+8 *51977:C *265:57 2.70886e-05
+9 *51977:C *272:83 0
+10 *34:8 *225:22 0
+11 *51974:B *51976:B 5.52302e-05
+12 *51975:B1 *34:8 0.000299155
+13 *31:8 *34:8 0.000198698
+14 *31:21 *51977:C 2.24646e-05
+15 *31:21 *34:8 0.000126439
+*RES
+1 *51975:X *34:8 18.4071 
+2 *34:8 *51976:B 18.8536 
+3 *34:8 *51977:C 18.8179 
+*END
+
+*D_NET *35 0.00118797
+*CONN
+*I *51978:A2 I *D sky130_fd_sc_hd__o21ba_2
+*I *52001:B I *D sky130_fd_sc_hd__xor2_1
+*I *51976:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51978:A2 0.000154439
+2 *52001:B 1.40355e-05
+3 *51976:X 9.99063e-05
+4 *35:6 0.000268381
+5 *51978:A2 *51978:A1 8.9163e-05
+6 *51978:A2 *261:29 9.8804e-05
+7 *51978:A2 *266:101 0.000186669
+8 *52001:B *51978:B1_N 2.89114e-05
+9 *52001:B *265:57 5.52302e-05
+10 *35:6 *51932:A 0
+11 *35:6 *51978:A1 1.17968e-05
+12 *35:6 *256:8 6.32633e-05
+13 *35:6 *261:29 0.000117369
+*RES
+1 *51976:X *35:6 16.6571 
+2 *35:6 *52001:B 14.3357 
+3 *35:6 *51978:A2 18.1214 
+*END
+
+*D_NET *36 0.00170268
+*CONN
+*I *51978:B1_N I *D sky130_fd_sc_hd__o21ba_2
+*I *51977:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *51978:B1_N 0.000422958
+2 *51977:X 0.000422958
+3 *51978:B1_N *51932:A 4.46186e-06
+4 *51978:B1_N *51976:A 0.000528343
+5 *51978:B1_N *51978:A1 0
+6 *51978:B1_N *60:10 2.89016e-05
+7 *51978:B1_N *256:8 0
+8 *51978:B1_N *265:57 0.000266147
+9 *52001:B *51978:B1_N 2.89114e-05
+*RES
+1 *51977:X *51978:B1_N 37.5821 
+*END
+
+*D_NET *37 0.00264061
+*CONN
+*I *51979:B I *D sky130_fd_sc_hd__xnor2_4
+*I *51980:B I *D sky130_fd_sc_hd__nor2_1
+*I *51978:X O *D sky130_fd_sc_hd__o21ba_2
+*CAP
+1 *51979:B 0.000154312
+2 *51980:B 3.62004e-05
+3 *51978:X 0.000470773
+4 *37:10 0.000661285
+5 *51979:B *51979:A 1.56e-05
+6 *51979:B *51981:B1_N 0.000315158
+7 *51979:B *267:104 1.00073e-05
+8 *51979:B *272:130 0.000271352
+9 *51980:B *51979:A 5.7661e-06
+10 *37:10 *255:10 5.33882e-05
+11 *37:10 *266:101 0.000495276
+12 *37:10 *266:128 0.000126439
+13 *37:10 *272:130 2.50556e-05
+*RES
+1 *51978:X *37:10 26.7107 
+2 *37:10 *51980:B 10.0321 
+3 *37:10 *51979:B 13.8536 
+*END
+
+*D_NET *38 0.00124369
+*CONN
+*I *51986:B I *D sky130_fd_sc_hd__xor2_4
+*I *51981:A2 I *D sky130_fd_sc_hd__o21bai_2
+*I *51979:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *51986:B 0.000204876
+2 *51981:A2 0.00012409
+3 *51979:Y 4.57723e-05
+4 *38:7 0.000374739
+5 *51981:A2 *51981:A1 2.94103e-05
+6 *51981:A2 *51981:B1_N 0
+7 *51981:A2 *51986:A 5.01213e-05
+8 *51986:B *51986:A 0.000117135
+9 *38:7 *267:104 6.70624e-05
+10 *38:7 *272:130 0.000230482
+*RES
+1 *51979:Y *38:7 15.9786 
+2 *38:7 *51981:A2 16.05 
+3 *38:7 *51986:B 18.0143 
+*END
+
+*D_NET *39 0.00110086
+*CONN
+*I *51981:B1_N I *D sky130_fd_sc_hd__o21bai_2
+*I *51980:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51981:B1_N 0.000311003
+2 *51980:Y 0.000311003
+3 *51981:B1_N *51979:A 0.000148105
+4 *51981:B1_N *51981:A1 0
+5 *51981:B1_N *51986:A 0
+6 *51981:B1_N *255:10 0
+7 *51981:B1_N *267:104 1.55885e-05
+8 *51981:B1_N *272:118 0
+9 *51981:B1_N *272:130 0
+10 *51979:B *51981:B1_N 0.000315158
+11 *51981:A2 *51981:B1_N 0
+*RES
+1 *51980:Y *51981:B1_N 34.5107 
+*END
+
+*D_NET *40 0.00429636
+*CONN
+*I *52039:A I *D sky130_fd_sc_hd__nand2_1
+*I *51983:A I *D sky130_fd_sc_hd__xnor2_2
+*I *51981:Y O *D sky130_fd_sc_hd__o21bai_2
+*CAP
+1 *52039:A 0.000377042
+2 *51983:A 0
+3 *51981:Y 0.000566129
+4 *40:8 0.000943171
+5 *52039:A *52039:B 0.000683233
+6 *52039:A *52040:A1 0
+7 *52039:A *52040:A2 0
+8 *52039:A *52040:B1 0.000150611
+9 *52039:A *41:6 2.43663e-05
+10 *52039:A *42:6 0
+11 *52039:A *103:5 0.000269372
+12 *40:8 *51958:B_N 0
+13 *40:8 *51961:A 5.04589e-05
+14 *40:8 *51961:B 5.41609e-05
+15 *40:8 *51981:A1 9.80173e-05
+16 *40:8 *41:6 0.000127246
+17 *40:8 *232:80 0.000315717
+18 *40:8 *232:95 5.68722e-05
+19 *40:8 *254:7 0.000579959
+20 *40:8 *272:142 0
+*RES
+1 *51981:Y *40:8 27.7464 
+2 *40:8 *51983:A 13.8 
+3 *40:8 *52039:A 24.2286 
+*END
+
+*D_NET *41 0.00176429
+*CONN
+*I *52039:B I *D sky130_fd_sc_hd__nand2_1
+*I *51983:B I *D sky130_fd_sc_hd__xnor2_2
+*I *51982:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52039:B 0.000388537
+2 *51983:B 0
+3 *51982:X 7.61836e-05
+4 *41:6 0.00046472
+5 *52039:B *43:11 0
+6 *52039:A *52039:B 0.000683233
+7 *52039:A *41:6 2.43663e-05
+8 *40:8 *41:6 0.000127246
+*RES
+1 *51982:X *41:6 15.7464 
+2 *41:6 *51983:B 13.8 
+3 *41:6 *52039:B 22.5679 
+*END
+
+*D_NET *42 0.00114517
+*CONN
+*I *52040:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51984:B I *D sky130_fd_sc_hd__xor2_4
+*I *51983:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52040:A2 0.00020069
+2 *51984:B 0
+3 *51983:Y 0.000103141
+4 *42:6 0.000303831
+5 *52040:A2 *268:70 0
+6 *52040:A2 *268:78 0.000271345
+7 *52040:A2 *272:145 5.62914e-05
+8 *52040:A2 *273:11 0.00013177
+9 *42:6 *272:145 7.80968e-05
+10 *52039:A *52040:A2 0
+11 *52039:A *42:6 0
+*RES
+1 *51983:Y *42:6 16.3536 
+2 *42:6 *51984:B 13.8 
+3 *42:6 *52040:A2 19.0679 
+*END
+
+*D_NET *43 0.00227162
+*CONN
+*I *52045:A1 I *D sky130_fd_sc_hd__a21oi_4
+*I *52009:A I *D sky130_fd_sc_hd__xor2_4
+*I *51984:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52045:A1 0.000305043
+2 *52009:A 1.34464e-05
+3 *51984:X 0.000516498
+4 *43:11 0.000834987
+5 *52009:A *268:78 4.74567e-05
+6 *52009:A *273:11 1.92789e-05
+7 *52045:A1 *52045:A2 0
+8 *52045:A1 *67:8 0
+9 *52045:A1 *103:5 0.000170955
+10 *43:11 *268:78 0.000260954
+11 *43:11 *273:11 0.000103004
+12 *52039:B *43:11 0
+*RES
+1 *51984:X *43:11 18.5268 
+2 *43:11 *52009:A 9.83571 
+3 *43:11 *52045:A1 24.1571 
+*END
+
+*D_NET *44 0.00190668
+*CONN
+*I *52008:A I *D sky130_fd_sc_hd__xor2_4
+*I *52044:A I *D sky130_fd_sc_hd__nor2_1
+*I *51985:X O *D sky130_fd_sc_hd__and2_2
+*CAP
+1 *52008:A 0
+2 *52044:A 0.000173105
+3 *51985:X 0.000421402
+4 *44:10 0.000594507
+5 *52044:A *52008:B 0.000351921
+6 *52044:A *52045:B1 0.000173921
+7 *44:10 *52044:B 0
+8 *44:10 *45:7 9.27866e-05
+9 *44:10 *66:8 9.90367e-05
+*RES
+1 *51985:X *44:10 24.0679 
+2 *44:10 *52044:A 14.925 
+3 *44:10 *52008:A 9.3 
+*END
+
+*D_NET *45 0.00198616
+*CONN
+*I *52007:A1 I *D sky130_fd_sc_hd__a21boi_2
+*I *52134:A I *D sky130_fd_sc_hd__xnor2_4
+*I *51986:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52007:A1 0
+2 *52134:A 0.000162393
+3 *51986:X 0.000603751
+4 *45:7 0.000766144
+5 *52134:A *336:DIODE 0
+6 *52134:A *51985:B 1.19309e-05
+7 *52134:A *52133:B 0
+8 *45:7 *51985:B 0.000219828
+9 *45:7 *52007:A2 3.18676e-05
+10 *45:7 *66:8 9.74582e-05
+11 *44:10 *45:7 9.27866e-05
+*RES
+1 *51986:X *45:7 11.5804 
+2 *45:7 *52134:A 21.1571 
+3 *45:7 *52007:A1 9.3 
+*END
+
+*D_NET *46 0.00259083
+*CONN
+*I *52006:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52005:A I *D sky130_fd_sc_hd__nand3_1
+*I *51987:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52006:B1 0
+2 *52005:A 0.000146565
+3 *51987:Y 0.000599595
+4 *46:10 0.00074616
+5 *52005:A *52005:B 0.000281769
+6 *52005:A *52005:C 3.28977e-05
+7 *52005:A *52006:A2 0.000100151
+8 *52005:A *64:9 4.35336e-05
+9 *46:10 *52004:B 1.74352e-05
+10 *46:10 *52131:B 0.000495276
+11 *46:10 *52132:A 0.000127446
+*RES
+1 *51987:Y *46:10 27.05 
+2 *46:10 *52005:A 13.5679 
+3 *46:10 *52006:B1 9.3 
+*END
+
+*D_NET *47 0.000573287
+*CONN
+*I *51989:B I *D sky130_fd_sc_hd__xor2_1
+*I *51988:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51989:B 8.41541e-05
+2 *51988:Y 8.41541e-05
+3 *51989:B *259:20 0.000119135
+4 *51989:B *261:23 1.74352e-05
+5 *51988:B *51989:B 0.000268409
+*RES
+1 *51988:Y *51989:B 21.6179 
+*END
+
+*D_NET *48 0.000765303
+*CONN
+*I *51999:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51989:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51999:A1 0.000299396
+2 *51989:X 0.000299396
+3 *51999:A1 *51999:A2 0
+4 *51999:A1 *55:10 0
+5 *51999:A1 *225:22 1.41706e-05
+6 *51975:B1 *51999:A1 0.00015234
+*RES
+1 *51989:X *51999:A1 32.1357 
+*END
+
+*D_NET *49 0.000824338
+*CONN
+*I *51992:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51990:X O *D sky130_fd_sc_hd__and2b_1
+*CAP
+1 *51992:A2 0.000144024
+2 *51990:X 0.000144024
+3 *51992:A2 *51990:A_N 9.18159e-05
+4 *51992:A2 *51992:A1 0.000262948
+5 *51992:A2 *51992:B1 2.28335e-05
+6 *51992:A2 *232:8 0.000101545
+7 *51992:A2 *282:10 5.71472e-05
+*RES
+1 *51990:X *51992:A2 31.6 
+*END
+
+*D_NET *50 0.000394664
+*CONN
+*I *51992:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *51991:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *51992:B1 0.000135273
+2 *51991:X 0.000135273
+3 *51992:B1 *51992:A1 0
+4 *51992:B1 *51:8 4.15914e-05
+5 *51992:B1 *232:8 4.46186e-06
+6 *51992:B1 *281:47 5.52302e-05
+7 *51992:A2 *51992:B1 2.28335e-05
+*RES
+1 *51991:X *51992:B1 30.0821 
+*END
+
+*D_NET *51 0.00178356
+*CONN
+*I *51993:B I *D sky130_fd_sc_hd__nand2_1
+*I *51995:B I *D sky130_fd_sc_hd__nor2_1
+*I *51992:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *51993:B 0
+2 *51995:B 5.56845e-05
+3 *51992:X 0.000613138
+4 *51:8 0.000668822
+5 *51995:B *207:13 0.000272371
+6 *51995:B *258:8 0.000103004
+7 *51:8 *51972:A1_N 0
+8 *51:8 *51990:A_N 2.07158e-05
+9 *51:8 *51991:A1 8.23597e-06
+10 *51:8 *51991:B2 0
+11 *51:8 *51996:A1 0
+12 *51:8 *192:37 0
+13 *51:8 *232:8 0
+14 *51:8 *278:81 0
+15 *51:8 *281:47 0
+16 *51992:B1 *51:8 4.15914e-05
+*RES
+1 *51992:X *51:8 27.2286 
+2 *51:8 *51995:B 11.8893 
+3 *51:8 *51993:B 9.3 
+*END
+
+*D_NET *52 0.001085
+*CONN
+*I *51996:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51993:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51996:A1 0.00026489
+2 *51993:Y 0.00026489
+3 *51996:A1 *51971:A1 0.00014183
+4 *51996:A1 *51996:B1 0.000100823
+5 *51996:A1 *55:10 1.18064e-05
+6 *51996:A1 *207:13 0.000227539
+7 *51996:A1 *278:70 7.32272e-05
+8 *51:8 *51996:A1 0
+*RES
+1 *51993:Y *51996:A1 32.7786 
+*END
+
+*D_NET *53 0.000921336
+*CONN
+*I *51996:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *51994:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51996:A2 0.000326884
+2 *51994:Y 0.000326884
+3 *51996:A2 *55:10 6.42145e-05
+4 *51996:A2 *207:13 1.24368e-05
+5 *51996:A2 *207:19 0.000190917
+6 *31:8 *51996:A2 0
+*RES
+1 *51994:Y *51996:A2 32.6536 
+*END
+
+*D_NET *54 0.000520622
+*CONN
+*I *51996:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51995:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51996:B1 0.000111444
+2 *51995:Y 0.000111444
+3 *51996:B1 *55:10 0.000100823
+4 *51996:B1 *207:13 9.60875e-05
+5 *51996:A1 *51996:B1 0.000100823
+*RES
+1 *51995:Y *51996:B1 29.8857 
+*END
+
+*D_NET *55 0.00208173
+*CONN
+*I *51998:A2 I *D sky130_fd_sc_hd__o21ai_1
+*I *51997:B I *D sky130_fd_sc_hd__nand2_1
+*I *51996:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *51998:A2 7.17241e-05
+2 *51997:B 0
+3 *51996:Y 0.000363458
+4 *55:10 0.000435182
+5 *51998:A2 *225:15 0.000358971
+6 *51998:A2 *261:23 0.000271345
+7 *55:10 *51971:A1 5.52302e-05
+8 *55:10 *51971:S 0
+9 *55:10 *51999:A2 6.65302e-05
+10 *55:10 *58:6 0.0002253
+11 *55:10 *279:31 5.71472e-05
+12 *51996:A1 *55:10 1.18064e-05
+13 *51996:A2 *55:10 6.42145e-05
+14 *51996:B1 *55:10 0.000100823
+15 *51999:A1 *55:10 0
+16 *31:8 *55:10 0
+*RES
+1 *51996:Y *55:10 26.55 
+2 *55:10 *51997:B 9.3 
+3 *55:10 *51998:A2 12.7107 
+*END
+
+*D_NET *56 0.00022018
+*CONN
+*I *51999:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *51997:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51999:A2 7.68248e-05
+2 *51997:Y 7.68248e-05
+3 *51975:B1 *51999:A2 0
+4 *51999:A1 *51999:A2 0
+5 *55:10 *51999:A2 6.65302e-05
+*RES
+1 *51997:Y *51999:A2 29.2429 
+*END
+
+*D_NET *57 0.000457107
+*CONN
+*I *51999:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51998:Y O *D sky130_fd_sc_hd__o21ai_1
+*CAP
+1 *51999:B1 0.000228554
+2 *51998:Y 0.000228554
+3 *51999:B1 *58:6 0
+*RES
+1 *51998:Y *51999:B1 31.1179 
+*END
+
+*D_NET *58 0.00228341
+*CONN
+*I *52002:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52000:B I *D sky130_fd_sc_hd__nand2_1
+*I *51999:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52002:B1 0.000284082
+2 *52000:B 0
+3 *51999:Y 0.000557692
+4 *58:6 0.000841774
+5 *52002:B1 *345:DIODE 0
+6 *52002:B1 *52003:B 0.000227539
+7 *52002:B1 *59:8 0
+8 *52002:B1 *60:10 0
+9 *52002:B1 *261:29 9.90431e-05
+10 *58:6 *308:DIODE 0
+11 *58:6 *51976:A 4.79842e-05
+12 *58:6 *60:10 0
+13 *58:6 *225:22 0
+14 *58:6 *261:29 0
+15 *51999:B1 *58:6 0
+16 *55:10 *58:6 0.0002253
+*RES
+1 *51999:Y *58:6 24.2464 
+2 *58:6 *52000:B 13.8 
+3 *58:6 *52002:B1 19.175 
+*END
+
+*D_NET *59 0.00185724
+*CONN
+*I *52006:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *52005:B I *D sky130_fd_sc_hd__nand3_1
+*I *52003:A I *D sky130_fd_sc_hd__and2_1
+*I *52000:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52006:A1 0
+2 *52005:B 0.000228113
+3 *52003:A 0
+4 *52000:Y 0.000159559
+5 *59:21 0.000512021
+6 *59:8 0.000443467
+7 *52005:B *52005:C 1.74352e-05
+8 *59:8 *345:DIODE 0
+9 *59:8 *60:10 0
+10 *59:8 *266:101 1.33343e-05
+11 *59:8 *266:103 0.00010096
+12 *59:21 *52132:A 7.83587e-05
+13 *59:21 *60:10 0
+14 *59:21 *62:8 2.22278e-05
+15 *59:21 *63:18 0
+16 *52002:B1 *59:8 0
+17 *52005:A *52005:B 0.000281769
+*RES
+1 *52000:Y *59:8 16.3893 
+2 *59:8 *52003:A 13.8 
+3 *59:8 *59:21 9.53571 
+4 *59:21 *52005:B 12.7286 
+5 *59:21 *52006:A1 9.3 
+*END
+
+*D_NET *60 0.00304479
+*CONN
+*I *52130:A I *D sky130_fd_sc_hd__or2_1
+*I *52004:A I *D sky130_fd_sc_hd__nand2_1
+*I *52001:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52130:A 7.20341e-05
+2 *52004:A 0.000478329
+3 *52001:X 0.000374102
+4 *60:10 0.000924465
+5 *52004:A *52130:B 0.000154978
+6 *52004:A *52131:A 0.000539415
+7 *52130:A *52130:B 5.52302e-05
+8 *52130:A *52131:B 4.88637e-05
+9 *60:10 *62:8 0
+10 *60:10 *261:29 0.000315172
+11 *60:10 *261:38 0
+12 *60:10 *265:57 5.33005e-05
+13 *51978:B1_N *60:10 2.89016e-05
+14 *52002:B1 *60:10 0
+15 *58:6 *60:10 0
+16 *59:8 *60:10 0
+17 *59:21 *60:10 0
+*RES
+1 *52001:X *60:10 25.9429 
+2 *60:10 *52004:A 17.4786 
+3 *60:10 *52130:A 11.0857 
+*END
+
+*D_NET *61 0.000546711
+*CONN
+*I *52003:B I *D sky130_fd_sc_hd__and2_1
+*I *52002:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52003:B 0.000159586
+2 *52002:X 0.000159586
+3 *52002:B1 *52003:B 0.000227539
+*RES
+1 *52002:X *52003:B 22.0107 
+*END
+
+*D_NET *62 0.00163344
+*CONN
+*I *52130:B I *D sky130_fd_sc_hd__or2_1
+*I *52004:B I *D sky130_fd_sc_hd__nand2_1
+*I *52003:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52130:B 4.36795e-05
+2 *52004:B 0.000142576
+3 *52003:X 0.000137747
+4 *62:8 0.000324003
+5 *52004:B *52131:A 0.000405131
+6 *52004:B *52131:B 3.32731e-05
+7 *52130:B *52131:A 2.28598e-05
+8 *52130:B *52131:B 0.000274294
+9 *52004:A *52130:B 0.000154978
+10 *52130:A *52130:B 5.52302e-05
+11 *46:10 *52004:B 1.74352e-05
+12 *59:21 *62:8 2.22278e-05
+13 *60:10 *62:8 0
+*RES
+1 *52003:X *62:8 20.2464 
+2 *62:8 *52004:B 13.5679 
+3 *62:8 *52130:B 11.8893 
+*END
+
+*D_NET *63 0.00222297
+*CONN
+*I *52006:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52005:C I *D sky130_fd_sc_hd__nand3_1
+*I *52131:A I *D sky130_fd_sc_hd__and2_1
+*I *52004:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52006:A2 4.9498e-05
+2 *52005:C 0.000100721
+3 *52131:A 0.000139681
+4 *52004:Y 0
+5 *63:18 0.00029191
+6 *63:4 0.000281373
+7 *52005:C *64:9 5.52238e-05
+8 *52006:A2 *64:9 0.000186669
+9 *63:18 *52132:A 0
+10 *52004:A *52131:A 0.000539415
+11 *52004:B *52131:A 0.000405131
+12 *52005:A *52005:C 3.28977e-05
+13 *52005:A *52006:A2 0.000100151
+14 *52005:B *52005:C 1.74352e-05
+15 *52130:B *52131:A 2.28598e-05
+16 *59:21 *63:18 0
+*RES
+1 *52004:Y *63:4 9.3 
+2 *63:4 *52131:A 15.3 
+3 *63:4 *63:18 10.9464 
+4 *63:18 *52005:C 11.4964 
+5 *63:18 *52006:A2 11.4964 
+*END
+
+*D_NET *64 0.00238965
+*CONN
+*I *52007:A2 I *D sky130_fd_sc_hd__a21boi_2
+*I *52133:B I *D sky130_fd_sc_hd__nand2_1
+*I *52005:Y O *D sky130_fd_sc_hd__nand3_1
+*CAP
+1 *52007:A2 7.69314e-05
+2 *52133:B 0.000223868
+3 *52005:Y 0.000423196
+4 *64:9 0.000723995
+5 *52007:A2 *66:8 0.000185643
+6 *52133:B *52133:A 8.32228e-05
+7 *52133:B *52134:B 6.97972e-05
+8 *64:9 *52007:B1_N 5.52302e-05
+9 *64:9 *65:5 0.000230475
+10 *52005:A *64:9 4.35336e-05
+11 *52005:C *64:9 5.52238e-05
+12 *52006:A2 *64:9 0.000186669
+13 *52134:A *52133:B 0
+14 *45:7 *52007:A2 3.18676e-05
+*RES
+1 *52005:Y *64:9 17.3714 
+2 *64:9 *52133:B 22.9786 
+3 *64:9 *52007:A2 11.4786 
+*END
+
+*D_NET *65 0.00119694
+*CONN
+*I *52007:B1_N I *D sky130_fd_sc_hd__a21boi_2
+*I *52133:A I *D sky130_fd_sc_hd__nand2_1
+*I *52006:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52007:B1_N 1.72982e-05
+2 *52133:A 0.000227722
+3 *52006:X 7.64381e-05
+4 *65:5 0.000321458
+5 *52133:A *52132:A 0
+6 *52133:A *52134:B 0.000129868
+7 *52133:A *270:6 0
+8 *52133:A *271:5 5.52302e-05
+9 *52133:B *52133:A 8.32228e-05
+10 *64:9 *52007:B1_N 5.52302e-05
+11 *64:9 *65:5 0.000230475
+*RES
+1 *52006:X *65:5 11.4786 
+2 *65:5 *52133:A 23.5143 
+3 *65:5 *52007:B1_N 9.83571 
+*END
+
+*D_NET *66 0.00278598
+*CONN
+*I *52044:B I *D sky130_fd_sc_hd__nor2_1
+*I *52008:B I *D sky130_fd_sc_hd__xor2_4
+*I *52007:Y O *D sky130_fd_sc_hd__a21boi_2
+*CAP
+1 *52044:B 3.82519e-05
+2 *52008:B 0.0003253
+3 *52007:Y 0.000462488
+4 *66:8 0.000826039
+5 *52044:B *51985:A 0
+6 *66:8 *51985:A 0
+7 *66:8 *51985:B 0.000399848
+8 *52007:A2 *66:8 0.000185643
+9 *52044:A *52008:B 0.000351921
+10 *44:10 *52044:B 0
+11 *44:10 *66:8 9.90367e-05
+12 *45:7 *66:8 9.74582e-05
+*RES
+1 *52007:Y *66:8 23.3714 
+2 *66:8 *52008:B 20.1214 
+3 *66:8 *52044:B 14.5321 
+*END
+
+*D_NET *67 0.00060374
+*CONN
+*I *52045:A2 I *D sky130_fd_sc_hd__a21oi_4
+*I *52009:B I *D sky130_fd_sc_hd__xor2_4
+*I *52008:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52045:A2 0.000146676
+2 *52009:B 0
+3 *52008:X 0.000155194
+4 *67:8 0.00030187
+5 *52045:A2 *52045:B1 0
+6 *52045:A2 *273:12 0
+7 *67:8 *52045:B1 0
+8 *52045:A1 *52045:A2 0
+9 *52045:A1 *67:8 0
+*RES
+1 *52008:X *67:8 6.91964 
+2 *67:8 *52009:B 13.8 
+3 *67:8 *52045:A2 16.3536 
+*END
+
+*D_NET *68 0.00432456
+*CONN
+*I *52014:A I *D sky130_fd_sc_hd__xor2_1
+*I *52050:B I *D sky130_fd_sc_hd__and2b_1
+*I *52010:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52014:A 7.87362e-05
+2 *52050:B 0.000333664
+3 *52010:Y 0.00121579
+4 *68:5 0.00162819
+5 *52014:A *191:6 0
+6 *52014:A *193:113 0.000125731
+7 *52050:B *52050:A_N 8.35655e-05
+8 *52050:B *52051:B1 0.000142856
+9 *68:5 *52010:B 0.000443654
+10 *68:5 *52012:C 0.000272371
+*RES
+1 *52010:Y *68:5 24.6214 
+2 *68:5 *52050:B 15.6929 
+3 *68:5 *52014:A 19.9429 
+*END
+
+*D_NET *69 0.00280037
+*CONN
+*I *52013:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *52011:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52013:A0 0.000715673
+2 *52011:Y 0.000715673
+3 *52013:A0 *51902:A 0.000265385
+4 *52013:A0 *51902:B 0.000673614
+5 *52013:A0 *51903:B1 0.00018372
+6 *52013:A0 *193:113 0.000236313
+7 *52013:A0 *203:69 9.99644e-06
+*RES
+1 *52011:Y *52013:A0 39.8143 
+*END
+
+*D_NET *70 0.00136202
+*CONN
+*I *52051:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52013:S I *D sky130_fd_sc_hd__mux2_1
+*I *52012:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52051:A2 1.32253e-05
+2 *52013:S 0.000110398
+3 *52012:X 0.000215153
+4 *70:7 0.000338777
+5 *52013:S *193:117 0.000106542
+6 *52051:A2 *187:39 1.92905e-05
+7 *52051:A2 *283:39 2.44318e-05
+8 *70:7 *187:39 0.000258074
+9 *70:7 *283:11 7.3237e-05
+10 *70:7 *283:39 0.000202891
+*RES
+1 *52012:X *70:7 16.3179 
+2 *70:7 *52013:S 20.8536 
+3 *70:7 *52051:A2 9.83571 
+*END
+
+*D_NET *71 0.0014924
+*CONN
+*I *52050:A_N I *D sky130_fd_sc_hd__and2b_1
+*I *52014:B I *D sky130_fd_sc_hd__xor2_1
+*I *52013:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *52050:A_N 0.00034827
+2 *52014:B 0.00016122
+3 *52013:X 0
+4 *71:4 0.00050949
+5 *52014:B *51902:A 5.26184e-05
+6 *52014:B *207:73 0.00022266
+7 *52014:B *281:104 0.000114577
+8 *52050:B *52050:A_N 8.35655e-05
+*RES
+1 *52013:X *71:4 9.3 
+2 *71:4 *52014:B 22.425 
+3 *71:4 *52050:A_N 13.9607 
+*END
+
+*D_NET *72 0.00108635
+*CONN
+*I *52018:A I *D sky130_fd_sc_hd__nor2_1
+*I *52019:A I *D sky130_fd_sc_hd__and2_1
+*I *52014:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52018:A 0.00017188
+2 *52019:A 0.000126114
+3 *52014:X 6.48825e-05
+4 *72:6 0.000362876
+5 *52018:A *51905:B 0
+6 *52018:A *52019:B 0
+7 *52018:A *74:5 5.52238e-05
+8 *52019:A *203:69 0.000175502
+9 *72:6 *51902:A 0.000129868
+*RES
+1 *52014:X *72:6 15.4429 
+2 *72:6 *52019:A 16.8 
+3 *72:6 *52018:A 16.8893 
+*END
+
+*D_NET *73 0.00123426
+*CONN
+*I *52017:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52056:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52015:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52017:A 0
+2 *52056:A1 0.00015787
+3 *52015:Y 0.000303351
+4 *73:9 0.000461222
+5 *52056:A1 *52056:A2 0.000196276
+6 *52056:A1 *264:9 2.89016e-05
+7 *73:9 *52019:B 0
+8 *73:9 *52020:B 0
+9 *73:9 *52056:A2 5.52302e-05
+10 *73:9 *76:5 3.14078e-05
+11 *73:9 *225:108 0
+*RES
+1 *52015:Y *73:9 23.7286 
+2 *73:9 *52056:A1 21.6929 
+3 *73:9 *52017:A 9.3 
+*END
+
+*D_NET *74 0.00198533
+*CONN
+*I *52056:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52017:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52016:Y O *D sky130_fd_sc_hd__a22oi_2
+*CAP
+1 *52056:A2 0.000118568
+2 *52017:B 0
+3 *52016:Y 0.000392558
+4 *74:5 0.000511126
+5 *52056:A2 *52056:B1_N 5.26184e-05
+6 *52056:A2 *76:5 4.87854e-05
+7 *52056:A2 *225:108 0
+8 *74:5 *52016:A2 1.55885e-05
+9 *74:5 *52016:B2 5.52238e-05
+10 *74:5 *52018:B 0.000232399
+11 *74:5 *52019:B 4.8843e-05
+12 *74:5 *76:5 0.000202891
+13 *52018:A *74:5 5.52238e-05
+14 *52056:A1 *52056:A2 0.000196276
+15 *73:9 *52056:A2 5.52302e-05
+*RES
+1 *52016:Y *74:5 18.4607 
+2 *74:5 *52017:B 9.3 
+3 *74:5 *52056:A2 21.8 
+*END
+
+*D_NET *75 0.00092142
+*CONN
+*I *52019:B I *D sky130_fd_sc_hd__and2_1
+*I *52018:B I *D sky130_fd_sc_hd__nor2_1
+*I *52017:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52019:B 0.000204323
+2 *52018:B 0.000115766
+3 *52017:Y 0
+4 *75:4 0.000320089
+5 *52018:A *52019:B 0
+6 *73:9 *52019:B 0
+7 *74:5 *52018:B 0.000232399
+8 *74:5 *52019:B 4.8843e-05
+*RES
+1 *52017:Y *75:4 9.3 
+2 *75:4 *52018:B 12.2107 
+3 *75:4 *52019:B 21.3 
+*END
+
+*D_NET *76 0.00172185
+*CONN
+*I *52056:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52020:A I *D sky130_fd_sc_hd__or2_1
+*I *52018:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52056:B1_N 0.000100845
+2 *52020:A 0.000193676
+3 *52018:Y 0.000398553
+4 *76:5 0.000693073
+5 *52056:B1_N *225:108 0
+6 *52056:A2 *52056:B1_N 5.26184e-05
+7 *52056:A2 *76:5 4.87854e-05
+8 *73:9 *76:5 3.14078e-05
+9 *74:5 *76:5 0.000202891
+*RES
+1 *52018:Y *76:5 14.7643 
+2 *76:5 *52020:A 12.5143 
+3 *76:5 *52056:B1_N 20.2464 
+*END
+
+*D_NET *77 0.000784758
+*CONN
+*I *52020:B I *D sky130_fd_sc_hd__or2_1
+*I *52019:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52020:B 0.000181394
+2 *52019:X 0.000181394
+3 *52020:B *203:69 0.000271345
+4 *52020:B *225:108 0.000150625
+5 *73:9 *52020:B 0
+*RES
+1 *52019:X *52020:B 32.1357 
+*END
+
+*D_NET *78 0.00154827
+*CONN
+*I *52025:A I *D sky130_fd_sc_hd__and2_1
+*I *52024:A I *D sky130_fd_sc_hd__nor2_1
+*I *52020:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52025:A 0.000162426
+2 *52024:A 0
+3 *52020:X 0.0002274
+4 *78:8 0.000389826
+5 *52025:A *52024:B 2.26327e-05
+6 *52025:A *52025:B 0.000261738
+7 *52025:A *52058:A 0
+8 *52025:A *119:9 0.000274294
+9 *52025:A *265:13 4.88637e-05
+10 *78:8 *52024:B 5.80706e-06
+11 *78:8 *52058:A 0
+12 *78:8 *111:6 0
+13 *78:8 *225:108 0.000155285
+*RES
+1 *52020:X *78:8 18.4071 
+2 *78:8 *52024:A 13.8 
+3 *78:8 *52025:A 18.9429 
+*END
+
+*D_NET *79 0.00128012
+*CONN
+*I *52062:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52023:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52021:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52062:A1 0
+2 *52023:A 0.000154498
+3 *52021:Y 0.000376415
+4 *79:8 0.000530913
+5 *52023:A *52062:A2 8.9163e-05
+6 *52023:A *82:8 0
+7 *52023:A *225:108 0
+8 *79:8 *52026:A 9.7659e-05
+9 *79:8 *52026:B 2.56601e-05
+10 *79:8 *52062:A2 5.80706e-06
+*RES
+1 *52021:Y *79:8 18.8536 
+2 *79:8 *52023:A 16.6571 
+3 *79:8 *52062:A1 13.8 
+*END
+
+*D_NET *80 0.0014031
+*CONN
+*I *52062:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52023:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52022:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52062:A2 0.000129474
+2 *52023:B 2.23854e-05
+3 *52022:Y 0.000148213
+4 *80:5 0.000300072
+5 *52062:A2 *82:8 5.94737e-05
+6 *52062:A2 *266:64 0.000139907
+7 *80:5 *52022:B1 1.33343e-05
+8 *80:5 *266:64 0.000495276
+9 *52023:A *52062:A2 8.9163e-05
+10 *79:8 *52062:A2 5.80706e-06
+*RES
+1 *52022:Y *80:5 13.9429 
+2 *80:5 *52023:B 9.72857 
+3 *80:5 *52062:A2 21.9071 
+*END
+
+*D_NET *81 0.00163405
+*CONN
+*I *52025:B I *D sky130_fd_sc_hd__and2_1
+*I *52024:B I *D sky130_fd_sc_hd__nor2_1
+*I *52023:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52025:B 0.000119265
+2 *52024:B 2.25532e-05
+3 *52023:Y 5.43463e-05
+4 *81:7 0.000196164
+5 *52024:B *225:108 5.58941e-05
+6 *52025:B *52021:A 8.07951e-05
+7 *52025:B *119:9 4.43256e-05
+8 *52025:B *225:108 8.98585e-05
+9 *52025:B *265:13 0.000274294
+10 *81:7 *82:8 0.000181796
+11 *81:7 *266:64 0.000224583
+12 *52025:A *52024:B 2.26327e-05
+13 *52025:A *52025:B 0.000261738
+14 *78:8 *52024:B 5.80706e-06
+*RES
+1 *52023:Y *81:7 15.9786 
+2 *81:7 *52024:B 14.5321 
+3 *81:7 *52025:B 18.6393 
+*END
+
+*D_NET *82 0.00127168
+*CONN
+*I *52026:A I *D sky130_fd_sc_hd__or2_1
+*I *52062:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52024:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52026:A 0.000175306
+2 *52062:B1_N 0
+3 *52024:Y 0.000193258
+4 *82:8 0.000368564
+5 *52026:A *52021:A 5.63007e-05
+6 *52026:A *52026:B 5.01213e-05
+7 *82:8 *52021:A 2.91887e-05
+8 *82:8 *225:108 3.71496e-05
+9 *82:8 *266:64 2.28598e-05
+10 *52023:A *82:8 0
+11 *52062:A2 *82:8 5.94737e-05
+12 *79:8 *52026:A 9.7659e-05
+13 *81:7 *82:8 0.000181796
+*RES
+1 *52024:Y *82:8 18.5321 
+2 *82:8 *52062:B1_N 13.8 
+3 *82:8 *52026:A 17.8179 
+*END
+
+*D_NET *83 0.00121597
+*CONN
+*I *52026:B I *D sky130_fd_sc_hd__or2_1
+*I *52025:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52026:B 0.000347303
+2 *52025:X 0.000347303
+3 *52026:B *265:13 0.000445577
+4 *52026:A *52026:B 5.01213e-05
+5 *79:8 *52026:B 2.56601e-05
+*RES
+1 *52025:X *52026:B 33.1714 
+*END
+
+*D_NET *84 0.00150056
+*CONN
+*I *52031:A I *D sky130_fd_sc_hd__and2_1
+*I *52030:A I *D sky130_fd_sc_hd__nor2_1
+*I *52026:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52031:A 0
+2 *52030:A 0.000298557
+3 *52026:X 0.0002479
+4 *84:5 0.000546457
+5 *52030:A *52030:B 0.000363837
+6 *52030:A *87:11 4.38128e-05
+*RES
+1 *52026:X *84:5 13.5321 
+2 *84:5 *52030:A 15.2107 
+3 *84:5 *52031:A 9.3 
+*END
+
+*D_NET *85 0.00184917
+*CONN
+*I *52029:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52067:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52027:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52029:A 0.000229752
+2 *52067:A1 2.36086e-05
+3 *52027:Y 4.68469e-05
+4 *85:5 0.000300208
+5 *52029:A *52029:B 0.000315974
+6 *52029:A *86:5 4.43256e-05
+7 *52029:A *124:11 0.000404707
+8 *52029:A *266:72 5.52238e-05
+9 *52067:A1 *52027:B 0
+10 *52067:A1 *52067:A2 5.7661e-06
+11 *52067:A1 *266:72 0
+12 *85:5 *86:5 0.000149489
+13 *85:5 *266:72 0.000273269
+*RES
+1 *52027:Y *85:5 11.8893 
+2 *85:5 *52067:A1 9.72857 
+3 *85:5 *52029:A 16.425 
+*END
+
+*D_NET *86 0.00176694
+*CONN
+*I *52029:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52067:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52028:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52029:B 0.000223817
+2 *52067:A2 2.03441e-05
+3 *52028:X 0.000270837
+4 *86:5 0.000514998
+5 *52029:B *87:11 5.52302e-05
+6 *86:5 *266:72 1.21289e-05
+7 *86:5 *266:74 0.000154027
+8 *52029:A *52029:B 0.000315974
+9 *52029:A *86:5 4.43256e-05
+10 *52067:A1 *52067:A2 5.7661e-06
+11 *85:5 *86:5 0.000149489
+*RES
+1 *52028:X *86:5 15.5857 
+2 *86:5 *52067:A2 9.72857 
+3 *86:5 *52029:B 14.7643 
+*END
+
+*D_NET *87 0.00112108
+*CONN
+*I *52031:B I *D sky130_fd_sc_hd__and2_1
+*I *52030:B I *D sky130_fd_sc_hd__nor2_1
+*I *52029:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52031:B 0
+2 *52030:B 7.47357e-05
+3 *52029:Y 0.000151188
+4 *87:11 0.000225924
+5 *52030:B *52032:B 4.01768e-05
+6 *52030:B *88:8 5.76121e-05
+7 *87:11 *52032:B 0.000108566
+8 *87:11 *266:72 0
+9 *52029:B *87:11 5.52302e-05
+10 *52030:A *52030:B 0.000363837
+11 *52030:A *87:11 4.38128e-05
+*RES
+1 *52029:Y *87:11 21.6214 
+2 *87:11 *52030:B 12.7107 
+3 *87:11 *52031:B 9.3 
+*END
+
+*D_NET *88 0.00109451
+*CONN
+*I *52032:A I *D sky130_fd_sc_hd__nor2_1
+*I *52067:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52030:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52032:A 0.000162757
+2 *52067:B1_N 0
+3 *52030:Y 0.000212837
+4 *88:8 0.000375594
+5 *52032:A *52032:B 0
+6 *52032:A *90:5 0.000142856
+7 *52032:A *90:14 0
+8 *52032:A *212:99 0.000142856
+9 *52032:A *266:72 0
+10 *88:8 *52032:B 0
+11 *88:8 *266:72 0
+12 *52030:B *88:8 5.76121e-05
+*RES
+1 *52030:Y *88:8 17.1036 
+2 *88:8 *52067:B1_N 13.8 
+3 *88:8 *52032:A 17.4071 
+*END
+
+*D_NET *89 0.000744245
+*CONN
+*I *52032:B I *D sky130_fd_sc_hd__nor2_1
+*I *52031:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52032:B 0.000297751
+2 *52031:X 0.000297751
+3 *52030:B *52032:B 4.01768e-05
+4 *52032:A *52032:B 0
+5 *87:11 *52032:B 0.000108566
+6 *88:8 *52032:B 0
+*RES
+1 *52031:X *52032:B 32.6179 
+*END
+
+*D_NET *90 0.00313808
+*CONN
+*I *52072:A1 I *D sky130_fd_sc_hd__a21boi_1
+*I *52037:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52036:A I *D sky130_fd_sc_hd__and3_1
+*I *52032:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52072:A1 0.000304674
+2 *52037:B1 9.9692e-05
+3 *52036:A 0.000115817
+4 *52032:Y 0.000200864
+5 *90:14 0.000544572
+6 *90:5 0.000456887
+7 *52036:A *52036:C 0.000106143
+8 *52036:A *212:99 9.92409e-05
+9 *52037:B1 *52037:A1 2.44318e-05
+10 *52037:B1 *52037:A2 0.000230482
+11 *52037:B1 *52071:B 0.000199934
+12 *52037:B1 *268:60 0
+13 *52072:A1 *52036:B 4.56437e-05
+14 *52072:A1 *52038:B 0
+15 *52072:A1 *52072:B1_N 0.000101545
+16 *52072:A1 *129:5 1.55885e-05
+17 *52072:A1 *267:85 0.000135028
+18 *90:5 *212:99 0.000166485
+19 *90:14 *52036:B 0.000148196
+20 *90:14 *52036:C 0
+21 *90:14 *52038:B 0
+22 *90:14 *212:99 0
+23 *52032:A *90:5 0.000142856
+24 *52032:A *90:14 0
+*RES
+1 *52032:Y *90:5 13.5321 
+2 *90:5 *52036:A 11.8893 
+3 *90:5 *90:14 7.35714 
+4 *90:14 *52037:B1 17.6393 
+5 *90:14 *52072:A1 18.3357 
+*END
+
+*D_NET *91 0.00253399
+*CONN
+*I *52035:C1 I *D sky130_fd_sc_hd__a211o_1
+*I *52034:A2 I *D sky130_fd_sc_hd__o211ai_1
+*I *52033:X O *D sky130_fd_sc_hd__and3b_1
+*CAP
+1 *52035:C1 5.2157e-05
+2 *52034:A2 0.000141586
+3 *52033:X 0.000482719
+4 *91:8 0.000676461
+5 *52034:A2 *52034:A1 0.000333743
+6 *52034:A2 *232:98 0.000358977
+7 *52034:A2 *249:28 5.52302e-05
+8 *52034:A2 *267:90 2.54632e-05
+9 *52035:C1 *52035:A2 0
+10 *91:8 *51959:A 0
+11 *91:8 *51959:B 0
+12 *91:8 *52035:A2 0
+13 *91:8 *52036:C 0
+14 *91:8 *232:95 0
+15 *91:8 *266:74 0.00040765
+*RES
+1 *52033:X *91:8 21.3893 
+2 *91:8 *52034:A2 18.8536 
+3 *91:8 *52035:C1 14.5321 
+*END
+
+*D_NET *92 0.00196459
+*CONN
+*I *52037:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52072:B1_N I *D sky130_fd_sc_hd__a21boi_1
+*I *52036:B I *D sky130_fd_sc_hd__and3_1
+*I *52034:Y O *D sky130_fd_sc_hd__o211ai_1
+*CAP
+1 *52037:A1 0.000118054
+2 *52072:B1_N 8.20772e-05
+3 *52036:B 0.00017451
+4 *52034:Y 0
+5 *92:7 0.000289997
+6 *92:4 0.000151464
+7 *52036:B *52036:C 0
+8 *52036:B *52038:A 0.000169939
+9 *52036:B *212:99 0.000142856
+10 *52037:A1 *52037:A2 0.000218045
+11 *52072:B1_N *52038:A 0.000137931
+12 *52072:B1_N *129:5 5.33005e-05
+13 *52072:B1_N *267:85 5.33005e-05
+14 *92:7 *52037:A2 5.33005e-05
+15 *52037:B1 *52037:A1 2.44318e-05
+16 *52072:A1 *52036:B 4.56437e-05
+17 *52072:A1 *52072:B1_N 0.000101545
+18 *90:14 *52036:B 0.000148196
+*RES
+1 *52034:Y *92:4 9.3 
+2 *92:4 *92:7 5.03571 
+3 *92:7 *52036:B 18.1393 
+4 *92:7 *52072:B1_N 16.2821 
+5 *92:4 *52037:A1 11.8893 
+*END
+
+*D_NET *93 0.00262794
+*CONN
+*I *52037:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52072:A2 I *D sky130_fd_sc_hd__a21boi_1
+*I *52036:C I *D sky130_fd_sc_hd__and3_1
+*I *52035:X O *D sky130_fd_sc_hd__a211o_1
+*CAP
+1 *52037:A2 0.000247786
+2 *52072:A2 9.78013e-05
+3 *52036:C 0.000349015
+4 *52035:X 9.27009e-05
+5 *93:7 0.000446817
+6 *93:5 0.000340487
+7 *52036:C *52035:A2 0
+8 *52036:C *52038:A 0
+9 *52036:C *212:99 3.20153e-05
+10 *52036:C *232:95 0
+11 *52036:C *267:85 0
+12 *52037:A2 *52034:B1 5.33005e-05
+13 *52037:A2 *52034:C1 1.98839e-05
+14 *52037:A2 *52071:B 8.43535e-06
+15 *52037:A2 *267:90 0.000188875
+16 *52072:A2 *52038:A 0
+17 *52072:A2 *52042:B 0
+18 *52072:A2 *267:85 0
+19 *93:5 *267:90 0.00014285
+20 *52036:A *52036:C 0.000106143
+21 *52036:B *52036:C 0
+22 *52037:A1 *52037:A2 0.000218045
+23 *52037:B1 *52037:A2 0.000230482
+24 *90:14 *52036:C 0
+25 *91:8 *52036:C 0
+26 *92:7 *52037:A2 5.33005e-05
+*RES
+1 *52035:X *93:5 10.6571 
+2 *93:5 *93:7 4.5 
+3 *93:7 *52036:C 19.3 
+4 *93:7 *52072:A2 15.4429 
+5 *93:5 *52037:A2 15.2107 
+*END
+
+*D_NET *94 0.0016557
+*CONN
+*I *52038:A I *D sky130_fd_sc_hd__or2_2
+*I *52036:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52038:A 0.000445338
+2 *52036:X 0.000445338
+3 *52038:A *52038:B 0
+4 *52038:A *52048:B1 0
+5 *52038:A *96:8 7.50601e-05
+6 *52038:A *100:8 0
+7 *52038:A *105:7 0.000139913
+8 *52038:A *267:85 0.000168939
+9 *52038:A *268:66 7.3237e-05
+10 *52036:B *52038:A 0.000169939
+11 *52036:C *52038:A 0
+12 *52072:A2 *52038:A 0
+13 *52072:B1_N *52038:A 0.000137931
+*RES
+1 *52036:X *52038:A 37.5821 
+*END
+
+*D_NET *95 0.00137348
+*CONN
+*I *52038:B I *D sky130_fd_sc_hd__or2_2
+*I *52037:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52038:B 0.00050819
+2 *52037:Y 0.00050819
+3 *52038:B *96:8 0
+4 *52038:B *105:7 0.000230475
+5 *52038:B *267:78 0
+6 *52038:B *268:66 0.000126629
+7 *52038:A *52038:B 0
+8 *52072:A1 *52038:B 0
+9 *90:14 *52038:B 0
+*RES
+1 *52037:Y *52038:B 37.1893 
+*END
+
+*D_NET *96 0.00151188
+*CONN
+*I *52047:A I *D sky130_fd_sc_hd__or2_1
+*I *52043:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52038:X O *D sky130_fd_sc_hd__or2_2
+*CAP
+1 *52047:A 0.000291601
+2 *52043:A 0
+3 *52038:X 0.000189666
+4 *96:8 0.000481267
+5 *52047:A *52043:B 0.000318107
+6 *52047:A *52047:B 5.52238e-05
+7 *52047:A *52048:B1 0.00010096
+8 *96:8 *52048:B1 0
+9 *52038:A *96:8 7.50601e-05
+10 *52038:B *96:8 0
+*RES
+1 *52038:X *96:8 21.4607 
+2 *96:8 *52043:A 9.3 
+3 *96:8 *52047:A 15.1929 
+*END
+
+*D_NET *97 0.000961618
+*CONN
+*I *52040:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *52039:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52040:B1 0.000264995
+2 *52039:Y 0.000264995
+3 *52040:B1 *52040:A1 1.41706e-05
+4 *52040:B1 *103:5 0.000266846
+5 *52039:A *52040:B1 0.000150611
+*RES
+1 *52039:Y *52040:B1 32.1357 
+*END
+
+*D_NET *98 0.00353526
+*CONN
+*I *52048:A1 I *D sky130_fd_sc_hd__o21ai_4
+*I *52042:A I *D sky130_fd_sc_hd__xnor2_2
+*I *52040:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *52048:A1 8.99208e-05
+2 *52042:A 0.000389968
+3 *52040:X 0.000560659
+4 *98:7 0.00104055
+5 *52042:A *52040:A1 0
+6 *52042:A *52042:B 0
+7 *52042:A *252:8 0
+8 *52048:A1 *354:DIODE 0
+9 *52048:A1 *99:7 0.00036192
+10 *52048:A1 *268:66 0.00030669
+11 *52048:A1 *268:70 5.52302e-05
+12 *52048:A1 *272:145 0
+13 *98:7 *99:7 0.000186662
+14 *98:7 *268:70 5.91367e-05
+15 *98:7 *268:78 0.000484524
+*RES
+1 *52040:X *98:7 21.7286 
+2 *98:7 *52042:A 20.3536 
+3 *98:7 *52048:A1 17.9429 
+*END
+
+*D_NET *99 0.00196069
+*CONN
+*I *52048:A2 I *D sky130_fd_sc_hd__o21ai_4
+*I *52042:B I *D sky130_fd_sc_hd__xnor2_2
+*I *52041:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52048:A2 3.64339e-05
+2 *52042:B 0.000308994
+3 *52041:X 0.000243107
+4 *99:7 0.000588535
+5 *52042:B *52048:B1 0
+6 *52042:B *100:8 0
+7 *52048:A2 *268:66 9.90431e-05
+8 *99:7 *268:66 3.9846e-05
+9 *99:7 *268:70 9.61455e-05
+10 *52042:A *52042:B 0
+11 *52048:A1 *99:7 0.00036192
+12 *52072:A2 *52042:B 0
+13 *98:7 *99:7 0.000186662
+*RES
+1 *52041:X *99:7 15.6036 
+2 *99:7 *52042:B 23.2821 
+3 *99:7 *52048:A2 10.2464 
+*END
+
+*D_NET *100 0.0010032
+*CONN
+*I *52043:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52047:B I *D sky130_fd_sc_hd__or2_1
+*I *52042:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52043:B 0.000102275
+2 *52047:B 7.25698e-05
+3 *52042:Y 0.000140087
+4 *100:8 0.000314932
+5 *52038:A *100:8 0
+6 *52042:B *100:8 0
+7 *52047:A *52043:B 0.000318107
+8 *52047:A *52047:B 5.52238e-05
+*RES
+1 *52042:Y *100:8 20.8536 
+2 *100:8 *52047:B 10.6571 
+3 *100:8 *52043:B 12.3 
+*END
+
+*D_NET *101 0.00183066
+*CONN
+*I *52076:A I *D sky130_fd_sc_hd__nand3_1
+*I *52075:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52046:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52043:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52076:A 0.000213628
+2 *52075:A1 0.000315858
+3 *52046:A 0
+4 *52043:Y 0.000116783
+5 *101:8 0.000432673
+6 *101:5 0.000447225
+7 *52075:A1 *52046:B 0
+8 *52075:A1 *52075:B1 0
+9 *52075:A1 *52076:B 2.44318e-05
+10 *52075:A1 *103:17 0.000274294
+11 *52076:A *133:7 5.7661e-06
+12 *101:8 *52046:B 0
+13 *101:8 *52076:B 0
+14 *101:8 *268:66 0
+*RES
+1 *52043:Y *101:5 11.0679 
+2 *101:5 *101:8 6.44643 
+3 *101:8 *52046:A 13.8 
+4 *101:8 *52075:A1 19.9607 
+5 *101:5 *52076:A 12.7286 
+*END
+
+*D_NET *102 0.00101372
+*CONN
+*I *52045:B1 I *D sky130_fd_sc_hd__a21oi_4
+*I *52044:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52045:B1 0.0004199
+2 *52044:Y 0.0004199
+3 *52045:B1 *273:12 0
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+5 *52045:A2 *52045:B1 0
+6 *67:8 *52045:B1 0
+*RES
+1 *52044:Y *52045:B1 35.2786 
+*END
+
+*D_NET *103 0.00687833
+*CONN
+*I *52075:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52076:B I *D sky130_fd_sc_hd__nand3_1
+*I *52046:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52045:Y O *D sky130_fd_sc_hd__a21oi_4
+*CAP
+1 *52075:A2 0
+2 *52076:B 0.000263077
+3 *52046:B 0.000128838
+4 *52045:Y 0.00214374
+5 *103:17 0.000491103
+6 *103:5 0.0025006
+7 *52046:B *268:66 1.76039e-05
+8 *52076:B *52075:B1 0.000178819
+9 *52076:B *131:8 5.80706e-06
+10 *103:5 *354:DIODE 0.00014285
+11 *52039:A *103:5 0.000269372
+12 *52040:B1 *103:5 0.000266846
+13 *52045:A1 *103:5 0.000170955
+14 *52075:A1 *52046:B 0
+15 *52075:A1 *52076:B 2.44318e-05
+16 *52075:A1 *103:17 0.000274294
+17 *101:8 *52046:B 0
+18 *101:8 *52076:B 0
+*RES
+1 *52045:Y *103:5 45.1571 
+2 *103:5 *52046:B 20.55 
+3 *103:5 *103:17 4.96429 
+4 *103:17 *52076:B 24.05 
+5 *103:17 *52075:A2 9.3 
+*END
+
+*D_NET *104 0.000429615
+*CONN
+*I *52048:B1 I *D sky130_fd_sc_hd__o21ai_4
+*I *52047:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52048:B1 0.000164327
+2 *52047:X 0.000164327
+3 *52038:A *52048:B1 0
+4 *52042:B *52048:B1 0
+5 *52047:A *52048:B1 0.00010096
+6 *96:8 *52048:B1 0
+*RES
+1 *52047:X *52048:B1 30.1893 
+*END
+
+*D_NET *105 0.00425815
+*CONN
+*I *52078:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52081:A1 I *D sky130_fd_sc_hd__a21o_2
+*I *52048:Y O *D sky130_fd_sc_hd__o21ai_4
+*CAP
+1 *52078:A 0.000403465
+2 *52081:A1 0
+3 *52048:Y 0.00142408
+4 *105:7 0.00182754
+5 *52078:A *52077:A 0
+6 *52078:A *52078:B 0
+7 *52078:A *132:8 0
+8 *52078:A *137:5 5.33334e-05
+9 *105:7 *268:66 0.000179337
+10 *52038:A *105:7 0.000139913
+11 *52038:B *105:7 0.000230475
+*RES
+1 *52048:Y *105:7 27.1036 
+2 *105:7 *52081:A1 9.3 
+3 *105:7 *52078:A 24.3536 
+*END
+
+*D_NET *106 0.0018233
+*CONN
+*I *52054:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52084:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52049:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52054:A 0.000429386
+2 *52084:A1 0
+3 *52049:Y 0.000136128
+4 *106:5 0.000565514
+5 *52054:A *52049:B 0
+6 *52054:A *52054:B 0
+7 *52054:A *52084:A2 5.52238e-05
+8 *52054:A *207:89 0.000151071
+9 *52054:A *281:115 0.000274294
+10 *106:5 *52084:A2 5.71472e-05
+11 *106:5 *108:9 9.93135e-05
+12 *106:5 *283:39 5.52238e-05
+*RES
+1 *52049:Y *106:5 12.3 
+2 *106:5 *52084:A1 9.3 
+3 *106:5 *52054:A 26.7107 
+*END
+
+*D_NET *107 0.00102902
+*CONN
+*I *52051:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52050:X O *D sky130_fd_sc_hd__and2b_1
+*CAP
+1 *52051:B1 0.000263049
+2 *52050:X 0.000263049
+3 *52051:B1 *51902:A 0
+4 *52051:B1 *52049:A 0.000230475
+5 *52051:B1 *193:117 0
+6 *52051:B1 *283:39 0.000129595
+7 *52050:B *52051:B1 0.000142856
+*RES
+1 *52050:X *52051:B1 33.0821 
+*END
+
+*D_NET *108 0.00275109
+*CONN
+*I *52053:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52083:C I *D sky130_fd_sc_hd__and3_1
+*I *52051:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52053:A 0.000150781
+2 *52083:C 5.88511e-05
+3 *52051:X 0.000183713
+4 *108:9 0.000393345
+5 *52053:A *52084:A2 3.38042e-05
+6 *52053:A *140:5 9.90367e-05
+7 *52053:A *187:57 0.000130456
+8 *52053:A *207:98 3.60438e-05
+9 *52053:A *207:102 0
+10 *52053:A *283:59 9.25014e-06
+11 *52083:C *52084:B1 0
+12 *52083:C *207:113 0
+13 *108:9 *52049:A 0.000229456
+14 *108:9 *52084:A2 0.000363466
+15 *108:9 *140:5 0.000317082
+16 *108:9 *187:49 0.000637272
+17 *108:9 *283:39 9.22103e-06
+18 *106:5 *108:9 9.93135e-05
+*RES
+1 *52051:X *108:9 19.0143 
+2 *108:9 *52083:C 10.4741 
+3 *108:9 *52053:A 22.3357 
+*END
+
+*D_NET *109 0.000670935
+*CONN
+*I *52053:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52052:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52053:B 6.1686e-05
+2 *52052:Y 6.1686e-05
+3 *52053:B *52052:A 0.000230482
+4 *52053:B *187:57 0.000317082
+*RES
+1 *52052:Y *52053:B 21.6 
+*END
+
+*D_NET *110 0.00147053
+*CONN
+*I *52054:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52084:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52053:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52054:B 0.000102455
+2 *52084:A2 0.000258425
+3 *52053:Y 0
+4 *110:5 0.00036088
+5 *52054:B *207:92 0
+6 *52054:B *281:115 3.17163e-05
+7 *52084:A2 *52084:B1 0.000154027
+8 *52084:A2 *187:57 5.33882e-05
+9 *52084:A2 *207:92 0
+10 *52053:A *52084:A2 3.38042e-05
+11 *52054:A *52054:B 0
+12 *52054:A *52084:A2 5.52238e-05
+13 *106:5 *52084:A2 5.71472e-05
+14 *108:9 *52084:A2 0.000363466
+*RES
+1 *52053:Y *110:5 13.8 
+2 *110:5 *52084:A2 21.0857 
+3 *110:5 *52054:B 15.7464 
+*END
+
+*D_NET *111 0.00165112
+*CONN
+*I *52058:A I *D sky130_fd_sc_hd__nor2_1
+*I *52059:A I *D sky130_fd_sc_hd__and2_1
+*I *52054:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52058:A 0.000212282
+2 *52059:A 1.40355e-05
+3 *52054:Y 0.000358776
+4 *111:6 0.000585094
+5 *52058:A *52058:B 0
+6 *52058:A *114:6 0
+7 *52058:A *266:64 5.41609e-05
+8 *52059:A *113:5 2.89114e-05
+9 *52059:A *264:9 5.52302e-05
+10 *111:6 *347:DIODE 0.000196269
+11 *111:6 *365:DIODE 4.48113e-05
+12 *111:6 *52057:B 0
+13 *111:6 *114:6 0
+14 *111:6 *225:108 0
+15 *111:6 *225:114 0
+16 *111:6 *281:115 0.000101545
+17 *52025:A *52058:A 0
+18 *78:8 *52058:A 0
+19 *78:8 *111:6 0
+*RES
+1 *52054:Y *111:6 20.6036 
+2 *111:6 *52059:A 14.3357 
+3 *111:6 *52058:A 17.7107 
+*END
+
+*D_NET *112 0.000832916
+*CONN
+*I *52090:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52057:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52055:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52090:A1 0.000200317
+2 *52057:A 3.72884e-05
+3 *52055:Y 9.78013e-05
+4 *112:6 0.000335406
+5 *52090:A1 *52057:B 6.26653e-05
+6 *52090:A1 *52090:A2 6.75704e-05
+7 *52090:A1 *203:76 0
+8 *52090:A1 *264:9 3.18676e-05
+9 *112:6 *203:69 0
+10 *112:6 *203:76 0
+*RES
+1 *52055:Y *112:6 15.4429 
+2 *112:6 *52057:A 14.3357 
+3 *112:6 *52090:A1 17.8536 
+*END
+
+*D_NET *113 0.00205153
+*CONN
+*I *52090:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52057:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52056:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52090:A2 7.39863e-05
+2 *52057:B 0.000147847
+3 *52056:X 0.000343743
+4 *113:5 0.000565576
+5 *52057:B *52058:B 1.52978e-05
+6 *52057:B *52090:B1_N 0
+7 *52057:B *114:6 9.24395e-05
+8 *52057:B *203:76 0
+9 *52090:A2 *52060:B 5.52302e-05
+10 *52090:A2 *264:9 2.42662e-05
+11 *113:5 *52059:B 0.000186662
+12 *113:5 *52060:B 0.00018372
+13 *113:5 *264:9 0.000203611
+14 *52059:A *113:5 2.89114e-05
+15 *52090:A1 *52057:B 6.26653e-05
+16 *52090:A1 *52090:A2 6.75704e-05
+17 *111:6 *52057:B 0
+*RES
+1 *52056:X *113:5 16.8179 
+2 *113:5 *52057:B 21.6929 
+3 *113:5 *52090:A2 11.0857 
+*END
+
+*D_NET *114 0.00111652
+*CONN
+*I *52058:B I *D sky130_fd_sc_hd__nor2_1
+*I *52059:B I *D sky130_fd_sc_hd__and2_1
+*I *52057:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52058:B 0.000155088
+2 *52059:B 3.17002e-05
+3 *52057:Y 0.000105804
+4 *114:6 0.000292592
+5 *52058:B *52060:B 3.5707e-05
+6 *52058:B *52090:B1_N 0
+7 *52058:B *115:9 9.90367e-05
+8 *52059:B *264:9 0.000102197
+9 *52057:B *52058:B 1.52978e-05
+10 *52057:B *114:6 9.24395e-05
+11 *52058:A *52058:B 0
+12 *52058:A *114:6 0
+13 *111:6 *114:6 0
+14 *113:5 *52059:B 0.000186662
+*RES
+1 *52057:Y *114:6 16.05 
+2 *114:6 *52059:B 15.5679 
+3 *114:6 *52058:B 16.9964 
+*END
+
+*D_NET *115 0.00103187
+*CONN
+*I *52090:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52060:A I *D sky130_fd_sc_hd__or2_1
+*I *52058:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52090:B1_N 0.000171505
+2 *52060:A 0
+3 *52058:Y 0.00013466
+4 *115:9 0.000306166
+5 *52090:B1_N *52060:B 0
+6 *52090:B1_N *203:76 4.79842e-05
+7 *52090:B1_N *203:85 1.78353e-05
+8 *52090:B1_N *266:64 7.03295e-05
+9 *115:9 *266:64 0.000184357
+10 *52057:B *52090:B1_N 0
+11 *52058:B *52090:B1_N 0
+12 *52058:B *115:9 9.90367e-05
+*RES
+1 *52058:Y *115:9 13.1571 
+2 *115:9 *52060:A 9.3 
+3 *115:9 *52090:B1_N 21.9071 
+*END
+
+*D_NET *116 0.000720863
+*CONN
+*I *52060:B I *D sky130_fd_sc_hd__or2_1
+*I *52059:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52060:B 0.000223103
+2 *52059:X 0.000223103
+3 *52058:B *52060:B 3.5707e-05
+4 *52090:A2 *52060:B 5.52302e-05
+5 *52090:B1_N *52060:B 0
+6 *113:5 *52060:B 0.00018372
+*RES
+1 *52059:X *52060:B 31.1179 
+*END
+
+*D_NET *117 0.0026317
+*CONN
+*I *52064:A I *D sky130_fd_sc_hd__nor2_1
+*I *52065:A I *D sky130_fd_sc_hd__and2_1
+*I *52060:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52064:A 0.000287244
+2 *52065:A 0.000176353
+3 *52060:X 0.000221343
+4 *117:6 0.00068494
+5 *52064:A *52064:B 0.000331985
+6 *52064:A *52066:B 5.33882e-05
+7 *52064:A *121:7 9.90431e-05
+8 *52064:A *203:120 0
+9 *52064:A *203:125 3.48705e-05
+10 *52065:A *52021:B 3.48705e-05
+11 *52065:A *52065:B 0.000227532
+12 *52065:A *52066:B 0.000149489
+13 *52065:A *52095:A2 5.52302e-05
+14 *52065:A *203:94 5.19805e-05
+15 *117:6 *52095:A2 9.77024e-05
+16 *117:6 *203:85 0
+17 *117:6 *203:94 0.000125724
+18 *117:6 *203:120 0
+*RES
+1 *52060:X *117:6 18.175 
+2 *117:6 *52065:A 18.8536 
+3 *117:6 *52064:A 20.3 
+*END
+
+*D_NET *118 0.00123554
+*CONN
+*I *52063:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52095:A1 I *D sky130_fd_sc_hd__o21bai_2
+*I *52061:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52063:A 0
+2 *52095:A1 0.000105565
+3 *52061:Y 0.000170268
+4 *118:7 0.000275833
+5 *52095:A1 *52064:B 4.46186e-06
+6 *52095:A1 *52095:A2 0.00017309
+7 *52095:A1 *119:9 5.52238e-05
+8 *52095:A1 *120:6 6.42242e-05
+9 *52095:A1 *265:13 9.60939e-05
+10 *118:7 *52061:A 8.66063e-05
+11 *118:7 *203:94 0.00014285
+12 *118:7 *265:13 6.13217e-05
+*RES
+1 *52061:Y *118:7 13.1393 
+2 *118:7 *52095:A1 21.4964 
+3 *118:7 *52063:A 9.3 
+*END
+
+*D_NET *119 0.00206478
+*CONN
+*I *52063:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52095:A2 I *D sky130_fd_sc_hd__o21bai_2
+*I *52062:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52063:B 0
+2 *52095:A2 9.95416e-05
+3 *52062:X 0.000419728
+4 *119:9 0.000519269
+5 *52095:A2 *203:94 2.89114e-05
+6 *119:9 *225:100 5.52238e-05
+7 *119:9 *265:13 0.000242238
+8 *52025:A *119:9 0.000274294
+9 *52025:B *119:9 4.43256e-05
+10 *52065:A *52095:A2 5.52302e-05
+11 *52095:A1 *52095:A2 0.00017309
+12 *52095:A1 *119:9 5.52238e-05
+13 *117:6 *52095:A2 9.77024e-05
+*RES
+1 *52062:X *119:9 18.6036 
+2 *119:9 *52095:A2 21.3893 
+3 *119:9 *52063:B 9.3 
+*END
+
+*D_NET *120 0.00206018
+*CONN
+*I *52064:B I *D sky130_fd_sc_hd__nor2_1
+*I *52065:B I *D sky130_fd_sc_hd__and2_1
+*I *52063:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52064:B 0.000304644
+2 *52065:B 5.01436e-05
+3 *52063:Y 8.06383e-05
+4 *120:6 0.000435426
+5 *52064:B *349:DIODE 0
+6 *52064:B *52066:A 0.000227526
+7 *52064:B *52066:B 4.35048e-05
+8 *52064:B *203:125 4.72917e-05
+9 *52064:B *267:62 0.000114665
+10 *52065:B *52021:B 2.89016e-05
+11 *52065:B *203:94 9.92409e-05
+12 *120:6 *349:DIODE 0
+13 *52064:A *52064:B 0.000331985
+14 *52065:A *52065:B 0.000227532
+15 *52095:A1 *52064:B 4.46186e-06
+16 *52095:A1 *120:6 6.42242e-05
+*RES
+1 *52063:Y *120:6 15.4429 
+2 *120:6 *52065:B 15.9786 
+3 *120:6 *52064:B 21.8357 
+*END
+
+*D_NET *121 0.00122408
+*CONN
+*I *52066:A I *D sky130_fd_sc_hd__or2_1
+*I *52095:B1_N I *D sky130_fd_sc_hd__o21bai_2
+*I *52064:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52066:A 9.04819e-05
+2 *52095:B1_N 7.41422e-05
+3 *52064:Y 6.59538e-05
+4 *121:7 0.000230578
+5 *52066:A *203:120 6.81083e-05
+6 *52066:A *203:125 5.33005e-05
+7 *52066:A *267:62 0.000160187
+8 *52095:B1_N *203:120 0.000154762
+9 *52064:A *121:7 9.90431e-05
+10 *52064:B *52066:A 0.000227526
+*RES
+1 *52064:Y *121:7 14.7464 
+2 *121:7 *52095:B1_N 15.7464 
+3 *121:7 *52066:A 17.0143 
+*END
+
+*D_NET *122 0.000776679
+*CONN
+*I *52066:B I *D sky130_fd_sc_hd__or2_1
+*I *52065:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52066:B 0.000265149
+2 *52065:X 0.000265149
+3 *52066:B *203:120 0
+4 *52064:A *52066:B 5.33882e-05
+5 *52064:B *52066:B 4.35048e-05
+6 *52065:A *52066:B 0.000149489
+*RES
+1 *52065:X *52066:B 32.1357 
+*END
+
+*D_NET *123 0.00119301
+*CONN
+*I *52070:A I *D sky130_fd_sc_hd__xor2_1
+*I *52100:A I *D sky130_fd_sc_hd__nor2_1
+*I *52066:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52070:A 0.000276338
+2 *52100:A 0
+3 *52066:X 0.000202047
+4 *123:8 0.000478385
+5 *52070:A *52070:B 0
+6 *52070:A *52100:B 0
+7 *52070:A *52102:A1 6.30292e-05
+8 *52070:A *52102:B1 0
+9 *52070:A *52103:A 2.84398e-05
+10 *52070:A *127:9 0
+11 *52070:A *157:12 0
+12 *123:8 *157:12 0
+13 *123:8 *267:62 0.000144773
+14 *123:8 *268:48 0
+*RES
+1 *52066:X *123:8 16.8 
+2 *123:8 *52100:A 13.8 
+3 *123:8 *52070:A 18.8357 
+*END
+
+*D_NET *124 0.00333741
+*CONN
+*I *52099:A I *D sky130_fd_sc_hd__nor2_1
+*I *52069:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52067:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52099:A 4.41691e-05
+2 *52069:A 0
+3 *52067:X 0.000742588
+4 *124:11 0.000786757
+5 *52099:A *52099:B 0.000350503
+6 *52099:A *125:9 5.71472e-05
+7 *52099:A *157:12 0.000394316
+8 *124:11 *52068:B 0.000119203
+9 *124:11 *125:9 0.000117148
+10 *124:11 *157:12 0.000139913
+11 *124:11 *267:72 0.000180962
+12 *52029:A *124:11 0.000404707
+*RES
+1 *52067:X *124:11 30.05 
+2 *124:11 *52069:A 9.3 
+3 *124:11 *52099:A 13.1214 
+*END
+
+*D_NET *125 0.00139079
+*CONN
+*I *52099:B I *D sky130_fd_sc_hd__nor2_1
+*I *52069:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52068:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52099:B 0.000105087
+2 *52069:B 0
+3 *52068:Y 0.000138445
+4 *125:9 0.000243532
+5 *52099:B *126:7 0.000320024
+6 *52099:B *157:12 4.88637e-05
+7 *125:9 *267:72 1.00375e-05
+8 *52099:A *52099:B 0.000350503
+9 *52099:A *125:9 5.71472e-05
+10 *124:11 *125:9 0.000117148
+*RES
+1 *52068:Y *125:9 21.1929 
+2 *125:9 *52069:B 9.3 
+3 *125:9 *52099:B 13.9607 
+*END
+
+*D_NET *126 0.00153364
+*CONN
+*I *52070:B I *D sky130_fd_sc_hd__xor2_1
+*I *52100:B I *D sky130_fd_sc_hd__nor2_1
+*I *52069:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52070:B 0.000116998
+2 *52100:B 6.00733e-05
+3 *52069:Y 0.00017953
+4 *126:7 0.000356601
+5 *52070:B *127:9 0
+6 *52100:B *155:7 2.77289e-05
+7 *52100:B *156:5 7.43578e-06
+8 *52100:B *268:48 0.00010096
+9 *126:7 *155:7 0.000271345
+10 *126:7 *157:12 9.22103e-06
+11 *126:7 *268:48 8.3725e-05
+12 *52070:A *52070:B 0
+13 *52070:A *52100:B 0
+14 *52099:B *126:7 0.000320024
+*RES
+1 *52069:Y *126:7 19.2643 
+2 *126:7 *52100:B 15.4786 
+3 *126:7 *52070:B 15.7464 
+*END
+
+*D_NET *127 0.00111971
+*CONN
+*I *52080:A1 I *D sky130_fd_sc_hd__a21o_2
+*I *52074:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52070:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52080:A1 0
+2 *52074:A 0.000188891
+3 *52070:X 0.000257988
+4 *127:9 0.000446879
+5 *52074:A *52080:A2 0.000178459
+6 *127:9 *52080:B1 3.34672e-05
+7 *127:9 *136:8 1.40306e-05
+8 *52070:A *127:9 0
+9 *52070:B *127:9 0
+*RES
+1 *52070:X *127:9 22.7286 
+2 *127:9 *52074:A 13.1393 
+3 *127:9 *52080:A1 9.3 
+*END
+
+*D_NET *128 0.000864391
+*CONN
+*I *52073:A I *D sky130_fd_sc_hd__xor2_1
+*I *52079:A I *D sky130_fd_sc_hd__nor2_1
+*I *52071:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52073:A 0.000107404
+2 *52079:A 0.000111479
+3 *52071:X 0
+4 *128:4 0.000218883
+5 *52073:A *52079:B 0
+6 *52073:A *129:5 5.52302e-05
+7 *52073:A *267:78 0.00010326
+8 *52073:A *268:66 0
+9 *52079:A *268:60 0.000268135
+*RES
+1 *52071:X *128:4 9.3 
+2 *128:4 *52079:A 12.2107 
+3 *128:4 *52073:A 20.4786 
+*END
+
+*D_NET *129 0.0020659
+*CONN
+*I *52073:B I *D sky130_fd_sc_hd__xor2_1
+*I *52079:B I *D sky130_fd_sc_hd__nor2_1
+*I *52072:Y O *D sky130_fd_sc_hd__a21boi_1
+*CAP
+1 *52073:B 0
+2 *52079:B 0.000267465
+3 *52072:Y 0.000439384
+4 *129:5 0.00070685
+5 *52079:B *130:5 9.90367e-05
+6 *52079:B *267:78 0
+7 *129:5 *267:78 0.000170955
+8 *129:5 *267:85 0.000258092
+9 *52072:A1 *129:5 1.55885e-05
+10 *52072:B1_N *129:5 5.33005e-05
+11 *52073:A *52079:B 0
+12 *52073:A *129:5 5.52302e-05
+*RES
+1 *52072:Y *129:5 18.8714 
+2 *129:5 *52079:B 23.1571 
+3 *129:5 *52073:B 9.3 
+*END
+
+*D_NET *130 0.000983517
+*CONN
+*I *52080:A2 I *D sky130_fd_sc_hd__a21o_2
+*I *52074:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52073:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52080:A2 0.000163214
+2 *52074:B 0
+3 *52073:X 0.000173863
+4 *130:5 0.000337077
+5 *130:5 *131:8 3.18676e-05
+6 *52074:A *52080:A2 0.000178459
+7 *52079:B *130:5 9.90367e-05
+*RES
+1 *52073:X *130:5 12.7107 
+2 *130:5 *52074:B 9.3 
+3 *130:5 *52080:A2 13.1393 
+*END
+
+*D_NET *131 0.00104148
+*CONN
+*I *52075:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52076:C I *D sky130_fd_sc_hd__nand3_1
+*I *52074:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52075:B1 0.000233001
+2 *52076:C 0
+3 *52074:Y 0.000169852
+4 *131:8 0.000402853
+5 *52075:B1 *52077:A 0
+6 *52075:B1 *52081:A2 0
+7 *52075:B1 *132:8 1.92789e-05
+8 *131:8 *52077:A 0
+9 *131:8 *52081:A2 0
+10 *52075:A1 *52075:B1 0
+11 *52076:B *52075:B1 0.000178819
+12 *52076:B *131:8 5.80706e-06
+13 *130:5 *131:8 3.18676e-05
+*RES
+1 *52074:Y *131:8 16.5857 
+2 *131:8 *52076:C 13.8 
+3 *131:8 *52075:B1 19.0143 
+*END
+
+*D_NET *132 0.00133032
+*CONN
+*I *52081:B1 I *D sky130_fd_sc_hd__a21o_2
+*I *52077:A I *D sky130_fd_sc_hd__or2b_1
+*I *52075:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52081:B1 0
+2 *52077:A 0.000153513
+3 *52075:Y 0.000475696
+4 *132:8 0.000629209
+5 *52077:A *52081:A2 5.26184e-05
+6 *52075:B1 *52077:A 0
+7 *52075:B1 *132:8 1.92789e-05
+8 *52078:A *52077:A 0
+9 *52078:A *132:8 0
+10 *131:8 *52077:A 0
+*RES
+1 *52075:Y *132:8 19.9786 
+2 *132:8 *52077:A 16.9607 
+3 *132:8 *52081:B1 13.8 
+*END
+
+*D_NET *133 0.000817055
+*CONN
+*I *52077:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *52081:A2 I *D sky130_fd_sc_hd__a21o_2
+*I *52076:Y O *D sky130_fd_sc_hd__nand3_1
+*CAP
+1 *52077:B_N 5.53377e-05
+2 *52081:A2 9.84745e-05
+3 *52076:Y 0.000225523
+4 *133:7 0.000379335
+5 *52075:B1 *52081:A2 0
+6 *52076:A *133:7 5.7661e-06
+7 *52077:A *52081:A2 5.26184e-05
+8 *131:8 *52081:A2 0
+*RES
+1 *52076:Y *133:7 13.0321 
+2 *133:7 *52081:A2 20.2464 
+3 *133:7 *52077:B_N 10.2464 
+*END
+
+*D_NET *134 0.000957972
+*CONN
+*I *52078:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52077:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *52078:B 0.000478986
+2 *52077:X 0.000478986
+3 *52078:B *274:6 0
+4 *52078:A *52078:B 0
+*RES
+1 *52077:X *52078:B 35.8857 
+*END
+
+*D_NET *135 0.00159407
+*CONN
+*I *52080:B1 I *D sky130_fd_sc_hd__a21o_2
+*I *52079:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52080:B1 0.000643357
+2 *52079:Y 0.000643357
+3 *52080:B1 *268:48 2.07937e-05
+4 *52080:B1 *268:50 0.000127353
+5 *52080:B1 *268:52 8.90314e-05
+6 *52080:B1 *268:60 3.67142e-05
+7 *127:9 *52080:B1 3.34672e-05
+*RES
+1 *52079:Y *52080:B1 36.7607 
+*END
+
+*D_NET *136 0.00508362
+*CONN
+*I *52107:A I *D sky130_fd_sc_hd__xor2_4
+*I *52109:A1 I *D sky130_fd_sc_hd__a21boi_2
+*I *52080:X O *D sky130_fd_sc_hd__a21o_2
+*CAP
+1 *52107:A 0.000149051
+2 *52109:A1 0
+3 *52080:X 0.00207824
+4 *136:8 0.00222729
+5 *52107:A *52107:B 0.00024338
+6 *52107:A *52109:A2 0.000153047
+7 *52107:A *52128:A 0.000138859
+8 *136:8 *52105:B 1.92905e-05
+9 *136:8 *52109:A2 3.51442e-05
+10 *136:8 *52128:B 0
+11 *136:8 *161:8 2.52796e-05
+12 *127:9 *136:8 1.40306e-05
+*RES
+1 *52080:X *136:8 38.8714 
+2 *136:8 *52109:A1 13.8 
+3 *136:8 *52107:A 19.3179 
+*END
+
+*D_NET *137 0.00225665
+*CONN
+*I *52106:A I *D sky130_fd_sc_hd__xor2_4
+*I *52108:A I *D sky130_fd_sc_hd__nand2_1
+*I *52081:X O *D sky130_fd_sc_hd__a21o_2
+*CAP
+1 *52106:A 0
+2 *52108:A 9.32239e-05
+3 *52081:X 0.000960586
+4 *137:5 0.00105381
+5 *52108:A *52106:B 8.98897e-05
+6 *52108:A *161:8 5.80706e-06
+7 *52078:A *137:5 5.33334e-05
+*RES
+1 *52081:X *137:5 25.4429 
+2 *137:5 *52108:A 20.55 
+3 *137:5 *52106:A 9.3 
+*END
+
+*D_NET *138 0.000691727
+*CONN
+*I *52085:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52119:A1 I *D sky130_fd_sc_hd__o21ai_1
+*I *52082:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52085:A 0
+2 *52119:A1 0.000180003
+3 *52082:Y 8.017e-05
+4 *138:6 0.000260173
+5 *52119:A1 *52085:B 0.000117983
+6 *52119:A1 *52086:B1 0
+7 *52119:A1 *283:59 0
+8 *138:6 *52086:B1 0
+9 *138:6 *187:68 5.33978e-05
+*RES
+1 *52082:Y *138:6 15.4429 
+2 *138:6 *52119:A1 17.3179 
+3 *138:6 *52085:A 13.8 
+*END
+
+*D_NET *139 0.000549163
+*CONN
+*I *52084:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52083:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52084:B1 0.000197568
+2 *52083:X 0.000197568
+3 *52083:C *52084:B1 0
+4 *52084:A2 *52084:B1 0.000154027
+*RES
+1 *52083:X *52084:B1 21.6179 
+*END
+
+*D_NET *140 0.00272397
+*CONN
+*I *52085:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52119:A2 I *D sky130_fd_sc_hd__o21ai_1
+*I *52084:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52085:B 7.71745e-05
+2 *52119:A2 0
+3 *52084:Y 0.000375878
+4 *140:5 0.000453052
+5 *52085:B *52086:B1 2.00751e-05
+6 *52085:B *283:59 9.72107e-05
+7 *140:5 *355:DIODE 9.90431e-05
+8 *140:5 *187:49 0.000360894
+9 *140:5 *283:59 0.000706537
+10 *52053:A *140:5 9.90367e-05
+11 *52119:A1 *52085:B 0.000117983
+12 *108:9 *140:5 0.000317082
+*RES
+1 *52084:Y *140:5 20.1036 
+2 *140:5 *52119:A2 9.3 
+3 *140:5 *52085:B 20.7821 
+*END
+
+*D_NET *141 0.00154502
+*CONN
+*I *52087:C I *D sky130_fd_sc_hd__nand3_1
+*I *52086:B1 I *D sky130_fd_sc_hd__a21o_1
+*I *52085:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52087:C 0.000229787
+2 *52086:B1 0.000190058
+3 *52085:Y 0
+4 *141:4 0.000419845
+5 *52086:B1 *52086:A2 0
+6 *52086:B1 *52088:A 3.48705e-05
+7 *52086:B1 *52119:B1 0.000186669
+8 *52086:B1 *52121:A 0.000276211
+9 *52086:B1 *187:68 1.76135e-05
+10 *52086:B1 *283:59 0.000148903
+11 *52086:B1 *283:71 0
+12 *52086:B1 *283:86 0
+13 *52087:C *187:68 0
+14 *52087:C *283:59 2.09915e-05
+15 *52087:C *283:86 0
+16 *52085:B *52086:B1 2.00751e-05
+17 *52119:A1 *52086:B1 0
+18 *138:6 *52086:B1 0
+*RES
+1 *52085:Y *141:4 9.3 
+2 *141:4 *52086:B1 24.3536 
+3 *141:4 *52087:C 21.4071 
+*END
+
+*D_NET *142 0.0019166
+*CONN
+*I *52088:A I *D sky130_fd_sc_hd__nand2_1
+*I *52119:B1 I *D sky130_fd_sc_hd__o21ai_1
+*I *52086:X O *D sky130_fd_sc_hd__a21o_1
+*CAP
+1 *52088:A 0.000576262
+2 *52119:B1 0.000145972
+3 *52086:X 0
+4 *142:4 0.000722234
+5 *52088:A *364:DIODE 1.55953e-05
+6 *52088:A *52086:A2 1.92905e-05
+7 *52088:A *52117:B 0
+8 *52088:A *52118:B1 5.52302e-05
+9 *52088:A *52121:A 8.82547e-05
+10 *52088:A *52121:B 0
+11 *52088:A *281:162 0
+12 *52119:B1 *52121:A 1.69961e-05
+13 *52119:B1 *283:59 5.52238e-05
+14 *52086:B1 *52088:A 3.48705e-05
+15 *52086:B1 *52119:B1 0.000186669
+*RES
+1 *52086:X *142:4 9.3 
+2 *142:4 *52119:B1 12.6214 
+3 *142:4 *52088:A 26.7286 
+*END
+
+*D_NET *143 0.000527281
+*CONN
+*I *52088:B I *D sky130_fd_sc_hd__nand2_1
+*I *52087:Y O *D sky130_fd_sc_hd__nand3_1
+*CAP
+1 *52088:B 0.00019788
+2 *52087:Y 0.00019788
+3 *52088:B *52087:B 5.52238e-05
+4 *52088:B *52118:B1 7.62973e-05
+*RES
+1 *52087:Y *52088:B 21.5107 
+*END
+
+*D_NET *144 0.0027136
+*CONN
+*I *52093:A I *D sky130_fd_sc_hd__and2_1
+*I *52092:A I *D sky130_fd_sc_hd__nor2_1
+*I *52088:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52093:A 0.000158298
+2 *52092:A 0.000483488
+3 *52088:Y 0.000432164
+4 *144:8 0.00107395
+5 *52092:A *52091:A 5.52238e-05
+6 *52092:A *52091:B 3.18676e-05
+7 *52092:A *52092:B 0.000138106
+8 *52093:A *203:76 0
+9 *52093:A *266:40 0
+10 *144:8 *52120:B 0
+11 *144:8 *52121:B 2.34204e-05
+12 *144:8 *203:69 0
+13 *144:8 *203:76 0
+14 *144:8 *225:128 0.000317082
+15 *144:8 *266:40 0
+*RES
+1 *52088:Y *144:8 20.5679 
+2 *144:8 *52092:A 22.1571 
+3 *144:8 *52093:A 16.6571 
+*END
+
+*D_NET *145 0.000889167
+*CONN
+*I *52116:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *52091:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52089:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52116:A1 0.000184627
+2 *52091:A 1.40568e-05
+3 *52089:Y 0.000101962
+4 *145:6 0.000300645
+5 *52091:A *52092:B 2.89016e-05
+6 *52116:A1 *52091:B 5.94923e-05
+7 *52116:A1 *52116:A2 6.75704e-05
+8 *52116:A1 *148:8 4.48206e-05
+9 *52116:A1 *264:9 3.18676e-05
+10 *52116:A1 *266:40 0
+11 *145:6 *266:40 0
+12 *52092:A *52091:A 5.52238e-05
+*RES
+1 *52089:Y *145:6 15.4429 
+2 *145:6 *52091:A 14.3357 
+3 *145:6 *52116:A1 17.8536 
+*END
+
+*D_NET *146 0.00220037
+*CONN
+*I *52116:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *52091:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52090:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52116:A2 4.74444e-05
+2 *52091:B 0.000128132
+3 *52090:X 0.000334181
+4 *146:5 0.000509758
+5 *52091:B *52092:B 5.52302e-05
+6 *52091:B *52093:B 0.000150625
+7 *52091:B *52094:A 0
+8 *52091:B *148:8 0
+9 *52091:B *266:40 2.69397e-05
+10 *52116:A2 *52094:B 0.000142856
+11 *52116:A2 *264:9 2.42662e-05
+12 *146:5 *52093:B 0.000227532
+13 *146:5 *52094:B 0.00018372
+14 *146:5 *264:9 0.000210753
+15 *52092:A *52091:B 3.18676e-05
+16 *52116:A1 *52091:B 5.94923e-05
+17 *52116:A1 *52116:A2 6.75704e-05
+*RES
+1 *52090:X *146:5 16.8179 
+2 *146:5 *52091:B 21.6929 
+3 *146:5 *52116:A2 11.0857 
+*END
+
+*D_NET *147 0.00162327
+*CONN
+*I *52093:B I *D sky130_fd_sc_hd__and2_1
+*I *52092:B I *D sky130_fd_sc_hd__nor2_1
+*I *52091:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52093:B 0.000106802
+2 *52092:B 0.000232033
+3 *52091:Y 0
+4 *147:4 0.000338835
+5 *52092:B *148:8 0.000144773
+6 *52093:B *264:9 0.000122091
+7 *52093:B *266:40 7.83366e-05
+8 *52091:A *52092:B 2.89016e-05
+9 *52091:B *52092:B 5.52302e-05
+10 *52091:B *52093:B 0.000150625
+11 *52092:A *52092:B 0.000138106
+12 *146:5 *52093:B 0.000227532
+*RES
+1 *52091:Y *147:4 9.3 
+2 *147:4 *52092:B 14.6929 
+3 *147:4 *52093:B 22.425 
+*END
+
+*D_NET *148 0.000820416
+*CONN
+*I *52094:A I *D sky130_fd_sc_hd__nor2_2
+*I *52116:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *52092:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52094:A 0.000105839
+2 *52116:B1_N 0
+3 *52092:Y 0.0001867
+4 *148:8 0.000292539
+5 *52094:A *52094:B 4.57445e-05
+6 *52094:A *267:39 0
+7 *148:8 *267:39 0
+8 *52091:B *52094:A 0
+9 *52091:B *148:8 0
+10 *52092:B *148:8 0.000144773
+11 *52116:A1 *148:8 4.48206e-05
+*RES
+1 *52092:Y *148:8 17.1036 
+2 *148:8 *52116:B1_N 13.8 
+3 *148:8 *52094:A 16.05 
+*END
+
+*D_NET *149 0.000952433
+*CONN
+*I *52094:B I *D sky130_fd_sc_hd__nor2_2
+*I *52093:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52094:B 0.000290056
+2 *52093:X 0.000290056
+3 *52094:B *266:40 0
+4 *52094:B *266:50 0
+5 *52094:A *52094:B 4.57445e-05
+6 *52116:A2 *52094:B 0.000142856
+7 *146:5 *52094:B 0.00018372
+*RES
+1 *52093:X *52094:B 32.2429 
+*END
+
+*D_NET *150 0.001467
+*CONN
+*I *52112:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52098:A I *D sky130_fd_sc_hd__xor2_4
+*I *52094:Y O *D sky130_fd_sc_hd__nor2_2
+*CAP
+1 *52112:A1 0.000127339
+2 *52098:A 0
+3 *52094:Y 0.000239883
+4 *150:9 0.000367222
+5 *52112:A1 *52098:B 0
+6 *52112:A1 *52112:A2 7.4701e-05
+7 *52112:A1 *52112:B1 0.000230475
+8 *52112:A1 *167:11 0.000146513
+9 *150:9 *52097:B 9.99989e-05
+10 *150:9 *52111:C 5.41794e-05
+11 *150:9 *52112:A2 9.71197e-05
+12 *150:9 *153:9 0
+13 *150:9 *167:11 2.95726e-05
+14 *150:9 *266:50 0
+*RES
+1 *52094:Y *150:9 23.6214 
+2 *150:9 *52098:A 9.3 
+3 *150:9 *52112:A1 13.5679 
+*END
+
+*D_NET *151 0.00300909
+*CONN
+*I *52111:C I *D sky130_fd_sc_hd__and3_1
+*I *52097:A I *D sky130_fd_sc_hd__xnor2_2
+*I *52095:Y O *D sky130_fd_sc_hd__o21bai_2
+*CAP
+1 *52111:C 0.000382107
+2 *52097:A 7.33547e-05
+3 *52095:Y 0.000641726
+4 *151:7 0.00109719
+5 *52097:A *52097:B 0.000125724
+6 *52097:A *266:50 2.8266e-06
+7 *52111:C *52097:B 5.12344e-05
+8 *52111:C *52112:A2 0.000178847
+9 *52111:C *154:5 0
+10 *52111:C *267:43 0
+11 *52111:C *267:50 3.9991e-05
+12 *151:7 *52112:A2 0.000361914
+13 *150:9 *52111:C 5.41794e-05
+*RES
+1 *52095:Y *151:7 17.6571 
+2 *151:7 *52097:A 19.9429 
+3 *151:7 *52111:C 24.2286 
+*END
+
+*D_NET *152 0.00119508
+*CONN
+*I *52097:B I *D sky130_fd_sc_hd__xnor2_2
+*I *52096:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52097:B 0.000265844
+2 *52096:Y 0.000265844
+3 *52097:B *52112:B1 0.000199775
+4 *52097:B *203:131 0.000186662
+5 *52097:B *266:50 0
+6 *52097:A *52097:B 0.000125724
+7 *52111:C *52097:B 5.12344e-05
+8 *150:9 *52097:B 9.99989e-05
+*RES
+1 *52096:Y *52097:B 34.0464 
+*END
+
+*D_NET *153 0.00172157
+*CONN
+*I *52098:B I *D sky130_fd_sc_hd__xor2_4
+*I *52112:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52097:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52098:B 2.23854e-05
+2 *52112:A2 0.000188343
+3 *52097:Y 0.000135922
+4 *153:9 0.00034665
+5 *52112:A2 *52112:B1 0.000232399
+6 *52112:A2 *167:11 4.62969e-05
+7 *153:9 *154:5 4.46186e-06
+8 *153:9 *167:11 1.32552e-05
+9 *153:9 *267:39 0
+10 *153:9 *267:43 1.92789e-05
+11 *52111:C *52112:A2 0.000178847
+12 *52112:A1 *52098:B 0
+13 *52112:A1 *52112:A2 7.4701e-05
+14 *150:9 *52112:A2 9.71197e-05
+15 *150:9 *153:9 0
+16 *151:7 *52112:A2 0.000361914
+*RES
+1 *52097:Y *153:9 20.5857 
+2 *153:9 *52112:A2 16.0143 
+3 *153:9 *52098:B 9.72857 
+*END
+
+*D_NET *154 0.00195403
+*CONN
+*I *52105:A I *D sky130_fd_sc_hd__xor2_4
+*I *52110:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52098:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52105:A 0.000116979
+2 *52110:A1 0.00012897
+3 *52098:X 0.000391452
+4 *154:5 0.000637401
+5 *52105:A *52105:B 0
+6 *52105:A *161:8 0
+7 *52110:A1 *52127:A 0.000402784
+8 *52110:A1 *160:7 3.18676e-05
+9 *154:5 *368:DIODE 0.000100161
+10 *154:5 *52105:B 0
+11 *154:5 *167:11 7.26841e-05
+12 *154:5 *267:39 0
+13 *154:5 *267:43 6.72715e-05
+14 *154:5 *268:48 0
+15 *52111:C *154:5 0
+16 *153:9 *154:5 4.46186e-06
+*RES
+1 *52098:X *154:5 12.8214 
+2 *154:5 *52110:A1 17.6214 
+3 *154:5 *52105:A 15.7464 
+*END
+
+*D_NET *155 0.0027571
+*CONN
+*I *52102:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *52103:A I *D sky130_fd_sc_hd__nor3_1
+*I *52099:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52102:A1 4.12696e-05
+2 *52103:A 0.000115935
+3 *52099:Y 0.000357261
+4 *155:7 0.000514465
+5 *52102:A1 *52102:A2 7.83659e-05
+6 *52102:A1 *52102:B1 2.82057e-05
+7 *52103:A *52102:A2 3.17148e-05
+8 *52103:A *52102:B1 1.08359e-05
+9 *52103:A *52103:B 0.000435186
+10 *52103:A *52103:C 0.00036192
+11 *52103:A *52104:B 3.18676e-05
+12 *52103:A *156:5 5.52302e-05
+13 *52103:A *268:48 0.000120577
+14 *155:7 *156:5 0.00018372
+15 *52070:A *52102:A1 6.30292e-05
+16 *52070:A *52103:A 2.84398e-05
+17 *52100:B *155:7 2.77289e-05
+18 *126:7 *155:7 0.000271345
+*RES
+1 *52099:Y *155:7 18.8536 
+2 *155:7 *52103:A 19.9964 
+3 *155:7 *52102:A1 15.4429 
+*END
+
+*D_NET *156 0.0015509
+*CONN
+*I *52103:B I *D sky130_fd_sc_hd__nor3_1
+*I *52102:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *52100:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52103:B 0.000195483
+2 *52102:A2 3.77017e-05
+3 *52100:Y 6.52392e-05
+4 *156:5 0.000298424
+5 *52102:A2 *52102:B1 0.000103267
+6 *156:5 *268:48 5.91367e-05
+7 *52100:B *156:5 7.43578e-06
+8 *52102:A1 *52102:A2 7.83659e-05
+9 *52103:A *52102:A2 3.17148e-05
+10 *52103:A *52103:B 0.000435186
+11 *52103:A *156:5 5.52302e-05
+12 *155:7 *156:5 0.00018372
+*RES
+1 *52100:Y *156:5 11.4786 
+2 *156:5 *52102:A2 19.6393 
+3 *156:5 *52103:B 13.5321 
+*END
+
+*D_NET *157 0.00423055
+*CONN
+*I *52102:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *52103:C I *D sky130_fd_sc_hd__nor3_1
+*I *52101:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52102:B1 0.000166515
+2 *52103:C 4.53887e-05
+3 *52101:Y 0.000853602
+4 *157:12 0.00106551
+5 *52103:C *268:48 0.00036192
+6 *157:12 *203:182 9.25014e-06
+7 *157:12 *267:72 5.37963e-05
+8 *157:12 *268:48 0.000578035
+9 *52070:A *52102:B1 0
+10 *52070:A *157:12 0
+11 *52099:A *157:12 0.000394316
+12 *52099:B *157:12 4.88637e-05
+13 *52102:A1 *52102:B1 2.82057e-05
+14 *52102:A2 *52102:B1 0.000103267
+15 *52103:A *52102:B1 1.08359e-05
+16 *52103:A *52103:C 0.00036192
+17 *123:8 *157:12 0
+18 *124:11 *157:12 0.000139913
+19 *126:7 *157:12 9.22103e-06
+*RES
+1 *52101:Y *157:12 28.7643 
+2 *157:12 *52103:C 17.2107 
+3 *157:12 *52102:B1 17.1929 
+*END
+
+*D_NET *158 0.000895007
+*CONN
+*I *52110:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52104:A I *D sky130_fd_sc_hd__nor2_2
+*I *52102:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *52110:B1 0.000231833
+2 *52104:A 0
+3 *52102:X 0.000150874
+4 *158:5 0.000382706
+5 *52110:B1 *160:7 0.000129595
+*RES
+1 *52102:X *158:5 11.8893 
+2 *158:5 *52104:A 9.3 
+3 *158:5 *52110:B1 13.55 
+*END
+
+*D_NET *159 0.000333072
+*CONN
+*I *52104:B I *D sky130_fd_sc_hd__nor2_2
+*I *52103:Y O *D sky130_fd_sc_hd__nor3_1
+*CAP
+1 *52104:B 0.000150602
+2 *52103:Y 0.000150602
+3 *52104:B *52105:B 0
+4 *52103:A *52104:B 3.18676e-05
+*RES
+1 *52103:Y *52104:B 30.0821 
+*END
+
+*D_NET *160 0.00087926
+*CONN
+*I *52110:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52105:B I *D sky130_fd_sc_hd__xor2_4
+*I *52104:Y O *D sky130_fd_sc_hd__nor2_2
+*CAP
+1 *52110:A2 0
+2 *52105:B 0.000169636
+3 *52104:Y 0.000165503
+4 *160:7 0.000335139
+5 *52105:B *161:8 1.19309e-05
+6 *160:7 *52127:A 1.62981e-05
+7 *52104:B *52105:B 0
+8 *52105:A *52105:B 0
+9 *52110:A1 *160:7 3.18676e-05
+10 *52110:B1 *160:7 0.000129595
+11 *136:8 *52105:B 1.92905e-05
+12 *154:5 *52105:B 0
+*RES
+1 *52104:Y *160:7 13.1393 
+2 *160:7 *52105:B 21.0857 
+3 *160:7 *52110:A2 9.3 
+*END
+
+*D_NET *161 0.000991038
+*CONN
+*I *52106:B I *D sky130_fd_sc_hd__xor2_4
+*I *52108:B I *D sky130_fd_sc_hd__nand2_1
+*I *52105:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52106:B 0.000202785
+2 *52108:B 0
+3 *52105:X 0.00022628
+4 *161:8 0.000429065
+5 *52105:A *161:8 0
+6 *52105:B *161:8 1.19309e-05
+7 *52108:A *52106:B 8.98897e-05
+8 *52108:A *161:8 5.80706e-06
+9 *136:8 *161:8 2.52796e-05
+*RES
+1 *52105:X *161:8 8.54464 
+2 *161:8 *52108:B 13.8 
+3 *161:8 *52106:B 17.8179 
+*END
+
+*D_NET *162 0.00114426
+*CONN
+*I *52107:B I *D sky130_fd_sc_hd__xor2_4
+*I *52109:A2 I *D sky130_fd_sc_hd__a21boi_2
+*I *52106:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52107:B 0.000111265
+2 *52109:A2 8.62947e-05
+3 *52106:X 0.000158783
+4 *162:7 0.000356343
+5 *52107:B *52128:B 0
+6 *52109:A2 *52128:B 0
+7 *52107:A *52107:B 0.00024338
+8 *52107:A *52109:A2 0.000153047
+9 *136:8 *52109:A2 3.51442e-05
+*RES
+1 *52106:X *162:7 6.61607 
+2 *162:7 *52109:A2 16.05 
+3 *162:7 *52107:B 16.9607 
+*END
+
+*D_NET *163 0.000666874
+*CONN
+*I *52109:B1_N I *D sky130_fd_sc_hd__a21boi_2
+*I *52108:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52109:B1_N 0.000333437
+2 *52108:Y 0.000333437
+*RES
+1 *52108:Y *52109:B1_N 24.0643 
+*END
+
+*D_NET *164 0.000903559
+*CONN
+*I *52128:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52109:Y O *D sky130_fd_sc_hd__a21boi_2
+*CAP
+1 *52128:A 0.00038235
+2 *52109:Y 0.00038235
+3 *52128:A *275:5 0
+4 *52107:A *52128:A 0.000138859
+*RES
+1 *52109:Y *52128:A 35.35 
+*END
+
+*D_NET *165 0.00228114
+*CONN
+*I *52127:A I *D sky130_fd_sc_hd__xnor2_2
+*I *52110:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52127:A 0.000897284
+2 *52110:Y 0.000897284
+3 *52127:A *52127:B 6.74911e-05
+4 *52110:A1 *52127:A 0.000402784
+5 *160:7 *52127:A 1.62981e-05
+*RES
+1 *52110:Y *52127:A 39.6089 
+*END
+
+*D_NET *166 0.00115716
+*CONN
+*I *52112:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52111:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52112:B1 0.000223612
+2 *52111:X 0.000223612
+3 *52112:B1 *203:131 4.72917e-05
+4 *52097:B *52112:B1 0.000199775
+5 *52112:A1 *52112:B1 0.000230475
+6 *52112:A2 *52112:B1 0.000232399
+*RES
+1 *52111:X *52112:B1 33.0821 
+*END
+
+*D_NET *167 0.00318694
+*CONN
+*I *52113:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52114:C I *D sky130_fd_sc_hd__and3_1
+*I *52112:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52113:B1 0.000225725
+2 *52114:C 0
+3 *52112:Y 0.000876738
+4 *167:11 0.00110246
+5 *52113:B1 *268:24 5.7661e-06
+6 *52113:B1 *268:28 0.000162236
+7 *167:11 *180:10 5.85135e-05
+8 *167:11 *203:137 9.01258e-06
+9 *167:11 *267:43 0.000271352
+10 *167:11 *268:28 5.31127e-05
+11 *167:11 *268:48 0.000113698
+12 *52112:A1 *167:11 0.000146513
+13 *52112:A2 *167:11 4.62969e-05
+14 *150:9 *167:11 2.95726e-05
+15 *153:9 *167:11 1.32552e-05
+16 *154:5 *167:11 7.26841e-05
+*RES
+1 *52112:Y *167:11 31.4429 
+2 *167:11 *52114:C 9.3 
+3 *167:11 *52113:B1 12.6571 
+*END
+
+*D_NET *168 0.00168538
+*CONN
+*I *52115:A I *D sky130_fd_sc_hd__nor2_1
+*I *52129:B1 I *D sky130_fd_sc_hd__a21o_4
+*I *52113:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52115:A 0.000204277
+2 *52129:B1 0.000228087
+3 *52113:Y 0
+4 *168:4 0.000432364
+5 *52115:A *373:DIODE 3.48705e-05
+6 *52115:A *52115:B 0.000377721
+7 *52115:A *203:156 8.57023e-05
+8 *52129:B1 *374:DIODE 2.43817e-05
+9 *52129:B1 *52115:B 5.52302e-05
+10 *52129:B1 *52127:B 4.01768e-05
+11 *52129:B1 *170:13 0.000139167
+12 *52129:B1 *180:10 0
+13 *52129:B1 *203:156 6.34061e-05
+*RES
+1 *52113:Y *168:4 9.3 
+2 *168:4 *52129:B1 23.4607 
+3 *168:4 *52115:A 14.2643 
+*END
+
+*D_NET *169 0.00127014
+*CONN
+*I *52115:B I *D sky130_fd_sc_hd__nor2_1
+*I *52114:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52115:B 0.000144187
+2 *52114:X 0.000144187
+3 *52115:B *373:DIODE 7.17235e-05
+4 *52115:B *203:156 9.77274e-05
+5 *52115:B *268:24 6.42095e-05
+6 *52115:B *268:28 0.000315158
+7 *52115:A *52115:B 0.000377721
+8 *52129:B1 *52115:B 5.52302e-05
+*RES
+1 *52114:X *52115:B 24.9214 
+*END
+
+*D_NET *170 0.00303383
+*CONN
+*I *52129:A1 I *D sky130_fd_sc_hd__a21o_4
+*I *52126:A I *D sky130_fd_sc_hd__xor2_1
+*I *52115:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *52129:A1 2.23854e-05
+2 *52126:A 0.000133756
+3 *52115:Y 0.000623881
+4 *170:13 0.000780023
+5 *52126:A *52126:B 0.00041129
+6 *52126:A *52127:B 1.15281e-05
+7 *52126:A *268:48 0.000410264
+8 *170:13 *373:DIODE 0.000186669
+9 *170:13 *374:DIODE 7.6644e-05
+10 *170:13 *52127:B 1.92116e-05
+11 *170:13 *268:24 0.000140933
+12 *170:13 *268:28 2.28499e-05
+13 *170:13 *277:5 5.52238e-05
+14 *52129:B1 *170:13 0.000139167
+*RES
+1 *52115:Y *170:13 27.4071 
+2 *170:13 *52126:A 14.3714 
+3 *170:13 *52129:A1 9.72857 
+*END
+
+*D_NET *171 0.000847612
+*CONN
+*I *52125:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52116:X O *D sky130_fd_sc_hd__o21ba_1
+*CAP
+1 *52125:A 0.00023767
+2 *52116:X 0.00023767
+3 *52125:A *180:10 3.18676e-05
+4 *52125:A *264:9 0.000340405
+*RES
+1 *52116:X *52125:A 24.475 
+*END
+
+*D_NET *172 0.0013826
+*CONN
+*I *52122:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52123:B I *D sky130_fd_sc_hd__and3_1
+*I *52117:Y O *D sky130_fd_sc_hd__nand4_1
+*CAP
+1 *52122:A1 0
+2 *52123:B 9.98191e-05
+3 *52117:Y 0.000276829
+4 *172:5 0.000376648
+5 *52123:B *52122:A2 7.6644e-05
+6 *52123:B *52123:A 1.31516e-05
+7 *52123:B *52124:A 9.67416e-05
+8 *52123:B *52124:B 3.34366e-05
+9 *52123:B *267:39 0
+10 *172:5 *52122:B1 9.60939e-05
+11 *172:5 *176:7 0.000313241
+*RES
+1 *52117:Y *172:5 13.1214 
+2 *172:5 *52123:B 20.8536 
+3 *172:5 *52122:A1 9.3 
+*END
+
+*D_NET *173 0.00102581
+*CONN
+*I *52123:C I *D sky130_fd_sc_hd__and3_1
+*I *52122:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *52118:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *52123:C 4.51756e-05
+2 *52122:A2 5.75302e-05
+3 *52118:X 0.000192679
+4 *173:5 0.000295385
+5 *52122:A2 *52117:A 6.8646e-06
+6 *52122:A2 *52123:A 9.91086e-05
+7 *52122:A2 *52124:A 1.59689e-05
+8 *52123:C *267:19 2.93936e-05
+9 *173:5 *52118:A1 0.00014285
+10 *173:5 *267:19 6.42095e-05
+11 *52123:B *52122:A2 7.6644e-05
+*RES
+1 *52118:X *173:5 11.8893 
+2 *173:5 *52122:A2 19.9429 
+3 *173:5 *52123:C 9.90714 
+*END
+
+*D_NET *174 0.00157023
+*CONN
+*I *52121:A I *D sky130_fd_sc_hd__xnor2_1
+*I *52119:Y O *D sky130_fd_sc_hd__o21ai_1
+*CAP
+1 *52121:A 0.000192488
+2 *52119:Y 0.000192488
+3 *52121:A *364:DIODE 0.00010096
+4 *52121:A *52086:A2 0.000133168
+5 *52121:A *52121:B 3.51442e-05
+6 *52121:A *207:113 0.000451463
+7 *52121:A *283:59 5.71472e-05
+8 *52121:A *283:71 2.59093e-05
+9 *52086:B1 *52121:A 0.000276211
+10 *52088:A *52121:A 8.82547e-05
+11 *52119:B1 *52121:A 1.69961e-05
+*RES
+1 *52119:Y *52121:A 35.8143 
+*END
+
+*D_NET *175 0.00108792
+*CONN
+*I *52121:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52120:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52121:B 0.000374682
+2 *52120:Y 0.000374682
+3 *52121:B *281:134 9.7659e-05
+4 *52121:B *283:71 5.83233e-05
+5 *52121:B *283:86 0.00012401
+6 *52088:A *52121:B 0
+7 *52121:A *52121:B 3.51442e-05
+8 *144:8 *52121:B 2.34204e-05
+*RES
+1 *52120:Y *52121:B 33.7429 
+*END
+
+*D_NET *176 0.00211002
+*CONN
+*I *52122:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52123:A I *D sky130_fd_sc_hd__and3_1
+*I *52121:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52122:B1 8.96173e-05
+2 *52123:A 6.33549e-05
+3 *52121:Y 0.000245849
+4 *176:7 0.000398821
+5 *52123:A *52117:A 5.86416e-05
+6 *52123:A *267:39 4.46186e-06
+7 *176:7 *52117:A 0.000228558
+8 *176:7 *52117:B 0.00010096
+9 *176:7 *52117:D 0.000280208
+10 *176:7 *281:152 0.00010096
+11 *176:7 *281:162 1.69961e-05
+12 *52122:A2 *52123:A 9.91086e-05
+13 *52123:B *52123:A 1.31516e-05
+14 *172:5 *52122:B1 9.60939e-05
+15 *172:5 *176:7 0.000313241
+*RES
+1 *52121:Y *176:7 16.8357 
+2 *176:7 *52123:A 19.9429 
+3 *176:7 *52122:B1 11.0679 
+*END
+
+*D_NET *177 0.000943103
+*CONN
+*I *52124:A I *D sky130_fd_sc_hd__or2_1
+*I *52122:Y O *D sky130_fd_sc_hd__a21oi_1
+*CAP
+1 *52124:A 0.00023774
+2 *52122:Y 0.00023774
+3 *52124:A *366:DIODE 2.24646e-05
+4 *52124:A *378:DIODE 0
+5 *52124:A *52124:B 5.0725e-05
+6 *52124:A *52125:B 6.05161e-06
+7 *52124:A *266:12 0.000220448
+8 *52124:A *266:27 5.52238e-05
+9 *52122:A2 *52124:A 1.59689e-05
+10 *52123:B *52124:A 9.67416e-05
+*RES
+1 *52122:Y *52124:A 33.725 
+*END
+
+*D_NET *178 0.000581655
+*CONN
+*I *52124:B I *D sky130_fd_sc_hd__or2_1
+*I *52123:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *52124:B 0.000146346
+2 *52123:X 0.000146346
+3 *52124:B *225:146 0.000139907
+4 *52124:B *267:39 6.48957e-05
+5 *52123:B *52124:B 3.34366e-05
+6 *52124:A *52124:B 5.0725e-05
+*RES
+1 *52123:X *52124:B 31.2071 
+*END
+
+*D_NET *179 0.00062658
+*CONN
+*I *52125:B I *D sky130_fd_sc_hd__xnor2_1
+*I *52124:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52125:B 0.000265879
+2 *52124:X 0.000265879
+3 *52125:B *366:DIODE 7.6644e-05
+4 *52125:B *266:27 1.21258e-05
+5 *52125:B *267:39 0
+6 *52124:A *52125:B 6.05161e-06
+*RES
+1 *52124:X *52125:B 32.2071 
+*END
+
+*D_NET *180 0.0025279
+*CONN
+*I *52129:A2 I *D sky130_fd_sc_hd__a21o_4
+*I *52126:B I *D sky130_fd_sc_hd__xor2_1
+*I *52125:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *52129:A2 0
+2 *52126:B 0.000125884
+3 *52125:Y 0.00049854
+4 *180:10 0.000624423
+5 *52126:B *52127:B 0.000103004
+6 *180:10 *376:DIODE 0.000270236
+7 *180:10 *267:39 0.000305037
+8 *180:10 *268:48 9.91086e-05
+9 *52125:A *180:10 3.18676e-05
+10 *52126:A *52126:B 0.00041129
+11 *52129:B1 *180:10 0
+12 *167:11 *180:10 5.85135e-05
+*RES
+1 *52125:Y *180:10 30.1929 
+2 *180:10 *52126:B 13.55 
+3 *180:10 *52129:A2 9.3 
+*END
+
+*D_NET *181 0.0014842
+*CONN
+*I *52127:B I *D sky130_fd_sc_hd__xnor2_2
+*I *52126:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *52127:B 0.000621396
+2 *52126:X 0.000621396
+3 *52126:A *52127:B 1.15281e-05
+4 *52126:B *52127:B 0.000103004
+5 *52127:A *52127:B 6.74911e-05
+6 *52129:B1 *52127:B 4.01768e-05
+7 *170:13 *52127:B 1.92116e-05
+*RES
+1 *52126:X *52127:B 37.1357 
+*END
+
+*D_NET *182 0.00114006
+*CONN
+*I *52128:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52127:Y O *D sky130_fd_sc_hd__xnor2_2
+*CAP
+1 *52128:B 0.000541021
+2 *52127:Y 0.000541021
+3 *52128:B *275:5 5.80217e-05
+4 *52107:B *52128:B 0
+5 *52109:A2 *52128:B 0
+6 *136:8 *52128:B 0
+*RES
+1 *52127:Y *52128:B 37.6714 
+*END
+
+*D_NET *183 0.0109517
+*CONN
+*I *51901:A I *D sky130_fd_sc_hd__and3_1
+*I *52012:A I *D sky130_fd_sc_hd__and3_1
+*I *51895:A I *D sky130_fd_sc_hd__nand2_2
+*I *51942:A1 I *D sky130_fd_sc_hd__a22oi_1
+*I *52010:A I *D sky130_fd_sc_hd__nand2_1
+*I *51908:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *51922:A1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51968:A1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51991:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *51967:B I *D sky130_fd_sc_hd__and4_1
+*I *51893:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51901:A 0
+2 *52012:A 0.000141691
+3 *51895:A 1.67212e-05
+4 *51942:A1 6.05891e-05
+5 *52010:A 0.000193052
+6 *51908:A1 0
+7 *51922:A1 0
+8 *51968:A1 0
+9 *51991:A2 1.60253e-05
+10 *51967:B 0.000167858
+11 *51893:X 0
+12 *183:88 0.000614224
+13 *183:80 0.000796088
+14 *183:59 0.000548127
+15 *183:54 0.000647707
+16 *183:51 0.000970567
+17 *183:45 0.000692807
+18 *183:15 0.000565215
+19 *183:7 0.000694706
+20 *183:4 0.000607934
+21 *51895:A *51895:B 1.04232e-05
+22 *51942:A1 *199:20 9.9129e-05
+23 *51942:A1 *203:13 0
+24 *51967:B *51991:A1 9.90367e-05
+25 *51967:B *51991:B1 1.5424e-05
+26 *51967:B *51991:B2 0.000135815
+27 *51967:B *280:37 0.000135136
+28 *51967:B *281:47 0.000227539
+29 *51991:A2 *51991:B1 2.47638e-05
+30 *52010:A *51908:A2 5.71472e-05
+31 *52010:A *52010:B 1.97695e-05
+32 *52010:A *281:79 6.30173e-05
+33 *52010:A *284:28 2.44318e-05
+34 *52012:A *51895:B 7.43578e-06
+35 *52012:A *51898:A 5.62995e-05
+36 *52012:A *187:33 6.22419e-05
+37 *183:7 *51968:B1 2.27416e-05
+38 *183:7 *51968:B2 8.07313e-05
+39 *183:7 *189:17 7.65634e-05
+40 *183:7 *263:42 9.22103e-06
+41 *183:7 *281:53 1.33343e-05
+42 *183:15 *51941:B 0.000230475
+43 *183:15 *51968:A2 0.000248579
+44 *183:15 *51991:B1 6.39559e-05
+45 *183:15 *51992:A1 0
+46 *183:15 *189:45 9.25014e-06
+47 *183:15 *232:33 6.81083e-05
+48 *183:15 *262:26 8.85027e-06
+49 *183:15 *263:42 4.57334e-05
+50 *183:15 *280:37 3.98517e-05
+51 *183:15 *281:47 0.00051499
+52 *183:15 *282:10 1.18064e-05
+53 *183:45 *189:15 3.61629e-06
+54 *183:45 *281:53 0.00040765
+55 *183:51 *51910:A 0.000257553
+56 *183:51 *51923:B 0.000146591
+57 *183:51 *189:15 8.37354e-05
+58 *183:51 *280:49 1.57155e-05
+59 *183:54 *51923:B 0
+60 *183:54 *199:20 3.12359e-05
+61 *183:54 *263:12 1.00477e-05
+62 *183:54 *263:30 8.5685e-05
+63 *183:59 *51908:B1 5.52302e-05
+64 *183:59 *199:20 5.33005e-05
+65 *183:59 *284:28 0.000111117
+66 *183:80 *189:7 4.58976e-05
+67 *183:80 *189:15 0.000170964
+68 *183:80 *189:105 0.000114914
+69 *183:88 *51895:B 3.18676e-05
+70 *183:88 *51897:A 3.74604e-05
+71 *183:88 *51901:C 6.47668e-05
+72 *183:88 *189:105 9.22103e-06
+*RES
+1 *51893:X *183:4 9.3 
+2 *183:4 *183:7 4.66071 
+3 *183:7 *183:15 19.5 
+4 *183:15 *51967:B 15.05 
+5 *183:15 *51991:A2 9.96071 
+6 *183:7 *51968:A1 9.3 
+7 *183:4 *183:45 4.66071 
+8 *183:45 *51922:A1 9.3 
+9 *183:45 *183:51 7.92857 
+10 *183:51 *183:54 8.26786 
+11 *183:54 *183:59 9.16071 
+12 *183:59 *51908:A1 9.3 
+13 *183:59 *52010:A 13.1393 
+14 *183:54 *51942:A1 15.1393 
+15 *183:51 *183:80 6.69643 
+16 *183:80 *183:88 6.44643 
+17 *183:88 *51895:A 9.72857 
+18 *183:88 *52012:A 12.3 
+19 *183:80 *51901:A 9.3 
+*END
+
+*D_NET *184 0.00105046
+*CONN
+*I *52131:B I *D sky130_fd_sc_hd__and2_1
+*I *52130:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *52131:B 9.93754e-05
+2 *52130:X 9.93754e-05
+3 *52004:B *52131:B 3.32731e-05
+4 *52130:A *52131:B 4.88637e-05
+5 *52130:B *52131:B 0.000274294
+6 *46:10 *52131:B 0.000495276
+*RES
+1 *52130:X *52131:B 23.6714 
+*END
+
+*D_NET *185 0.000949484
+*CONN
+*I *52132:A I *D sky130_fd_sc_hd__buf_6
+*I *52131:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *52132:A 0.00037184
+2 *52131:X 0.00037184
+3 *52132:A *270:6 0
+4 *52133:A *52132:A 0
+5 *46:10 *52132:A 0.000127446
+6 *59:21 *52132:A 7.83587e-05
+7 *63:18 *52132:A 0
+*RES
+1 *52131:X *52132:A 34.5643 
+*END
+
+*D_NET *186 0.000274854
+*CONN
+*I *52134:B I *D sky130_fd_sc_hd__xnor2_4
+*I *52133:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *52134:B 3.75945e-05
+2 *52133:Y 3.75945e-05
+3 *52133:A *52134:B 0.000129868
+4 *52133:B *52134:B 6.97972e-05
+*RES
+1 *52133:Y *52134:B 29.2429 
+*END
+
+*D_NET *187 0.01331
+*CONN
+*I *51909:A1 I *D sky130_fd_sc_hd__a21bo_1
+*I *51903:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *52011:B I *D sky130_fd_sc_hd__nand2_1
+*I *52083:B I *D sky130_fd_sc_hd__and3_1
+*I *52120:B I *D sky130_fd_sc_hd__nand2_1
+*I *52082:B I *D sky130_fd_sc_hd__nand2_1
+*I *52052:B I *D sky130_fd_sc_hd__nand2_1
+*I *51902:A I *D sky130_fd_sc_hd__and2_1
+*I *52012:B I *D sky130_fd_sc_hd__and3_1
+*I *51895:B I *D sky130_fd_sc_hd__nand2_2
+*I *51894:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51909:A1 0
+2 *51903:B1 0.000138147
+3 *52011:B 2.76146e-05
+4 *52083:B 0
+5 *52120:B 0.000286262
+6 *52082:B 0
+7 *52052:B 0
+8 *51902:A 0.000234516
+9 *52012:B 0
+10 *51895:B 7.21429e-05
+11 *51894:X 0.00027845
+12 *187:91 0.000389389
+13 *187:68 0.000662832
+14 *187:57 0.000703745
+15 *187:49 0.00102942
+16 *187:39 0.00158428
+17 *187:33 0.000933581
+18 *187:22 0.00063439
+19 *187:15 0.000653836
+20 *187:10 0.000432475
+21 *51902:A *193:113 2.78321e-05
+22 *51902:A *193:117 9.24395e-05
+23 *51903:B1 *51902:B 8.46829e-05
+24 *51903:B1 *51903:A1 0.000170654
+25 *51903:B1 *51903:B2 8.5896e-05
+26 *51903:B1 *194:36 0.000116472
+27 *51903:B1 *283:11 1.00375e-05
+28 *52011:B *51902:B 0
+29 *52011:B *194:22 0
+30 *52011:B *194:36 4.61598e-05
+31 *52120:B *281:134 0.000274294
+32 *187:10 *51894:A 0
+33 *187:10 *193:68 0.000276211
+34 *187:10 *193:86 4.18895e-05
+35 *187:10 *194:8 5.80706e-06
+36 *187:10 *194:22 6.16744e-05
+37 *187:15 *51897:A 0.000316184
+38 *187:15 *51909:A2 5.52238e-05
+39 *187:15 *207:73 0.000126629
+40 *187:15 *281:96 8.86512e-05
+41 *187:22 *51897:A 0
+42 *187:22 *51898:A 0
+43 *187:22 *52010:B 6.94775e-05
+44 *187:22 *190:10 9.10431e-06
+45 *187:22 *194:8 0
+46 *187:33 *51898:A 5.33334e-05
+47 *187:33 *52012:C 1.40415e-05
+48 *187:39 *52012:C 2.30526e-06
+49 *187:39 *52049:A 5.33433e-05
+50 *187:39 *283:39 3.61629e-06
+51 *187:49 *52049:A 4.14279e-05
+52 *187:91 *52010:B 2.39923e-05
+53 *187:91 *193:86 0.000272371
+54 *187:91 *194:22 9.90431e-05
+55 *187:91 *194:36 0.000135056
+56 *187:91 *207:73 0
+57 *51895:A *51895:B 1.04232e-05
+58 *52012:A *51895:B 7.43578e-06
+59 *52012:A *187:33 6.22419e-05
+60 *52013:A0 *51902:A 0.000265385
+61 *52013:A0 *51903:B1 0.00018372
+62 *52014:B *51902:A 5.26184e-05
+63 *52051:A2 *187:39 1.92905e-05
+64 *52051:B1 *51902:A 0
+65 *52053:A *187:57 0.000130456
+66 *52053:B *187:57 0.000317082
+67 *52084:A2 *187:57 5.33882e-05
+68 *52086:B1 *187:68 1.76135e-05
+69 *52087:C *187:68 0
+70 *70:7 *187:39 0.000258074
+71 *72:6 *51902:A 0.000129868
+72 *108:9 *187:49 0.000637272
+73 *138:6 *187:68 5.33978e-05
+74 *140:5 *187:49 0.000360894
+75 *144:8 *52120:B 0
+76 *183:88 *51895:B 3.18676e-05
+*RES
+1 *51894:X *187:10 22.9429 
+2 *187:10 *187:15 9.57143 
+3 *187:15 *187:22 9.23214 
+4 *187:22 *51895:B 10.9964 
+5 *187:22 *187:33 3.82143 
+6 *187:33 *52012:B 9.3 
+7 *187:33 *187:39 8.75 
+8 *187:39 *51902:A 24.8 
+9 *187:39 *187:49 10.3929 
+10 *187:49 *187:57 15.7143 
+11 *187:57 *52052:B 9.3 
+12 *187:57 *187:68 10.6964 
+13 *187:68 *52082:B 13.8 
+14 *187:68 *52120:B 19.2464 
+15 *187:49 *52083:B 9.3 
+16 *187:15 *187:91 10.1607 
+17 *187:91 *52011:B 10.0321 
+18 *187:91 *51903:B1 23.0321 
+19 *187:10 *51909:A1 9.3 
+*END
+
+*D_NET *188 0.000448366
+*CONN
+*I *51898:A I *D sky130_fd_sc_hd__xnor2_4
+*I *51895:Y O *D sky130_fd_sc_hd__nand2_2
+*CAP
+1 *51898:A 0.000166463
+2 *51895:Y 0.000166463
+3 *51898:A *52012:C 0
+4 *51898:A *190:10 5.80706e-06
+5 *52012:A *51898:A 5.62995e-05
+6 *187:22 *51898:A 0
+7 *187:33 *51898:A 5.33334e-05
+*RES
+1 *51895:Y *51898:A 31.1 
+*END
+
+*D_NET *189 0.0123651
+*CONN
+*I *51897:A I *D sky130_fd_sc_hd__nand2_2
+*I *51901:B I *D sky130_fd_sc_hd__and3_1
+*I *51942:B2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51908:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *51922:B2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51941:C I *D sky130_fd_sc_hd__and4_1
+*I *51990:B I *D sky130_fd_sc_hd__and2b_1
+*I *51991:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *51967:D I *D sky130_fd_sc_hd__and4_1
+*I *51968:B1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51896:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51897:A 0.000341562
+2 *51901:B 2.23854e-05
+3 *51942:B2 0.000185722
+4 *51908:B2 0
+5 *51922:B2 2.86803e-05
+6 *51941:C 0
+7 *51990:B 0
+8 *51991:B2 0.000160392
+9 *51967:D 0.000320806
+10 *51968:B1 3.19372e-05
+11 *51896:X 0
+12 *189:105 0.00057145
+13 *189:89 0.000278695
+14 *189:50 0.00059402
+15 *189:45 0.000420867
+16 *189:31 0.000473728
+17 *189:17 0.000362558
+18 *189:15 0.00102701
+19 *189:7 0.000990158
+20 *189:4 0.00027129
+21 *51897:A *51897:B 3.93247e-05
+22 *51897:A *51901:C 3.03221e-06
+23 *51897:A *194:8 0.0002103
+24 *51897:A *207:73 1.02936e-05
+25 *51897:A *281:96 0.000400867
+26 *51922:B2 *281:53 5.71472e-05
+27 *51942:B2 *51894:A 0.000115474
+28 *51942:B2 *192:11 4.8476e-05
+29 *51942:B2 *282:18 3.51442e-05
+30 *51967:D *51971:S 1.31235e-05
+31 *51967:D *51972:A1_N 6.73467e-05
+32 *51967:D *260:8 1.76821e-05
+33 *51967:D *262:56 9.95103e-05
+34 *51967:D *280:37 3.23542e-05
+35 *51968:B1 *263:42 5.922e-05
+36 *51991:B2 *51967:A 2.01359e-05
+37 *51991:B2 *262:56 0
+38 *51991:B2 *280:37 0.000142611
+39 *189:15 *51923:B 0.000256698
+40 *189:15 *192:11 7.61932e-05
+41 *189:15 *203:13 5.52238e-05
+42 *189:15 *281:53 9.99644e-06
+43 *189:17 *51968:B2 0.00014285
+44 *189:17 *232:50 8.86512e-05
+45 *189:17 *263:42 0.000315165
+46 *189:17 *281:53 0.000171023
+47 *189:31 *51921:C 4.46186e-06
+48 *189:31 *51968:B2 5.52238e-05
+49 *189:31 *234:8 2.14757e-05
+50 *189:31 *262:26 4.43256e-05
+51 *189:45 *51941:B 0.00018372
+52 *189:45 *51992:A1 0
+53 *189:45 *193:21 9.60875e-05
+54 *189:45 *193:38 0.000300804
+55 *189:45 *234:8 0.000135292
+56 *189:45 *234:17 4.56437e-05
+57 *189:45 *262:26 0.000191438
+58 *189:45 *262:56 8.2958e-06
+59 *189:45 *278:81 0
+60 *189:45 *281:47 7.41433e-05
+61 *189:50 *51972:A1_N 1.76135e-05
+62 *189:50 *193:21 0.000446603
+63 *189:89 *192:11 4.94455e-05
+64 *189:89 *263:30 0
+65 *189:89 *282:18 0.000152128
+66 *189:105 *51901:C 1.92905e-05
+67 *51967:B *51991:B2 0.000135815
+68 *51969:B *189:31 9.34554e-05
+69 *28:15 *189:45 0.000383558
+70 *28:15 *189:50 0.000446603
+71 *51:8 *51991:B2 0
+72 *183:7 *51968:B1 2.27416e-05
+73 *183:7 *189:17 7.65634e-05
+74 *183:15 *189:45 9.25014e-06
+75 *183:45 *189:15 3.61629e-06
+76 *183:51 *189:15 8.37354e-05
+77 *183:80 *189:7 4.58976e-05
+78 *183:80 *189:15 0.000170964
+79 *183:80 *189:105 0.000114914
+80 *183:88 *51897:A 3.74604e-05
+81 *183:88 *189:105 9.22103e-06
+82 *187:15 *51897:A 0.000316184
+83 *187:22 *51897:A 0
+*RES
+1 *51896:X *189:4 9.3 
+2 *189:4 *189:7 1.375 
+3 *189:7 *189:15 13.2143 
+4 *189:15 *189:17 6.69643 
+5 *189:17 *51968:B1 10.2643 
+6 *189:17 *189:31 12.5 
+7 *189:31 *189:45 19.25 
+8 *189:45 *189:50 9.61607 
+9 *189:50 *51967:D 18.1839 
+10 *189:50 *51991:B2 17.3804 
+11 *189:45 *51990:B 9.3 
+12 *189:31 *51941:C 9.3 
+13 *189:15 *51922:B2 10.2643 
+14 *189:7 *189:89 7.05357 
+15 *189:89 *51908:B2 13.8 
+16 *189:89 *51942:B2 17.5143 
+17 *189:4 *189:105 3.82143 
+18 *189:105 *51901:B 9.72857 
+19 *189:105 *51897:A 27.9786 
+*END
+
+*D_NET *190 0.00146986
+*CONN
+*I *52012:C I *D sky130_fd_sc_hd__and3_1
+*I *51898:B I *D sky130_fd_sc_hd__xnor2_4
+*I *51897:Y O *D sky130_fd_sc_hd__nand2_2
+*CAP
+1 *52012:C 0.000356636
+2 *51898:B 0
+3 *51897:Y 0.000123622
+4 *190:10 0.000480257
+5 *52012:C *283:11 0
+6 *190:10 *51897:B 6.05161e-06
+7 *190:10 *52010:B 0.000121573
+8 *190:10 *281:96 5.52302e-05
+9 *190:10 *283:11 2.28598e-05
+10 *51898:A *52012:C 0
+11 *51898:A *190:10 5.80706e-06
+12 *68:5 *52012:C 0.000272371
+13 *187:22 *190:10 9.10431e-06
+14 *187:33 *52012:C 1.40415e-05
+15 *187:39 *52012:C 2.30526e-06
+*RES
+1 *51897:Y *190:10 20.7821 
+2 *190:10 *51898:B 9.3 
+3 *190:10 *52012:C 25.3893 
+*END
+
+*D_NET *191 0.00154939
+*CONN
+*I *51905:A I *D sky130_fd_sc_hd__xnor2_4
+*I *52016:B2 I *D sky130_fd_sc_hd__a22oi_2
+*I *51898:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *51905:A 0.000107714
+2 *52016:B2 2.54224e-05
+3 *51898:Y 0.000356021
+4 *191:6 0.000489157
+5 *51905:A *51905:B 0.000222885
+6 *51905:A *193:100 7.79781e-06
+7 *52016:B2 *52016:A2 6.05161e-06
+8 *191:6 *51903:A1 0
+9 *191:6 *51905:B 0.000128154
+10 *191:6 *52016:A2 0.00012401
+11 *191:6 *193:100 2.69583e-05
+12 *191:6 *193:113 0
+13 *191:6 *193:117 0
+14 *191:6 *196:6 0
+15 *191:6 *283:11 0
+16 *52014:A *191:6 0
+17 *74:5 *52016:B2 5.52238e-05
+*RES
+1 *51898:Y *191:6 20.6036 
+2 *191:6 *52016:B2 14.3357 
+3 *191:6 *51905:A 16.6571 
+*END
+
+*D_NET *192 0.0142525
+*CONN
+*I *51903:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *52011:A I *D sky130_fd_sc_hd__nand2_1
+*I *51911:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51925:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *51945:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *51944:B I *D sky130_fd_sc_hd__nand2_1
+*I *51971:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *51900:A I *D sky130_fd_sc_hd__buf_2
+*I *51970:B I *D sky130_fd_sc_hd__nand2_1
+*I *51912:A I *D sky130_fd_sc_hd__nand2_1
+*I *51899:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51903:A1 0.000164507
+2 *52011:A 0
+3 *51911:A1 6.01934e-05
+4 *51925:A1 0
+5 *51945:A1 0
+6 *51944:B 2.03441e-05
+7 *51971:A1 0.000214803
+8 *51900:A 0
+9 *51970:B 0.000237207
+10 *51912:A 0
+11 *51899:X 0.000387912
+12 *192:93 0.000419195
+13 *192:79 0.000686248
+14 *192:53 0.000257532
+15 *192:37 0.000457883
+16 *192:31 0.000344008
+17 *192:27 0.000683582
+18 *192:25 0.000871182
+19 *192:17 0.000675918
+20 *192:11 0.000403916
+21 *51903:A1 *51902:B 0.000140933
+22 *51903:A1 *51903:B2 6.8646e-06
+23 *51903:A1 *193:86 0
+24 *51903:A1 *194:36 5.52238e-05
+25 *51903:A1 *196:6 4.62539e-05
+26 *51903:A1 *203:69 0.00014285
+27 *51903:A1 *283:11 1.76039e-05
+28 *51911:A1 *193:86 1.87955e-05
+29 *51911:A1 *207:73 0
+30 *51944:B *51945:A0 0
+31 *51944:B *278:70 5.7661e-06
+32 *51970:B *51972:A1_N 0.0002522
+33 *51970:B *51972:A2_N 5.52238e-05
+34 *51970:B *262:56 0.000109313
+35 *51970:B *272:188 0.00042063
+36 *51971:A1 *278:70 0.000349689
+37 *51971:A1 *279:31 0.000424341
+38 *192:11 *51894:A 0
+39 *192:11 *51907:B 5.52238e-05
+40 *192:11 *199:20 1.40849e-05
+41 *192:11 *203:24 0.000115072
+42 *192:11 *263:30 0.000162549
+43 *192:17 *51907:B 1.04232e-05
+44 *192:25 *51907:B 7.21397e-05
+45 *192:25 *51925:S 3.3283e-05
+46 *192:25 *51943:B 9.71197e-05
+47 *192:25 *193:68 0.000142312
+48 *192:25 *205:10 1.33343e-05
+49 *192:27 *51925:S 0.000523452
+50 *192:27 *51943:B 0.000224545
+51 *192:27 *51945:A0 5.71472e-05
+52 *192:27 *238:10 2.27416e-05
+53 *192:27 *279:31 0.000192489
+54 *192:31 *51945:A0 0.000315209
+55 *192:31 *278:70 7.49387e-06
+56 *192:31 *279:31 0.00044366
+57 *192:37 *51990:A_N 9.71197e-05
+58 *192:37 *51992:A1 7.6644e-05
+59 *192:37 *262:56 0.000465876
+60 *192:37 *278:81 2.74584e-05
+61 *192:53 *51945:A0 0
+62 *192:79 *51907:B 0.000516263
+63 *192:79 *51911:B1 0.000142856
+64 *192:79 *193:86 7.48301e-06
+65 *192:79 *194:22 0.000175977
+66 *192:79 *194:36 5.52238e-05
+67 *192:79 *200:10 0.000183726
+68 *192:79 *205:10 0.000451463
+69 *192:93 *194:36 0.000233007
+70 *51903:B1 *51903:A1 0.000170654
+71 *51942:B2 *192:11 4.8476e-05
+72 *51971:A0 *51970:B 8.3725e-05
+73 *51972:B1 *51970:B 3.18676e-05
+74 *51996:A1 *51971:A1 0.00014183
+75 *28:15 *51970:B 0.000110643
+76 *28:15 *192:37 0.000618905
+77 *51:8 *192:37 0
+78 *55:10 *51971:A1 5.52302e-05
+79 *189:15 *192:11 7.61932e-05
+80 *189:89 *192:11 4.94455e-05
+81 *191:6 *51903:A1 0
+*RES
+1 *51899:X *192:11 26.9964 
+2 *192:11 *51912:A 9.3 
+3 *192:11 *192:17 0.428571 
+4 *192:17 *192:25 6.44643 
+5 *192:25 *192:27 13.6786 
+6 *192:27 *192:31 4.66071 
+7 *192:31 *192:37 17.125 
+8 *192:37 *51970:B 17.2643 
+9 *192:37 *51900:A 9.3 
+10 *192:31 *192:53 0.428571 
+11 *192:53 *51971:A1 18.6036 
+12 *192:53 *51944:B 9.72857 
+13 *192:27 *51945:A1 9.3 
+14 *192:25 *51925:A1 9.3 
+15 *192:17 *192:79 11.625 
+16 *192:79 *51911:A1 19.0321 
+17 *192:79 *192:93 4.16071 
+18 *192:93 *52011:A 9.3 
+19 *192:93 *51903:A1 22.925 
+*END
+
+*D_NET *193 0.017371
+*CONN
+*I *52013:A1 I *D sky130_fd_sc_hd__mux2_1
+*I *52049:A I *D sky130_fd_sc_hd__nand2_1
+*I *52051:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *51904:A1 I *D sky130_fd_sc_hd__a21bo_1
+*I *52016:A1 I *D sky130_fd_sc_hd__a22oi_2
+*I *51907:A I *D sky130_fd_sc_hd__and2_1
+*I *51926:A1_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51946:A1_N I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51992:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51972:A1_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51900:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *52013:A1 0
+2 *52049:A 0.000111602
+3 *52051:A1 0
+4 *51904:A1 0
+5 *52016:A1 1.99857e-05
+6 *51907:A 1.70795e-05
+7 *51926:A1_N 6.45638e-05
+8 *51946:A1_N 0
+9 *51992:A1 0.000272254
+10 *51972:A1_N 0.000212185
+11 *51900:X 0
+12 *193:117 0.00027759
+13 *193:113 0.000457189
+14 *193:100 0.000479035
+15 *193:86 0.00112284
+16 *193:68 0.001679
+17 *193:52 0.0012853
+18 *193:38 0.00128124
+19 *193:21 0.00145843
+20 *193:4 0.000590964
+21 *51907:A *51907:B 0
+22 *51926:A1_N *51925:A0 0.000101545
+23 *51926:A1_N *51937:A 0.000148196
+24 *51926:A1_N *203:13 1.37292e-05
+25 *51926:A1_N *212:41 1.37693e-05
+26 *51926:A1_N *216:8 9.25014e-06
+27 *51926:A1_N *263:30 1.4763e-05
+28 *51972:A1_N *51971:S 0
+29 *51992:A1 *263:42 5.52238e-05
+30 *51992:A1 *278:81 8.5662e-05
+31 *51992:A1 *280:37 7.83659e-05
+32 *52016:A1 *52016:A2 1.04232e-05
+33 *52049:A *283:39 6.97409e-05
+34 *193:38 *292:DIODE 8.77116e-05
+35 *193:38 *51969:A 3.30352e-05
+36 *193:38 *212:12 0.000122101
+37 *193:38 *212:29 3.18676e-05
+38 *193:38 *238:10 0
+39 *193:38 *279:31 2.34204e-05
+40 *193:38 *280:37 1.09495e-05
+41 *193:38 *281:206 2.56694e-05
+42 *193:52 *51925:A0 7.83659e-05
+43 *193:52 *51937:A 0.000306293
+44 *193:52 *207:7 0.00031119
+45 *193:52 *207:55 0.000233927
+46 *193:52 *219:6 7.25296e-05
+47 *193:52 *236:11 0.000187892
+48 *193:68 *51907:B 0.000355474
+49 *193:68 *51925:S 0.000136958
+50 *193:86 *51903:B2 0
+51 *193:86 *51907:B 5.62995e-05
+52 *193:86 *51911:B1 0
+53 *193:86 *52016:A2 2.27416e-05
+54 *193:86 *194:22 0.000206262
+55 *193:86 *203:69 0.000228558
+56 *193:86 *204:8 0
+57 *193:100 *51902:B 5.71472e-05
+58 *193:100 *52016:A2 0.000125193
+59 *193:100 *52016:B1 0.000125724
+60 *193:100 *196:6 8.07879e-05
+61 *193:100 *203:69 2.89114e-05
+62 *193:113 *51902:B 0.00038945
+63 *193:113 *195:5 0.000317082
+64 *193:113 *203:69 4.58976e-05
+65 *51902:A *193:113 2.78321e-05
+66 *51902:A *193:117 9.24395e-05
+67 *51903:A1 *193:86 0
+68 *51905:A *193:100 7.79781e-06
+69 *51911:A1 *193:86 1.87955e-05
+70 *51967:D *51972:A1_N 6.73467e-05
+71 *51969:B *193:38 1.40306e-05
+72 *51970:B *51972:A1_N 0.0002522
+73 *51992:A2 *51992:A1 0.000262948
+74 *51992:B1 *51992:A1 0
+75 *52013:A0 *193:113 0.000236313
+76 *52013:S *193:117 0.000106542
+77 *52014:A *193:113 0.000125731
+78 *52051:B1 *52049:A 0.000230475
+79 *52051:B1 *193:117 0
+80 *28:15 *51972:A1_N 0.000232687
+81 *28:15 *193:21 1.54142e-05
+82 *28:15 *193:38 1.98839e-05
+83 *51:8 *51972:A1_N 0
+84 *108:9 *52049:A 0.000229456
+85 *183:15 *51992:A1 0
+86 *187:10 *193:68 0.000276211
+87 *187:10 *193:86 4.18895e-05
+88 *187:39 *52049:A 5.33433e-05
+89 *187:49 *52049:A 4.14279e-05
+90 *187:91 *193:86 0.000272371
+91 *189:45 *51992:A1 0
+92 *189:45 *193:21 9.60875e-05
+93 *189:45 *193:38 0.000300804
+94 *189:50 *51972:A1_N 1.76135e-05
+95 *189:50 *193:21 0.000446603
+96 *191:6 *193:100 2.69583e-05
+97 *191:6 *193:113 0
+98 *191:6 *193:117 0
+99 *192:25 *193:68 0.000142312
+100 *192:37 *51992:A1 7.6644e-05
+101 *192:79 *193:86 7.48301e-06
+*RES
+1 *51900:X *193:4 9.3 
+2 *193:4 *51972:A1_N 23.2687 
+3 *193:4 *193:21 5.46429 
+4 *193:21 *51992:A1 24.7286 
+5 *193:21 *193:38 21.4107 
+6 *193:38 *51946:A1_N 9.3 
+7 *193:38 *193:52 16.9821 
+8 *193:52 *51926:A1_N 15.8848 
+9 *193:52 *193:68 16.6786 
+10 *193:68 *51907:A 9.72857 
+11 *193:68 *193:86 23.9464 
+12 *193:86 *52016:A1 9.72857 
+13 *193:86 *193:100 14.1607 
+14 *193:100 *51904:A1 9.3 
+15 *193:100 *193:113 13.3571 
+16 *193:113 *193:117 7.66071 
+17 *193:117 *52051:A1 9.3 
+18 *193:117 *52049:A 13.9786 
+19 *193:113 *52013:A1 13.8 
+*END
+
+*D_NET *194 0.00521388
+*CONN
+*I *51902:B I *D sky130_fd_sc_hd__and2_1
+*I *51903:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *51911:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51909:A2 I *D sky130_fd_sc_hd__a21bo_1
+*I *51901:X O *D sky130_fd_sc_hd__and3_1
+*CAP
+1 *51902:B 0.000202218
+2 *51903:B2 0.000132483
+3 *51911:A2 0
+4 *51909:A2 2.52229e-05
+5 *51901:X 0.000223841
+6 *194:36 0.000442434
+7 *194:22 0.00033271
+8 *194:8 0.00047404
+9 *51902:B *203:69 7.29015e-05
+10 *51903:B2 *52010:B 0
+11 *194:8 *51901:C 3.92757e-05
+12 *194:8 *281:96 0.000104236
+13 *194:22 *51911:B1 0.000144773
+14 *194:22 *202:8 0.000125724
+15 *194:22 *207:73 0
+16 *51897:A *194:8 0.0002103
+17 *51903:A1 *51902:B 0.000140933
+18 *51903:A1 *51903:B2 6.8646e-06
+19 *51903:A1 *194:36 5.52238e-05
+20 *51903:B1 *51902:B 8.46829e-05
+21 *51903:B1 *51903:B2 8.5896e-05
+22 *51903:B1 *194:36 0.000116472
+23 *52011:B *51902:B 0
+24 *52011:B *194:22 0
+25 *52011:B *194:36 4.61598e-05
+26 *52013:A0 *51902:B 0.000673614
+27 *187:10 *194:8 5.80706e-06
+28 *187:10 *194:22 6.16744e-05
+29 *187:15 *51909:A2 5.52238e-05
+30 *187:22 *194:8 0
+31 *187:91 *194:22 9.90431e-05
+32 *187:91 *194:36 0.000135056
+33 *192:79 *194:22 0.000175977
+34 *192:79 *194:36 5.52238e-05
+35 *192:93 *194:36 0.000233007
+36 *193:86 *51903:B2 0
+37 *193:86 *194:22 0.000206262
+38 *193:100 *51902:B 5.71472e-05
+39 *193:113 *51902:B 0.00038945
+*RES
+1 *51901:X *194:8 18.7107 
+2 *194:8 *51909:A2 14.3357 
+3 *194:8 *194:22 11.8214 
+4 *194:22 *51911:A2 9.3 
+5 *194:22 *194:36 5.23214 
+6 *194:36 *51903:B2 20.8536 
+7 *194:36 *51902:B 18.1036 
+*END
+
+*D_NET *195 0.00167624
+*CONN
+*I *51904:A2 I *D sky130_fd_sc_hd__a21bo_1
+*I *52016:A2 I *D sky130_fd_sc_hd__a22oi_2
+*I *51902:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51904:A2 0
+2 *52016:A2 0.000323926
+3 *51902:X 4.60694e-05
+4 *195:5 0.000369996
+5 *195:5 *203:69 0.000315158
+6 *52016:A1 *52016:A2 1.04232e-05
+7 *52016:B2 *52016:A2 6.05161e-06
+8 *74:5 *52016:A2 1.55885e-05
+9 *191:6 *52016:A2 0.00012401
+10 *193:86 *52016:A2 2.27416e-05
+11 *193:100 *52016:A2 0.000125193
+12 *193:113 *195:5 0.000317082
+*RES
+1 *51902:X *195:5 12.3 
+2 *195:5 *52016:A2 23.675 
+3 *195:5 *51904:A2 9.3 
+*END
+
+*D_NET *196 0.000868951
+*CONN
+*I *52016:B1 I *D sky130_fd_sc_hd__a22oi_2
+*I *51904:B1_N I *D sky130_fd_sc_hd__a21bo_1
+*I *51903:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *52016:B1 6.8198e-05
+2 *51904:B1_N 6.59684e-05
+3 *51903:X 0.000124408
+4 *196:6 0.000258574
+5 *51904:B1_N *203:69 9.90367e-05
+6 *52016:B1 *203:69 0
+7 *196:6 *203:69 0
+8 *51903:A1 *196:6 4.62539e-05
+9 *191:6 *196:6 0
+10 *193:100 *52016:B1 0.000125724
+11 *193:100 *196:6 8.07879e-05
+*RES
+1 *51903:X *196:6 16.3536 
+2 *196:6 *51904:B1_N 14.7464 
+3 *196:6 *52016:B1 15.4429 
+*END
+
+*D_NET *197 0.000703059
+*CONN
+*I *51905:B I *D sky130_fd_sc_hd__xnor2_4
+*I *51904:X O *D sky130_fd_sc_hd__a21bo_1
+*CAP
+1 *51905:B 0.00017601
+2 *51904:X 0.00017601
+3 *51905:B *198:6 0
+4 *51905:A *51905:B 0.000222885
+5 *52018:A *51905:B 0
+6 *191:6 *51905:B 0.000128154
+*RES
+1 *51904:X *51905:B 31.975 
+*END
+
+*D_NET *198 0.000645943
+*CONN
+*I *51918:A I *D sky130_fd_sc_hd__xor2_4
+*I *52022:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51905:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *51918:A 0.000181973
+2 *52022:A1 0
+3 *51905:Y 0.000140999
+4 *198:6 0.000322971
+5 *51918:A *51918:B 0
+6 *51905:B *198:6 0
+*RES
+1 *51905:Y *198:6 16.3536 
+2 *198:6 *52022:A1 13.8 
+3 *198:6 *51918:A 16.6571 
+*END
+
+*D_NET *199 0.00367032
+*CONN
+*I *51907:B I *D sky130_fd_sc_hd__and2_1
+*I *51912:B I *D sky130_fd_sc_hd__nand2_1
+*I *51923:A I *D sky130_fd_sc_hd__or2_1
+*I *51906:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51907:B 0.000183878
+2 *51912:B 0
+3 *51923:A 0
+4 *51906:X 0.000124864
+5 *199:20 0.000430044
+6 *199:10 0.000371031
+7 *199:10 *51923:B 1.65558e-05
+8 *199:10 *203:13 0
+9 *199:10 *281:67 0.00031344
+10 *199:10 *284:28 0.000230305
+11 *199:20 *203:24 0.00022117
+12 *199:20 *212:54 0.000198203
+13 *199:20 *216:8 9.83442e-05
+14 *199:20 *263:30 9.91086e-05
+15 *199:20 *284:28 0.0001198
+16 *51907:A *51907:B 0
+17 *51942:A1 *199:20 9.9129e-05
+18 *183:54 *199:20 3.12359e-05
+19 *183:59 *199:20 5.33005e-05
+20 *192:11 *51907:B 5.52238e-05
+21 *192:11 *199:20 1.40849e-05
+22 *192:17 *51907:B 1.04232e-05
+23 *192:25 *51907:B 7.21397e-05
+24 *192:79 *51907:B 0.000516263
+25 *193:68 *51907:B 0.000355474
+26 *193:86 *51907:B 5.62995e-05
+*RES
+1 *51906:X *199:10 22.3357 
+2 *199:10 *51923:A 9.3 
+3 *199:10 *199:20 15.8571 
+4 *199:20 *51912:B 9.3 
+5 *199:20 *51907:B 17.5143 
+*END
+
+*D_NET *200 0.00292848
+*CONN
+*I *51915:A1 I *D sky130_fd_sc_hd__o211a_1
+*I *51916:B1 I *D sky130_fd_sc_hd__a211o_1
+*I *51907:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51915:A1 0.000253306
+2 *51916:B1 0.000174373
+3 *51907:X 0.000266143
+4 *200:10 0.000693822
+5 *51915:A1 *51915:A2 3.01072e-05
+6 *51915:A1 *51915:B1 0.000170506
+7 *51915:A1 *264:9 2.63842e-05
+8 *51916:B1 *51915:B1 5.33005e-05
+9 *51916:B1 *51916:C1 0.00010326
+10 *51916:B1 *51934:C1 5.5357e-06
+11 *51916:B1 *203:39 1.02821e-05
+12 *51916:B1 *220:14 0.000181663
+13 *200:10 *51911:B1 0.000125731
+14 *200:10 *51916:A1 3.17148e-05
+15 *200:10 *51916:A2 6.93867e-05
+16 *200:10 *203:42 0.000184884
+17 *200:10 *207:73 0.000171375
+18 *200:10 *207:172 0.000192983
+19 *192:79 *200:10 0.000183726
+*RES
+1 *51907:X *200:10 25.05 
+2 *200:10 *51916:B1 21.4875 
+3 *200:10 *51915:A1 13.4786 
+*END
+
+*D_NET *201 0.00013164
+*CONN
+*I *51909:B1_N I *D sky130_fd_sc_hd__a21bo_1
+*I *51908:X O *D sky130_fd_sc_hd__a22o_1
+*CAP
+1 *51909:B1_N 6.58201e-05
+2 *51908:X 6.58201e-05
+3 *51909:B1_N *51894:A 0
+4 *51909:B1_N *281:96 0
+*RES
+1 *51908:X *51909:B1_N 28.6357 
+*END
+
+*D_NET *202 0.00113536
+*CONN
+*I *51913:A_N I *D sky130_fd_sc_hd__and3b_1
+*I *51928:B1_N I *D sky130_fd_sc_hd__a21bo_1
+*I *51909:X O *D sky130_fd_sc_hd__a21bo_1
+*CAP
+1 *51913:A_N 1.44544e-05
+2 *51928:B1_N 2.12761e-05
+3 *51909:X 0.000181484
+4 *202:8 0.000217215
+5 *51913:A_N *51913:C 8.66063e-05
+6 *51913:A_N *51928:A2 9.90431e-05
+7 *51928:B1_N *51913:C 0.00014285
+8 *51928:B1_N *51928:A2 0.00014285
+9 *202:8 *205:10 0
+10 *202:8 *207:73 0.000103853
+11 *194:22 *202:8 0.000125724
+*RES
+1 *51909:X *202:8 22.3714 
+2 *202:8 *51928:B1_N 10.6571 
+3 *202:8 *51913:A_N 10.2464 
+*END
+
+*D_NET *203 0.0282191
+*CONN
+*I *51915:C1 I *D sky130_fd_sc_hd__o211a_1
+*I *51916:A2 I *D sky130_fd_sc_hd__a211o_1
+*I *369:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *372:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52096:B I *D sky130_fd_sc_hd__nand2_1
+*I *52113:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *374:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52114:B I *D sky130_fd_sc_hd__and3_1
+*I *376:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52111:B I *D sky130_fd_sc_hd__and3_1
+*I *52061:A I *D sky130_fd_sc_hd__nand2_1
+*I *349:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52021:B I *D sky130_fd_sc_hd__nand2_1
+*I *358:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *294:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *297:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51911:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *299:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *315:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51942:B1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51910:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51915:C1 3.07012e-05
+2 *51916:A2 0.000160904
+3 *369:DIODE 0.000413476
+4 *372:DIODE 0
+5 *52096:B 0
+6 *52113:A2 6.08868e-05
+7 *374:DIODE 0.00019865
+8 *52114:B 0
+9 *376:DIODE 0.000141376
+10 *52111:B 0
+11 *52061:A 1.44544e-05
+12 *349:DIODE 0.000204066
+13 *52021:B 0.000415668
+14 *358:DIODE 0.000236964
+15 *294:DIODE 0
+16 *297:DIODE 0
+17 *51911:B1 9.15792e-05
+18 *299:DIODE 0
+19 *315:DIODE 0.000982398
+20 *51942:B1 0
+21 *51910:X 0.000591893
+22 *203:182 0.000515783
+23 *203:156 0.000541108
+24 *203:147 0.000345097
+25 *203:137 0.000671592
+26 *203:131 0.000615922
+27 *203:125 0.00030931
+28 *203:120 0.000511654
+29 *203:94 0.00102128
+30 *203:87 0.000415999
+31 *203:85 0.000438792
+32 *203:76 0.000691055
+33 *203:69 0.00193341
+34 *203:54 0.00185974
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+36 *203:41 0.000285847
+37 *203:39 0.000336301
+38 *203:31 0.000373673
+39 *203:24 0.001376
+40 *203:13 0.000917417
+41 *315:DIODE *292:DIODE 0.000578035
+42 *315:DIODE *295:DIODE 5.70551e-05
+43 *315:DIODE *51920:B 5.20669e-05
+44 *315:DIODE *51927:B 5.52238e-05
+45 *315:DIODE *213:7 0.000105945
+46 *315:DIODE *220:14 3.69407e-05
+47 *315:DIODE *264:40 0.000446597
+48 *315:DIODE *264:48 8.87524e-05
+49 *349:DIODE *267:62 1.40306e-05
+50 *358:DIODE *266:64 5.38072e-05
+51 *369:DIODE *268:48 0.00066861
+52 *374:DIODE *268:21 6.8646e-06
+53 *374:DIODE *277:5 0.000142856
+54 *51911:B1 *204:8 0.000125724
+55 *51911:B1 *207:73 2.39779e-05
+56 *51915:C1 *51915:A2 1.05402e-05
+57 *51915:C1 *51915:B1 3.45001e-05
+58 *51915:C1 *206:9 2.28598e-05
+59 *51916:A2 *51916:A1 6.30292e-05
+60 *51916:A2 *51934:C1 1.98475e-05
+61 *51916:A2 *208:9 0
+62 *52061:A *265:13 9.90431e-05
+63 *52113:A2 *268:21 2.30314e-05
+64 *203:13 *51923:B 0.000143043
+65 *203:13 *51925:A0 4.46186e-06
+66 *203:13 *51943:B 0.000388725
+67 *203:13 *212:41 2.78608e-05
+68 *203:13 *262:14 0
+69 *203:13 *263:30 5.74499e-06
+70 *203:24 *51929:B_N 0
+71 *203:24 *212:54 0.000161146
+72 *203:24 *263:30 2.59355e-05
+73 *203:31 *220:14 3.65178e-05
+74 *203:39 *51915:B1 4.58194e-05
+75 *203:39 *51929:A 0.000126629
+76 *203:39 *51929:B_N 0.000274294
+77 *203:39 *206:9 0.000114577
+78 *203:39 *220:14 0.000234644
+79 *203:42 *204:8 3.17148e-05
+80 *203:42 *206:8 2.56601e-05
+81 *203:54 *51913:C 5.33005e-05
+82 *203:54 *51928:A2 5.33005e-05
+83 *203:69 *52055:A 0.000232399
+84 *203:69 *225:108 0.000485543
+85 *203:69 *225:164 0.000142856
+86 *203:69 *281:126 4.88637e-05
+87 *203:69 *281:134 0.000105163
+88 *203:85 *266:64 0
+89 *203:94 *265:13 0.000140933
+90 *203:125 *267:62 0.000600754
+91 *203:131 *267:50 0.000317082
+92 *203:131 *267:62 3.53302e-05
+93 *203:137 *267:46 9.99644e-06
+94 *203:137 *267:50 3.48705e-05
+95 *203:137 *268:28 3.69047e-06
+96 *203:137 *268:48 1.97756e-05
+97 *203:147 *268:28 3.67257e-05
+98 *203:156 *268:21 1.02969e-05
+99 *203:156 *268:28 3.48705e-05
+100 *51902:B *203:69 7.29015e-05
+101 *51903:A1 *203:69 0.00014285
+102 *51904:B1_N *203:69 9.90367e-05
+103 *51916:B1 *203:39 1.02821e-05
+104 *51926:A1_N *203:13 1.37292e-05
+105 *51942:A1 *203:13 0
+106 *52013:A0 *203:69 9.99644e-06
+107 *52016:B1 *203:69 0
+108 *52019:A *203:69 0.000175502
+109 *52020:B *203:69 0.000271345
+110 *52057:B *203:76 0
+111 *52064:A *203:120 0
+112 *52064:A *203:125 3.48705e-05
+113 *52064:B *349:DIODE 0
+114 *52064:B *203:125 4.72917e-05
+115 *52065:A *52021:B 3.48705e-05
+116 *52065:A *203:94 5.19805e-05
+117 *52065:B *52021:B 2.89016e-05
+118 *52065:B *203:94 9.92409e-05
+119 *52066:A *203:120 6.81083e-05
+120 *52066:A *203:125 5.33005e-05
+121 *52066:B *203:120 0
+122 *52090:A1 *203:76 0
+123 *52090:B1_N *203:76 4.79842e-05
+124 *52090:B1_N *203:85 1.78353e-05
+125 *52093:A *203:76 0
+126 *52095:A2 *203:94 2.89114e-05
+127 *52095:B1_N *203:120 0.000154762
+128 *52097:B *203:131 0.000186662
+129 *52112:B1 *203:131 4.72917e-05
+130 *52115:A *203:156 8.57023e-05
+131 *52115:B *203:156 9.77274e-05
+132 *52129:B1 *374:DIODE 2.43817e-05
+133 *52129:B1 *203:156 6.34061e-05
+134 *112:6 *203:69 0
+135 *112:6 *203:76 0
+136 *117:6 *203:85 0
+137 *117:6 *203:94 0.000125724
+138 *117:6 *203:120 0
+139 *118:7 *52061:A 8.66063e-05
+140 *118:7 *203:94 0.00014285
+141 *120:6 *349:DIODE 0
+142 *144:8 *203:69 0
+143 *144:8 *203:76 0
+144 *157:12 *203:182 9.25014e-06
+145 *167:11 *203:137 9.01258e-06
+146 *170:13 *374:DIODE 7.6644e-05
+147 *180:10 *376:DIODE 0.000270236
+148 *189:15 *203:13 5.52238e-05
+149 *192:11 *203:24 0.000115072
+150 *192:79 *51911:B1 0.000142856
+151 *193:86 *51911:B1 0
+152 *193:86 *203:69 0.000228558
+153 *193:100 *203:69 2.89114e-05
+154 *193:113 *203:69 4.58976e-05
+155 *194:22 *51911:B1 0.000144773
+156 *195:5 *203:69 0.000315158
+157 *196:6 *203:69 0
+158 *199:10 *203:13 0
+159 *199:20 *203:24 0.00022117
+160 *200:10 *51911:B1 0.000125731
+161 *200:10 *51916:A2 6.93867e-05
+162 *200:10 *203:42 0.000184884
+*RES
+1 *51910:X *203:13 28.7821 
+2 *203:13 *51942:B1 9.3 
+3 *203:13 *203:24 16.6429 
+4 *203:24 *315:DIODE 29.9607 
+5 *203:24 *203:31 1.35714 
+6 *203:31 *299:DIODE 9.3 
+7 *203:31 *203:39 8.76786 
+8 *203:39 *203:41 4.5 
+9 *203:41 *203:42 2.55357 
+10 *203:42 *51911:B1 17.4071 
+11 *203:42 *203:54 7.91071 
+12 *203:54 *297:DIODE 9.3 
+13 *203:54 *203:69 45.7857 
+14 *203:69 *294:DIODE 13.8 
+15 *203:69 *203:76 4.98214 
+16 *203:76 *358:DIODE 16.8 
+17 *203:76 *203:85 3.46429 
+18 *203:85 *203:87 4.5 
+19 *203:87 *203:94 16.2321 
+20 *203:94 *52021:B 14.675 
+21 *203:94 *349:DIODE 21.3893 
+22 *203:87 *52061:A 10.2464 
+23 *203:85 *203:120 5.28571 
+24 *203:120 *203:125 10.3929 
+25 *203:125 *203:131 4.98214 
+26 *203:131 *52111:B 9.3 
+27 *203:131 *203:137 5.46429 
+28 *203:137 *376:DIODE 21.7643 
+29 *203:137 *203:147 0.946429 
+30 *203:147 *52114:B 9.3 
+31 *203:147 *203:156 8.90179 
+32 *203:156 *374:DIODE 17.2554 
+33 *203:156 *52113:A2 14.9161 
+34 *203:125 *52096:B 9.3 
+35 *203:120 *203:182 5.83929 
+36 *203:182 *372:DIODE 9.3 
+37 *203:182 *369:DIODE 15.5857 
+38 *203:41 *51916:A2 16.9027 
+39 *203:39 *51915:C1 10.2643 
+*END
+
+*D_NET *204 0.0016872
+*CONN
+*I *51913:B I *D sky130_fd_sc_hd__and3b_1
+*I *51928:A2 I *D sky130_fd_sc_hd__a21bo_1
+*I *51911:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *51913:B 3.82418e-05
+2 *51928:A2 0.000161088
+3 *51911:X 9.62995e-05
+4 *204:8 0.000295629
+5 *51928:A2 *51913:C 0.000149953
+6 *51928:A2 *207:69 0.000493352
+7 *51911:B1 *204:8 0.000125724
+8 *51913:A_N *51928:A2 9.90431e-05
+9 *51928:B1_N *51928:A2 0.00014285
+10 *193:86 *204:8 0
+11 *203:42 *204:8 3.17148e-05
+12 *203:54 *51928:A2 5.33005e-05
+*RES
+1 *51911:X *204:8 20.2464 
+2 *204:8 *51928:A2 15.175 
+3 *204:8 *51913:B 10.0321 
+*END
+
+*D_NET *205 0.00232882
+*CONN
+*I *51928:A1 I *D sky130_fd_sc_hd__a21bo_1
+*I *51913:C I *D sky130_fd_sc_hd__and3b_1
+*I *51912:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51928:A1 0
+2 *51913:C 0.000314919
+3 *51912:Y 0.000400736
+4 *205:10 0.000715655
+5 *51913:A_N *51913:C 8.66063e-05
+6 *51928:A2 *51913:C 0.000149953
+7 *51928:B1_N *51913:C 0.00014285
+8 *192:25 *205:10 1.33343e-05
+9 *192:79 *205:10 0.000451463
+10 *202:8 *205:10 0
+11 *203:54 *51913:C 5.33005e-05
+*RES
+1 *51912:Y *205:10 24.175 
+2 *205:10 *51913:C 15.1929 
+3 *205:10 *51928:A1 9.3 
+*END
+
+*D_NET *206 0.00194536
+*CONN
+*I *51915:A2 I *D sky130_fd_sc_hd__o211a_1
+*I *51916:C1 I *D sky130_fd_sc_hd__a211o_1
+*I *51929:A I *D sky130_fd_sc_hd__or2b_1
+*I *51913:X O *D sky130_fd_sc_hd__and3b_1
+*CAP
+1 *51915:A2 7.11167e-05
+2 *51916:C1 0.000177036
+3 *51929:A 0.000151116
+4 *51913:X 5.91717e-05
+5 *206:9 0.000586973
+6 *206:8 0.000389109
+7 *51915:A2 *51915:B1 9.73044e-06
+8 *51916:C1 *51929:B_N 0
+9 *51916:C1 *51934:C1 6.5408e-06
+10 *51916:C1 *207:172 2.83893e-05
+11 *51916:C1 *220:14 1.18064e-05
+12 *51916:C1 *222:10 0
+13 *206:9 *51915:B1 2.07382e-05
+14 *51915:A1 *51915:A2 3.01072e-05
+15 *51915:C1 *51915:A2 1.05402e-05
+16 *51915:C1 *206:9 2.28598e-05
+17 *51916:B1 *51916:C1 0.00010326
+18 *203:39 *51929:A 0.000126629
+19 *203:39 *206:9 0.000114577
+20 *203:42 *206:8 2.56601e-05
+*RES
+1 *51913:X *206:8 19.3357 
+2 *206:8 *206:9 3.41071 
+3 *206:9 *51929:A 11.4786 
+4 *206:9 *51916:C1 21.8268 
+5 *206:8 *51915:A2 11.1348 
+*END
+
+*D_NET *207 0.0239197
+*CONN
+*I *51916:A1 I *D sky130_fd_sc_hd__a211o_1
+*I *51915:B1 I *D sky130_fd_sc_hd__o211a_1
+*I *346:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52087:A I *D sky130_fd_sc_hd__nand3_1
+*I *363:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *365:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52052:A I *D sky130_fd_sc_hd__nand2_1
+*I *355:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *364:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52086:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *52083:A I *D sky130_fd_sc_hd__and3_1
+*I *52015:A I *D sky130_fd_sc_hd__nand2_1
+*I *296:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *298:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51993:A I *D sky130_fd_sc_hd__nand2_1
+*I *51995:A I *D sky130_fd_sc_hd__nor2_1
+*I *338:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51966:A I *D sky130_fd_sc_hd__nand2_1
+*I *324:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *339:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51914:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51916:A1 4.96853e-05
+2 *51915:B1 7.69184e-05
+3 *346:DIODE 0
+4 *52087:A 0.000427718
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+12 *52015:A 0
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+39 *207:7 0.000802104
+40 *207:4 0.00119144
+41 *324:DIODE *272:74 0.000537165
+42 *339:DIODE *278:47 7.03103e-05
+43 *339:DIODE *278:56 8.35655e-05
+44 *365:DIODE *225:114 0.00010326
+45 *365:DIODE *281:115 0
+46 *365:DIODE *281:126 0.00049041
+47 *365:DIODE *281:134 0.000217141
+48 *51916:A1 *220:14 0.000141368
+49 *52083:A *283:59 7.48091e-05
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+51 *52087:A *225:114 6.62761e-05
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+53 *52087:A *225:128 0.000248588
+54 *207:7 *51946:B2 9.90431e-05
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+57 *207:7 *236:11 8.0023e-05
+58 *207:7 *258:8 0.000320024
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+60 *207:19 *258:8 0.000156926
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+62 *207:21 *278:56 1.32552e-05
+63 *207:32 *261:16 9.34004e-05
+64 *207:55 *51937:A 4.87854e-05
+65 *207:73 *51897:B 9.60875e-05
+66 *207:73 *281:104 0.000269662
+67 *207:73 *283:11 0.000570226
+68 *207:77 *281:104 0.000276211
+69 *207:89 *52015:B 5.7661e-06
+70 *207:89 *281:104 3.48705e-05
+71 *207:89 *281:115 7.44397e-05
+72 *207:102 *283:59 1.97381e-05
+73 *207:113 *283:59 0.000271197
+74 *207:152 *225:114 3.39068e-05
+75 *207:152 *225:118 0
+76 *207:172 *220:14 9.25014e-06
+77 *51897:A *207:73 1.02936e-05
+78 *51911:A1 *207:73 0
+79 *51911:B1 *207:73 2.39779e-05
+80 *51915:A1 *51915:B1 0.000170506
+81 *51915:A2 *51915:B1 9.73044e-06
+82 *51915:C1 *51915:B1 3.45001e-05
+83 *51916:A2 *51916:A1 6.30292e-05
+84 *51916:B1 *51915:B1 5.33005e-05
+85 *51916:C1 *207:172 2.83893e-05
+86 *51928:A2 *207:69 0.000493352
+87 *51995:B *207:13 0.000272371
+88 *51996:A1 *207:13 0.000227539
+89 *51996:A2 *207:13 1.24368e-05
+90 *51996:A2 *207:19 0.000190917
+91 *51996:B1 *207:13 9.60875e-05
+92 *52014:B *207:73 0.00022266
+93 *52053:A *207:98 3.60438e-05
+94 *52053:A *207:102 0
+95 *52053:B *52052:A 0.000230482
+96 *52054:A *207:89 0.000151071
+97 *52054:B *207:92 0
+98 *52083:C *207:113 0
+99 *52084:A2 *207:92 0
+100 *52088:A *364:DIODE 1.55953e-05
+101 *52121:A *364:DIODE 0.00010096
+102 *52121:A *207:113 0.000451463
+103 *111:6 *365:DIODE 4.48113e-05
+104 *140:5 *355:DIODE 9.90431e-05
+105 *187:15 *207:73 0.000126629
+106 *187:91 *207:73 0
+107 *193:52 *207:7 0.00031119
+108 *193:52 *207:55 0.000233927
+109 *194:22 *207:73 0
+110 *200:10 *51916:A1 3.17148e-05
+111 *200:10 *207:73 0.000171375
+112 *200:10 *207:172 0.000192983
+113 *202:8 *207:73 0.000103853
+114 *203:39 *51915:B1 4.58194e-05
+115 *206:9 *51915:B1 2.07382e-05
+*RES
+1 *51914:X *207:4 9.3 
+2 *207:4 *207:7 13.5893 
+3 *207:7 *207:13 5.08929 
+4 *207:13 *207:19 8.78571 
+5 *207:19 *207:21 0.535714 
+6 *207:21 *339:DIODE 13.9429 
+7 *207:21 *207:32 11.25 
+8 *207:32 *324:DIODE 14.3536 
+9 *207:32 *51966:A 9.3 
+10 *207:19 *338:DIODE 9.3 
+11 *207:13 *51995:A 9.3 
+12 *207:7 *51993:A 9.3 
+13 *207:4 *207:55 9.57143 
+14 *207:55 *298:DIODE 9.3 
+15 *207:55 *207:61 2.58929 
+16 *207:61 *296:DIODE 9.3 
+17 *207:61 *207:69 12.4286 
+18 *207:69 *207:73 27.2679 
+19 *207:73 *207:77 3.32143 
+20 *207:77 *52015:A 9.3 
+21 *207:77 *207:89 8.28571 
+22 *207:89 *207:91 4.5 
+23 *207:91 *207:92 2.25 
+24 *207:92 *207:98 2.60714 
+25 *207:98 *207:102 5.83929 
+26 *207:102 *52083:A 10.6571 
+27 *207:102 *207:113 10.9464 
+28 *207:113 *52086:A1 9.3 
+29 *207:113 *364:DIODE 11.8893 
+30 *207:98 *355:DIODE 14.7464 
+31 *207:92 *52052:A 15.9786 
+32 *207:91 *365:DIODE 22.7464 
+33 *207:89 *207:152 1.91071 
+34 *207:152 *363:DIODE 9.3 
+35 *207:152 *52087:A 19.0143 
+36 *207:73 *346:DIODE 9.3 
+37 *207:69 *207:172 2.55357 
+38 *207:172 *51915:B1 16.3 
+39 *207:172 *51916:A1 15.7464 
+*END
+
+*D_NET *208 0.00227411
+*CONN
+*I *52022:B1 I *D sky130_fd_sc_hd__a21oi_1
+*I *51917:A I *D sky130_fd_sc_hd__or2b_1
+*I *51915:X O *D sky130_fd_sc_hd__o211a_1
+*CAP
+1 *52022:B1 0.000176974
+2 *51917:A 3.82418e-05
+3 *51915:X 0.000239462
+4 *208:9 0.000454677
+5 *52022:B1 *51918:B 0.000122159
+6 *52022:B1 *52022:A2 0.00061338
+7 *52022:B1 *266:64 0.000284441
+8 *208:9 *52022:A2 0.000144773
+9 *208:9 *209:5 0.000186669
+10 *51916:A2 *208:9 0
+11 *80:5 *52022:B1 1.33343e-05
+*RES
+1 *51915:X *208:9 23.2464 
+2 *208:9 *51917:A 10.0321 
+3 *208:9 *52022:B1 16.8357 
+*END
+
+*D_NET *209 0.00196274
+*CONN
+*I *52022:A2 I *D sky130_fd_sc_hd__a21oi_1
+*I *51917:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *51916:X O *D sky130_fd_sc_hd__a211o_1
+*CAP
+1 *52022:A2 0.000261821
+2 *51917:B_N 0
+3 *51916:X 0.000235766
+4 *209:5 0.000497588
+5 *209:5 *51934:C1 2.27416e-05
+6 *52022:B1 *52022:A2 0.00061338
+7 *208:9 *52022:A2 0.000144773
+8 *208:9 *209:5 0.000186669
+*RES
+1 *51916:X *209:5 13.9429 
+2 *209:5 *51917:B_N 9.3 
+3 *209:5 *52022:A2 16.4071 
+*END
+
+*D_NET *210 0.000854683
+*CONN
+*I *51918:B I *D sky130_fd_sc_hd__xor2_4
+*I *51917:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *51918:B 0.000263334
+2 *51917:X 0.000263334
+3 *51918:B *266:64 5.52302e-05
+4 *51918:B *266:72 0.000150625
+5 *51918:A *51918:B 0
+6 *52022:B1 *51918:B 0.000122159
+*RES
+1 *51917:X *51918:B 32.1357 
+*END
+
+*D_NET *211 0.00232248
+*CONN
+*I *52028:A1 I *D sky130_fd_sc_hd__o21ba_1
+*I *51936:A I *D sky130_fd_sc_hd__xor2_4
+*I *51918:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52028:A1 0.000160587
+2 *51936:A 6.17105e-05
+3 *51918:X 0.000164649
+4 *211:8 0.000386947
+5 *52028:A1 *52028:A2 0.000190155
+6 *52028:A1 *52028:B1_N 0.0001399
+7 *52028:A1 *266:74 7.32173e-05
+8 *211:8 *52028:A2 5.83304e-05
+9 *211:8 *212:87 0.000405733
+10 *211:8 *225:72 2.27416e-05
+11 *211:8 *225:80 1.55885e-05
+12 *211:8 *225:92 1.4782e-05
+13 *211:8 *227:8 9.91086e-05
+14 *211:8 *265:26 0.00052903
+*RES
+1 *51918:X *211:8 11.4375 
+2 *211:8 *51936:A 14.7464 
+3 *211:8 *52028:A1 18.1393 
+*END
+
+*D_NET *212 0.0139585
+*CONN
+*I *51933:C1 I *D sky130_fd_sc_hd__o211a_1
+*I *52101:B I *D sky130_fd_sc_hd__nand2_1
+*I *52068:B I *D sky130_fd_sc_hd__nand2_1
+*I *52027:A I *D sky130_fd_sc_hd__nand2_1
+*I *51934:A2 I *D sky130_fd_sc_hd__a211oi_1
+*I *51920:B I *D sky130_fd_sc_hd__nand2_1
+*I *51942:A2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51924:B I *D sky130_fd_sc_hd__nand2_1
+*I *51968:B2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51941:D I *D sky130_fd_sc_hd__and4_1
+*I *51919:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51933:C1 0
+2 *52101:B 0
+3 *52068:B 0.000233999
+4 *52027:A 0
+5 *51934:A2 0
+6 *51920:B 2.5443e-05
+7 *51942:A2 0
+8 *51924:B 2.03441e-05
+9 *51968:B2 0.000290836
+10 *51941:D 0
+11 *51919:X 2.23854e-05
+12 *212:99 0.000891392
+13 *212:87 0.00106002
+14 *212:77 0.00114366
+15 *212:66 0.00108616
+16 *212:54 0.000806215
+17 *212:41 0.000658688
+18 *212:29 0.000409832
+19 *212:12 0.000448326
+20 *212:5 0.000346328
+21 *51920:B *220:14 5.20669e-05
+22 *51924:B *51924:A 5.7661e-06
+23 *51968:B2 *51921:C 0.000112418
+24 *51968:B2 *234:8 9.90431e-05
+25 *51968:B2 *262:26 2.77289e-05
+26 *51968:B2 *263:42 6.09256e-05
+27 *52068:B *52101:A 5.80706e-06
+28 *52068:B *267:72 5.71472e-05
+29 *212:12 *51921:C 4.94362e-05
+30 *212:12 *279:31 7.79781e-06
+31 *212:12 *280:37 8.37335e-05
+32 *212:29 *263:42 0.000141985
+33 *212:29 *280:37 4.51526e-05
+34 *212:41 *51925:A0 0.000530254
+35 *212:41 *51926:B1 0.000186662
+36 *212:41 *51943:B 0.00030042
+37 *212:41 *263:30 0.000447049
+38 *212:41 *263:42 4.58976e-05
+39 *212:54 *51929:B_N 0
+40 *212:54 *51943:B 2.85377e-05
+41 *212:54 *219:6 0
+42 *212:54 *263:30 9.18968e-06
+43 *212:54 *264:18 0
+44 *212:66 *51953:A 7.2344e-05
+45 *212:66 *225:64 0.000196968
+46 *212:66 *264:25 0
+47 *212:66 *265:26 0.000359997
+48 *212:77 *310:DIODE 3.17148e-05
+49 *212:77 *51933:A2 2.66026e-05
+50 *212:77 *51934:C1 0
+51 *212:77 *220:14 0
+52 *212:77 *225:64 9.90431e-05
+53 *212:77 *225:72 0.000867429
+54 *212:77 *225:80 4.18895e-05
+55 *212:87 *225:80 2.59355e-05
+56 *212:87 *225:92 0.000199934
+57 *212:87 *266:72 0
+58 *212:99 *266:72 0
+59 *212:99 *267:72 0.000178459
+60 *315:DIODE *51920:B 5.20669e-05
+61 *51926:A1_N *212:41 1.37693e-05
+62 *51969:B *212:12 0.000123288
+63 *52032:A *212:99 0.000142856
+64 *52036:A *212:99 9.92409e-05
+65 *52036:B *212:99 0.000142856
+66 *52036:C *212:99 3.20153e-05
+67 *90:5 *212:99 0.000166485
+68 *90:14 *212:99 0
+69 *124:11 *52068:B 0.000119203
+70 *183:7 *51968:B2 8.07313e-05
+71 *189:17 *51968:B2 0.00014285
+72 *189:31 *51968:B2 5.52238e-05
+73 *193:38 *212:12 0.000122101
+74 *193:38 *212:29 3.18676e-05
+75 *199:20 *212:54 0.000198203
+76 *203:13 *212:41 2.78608e-05
+77 *203:24 *212:54 0.000161146
+78 *211:8 *212:87 0.000405733
+*RES
+1 *51919:X *212:5 9.72857 
+2 *212:5 *212:12 13.4286 
+3 *212:12 *51941:D 9.3 
+4 *212:12 *51968:B2 24.9964 
+5 *212:5 *212:29 3.82143 
+6 *212:29 *51924:B 9.72857 
+7 *212:29 *212:41 9.96429 
+8 *212:41 *51942:A2 9.3 
+9 *212:41 *212:54 13.1607 
+10 *212:54 *51920:B 14.7464 
+11 *212:54 *212:66 12.8929 
+12 *212:66 *212:77 29.6429 
+13 *212:77 *51934:A2 9.3 
+14 *212:77 *212:87 13.8393 
+15 *212:87 *52027:A 13.8 
+16 *212:87 *212:99 18.6964 
+17 *212:99 *52068:B 23.1393 
+18 *212:99 *52101:B 9.3 
+19 *212:66 *51933:C1 9.3 
+*END
+
+*D_NET *213 0.0012321
+*CONN
+*I *51927:A I *D sky130_fd_sc_hd__nor2_1
+*I *51930:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51920:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51927:A 0
+2 *51930:A 0.000140344
+3 *51920:Y 7.21941e-05
+4 *213:7 0.000212538
+5 *51930:A *51930:B 0.000228307
+6 *51930:A *232:60 7.43578e-06
+7 *51930:A *264:25 0.000189337
+8 *213:7 *51927:B 5.7661e-06
+9 *213:7 *220:14 0.00027023
+10 *315:DIODE *213:7 0.000105945
+*RES
+1 *51920:Y *213:7 12.3179 
+2 *213:7 *51930:A 21.9071 
+3 *213:7 *51927:A 9.3 
+*END
+
+*D_NET *214 0.00287184
+*CONN
+*I *51943:A I *D sky130_fd_sc_hd__or2_1
+*I *51925:S I *D sky130_fd_sc_hd__mux2_1
+*I *51926:A2_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51921:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51943:A 4.14645e-05
+2 *51925:S 0.000262709
+3 *51926:A2_N 0.000286496
+4 *51921:X 5.45665e-05
+5 *214:15 0.00050217
+6 *214:6 0.00053906
+7 *51926:A2_N *263:30 0.000434166
+8 *51926:A2_N *263:42 1.24368e-05
+9 *51943:A *51926:B2 0
+10 *51943:A *232:50 0
+11 *214:6 *216:8 0
+12 *214:6 *280:38 3.92757e-05
+13 *214:6 *280:43 5.80706e-06
+14 *214:15 *51926:B2 0
+15 *214:15 *51937:A 0
+16 *214:15 *216:8 0
+17 *214:15 *232:50 0
+18 *192:25 *51925:S 3.3283e-05
+19 *192:27 *51925:S 0.000523452
+20 *193:68 *51925:S 0.000136958
+*RES
+1 *51921:X *214:6 14.8357 
+2 *214:6 *51926:A2_N 18.0321 
+3 *214:6 *214:15 2.85714 
+4 *214:15 *51925:S 19.6929 
+5 *214:15 *51943:A 14.5321 
+*END
+
+*D_NET *215 0.00143641
+*CONN
+*I *51923:B I *D sky130_fd_sc_hd__or2_1
+*I *51922:Y O *D sky130_fd_sc_hd__a22oi_1
+*CAP
+1 *51923:B 0.000252799
+2 *51922:Y 0.000252799
+3 *51923:B *51910:A 0.000269124
+4 *51923:B *216:8 2.89114e-05
+5 *51923:B *262:14 0
+6 *51923:B *280:49 1.46576e-05
+7 *51923:B *284:28 5.52302e-05
+8 *183:51 *51923:B 0.000146591
+9 *183:54 *51923:B 0
+10 *189:15 *51923:B 0.000256698
+11 *199:10 *51923:B 1.65558e-05
+12 *203:13 *51923:B 0.000143043
+*RES
+1 *51922:Y *51923:B 35.7429 
+*END
+
+*D_NET *216 0.00290418
+*CONN
+*I *51937:A I *D sky130_fd_sc_hd__xor2_1
+*I *51926:B1 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51923:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51937:A 0.000181125
+2 *51926:B1 2.61022e-05
+3 *51923:X 0.000442971
+4 *216:8 0.000650198
+5 *51926:B1 *263:30 0.000186662
+6 *51937:A *51926:B2 0.00019384
+7 *51937:A *51937:B 0.00012401
+8 *51937:A *219:6 6.8646e-06
+9 *216:8 *284:28 0.000265961
+10 *51923:B *216:8 2.89114e-05
+11 *51926:A1_N *51937:A 0.000148196
+12 *51926:A1_N *216:8 9.25014e-06
+13 *193:52 *51937:A 0.000306293
+14 *199:20 *216:8 9.83442e-05
+15 *207:55 *51937:A 4.87854e-05
+16 *212:41 *51926:B1 0.000186662
+17 *214:6 *216:8 0
+18 *214:15 *51937:A 0
+19 *214:15 *216:8 0
+*RES
+1 *51923:X *216:8 20.0857 
+2 *216:8 *51926:B1 15.5679 
+3 *216:8 *51937:A 19.7286 
+*END
+
+*D_NET *217 0.00153323
+*CONN
+*I *51925:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *51924:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51925:A0 0.000282592
+2 *51924:Y 0.000282592
+3 *51925:A0 *51926:B2 0.00010096
+4 *51925:A0 *51943:B 4.98055e-06
+5 *51925:A0 *219:6 0.000147474
+6 *51926:A1_N *51925:A0 0.000101545
+7 *193:52 *51925:A0 7.83659e-05
+8 *203:13 *51925:A0 4.46186e-06
+9 *212:41 *51925:A0 0.000530254
+*RES
+1 *51924:Y *51925:A0 34.9036 
+*END
+
+*D_NET *218 0.00109512
+*CONN
+*I *51937:B I *D sky130_fd_sc_hd__xor2_1
+*I *51926:B2 I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51925:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *51937:B 8.91591e-05
+2 *51926:B2 0.000182148
+3 *51925:X 3.92359e-05
+4 *218:7 0.000310543
+5 *51926:B2 *236:11 0
+6 *51937:B *219:6 0
+7 *51937:B *236:11 0
+8 *218:7 *51943:B 5.52238e-05
+9 *51925:A0 *51926:B2 0.00010096
+10 *51937:A *51926:B2 0.00019384
+11 *51937:A *51937:B 0.00012401
+12 *51943:A *51926:B2 0
+13 *214:15 *51926:B2 0
+*RES
+1 *51925:X *218:7 14.3357 
+2 *218:7 *51926:B2 17.3 
+3 *218:7 *51937:B 15.7464 
+*END
+
+*D_NET *219 0.00167637
+*CONN
+*I *51930:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51927:B I *D sky130_fd_sc_hd__nor2_1
+*I *51926:X O *D sky130_fd_sc_hd__o2bb2a_1
+*CAP
+1 *51930:B 0.000163838
+2 *51927:B 4.24626e-05
+3 *51926:X 0.000330646
+4 *219:6 0.000536947
+5 *51927:B *220:14 3.69047e-06
+6 *51930:B *51938:A 0
+7 *51930:B *231:9 0
+8 *51930:B *264:18 0
+9 *219:6 *51938:A 0
+10 *219:6 *51943:B 8.26195e-05
+11 *315:DIODE *51927:B 5.52238e-05
+12 *51925:A0 *219:6 0.000147474
+13 *51930:A *51930:B 0.000228307
+14 *51937:A *219:6 6.8646e-06
+15 *51937:B *219:6 0
+16 *193:52 *219:6 7.25296e-05
+17 *212:54 *219:6 0
+18 *213:7 *51927:B 5.7661e-06
+*RES
+1 *51926:X *219:6 20.3 
+2 *219:6 *51927:B 14.7643 
+3 *219:6 *51930:B 17.1929 
+*END
+
+*D_NET *220 0.00458929
+*CONN
+*I *51934:B1 I *D sky130_fd_sc_hd__a211oi_1
+*I *51933:A1 I *D sky130_fd_sc_hd__o211a_1
+*I *51927:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51934:B1 6.70025e-05
+2 *51933:A1 7.14335e-05
+3 *51927:Y 0.00104997
+4 *220:14 0.00118841
+5 *51933:A1 *225:72 0.000236572
+6 *51933:A1 *265:26 0.000310304
+7 *51934:B1 *51934:A1 1.97695e-05
+8 *51934:B1 *225:72 0.000140481
+9 *51934:B1 *227:8 0.00010096
+10 *51934:B1 *265:26 9.47712e-05
+11 *220:14 *51929:B_N 0.000274294
+12 *220:14 *51934:C1 0
+13 *220:14 *222:10 5.71472e-05
+14 *315:DIODE *220:14 3.69407e-05
+15 *51916:A1 *220:14 0.000141368
+16 *51916:B1 *220:14 0.000181663
+17 *51916:C1 *220:14 1.18064e-05
+18 *51920:B *220:14 5.20669e-05
+19 *51927:B *220:14 3.69047e-06
+20 *203:31 *220:14 3.65178e-05
+21 *203:39 *220:14 0.000234644
+22 *207:172 *220:14 9.25014e-06
+23 *212:77 *220:14 0
+24 *213:7 *220:14 0.00027023
+*RES
+1 *51927:Y *220:14 36.8 
+2 *220:14 *51933:A1 13.3268 
+3 *220:14 *51934:B1 12.3179 
+*END
+
+*D_NET *221 0.000882947
+*CONN
+*I *51929:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *51928:X O *D sky130_fd_sc_hd__a21bo_1
+*CAP
+1 *51929:B_N 0.000167179
+2 *51928:X 0.000167179
+3 *51916:C1 *51929:B_N 0
+4 *203:24 *51929:B_N 0
+5 *203:39 *51929:B_N 0.000274294
+6 *212:54 *51929:B_N 0
+7 *220:14 *51929:B_N 0.000274294
+*RES
+1 *51928:X *51929:B_N 32.1357 
+*END
+
+*D_NET *222 0.000993607
+*CONN
+*I *51931:A I *D sky130_fd_sc_hd__nor2_1
+*I *51952:A I *D sky130_fd_sc_hd__xor2_1
+*I *51929:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *51931:A 3.96526e-05
+2 *51952:A 0.000186984
+3 *51929:X 0.000132609
+4 *222:10 0.000359245
+5 *51931:A *51931:B 1.04232e-05
+6 *51931:A *224:5 2.16045e-05
+7 *51952:A *51931:B 0.000178459
+8 *51952:A *224:5 7.48301e-06
+9 *51916:C1 *222:10 0
+10 *220:14 *222:10 5.71472e-05
+*RES
+1 *51929:X *222:10 20.175 
+2 *222:10 *51952:A 13.1393 
+3 *222:10 *51931:A 10.2375 
+*END
+
+*D_NET *223 0.00112064
+*CONN
+*I *51931:B I *D sky130_fd_sc_hd__nor2_1
+*I *51952:B I *D sky130_fd_sc_hd__xor2_1
+*I *51930:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51931:B 0.000158223
+2 *51952:B 0
+3 *51930:Y 0.00028558
+4 *223:7 0.000443803
+5 *51931:B *224:5 7.43578e-06
+6 *223:7 *264:25 3.67142e-05
+7 *51931:A *51931:B 1.04232e-05
+8 *51952:A *51931:B 0.000178459
+*RES
+1 *51930:Y *223:7 13.55 
+2 *223:7 *51952:B 9.3 
+3 *223:7 *51931:B 13.1393 
+*END
+
+*D_NET *224 0.00195911
+*CONN
+*I *51934:C1 I *D sky130_fd_sc_hd__a211oi_1
+*I *51933:A2 I *D sky130_fd_sc_hd__o211a_1
+*I *51931:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51934:C1 0.000690702
+2 *51933:A2 0.000149194
+3 *51931:Y 7.05299e-05
+4 *224:5 0.000910426
+5 *51933:A2 *225:72 6.7e-06
+6 *51933:A2 *265:26 1.37693e-05
+7 *51916:A2 *51934:C1 1.98475e-05
+8 *51916:B1 *51934:C1 5.5357e-06
+9 *51916:C1 *51934:C1 6.5408e-06
+10 *51931:A *224:5 2.16045e-05
+11 *51931:B *224:5 7.43578e-06
+12 *51952:A *224:5 7.48301e-06
+13 *209:5 *51934:C1 2.27416e-05
+14 *212:77 *51933:A2 2.66026e-05
+15 *212:77 *51934:C1 0
+16 *220:14 *51934:C1 0
+*RES
+1 *51931:Y *224:5 10.2464 
+2 *224:5 *51933:A2 20.3848 
+3 *224:5 *51934:C1 26.6393 
+*END
+
+*D_NET *225 0.0222611
+*CONN
+*I *52021:A I *D sky130_fd_sc_hd__nand2_1
+*I *52055:A I *D sky130_fd_sc_hd__nand2_1
+*I *356:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *362:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *382:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *378:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52118:B2 I *D sky130_fd_sc_hd__a22o_1
+*I *52117:B I *D sky130_fd_sc_hd__nand4_1
+*I *52082:A I *D sky130_fd_sc_hd__nand2_1
+*I *348:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *310:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51934:A1 I *D sky130_fd_sc_hd__a211oi_1
+*I *51933:B1 I *D sky130_fd_sc_hd__o211a_1
+*I *309:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51998:A1 I *D sky130_fd_sc_hd__o21ai_1
+*I *51997:A I *D sky130_fd_sc_hd__nand2_1
+*I *51977:A I *D sky130_fd_sc_hd__and3_1
+*I *329:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *341:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *340:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51932:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *52021:A 0.000137717
+2 *52055:A 2.48648e-05
+3 *356:DIODE 0
+4 *362:DIODE 0
+5 *382:DIODE 0
+6 *378:DIODE 0.000124595
+7 *52118:B2 0
+8 *52117:B 0.000167026
+9 *52082:A 0
+10 *348:DIODE 0
+11 *310:DIODE 8.03163e-05
+12 *51934:A1 3.12428e-05
+13 *51933:B1 3.82418e-05
+14 *309:DIODE 0
+15 *51998:A1 0
+16 *51997:A 0
+17 *51977:A 0
+18 *329:DIODE 0
+19 *341:DIODE 0
+20 *340:DIODE 0.000137813
+21 *51932:X 0
+22 *225:164 4.41453e-05
+23 *225:146 0.000464659
+24 *225:130 0.000189412
+25 *225:128 0.000786417
+26 *225:118 0.000561092
+27 *225:114 0.000453214
+28 *225:108 0.000911558
+29 *225:100 0.00113117
+30 *225:92 0.00111467
+31 *225:80 0.00081919
+32 *225:72 0.000224845
+33 *225:64 0.000673022
+34 *225:58 0.00117719
+35 *225:28 0.000578764
+36 *225:23 0.000764707
+37 *225:22 0.000646733
+38 *225:15 0.000597782
+39 *225:10 0.000607341
+40 *225:4 0.00102709
+41 *340:DIODE *259:8 0
+42 *340:DIODE *261:66 0
+43 *378:DIODE *267:16 0
+44 *52055:A *281:126 0.000219064
+45 *52117:B *281:152 0
+46 *225:10 *51932:A 3.18676e-05
+47 *225:10 *256:8 0.000106042
+48 *225:10 *261:29 5.57914e-05
+49 *225:15 *261:23 5.3547e-05
+50 *225:22 *261:23 9.90431e-05
+51 *225:23 *322:DIODE 5.76121e-05
+52 *225:23 *265:57 3.14078e-05
+53 *225:23 *272:86 4.0552e-05
+54 *225:23 *272:92 7.54972e-05
+55 *225:28 *261:66 0
+56 *225:28 *261:76 0
+57 *225:58 *320:DIODE 5.76121e-05
+58 *225:58 *231:9 0.000199924
+59 *225:58 *256:8 0.000159063
+60 *225:58 *265:26 5.30637e-06
+61 *225:64 *51953:A 2.84109e-05
+62 *225:64 *265:26 0.000240387
+63 *225:72 *265:26 4.34254e-05
+64 *225:92 *265:13 8.37649e-05
+65 *225:92 *265:26 0.000228236
+66 *225:100 *265:13 0.000140071
+67 *225:108 *347:DIODE 0
+68 *225:108 *281:118 1.21258e-05
+69 *225:108 *281:126 0.000184745
+70 *225:128 *52087:B 1.02821e-05
+71 *225:128 *52118:B1 0.000397105
+72 *225:130 *52118:B1 0
+73 *225:146 *52118:A1 0.000140471
+74 *225:146 *52118:B1 5.33433e-05
+75 *225:146 *267:19 0.000482601
+76 *225:164 *281:126 0.000130419
+77 *365:DIODE *225:114 0.00010326
+78 *51933:A1 *225:72 0.000236572
+79 *51933:A2 *225:72 6.7e-06
+80 *51934:B1 *51934:A1 1.97695e-05
+81 *51934:B1 *225:72 0.000140481
+82 *51975:B1 *225:22 0
+83 *51977:C *225:22 0
+84 *51977:C *225:23 0.000228558
+85 *51998:A2 *225:15 0.000358971
+86 *51999:A1 *225:22 1.41706e-05
+87 *52020:B *225:108 0.000150625
+88 *52023:A *225:108 0
+89 *52024:B *225:108 5.58941e-05
+90 *52025:B *52021:A 8.07951e-05
+91 *52025:B *225:108 8.98585e-05
+92 *52026:A *52021:A 5.63007e-05
+93 *52056:A2 *225:108 0
+94 *52056:B1_N *225:108 0
+95 *52087:A *225:114 6.62761e-05
+96 *52087:A *225:118 0.000276211
+97 *52087:A *225:128 0.000248588
+98 *52088:A *52117:B 0
+99 *52124:A *378:DIODE 0
+100 *52124:B *225:146 0.000139907
+101 *34:8 *225:22 0
+102 *58:6 *225:22 0
+103 *73:9 *225:108 0
+104 *78:8 *225:108 0.000155285
+105 *82:8 *52021:A 2.91887e-05
+106 *82:8 *225:108 3.71496e-05
+107 *111:6 *225:108 0
+108 *111:6 *225:114 0
+109 *119:9 *225:100 5.52238e-05
+110 *144:8 *225:128 0.000317082
+111 *176:7 *52117:B 0.00010096
+112 *203:69 *52055:A 0.000232399
+113 *203:69 *225:108 0.000485543
+114 *203:69 *225:164 0.000142856
+115 *207:152 *225:114 3.39068e-05
+116 *207:152 *225:118 0
+117 *211:8 *225:72 2.27416e-05
+118 *211:8 *225:80 1.55885e-05
+119 *211:8 *225:92 1.4782e-05
+120 *212:66 *225:64 0.000196968
+121 *212:77 *310:DIODE 3.17148e-05
+122 *212:77 *225:64 9.90431e-05
+123 *212:77 *225:72 0.000867429
+124 *212:77 *225:80 4.18895e-05
+125 *212:87 *225:80 2.59355e-05
+126 *212:87 *225:92 0.000199934
+*RES
+1 *51932:X *225:4 9.3 
+2 *225:4 *225:10 15.4821 
+3 *225:10 *225:15 5.5 
+4 *225:15 *225:22 14.625 
+5 *225:22 *225:23 7.10714 
+6 *225:23 *225:28 11.6786 
+7 *225:28 *340:DIODE 16.3536 
+8 *225:28 *341:DIODE 13.8 
+9 *225:23 *329:DIODE 9.3 
+10 *225:22 *51977:A 9.3 
+11 *225:15 *51997:A 9.3 
+12 *225:10 *51998:A1 9.3 
+13 *225:4 *225:58 12.8571 
+14 *225:58 *309:DIODE 9.3 
+15 *225:58 *225:64 9.98214 
+16 *225:64 *51933:B1 10.0321 
+17 *225:64 *225:72 8.33929 
+18 *225:72 *51934:A1 10.0321 
+19 *225:72 *225:80 0.946429 
+20 *225:80 *310:DIODE 19.6393 
+21 *225:80 *225:92 13.6964 
+22 *225:92 *348:DIODE 9.3 
+23 *225:92 *225:100 9.96429 
+24 *225:100 *225:108 18.7321 
+25 *225:108 *225:114 13.9464 
+26 *225:114 *225:118 3.625 
+27 *225:118 *52082:A 9.3 
+28 *225:118 *225:128 11.1429 
+29 *225:128 *225:130 0.428571 
+30 *225:130 *52117:B 20.8893 
+31 *225:130 *52118:B2 9.3 
+32 *225:128 *225:146 8.33929 
+33 *225:146 *378:DIODE 20.2464 
+34 *225:146 *382:DIODE 9.3 
+35 *225:114 *362:DIODE 9.3 
+36 *225:108 *225:164 1.35714 
+37 *225:164 *356:DIODE 9.3 
+38 *225:164 *52055:A 11.4786 
+39 *225:100 *52021:A 16.9607 
+*END
+
+*D_NET *226 0.00225208
+*CONN
+*I *52028:B1_N I *D sky130_fd_sc_hd__o21ba_1
+*I *51935:A I *D sky130_fd_sc_hd__or2_1
+*I *51933:X O *D sky130_fd_sc_hd__o211a_1
+*CAP
+1 *52028:B1_N 0.000509215
+2 *51935:A 0.0001392
+3 *51933:X 8.73621e-05
+4 *226:6 0.000735777
+5 *51935:A *51935:B 0.000230475
+6 *51935:A *51936:B 4.88637e-05
+7 *52028:B1_N *51958:B_N 0
+8 *52028:B1_N *52033:A_N 6.05161e-06
+9 *52028:B1_N *52033:B 0.000142856
+10 *52028:B1_N *229:7 0
+11 *52028:B1_N *266:74 0.000212383
+12 *52028:A1 *52028:B1_N 0.0001399
+*RES
+1 *51933:X *226:6 15.1393 
+2 *226:6 *51935:A 16.8 
+3 *226:6 *52028:B1_N 23.7821 
+*END
+
+*D_NET *227 0.00262944
+*CONN
+*I *52028:A2 I *D sky130_fd_sc_hd__o21ba_1
+*I *51935:B I *D sky130_fd_sc_hd__or2_1
+*I *51934:Y O *D sky130_fd_sc_hd__a211oi_1
+*CAP
+1 *52028:A2 0.000143937
+2 *51935:B 0.000415588
+3 *51934:Y 8.23155e-05
+4 *227:8 0.000641841
+5 *51935:B *51936:B 0.000567693
+6 *52028:A2 *229:7 0
+7 *227:8 *265:26 9.90367e-05
+8 *51934:B1 *227:8 0.00010096
+9 *51935:A *51935:B 0.000230475
+10 *52028:A1 *52028:A2 0.000190155
+11 *211:8 *52028:A2 5.83304e-05
+12 *211:8 *227:8 9.91086e-05
+*RES
+1 *51934:Y *227:8 16.0857 
+2 *227:8 *51935:B 22.175 
+3 *227:8 *52028:A2 17.2643 
+*END
+
+*D_NET *228 0.00134732
+*CONN
+*I *51936:B I *D sky130_fd_sc_hd__xor2_4
+*I *51935:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51936:B 0.000365383
+2 *51935:X 0.000365383
+3 *51935:A *51936:B 4.88637e-05
+4 *51935:B *51936:B 0.000567693
+*RES
+1 *51935:X *51936:B 27.7429 
+*END
+
+*D_NET *229 0.00095485
+*CONN
+*I *51959:A I *D sky130_fd_sc_hd__xor2_4
+*I *52033:C I *D sky130_fd_sc_hd__and3b_1
+*I *51936:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *51959:A 9.56815e-05
+2 *52033:C 3.92359e-05
+3 *51936:X 0.000314896
+4 *229:7 0.000449813
+5 *51959:A *51959:B 0
+6 *51959:A *52033:A_N 0
+7 *52033:C *266:74 5.52238e-05
+8 *229:7 *51958:B_N 0
+9 *229:7 *52033:A_N 0
+10 *52028:A2 *229:7 0
+11 *52028:B1_N *229:7 0
+12 *91:8 *51959:A 0
+*RES
+1 *51936:X *229:7 8.80357 
+2 *229:7 *52033:C 14.3357 
+3 *229:7 *51959:A 15.4429 
+*END
+
+*D_NET *230 0.000229062
+*CONN
+*I *51938:A I *D sky130_fd_sc_hd__inv_2
+*I *51937:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51938:A 0.000114531
+2 *51937:X 0.000114531
+3 *51938:A *232:50 0
+4 *51930:B *51938:A 0
+5 *219:6 *51938:A 0
+*RES
+1 *51937:X *51938:A 29.5464 
+*END
+
+*D_NET *231 0.00136371
+*CONN
+*I *51963:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51949:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51938:Y O *D sky130_fd_sc_hd__inv_2
+*CAP
+1 *51963:A 0
+2 *51949:A1 8.11811e-05
+3 *51938:Y 0.000410885
+4 *231:9 0.000492066
+5 *51949:A1 *51949:A2 0.000179656
+6 *51949:A1 *51954:B 0
+7 *231:9 *51949:A2 0
+8 *231:9 *232:50 0
+9 *231:9 *232:60 0
+10 *231:9 *240:8 0
+11 *51930:B *231:9 0
+12 *225:58 *231:9 0.000199924
+*RES
+1 *51938:Y *231:9 26.0857 
+2 *231:9 *51949:A1 20.55 
+3 *231:9 *51963:A 9.3 
+*END
+
+*D_NET *232 0.0157915
+*CONN
+*I *51957:A1 I *D sky130_fd_sc_hd__a211o_1
+*I *52035:A2 I *D sky130_fd_sc_hd__a211o_1
+*I *52071:B I *D sky130_fd_sc_hd__and2_1
+*I *52034:C1 I *D sky130_fd_sc_hd__o211ai_1
+*I *51956:B1 I *D sky130_fd_sc_hd__o211a_1
+*I *51950:B I *D sky130_fd_sc_hd__nand2_1
+*I *51940:B I *D sky130_fd_sc_hd__and2_1
+*I *51968:A2 I *D sky130_fd_sc_hd__a22oi_1
+*I *51990:A_N I *D sky130_fd_sc_hd__and2b_1
+*I *51991:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *51939:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51957:A1 7.26274e-05
+2 *52035:A2 6.71468e-05
+3 *52071:B 0.000565766
+4 *52034:C1 5.37114e-05
+5 *51956:B1 2.00462e-05
+6 *51950:B 0
+7 *51940:B 0
+8 *51968:A2 6.51092e-05
+9 *51990:A_N 0.000241688
+10 *51991:B1 4.43224e-05
+11 *51939:X 0
+12 *232:98 0.000911705
+13 *232:95 0.00121286
+14 *232:80 0.00105594
+15 *232:74 0.000452758
+16 *232:60 0.000778187
+17 *232:50 0.00171414
+18 *232:33 0.00137201
+19 *232:8 0.000533407
+20 *232:4 0.000420625
+21 *51956:B1 *51956:A2 1.02132e-05
+22 *51957:A1 *51956:A1 5.74596e-05
+23 *51957:A1 *266:86 0.000203677
+24 *51968:A2 *263:42 0.000154778
+25 *51968:A2 *282:10 5.41794e-05
+26 *51990:A_N *262:56 9.71197e-05
+27 *51991:B1 *51991:A1 5.52238e-05
+28 *51991:B1 *280:37 0.000227532
+29 *52034:C1 *52034:B1 1.24368e-05
+30 *52034:C1 *267:90 3.99614e-06
+31 *52071:B *268:60 7.54096e-05
+32 *232:8 *281:47 0.000268396
+33 *232:33 *281:47 0.000183713
+34 *232:50 *292:DIODE 8.77116e-05
+35 *232:50 *51893:A 0.000101545
+36 *232:50 *51914:A 0.000195555
+37 *232:50 *51948:A 1.17968e-05
+38 *232:50 *236:11 5.33882e-05
+39 *232:50 *263:42 0.00052438
+40 *232:50 *264:30 0.000176234
+41 *232:50 *280:38 3.34687e-05
+42 *232:50 *280:43 4.15914e-05
+43 *232:50 *280:49 0
+44 *232:50 *281:63 0
+45 *232:50 *281:206 0.000124293
+46 *232:50 *282:10 5.33005e-05
+47 *232:60 *319:DIODE 0
+48 *232:60 *51940:A 5.7661e-06
+49 *232:60 *51953:A 0
+50 *232:60 *51960:A 1.02504e-05
+51 *232:60 *264:25 0.000203925
+52 *232:60 *264:30 3.67257e-05
+53 *232:60 *265:26 7.2754e-05
+54 *232:74 *51954:B 0
+55 *232:74 *51955:B 0.00015134
+56 *232:74 *51960:A 0.000175519
+57 *232:74 *51960:B 9.25014e-06
+58 *232:74 *266:86 5.52302e-05
+59 *232:74 *266:97 7.24467e-05
+60 *232:80 *51956:A2 0.000113402
+61 *232:80 *51956:C1 5.49489e-05
+62 *232:80 *51961:A 2.59355e-05
+63 *232:80 *51961:B 0
+64 *232:80 *248:8 3.34366e-05
+65 *232:80 *248:17 0.000142797
+66 *232:80 *266:97 5.66157e-05
+67 *232:95 *51956:A1 1.74352e-05
+68 *232:95 *51956:A2 2.28598e-05
+69 *232:95 *249:7 0.000239702
+70 *232:95 *252:8 6.95093e-05
+71 *232:98 *52034:B1 1.54142e-05
+72 *232:98 *267:90 2.44318e-05
+73 *51930:A *232:60 7.43578e-06
+74 *51938:A *232:50 0
+75 *51943:A *232:50 0
+76 *51967:B *51991:B1 1.5424e-05
+77 *51991:A2 *51991:B1 2.47638e-05
+78 *51992:A2 *51990:A_N 9.18159e-05
+79 *51992:A2 *232:8 0.000101545
+80 *51992:B1 *232:8 4.46186e-06
+81 *52034:A2 *232:98 0.000358977
+82 *52035:C1 *52035:A2 0
+83 *52036:C *52035:A2 0
+84 *52036:C *232:95 0
+85 *52037:A2 *52034:C1 1.98839e-05
+86 *52037:A2 *52071:B 8.43535e-06
+87 *52037:B1 *52071:B 0.000199934
+88 *40:8 *232:80 0.000315717
+89 *40:8 *232:95 5.68722e-05
+90 *51:8 *51990:A_N 2.07158e-05
+91 *51:8 *232:8 0
+92 *91:8 *52035:A2 0
+93 *91:8 *232:95 0
+94 *183:15 *51968:A2 0.000248579
+95 *183:15 *51991:B1 6.39559e-05
+96 *183:15 *232:33 6.81083e-05
+97 *189:17 *232:50 8.86512e-05
+98 *192:37 *51990:A_N 9.71197e-05
+99 *214:15 *232:50 0
+100 *231:9 *232:50 0
+101 *231:9 *232:60 0
+*RES
+1 *51939:X *232:4 9.3 
+2 *232:4 *232:8 8.42857 
+3 *232:8 *51991:B1 15.9786 
+4 *232:8 *51990:A_N 17.4607 
+5 *232:4 *232:33 7.30357 
+6 *232:33 *51968:A2 16.4429 
+7 *232:33 *232:50 34.8036 
+8 *232:50 *51940:B 9.3 
+9 *232:50 *232:60 15.4821 
+10 *232:60 *51950:B 13.8 
+11 *232:60 *232:74 9.48214 
+12 *232:74 *232:80 14.8571 
+13 *232:80 *51956:B1 9.72857 
+14 *232:80 *232:95 20.0714 
+15 *232:95 *232:98 8.73214 
+16 *232:98 *52034:C1 10.6929 
+17 *232:98 *52071:B 17.6929 
+18 *232:95 *52035:A2 14.8357 
+19 *232:74 *51957:A1 11.4964 
+*END
+
+*D_NET *233 0.000935561
+*CONN
+*I *51948:A I *D sky130_fd_sc_hd__nand2_1
+*I *51947:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51940:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51948:A 6.28079e-05
+2 *51947:A 0.000207043
+3 *51940:X 0
+4 *233:4 0.000269851
+5 *51947:A *240:8 0.000101146
+6 *51948:A *51947:B 0
+7 *51948:A *51949:B1 0.000128154
+8 *51948:A *264:30 0.000154762
+9 *232:50 *51948:A 1.17968e-05
+*RES
+1 *51940:X *233:4 9.3 
+2 *233:4 *51947:A 13.1214 
+3 *233:4 *51948:A 20.55 
+*END
+
+*D_NET *234 0.00292468
+*CONN
+*I *51946:A2_N I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51945:S I *D sky130_fd_sc_hd__mux2_1
+*I *51969:A I *D sky130_fd_sc_hd__or2_1
+*I *51941:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51946:A2_N 0.000442014
+2 *51945:S 0
+3 *51969:A 2.6606e-05
+4 *51941:X 0.000308303
+5 *234:17 0.000618597
+6 *234:8 0.000511492
+7 *51946:A2_N *51965:A 0.000139097
+8 *51946:A2_N *236:11 0.000232399
+9 *51946:A2_N *238:10 0
+10 *51969:A *262:56 5.33005e-05
+11 *51969:A *280:37 2.28598e-05
+12 *234:8 *51941:A 5.52302e-05
+13 *234:8 *51941:B 6.87476e-05
+14 *234:8 *262:56 9.91086e-05
+15 *234:17 *279:31 0
+16 *51968:B2 *234:8 9.90431e-05
+17 *28:15 *51969:A 1.24368e-05
+18 *189:31 *234:8 2.14757e-05
+19 *189:45 *234:8 0.000135292
+20 *189:45 *234:17 4.56437e-05
+21 *193:38 *51969:A 3.30352e-05
+*RES
+1 *51941:X *234:8 18.8536 
+2 *234:8 *51969:A 14.7464 
+3 *234:8 *234:17 2.55357 
+4 *234:17 *51945:S 13.8 
+5 *234:17 *51946:A2_N 20.3893 
+*END
+
+*D_NET *235 0.00216135
+*CONN
+*I *51943:B I *D sky130_fd_sc_hd__or2_1
+*I *51942:Y O *D sky130_fd_sc_hd__a22oi_1
+*CAP
+1 *51943:B 0.000482864
+2 *51942:Y 0.000482864
+3 *51943:B *263:30 1.34548e-05
+4 *51925:A0 *51943:B 4.98055e-06
+5 *192:25 *51943:B 9.71197e-05
+6 *192:27 *51943:B 0.000224545
+7 *203:13 *51943:B 0.000388725
+8 *212:41 *51943:B 0.00030042
+9 *212:54 *51943:B 2.85377e-05
+10 *218:7 *51943:B 5.52238e-05
+11 *219:6 *51943:B 8.26195e-05
+*RES
+1 *51942:Y *51943:B 38.9214 
+*END
+
+*D_NET *236 0.00180192
+*CONN
+*I *51946:B1 I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51965:A I *D sky130_fd_sc_hd__xor2_1
+*I *51943:X O *D sky130_fd_sc_hd__or2_1
+*CAP
+1 *51946:B1 0
+2 *51965:A 6.72606e-05
+3 *51943:X 0.000326236
+4 *236:11 0.000393497
+5 *51965:A *51946:B2 4.27935e-05
+6 *51965:A *51965:B 0.000230475
+7 *236:11 *51946:B2 2.44318e-05
+8 *51926:B2 *236:11 0
+9 *51937:B *236:11 0
+10 *51946:A2_N *51965:A 0.000139097
+11 *51946:A2_N *236:11 0.000232399
+12 *193:52 *236:11 0.000187892
+13 *207:7 *51965:A 2.44318e-05
+14 *207:7 *236:11 8.0023e-05
+15 *232:50 *236:11 5.33882e-05
+*RES
+1 *51943:X *236:11 25.9429 
+2 *236:11 *51965:A 12.3 
+3 *236:11 *51946:B1 9.3 
+*END
+
+*D_NET *237 0.000805021
+*CONN
+*I *51945:A0 I *D sky130_fd_sc_hd__mux2_1
+*I *51944:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51945:A0 0.000180003
+2 *51944:Y 0.000180003
+3 *51945:A0 *278:70 1.74352e-05
+4 *51945:A0 *278:81 5.52238e-05
+5 *51944:B *51945:A0 0
+6 *192:27 *51945:A0 5.71472e-05
+7 *192:31 *51945:A0 0.000315209
+8 *192:53 *51945:A0 0
+*RES
+1 *51944:Y *51945:A0 23.3857 
+*END
+
+*D_NET *238 0.0011066
+*CONN
+*I *51946:B2 I *D sky130_fd_sc_hd__o2bb2ai_1
+*I *51965:B I *D sky130_fd_sc_hd__xor2_1
+*I *51945:X O *D sky130_fd_sc_hd__mux2_1
+*CAP
+1 *51946:B2 1.55095e-05
+2 *51965:B 3.09283e-05
+3 *51945:X 0.000181884
+4 *238:10 0.000228322
+5 *51946:A2_N *238:10 0
+6 *51965:A *51946:B2 4.27935e-05
+7 *51965:A *51965:B 0.000230475
+8 *192:27 *238:10 2.27416e-05
+9 *193:38 *238:10 0
+10 *207:7 *51946:B2 9.90431e-05
+11 *207:7 *51965:B 0.000230475
+12 *236:11 *51946:B2 2.44318e-05
+*RES
+1 *51945:X *238:10 20.7821 
+2 *238:10 *51965:B 11.4786 
+3 *238:10 *51946:B2 10.2464 
+*END
+
+*D_NET *239 0.00111753
+*CONN
+*I *51947:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51948:B I *D sky130_fd_sc_hd__nand2_1
+*I *51946:Y O *D sky130_fd_sc_hd__o2bb2ai_1
+*CAP
+1 *51947:B 0.000172482
+2 *51948:B 0.000101996
+3 *51946:Y 0.00014714
+4 *239:6 0.000421619
+5 *51947:B *312:DIODE 0
+6 *51947:B *51949:B1 0
+7 *51948:B *264:40 0.000274294
+8 *239:6 *292:DIODE 0
+9 *51948:A *51947:B 0
+*RES
+1 *51946:Y *239:6 15.7464 
+2 *239:6 *51948:B 16.3893 
+3 *239:6 *51947:B 16.3536 
+*END
+
+*D_NET *240 0.00119301
+*CONN
+*I *51949:A2 I *D sky130_fd_sc_hd__o21a_1
+*I *51963:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51947:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51949:A2 5.51399e-05
+2 *51963:B 0
+3 *51947:Y 0.000314442
+4 *240:8 0.000369582
+5 *51949:A2 *51949:B1 0.000106299
+6 *240:8 *51949:B1 6.42338e-05
+7 *240:8 *264:30 2.51343e-06
+8 *51947:A *240:8 0.000101146
+9 *51949:A1 *51949:A2 0.000179656
+10 *231:9 *51949:A2 0
+11 *231:9 *240:8 0
+*RES
+1 *51947:Y *240:8 18.4429 
+2 *240:8 *51963:B 13.8 
+3 *240:8 *51949:A2 16.3536 
+*END
+
+*D_NET *241 0.000919432
+*CONN
+*I *51949:B1 I *D sky130_fd_sc_hd__o21a_1
+*I *51948:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51949:B1 0.000310373
+2 *51948:Y 0.000310373
+3 *51949:B1 *320:DIODE 0
+4 *51947:B *51949:B1 0
+5 *51948:A *51949:B1 0.000128154
+6 *51949:A2 *51949:B1 0.000106299
+7 *240:8 *51949:B1 6.42338e-05
+*RES
+1 *51948:Y *51949:B1 34.1 
+*END
+
+*D_NET *242 0.00113022
+*CONN
+*I *51951:A I *D sky130_fd_sc_hd__nor2_1
+*I *51954:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51949:X O *D sky130_fd_sc_hd__o21a_1
+*CAP
+1 *51951:A 6.54585e-05
+2 *51954:A 0.000148787
+3 *51949:X 0.000117501
+4 *242:5 0.000331747
+5 *51951:A *51951:B 5.7661e-06
+6 *51951:A *265:31 0.000142856
+7 *51954:A *51954:B 0
+8 *242:5 *265:31 0.000318101
+*RES
+1 *51949:X *242:5 12.3 
+2 *242:5 *51954:A 20.8536 
+3 *242:5 *51951:A 11.0857 
+*END
+
+*D_NET *243 0.00136474
+*CONN
+*I *51954:B I *D sky130_fd_sc_hd__xnor2_1
+*I *51951:B I *D sky130_fd_sc_hd__nor2_1
+*I *51950:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51954:B 0.000241109
+2 *51951:B 3.99034e-05
+3 *51950:Y 4.17393e-05
+4 *243:5 0.000322752
+5 *51951:B *244:10 0.00010096
+6 *51951:B *265:31 3.67142e-05
+7 *51954:B *51955:B 0
+8 *51954:B *247:7 0.00014285
+9 *51954:B *265:26 1.19402e-05
+10 *51954:B *266:97 0.000151061
+11 *243:5 *51950:A 3.55336e-06
+12 *243:5 *51955:B 7.43578e-06
+13 *243:5 *244:10 0.000172309
+14 *243:5 *265:31 8.66432e-05
+15 *51949:A1 *51954:B 0
+16 *51951:A *51951:B 5.7661e-06
+17 *51954:A *51954:B 0
+18 *232:74 *51954:B 0
+*RES
+1 *51950:Y *243:5 11.0679 
+2 *243:5 *51951:B 10.675 
+3 *243:5 *51954:B 23.7464 
+*END
+
+*D_NET *244 0.00287949
+*CONN
+*I *51956:A1 I *D sky130_fd_sc_hd__o211a_1
+*I *51957:B1 I *D sky130_fd_sc_hd__a211o_1
+*I *51951:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51956:A1 0.000301737
+2 *51957:B1 0
+3 *51951:Y 0.000622254
+4 *244:10 0.000923992
+5 *51956:A1 *51956:A2 0.000131831
+6 *51956:A1 *51956:C1 9.97164e-05
+7 *51956:A1 *248:17 0
+8 *51956:A1 *266:80 5.65955e-05
+9 *51956:A1 *266:86 1.10868e-05
+10 *244:10 *319:DIODE 4.16207e-05
+11 *244:10 *51955:B 2.42662e-05
+12 *244:10 *51960:A 0.000146523
+13 *244:10 *248:8 0.000148196
+14 *244:10 *248:17 1.02504e-05
+15 *244:10 *265:31 1.32552e-05
+16 *51951:B *244:10 0.00010096
+17 *51957:A1 *51956:A1 5.74596e-05
+18 *232:95 *51956:A1 1.74352e-05
+19 *243:5 *244:10 0.000172309
+*RES
+1 *51951:Y *244:10 28.05 
+2 *244:10 *51957:B1 9.3 
+3 *244:10 *51956:A1 23.925 
+*END
+
+*D_NET *245 0.00037062
+*CONN
+*I *51953:A I *D sky130_fd_sc_hd__inv_2
+*I *51952:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51953:A 0.000107455
+2 *51952:X 0.000107455
+3 *51953:A *265:26 5.49544e-05
+4 *212:66 *51953:A 7.2344e-05
+5 *225:64 *51953:A 2.84109e-05
+6 *232:60 *51953:A 0
+*RES
+1 *51952:X *51953:A 30.0821 
+*END
+
+*D_NET *246 0.00164824
+*CONN
+*I *51955:A I *D sky130_fd_sc_hd__nor2_1
+*I *51960:A I *D sky130_fd_sc_hd__and2_1
+*I *51953:Y O *D sky130_fd_sc_hd__inv_2
+*CAP
+1 *51955:A 0
+2 *51960:A 0.000191763
+3 *51953:Y 0.000169735
+4 *246:11 0.000361498
+5 *51960:A *319:DIODE 6.04162e-05
+6 *51960:A *51955:B 0.000398726
+7 *51960:A *51960:B 1.31516e-05
+8 *51960:A *266:97 9.11365e-06
+9 *246:11 *319:DIODE 0
+10 *246:11 *51955:B 5.49489e-05
+11 *246:11 *265:26 5.65955e-05
+12 *232:60 *51960:A 1.02504e-05
+13 *232:74 *51960:A 0.000175519
+14 *244:10 *51960:A 0.000146523
+*RES
+1 *51953:Y *246:11 21.0143 
+2 *246:11 *51960:A 24.675 
+3 *246:11 *51955:A 9.3 
+*END
+
+*D_NET *247 0.00200889
+*CONN
+*I *51960:B I *D sky130_fd_sc_hd__and2_1
+*I *51955:B I *D sky130_fd_sc_hd__nor2_1
+*I *51954:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51960:B 3.11922e-05
+2 *51955:B 0.000312805
+3 *51954:Y 0.000154286
+4 *247:7 0.000498283
+5 *51955:B *248:8 0.000145918
+6 *51960:B *266:97 0
+7 *247:7 *266:97 6.4443e-05
+8 *51954:B *51955:B 0
+9 *51954:B *247:7 0.00014285
+10 *51960:A *51955:B 0.000398726
+11 *51960:A *51960:B 1.31516e-05
+12 *232:74 *51955:B 0.00015134
+13 *232:74 *51960:B 9.25014e-06
+14 *243:5 *51955:B 7.43578e-06
+15 *244:10 *51955:B 2.42662e-05
+16 *246:11 *51955:B 5.49489e-05
+*RES
+1 *51954:Y *247:7 16.8 
+2 *247:7 *51955:B 21.6393 
+3 *247:7 *51960:B 14.5321 
+*END
+
+*D_NET *248 0.00209978
+*CONN
+*I *51956:A2 I *D sky130_fd_sc_hd__o211a_1
+*I *51961:A I *D sky130_fd_sc_hd__or2_2
+*I *51957:C1 I *D sky130_fd_sc_hd__a211o_1
+*I *51955:Y O *D sky130_fd_sc_hd__nor2_1
+*CAP
+1 *51956:A2 0.000150142
+2 *51961:A 0.000100098
+3 *51957:C1 0
+4 *51955:Y 0.000248356
+5 *248:17 0.000323476
+6 *248:8 0.000321592
+7 *51956:A2 *51956:C1 5.65955e-05
+8 *248:8 *319:DIODE 5.33882e-05
+9 *248:8 *266:97 1.08359e-05
+10 *248:17 *51956:C1 0
+11 *51955:B *248:8 0.000145918
+12 *51956:A1 *51956:A2 0.000131831
+13 *51956:A1 *248:17 0
+14 *51956:B1 *51956:A2 1.02132e-05
+15 *40:8 *51961:A 5.04589e-05
+16 *232:80 *51956:A2 0.000113402
+17 *232:80 *51961:A 2.59355e-05
+18 *232:80 *248:8 3.34366e-05
+19 *232:80 *248:17 0.000142797
+20 *232:95 *51956:A2 2.28598e-05
+21 *244:10 *248:8 0.000148196
+22 *244:10 *248:17 1.02504e-05
+*RES
+1 *51955:Y *248:8 18.3357 
+2 *248:8 *51957:C1 13.8 
+3 *248:8 *248:17 6.44643 
+4 *248:17 *51961:A 11.0679 
+5 *248:17 *51956:A2 12.7286 
+*END
+
+*D_NET *249 0.00366111
+*CONN
+*I *52034:A1 I *D sky130_fd_sc_hd__o211ai_1
+*I *52035:B1 I *D sky130_fd_sc_hd__a211o_1
+*I *51958:A I *D sky130_fd_sc_hd__or2b_1
+*I *52033:A_N I *D sky130_fd_sc_hd__and3b_1
+*I *51956:X O *D sky130_fd_sc_hd__o211a_1
+*CAP
+1 *52034:A1 9.25036e-05
+2 *52035:B1 2.03441e-05
+3 *51958:A 0
+4 *52033:A_N 0.000182666
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+6 *249:28 0.00033516
+7 *249:20 0.000314407
+8 *249:7 0.000583133
+9 *52033:A_N *51958:B_N 0
+10 *52033:A_N *51959:B 0
+11 *52033:A_N *52033:B 1.55885e-05
+12 *52033:A_N *252:8 0.000103981
+13 *52033:A_N *266:74 5.52238e-05
+14 *52034:A1 *52035:A1 3.99614e-06
+15 *52034:A1 *267:90 0.000290778
+16 *52034:A1 *267:92 5.62995e-05
+17 *52035:B1 *52035:A1 5.7661e-06
+18 *249:20 *252:8 6.73939e-05
+19 *249:28 *51959:B 0.000199924
+20 *249:28 *267:92 0.000390851
+21 *51959:A *52033:A_N 0
+22 *52028:B1_N *52033:A_N 6.05161e-06
+23 *52034:A2 *52034:A1 0.000333743
+24 *52034:A2 *249:28 5.52302e-05
+25 *229:7 *52033:A_N 0
+26 *232:95 *249:7 0.000239702
+*RES
+1 *51956:X *249:7 18.0321 
+2 *249:7 *52033:A_N 17.4964 
+3 *249:7 *249:20 6.07143 
+4 *249:20 *51958:A 9.3 
+5 *249:20 *249:28 7.42857 
+6 *249:28 *52035:B1 9.72857 
+7 *249:28 *52034:A1 14.0857 
+*END
+
+*D_NET *250 0.00209225
+*CONN
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+*I *51958:B_N I *D sky130_fd_sc_hd__or2b_1
+*I *51957:X O *D sky130_fd_sc_hd__a211o_1
+*CAP
+1 *52033:B 0.00020907
+2 *51958:B_N 0.000311673
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+4 *250:9 0.000780364
+5 *51958:B_N *252:8 9.18353e-05
+6 *51958:B_N *272:142 4.46186e-06
+7 *52033:B *266:74 3.65178e-05
+8 *250:9 *266:74 6.23021e-05
+9 *250:9 *266:78 0.000170758
+10 *250:9 *266:80 7.20217e-06
+11 *52028:B1_N *51958:B_N 0
+12 *52028:B1_N *52033:B 0.000142856
+13 *52033:A_N *51958:B_N 0
+14 *52033:A_N *52033:B 1.55885e-05
+15 *40:8 *51958:B_N 0
+16 *229:7 *51958:B_N 0
+*RES
+1 *51957:X *250:9 14.4964 
+2 *250:9 *51958:B_N 24.1929 
+3 *250:9 *52033:B 12.3 
+*END
+
+*D_NET *251 0.000925699
+*CONN
+*I *51959:B I *D sky130_fd_sc_hd__xor2_4
+*I *51958:X O *D sky130_fd_sc_hd__or2b_1
+*CAP
+1 *51959:B 0.000362887
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+3 *51959:A *51959:B 0
+4 *52033:A_N *51959:B 0
+5 *91:8 *51959:B 0
+6 *249:28 *51959:B 0.000199924
+*RES
+1 *51958:X *51959:B 32.9571 
+*END
+
+*D_NET *252 0.00258748
+*CONN
+*I *52040:A1 I *D sky130_fd_sc_hd__o21a_1
+*I *51984:A I *D sky130_fd_sc_hd__xor2_4
+*I *51959:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52040:A1 0.000498134
+2 *51984:A 3.35478e-05
+3 *51959:X 0.000425817
+4 *252:8 0.000957499
+5 *52040:A1 *354:DIODE 0
+6 *52040:A1 *272:145 4.80729e-05
+7 *252:8 *272:142 0
+8 *252:8 *272:145 0.000277524
+9 *51958:B_N *252:8 9.18353e-05
+10 *52033:A_N *252:8 0.000103981
+11 *52039:A *52040:A1 0
+12 *52040:B1 *52040:A1 1.41706e-05
+13 *52042:A *52040:A1 0
+14 *52042:A *252:8 0
+15 *232:95 *252:8 6.95093e-05
+16 *249:20 *252:8 6.73939e-05
+*RES
+1 *51959:X *252:8 13.8125 
+2 *252:8 *51984:A 14.3357 
+3 *252:8 *52040:A1 29.3 
+*END
+
+*D_NET *253 0.000364593
+*CONN
+*I *51961:B I *D sky130_fd_sc_hd__or2_2
+*I *51960:X O *D sky130_fd_sc_hd__and2_1
+*CAP
+1 *51961:B 0.000155216
+2 *51960:X 0.000155216
+3 *40:8 *51961:B 5.41609e-05
+4 *232:80 *51961:B 0
+*RES
+1 *51960:X *51961:B 30.2964 
+*END
+
+*D_NET *254 0.00222903
+*CONN
+*I *51986:A I *D sky130_fd_sc_hd__xor2_4
+*I *51981:A1 I *D sky130_fd_sc_hd__o21bai_2
+*I *51961:X O *D sky130_fd_sc_hd__or2_2
+*CAP
+1 *51986:A 0.000182013
+2 *51981:A1 0.000103844
+3 *51961:X 0.000391339
+4 *254:7 0.000677196
+5 *51981:A2 *51981:A1 2.94103e-05
+6 *51981:A2 *51986:A 5.01213e-05
+7 *51981:B1_N *51981:A1 0
+8 *51981:B1_N *51986:A 0
+9 *51986:B *51986:A 0.000117135
+10 *40:8 *51981:A1 9.80173e-05
+11 *40:8 *254:7 0.000579959
+*RES
+1 *51961:X *254:7 19.675 
+2 *254:7 *51981:A1 16.3179 
+3 *254:7 *51986:A 17.8714 
+*END
+
+*D_NET *255 0.00137576
+*CONN
+*I *51979:A I *D sky130_fd_sc_hd__xnor2_4
+*I *51980:A I *D sky130_fd_sc_hd__nor2_1
+*I *51962:Y O *D sky130_fd_sc_hd__nand2_2
+*CAP
+1 *51979:A 0.000125255
+2 *51980:A 0
+3 *51962:Y 0.000136017
+4 *255:10 0.000261272
+5 *51979:A *267:104 0.000495276
+6 *51979:A *272:130 5.30209e-05
+7 *255:10 *52002:A2 3.69047e-06
+8 *255:10 *272:130 7.83659e-05
+9 *51979:B *51979:A 1.56e-05
+10 *51980:B *51979:A 5.7661e-06
+11 *51981:B1_N *51979:A 0.000148105
+12 *51981:B1_N *255:10 0
+13 *37:10 *255:10 5.33882e-05
+*RES
+1 *51962:Y *255:10 20.7821 
+2 *255:10 *51980:A 9.3 
+3 *255:10 *51979:A 14.8 
+*END
+
+*D_NET *256 0.0024798
+*CONN
+*I *51978:A1 I *D sky130_fd_sc_hd__o21ba_2
+*I *52001:A I *D sky130_fd_sc_hd__xor2_1
+*I *51963:Y O *D sky130_fd_sc_hd__xnor2_1
+*CAP
+1 *51978:A1 0.000140103
+2 *52001:A 0
+3 *51963:Y 0.00079926
+4 *256:8 0.000939363
+5 *256:8 *320:DIODE 0.00014285
+6 *256:8 *51932:A 2.89016e-05
+7 *51978:A2 *51978:A1 8.9163e-05
+8 *51978:B1_N *51978:A1 0
+9 *51978:B1_N *256:8 0
+10 *35:6 *51978:A1 1.17968e-05
+11 *35:6 *256:8 6.32633e-05
+12 *225:10 *256:8 0.000106042
+13 *225:58 *256:8 0.000159063
+*RES
+1 *51963:Y *256:8 25.425 
+2 *256:8 *52001:A 13.8 
+3 *256:8 *51978:A1 16.3536 
+*END
+
+*D_NET *257 0.00153132
+*CONN
+*I *51976:A I *D sky130_fd_sc_hd__xor2_1
+*I *51964:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51976:A 0.000431025
+2 *51964:Y 0.000431025
+3 *51976:A *261:29 6.74815e-05
+4 *51976:A *265:45 1.33343e-05
+5 *51976:A *265:57 1.21289e-05
+6 *51978:B1_N *51976:A 0.000528343
+7 *58:6 *51976:A 4.79842e-05
+*RES
+1 *51964:Y *51976:A 34.7071 
+*END
+
+*D_NET *258 0.00303662
+*CONN
+*I *51989:A I *D sky130_fd_sc_hd__xor2_1
+*I *51975:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *51965:X O *D sky130_fd_sc_hd__xor2_1
+*CAP
+1 *51989:A 7.78117e-05
+2 *51975:A1 8.17303e-05
+3 *51965:X 0.000855991
+4 *258:8 0.00101553
+5 *51989:A *259:20 4.46186e-06
+6 *258:8 *261:16 0
+7 *51975:A2 *51989:A 0
+8 *51975:A2 *258:8 0
+9 *51975:B1 *51975:A1 5.52238e-05
+10 *51995:B *258:8 0.000103004
+11 *31:8 *51989:A 0.000150632
+12 *31:8 *258:8 0.000173797
+13 *207:7 *258:8 0.000320024
+14 *207:13 *258:8 4.14873e-05
+15 *207:19 *258:8 0.000156926
+*RES
+1 *51965:X *258:8 26.8536 
+2 *258:8 *51975:A1 15.1571 
+3 *258:8 *51989:A 15.7464 
+*END
+
+*D_NET *259 0.0019906
+*CONN
+*I *51974:A I *D sky130_fd_sc_hd__nor2_1
+*I *51973:A I *D sky130_fd_sc_hd__nand2_1
+*I *51988:A I *D sky130_fd_sc_hd__xnor2_1
+*I *51966:Y O *D sky130_fd_sc_hd__nand2_1
+*CAP
+1 *51974:A 0.000186349
+2 *51973:A 0
+3 *51988:A 2.91823e-05
+4 *51966:Y 6.47689e-05
+5 *259:20 0.000403975
+6 *259:8 0.000311577
+7 *259:8 *261:16 0.000104974
+8 *259:8 *261:66 2.31791e-05
+9 *259:20 *261:23 0.000312222
+10 *259:20 *272:83 0
+11 *340:DIODE *259:8 0
+12 *51973:B *51974:A 7.85197e-05
+13 *51974:B *51974:A 9.60939e-05
+14 *51975:A2 *259:20 7.2754e-05
+15 *51976:B *51974:A 4.88637e-05
+16 *51988:B *51988:A 1.92789e-05
+17 *51988:B *259:20 4.16984e-05
+18 *51989:A *259:20 4.46186e-06
+19 *51989:B *259:20 0.000119135
+20 *31:8 *259:20 2.37761e-05
+21 *31:21 *259:20 4.97918e-05
+*RES
+1 *51966:Y *259:8 19.9429 
+2 *259:8 *51988:A 9.83571 
+3 *259:8 *259:20 15.2679 
+4 *259:20 *51973:A 9.3 
+5 *259:20 *51974:A 13.1571 
+*END
+
+*D_NET *260 0.000882122
+*CONN
+*I *51971:S I *D sky130_fd_sc_hd__mux2_1
+*I *51972:A2_N I *D sky130_fd_sc_hd__o2bb2a_1
+*I *51967:X O *D sky130_fd_sc_hd__and4_1
+*CAP
+1 *51971:S 0.000150637
+2 *51972:A2_N 3.92359e-05
+3 *51967:X 9.07134e-05
+4 *260:8 0.000280586
+5 *51971:S *51967:C 2.7814e-05
+6 *260:8 *51967:C 3.68864e-05
+7 *260:8 *272:188 2.92126e-05
+8 *260:8 *280:37 3.47641e-06
+9 *51967:D *51971:S 1.31235e-05
+10 *51967:D *260:8 1.76821e-05
+11 *51970:B *51972:A2_N 5.52238e-05
+12 *51971:A0 *51971:S 1.18064e-05
+13 *51972:A1_N *51971:S 0
+14 *31:8 *51971:S 0.000125724
+15 *55:10 *51971:S 0
+*RES
+1 *51967:X *260:8 15.3714 
+2 *260:8 *51972:A2_N 14.3357 
+3 *260:8 *51971:S 16.9607 
+*END
+
+*D_NET *261 0.0611189
+*CONN
+*I *344:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *335:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *342:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51998:B1 I *D sky130_fd_sc_hd__o21ai_1
+*I *334:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51985:B I *D sky130_fd_sc_hd__and2_2
+*I *51987:A I *D sky130_fd_sc_hd__nand2_1
+*I *52002:A1 I *D sky130_fd_sc_hd__a21o_1
+*I *52135:X O *D sky130_fd_sc_hd__clkbuf_4
+*CAP
+1 *344:DIODE 0
+2 *335:DIODE 0.00014015
+3 *342:DIODE 0
+4 *51998:B1 0
+5 *334:DIODE 0.000143702
+6 *51985:B 0.000247199
+7 *51987:A 0
+8 *52002:A1 0
+9 *52135:X 6.80945e-05
+10 *261:76 0.000629263
+11 *261:66 0.000584701
+12 *261:38 0.000442893
+13 *261:35 0.000490369
+14 *261:29 0.000615835
+15 *261:23 0.00108799
+16 *261:16 0.00168392
+17 *261:9 0.026447
+18 *261:8 0.0255499
+19 *334:DIODE *52002:A2 0.000126639
+20 *51985:B *336:DIODE 0
+21 *261:16 *51967:C 0
+22 *261:16 *272:83 7.60306e-05
+23 *261:16 *279:12 0
+24 *261:16 *279:22 0
+25 *261:35 *52002:A2 0.000102197
+26 *261:66 *272:83 8.91726e-05
+27 *261:76 *330:DIODE 3.57844e-05
+28 *261:76 *272:83 0.000179363
+29 *340:DIODE *261:66 0
+30 *51972:B2 *261:16 0
+31 *51976:A *261:29 6.74815e-05
+32 *51978:A2 *261:29 9.8804e-05
+33 *51988:B *261:23 1.82549e-05
+34 *51989:B *261:23 1.74352e-05
+35 *51994:A *261:16 0
+36 *51994:B *261:16 0
+37 *51998:A2 *261:23 0.000271345
+38 *52002:B1 *261:29 9.90431e-05
+39 *52134:A *51985:B 1.19309e-05
+40 *7:7 *261:16 0
+41 *31:8 *261:16 0
+42 *35:6 *261:29 0.000117369
+43 *45:7 *51985:B 0.000219828
+44 *58:6 *261:29 0
+45 *60:10 *261:29 0.000315172
+46 *60:10 *261:38 0
+47 *66:8 *51985:B 0.000399848
+48 *207:32 *261:16 9.34004e-05
+49 *225:10 *261:29 5.57914e-05
+50 *225:15 *261:23 5.3547e-05
+51 *225:22 *261:23 9.90431e-05
+52 *225:28 *261:66 0
+53 *225:28 *261:76 0
+54 *258:8 *261:16 0
+55 *259:8 *261:16 0.000104974
+56 *259:8 *261:66 2.31791e-05
+57 *259:20 *261:23 0.000312222
+*RES
+1 *52135:X *261:8 19.3357 
+2 *261:8 *261:9 297.893 
+3 *261:9 *261:16 21.0714 
+4 *261:16 *261:23 16.1607 
+5 *261:23 *261:29 19.6964 
+6 *261:29 *52002:A1 9.3 
+7 *261:29 *261:35 2.17857 
+8 *261:35 *261:38 7.96429 
+9 *261:38 *51987:A 13.8 
+10 *261:38 *51985:B 20.6036 
+11 *261:35 *334:DIODE 11.4786 
+12 *261:23 *51998:B1 9.3 
+13 *261:16 *261:66 2.25 
+14 *261:66 *342:DIODE 13.8 
+15 *261:66 *261:76 13.6786 
+16 *261:76 *335:DIODE 20.8536 
+17 *261:76 *344:DIODE 9.3 
+*END
+
+*D_NET *262 0.0297557
+*CONN
+*I *51906:A I *D sky130_fd_sc_hd__and4_1
+*I *51893:A I *D sky130_fd_sc_hd__buf_2
+*I *51921:A I *D sky130_fd_sc_hd__and4_1
+*I *289:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *313:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *302:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *285:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51941:A I *D sky130_fd_sc_hd__and4_1
+*I *52136:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *51906:A 0
+2 *51893:A 8.92255e-05
+3 *51921:A 0
+4 *289:DIODE 0
+5 *313:DIODE 0.000170143
+6 *302:DIODE 0
+7 *285:DIODE 0.000188953
+8 *51941:A 1.16062e-05
+9 *52136:X 0.000121345
+10 *262:64 0.000300526
+11 *262:61 0.000767638
+12 *262:56 0.0015321
+13 *262:26 0.0013111
+14 *262:17 0.000279479
+15 *262:15 0.000288321
+16 *262:14 0.000455195
+17 *262:9 0.00435037
+18 *262:8 0.00418945
+19 *285:DIODE *304:DIODE 0
+20 *285:DIODE *278:34 0
+21 *285:DIODE *280:14 0
+22 *285:DIODE *281:8 0.000101545
+23 *285:DIODE *281:11 6.05161e-06
+24 *285:DIODE *281:17 0.000126639
+25 *313:DIODE *304:DIODE 0
+26 *313:DIODE *272:52 0
+27 *313:DIODE *279:12 0.000134758
+28 *313:DIODE *279:22 3.57844e-05
+29 *51893:A *281:53 7.50601e-05
+30 *51893:A *281:63 0
+31 *51893:A *281:206 1.52978e-05
+32 *51941:A *51941:B 5.52302e-05
+33 *262:9 *263:9 0.0030879
+34 *262:9 *282:18 0.00115055
+35 *262:9 *284:9 0.00627269
+36 *262:14 *280:49 0.000168939
+37 *262:14 *281:63 7.80714e-06
+38 *262:15 *51906:C 4.08637e-05
+39 *262:15 *51921:B 1.21289e-05
+40 *262:15 *51921:C 4.87953e-05
+41 *262:15 *280:43 0.000274288
+42 *262:15 *281:63 0.000137983
+43 *262:17 *51921:C 2.89016e-05
+44 *262:26 *51921:C 0.000164835
+45 *262:26 *281:47 0.000569201
+46 *262:56 *51967:A 1.26352e-05
+47 *262:56 *51967:C 3.14078e-05
+48 *262:56 *51991:A1 0
+49 *262:56 *280:37 0.000421083
+50 *262:56 *281:29 0.000230475
+51 *262:56 *281:47 0
+52 *262:61 *279:12 3.69697e-05
+53 *262:61 *280:14 0
+54 *262:61 *281:17 5.52302e-05
+55 *262:61 *281:29 0.000607494
+56 *262:64 *280:17 0.000184745
+57 *262:64 *281:17 3.9846e-05
+58 *51923:B *262:14 0
+59 *51967:D *262:56 9.95103e-05
+60 *51968:B2 *262:26 2.77289e-05
+61 *51969:A *262:56 5.33005e-05
+62 *51969:B *262:26 6.2589e-06
+63 *51970:B *262:56 0.000109313
+64 *51990:A_N *262:56 9.71197e-05
+65 *51991:B2 *262:56 0
+66 *10:7 *262:8 0
+67 *28:15 *262:56 0.000197245
+68 *183:15 *262:26 8.85027e-06
+69 *189:31 *262:26 4.43256e-05
+70 *189:45 *262:26 0.000191438
+71 *189:45 *262:56 8.2958e-06
+72 *192:37 *262:56 0.000465876
+73 *203:13 *262:14 0
+74 *232:50 *51893:A 0.000101545
+75 *234:8 *51941:A 5.52302e-05
+76 *234:8 *262:56 9.91086e-05
+*RES
+1 *52136:X *262:8 20.2464 
+2 *262:8 *262:9 121.696 
+3 *262:9 *262:14 13.6786 
+4 *262:14 *262:15 4.23214 
+5 *262:15 *262:17 0.535714 
+6 *262:17 *262:26 12.0714 
+7 *262:26 *51941:A 14.3357 
+8 *262:26 *262:56 33.9821 
+9 *262:56 *262:61 11.8214 
+10 *262:61 *262:64 7.08929 
+11 *262:64 *285:DIODE 22.425 
+12 *262:64 *302:DIODE 9.3 
+13 *262:61 *313:DIODE 17.8714 
+14 *262:56 *289:DIODE 9.3 
+15 *262:17 *51921:A 9.3 
+16 *262:15 *51893:A 20.55 
+17 *262:14 *51906:A 9.3 
+*END
+
+*D_NET *263 0.0359323
+*CONN
+*I *51924:A I *D sky130_fd_sc_hd__nand2_1
+*I *286:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *307:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51899:A I *D sky130_fd_sc_hd__buf_2
+*I *52137:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *51924:A 2.03441e-05
+2 *286:DIODE 0
+3 *307:DIODE 0.000163539
+4 *51899:A 0
+5 *52137:X 6.34212e-05
+6 *263:42 0.000932195
+7 *263:30 0.0014825
+8 *263:12 0.000814905
+9 *263:9 0.00767656
+10 *263:8 0.00761858
+11 *307:DIODE *282:10 0.000104611
+12 *263:9 *282:18 0.000274288
+13 *263:9 *283:59 0.000801966
+14 *263:9 *284:9 0.00626884
+15 *263:12 *282:18 0
+16 *263:30 *282:18 0
+17 *263:42 *51921:C 0
+18 *263:42 *280:37 0.000266479
+19 *263:42 *281:53 9.91086e-05
+20 *263:42 *281:206 0.000209483
+21 *263:42 *282:10 0.00118257
+22 *51924:B *51924:A 5.7661e-06
+23 *51926:A1_N *263:30 1.4763e-05
+24 *51926:A2_N *263:30 0.000434166
+25 *51926:A2_N *263:42 1.24368e-05
+26 *51926:B1 *263:30 0.000186662
+27 *51943:B *263:30 1.34548e-05
+28 *51968:A2 *263:42 0.000154778
+29 *51968:B1 *263:42 5.922e-05
+30 *51968:B2 *263:42 6.09256e-05
+31 *51992:A1 *263:42 5.52238e-05
+32 *52149:A *263:9 0.000656173
+33 *8:13 *263:9 0.00123037
+34 *11:7 *263:8 5.33978e-05
+35 *183:7 *263:42 9.22103e-06
+36 *183:15 *263:42 4.57334e-05
+37 *183:54 *263:12 1.00477e-05
+38 *183:54 *263:30 8.5685e-05
+39 *189:17 *263:42 0.000315165
+40 *189:89 *263:30 0
+41 *192:11 *263:30 0.000162549
+42 *199:20 *263:30 9.91086e-05
+43 *203:13 *263:30 5.74499e-06
+44 *203:24 *263:30 2.59355e-05
+45 *212:29 *263:42 0.000141985
+46 *212:41 *263:30 0.000447049
+47 *212:41 *263:42 4.58976e-05
+48 *212:54 *263:30 9.18968e-06
+49 *232:50 *263:42 0.00052438
+50 *262:9 *263:9 0.0030879
+*RES
+1 *52137:X *263:8 19.6393 
+2 *263:8 *263:9 162.768 
+3 *263:9 *263:12 6.44643 
+4 *263:12 *51899:A 13.8 
+5 *263:12 *263:30 20.0714 
+6 *263:30 *263:42 33.5893 
+7 *263:42 *307:DIODE 12.6214 
+8 *263:42 *286:DIODE 9.3 
+9 *263:30 *51924:A 9.72857 
+*END
+
+*D_NET *264 0.0362578
+*CONN
+*I *51920:A I *D sky130_fd_sc_hd__nand2_1
+*I *51940:A I *D sky130_fd_sc_hd__and2_1
+*I *312:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *295:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *301:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51914:A I *D sky130_fd_sc_hd__buf_2
+*I *52138:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *51920:A 0
+2 *51940:A 2.03441e-05
+3 *312:DIODE 6.80945e-05
+4 *295:DIODE 0.000337608
+5 *301:DIODE 0
+6 *51914:A 8.91478e-05
+7 *52138:X 0.00061616
+8 *264:48 0.000671727
+9 *264:40 0.000363689
+10 *264:30 0.000320789
+11 *264:25 0.000718447
+12 *264:18 0.00202927
+13 *264:9 0.0143632
+14 *264:8 0.0135142
+15 *51914:A *292:DIODE 7.50601e-05
+16 *315:DIODE *295:DIODE 5.70551e-05
+17 *315:DIODE *264:40 0.000446597
+18 *315:DIODE *264:48 8.87524e-05
+19 *51915:A1 *264:9 2.63842e-05
+20 *51930:A *264:25 0.000189337
+21 *51930:B *264:18 0
+22 *51947:B *312:DIODE 0
+23 *51948:A *264:30 0.000154762
+24 *51948:B *264:40 0.000274294
+25 *52056:A1 *264:9 2.89016e-05
+26 *52059:A *264:9 5.52302e-05
+27 *52059:B *264:9 0.000102197
+28 *52090:A1 *264:9 3.18676e-05
+29 *52090:A2 *264:9 2.42662e-05
+30 *52093:B *264:9 0.000122091
+31 *52116:A1 *264:9 3.18676e-05
+32 *52116:A2 *264:9 2.42662e-05
+33 *52125:A *264:9 0.000340405
+34 *113:5 *264:9 0.000203611
+35 *146:5 *264:9 0.000210753
+36 *212:54 *264:18 0
+37 *212:66 *264:25 0
+38 *223:7 *264:25 3.67142e-05
+39 *232:50 *51914:A 0.000195555
+40 *232:50 *264:30 0.000176234
+41 *232:60 *51940:A 5.7661e-06
+42 *232:60 *264:25 0.000203925
+43 *232:60 *264:30 3.67257e-05
+44 *240:8 *264:30 2.51343e-06
+*RES
+1 *52138:X *264:8 29.3536 
+2 *264:8 *264:9 202.196 
+3 *264:9 *264:18 14.6744 
+4 *264:18 *264:25 14.9107 
+5 *264:25 *264:30 8.10714 
+6 *264:30 *51914:A 16.3536 
+7 *264:30 *264:40 8.73214 
+8 *264:40 *301:DIODE 9.3 
+9 *264:40 *264:48 4.03571 
+10 *264:48 *295:DIODE 13.5321 
+11 *264:48 *312:DIODE 19.3357 
+12 *264:25 *51940:A 9.72857 
+13 *264:18 *51920:A 13.8 
+*END
+
+*D_NET *265 0.0537986
+*CONN
+*I *51950:A I *D sky130_fd_sc_hd__nand2_1
+*I *51932:A I *D sky130_fd_sc_hd__buf_2
+*I *308:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *322:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51964:A I *D sky130_fd_sc_hd__nand2_1
+*I *317:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52139:X O *D sky130_fd_sc_hd__clkbuf_4
+*CAP
+1 *51950:A 6.79355e-06
+2 *51932:A 0.000136934
+3 *308:DIODE 8.93921e-05
+4 *322:DIODE 2.46069e-05
+5 *51964:A 0
+6 *317:DIODE 4.96695e-05
+7 *52139:X 0.000960245
+8 *265:57 0.000376792
+9 *265:45 0.00031223
+10 *265:41 0.000474808
+11 *265:31 0.000806755
+12 *265:26 0.00248815
+13 *265:13 0.00578597
+14 *265:11 0.00379565
+15 *265:9 0.0118839
+16 *265:8 0.0128218
+17 *317:DIODE *272:108 2.89016e-05
+18 *322:DIODE *272:92 0.00014285
+19 *265:9 *268:9 0.00535307
+20 *265:13 *266:50 0.000447622
+21 *265:13 *268:9 0.00151845
+22 *265:41 *272:100 1.00073e-05
+23 *265:41 *272:108 0.000449539
+24 *265:45 *272:100 1.57625e-05
+25 *265:57 *272:92 0.000186669
+26 *265:57 *272:100 0.000696736
+27 *51933:A1 *265:26 0.000310304
+28 *51933:A2 *265:26 1.37693e-05
+29 *51934:B1 *265:26 9.47712e-05
+30 *51951:A *265:31 0.000142856
+31 *51951:B *265:31 3.67142e-05
+32 *51953:A *265:26 5.49544e-05
+33 *51954:B *265:26 1.19402e-05
+34 *51976:A *265:45 1.33343e-05
+35 *51976:A *265:57 1.21289e-05
+36 *51977:C *265:57 2.70886e-05
+37 *51978:B1_N *51932:A 4.46186e-06
+38 *51978:B1_N *265:57 0.000266147
+39 *52001:B *265:57 5.52302e-05
+40 *52025:A *265:13 4.88637e-05
+41 *52025:B *265:13 0.000274294
+42 *52026:B *265:13 0.000445577
+43 *52061:A *265:13 9.90431e-05
+44 *52095:A1 *265:13 9.60939e-05
+45 *35:6 *51932:A 0
+46 *58:6 *308:DIODE 0
+47 *60:10 *265:57 5.33005e-05
+48 *118:7 *265:13 6.13217e-05
+49 *119:9 *265:13 0.000242238
+50 *203:94 *265:13 0.000140933
+51 *211:8 *265:26 0.00052903
+52 *212:66 *265:26 0.000359997
+53 *225:10 *51932:A 3.18676e-05
+54 *225:23 *322:DIODE 5.76121e-05
+55 *225:23 *265:57 3.14078e-05
+56 *225:58 *265:26 5.30637e-06
+57 *225:64 *265:26 0.000240387
+58 *225:72 *265:26 4.34254e-05
+59 *225:92 *265:13 8.37649e-05
+60 *225:92 *265:26 0.000228236
+61 *225:100 *265:13 0.000140071
+62 *227:8 *265:26 9.90367e-05
+63 *232:60 *265:26 7.2754e-05
+64 *242:5 *265:31 0.000318101
+65 *243:5 *51950:A 3.55336e-06
+66 *243:5 *265:31 8.66432e-05
+67 *244:10 *265:31 1.32552e-05
+68 *246:11 *265:26 5.65955e-05
+69 *256:8 *51932:A 2.89016e-05
+*RES
+1 *52139:X *265:8 35.7286 
+2 *265:8 *265:9 166.67 
+3 *265:9 *265:11 0.428571 
+4 *265:11 *265:13 74.0536 
+5 *265:13 *265:26 42.2411 
+6 *265:26 *265:31 9.19643 
+7 *265:31 *317:DIODE 10.2464 
+8 *265:31 *265:41 6.08929 
+9 *265:41 *265:45 0.964286 
+10 *265:45 *51964:A 9.3 
+11 *265:45 *265:57 10.5536 
+12 *265:57 *322:DIODE 10.6571 
+13 *265:57 *308:DIODE 19.6393 
+14 *265:41 *51932:A 20.7821 
+15 *265:26 *51950:A 9.46071 
+*END
+
+*D_NET *266 0.0570079
+*CONN
+*I *366:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52089:A I *D sky130_fd_sc_hd__nand2_1
+*I *383:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52061:B I *D sky130_fd_sc_hd__nand2_1
+*I *350:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52027:B I *D sky130_fd_sc_hd__nand2_1
+*I *318:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51956:C1 I *D sky130_fd_sc_hd__o211a_1
+*I *51957:A2 I *D sky130_fd_sc_hd__a211o_1
+*I *321:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51962:B I *D sky130_fd_sc_hd__nand2_2
+*I *52002:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52000:A I *D sky130_fd_sc_hd__nand2_1
+*I *345:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *343:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *319:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *359:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52120:A I *D sky130_fd_sc_hd__nand2_1
+*I *52140:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *366:DIODE 0.000293438
+2 *52089:A 0
+3 *383:DIODE 0
+4 *52061:B 0
+5 *350:DIODE 0
+6 *52027:B 2.23854e-05
+7 *318:DIODE 0
+8 *51956:C1 0.000205262
+9 *51957:A2 0
+10 *321:DIODE 0
+11 *51962:B 0
+12 *52002:A2 0.000335336
+13 *52000:A 2.23854e-05
+14 *345:DIODE 8.42557e-05
+15 *343:DIODE 9.01713e-05
+16 *319:DIODE 0.000169833
+17 *359:DIODE 0
+18 *52120:A 8.91639e-05
+19 *52140:X 0.000266957
+20 *266:128 0.000395145
+21 *266:103 0.000368479
+22 *266:101 0.000811409
+23 *266:99 0.000688396
+24 *266:97 0.000772645
+25 *266:86 0.0010763
+26 *266:80 0.00020801
+27 *266:78 0.000386571
+28 *266:74 0.000686228
+29 *266:72 0.00126244
+30 *266:64 0.0025631
+31 *266:50 0.00216293
+32 *266:40 0.000651603
+33 *266:31 0.000468187
+34 *266:29 0.000102546
+35 *266:27 0.000560691
+36 *266:12 0.000895326
+37 *266:9 0.0167199
+38 *266:8 0.0168649
+39 *366:DIODE *267:39 0
+40 *52120:A *281:134 0.000230482
+41 *266:9 *267:19 0.00044468
+42 *266:27 *52089:B 2.08464e-05
+43 *266:27 *281:134 6.82447e-05
+44 *266:27 *281:142 0.000211094
+45 *266:29 *281:134 0.000219064
+46 *266:31 *281:134 4.38128e-05
+47 *266:128 *272:118 7.92975e-05
+48 *334:DIODE *52002:A2 0.000126639
+49 *358:DIODE *266:64 5.38072e-05
+50 *51918:B *266:64 5.52302e-05
+51 *51918:B *266:72 0.000150625
+52 *51954:B *266:97 0.000151061
+53 *51956:A1 *51956:C1 9.97164e-05
+54 *51956:A1 *266:80 5.65955e-05
+55 *51956:A1 *266:86 1.10868e-05
+56 *51956:A2 *51956:C1 5.65955e-05
+57 *51957:A1 *266:86 0.000203677
+58 *51960:A *319:DIODE 6.04162e-05
+59 *51960:A *266:97 9.11365e-06
+60 *51960:B *266:97 0
+61 *51978:A2 *266:101 0.000186669
+62 *52002:B1 *345:DIODE 0
+63 *52022:B1 *266:64 0.000284441
+64 *52028:A1 *266:74 7.32173e-05
+65 *52028:B1_N *266:74 0.000212383
+66 *52029:A *266:72 5.52238e-05
+67 *52032:A *266:72 0
+68 *52033:A_N *266:74 5.52238e-05
+69 *52033:B *266:74 3.65178e-05
+70 *52033:C *266:74 5.52238e-05
+71 *52058:A *266:64 5.41609e-05
+72 *52062:A2 *266:64 0.000139907
+73 *52067:A1 *52027:B 0
+74 *52067:A1 *266:72 0
+75 *52090:B1_N *266:64 7.03295e-05
+76 *52091:B *266:40 2.69397e-05
+77 *52093:A *266:40 0
+78 *52093:B *266:40 7.83366e-05
+79 *52094:B *266:40 0
+80 *52094:B *266:50 0
+81 *52097:A *266:50 2.8266e-06
+82 *52097:B *266:50 0
+83 *52116:A1 *266:40 0
+84 *52124:A *366:DIODE 2.24646e-05
+85 *52124:A *266:12 0.000220448
+86 *52124:A *266:27 5.52238e-05
+87 *52125:B *366:DIODE 7.6644e-05
+88 *52125:B *266:27 1.21258e-05
+89 *37:10 *266:101 0.000495276
+90 *37:10 *266:128 0.000126439
+91 *59:8 *345:DIODE 0
+92 *59:8 *266:101 1.33343e-05
+93 *59:8 *266:103 0.00010096
+94 *80:5 *266:64 0.000495276
+95 *81:7 *266:64 0.000224583
+96 *82:8 *266:64 2.28598e-05
+97 *85:5 *266:72 0.000273269
+98 *86:5 *266:72 1.21289e-05
+99 *86:5 *266:74 0.000154027
+100 *87:11 *266:72 0
+101 *88:8 *266:72 0
+102 *91:8 *266:74 0.00040765
+103 *115:9 *266:64 0.000184357
+104 *144:8 *266:40 0
+105 *145:6 *266:40 0
+106 *150:9 *266:50 0
+107 *203:85 *266:64 0
+108 *212:87 *266:72 0
+109 *212:99 *266:72 0
+110 *232:60 *319:DIODE 0
+111 *232:74 *266:86 5.52302e-05
+112 *232:74 *266:97 7.24467e-05
+113 *232:80 *51956:C1 5.49489e-05
+114 *232:80 *266:97 5.66157e-05
+115 *244:10 *319:DIODE 4.16207e-05
+116 *246:11 *319:DIODE 0
+117 *247:7 *266:97 6.4443e-05
+118 *248:8 *319:DIODE 5.33882e-05
+119 *248:8 *266:97 1.08359e-05
+120 *248:17 *51956:C1 0
+121 *250:9 *266:74 6.23021e-05
+122 *250:9 *266:78 0.000170758
+123 *250:9 *266:80 7.20217e-06
+124 *255:10 *52002:A2 3.69047e-06
+125 *261:35 *52002:A2 0.000102197
+126 *265:13 *266:50 0.000447622
+*RES
+1 *52140:X *266:8 22.9786 
+2 *266:8 *266:9 256.821 
+3 *266:9 *266:12 7.35714 
+4 *266:12 *266:27 14.0893 
+5 *266:27 *266:29 2.17857 
+6 *266:29 *266:31 0.535714 
+7 *266:31 *52120:A 11.4786 
+8 *266:31 *266:40 11 
+9 *266:40 *359:DIODE 13.8 
+10 *266:40 *266:50 12.1964 
+11 *266:50 *266:64 37.125 
+12 *266:64 *266:72 20.5536 
+13 *266:72 *266:74 13.2679 
+14 *266:74 *266:78 3.42857 
+15 *266:78 *266:80 0.946429 
+16 *266:80 *266:86 7.82143 
+17 *266:86 *319:DIODE 17.5679 
+18 *266:86 *266:97 17.1607 
+19 *266:97 *266:99 0.535714 
+20 *266:99 *266:101 11.625 
+21 *266:101 *266:103 3.41071 
+22 *266:103 *343:DIODE 10.6571 
+23 *266:103 *345:DIODE 19.6393 
+24 *266:101 *52000:A 9.72857 
+25 *266:99 *266:128 10.9464 
+26 *266:128 *52002:A2 15.9964 
+27 *266:128 *51962:B 9.3 
+28 *266:97 *321:DIODE 9.3 
+29 *266:80 *51957:A2 9.3 
+30 *266:78 *51956:C1 21.7464 
+31 *266:74 *318:DIODE 9.3 
+32 *266:72 *52027:B 9.72857 
+33 *266:64 *350:DIODE 9.3 
+34 *266:50 *52061:B 9.3 
+35 *266:29 *383:DIODE 9.3 
+36 *266:27 *52089:A 9.3 
+37 *266:12 *366:DIODE 17.925 
+*END
+
+*D_NET *267 0.0610006
+*CONN
+*I *380:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *371:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *368:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52111:A I *D sky130_fd_sc_hd__and3_1
+*I *360:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52068:A I *D sky130_fd_sc_hd__nand2_1
+*I *352:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *351:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52034:B1 I *D sky130_fd_sc_hd__o211ai_1
+*I *52035:A1 I *D sky130_fd_sc_hd__a211o_1
+*I *331:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *336:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51987:B I *D sky130_fd_sc_hd__nand2_1
+*I *51982:A I *D sky130_fd_sc_hd__and2_1
+*I *52096:A I *D sky130_fd_sc_hd__nand2_1
+*I *52117:A I *D sky130_fd_sc_hd__nand4_1
+*I *52118:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *377:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52141:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *380:DIODE 0
+2 *371:DIODE 0.000340098
+3 *368:DIODE 0.000224192
+4 *52111:A 0
+5 *360:DIODE 0
+6 *52068:A 2.23854e-05
+7 *352:DIODE 0
+8 *351:DIODE 0
+9 *52034:B1 1.48516e-05
+10 *52035:A1 1.85698e-05
+11 *331:DIODE 0
+12 *336:DIODE 0.000350782
+13 *51987:B 0.000120702
+14 *51982:A 2.04856e-05
+15 *52096:A 0
+16 *52117:A 0.000192493
+17 *52118:A1 9.05901e-05
+18 *377:DIODE 0.000181045
+19 *52141:X 0
+20 *267:104 0.00179055
+21 *267:94 0.00152001
+22 *267:92 0.000759512
+23 *267:90 0.000739505
+24 *267:85 0.000533418
+25 *267:78 0.000765531
+26 *267:72 0.000935821
+27 *267:64 0.000733795
+28 *267:62 0.00109772
+29 *267:50 0.00109411
+30 *267:46 0.000192903
+31 *267:43 0.000521749
+32 *267:39 0.00136613
+33 *267:27 0.000953047
+34 *267:19 0.000338986
+35 *267:16 0.000487817
+36 *267:5 0.0183077
+37 *267:4 0.0178872
+38 *336:DIODE *51985:A 0
+39 *51982:A *272:130 5.38444e-06
+40 *52117:A *281:152 0
+41 *267:39 *281:145 0
+42 *267:39 *281:152 0
+43 *267:72 *52101:A 3.2006e-05
+44 *267:78 *52101:A 0
+45 *267:78 *268:66 5.26184e-05
+46 *267:92 *272:142 0.000173328
+47 *267:94 *272:130 2.27766e-05
+48 *267:94 *272:142 0.000315961
+49 *267:104 *272:130 7.58481e-05
+50 *349:DIODE *267:62 1.40306e-05
+51 *366:DIODE *267:39 0
+52 *378:DIODE *267:16 0
+53 *384:DIODE *267:5 5.04589e-05
+54 *385:DIODE *267:5 0.000102197
+55 *386:DIODE *267:5 0.000186662
+56 *387:DIODE *267:5 0.000126629
+57 *388:DIODE *267:5 0.000186662
+58 *399:DIODE *267:16 0.000128161
+59 *51979:A *267:104 0.000495276
+60 *51979:B *267:104 1.00073e-05
+61 *51981:B1_N *267:104 1.55885e-05
+62 *51985:B *336:DIODE 0
+63 *52034:A1 *52035:A1 3.99614e-06
+64 *52034:A1 *267:90 0.000290778
+65 *52034:A1 *267:92 5.62995e-05
+66 *52034:A2 *267:90 2.54632e-05
+67 *52034:C1 *52034:B1 1.24368e-05
+68 *52034:C1 *267:90 3.99614e-06
+69 *52035:B1 *52035:A1 5.7661e-06
+70 *52036:C *267:85 0
+71 *52037:A2 *52034:B1 5.33005e-05
+72 *52037:A2 *267:90 0.000188875
+73 *52038:A *267:85 0.000168939
+74 *52038:B *267:78 0
+75 *52064:B *267:62 0.000114665
+76 *52066:A *267:62 0.000160187
+77 *52068:B *267:72 5.71472e-05
+78 *52072:A1 *267:85 0.000135028
+79 *52072:A2 *267:85 0
+80 *52072:B1_N *267:85 5.33005e-05
+81 *52073:A *267:78 0.00010326
+82 *52079:B *267:78 0
+83 *52094:A *267:39 0
+84 *52111:C *267:43 0
+85 *52111:C *267:50 3.9991e-05
+86 *52122:A2 *52117:A 6.8646e-06
+87 *52123:A *52117:A 5.86416e-05
+88 *52123:A *267:39 4.46186e-06
+89 *52123:B *267:39 0
+90 *52123:C *267:19 2.93936e-05
+91 *52124:B *267:39 6.48957e-05
+92 *52125:B *267:39 0
+93 *52134:A *336:DIODE 0
+94 *52136:A *267:5 0.000129595
+95 *52137:A *267:5 7.77751e-05
+96 *52138:A *267:5 5.52302e-05
+97 *52139:A *267:5 5.33433e-05
+98 *52140:A *267:5 5.52302e-05
+99 *52141:A *267:5 0.000320024
+100 *52150:A *267:5 0.000142856
+101 *15:8 *267:5 3.14193e-05
+102 *38:7 *267:104 6.70624e-05
+103 *93:5 *267:90 0.00014285
+104 *123:8 *267:62 0.000144773
+105 *124:11 *267:72 0.000180962
+106 *125:9 *267:72 1.00375e-05
+107 *129:5 *267:78 0.000170955
+108 *129:5 *267:85 0.000258092
+109 *148:8 *267:39 0
+110 *153:9 *267:39 0
+111 *153:9 *267:43 1.92789e-05
+112 *154:5 *368:DIODE 0.000100161
+113 *154:5 *267:39 0
+114 *154:5 *267:43 6.72715e-05
+115 *157:12 *267:72 5.37963e-05
+116 *167:11 *267:43 0.000271352
+117 *173:5 *52118:A1 0.00014285
+118 *173:5 *267:19 6.42095e-05
+119 *176:7 *52117:A 0.000228558
+120 *180:10 *267:39 0.000305037
+121 *203:125 *267:62 0.000600754
+122 *203:131 *267:50 0.000317082
+123 *203:131 *267:62 3.53302e-05
+124 *203:137 *267:46 9.99644e-06
+125 *203:137 *267:50 3.48705e-05
+126 *212:99 *267:72 0.000178459
+127 *225:146 *52118:A1 0.000140471
+128 *225:146 *267:19 0.000482601
+129 *232:98 *52034:B1 1.54142e-05
+130 *232:98 *267:90 2.44318e-05
+131 *249:28 *267:92 0.000390851
+132 *266:9 *267:19 0.00044468
+*RES
+1 *52141:X *267:4 9.3 
+2 *267:4 *267:5 305.696 
+3 *267:5 *377:DIODE 12.3 
+4 *267:5 *267:16 13.6786 
+5 *267:16 *267:19 7.53571 
+6 *267:19 *52118:A1 11.8893 
+7 *267:19 *267:27 4.5 
+8 *267:27 *52117:A 17.925 
+9 *267:27 *267:39 20.1071 
+10 *267:39 *267:43 10.0536 
+11 *267:43 *267:46 5.03571 
+12 *267:46 *267:50 4.25 
+13 *267:50 *52096:A 9.3 
+14 *267:50 *267:62 16.1964 
+15 *267:62 *267:64 2.58929 
+16 *267:64 *267:72 18.2679 
+17 *267:72 *267:78 15.7679 
+18 *267:78 *267:85 16.3036 
+19 *267:85 *267:90 5.08929 
+20 *267:90 *267:92 11.2143 
+21 *267:92 *267:94 3.82143 
+22 *267:94 *51982:A 9.72857 
+23 *267:94 *267:104 17.3929 
+24 *267:104 *51987:B 10.9786 
+25 *267:104 *336:DIODE 24.1929 
+26 *267:92 *331:DIODE 9.3 
+27 *267:90 *52035:A1 9.72857 
+28 *267:85 *52034:B1 9.83571 
+29 *267:78 *351:DIODE 9.3 
+30 *267:72 *352:DIODE 9.3 
+31 *267:64 *52068:A 9.72857 
+32 *267:62 *360:DIODE 9.3 
+33 *267:46 *52111:A 9.3 
+34 *267:43 *368:DIODE 17.5679 
+35 *267:39 *371:DIODE 14.3714 
+36 *267:16 *380:DIODE 9.3 
+*END
+
+*D_NET *268 0.0677244
+*CONN
+*I *373:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52113:A1 I *D sky130_fd_sc_hd__a21oi_1
+*I *52114:A I *D sky130_fd_sc_hd__and3_1
+*I *361:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *370:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52101:A I *D sky130_fd_sc_hd__nand2_1
+*I *52071:A I *D sky130_fd_sc_hd__and2_1
+*I *353:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52041:A I *D sky130_fd_sc_hd__and2_1
+*I *333:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51985:A I *D sky130_fd_sc_hd__and2_2
+*I *375:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52142:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *373:DIODE 0.000183057
+2 *52113:A1 0
+3 *52114:A 0
+4 *361:DIODE 0
+5 *370:DIODE 0
+6 *52101:A 0.00014032
+7 *52071:A 0
+8 *353:DIODE 0
+9 *52041:A 0
+10 *333:DIODE 0
+11 *51985:A 0.00032091
+12 *375:DIODE 0
+13 *52142:X 0.000881432
+14 *268:78 0.00153099
+15 *268:70 0.00129953
+16 *268:66 0.000869839
+17 *268:60 0.00105914
+18 *268:52 0.000511794
+19 *268:50 0.000210285
+20 *268:48 0.00142259
+21 *268:28 0.00143059
+22 *268:24 0.000181983
+23 *268:21 0.000366777
+24 *268:12 0.000335471
+25 *268:9 0.0200812
+26 *268:8 0.0207545
+27 *51985:A *271:5 9.90431e-05
+28 *268:66 *273:11 0.00150003
+29 *268:70 *273:11 0.000404707
+30 *268:78 *271:5 0.000399508
+31 *268:78 *273:11 0.000207396
+32 *336:DIODE *51985:A 0
+33 *369:DIODE *268:48 0.00066861
+34 *374:DIODE *268:21 6.8646e-06
+35 *390:DIODE *268:8 4.79842e-05
+36 *52009:A *268:78 4.74567e-05
+37 *52037:B1 *268:60 0
+38 *52038:A *268:66 7.3237e-05
+39 *52038:B *268:66 0.000126629
+40 *52040:A2 *268:70 0
+41 *52040:A2 *268:78 0.000271345
+42 *52044:B *51985:A 0
+43 *52046:B *268:66 1.76039e-05
+44 *52048:A1 *268:66 0.00030669
+45 *52048:A1 *268:70 5.52302e-05
+46 *52048:A2 *268:66 9.90431e-05
+47 *52068:B *52101:A 5.80706e-06
+48 *52071:B *268:60 7.54096e-05
+49 *52073:A *268:66 0
+50 *52079:A *268:60 0.000268135
+51 *52080:B1 *268:48 2.07937e-05
+52 *52080:B1 *268:50 0.000127353
+53 *52080:B1 *268:52 8.90314e-05
+54 *52080:B1 *268:60 3.67142e-05
+55 *52100:B *268:48 0.00010096
+56 *52103:A *268:48 0.000120577
+57 *52103:C *268:48 0.00036192
+58 *52113:A2 *268:21 2.30314e-05
+59 *52113:B1 *268:24 5.7661e-06
+60 *52113:B1 *268:28 0.000162236
+61 *52115:A *373:DIODE 3.48705e-05
+62 *52115:B *373:DIODE 7.17235e-05
+63 *52115:B *268:24 6.42095e-05
+64 *52115:B *268:28 0.000315158
+65 *52126:A *268:48 0.000410264
+66 *43:11 *268:78 0.000260954
+67 *66:8 *51985:A 0
+68 *98:7 *268:70 5.91367e-05
+69 *98:7 *268:78 0.000484524
+70 *99:7 *268:66 3.9846e-05
+71 *99:7 *268:70 9.61455e-05
+72 *101:8 *268:66 0
+73 *105:7 *268:66 0.000179337
+74 *123:8 *268:48 0
+75 *126:7 *268:48 8.3725e-05
+76 *154:5 *268:48 0
+77 *156:5 *268:48 5.91367e-05
+78 *157:12 *268:48 0.000578035
+79 *167:11 *268:28 5.31127e-05
+80 *167:11 *268:48 0.000113698
+81 *170:13 *373:DIODE 0.000186669
+82 *170:13 *268:24 0.000140933
+83 *170:13 *268:28 2.28499e-05
+84 *180:10 *268:48 9.91086e-05
+85 *203:137 *268:28 3.69047e-06
+86 *203:137 *268:48 1.97756e-05
+87 *203:147 *268:28 3.67257e-05
+88 *203:156 *268:21 1.02969e-05
+89 *203:156 *268:28 3.48705e-05
+90 *265:9 *268:9 0.00535307
+91 *265:13 *268:9 0.00151845
+92 *267:72 *52101:A 3.2006e-05
+93 *267:78 *52101:A 0
+94 *267:78 *268:66 5.26184e-05
+*RES
+1 *52142:X *268:8 34.8179 
+2 *268:8 *268:9 352.518 
+3 *268:9 *268:12 8.26786 
+4 *268:12 *375:DIODE 13.8 
+5 *268:12 *268:21 6.75 
+6 *268:21 *268:24 1.78571 
+7 *268:24 *268:28 5.07143 
+8 *268:28 *268:48 46.25 
+9 *268:48 *268:50 3 
+10 *268:50 *268:52 2.17857 
+11 *268:52 *268:60 6.33929 
+12 *268:60 *268:66 32.1429 
+13 *268:66 *268:70 4.25 
+14 *268:70 *268:78 21.6429 
+15 *268:78 *51985:A 23.6214 
+16 *268:78 *333:DIODE 9.3 
+17 *268:70 *52041:A 9.3 
+18 *268:66 *353:DIODE 9.3 
+19 *268:60 *52071:A 9.3 
+20 *268:52 *52101:A 20.8536 
+21 *268:50 *370:DIODE 9.3 
+22 *268:48 *361:DIODE 9.3 
+23 *268:28 *52114:A 9.3 
+24 *268:24 *52113:A1 9.3 
+25 *268:21 *373:DIODE 13.5321 
+*END
+
+*D_NET *269 0.0877259
+*CONN
+*I *52151:A I *D sky130_fd_sc_hd__buf_2
+*I *400:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52132:X O *D sky130_fd_sc_hd__buf_6
+*CAP
+1 *52151:A 0.000211061
+2 *400:DIODE 0
+3 *52132:X 0
+4 *269:14 0.000314272
+5 *269:9 0.0125549
+6 *269:8 0.0124517
+7 *269:6 0.0259465
+8 *269:5 0.0259465
+9 *269:9 *270:9 0.010301
+*RES
+1 *52132:X *269:5 13.8 
+2 *269:5 *269:6 478.25 
+3 *269:6 *269:8 4.5 
+4 *269:8 *269:9 275.304 
+5 *269:9 *269:14 10.6429 
+6 *269:14 *400:DIODE 9.3 
+7 *269:14 *52151:A 12.925 
+*END
+
+*D_NET *270 0.0880166
+*CONN
+*I *52152:A I *D sky130_fd_sc_hd__buf_2
+*I *401:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52134:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52152:A 0.000285519
+2 *401:DIODE 0
+3 *52134:Y 0
+4 *270:15 0.000522967
+5 *270:9 0.0125641
+6 *270:8 0.0123267
+7 *270:6 0.0260082
+8 *270:5 0.0260082
+9 *52132:A *270:6 0
+10 *52133:A *270:6 0
+11 *269:9 *270:9 0.010301
+*RES
+1 *52134:Y *270:5 13.8 
+2 *270:5 *270:6 479.464 
+3 *270:6 *270:8 4.5 
+4 *270:8 *270:9 180.018 
+5 *270:9 *270:15 11.8036 
+6 *270:15 *401:DIODE 9.3 
+7 *270:15 *52152:A 14.1571 
+*END
+
+*D_NET *271 0.0651371
+*CONN
+*I *52153:A I *D sky130_fd_sc_hd__buf_2
+*I *402:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52009:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52153:A 0.000188
+2 *402:DIODE 0
+3 *52009:X 0.00615074
+4 *271:8 0.0261409
+5 *271:7 0.0259529
+6 *271:5 0.00615074
+7 p[2] *52153:A 0
+8 *51985:A *271:5 9.90431e-05
+9 *52133:A *271:5 5.52302e-05
+10 *268:78 *271:5 0.000399508
+*RES
+1 *52009:X *271:5 96.5804 
+2 *271:5 *271:7 4.5 
+3 *271:7 *271:8 478.25 
+4 *271:8 *402:DIODE 13.8 
+5 *271:8 *52153:A 17.0143 
+*END
+
+*D_NET *272 0.0636693
+*CONN
+*I *51970:A I *D sky130_fd_sc_hd__nand2_1
+*I *51991:A1 I *D sky130_fd_sc_hd__a22o_1
+*I *51967:A I *D sky130_fd_sc_hd__and4_1
+*I *337:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *330:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *332:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *354:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52041:B I *D sky130_fd_sc_hd__and2_1
+*I *51982:B I *D sky130_fd_sc_hd__and2_1
+*I *51962:A I *D sky130_fd_sc_hd__nand2_2
+*I *320:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51964:B I *D sky130_fd_sc_hd__nand2_1
+*I *51977:B I *D sky130_fd_sc_hd__and3_1
+*I *323:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51966:B I *D sky130_fd_sc_hd__nand2_1
+*I *325:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *328:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *326:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52143:X O *D sky130_fd_sc_hd__buf_4
+*CAP
+1 *51970:A 0
+2 *51991:A1 0.000415336
+3 *51967:A 3.17699e-05
+4 *337:DIODE 0
+5 *330:DIODE 4.96296e-05
+6 *332:DIODE 8.40104e-05
+7 *354:DIODE 0.000217718
+8 *52041:B 0
+9 *51982:B 0
+10 *51962:A 0
+11 *320:DIODE 0.000154699
+12 *51964:B 0
+13 *51977:B 0
+14 *323:DIODE 0
+15 *51966:B 0
+16 *325:DIODE 4.00453e-05
+17 *328:DIODE 0
+18 *326:DIODE 0
+19 *52143:X 0
+20 *272:188 0.00132813
+21 *272:178 0.00122159
+22 *272:145 0.000404816
+23 *272:142 0.000699441
+24 *272:130 0.00158638
+25 *272:118 0.00141843
+26 *272:108 0.000552103
+27 *272:100 0.000817715
+28 *272:92 0.00105826
+29 *272:86 0.000480203
+30 *272:83 0.000517239
+31 *272:74 0.000802712
+32 *272:65 0.000605296
+33 *272:56 0.000409726
+34 *272:52 0.000473587
+35 *272:47 0.000743476
+36 *272:41 0.000518156
+37 *272:37 0.002097
+38 *272:34 0.00203286
+39 *272:25 0.00234702
+40 *272:24 0.00222017
+41 *272:15 0.00219587
+42 *272:14 0.00219109
+43 *272:5 0.00565768
+44 *272:4 0.00554682
+45 *51991:A1 *280:37 2.14757e-05
+46 *272:5 *278:7 0.00139455
+47 *272:5 *278:9 0.0020049
+48 *272:15 *278:9 0.00499952
+49 *272:25 *278:9 0.00513752
+50 *272:25 *279:5 2.14658e-05
+51 *272:37 *278:24 0.00425872
+52 *272:37 *279:5 2.14757e-05
+53 *272:41 *278:24 0.00014576
+54 *272:41 *278:34 0.000247643
+55 *272:41 *278:37 0
+56 *272:47 *278:34 0.000119193
+57 *272:52 *278:37 0
+58 *272:52 *278:47 0
+59 *272:56 *278:47 7.83587e-05
+60 *272:188 *51967:C 6.59118e-05
+61 *313:DIODE *272:52 0
+62 *317:DIODE *272:108 2.89016e-05
+63 *322:DIODE *272:92 0.00014285
+64 *324:DIODE *272:74 0.000537165
+65 *393:DIODE *272:5 0.000186662
+66 *395:DIODE *272:24 2.01732e-05
+67 *396:DIODE *272:25 0.000144773
+68 *51949:B1 *320:DIODE 0
+69 *51958:B_N *272:142 4.46186e-06
+70 *51967:B *51991:A1 9.90367e-05
+71 *51970:B *272:188 0.00042063
+72 *51971:A0 *272:188 1.15172e-05
+73 *51975:A2 *272:83 0.000107035
+74 *51977:C *272:83 0
+75 *51979:A *272:130 5.30209e-05
+76 *51979:B *272:130 0.000271352
+77 *51981:B1_N *272:118 0
+78 *51981:B1_N *272:130 0
+79 *51982:A *272:130 5.38444e-06
+80 *51991:B1 *51991:A1 5.52238e-05
+81 *51991:B2 *51967:A 2.01359e-05
+82 *52040:A1 *354:DIODE 0
+83 *52040:A1 *272:145 4.80729e-05
+84 *52040:A2 *272:145 5.62914e-05
+85 *52048:A1 *354:DIODE 0
+86 *52048:A1 *272:145 0
+87 *52144:A *272:5 4.27935e-05
+88 *52145:A *272:5 0.000318107
+89 *52146:A *272:15 5.49544e-05
+90 *37:10 *272:130 2.50556e-05
+91 *38:7 *272:130 0.000230482
+92 *40:8 *272:142 0
+93 *42:6 *272:145 7.80968e-05
+94 *51:8 *51991:A1 8.23597e-06
+95 *103:5 *354:DIODE 0.00014285
+96 *225:23 *272:86 4.0552e-05
+97 *225:23 *272:92 7.54972e-05
+98 *225:58 *320:DIODE 5.76121e-05
+99 *252:8 *272:142 0
+100 *252:8 *272:145 0.000277524
+101 *255:10 *272:130 7.83659e-05
+102 *256:8 *320:DIODE 0.00014285
+103 *259:20 *272:83 0
+104 *260:8 *272:188 2.92126e-05
+105 *261:16 *272:83 7.60306e-05
+106 *261:66 *272:83 8.91726e-05
+107 *261:76 *330:DIODE 3.57844e-05
+108 *261:76 *272:83 0.000179363
+109 *262:56 *51967:A 1.26352e-05
+110 *262:56 *51991:A1 0
+111 *265:41 *272:100 1.00073e-05
+112 *265:41 *272:108 0.000449539
+113 *265:45 *272:100 1.57625e-05
+114 *265:57 *272:92 0.000186669
+115 *265:57 *272:100 0.000696736
+116 *266:128 *272:118 7.92975e-05
+117 *267:92 *272:142 0.000173328
+118 *267:94 *272:130 2.27766e-05
+119 *267:94 *272:142 0.000315961
+120 *267:104 *272:130 7.58481e-05
+*RES
+1 *52143:X *272:4 9.3 
+2 *272:4 *272:5 101.571 
+3 *272:5 *272:14 10.5 
+4 *272:14 *272:15 46.9464 
+5 *272:15 *272:24 10.5 
+6 *272:24 *272:25 48.5893 
+7 *272:25 *272:34 11.3214 
+8 *272:34 *272:37 44.875 
+9 *272:37 *272:41 11.1429 
+10 *272:41 *326:DIODE 9.3 
+11 *272:41 *272:47 4.23214 
+12 *272:47 *272:52 12.4643 
+13 *272:52 *272:56 8.82143 
+14 *272:56 *328:DIODE 13.8 
+15 *272:56 *272:65 6.75 
+16 *272:65 *325:DIODE 9.83571 
+17 *272:65 *272:74 8.35714 
+18 *272:74 *51966:B 9.3 
+19 *272:74 *272:83 13.4643 
+20 *272:83 *272:86 5.85714 
+21 *272:86 *323:DIODE 9.3 
+22 *272:86 *272:92 5.46429 
+23 *272:92 *51977:B 9.3 
+24 *272:92 *272:100 9.78571 
+25 *272:100 *51964:B 9.3 
+26 *272:100 *272:108 8.73214 
+27 *272:108 *320:DIODE 17.1036 
+28 *272:108 *272:118 4.98214 
+29 *272:118 *51962:A 13.8 
+30 *272:118 *272:130 21.1607 
+31 *272:130 *51982:B 9.3 
+32 *272:130 *272:142 17.0536 
+33 *272:142 *272:145 10.0893 
+34 *272:145 *52041:B 13.8 
+35 *272:145 *354:DIODE 17.1036 
+36 *272:142 *332:DIODE 10.2464 
+37 *272:83 *330:DIODE 14.8357 
+38 *272:52 *337:DIODE 9.3 
+39 *272:47 *272:178 5.46429 
+40 *272:178 *272:188 14.8645 
+41 *272:188 *51967:A 17.7904 
+42 *272:188 *51991:A1 19.1131 
+43 *272:178 *51970:A 9.3 
+*END
+
+*D_NET *273 0.0584097
+*CONN
+*I *403:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52154:A I *D sky130_fd_sc_hd__buf_2
+*I *52046:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *403:DIODE 0.000135031
+2 *52154:A 0
+3 *52046:Y 0.00195319
+4 *273:14 0.000135031
+5 *273:12 0.0259165
+6 *273:11 0.0278697
+7 p[3] *273:12 3.40128e-05
+8 *52009:A *273:11 1.92789e-05
+9 *52040:A2 *273:11 0.00013177
+10 *52045:A2 *273:12 0
+11 *52045:B1 *273:12 0
+12 *43:11 *273:11 0.000103004
+13 *268:66 *273:11 0.00150003
+14 *268:70 *273:11 0.000404707
+15 *268:78 *273:11 0.000207396
+*RES
+1 *52046:Y *273:11 47.3357 
+2 *273:11 *273:12 477.946 
+3 *273:12 *273:14 4.5 
+4 *273:14 *52154:A 9.3 
+5 *273:14 *403:DIODE 11.4786 
+*END
+
+*D_NET *274 0.0607598
+*CONN
+*I *52155:A I *D sky130_fd_sc_hd__buf_2
+*I *404:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52078:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52155:A 0.000154034
+2 *404:DIODE 0
+3 *52078:Y 0
+4 *274:9 0.0038385
+5 *274:8 0.00368447
+6 *274:6 0.0257935
+7 *274:5 0.0257935
+8 *52155:A *275:18 0.000271842
+9 *274:9 *275:18 0.00112171
+10 p[4] *52155:A 0.000102207
+11 *52078:B *274:6 0
+*RES
+1 *52078:Y *274:5 13.8 
+2 *274:5 *274:6 475.518 
+3 *274:6 *274:8 4.5 
+4 *274:8 *274:9 47.7679 
+5 *274:9 *404:DIODE 9.3 
+6 *274:9 *52155:A 13.4607 
+*END
+
+*D_NET *275 0.0673646
+*CONN
+*I *52156:A I *D sky130_fd_sc_hd__buf_2
+*I *405:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52107:X O *D sky130_fd_sc_hd__xor2_4
+*CAP
+1 *52156:A 0.00012614
+2 *405:DIODE 0
+3 *52107:X 0
+4 *275:20 0.00537273
+5 *275:18 0.00700451
+6 *275:5 0.0275492
+7 *275:4 0.0257912
+8 *275:5 *276:6 0
+9 p[4] *275:18 6.9276e-05
+10 *52128:A *275:5 0
+11 *52128:B *275:5 5.80217e-05
+12 *52155:A *275:18 0.000271842
+13 *274:9 *275:18 0.00112171
+*RES
+1 *52107:X *275:4 4.5 
+2 *275:4 *275:5 475.821 
+3 *275:5 *275:18 43.2232 
+4 *275:18 *275:20 88.2232 
+5 *275:20 *405:DIODE 9.3 
+6 *275:20 *52156:A 11.4786 
+*END
+
+*D_NET *276 0.089581
+*CONN
+*I *52157:A I *D sky130_fd_sc_hd__buf_2
+*I *406:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52128:Y O *D sky130_fd_sc_hd__xnor2_4
+*CAP
+1 *52157:A 0.000251559
+2 *406:DIODE 0
+3 *52128:Y 0
+4 *276:9 0.0192902
+5 *276:8 0.0190387
+6 *276:6 0.0254833
+7 *276:5 0.0254833
+8 p[6] *52157:A 3.40128e-05
+9 *275:5 *276:6 0
+*RES
+1 *52128:Y *276:5 13.8 
+2 *276:5 *276:6 469.75 
+3 *276:6 *276:8 4.5 
+4 *276:8 *276:9 222.732 
+5 *276:9 *406:DIODE 9.3 
+6 *276:9 *52157:A 22.7107 
+*END
+
+*D_NET *277 0.0960015
+*CONN
+*I *52158:A I *D sky130_fd_sc_hd__buf_2
+*I *407:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52129:X O *D sky130_fd_sc_hd__a21o_4
+*CAP
+1 *52158:A 0.000202387
+2 *407:DIODE 0
+3 *52129:X 0
+4 *277:8 0.0266692
+5 *277:7 0.0264668
+6 *277:5 0.0211704
+7 *277:4 0.0211704
+8 p[7] *52158:A 0.000124175
+9 *374:DIODE *277:5 0.000142856
+10 *170:13 *277:5 5.52238e-05
+*RES
+1 *52129:X *277:4 9.3 
+2 *277:4 *277:5 327.054 
+3 *277:5 *277:7 4.5 
+4 *277:7 *277:8 487.964 
+5 *277:8 *407:DIODE 13.8 
+6 *277:8 *52158:A 17.8357 
+*END
+
+*D_NET *278 0.0504732
+*CONN
+*I *314:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51941:B I *D sky130_fd_sc_hd__and4_1
+*I *51939:A I *D sky130_fd_sc_hd__buf_2
+*I *51944:A I *D sky130_fd_sc_hd__nand2_1
+*I *51967:C I *D sky130_fd_sc_hd__and4_1
+*I *316:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *327:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *311:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52144:X O *D sky130_fd_sc_hd__buf_2
+*CAP
+1 *314:DIODE 0
+2 *51941:B 0.000140425
+3 *51939:A 0
+4 *51944:A 0
+5 *51967:C 0.000308531
+6 *316:DIODE 0
+7 *327:DIODE 0
+8 *311:DIODE 0
+9 *52144:X 0.00165204
+10 *278:81 0.000434129
+11 *278:70 0.00110332
+12 *278:56 0.00166218
+13 *278:47 0.00107935
+14 *278:37 0.000680961
+15 *278:34 0.000447434
+16 *278:24 0.000899101
+17 *278:20 0.000883549
+18 *278:9 0.00213832
+19 *278:7 0.00350411
+20 *51941:B *281:47 1.5424e-05
+21 *51967:C *280:37 0.000280852
+22 *278:9 *279:5 0.0101655
+23 *278:20 *280:5 0.000272371
+24 *278:24 *279:5 0.00429767
+25 *278:24 *281:8 0
+26 *278:34 *281:8 0
+27 *278:70 *279:31 6.13757e-06
+28 *278:81 *280:37 7.6644e-05
+29 *285:DIODE *278:34 0
+30 *339:DIODE *278:47 7.03103e-05
+31 *339:DIODE *278:56 8.35655e-05
+32 *51941:A *51941:B 5.52302e-05
+33 *51944:B *278:70 5.7661e-06
+34 *51945:A0 *278:70 1.74352e-05
+35 *51945:A0 *278:81 5.52238e-05
+36 *51971:A0 *51967:C 0.000175519
+37 *51971:A1 *278:70 0.000349689
+38 *51971:S *51967:C 2.7814e-05
+39 *51992:A1 *278:81 8.5662e-05
+40 *51994:A *51967:C 0.000128205
+41 *51994:A *278:56 3.34687e-05
+42 *51996:A1 *278:70 7.32272e-05
+43 *52145:A *278:9 2.44318e-05
+44 *52146:A *278:9 2.41665e-05
+45 *31:8 *51967:C 2.58997e-05
+46 *31:8 *278:56 3.69697e-05
+47 *51:8 *278:81 0
+48 *183:15 *51941:B 0.000230475
+49 *189:45 *51941:B 0.00018372
+50 *189:45 *278:81 0
+51 *192:31 *278:70 7.49387e-06
+52 *192:37 *278:81 2.74584e-05
+53 *207:19 *278:56 0.00010107
+54 *207:21 *278:56 1.32552e-05
+55 *234:8 *51941:B 6.87476e-05
+56 *260:8 *51967:C 3.68864e-05
+57 *261:16 *51967:C 0
+58 *262:56 *51967:C 3.14078e-05
+59 *272:5 *278:7 0.00139455
+60 *272:5 *278:9 0.0020049
+61 *272:15 *278:9 0.00499952
+62 *272:25 *278:9 0.00513752
+63 *272:37 *278:24 0.00425872
+64 *272:41 *278:24 0.00014576
+65 *272:41 *278:34 0.000247643
+66 *272:41 *278:37 0
+67 *272:47 *278:34 0.000119193
+68 *272:52 *278:37 0
+69 *272:52 *278:47 0
+70 *272:56 *278:47 7.83587e-05
+71 *272:188 *51967:C 6.59118e-05
+*RES
+1 *52144:X *278:7 43.2196 
+2 *278:7 *278:9 115.33 
+3 *278:9 *278:20 22.6607 
+4 *278:20 *278:24 46.8214 
+5 *278:24 *311:DIODE 13.8 
+6 *278:24 *278:34 10.0536 
+7 *278:34 *278:37 7.05357 
+8 *278:37 *327:DIODE 13.8 
+9 *278:37 *278:47 12.1071 
+10 *278:47 *316:DIODE 9.3 
+11 *278:47 *278:56 12.2321 
+12 *278:56 *51967:C 22.3893 
+13 *278:56 *278:70 15.625 
+14 *278:70 *51944:A 9.3 
+15 *278:70 *278:81 14.5179 
+16 *278:81 *51939:A 9.3 
+17 *278:81 *51941:B 13.5321 
+18 *278:34 *314:DIODE 9.3 
+*END
+
+*D_NET *279 0.0388482
+*CONN
+*I *51919:A I *D sky130_fd_sc_hd__buf_2
+*I *51921:C I *D sky130_fd_sc_hd__and4_1
+*I *303:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *300:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52145:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *51919:A 0
+2 *51921:C 0.000294641
+3 *303:DIODE 0
+4 *300:DIODE 0
+5 *52145:X 0
+6 *279:31 0.00191348
+7 *279:22 0.00193422
+8 *279:12 0.000651413
+9 *279:5 0.00337215
+10 *279:4 0.00303612
+11 *51921:C *51921:B 5.52302e-05
+12 *51921:C *281:206 0
+13 *279:5 *293:DIODE 0.000175251
+14 *279:5 *280:5 0.0101636
+15 *279:5 *280:11 8.76257e-05
+16 *279:12 *280:14 0
+17 *279:31 *281:206 0
+18 *313:DIODE *279:12 0.000134758
+19 *313:DIODE *279:22 3.57844e-05
+20 *396:DIODE *279:5 1.39726e-05
+21 *397:DIODE *279:5 0.000801966
+22 *51968:B2 *51921:C 0.000112418
+23 *51969:B *51921:C 0
+24 *51971:A1 *279:31 0.000424341
+25 *52147:A *279:5 7.11313e-05
+26 *55:10 *279:31 5.71472e-05
+27 *189:31 *51921:C 4.46186e-06
+28 *192:27 *279:31 0.000192489
+29 *192:31 *279:31 0.00044366
+30 *193:38 *279:31 2.34204e-05
+31 *212:12 *51921:C 4.94362e-05
+32 *212:12 *279:31 7.79781e-06
+33 *234:17 *279:31 0
+34 *261:16 *279:12 0
+35 *261:16 *279:22 0
+36 *262:15 *51921:C 4.87953e-05
+37 *262:17 *51921:C 2.89016e-05
+38 *262:26 *51921:C 0.000164835
+39 *262:61 *279:12 3.69697e-05
+40 *263:42 *51921:C 0
+41 *272:25 *279:5 2.14658e-05
+42 *272:37 *279:5 2.14757e-05
+43 *278:9 *279:5 0.0101655
+44 *278:24 *279:5 0.00429767
+45 *278:70 *279:31 6.13757e-06
+*RES
+1 *52145:X *279:4 9.3 
+2 *279:4 *279:5 145.929 
+3 *279:5 *279:12 10.75 
+4 *279:12 *300:DIODE 13.8 
+5 *279:12 *279:22 8.53571 
+6 *279:22 *303:DIODE 9.3 
+7 *279:22 *279:31 26.6964 
+8 *279:31 *51921:C 20.2821 
+9 *279:31 *51919:A 13.8 
+*END
+
+*D_NET *280 0.0306994
+*CONN
+*I *293:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *304:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51921:D I *D sky130_fd_sc_hd__and4_1
+*I *51906:C I *D sky130_fd_sc_hd__and4_1
+*I *51910:A I *D sky130_fd_sc_hd__buf_2
+*I *51922:A2 I *D sky130_fd_sc_hd__a22oi_1
+*I *290:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *305:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52146:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *293:DIODE 7.93923e-05
+2 *304:DIODE 0.000115074
+3 *51921:D 0
+4 *51906:C 4.97661e-05
+5 *51910:A 4.00246e-05
+6 *51922:A2 0
+7 *290:DIODE 0
+8 *305:DIODE 0
+9 *52146:X 0
+10 *280:49 0.000135232
+11 *280:43 0.000235352
+12 *280:38 0.000128309
+13 *280:37 0.00173288
+14 *280:17 0.00186925
+15 *280:14 0.000410719
+16 *280:11 0.000243943
+17 *280:5 0.00282993
+18 *280:4 0.00278672
+19 *51906:C *51906:D 3.57366e-05
+20 *51906:C *51921:B 7.77751e-05
+21 *51906:C *281:63 0.000106694
+22 *51906:C *284:28 2.44318e-05
+23 *280:5 *281:8 0.00451763
+24 *280:17 *281:17 0.000227539
+25 *280:17 *281:29 0.000358971
+26 *280:37 *281:29 0.000478999
+27 *280:43 *51921:B 0.000148105
+28 *280:49 *281:63 7.83174e-05
+29 *285:DIODE *304:DIODE 0
+30 *285:DIODE *280:14 0
+31 *313:DIODE *304:DIODE 0
+32 *51923:B *51910:A 0.000269124
+33 *51923:B *280:49 1.46576e-05
+34 *51967:B *280:37 0.000135136
+35 *51967:C *280:37 0.000280852
+36 *51967:D *280:37 3.23542e-05
+37 *51969:A *280:37 2.28598e-05
+38 *51969:B *280:37 5.52238e-05
+39 *51991:A1 *280:37 2.14757e-05
+40 *51991:B1 *280:37 0.000227532
+41 *51991:B2 *280:37 0.000142611
+42 *51992:A1 *280:37 7.83659e-05
+43 *183:15 *280:37 3.98517e-05
+44 *183:51 *51910:A 0.000257553
+45 *183:51 *280:49 1.57155e-05
+46 *193:38 *280:37 1.09495e-05
+47 *212:12 *280:37 8.37335e-05
+48 *212:29 *280:37 4.51526e-05
+49 *214:6 *280:38 3.92757e-05
+50 *214:6 *280:43 5.80706e-06
+51 *232:50 *280:38 3.34687e-05
+52 *232:50 *280:43 4.15914e-05
+53 *232:50 *280:49 0
+54 *260:8 *280:37 3.47641e-06
+55 *262:14 *280:49 0.000168939
+56 *262:15 *51906:C 4.08637e-05
+57 *262:15 *280:43 0.000274288
+58 *262:56 *280:37 0.000421083
+59 *262:61 *280:14 0
+60 *262:64 *280:17 0.000184745
+61 *263:42 *280:37 0.000266479
+62 *278:20 *280:5 0.000272371
+63 *278:81 *280:37 7.6644e-05
+64 *279:5 *293:DIODE 0.000175251
+65 *279:5 *280:5 0.0101636
+66 *279:5 *280:11 8.76257e-05
+67 *279:12 *280:14 0
+*RES
+1 *52146:X *280:4 9.3 
+2 *280:4 *280:5 95.4107 
+3 *280:5 *305:DIODE 9.3 
+4 *280:5 *280:11 0.946429 
+5 *280:11 *280:14 6.44643 
+6 *280:14 *280:17 9.96429 
+7 *280:17 *290:DIODE 9.3 
+8 *280:17 *280:37 49.5893 
+9 *280:37 *280:38 1.03571 
+10 *280:38 *280:43 8.125 
+11 *280:43 *280:49 11.7009 
+12 *280:49 *51922:A2 9.3 
+13 *280:49 *51910:A 11.867 
+14 *280:43 *51906:C 11.4964 
+15 *280:38 *51921:D 13.8 
+16 *280:14 *304:DIODE 15.7464 
+17 *280:11 *293:DIODE 11.0679 
+*END
+
+*D_NET *281 0.0389076
+*CONN
+*I *292:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *288:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *51922:B1 I *D sky130_fd_sc_hd__a22oi_1
+*I *51906:D I *D sky130_fd_sc_hd__and4_1
+*I *347:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *367:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52118:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *52117:C I *D sky130_fd_sc_hd__nand4_1
+*I *379:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *381:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52089:B I *D sky130_fd_sc_hd__nand2_1
+*I *52055:B I *D sky130_fd_sc_hd__nand2_1
+*I *357:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52015:B I *D sky130_fd_sc_hd__nand2_1
+*I *51903:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *51901:C I *D sky130_fd_sc_hd__and3_1
+*I *51908:A2 I *D sky130_fd_sc_hd__a22o_1
+*I *287:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *291:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *306:DIODE I *D sky130_fd_sc_hd__diode_2
+*I *52147:X O *D sky130_fd_sc_hd__clkbuf_4
+*CAP
+1 *292:DIODE 0.000558354
+2 *288:DIODE 0
+3 *51922:B1 0
+4 *51906:D 2.67497e-05
+5 *347:DIODE 0.000202608
+6 *367:DIODE 0
+7 *52118:A2 0
+8 *52117:C 0
+9 *379:DIODE 0.000427951
+10 *381:DIODE 0
+11 *52089:B 1.7586e-05
+12 *52055:B 2.23854e-05
+13 *357:DIODE 0
+14 *52015:B 2.03441e-05
+15 *51903:A2 1.91209e-05
+16 *51901:C 0.000156157
+17 *51908:A2 5.16112e-05
+18 *287:DIODE 0
+19 *291:DIODE 0
+20 *306:DIODE 0
+21 *52147:X 0
+22 *281:206 0.000740852
+23 *281:162 0.000642305
+24 *281:152 0.000423311
+25 *281:145 0.000356892
+26 *281:142 0.000231706
+27 *281:134 0.000458407
+28 *281:126 0.000534034
+29 *281:118 0.000201876
+30 *281:115 0.000596056
+31 *281:104 0.00103498
+32 *281:96 0.00158743
+33 *281:79 0.00120944
+34 *281:67 0.000979927
+35 *281:63 0.00116128
+36 *281:53 0.000525368
+37 *281:47 0.00120762
+38 *281:29 0.00129186
+39 *281:17 0.00066012
+40 *281:11 0.000271068
+41 *281:8 0.00288788
+42 *281:4 0.00284448
+43 *51901:C *284:12 0
+44 *51901:C *284:28 0
+45 *51906:D *284:28 0
+46 *51908:A2 *284:28 4.9071e-05
+47 *281:29 *282:10 0.000363837
+48 *281:47 *282:10 0.000131439
+49 *281:63 *284:28 1.74352e-05
+50 *281:67 *284:28 0.00036072
+51 *281:96 *51897:B 8.43535e-06
+52 *281:96 *282:18 0
+53 *281:96 *283:11 0.000200914
+54 *281:96 *284:28 0
+55 *281:104 *283:11 2.89016e-05
+56 *281:162 *52117:D 5.52302e-05
+57 *285:DIODE *281:8 0.000101545
+58 *285:DIODE *281:11 6.05161e-06
+59 *285:DIODE *281:17 0.000126639
+60 *315:DIODE *292:DIODE 0.000578035
+61 *365:DIODE *281:115 0
+62 *365:DIODE *281:126 0.00049041
+63 *365:DIODE *281:134 0.000217141
+64 *51893:A *281:53 7.50601e-05
+65 *51893:A *281:63 0
+66 *51893:A *281:206 1.52978e-05
+67 *51897:A *51901:C 3.03221e-06
+68 *51897:A *281:96 0.000400867
+69 *51906:C *51906:D 3.57366e-05
+70 *51906:C *281:63 0.000106694
+71 *51909:B1_N *281:96 0
+72 *51914:A *292:DIODE 7.50601e-05
+73 *51921:C *281:206 0
+74 *51922:B2 *281:53 5.71472e-05
+75 *51941:B *281:47 1.5424e-05
+76 *51967:B *281:47 0.000227539
+77 *51992:B1 *281:47 5.52302e-05
+78 *52010:A *51908:A2 5.71472e-05
+79 *52010:A *281:79 6.30173e-05
+80 *52014:B *281:104 0.000114577
+81 *52054:A *281:115 0.000274294
+82 *52054:B *281:115 3.17163e-05
+83 *52055:A *281:126 0.000219064
+84 *52088:A *281:162 0
+85 *52117:A *281:152 0
+86 *52117:B *281:152 0
+87 *52120:A *281:134 0.000230482
+88 *52120:B *281:134 0.000274294
+89 *52121:B *281:134 9.7659e-05
+90 *51:8 *281:47 0
+91 *111:6 *347:DIODE 0.000196269
+92 *111:6 *281:115 0.000101545
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+95 *183:7 *281:53 1.33343e-05
+96 *183:15 *281:47 0.00051499
+97 *183:45 *281:53 0.00040765
+98 *183:88 *51901:C 6.47668e-05
+99 *187:15 *281:96 8.86512e-05
+100 *189:15 *281:53 9.99644e-06
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+104 *190:10 *281:96 5.52302e-05
+105 *193:38 *292:DIODE 8.77116e-05
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+111 *203:69 *281:134 0.000105163
+112 *207:73 *281:104 0.000269662
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+114 *207:89 *52015:B 5.7661e-06
+115 *207:89 *281:104 3.48705e-05
+116 *207:89 *281:115 7.44397e-05
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+123 *232:50 *292:DIODE 8.77116e-05
+124 *232:50 *281:63 0
+125 *232:50 *281:206 0.000124293
+126 *239:6 *292:DIODE 0
+127 *262:14 *281:63 7.80714e-06
+128 *262:15 *281:63 0.000137983
+129 *262:26 *281:47 0.000569201
+130 *262:56 *281:29 0.000230475
+131 *262:56 *281:47 0
+132 *262:61 *281:17 5.52302e-05
+133 *262:61 *281:29 0.000607494
+134 *262:64 *281:17 3.9846e-05
+135 *263:42 *281:53 9.91086e-05
+136 *263:42 *281:206 0.000209483
+137 *266:27 *52089:B 2.08464e-05
+138 *266:27 *281:134 6.82447e-05
+139 *266:27 *281:142 0.000211094
+140 *266:29 *281:134 0.000219064
+141 *266:31 *281:134 4.38128e-05
+142 *267:39 *281:145 0
+143 *267:39 *281:152 0
+144 *278:24 *281:8 0
+145 *278:34 *281:8 0
+146 *279:31 *281:206 0
+147 *280:5 *281:8 0.00451763
+148 *280:17 *281:17 0.000227539
+149 *280:17 *281:29 0.000358971
+150 *280:37 *281:29 0.000478999
+151 *280:49 *281:63 7.83174e-05
+*RES
+1 *52147:X *281:4 9.3 
+2 *281:4 *281:8 48.2679 
+3 *281:8 *281:11 5.03571 
+4 *281:11 *306:DIODE 9.3 
+5 *281:11 *281:17 5.05357 
+6 *281:17 *291:DIODE 9.3 
+7 *281:17 *281:29 21.6786 
+8 *281:29 *287:DIODE 9.3 
+9 *281:29 *281:47 30.4286 
+10 *281:47 *281:53 10.6964 
+11 *281:53 *281:63 14.8036 
+12 *281:63 *281:67 10.8214 
+13 *281:67 *51908:A2 10.8714 
+14 *281:67 *281:79 6.67857 
+15 *281:79 *51901:C 16.6571 
+16 *281:79 *281:96 18.4107 
+17 *281:96 *51903:A2 9.72857 
+18 *281:96 *281:104 12.8571 
+19 *281:104 *52015:B 9.72857 
+20 *281:104 *281:115 10.9821 
+21 *281:115 *281:118 5.03571 
+22 *281:118 *357:DIODE 9.3 
+23 *281:118 *281:126 6.60714 
+24 *281:126 *52055:B 9.72857 
+25 *281:126 *281:134 10.8036 
+26 *281:134 *52089:B 9.72857 
+27 *281:134 *281:142 2.17857 
+28 *281:142 *281:145 7.05357 
+29 *281:145 *281:152 8.23214 
+30 *281:152 *281:162 12.5536 
+31 *281:162 *381:DIODE 9.3 
+32 *281:162 *379:DIODE 14.3536 
+33 *281:152 *52117:C 9.3 
+34 *281:145 *52118:A2 13.8 
+35 *281:142 *367:DIODE 9.3 
+36 *281:115 *347:DIODE 17.3 
+37 *281:63 *51906:D 10.0321 
+38 *281:53 *51922:B1 9.3 
+39 *281:47 *281:206 4.98214 
+40 *281:206 *288:DIODE 13.8 
+41 *281:206 *292:DIODE 24.2464 
+*END
+
+*D_NET *282 0.00902019
+*CONN
+*I *51894:A I *D sky130_fd_sc_hd__buf_2
+*I *51908:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *52148:X O *D sky130_fd_sc_hd__clkbuf_1
+*CAP
+1 *51894:A 0.000280509
+2 *51908:B1 1.40355e-05
+3 *52148:X 0.000834297
+4 *282:18 0.00113914
+5 *282:10 0.00167889
+6 *51908:B1 *284:28 2.89114e-05
+7 *282:18 *284:12 8.59056e-05
+8 *282:18 *284:28 7.47457e-05
+9 *307:DIODE *282:10 0.000104611
+10 *51909:B1_N *51894:A 0
+11 *51942:B2 *51894:A 0.000115474
+12 *51942:B2 *282:18 3.51442e-05
+13 *51968:A2 *282:10 5.41794e-05
+14 *51992:A2 *282:10 5.71472e-05
+15 *8:13 *282:10 2.56694e-05
+16 *8:13 *282:18 0.00111637
+17 *183:15 *282:10 1.18064e-05
+18 *183:59 *51908:B1 5.52302e-05
+19 *187:10 *51894:A 0
+20 *189:89 *282:18 0.000152128
+21 *192:11 *51894:A 0
+22 *232:50 *282:10 5.33005e-05
+23 *262:9 *282:18 0.00115055
+24 *263:9 *282:18 0.000274288
+25 *263:12 *282:18 0
+26 *263:30 *282:18 0
+27 *263:42 *282:10 0.00118257
+28 *281:29 *282:10 0.000363837
+29 *281:47 *282:10 0.000131439
+30 *281:96 *282:18 0
+*RES
+1 *52148:X *282:10 38.1214 
+2 *282:10 *282:18 31.9286 
+3 *282:18 *51908:B1 14.3357 
+4 *282:18 *51894:A 18.4786 
+*END
+
+*D_NET *283 0.0133268
+*CONN
+*I *52049:B I *D sky130_fd_sc_hd__nand2_1
+*I *52118:B1 I *D sky130_fd_sc_hd__a22o_1
+*I *52087:B I *D sky130_fd_sc_hd__nand3_1
+*I *52117:D I *D sky130_fd_sc_hd__nand4_1
+*I *52086:A2 I *D sky130_fd_sc_hd__a21o_1
+*I *52010:B I *D sky130_fd_sc_hd__nand2_1
+*I *51897:B I *D sky130_fd_sc_hd__nand2_2
+*I *52149:X O *D sky130_fd_sc_hd__clkbuf_2
+*CAP
+1 *52049:B 5.13097e-05
+2 *52118:B1 0.000287462
+3 *52087:B 3.12509e-05
+4 *52117:D 0.00027415
+5 *52086:A2 0.000108601
+6 *52010:B 0.000342244
+7 *51897:B 5.08153e-05
+8 *52149:X 0
+9 *283:86 0.000394296
+10 *283:71 0.000394782
+11 *283:61 0.00015365
+12 *283:59 0.00127373
+13 *283:39 0.00192001
+14 *283:11 0.000957188
+15 *283:4 0.00115911
+16 *51897:A *51897:B 3.93247e-05
+17 *51903:A1 *283:11 1.76039e-05
+18 *51903:B1 *283:11 1.00375e-05
+19 *51903:B2 *52010:B 0
+20 *52010:A *52010:B 1.97695e-05
+21 *52012:C *283:11 0
+22 *52049:A *283:39 6.97409e-05
+23 *52051:A2 *283:39 2.44318e-05
+24 *52051:B1 *283:39 0.000129595
+25 *52053:A *283:59 9.25014e-06
+26 *52054:A *52049:B 0
+27 *52083:A *283:59 7.48091e-05
+28 *52085:B *283:59 9.72107e-05
+29 *52086:B1 *52086:A2 0
+30 *52086:B1 *283:59 0.000148903
+31 *52086:B1 *283:71 0
+32 *52086:B1 *283:86 0
+33 *52087:A *52087:B 5.71472e-05
+34 *52087:C *283:59 2.09915e-05
+35 *52087:C *283:86 0
+36 *52088:A *52086:A2 1.92905e-05
+37 *52088:A *52118:B1 5.52302e-05
+38 *52088:B *52087:B 5.52238e-05
+39 *52088:B *52118:B1 7.62973e-05
+40 *52119:A1 *283:59 0
+41 *52119:B1 *283:59 5.52238e-05
+42 *52121:A *52086:A2 0.000133168
+43 *52121:A *283:59 5.71472e-05
+44 *52121:A *283:71 2.59093e-05
+45 *52121:B *283:71 5.83233e-05
+46 *52121:B *283:86 0.00012401
+47 *52149:A *283:11 1.76135e-05
+48 *68:5 *52010:B 0.000443654
+49 *70:7 *283:11 7.3237e-05
+50 *70:7 *283:39 0.000202891
+51 *106:5 *283:39 5.52238e-05
+52 *108:9 *283:39 9.22103e-06
+53 *140:5 *283:59 0.000706537
+54 *176:7 *52117:D 0.000280208
+55 *187:22 *52010:B 6.94775e-05
+56 *187:39 *283:39 3.61629e-06
+57 *187:91 *52010:B 2.39923e-05
+58 *190:10 *51897:B 6.05161e-06
+59 *190:10 *52010:B 0.000121573
+60 *190:10 *283:11 2.28598e-05
+61 *191:6 *283:11 0
+62 *207:73 *51897:B 9.60875e-05
+63 *207:73 *283:11 0.000570226
+64 *207:102 *283:59 1.97381e-05
+65 *207:113 *283:59 0.000271197
+66 *225:128 *52087:B 1.02821e-05
+67 *225:128 *52118:B1 0.000397105
+68 *225:130 *52118:B1 0
+69 *225:146 *52118:B1 5.33433e-05
+70 *263:9 *283:59 0.000801966
+71 *281:96 *51897:B 8.43535e-06
+72 *281:96 *283:11 0.000200914
+73 *281:104 *283:11 2.89016e-05
+74 *281:162 *52117:D 5.52302e-05
+*RES
+1 *52149:X *283:4 9.3 
+2 *283:4 *283:11 21.7143 
+3 *283:11 *51897:B 10.675 
+4 *283:11 *52010:B 26.175 
+5 *283:4 *283:39 13.25 
+6 *283:39 *283:59 47.25 
+7 *283:59 *283:61 4.5 
+8 *283:61 *52086:A2 16.2821 
+9 *283:61 *283:71 1.33929 
+10 *283:71 *52117:D 19.4071 
+11 *283:71 *283:86 6.14286 
+12 *283:86 *52087:B 10.2464 
+13 *283:86 *52118:B1 16.7643 
+14 *283:39 *52049:B 14.5321 
+*END
+
+*D_NET *284 0.0176339
+*CONN
+*I *51906:B I *D sky130_fd_sc_hd__and4_1
+*I *51921:B I *D sky130_fd_sc_hd__and4_1
+*I *51896:A I *D sky130_fd_sc_hd__buf_2
+*I *52150:X O *D sky130_fd_sc_hd__clkbuf_1
+*CAP
+1 *51906:B 0
+2 *51921:B 0.000236159
+3 *51896:A 0
+4 *52150:X 7.33081e-05
+5 *284:28 0.000711126
+6 *284:12 0.000589975
+7 *284:9 0.000828242
+8 *284:8 0.000786542
+9 *51901:C *284:12 0
+10 *51901:C *284:28 0
+11 *51906:C *51921:B 7.77751e-05
+12 *51906:C *284:28 2.44318e-05
+13 *51906:D *284:28 0
+14 *51908:A2 *284:28 4.9071e-05
+15 *51908:B1 *284:28 2.89114e-05
+16 *51921:C *51921:B 5.52302e-05
+17 *51923:B *284:28 5.52302e-05
+18 *52010:A *284:28 2.44318e-05
+19 *9:5 *284:8 0.000125731
+20 *183:59 *284:28 0.000111117
+21 *199:10 *284:28 0.000230305
+22 *199:20 *284:28 0.0001198
+23 *216:8 *284:28 0.000265961
+24 *262:9 *284:9 0.00627269
+25 *262:15 *51921:B 1.21289e-05
+26 *263:9 *284:9 0.00626884
+27 *280:43 *51921:B 0.000148105
+28 *281:63 *284:28 1.74352e-05
+29 *281:67 *284:28 0.00036072
+30 *281:96 *284:28 0
+31 *282:18 *284:12 8.59056e-05
+32 *282:18 *284:28 7.47457e-05
+*RES
+1 *52150:X *284:8 19.9429 
+2 *284:8 *284:9 58.8571 
+3 *284:9 *284:12 6.75 
+4 *284:12 *51896:A 13.8 
+5 *284:12 *284:28 18.8393 
+6 *284:28 *51921:B 13.9429 
+7 *284:28 *51906:B 9.3 
+*END

signoff/user_project_wrapper/OPENLANE_VERSION

diff --git a/signoff/user_project_wrapper/OPENLANE_VERSION b/signoff/user_project_wrapper/OPENLANE_VERSION
new file mode 100644
index 0000000..fabca1a
--- /dev/null
+++ b/signoff/user_project_wrapper/OPENLANE_VERSION
@@ -0,0 +1 @@
+OpenLane cb59d1f84deb5cedbb5b0a3e3f3b4129a967c988

signoff/user_project_wrapper/PDK_SOURCES

diff --git a/signoff/user_project_wrapper/PDK_SOURCES b/signoff/user_project_wrapper/PDK_SOURCES
new file mode 100644
index 0000000..59f6ae6
--- /dev/null
+++ b/signoff/user_project_wrapper/PDK_SOURCES
@@ -0,0 +1 @@
+open_pdks 0059588eebfc704681dc2368bd1d33d96281d10f

signoff/user_project_wrapper/metrics.csv

diff --git a/signoff/user_project_wrapper/metrics.csv b/signoff/user_project_wrapper/metrics.csv
new file mode 100644
index 0000000..5c4dc6d
--- /dev/null
+++ b/signoff/user_project_wrapper/metrics.csv
@@ -0,0 +1,2 @@
+design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY

+/home/aditya/Documents/Minor/foundary/BW_mul_foundary/openlane/user_project_wrapper,user_project_wrapper,22_12_15_20_18,flow completed,0h4m25s0ms,0h1m13s0ms,-2.0,-1,-1,-1,650.39,1,0,0,0,0,0,0,0,-1,0,-1,-1,80398,48,0.0,-1,0.0,0.0,0.0,0.0,-1,0.0,0.0,0.0,-1,0.0,0.18,0.32,0.0,0.0,-1,19,637,19,637,0,0,0,1,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,10173980.1536,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10,AREA 0,10,50,1,180,180,0.55,0.3,sky130_fd_sc_hd,0

signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.max.spef

diff --git a/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.max.spef b/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.max.spef
new file mode 100644
index 0000000..062380a
--- /dev/null
+++ b/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.max.spef
@@ -0,0 +1,1855 @@
+*SPEF "ieee 1481-1999"
+*DESIGN "user_project_wrapper"
+*DATE "11:11:11 Fri 11 11, 1111"
+*VENDOR "OpenRCX"
+*PROGRAM "Parallel Extraction"
+*VERSION "1.0"
+*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE"
+*DIVIDER /
+*DELIMITER :
+*BUS_DELIMITER []
+*T_UNIT 1 NS
+*C_UNIT 1 PF
+*R_UNIT 1 OHM
+*L_UNIT 1 HENRY
+
+*NAME_MAP
+*1 analog_io[0]
+*2 analog_io[10]
+*3 analog_io[11]
+*4 analog_io[12]
+*5 analog_io[13]
+*6 analog_io[14]
+*7 analog_io[15]
+*8 analog_io[16]
+*9 analog_io[17]
+*10 analog_io[18]
+*11 analog_io[19]
+*12 analog_io[1]
+*13 analog_io[20]
+*14 analog_io[21]
+*15 analog_io[22]
+*16 analog_io[23]
+*17 analog_io[24]
+*18 analog_io[25]
+*19 analog_io[26]
+*20 analog_io[27]
+*21 analog_io[28]
+*22 analog_io[2]
+*23 analog_io[3]
+*24 analog_io[4]
+*25 analog_io[5]
+*26 analog_io[6]
+*27 analog_io[7]
+*28 analog_io[8]
+*29 analog_io[9]
+*30 io_in[0]
+*31 io_in[10]
+*32 io_in[11]
+*33 io_in[12]
+*34 io_in[13]
+*35 io_in[14]
+*36 io_in[15]
+*37 io_in[16]
+*38 io_in[17]
+*39 io_in[18]
+*40 io_in[19]
+*41 io_in[1]
+*42 io_in[20]
+*43 io_in[21]
+*44 io_in[22]
+*45 io_in[23]
+*46 io_in[24]
+*47 io_in[25]
+*48 io_in[26]
+*49 io_in[27]
+*50 io_in[28]
+*51 io_in[29]
+*52 io_in[2]
+*53 io_in[30]
+*54 io_in[31]
+*55 io_in[32]
+*56 io_in[33]
+*57 io_in[34]
+*58 io_in[35]
+*59 io_in[36]
+*60 io_in[37]
+*61 io_in[3]
+*62 io_in[4]
+*63 io_in[5]
+*64 io_in[6]
+*65 io_in[7]
+*66 io_in[8]
+*67 io_in[9]
+*68 io_oeb[0]
+*69 io_oeb[10]
+*70 io_oeb[11]
+*71 io_oeb[12]
+*72 io_oeb[13]
+*73 io_oeb[14]
+*74 io_oeb[15]
+*75 io_oeb[16]
+*76 io_oeb[17]
+*77 io_oeb[18]
+*78 io_oeb[19]
+*79 io_oeb[1]
+*80 io_oeb[20]
+*81 io_oeb[21]
+*82 io_oeb[22]
+*83 io_oeb[23]
+*84 io_oeb[24]
+*85 io_oeb[25]
+*86 io_oeb[26]
+*87 io_oeb[27]
+*88 io_oeb[28]
+*89 io_oeb[29]
+*90 io_oeb[2]
+*91 io_oeb[30]
+*92 io_oeb[31]
+*93 io_oeb[32]
+*94 io_oeb[33]
+*95 io_oeb[34]
+*96 io_oeb[35]
+*97 io_oeb[36]
+*98 io_oeb[37]
+*99 io_oeb[3]
+*100 io_oeb[4]
+*101 io_oeb[5]
+*102 io_oeb[6]
+*103 io_oeb[7]
+*104 io_oeb[8]
+*105 io_oeb[9]
+*106 io_out[0]
+*107 io_out[10]
+*108 io_out[11]
+*109 io_out[12]
+*110 io_out[13]
+*111 io_out[14]
+*112 io_out[15]
+*113 io_out[16]
+*114 io_out[17]
+*115 io_out[18]
+*116 io_out[19]
+*117 io_out[1]
+*118 io_out[20]
+*119 io_out[21]
+*120 io_out[22]
+*121 io_out[23]
+*122 io_out[24]
+*123 io_out[25]
+*124 io_out[26]
+*125 io_out[27]
+*126 io_out[28]
+*127 io_out[29]
+*128 io_out[2]
+*129 io_out[30]
+*130 io_out[31]
+*131 io_out[32]
+*132 io_out[33]
+*133 io_out[34]
+*134 io_out[35]
+*135 io_out[36]
+*136 io_out[37]
+*137 io_out[3]
+*138 io_out[4]
+*139 io_out[5]
+*140 io_out[6]
+*141 io_out[7]
+*142 io_out[8]
+*143 io_out[9]
+*144 la_data_in[0]
+*145 la_data_in[100]
+*146 la_data_in[101]
+*147 la_data_in[102]
+*148 la_data_in[103]
+*149 la_data_in[104]
+*150 la_data_in[105]
+*151 la_data_in[106]
+*152 la_data_in[107]
+*153 la_data_in[108]
+*154 la_data_in[109]
+*155 la_data_in[10]
+*156 la_data_in[110]
+*157 la_data_in[111]
+*158 la_data_in[112]
+*159 la_data_in[113]
+*160 la_data_in[114]
+*161 la_data_in[115]
+*162 la_data_in[116]
+*163 la_data_in[117]
+*164 la_data_in[118]
+*165 la_data_in[119]
+*166 la_data_in[11]
+*167 la_data_in[120]
+*168 la_data_in[121]
+*169 la_data_in[122]
+*170 la_data_in[123]
+*171 la_data_in[124]
+*172 la_data_in[125]
+*173 la_data_in[126]
+*174 la_data_in[127]
+*175 la_data_in[12]
+*176 la_data_in[13]
+*177 la_data_in[14]
+*178 la_data_in[15]
+*179 la_data_in[16]
+*180 la_data_in[17]
+*181 la_data_in[18]
+*182 la_data_in[19]
+*183 la_data_in[1]
+*184 la_data_in[20]
+*185 la_data_in[21]
+*186 la_data_in[22]
+*187 la_data_in[23]
+*188 la_data_in[24]
+*189 la_data_in[25]
+*190 la_data_in[26]
+*191 la_data_in[27]
+*192 la_data_in[28]
+*193 la_data_in[29]
+*194 la_data_in[2]
+*195 la_data_in[30]
+*196 la_data_in[31]
+*197 la_data_in[32]
+*198 la_data_in[33]
+*199 la_data_in[34]
+*200 la_data_in[35]
+*201 la_data_in[36]
+*202 la_data_in[37]
+*203 la_data_in[38]
+*204 la_data_in[39]
+*205 la_data_in[3]
+*206 la_data_in[40]
+*207 la_data_in[41]
+*208 la_data_in[42]
+*209 la_data_in[43]
+*210 la_data_in[44]
+*211 la_data_in[45]
+*212 la_data_in[46]
+*213 la_data_in[47]
+*214 la_data_in[48]
+*215 la_data_in[49]
+*216 la_data_in[4]
+*217 la_data_in[50]
+*218 la_data_in[51]
+*219 la_data_in[52]
+*220 la_data_in[53]
+*221 la_data_in[54]
+*222 la_data_in[55]
+*223 la_data_in[56]
+*224 la_data_in[57]
+*225 la_data_in[58]
+*226 la_data_in[59]
+*227 la_data_in[5]
+*228 la_data_in[60]
+*229 la_data_in[61]
+*230 la_data_in[62]
+*231 la_data_in[63]
+*232 la_data_in[64]
+*233 la_data_in[65]
+*234 la_data_in[66]
+*235 la_data_in[67]
+*236 la_data_in[68]
+*237 la_data_in[69]
+*238 la_data_in[6]
+*239 la_data_in[70]
+*240 la_data_in[71]
+*241 la_data_in[72]
+*242 la_data_in[73]
+*243 la_data_in[74]
+*244 la_data_in[75]
+*245 la_data_in[76]
+*246 la_data_in[77]
+*247 la_data_in[78]
+*248 la_data_in[79]
+*249 la_data_in[7]
+*250 la_data_in[80]
+*251 la_data_in[81]
+*252 la_data_in[82]
+*253 la_data_in[83]
+*254 la_data_in[84]
+*255 la_data_in[85]
+*256 la_data_in[86]
+*257 la_data_in[87]
+*258 la_data_in[88]
+*259 la_data_in[89]
+*260 la_data_in[8]
+*261 la_data_in[90]
+*262 la_data_in[91]
+*263 la_data_in[92]
+*264 la_data_in[93]
+*265 la_data_in[94]
+*266 la_data_in[95]
+*267 la_data_in[96]
+*268 la_data_in[97]
+*269 la_data_in[98]
+*270 la_data_in[99]
+*271 la_data_in[9]
+*272 la_data_out[0]
+*273 la_data_out[100]
+*274 la_data_out[101]
+*275 la_data_out[102]
+*276 la_data_out[103]
+*277 la_data_out[104]
+*278 la_data_out[105]
+*279 la_data_out[106]
+*280 la_data_out[107]
+*281 la_data_out[108]
+*282 la_data_out[109]
+*283 la_data_out[10]
+*284 la_data_out[110]
+*285 la_data_out[111]
+*286 la_data_out[112]
+*287 la_data_out[113]
+*288 la_data_out[114]
+*289 la_data_out[115]
+*290 la_data_out[116]
+*291 la_data_out[117]
+*292 la_data_out[118]
+*293 la_data_out[119]
+*294 la_data_out[11]
+*295 la_data_out[120]
+*296 la_data_out[121]
+*297 la_data_out[122]
+*298 la_data_out[123]
+*299 la_data_out[124]
+*300 la_data_out[125]
+*301 la_data_out[126]
+*302 la_data_out[127]
+*303 la_data_out[12]
+*304 la_data_out[13]
+*305 la_data_out[14]
+*306 la_data_out[15]
+*307 la_data_out[16]
+*308 la_data_out[17]
+*309 la_data_out[18]
+*310 la_data_out[19]
+*311 la_data_out[1]
+*312 la_data_out[20]
+*313 la_data_out[21]
+*314 la_data_out[22]
+*315 la_data_out[23]
+*316 la_data_out[24]
+*317 la_data_out[25]
+*318 la_data_out[26]
+*319 la_data_out[27]
+*320 la_data_out[28]
+*321 la_data_out[29]
+*322 la_data_out[2]
+*323 la_data_out[30]
+*324 la_data_out[31]
+*325 la_data_out[32]
+*326 la_data_out[33]
+*327 la_data_out[34]
+*328 la_data_out[35]
+*329 la_data_out[36]
+*330 la_data_out[37]
+*331 la_data_out[38]
+*332 la_data_out[39]
+*333 la_data_out[3]
+*334 la_data_out[40]
+*335 la_data_out[41]
+*336 la_data_out[42]
+*337 la_data_out[43]
+*338 la_data_out[44]
+*339 la_data_out[45]
+*340 la_data_out[46]
+*341 la_data_out[47]
+*342 la_data_out[48]
+*343 la_data_out[49]
+*344 la_data_out[4]
+*345 la_data_out[50]
+*346 la_data_out[51]
+*347 la_data_out[52]
+*348 la_data_out[53]
+*349 la_data_out[54]
+*350 la_data_out[55]
+*351 la_data_out[56]
+*352 la_data_out[57]
+*353 la_data_out[58]
+*354 la_data_out[59]
+*355 la_data_out[5]
+*356 la_data_out[60]
+*357 la_data_out[61]
+*358 la_data_out[62]
+*359 la_data_out[63]
+*360 la_data_out[64]
+*361 la_data_out[65]
+*362 la_data_out[66]
+*363 la_data_out[67]
+*364 la_data_out[68]
+*365 la_data_out[69]
+*366 la_data_out[6]
+*367 la_data_out[70]
+*368 la_data_out[71]
+*369 la_data_out[72]
+*370 la_data_out[73]
+*371 la_data_out[74]
+*372 la_data_out[75]
+*373 la_data_out[76]
+*374 la_data_out[77]
+*375 la_data_out[78]
+*376 la_data_out[79]
+*377 la_data_out[7]
+*378 la_data_out[80]
+*379 la_data_out[81]
+*380 la_data_out[82]
+*381 la_data_out[83]
+*382 la_data_out[84]
+*383 la_data_out[85]
+*384 la_data_out[86]
+*385 la_data_out[87]
+*386 la_data_out[88]
+*387 la_data_out[89]
+*388 la_data_out[8]
+*389 la_data_out[90]
+*390 la_data_out[91]
+*391 la_data_out[92]
+*392 la_data_out[93]
+*393 la_data_out[94]
+*394 la_data_out[95]
+*395 la_data_out[96]
+*396 la_data_out[97]
+*397 la_data_out[98]
+*398 la_data_out[99]
+*399 la_data_out[9]
+*400 la_oenb[0]
+*401 la_oenb[100]
+*402 la_oenb[101]
+*403 la_oenb[102]
+*404 la_oenb[103]
+*405 la_oenb[104]
+*406 la_oenb[105]
+*407 la_oenb[106]
+*408 la_oenb[107]
+*409 la_oenb[108]
+*410 la_oenb[109]
+*411 la_oenb[10]
+*412 la_oenb[110]
+*413 la_oenb[111]
+*414 la_oenb[112]
+*415 la_oenb[113]
+*416 la_oenb[114]
+*417 la_oenb[115]
+*418 la_oenb[116]
+*419 la_oenb[117]
+*420 la_oenb[118]
+*421 la_oenb[119]
+*422 la_oenb[11]
+*423 la_oenb[120]
+*424 la_oenb[121]
+*425 la_oenb[122]
+*426 la_oenb[123]
+*427 la_oenb[124]
+*428 la_oenb[125]
+*429 la_oenb[126]
+*430 la_oenb[127]
+*431 la_oenb[12]
+*432 la_oenb[13]
+*433 la_oenb[14]
+*434 la_oenb[15]
+*435 la_oenb[16]
+*436 la_oenb[17]
+*437 la_oenb[18]
+*438 la_oenb[19]
+*439 la_oenb[1]
+*440 la_oenb[20]
+*441 la_oenb[21]
+*442 la_oenb[22]
+*443 la_oenb[23]
+*444 la_oenb[24]
+*445 la_oenb[25]
+*446 la_oenb[26]
+*447 la_oenb[27]
+*448 la_oenb[28]
+*449 la_oenb[29]
+*450 la_oenb[2]
+*451 la_oenb[30]
+*452 la_oenb[31]
+*453 la_oenb[32]
+*454 la_oenb[33]
+*455 la_oenb[34]
+*456 la_oenb[35]
+*457 la_oenb[36]
+*458 la_oenb[37]
+*459 la_oenb[38]
+*460 la_oenb[39]
+*461 la_oenb[3]
+*462 la_oenb[40]
+*463 la_oenb[41]
+*464 la_oenb[42]
+*465 la_oenb[43]
+*466 la_oenb[44]
+*467 la_oenb[45]
+*468 la_oenb[46]
+*469 la_oenb[47]
+*470 la_oenb[48]
+*471 la_oenb[49]
+*472 la_oenb[4]
+*473 la_oenb[50]
+*474 la_oenb[51]
+*475 la_oenb[52]
+*476 la_oenb[53]
+*477 la_oenb[54]
+*478 la_oenb[55]
+*479 la_oenb[56]
+*480 la_oenb[57]
+*481 la_oenb[58]
+*482 la_oenb[59]
+*483 la_oenb[5]
+*484 la_oenb[60]
+*485 la_oenb[61]
+*486 la_oenb[62]
+*487 la_oenb[63]
+*488 la_oenb[64]
+*489 la_oenb[65]
+*490 la_oenb[66]
+*491 la_oenb[67]
+*492 la_oenb[68]
+*493 la_oenb[69]
+*494 la_oenb[6]
+*495 la_oenb[70]
+*496 la_oenb[71]
+*497 la_oenb[72]
+*498 la_oenb[73]
+*499 la_oenb[74]
+*500 la_oenb[75]
+*501 la_oenb[76]
+*502 la_oenb[77]
+*503 la_oenb[78]
+*504 la_oenb[79]
+*505 la_oenb[7]
+*506 la_oenb[80]
+*507 la_oenb[81]
+*508 la_oenb[82]
+*509 la_oenb[83]
+*510 la_oenb[84]
+*511 la_oenb[85]
+*512 la_oenb[86]
+*513 la_oenb[87]
+*514 la_oenb[88]
+*515 la_oenb[89]
+*516 la_oenb[8]
+*517 la_oenb[90]
+*518 la_oenb[91]
+*519 la_oenb[92]
+*520 la_oenb[93]
+*521 la_oenb[94]
+*522 la_oenb[95]
+*523 la_oenb[96]
+*524 la_oenb[97]
+*525 la_oenb[98]
+*526 la_oenb[99]
+*527 la_oenb[9]
+*528 user_clock2
+*529 user_irq[0]
+*530 user_irq[1]
+*531 user_irq[2]
+*540 wb_clk_i
+*541 wb_rst_i
+*542 wbs_ack_o
+*543 wbs_adr_i[0]
+*544 wbs_adr_i[10]
+*545 wbs_adr_i[11]
+*546 wbs_adr_i[12]
+*547 wbs_adr_i[13]
+*548 wbs_adr_i[14]
+*549 wbs_adr_i[15]
+*550 wbs_adr_i[16]
+*551 wbs_adr_i[17]
+*552 wbs_adr_i[18]
+*553 wbs_adr_i[19]
+*554 wbs_adr_i[1]
+*555 wbs_adr_i[20]
+*556 wbs_adr_i[21]
+*557 wbs_adr_i[22]
+*558 wbs_adr_i[23]
+*559 wbs_adr_i[24]
+*560 wbs_adr_i[25]
+*561 wbs_adr_i[26]
+*562 wbs_adr_i[27]
+*563 wbs_adr_i[28]
+*564 wbs_adr_i[29]
+*565 wbs_adr_i[2]
+*566 wbs_adr_i[30]
+*567 wbs_adr_i[31]
+*568 wbs_adr_i[3]
+*569 wbs_adr_i[4]
+*570 wbs_adr_i[5]
+*571 wbs_adr_i[6]
+*572 wbs_adr_i[7]
+*573 wbs_adr_i[8]
+*574 wbs_adr_i[9]
+*575 wbs_cyc_i
+*576 wbs_dat_i[0]
+*577 wbs_dat_i[10]
+*578 wbs_dat_i[11]
+*579 wbs_dat_i[12]
+*580 wbs_dat_i[13]
+*581 wbs_dat_i[14]
+*582 wbs_dat_i[15]
+*583 wbs_dat_i[16]
+*584 wbs_dat_i[17]
+*585 wbs_dat_i[18]
+*586 wbs_dat_i[19]
+*587 wbs_dat_i[1]
+*588 wbs_dat_i[20]
+*589 wbs_dat_i[21]
+*590 wbs_dat_i[22]
+*591 wbs_dat_i[23]
+*592 wbs_dat_i[24]
+*593 wbs_dat_i[25]
+*594 wbs_dat_i[26]
+*595 wbs_dat_i[27]
+*596 wbs_dat_i[28]
+*597 wbs_dat_i[29]
+*598 wbs_dat_i[2]
+*599 wbs_dat_i[30]
+*600 wbs_dat_i[31]
+*601 wbs_dat_i[3]
+*602 wbs_dat_i[4]
+*603 wbs_dat_i[5]
+*604 wbs_dat_i[6]
+*605 wbs_dat_i[7]
+*606 wbs_dat_i[8]
+*607 wbs_dat_i[9]
+*608 wbs_dat_o[0]
+*609 wbs_dat_o[10]
+*610 wbs_dat_o[11]
+*611 wbs_dat_o[12]
+*612 wbs_dat_o[13]
+*613 wbs_dat_o[14]
+*614 wbs_dat_o[15]
+*615 wbs_dat_o[16]
+*616 wbs_dat_o[17]
+*617 wbs_dat_o[18]
+*618 wbs_dat_o[19]
+*619 wbs_dat_o[1]
+*620 wbs_dat_o[20]
+*621 wbs_dat_o[21]
+*622 wbs_dat_o[22]
+*623 wbs_dat_o[23]
+*624 wbs_dat_o[24]
+*625 wbs_dat_o[25]
+*626 wbs_dat_o[26]
+*627 wbs_dat_o[27]
+*628 wbs_dat_o[28]
+*629 wbs_dat_o[29]
+*630 wbs_dat_o[2]
+*631 wbs_dat_o[30]
+*632 wbs_dat_o[31]
+*633 wbs_dat_o[3]
+*634 wbs_dat_o[4]
+*635 wbs_dat_o[5]
+*636 wbs_dat_o[6]
+*637 wbs_dat_o[7]
+*638 wbs_dat_o[8]
+*639 wbs_dat_o[9]
+*640 wbs_sel_i[0]
+*641 wbs_sel_i[1]
+*642 wbs_sel_i[2]
+*643 wbs_sel_i[3]
+*644 wbs_stb_i
+*645 wbs_we_i
+*646 mprj
+
+*PORTS
+analog_io[0] I
+analog_io[10] I
+analog_io[11] I
+analog_io[12] I
+analog_io[13] I
+analog_io[14] I
+analog_io[15] I
+analog_io[16] I
+analog_io[17] I
+analog_io[18] I
+analog_io[19] I
+analog_io[1] I
+analog_io[20] I
+analog_io[21] I
+analog_io[22] I
+analog_io[23] I
+analog_io[24] I
+analog_io[25] I
+analog_io[26] I
+analog_io[27] I
+analog_io[28] I
+analog_io[2] I
+analog_io[3] I
+analog_io[4] I
+analog_io[5] I
+analog_io[6] I
+analog_io[7] I
+analog_io[8] I
+analog_io[9] I
+io_in[0] I
+io_in[10] I
+io_in[11] I
+io_in[12] I
+io_in[13] I
+io_in[14] I
+io_in[15] I
+io_in[16] I
+io_in[17] I
+io_in[18] I
+io_in[19] I
+io_in[1] I
+io_in[20] I
+io_in[21] I
+io_in[22] I
+io_in[23] I
+io_in[24] I
+io_in[25] I
+io_in[26] I
+io_in[27] I
+io_in[28] I
+io_in[29] I
+io_in[2] I
+io_in[30] I
+io_in[31] I
+io_in[32] I
+io_in[33] I
+io_in[34] I
+io_in[35] I
+io_in[36] I
+io_in[37] I
+io_in[3] I
+io_in[4] I
+io_in[5] I
+io_in[6] I
+io_in[7] I
+io_in[8] I
+io_in[9] I
+io_oeb[0] O
+io_oeb[10] O
+io_oeb[11] O
+io_oeb[12] O
+io_oeb[13] O
+io_oeb[14] O
+io_oeb[15] O
+io_oeb[16] O
+io_oeb[17] O
+io_oeb[18] O
+io_oeb[19] O
+io_oeb[1] O
+io_oeb[20] O
+io_oeb[21] O
+io_oeb[22] O
+io_oeb[23] O
+io_oeb[24] O
+io_oeb[25] O
+io_oeb[26] O
+io_oeb[27] O
+io_oeb[28] O
+io_oeb[29] O
+io_oeb[2] O
+io_oeb[30] O
+io_oeb[31] O
+io_oeb[32] O
+io_oeb[33] O
+io_oeb[34] O
+io_oeb[35] O
+io_oeb[36] O
+io_oeb[37] O
+io_oeb[3] O
+io_oeb[4] O
+io_oeb[5] O
+io_oeb[6] O
+io_oeb[7] O
+io_oeb[8] O
+io_oeb[9] O
+io_out[0] O
+io_out[10] O
+io_out[11] O
+io_out[12] O
+io_out[13] O
+io_out[14] O
+io_out[15] O
+io_out[16] O
+io_out[17] O
+io_out[18] O
+io_out[19] O
+io_out[1] O
+io_out[20] O
+io_out[21] O
+io_out[22] O
+io_out[23] O
+io_out[24] O
+io_out[25] O
+io_out[26] O
+io_out[27] O
+io_out[28] O
+io_out[29] O
+io_out[2] O
+io_out[30] O
+io_out[31] O
+io_out[32] O
+io_out[33] O
+io_out[34] O
+io_out[35] O
+io_out[36] O
+io_out[37] O
+io_out[3] O
+io_out[4] O
+io_out[5] O
+io_out[6] O
+io_out[7] O
+io_out[8] O
+io_out[9] O
+la_data_in[0] I
+la_data_in[100] I
+la_data_in[101] I
+la_data_in[102] I
+la_data_in[103] I
+la_data_in[104] I
+la_data_in[105] I
+la_data_in[106] I
+la_data_in[107] I
+la_data_in[108] I
+la_data_in[109] I
+la_data_in[10] I
+la_data_in[110] I
+la_data_in[111] I
+la_data_in[112] I
+la_data_in[113] I
+la_data_in[114] I
+la_data_in[115] I
+la_data_in[116] I
+la_data_in[117] I
+la_data_in[118] I
+la_data_in[119] I
+la_data_in[11] I
+la_data_in[120] I
+la_data_in[121] I
+la_data_in[122] I
+la_data_in[123] I
+la_data_in[124] I
+la_data_in[125] I
+la_data_in[126] I
+la_data_in[127] I
+la_data_in[12] I
+la_data_in[13] I
+la_data_in[14] I
+la_data_in[15] I
+la_data_in[16] I
+la_data_in[17] I
+la_data_in[18] I
+la_data_in[19] I
+la_data_in[1] I
+la_data_in[20] I
+la_data_in[21] I
+la_data_in[22] I
+la_data_in[23] I
+la_data_in[24] I
+la_data_in[25] I
+la_data_in[26] I
+la_data_in[27] I
+la_data_in[28] I
+la_data_in[29] I
+la_data_in[2] I
+la_data_in[30] I
+la_data_in[31] I
+la_data_in[32] I
+la_data_in[33] I
+la_data_in[34] I
+la_data_in[35] I
+la_data_in[36] I
+la_data_in[37] I
+la_data_in[38] I
+la_data_in[39] I
+la_data_in[3] I
+la_data_in[40] I
+la_data_in[41] I
+la_data_in[42] I
+la_data_in[43] I
+la_data_in[44] I
+la_data_in[45] I
+la_data_in[46] I
+la_data_in[47] I
+la_data_in[48] I
+la_data_in[49] I
+la_data_in[4] I
+la_data_in[50] I
+la_data_in[51] I
+la_data_in[52] I
+la_data_in[53] I
+la_data_in[54] I
+la_data_in[55] I
+la_data_in[56] I
+la_data_in[57] I
+la_data_in[58] I
+la_data_in[59] I
+la_data_in[5] I
+la_data_in[60] I
+la_data_in[61] I
+la_data_in[62] I
+la_data_in[63] I
+la_data_in[64] I
+la_data_in[65] I
+la_data_in[66] I
+la_data_in[67] I
+la_data_in[68] I
+la_data_in[69] I
+la_data_in[6] I
+la_data_in[70] I
+la_data_in[71] I
+la_data_in[72] I
+la_data_in[73] I
+la_data_in[74] I
+la_data_in[75] I
+la_data_in[76] I
+la_data_in[77] I
+la_data_in[78] I
+la_data_in[79] I
+la_data_in[7] I
+la_data_in[80] I
+la_data_in[81] I
+la_data_in[82] I
+la_data_in[83] I
+la_data_in[84] I
+la_data_in[85] I
+la_data_in[86] I
+la_data_in[87] I
+la_data_in[88] I
+la_data_in[89] I
+la_data_in[8] I
+la_data_in[90] I
+la_data_in[91] I
+la_data_in[92] I
+la_data_in[93] I
+la_data_in[94] I
+la_data_in[95] I
+la_data_in[96] I
+la_data_in[97] I
+la_data_in[98] I
+la_data_in[99] I
+la_data_in[9] I
+la_data_out[0] O
+la_data_out[100] O
+la_data_out[101] O
+la_data_out[102] O
+la_data_out[103] O
+la_data_out[104] O
+la_data_out[105] O
+la_data_out[106] O
+la_data_out[107] O
+la_data_out[108] O
+la_data_out[109] O
+la_data_out[10] O
+la_data_out[110] O
+la_data_out[111] O
+la_data_out[112] O
+la_data_out[113] O
+la_data_out[114] O
+la_data_out[115] O
+la_data_out[116] O
+la_data_out[117] O
+la_data_out[118] O
+la_data_out[119] O
+la_data_out[11] O
+la_data_out[120] O
+la_data_out[121] O
+la_data_out[122] O
+la_data_out[123] O
+la_data_out[124] O
+la_data_out[125] O
+la_data_out[126] O
+la_data_out[127] O
+la_data_out[12] O
+la_data_out[13] O
+la_data_out[14] O
+la_data_out[15] O
+la_data_out[16] O
+la_data_out[17] O
+la_data_out[18] O
+la_data_out[19] O
+la_data_out[1] O
+la_data_out[20] O
+la_data_out[21] O
+la_data_out[22] O
+la_data_out[23] O
+la_data_out[24] O
+la_data_out[25] O
+la_data_out[26] O
+la_data_out[27] O
+la_data_out[28] O
+la_data_out[29] O
+la_data_out[2] O
+la_data_out[30] O
+la_data_out[31] O
+la_data_out[32] O
+la_data_out[33] O
+la_data_out[34] O
+la_data_out[35] O
+la_data_out[36] O
+la_data_out[37] O
+la_data_out[38] O
+la_data_out[39] O
+la_data_out[3] O
+la_data_out[40] O
+la_data_out[41] O
+la_data_out[42] O
+la_data_out[43] O
+la_data_out[44] O
+la_data_out[45] O
+la_data_out[46] O
+la_data_out[47] O
+la_data_out[48] O
+la_data_out[49] O
+la_data_out[4] O
+la_data_out[50] O
+la_data_out[51] O
+la_data_out[52] O
+la_data_out[53] O
+la_data_out[54] O
+la_data_out[55] O
+la_data_out[56] O
+la_data_out[57] O
+la_data_out[58] O
+la_data_out[59] O
+la_data_out[5] O
+la_data_out[60] O
+la_data_out[61] O
+la_data_out[62] O
+la_data_out[63] O
+la_data_out[64] O
+la_data_out[65] O
+la_data_out[66] O
+la_data_out[67] O
+la_data_out[68] O
+la_data_out[69] O
+la_data_out[6] O
+la_data_out[70] O
+la_data_out[71] O
+la_data_out[72] O
+la_data_out[73] O
+la_data_out[74] O
+la_data_out[75] O
+la_data_out[76] O
+la_data_out[77] O
+la_data_out[78] O
+la_data_out[79] O
+la_data_out[7] O
+la_data_out[80] O
+la_data_out[81] O
+la_data_out[82] O
+la_data_out[83] O
+la_data_out[84] O
+la_data_out[85] O
+la_data_out[86] O
+la_data_out[87] O
+la_data_out[88] O
+la_data_out[89] O
+la_data_out[8] O
+la_data_out[90] O
+la_data_out[91] O
+la_data_out[92] O
+la_data_out[93] O
+la_data_out[94] O
+la_data_out[95] O
+la_data_out[96] O
+la_data_out[97] O
+la_data_out[98] O
+la_data_out[99] O
+la_data_out[9] O
+la_oenb[0] I
+la_oenb[100] I
+la_oenb[101] I
+la_oenb[102] I
+la_oenb[103] I
+la_oenb[104] I
+la_oenb[105] I
+la_oenb[106] I
+la_oenb[107] I
+la_oenb[108] I
+la_oenb[109] I
+la_oenb[10] I
+la_oenb[110] I
+la_oenb[111] I
+la_oenb[112] I
+la_oenb[113] I
+la_oenb[114] I
+la_oenb[115] I
+la_oenb[116] I
+la_oenb[117] I
+la_oenb[118] I
+la_oenb[119] I
+la_oenb[11] I
+la_oenb[120] I
+la_oenb[121] I
+la_oenb[122] I
+la_oenb[123] I
+la_oenb[124] I
+la_oenb[125] I
+la_oenb[126] I
+la_oenb[127] I
+la_oenb[12] I
+la_oenb[13] I
+la_oenb[14] I
+la_oenb[15] I
+la_oenb[16] I
+la_oenb[17] I
+la_oenb[18] I
+la_oenb[19] I
+la_oenb[1] I
+la_oenb[20] I
+la_oenb[21] I
+la_oenb[22] I
+la_oenb[23] I
+la_oenb[24] I
+la_oenb[25] I
+la_oenb[26] I
+la_oenb[27] I
+la_oenb[28] I
+la_oenb[29] I
+la_oenb[2] I
+la_oenb[30] I
+la_oenb[31] I
+la_oenb[32] I
+la_oenb[33] I
+la_oenb[34] I
+la_oenb[35] I
+la_oenb[36] I
+la_oenb[37] I
+la_oenb[38] I
+la_oenb[39] I
+la_oenb[3] I
+la_oenb[40] I
+la_oenb[41] I
+la_oenb[42] I
+la_oenb[43] I
+la_oenb[44] I
+la_oenb[45] I
+la_oenb[46] I
+la_oenb[47] I
+la_oenb[48] I
+la_oenb[49] I
+la_oenb[4] I
+la_oenb[50] I
+la_oenb[51] I
+la_oenb[52] I
+la_oenb[53] I
+la_oenb[54] I
+la_oenb[55] I
+la_oenb[56] I
+la_oenb[57] I
+la_oenb[58] I
+la_oenb[59] I
+la_oenb[5] I
+la_oenb[60] I
+la_oenb[61] I
+la_oenb[62] I
+la_oenb[63] I
+la_oenb[64] I
+la_oenb[65] I
+la_oenb[66] I
+la_oenb[67] I
+la_oenb[68] I
+la_oenb[69] I
+la_oenb[6] I
+la_oenb[70] I
+la_oenb[71] I
+la_oenb[72] I
+la_oenb[73] I
+la_oenb[74] I
+la_oenb[75] I
+la_oenb[76] I
+la_oenb[77] I
+la_oenb[78] I
+la_oenb[79] I
+la_oenb[7] I
+la_oenb[80] I
+la_oenb[81] I
+la_oenb[82] I
+la_oenb[83] I
+la_oenb[84] I
+la_oenb[85] I
+la_oenb[86] I
+la_oenb[87] I
+la_oenb[88] I
+la_oenb[89] I
+la_oenb[8] I
+la_oenb[90] I
+la_oenb[91] I
+la_oenb[92] I
+la_oenb[93] I
+la_oenb[94] I
+la_oenb[95] I
+la_oenb[96] I
+la_oenb[97] I
+la_oenb[98] I
+la_oenb[99] I
+la_oenb[9] I
+user_clock2 I
+user_irq[0] O
+user_irq[1] O
+user_irq[2] O
+wb_clk_i I
+wb_rst_i I
+wbs_ack_o O
+wbs_adr_i[0] I
+wbs_adr_i[10] I
+wbs_adr_i[11] I
+wbs_adr_i[12] I
+wbs_adr_i[13] I
+wbs_adr_i[14] I
+wbs_adr_i[15] I
+wbs_adr_i[16] I
+wbs_adr_i[17] I
+wbs_adr_i[18] I
+wbs_adr_i[19] I
+wbs_adr_i[1] I
+wbs_adr_i[20] I
+wbs_adr_i[21] I
+wbs_adr_i[22] I
+wbs_adr_i[23] I
+wbs_adr_i[24] I
+wbs_adr_i[25] I
+wbs_adr_i[26] I
+wbs_adr_i[27] I
+wbs_adr_i[28] I
+wbs_adr_i[29] I
+wbs_adr_i[2] I
+wbs_adr_i[30] I
+wbs_adr_i[31] I
+wbs_adr_i[3] I
+wbs_adr_i[4] I
+wbs_adr_i[5] I
+wbs_adr_i[6] I
+wbs_adr_i[7] I
+wbs_adr_i[8] I
+wbs_adr_i[9] I
+wbs_cyc_i I
+wbs_dat_i[0] I
+wbs_dat_i[10] I
+wbs_dat_i[11] I
+wbs_dat_i[12] I
+wbs_dat_i[13] I
+wbs_dat_i[14] I
+wbs_dat_i[15] I
+wbs_dat_i[16] I
+wbs_dat_i[17] I
+wbs_dat_i[18] I
+wbs_dat_i[19] I
+wbs_dat_i[1] I
+wbs_dat_i[20] I
+wbs_dat_i[21] I
+wbs_dat_i[22] I
+wbs_dat_i[23] I
+wbs_dat_i[24] I
+wbs_dat_i[25] I
+wbs_dat_i[26] I
+wbs_dat_i[27] I
+wbs_dat_i[28] I
+wbs_dat_i[29] I
+wbs_dat_i[2] I
+wbs_dat_i[30] I
+wbs_dat_i[31] I
+wbs_dat_i[3] I
+wbs_dat_i[4] I
+wbs_dat_i[5] I
+wbs_dat_i[6] I
+wbs_dat_i[7] I
+wbs_dat_i[8] I
+wbs_dat_i[9] I
+wbs_dat_o[0] O
+wbs_dat_o[10] O
+wbs_dat_o[11] O
+wbs_dat_o[12] O
+wbs_dat_o[13] O
+wbs_dat_o[14] O
+wbs_dat_o[15] O
+wbs_dat_o[16] O
+wbs_dat_o[17] O
+wbs_dat_o[18] O
+wbs_dat_o[19] O
+wbs_dat_o[1] O
+wbs_dat_o[20] O
+wbs_dat_o[21] O
+wbs_dat_o[22] O
+wbs_dat_o[23] O
+wbs_dat_o[24] O
+wbs_dat_o[25] O
+wbs_dat_o[26] O
+wbs_dat_o[27] O
+wbs_dat_o[28] O
+wbs_dat_o[29] O
+wbs_dat_o[2] O
+wbs_dat_o[30] O
+wbs_dat_o[31] O
+wbs_dat_o[3] O
+wbs_dat_o[4] O
+wbs_dat_o[5] O
+wbs_dat_o[6] O
+wbs_dat_o[7] O
+wbs_dat_o[8] O
+wbs_dat_o[9] O
+wbs_sel_i[0] I
+wbs_sel_i[1] I
+wbs_sel_i[2] I
+wbs_sel_i[3] I
+wbs_stb_i I
+wbs_we_i I
+
+*D_NET *576 0.329229
+*CONN
+*P wbs_dat_i[0] I
+*I *646:a[0] I *D user_proj_example
+*CAP
+1 wbs_dat_i[0] 0.000790606
+2 *646:a[0] 9.80801e-05
+3 *576:15 0.00239212
+4 *576:13 0.00234262
+5 *576:11 0.0744443
+6 *576:10 0.0743957
+7 *576:8 0.0354631
+8 *576:7 0.0362537
+9 *576:7 *608:13 0
+10 *576:8 *602:8 0.103048
+*RES
+1 wbs_dat_i[0] *576:7 33.2079 
+2 *576:7 *576:8 1198.36 
+3 *576:8 *576:10 15 
+4 *576:10 *576:11 1681.1 
+5 *576:11 *576:13 1.09786 
+6 *576:13 *576:15 49.7971 
+7 *576:15 *646:a[0] 2.21643 
+*END
+
+*D_NET *577 0.463243
+*CONN
+*P wbs_dat_i[10] I
+*I *646:b[2] I *D user_proj_example
+*CAP
+1 wbs_dat_i[10] 0.000781809
+2 *646:b[2] 9.16934e-05
+3 *577:15 0.0022462
+4 *577:13 0.00230836
+5 *577:11 0.0745816
+6 *577:10 0.0744277
+7 *577:8 0.0242815
+8 *577:7 0.0250633
+9 *577:8 *578:8 0.145265
+10 *577:8 *602:8 0.114196
+*RES
+1 wbs_dat_i[10] *577:7 32.5036 
+2 *577:7 *577:8 1569.02 
+3 *577:8 *577:10 15 
+4 *577:10 *577:11 1681.8 
+5 *577:11 *577:13 3.48 
+6 *577:13 *577:15 49.7971 
+7 *577:15 *646:b[2] 2.21643 
+*END
+
+*D_NET *578 0.485362
+*CONN
+*P wbs_dat_i[11] I
+*I *646:b[3] I *D user_proj_example
+*CAP
+1 wbs_dat_i[11] 0.000746902
+2 *646:b[3] 9.16934e-05
+3 *578:15 0.00224459
+4 *578:13 0.00234708
+5 *578:11 0.0726895
+6 *578:10 0.0724953
+7 *578:8 0.0199035
+8 *578:7 0.0206505
+9 *578:8 *579:8 0.148928
+10 *577:8 *578:8 0.145265
+*RES
+1 wbs_dat_i[11] *578:7 32.1514 
+2 *578:7 *578:8 1607.61 
+3 *578:8 *578:10 15 
+4 *578:10 *578:11 1682.16 
+5 *578:11 *578:13 4.43286 
+6 *578:13 *578:15 49.7971 
+7 *578:15 *646:b[3] 2.21643 
+*END
+
+*D_NET *579 0.494088
+*CONN
+*P wbs_dat_i[12] I
+*I *646:b[4] I *D user_proj_example
+*CAP
+1 wbs_dat_i[12] 0.000732334
+2 *646:b[4] 1.28542e-05
+3 *579:11 0.0746724
+4 *579:10 0.0746596
+5 *579:8 0.0205688
+6 *579:7 0.0213011
+7 *579:8 *580:8 0.153213
+8 *578:8 *579:8 0.148928
+*RES
+1 wbs_dat_i[12] *579:7 31.7993 
+2 *579:7 *579:8 1653.83 
+3 *579:8 *579:10 15 
+4 *579:10 *579:11 1732.16 
+5 *579:11 *646:b[4] 0.310714 
+*END
+
+*D_NET *580 0.50273
+*CONN
+*P wbs_dat_i[13] I
+*I *646:b[5] I *D user_proj_example
+*CAP
+1 wbs_dat_i[13] 0.000717766
+2 *646:b[5] 5.22738e-05
+3 *580:11 0.0747264
+4 *580:10 0.0746742
+5 *580:8 0.0209
+6 *580:7 0.0216178
+7 *580:8 *581:8 0.156829
+8 *579:8 *580:8 0.153213
+*RES
+1 wbs_dat_i[13] *580:7 31.4471 
+2 *580:7 *580:8 1692.42 
+3 *580:8 *580:10 15 
+4 *580:10 *580:11 1732.51 
+5 *580:11 *646:b[5] 1.26357 
+*END
+
+*D_NET *581 0.406715
+*CONN
+*P wbs_dat_i[14] I
+*I *646:b[6] I *D user_proj_example
+*CAP
+1 wbs_dat_i[14] 0.000703197
+2 *646:b[6] 9.58144e-05
+3 *581:11 0.0747845
+4 *581:10 0.0746887
+5 *581:8 0.0494555
+6 *581:7 0.0501587
+7 *580:8 *581:8 0.156829
+*RES
+1 wbs_dat_i[14] *581:7 31.095 
+2 *581:7 *581:8 1731.01 
+3 *581:8 *581:10 15 
+4 *581:10 *581:11 1732.86 
+5 *581:11 *646:b[6] 2.21643 
+*END
+
+*D_NET *582 0.397973
+*CONN
+*P wbs_dat_i[15] I
+*I *646:b[7] I *D user_proj_example
+*CAP
+1 wbs_dat_i[15] 0.00215308
+2 *646:b[7] 0.000543573
+3 *582:12 0.0586133
+4 *582:11 0.0580698
+5 *582:9 0.0728376
+6 *582:7 0.0729483
+7 *582:5 0.00226378
+8 *582:12 *607:14 0.130543
+*RES
+1 wbs_dat_i[15] *582:5 48.3368 
+2 *582:5 *582:7 2.52714 
+3 *582:7 *582:9 1690.23 
+4 *582:9 *582:11 15 
+5 *582:11 *582:12 1773.89 
+6 *582:12 *646:b[7] 27.2732 
+*END
+
+*D_NET *587 0.335921
+*CONN
+*P wbs_dat_i[1] I
+*I *646:a[1] I *D user_proj_example
+*CAP
+1 wbs_dat_i[1] 0.00214778
+2 *646:a[1] 0.000396341
+3 *587:12 0.0371486
+4 *587:11 0.0367522
+5 *587:9 0.072961
+6 *587:7 0.0732194
+7 *587:5 0.0024062
+8 *587:5 *619:13 3.36312e-06
+9 *587:12 *598:10 0.110886
+*RES
+1 wbs_dat_i[1] *587:5 48.3368 
+2 *587:5 *587:7 5.86214 
+3 *587:7 *587:9 1693.05 
+4 *587:9 *587:11 15 
+5 *587:11 *587:12 1239.34 
+6 *587:12 *646:a[1] 23.9796 
+*END
+
+*D_NET *598 0.407602
+*CONN
+*P wbs_dat_i[2] I
+*I *646:a[2] I *D user_proj_example
+*CAP
+1 wbs_dat_i[2] 6.5784e-05
+2 *646:a[2] 0.000431476
+3 *598:10 0.0161519
+4 *598:9 0.0157204
+5 *598:7 0.0750358
+6 *598:5 0.0751016
+7 *598:10 *601:14 0.114208
+8 *587:12 *598:10 0.110886
+*RES
+1 wbs_dat_i[2] *598:5 1.50179 
+2 *598:5 *598:7 1740.96 
+3 *598:7 *598:9 15 
+4 *598:9 *598:10 1268.4 
+5 *598:10 *646:a[2] 24.8082 
+*END
+
+*D_NET *601 0.414233
+*CONN
+*P wbs_dat_i[3] I
+*I *646:a[3] I *D user_proj_example
+*CAP
+1 wbs_dat_i[3] 0.000107523
+2 *646:a[3] 0.000446901
+3 *601:14 0.0169634
+4 *601:13 0.0165165
+5 *601:11 0.0729302
+6 *601:9 0.0730409
+7 *601:7 0.00220411
+8 *601:5 0.00220094
+9 *601:7 *633:13 0
+10 *601:14 *603:14 0.115614
+11 *598:10 *601:14 0.114208
+*RES
+1 wbs_dat_i[3] *601:5 2.45464 
+2 *601:5 *601:7 48.4093 
+3 *601:7 *601:9 2.52714 
+4 *601:9 *601:11 1692.35 
+5 *601:11 *601:13 15 
+6 *601:13 *601:14 1305.08 
+7 *601:14 *646:a[3] 25.1604 
+*END
+
+*D_NET *602 0.411001
+*CONN
+*P wbs_dat_i[4] I
+*I *646:a[4] I *D user_proj_example
+*CAP
+1 wbs_dat_i[4] 0.000776038
+2 *646:a[4] 9.16934e-05
+3 *602:15 0.00229514
+4 *602:13 0.00241849
+5 *602:11 0.0726812
+6 *602:10 0.0724662
+7 *602:8 0.0211258
+8 *602:7 0.0219018
+9 *602:7 *634:17 0
+10 *576:8 *602:8 0.103048
+11 *577:8 *602:8 0.114196
+*RES
+1 wbs_dat_i[4] *602:7 32.8557 
+2 *602:7 *602:8 1328.9 
+3 *602:8 *602:10 15 
+4 *602:10 *602:11 1681.45 
+5 *602:11 *602:13 4.90929 
+6 *602:13 *602:15 49.7971 
+7 *602:15 *646:a[4] 2.21643 
+*END
+
+*D_NET *603 0.427356
+*CONN
+*P wbs_dat_i[5] I
+*I *646:a[5] I *D user_proj_example
+*CAP
+1 wbs_dat_i[5] 0.000107523
+2 *646:a[5] 0.000422907
+3 *603:14 0.0184404
+4 *603:13 0.0180175
+5 *603:11 0.0729147
+6 *603:9 0.0730254
+7 *603:7 0.00221459
+8 *603:5 0.00221141
+9 *603:7 *635:13 0
+10 *603:14 *604:10 0.124387
+11 *601:14 *603:14 0.115614
+*RES
+1 wbs_dat_i[5] *603:5 2.45464 
+2 *603:5 *603:7 48.4093 
+3 *603:7 *603:9 2.52714 
+4 *603:9 *603:11 1691.99 
+5 *603:11 *603:13 15 
+6 *603:13 *603:14 1379.41 
+7 *603:14 *646:a[5] 24.5596 
+*END
+
+*D_NET *604 0.438202
+*CONN
+*P wbs_dat_i[6] I
+*I *646:a[6] I *D user_proj_example
+*CAP
+1 wbs_dat_i[6] 6.5784e-05
+2 *646:a[6] 0.000477751
+3 *604:10 0.0176779
+4 *604:9 0.0172001
+5 *604:7 0.075
+6 *604:5 0.0750658
+7 *604:10 *605:12 0.128327
+8 *603:14 *604:10 0.124387
+*RES
+1 wbs_dat_i[6] *604:5 1.50179 
+2 *604:5 *604:7 1739.91 
+3 *604:7 *604:9 15 
+4 *604:9 *604:10 1415.14 
+5 *604:10 *646:a[6] 25.8646 
+*END
+
+*D_NET *605 0.44733
+*CONN
+*P wbs_dat_i[7] I
+*I *646:a[7] I *D user_proj_example
+*CAP
+1 wbs_dat_i[7] 0.00215812
+2 *646:a[7] 0.000453757
+3 *605:12 0.0183095
+4 *605:11 0.0178557
+5 *605:9 0.0728839
+6 *605:7 0.0731423
+7 *605:5 0.00241654
+8 *605:5 *637:13 3.36312e-06
+9 *605:12 *606:12 0.131779
+10 *604:10 *605:12 0.128327
+*RES
+1 wbs_dat_i[7] *605:5 48.3368 
+2 *605:5 *605:7 5.86214 
+3 *605:7 *605:9 1691.29 
+4 *605:9 *605:11 15 
+5 *605:11 *605:12 1459.92 
+6 *605:12 *646:a[7] 25.2639 
+*END
+
+*D_NET *606 0.458872
+*CONN
+*P wbs_dat_i[8] I
+*I *646:b[0] I *D user_proj_example
+*CAP
+1 wbs_dat_i[8] 0.00215792
+2 *646:b[0] 0.000515043
+3 *606:12 0.0185937
+4 *606:11 0.0180786
+5 *606:9 0.074832
+6 *606:7 0.0749438
+7 *606:5 0.00226975
+8 *606:12 *607:14 0.135702
+9 *605:12 *606:12 0.131779
+*RES
+1 wbs_dat_i[8] *606:5 48.3368 
+2 *606:5 *606:7 2.52714 
+3 *606:7 *606:9 1690.94 
+4 *606:9 *606:11 15 
+5 *606:11 *606:12 1495.65 
+6 *606:12 *646:b[0] 26.5689 
+*END
+
+*D_NET *607 0.458556
+*CONN
+*P wbs_dat_i[9] I
+*I *646:b[1] I *D user_proj_example
+*CAP
+1 wbs_dat_i[9] 0.000108482
+2 *646:b[1] 0.000524027
+3 *607:14 0.0208958
+4 *607:13 0.0203718
+5 *607:11 0.072853
+6 *607:9 0.0730472
+7 *607:7 0.00229807
+8 *607:5 0.00221237
+9 *582:12 *607:14 0.130543
+10 *606:12 *607:14 0.135702
+*RES
+1 wbs_dat_i[9] *607:5 2.45464 
+2 *607:5 *607:7 48.4093 
+3 *607:7 *607:9 4.43286 
+4 *607:9 *607:11 1690.59 
+5 *607:11 *607:13 15 
+6 *607:13 *607:14 1539.49 
+7 *607:14 *646:b[1] 26.9211 
+*END
+
+*D_NET *608 0.394424
+*CONN
+*P wbs_dat_o[0] O
+*I *646:p[0] O *D user_proj_example
+*CAP
+1 wbs_dat_o[0] 6.6349e-05
+2 *646:p[0] 0.00062225
+3 *608:13 0.105427
+4 *608:12 0.10536
+5 *608:10 0.0360767
+6 *608:9 0.036699
+7 *608:10 *619:10 0.110173
+8 *576:7 *608:13 0
+*RES
+1 *646:p[0] *608:9 27.6254 
+2 *608:9 *608:10 1224.09 
+3 *608:10 *608:12 15 
+4 *608:12 *608:13 2380.81 
+5 *608:13 wbs_dat_o[0] 1.50179 
+*END
+
+*D_NET *619 0.470083
+*CONN
+*P wbs_dat_o[1] O
+*I *646:p[1] O *D user_proj_example
+*CAP
+1 wbs_dat_o[1] 0.000107523
+2 *646:p[1] 0.000599463
+3 *619:17 0.00222879
+4 *619:15 0.00223197
+5 *619:13 0.100623
+6 *619:12 0.100512
+7 *619:10 0.0174042
+8 *619:9 0.0180036
+9 *619:10 *630:10 0.118196
+10 *587:5 *619:13 3.36312e-06
+11 *608:10 *619:10 0.110173
+*RES
+1 *646:p[1] *619:9 27.2732 
+2 *619:9 *619:10 1318.9 
+3 *619:10 *619:12 15 
+4 *619:12 *619:13 2332.19 
+5 *619:13 *619:15 2.52714 
+6 *619:15 *619:17 48.4093 
+7 *619:17 wbs_dat_o[1] 2.45464 
+*END
+
+*D_NET *630 0.488087
+*CONN
+*P wbs_dat_o[2] O
+*I *646:p[2] O *D user_proj_example
+*CAP
+1 wbs_dat_o[2] 0.00211746
+2 *646:p[2] 0.00051205
+3 *630:13 0.102623
+4 *630:12 0.100506
+5 *630:10 0.0183063
+6 *630:9 0.0188183
+7 *630:10 *633:10 0.127008
+8 *619:10 *630:10 0.118196
+*RES
+1 *646:p[2] *630:9 25.4918 
+2 *630:9 *630:10 1407.99 
+3 *630:10 *630:12 15 
+4 *630:12 *630:13 2331.84 
+5 *630:13 wbs_dat_o[2] 48.9582 
+*END
+
+*D_NET *633 0.50794
+*CONN
+*P wbs_dat_o[3] O
+*I *646:p[3] O *D user_proj_example
+*CAP
+1 wbs_dat_o[3] 0.00214598
+2 *646:p[3] 0.000545645
+3 *633:15 0.00231964
+4 *633:13 0.100677
+5 *633:12 0.100503
+6 *633:10 0.0193145
+7 *633:9 0.0198602
+8 *633:10 *634:10 0.135566
+9 *601:7 *633:13 0
+10 *630:10 *633:10 0.127008
+*RES
+1 *646:p[3] *633:9 26.5689 
+2 *633:9 *633:10 1501.37 
+3 *633:10 *633:12 15 
+4 *633:12 *633:13 2331.49 
+5 *633:13 *633:15 3.95643 
+6 *633:15 wbs_dat_o[3] 48.3368 
+*END
+
+*D_NET *634 0.52756
+*CONN
+*P wbs_dat_o[4] O
+*I *646:p[4] O *D user_proj_example
+*CAP
+1 wbs_dat_o[4] 0.000107661
+2 *646:p[4] 0.00052011
+3 *634:17 0.00225651
+4 *634:15 0.00234465
+5 *634:13 0.100683
+6 *634:12 0.100488
+7 *634:10 0.0204168
+8 *634:9 0.0209369
+9 *634:10 *635:10 0.14424
+10 *602:7 *634:17 0
+11 *633:10 *634:10 0.135566
+*RES
+1 *646:p[4] *634:9 26.2168 
+2 *634:9 *634:10 1596.18 
+3 *634:10 *634:12 15 
+4 *634:12 *634:13 2331.13 
+5 *634:13 *634:15 4.43286 
+6 *634:15 *634:17 48.4093 
+7 *634:17 wbs_dat_o[4] 2.45464 
+*END
+
+*D_NET *635 0.54662
+*CONN
+*P wbs_dat_o[5] O
+*I *646:p[5] O *D user_proj_example
+*CAP
+1 wbs_dat_o[5] 0.000107523
+2 *646:p[5] 0.000494575
+3 *635:17 0.0022595
+4 *635:13 0.102632
+5 *635:12 0.10048
+6 *635:10 0.0214902
+7 *635:9 0.0219848
+8 *635:10 *636:10 0.152931
+9 *603:7 *635:13 0
+10 *634:10 *635:10 0.14424
+*RES
+1 *646:p[5] *635:9 25.8646 
+2 *635:9 *635:10 1690.99 
+3 *635:10 *635:12 15 
+4 *635:12 *635:13 2330.78 
+5 *635:13 *635:17 49.5071 
+6 *635:17 wbs_dat_o[5] 2.45464 
+*END
+
+*D_NET *636 0.566309
+*CONN
+*P wbs_dat_o[6] O
+*I *646:p[6] O *D user_proj_example
+*CAP
+1 wbs_dat_o[6] 0.00212793
+2 *646:p[6] 0.000440616
+3 *636:13 0.102603
+4 *636:12 0.100475
+5 *636:10 0.0224662
+6 *636:9 0.0229068
+7 *636:10 *637:10 0.162359
+8 *635:10 *636:10 0.152931
+*RES
+1 *646:p[6] *636:9 24.5596 
+2 *636:9 *636:10 1786.75 
+3 *636:10 *636:12 15 
+4 *636:12 *636:13 2330.43 
+5 *636:13 wbs_dat_o[6] 48.9582 
+*END
+
+*D_NET *637 0.483283
+*CONN
+*P wbs_dat_o[7] O
+*I *646:p[7] O *D user_proj_example
+*CAP
+1 wbs_dat_o[7] 0.000107523
+2 *646:p[7] 0.000443505
+3 *637:17 0.0022392
+4 *637:15 0.00224237
+5 *637:13 0.100581
+6 *637:12 0.10047
+7 *637:10 0.0571965
+8 *637:9 0.05764
+9 *605:5 *637:13 3.36312e-06
+10 *636:10 *637:10 0.162359
+*RES
+1 *646:p[7] *637:9 25.1604 
+2 *637:9 *637:10 1887.76 
+3 *637:10 *637:12 15 
+4 *637:12 *637:13 2330.08 
+5 *637:13 *637:15 2.52714 
+6 *637:15 *637:17 48.4093 
+7 *637:17 wbs_dat_o[7] 2.45464 
+*END

signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.min.spef

diff --git a/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.min.spef b/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.min.spef
new file mode 100644
index 0000000..69f7a8e
--- /dev/null
+++ b/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.min.spef
@@ -0,0 +1,1803 @@
+*SPEF "ieee 1481-1999"
+*DESIGN "user_project_wrapper"
+*DATE "11:11:11 Fri 11 11, 1111"
+*VENDOR "OpenRCX"
+*PROGRAM "Parallel Extraction"
+*VERSION "1.0"
+*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE"
+*DIVIDER /
+*DELIMITER :
+*BUS_DELIMITER []
+*T_UNIT 1 NS
+*C_UNIT 1 PF
+*R_UNIT 1 OHM
+*L_UNIT 1 HENRY
+
+*NAME_MAP
+*1 analog_io[0]
+*2 analog_io[10]
+*3 analog_io[11]
+*4 analog_io[12]
+*5 analog_io[13]
+*6 analog_io[14]
+*7 analog_io[15]
+*8 analog_io[16]
+*9 analog_io[17]
+*10 analog_io[18]
+*11 analog_io[19]
+*12 analog_io[1]
+*13 analog_io[20]
+*14 analog_io[21]
+*15 analog_io[22]
+*16 analog_io[23]
+*17 analog_io[24]
+*18 analog_io[25]
+*19 analog_io[26]
+*20 analog_io[27]
+*21 analog_io[28]
+*22 analog_io[2]
+*23 analog_io[3]
+*24 analog_io[4]
+*25 analog_io[5]
+*26 analog_io[6]
+*27 analog_io[7]
+*28 analog_io[8]
+*29 analog_io[9]
+*30 io_in[0]
+*31 io_in[10]
+*32 io_in[11]
+*33 io_in[12]
+*34 io_in[13]
+*35 io_in[14]
+*36 io_in[15]
+*37 io_in[16]
+*38 io_in[17]
+*39 io_in[18]
+*40 io_in[19]
+*41 io_in[1]
+*42 io_in[20]
+*43 io_in[21]
+*44 io_in[22]
+*45 io_in[23]
+*46 io_in[24]
+*47 io_in[25]
+*48 io_in[26]
+*49 io_in[27]
+*50 io_in[28]
+*51 io_in[29]
+*52 io_in[2]
+*53 io_in[30]
+*54 io_in[31]
+*55 io_in[32]
+*56 io_in[33]
+*57 io_in[34]
+*58 io_in[35]
+*59 io_in[36]
+*60 io_in[37]
+*61 io_in[3]
+*62 io_in[4]
+*63 io_in[5]
+*64 io_in[6]
+*65 io_in[7]
+*66 io_in[8]
+*67 io_in[9]
+*68 io_oeb[0]
+*69 io_oeb[10]
+*70 io_oeb[11]
+*71 io_oeb[12]
+*72 io_oeb[13]
+*73 io_oeb[14]
+*74 io_oeb[15]
+*75 io_oeb[16]
+*76 io_oeb[17]
+*77 io_oeb[18]
+*78 io_oeb[19]
+*79 io_oeb[1]
+*80 io_oeb[20]
+*81 io_oeb[21]
+*82 io_oeb[22]
+*83 io_oeb[23]
+*84 io_oeb[24]
+*85 io_oeb[25]
+*86 io_oeb[26]
+*87 io_oeb[27]
+*88 io_oeb[28]
+*89 io_oeb[29]
+*90 io_oeb[2]
+*91 io_oeb[30]
+*92 io_oeb[31]
+*93 io_oeb[32]
+*94 io_oeb[33]
+*95 io_oeb[34]
+*96 io_oeb[35]
+*97 io_oeb[36]
+*98 io_oeb[37]
+*99 io_oeb[3]
+*100 io_oeb[4]
+*101 io_oeb[5]
+*102 io_oeb[6]
+*103 io_oeb[7]
+*104 io_oeb[8]
+*105 io_oeb[9]
+*106 io_out[0]
+*107 io_out[10]
+*108 io_out[11]
+*109 io_out[12]
+*110 io_out[13]
+*111 io_out[14]
+*112 io_out[15]
+*113 io_out[16]
+*114 io_out[17]
+*115 io_out[18]
+*116 io_out[19]
+*117 io_out[1]
+*118 io_out[20]
+*119 io_out[21]
+*120 io_out[22]
+*121 io_out[23]
+*122 io_out[24]
+*123 io_out[25]
+*124 io_out[26]
+*125 io_out[27]
+*126 io_out[28]
+*127 io_out[29]
+*128 io_out[2]
+*129 io_out[30]
+*130 io_out[31]
+*131 io_out[32]
+*132 io_out[33]
+*133 io_out[34]
+*134 io_out[35]
+*135 io_out[36]
+*136 io_out[37]
+*137 io_out[3]
+*138 io_out[4]
+*139 io_out[5]
+*140 io_out[6]
+*141 io_out[7]
+*142 io_out[8]
+*143 io_out[9]
+*144 la_data_in[0]
+*145 la_data_in[100]
+*146 la_data_in[101]
+*147 la_data_in[102]
+*148 la_data_in[103]
+*149 la_data_in[104]
+*150 la_data_in[105]
+*151 la_data_in[106]
+*152 la_data_in[107]
+*153 la_data_in[108]
+*154 la_data_in[109]
+*155 la_data_in[10]
+*156 la_data_in[110]
+*157 la_data_in[111]
+*158 la_data_in[112]
+*159 la_data_in[113]
+*160 la_data_in[114]
+*161 la_data_in[115]
+*162 la_data_in[116]
+*163 la_data_in[117]
+*164 la_data_in[118]
+*165 la_data_in[119]
+*166 la_data_in[11]
+*167 la_data_in[120]
+*168 la_data_in[121]
+*169 la_data_in[122]
+*170 la_data_in[123]
+*171 la_data_in[124]
+*172 la_data_in[125]
+*173 la_data_in[126]
+*174 la_data_in[127]
+*175 la_data_in[12]
+*176 la_data_in[13]
+*177 la_data_in[14]
+*178 la_data_in[15]
+*179 la_data_in[16]
+*180 la_data_in[17]
+*181 la_data_in[18]
+*182 la_data_in[19]
+*183 la_data_in[1]
+*184 la_data_in[20]
+*185 la_data_in[21]
+*186 la_data_in[22]
+*187 la_data_in[23]
+*188 la_data_in[24]
+*189 la_data_in[25]
+*190 la_data_in[26]
+*191 la_data_in[27]
+*192 la_data_in[28]
+*193 la_data_in[29]
+*194 la_data_in[2]
+*195 la_data_in[30]
+*196 la_data_in[31]
+*197 la_data_in[32]
+*198 la_data_in[33]
+*199 la_data_in[34]
+*200 la_data_in[35]
+*201 la_data_in[36]
+*202 la_data_in[37]
+*203 la_data_in[38]
+*204 la_data_in[39]
+*205 la_data_in[3]
+*206 la_data_in[40]
+*207 la_data_in[41]
+*208 la_data_in[42]
+*209 la_data_in[43]
+*210 la_data_in[44]
+*211 la_data_in[45]
+*212 la_data_in[46]
+*213 la_data_in[47]
+*214 la_data_in[48]
+*215 la_data_in[49]
+*216 la_data_in[4]
+*217 la_data_in[50]
+*218 la_data_in[51]
+*219 la_data_in[52]
+*220 la_data_in[53]
+*221 la_data_in[54]
+*222 la_data_in[55]
+*223 la_data_in[56]
+*224 la_data_in[57]
+*225 la_data_in[58]
+*226 la_data_in[59]
+*227 la_data_in[5]
+*228 la_data_in[60]
+*229 la_data_in[61]
+*230 la_data_in[62]
+*231 la_data_in[63]
+*232 la_data_in[64]
+*233 la_data_in[65]
+*234 la_data_in[66]
+*235 la_data_in[67]
+*236 la_data_in[68]
+*237 la_data_in[69]
+*238 la_data_in[6]
+*239 la_data_in[70]
+*240 la_data_in[71]
+*241 la_data_in[72]
+*242 la_data_in[73]
+*243 la_data_in[74]
+*244 la_data_in[75]
+*245 la_data_in[76]
+*246 la_data_in[77]
+*247 la_data_in[78]
+*248 la_data_in[79]
+*249 la_data_in[7]
+*250 la_data_in[80]
+*251 la_data_in[81]
+*252 la_data_in[82]
+*253 la_data_in[83]
+*254 la_data_in[84]
+*255 la_data_in[85]
+*256 la_data_in[86]
+*257 la_data_in[87]
+*258 la_data_in[88]
+*259 la_data_in[89]
+*260 la_data_in[8]
+*261 la_data_in[90]
+*262 la_data_in[91]
+*263 la_data_in[92]
+*264 la_data_in[93]
+*265 la_data_in[94]
+*266 la_data_in[95]
+*267 la_data_in[96]
+*268 la_data_in[97]
+*269 la_data_in[98]
+*270 la_data_in[99]
+*271 la_data_in[9]
+*272 la_data_out[0]
+*273 la_data_out[100]
+*274 la_data_out[101]
+*275 la_data_out[102]
+*276 la_data_out[103]
+*277 la_data_out[104]
+*278 la_data_out[105]
+*279 la_data_out[106]
+*280 la_data_out[107]
+*281 la_data_out[108]
+*282 la_data_out[109]
+*283 la_data_out[10]
+*284 la_data_out[110]
+*285 la_data_out[111]
+*286 la_data_out[112]
+*287 la_data_out[113]
+*288 la_data_out[114]
+*289 la_data_out[115]
+*290 la_data_out[116]
+*291 la_data_out[117]
+*292 la_data_out[118]
+*293 la_data_out[119]
+*294 la_data_out[11]
+*295 la_data_out[120]
+*296 la_data_out[121]
+*297 la_data_out[122]
+*298 la_data_out[123]
+*299 la_data_out[124]
+*300 la_data_out[125]
+*301 la_data_out[126]
+*302 la_data_out[127]
+*303 la_data_out[12]
+*304 la_data_out[13]
+*305 la_data_out[14]
+*306 la_data_out[15]
+*307 la_data_out[16]
+*308 la_data_out[17]
+*309 la_data_out[18]
+*310 la_data_out[19]
+*311 la_data_out[1]
+*312 la_data_out[20]
+*313 la_data_out[21]
+*314 la_data_out[22]
+*315 la_data_out[23]
+*316 la_data_out[24]
+*317 la_data_out[25]
+*318 la_data_out[26]
+*319 la_data_out[27]
+*320 la_data_out[28]
+*321 la_data_out[29]
+*322 la_data_out[2]
+*323 la_data_out[30]
+*324 la_data_out[31]
+*325 la_data_out[32]
+*326 la_data_out[33]
+*327 la_data_out[34]
+*328 la_data_out[35]
+*329 la_data_out[36]
+*330 la_data_out[37]
+*331 la_data_out[38]
+*332 la_data_out[39]
+*333 la_data_out[3]
+*334 la_data_out[40]
+*335 la_data_out[41]
+*336 la_data_out[42]
+*337 la_data_out[43]
+*338 la_data_out[44]
+*339 la_data_out[45]
+*340 la_data_out[46]
+*341 la_data_out[47]
+*342 la_data_out[48]
+*343 la_data_out[49]
+*344 la_data_out[4]
+*345 la_data_out[50]
+*346 la_data_out[51]
+*347 la_data_out[52]
+*348 la_data_out[53]
+*349 la_data_out[54]
+*350 la_data_out[55]
+*351 la_data_out[56]
+*352 la_data_out[57]
+*353 la_data_out[58]
+*354 la_data_out[59]
+*355 la_data_out[5]
+*356 la_data_out[60]
+*357 la_data_out[61]
+*358 la_data_out[62]
+*359 la_data_out[63]
+*360 la_data_out[64]
+*361 la_data_out[65]
+*362 la_data_out[66]
+*363 la_data_out[67]
+*364 la_data_out[68]
+*365 la_data_out[69]
+*366 la_data_out[6]
+*367 la_data_out[70]
+*368 la_data_out[71]
+*369 la_data_out[72]
+*370 la_data_out[73]
+*371 la_data_out[74]
+*372 la_data_out[75]
+*373 la_data_out[76]
+*374 la_data_out[77]
+*375 la_data_out[78]
+*376 la_data_out[79]
+*377 la_data_out[7]
+*378 la_data_out[80]
+*379 la_data_out[81]
+*380 la_data_out[82]
+*381 la_data_out[83]
+*382 la_data_out[84]
+*383 la_data_out[85]
+*384 la_data_out[86]
+*385 la_data_out[87]
+*386 la_data_out[88]
+*387 la_data_out[89]
+*388 la_data_out[8]
+*389 la_data_out[90]
+*390 la_data_out[91]
+*391 la_data_out[92]
+*392 la_data_out[93]
+*393 la_data_out[94]
+*394 la_data_out[95]
+*395 la_data_out[96]
+*396 la_data_out[97]
+*397 la_data_out[98]
+*398 la_data_out[99]
+*399 la_data_out[9]
+*400 la_oenb[0]
+*401 la_oenb[100]
+*402 la_oenb[101]
+*403 la_oenb[102]
+*404 la_oenb[103]
+*405 la_oenb[104]
+*406 la_oenb[105]
+*407 la_oenb[106]
+*408 la_oenb[107]
+*409 la_oenb[108]
+*410 la_oenb[109]
+*411 la_oenb[10]
+*412 la_oenb[110]
+*413 la_oenb[111]
+*414 la_oenb[112]
+*415 la_oenb[113]
+*416 la_oenb[114]
+*417 la_oenb[115]
+*418 la_oenb[116]
+*419 la_oenb[117]
+*420 la_oenb[118]
+*421 la_oenb[119]
+*422 la_oenb[11]
+*423 la_oenb[120]
+*424 la_oenb[121]
+*425 la_oenb[122]
+*426 la_oenb[123]
+*427 la_oenb[124]
+*428 la_oenb[125]
+*429 la_oenb[126]
+*430 la_oenb[127]
+*431 la_oenb[12]
+*432 la_oenb[13]
+*433 la_oenb[14]
+*434 la_oenb[15]
+*435 la_oenb[16]
+*436 la_oenb[17]
+*437 la_oenb[18]
+*438 la_oenb[19]
+*439 la_oenb[1]
+*440 la_oenb[20]
+*441 la_oenb[21]
+*442 la_oenb[22]
+*443 la_oenb[23]
+*444 la_oenb[24]
+*445 la_oenb[25]
+*446 la_oenb[26]
+*447 la_oenb[27]
+*448 la_oenb[28]
+*449 la_oenb[29]
+*450 la_oenb[2]
+*451 la_oenb[30]
+*452 la_oenb[31]
+*453 la_oenb[32]
+*454 la_oenb[33]
+*455 la_oenb[34]
+*456 la_oenb[35]
+*457 la_oenb[36]
+*458 la_oenb[37]
+*459 la_oenb[38]
+*460 la_oenb[39]
+*461 la_oenb[3]
+*462 la_oenb[40]
+*463 la_oenb[41]
+*464 la_oenb[42]
+*465 la_oenb[43]
+*466 la_oenb[44]
+*467 la_oenb[45]
+*468 la_oenb[46]
+*469 la_oenb[47]
+*470 la_oenb[48]
+*471 la_oenb[49]
+*472 la_oenb[4]
+*473 la_oenb[50]
+*474 la_oenb[51]
+*475 la_oenb[52]
+*476 la_oenb[53]
+*477 la_oenb[54]
+*478 la_oenb[55]
+*479 la_oenb[56]
+*480 la_oenb[57]
+*481 la_oenb[58]
+*482 la_oenb[59]
+*483 la_oenb[5]
+*484 la_oenb[60]
+*485 la_oenb[61]
+*486 la_oenb[62]
+*487 la_oenb[63]
+*488 la_oenb[64]
+*489 la_oenb[65]
+*490 la_oenb[66]
+*491 la_oenb[67]
+*492 la_oenb[68]
+*493 la_oenb[69]
+*494 la_oenb[6]
+*495 la_oenb[70]
+*496 la_oenb[71]
+*497 la_oenb[72]
+*498 la_oenb[73]
+*499 la_oenb[74]
+*500 la_oenb[75]
+*501 la_oenb[76]
+*502 la_oenb[77]
+*503 la_oenb[78]
+*504 la_oenb[79]
+*505 la_oenb[7]
+*506 la_oenb[80]
+*507 la_oenb[81]
+*508 la_oenb[82]
+*509 la_oenb[83]
+*510 la_oenb[84]
+*511 la_oenb[85]
+*512 la_oenb[86]
+*513 la_oenb[87]
+*514 la_oenb[88]
+*515 la_oenb[89]
+*516 la_oenb[8]
+*517 la_oenb[90]
+*518 la_oenb[91]
+*519 la_oenb[92]
+*520 la_oenb[93]
+*521 la_oenb[94]
+*522 la_oenb[95]
+*523 la_oenb[96]
+*524 la_oenb[97]
+*525 la_oenb[98]
+*526 la_oenb[99]
+*527 la_oenb[9]
+*528 user_clock2
+*529 user_irq[0]
+*530 user_irq[1]
+*531 user_irq[2]
+*540 wb_clk_i
+*541 wb_rst_i
+*542 wbs_ack_o
+*543 wbs_adr_i[0]
+*544 wbs_adr_i[10]
+*545 wbs_adr_i[11]
+*546 wbs_adr_i[12]
+*547 wbs_adr_i[13]
+*548 wbs_adr_i[14]
+*549 wbs_adr_i[15]
+*550 wbs_adr_i[16]
+*551 wbs_adr_i[17]
+*552 wbs_adr_i[18]
+*553 wbs_adr_i[19]
+*554 wbs_adr_i[1]
+*555 wbs_adr_i[20]
+*556 wbs_adr_i[21]
+*557 wbs_adr_i[22]
+*558 wbs_adr_i[23]
+*559 wbs_adr_i[24]
+*560 wbs_adr_i[25]
+*561 wbs_adr_i[26]
+*562 wbs_adr_i[27]
+*563 wbs_adr_i[28]
+*564 wbs_adr_i[29]
+*565 wbs_adr_i[2]
+*566 wbs_adr_i[30]
+*567 wbs_adr_i[31]
+*568 wbs_adr_i[3]
+*569 wbs_adr_i[4]
+*570 wbs_adr_i[5]
+*571 wbs_adr_i[6]
+*572 wbs_adr_i[7]
+*573 wbs_adr_i[8]
+*574 wbs_adr_i[9]
+*575 wbs_cyc_i
+*576 wbs_dat_i[0]
+*577 wbs_dat_i[10]
+*578 wbs_dat_i[11]
+*579 wbs_dat_i[12]
+*580 wbs_dat_i[13]
+*581 wbs_dat_i[14]
+*582 wbs_dat_i[15]
+*583 wbs_dat_i[16]
+*584 wbs_dat_i[17]
+*585 wbs_dat_i[18]
+*586 wbs_dat_i[19]
+*587 wbs_dat_i[1]
+*588 wbs_dat_i[20]
+*589 wbs_dat_i[21]
+*590 wbs_dat_i[22]
+*591 wbs_dat_i[23]
+*592 wbs_dat_i[24]
+*593 wbs_dat_i[25]
+*594 wbs_dat_i[26]
+*595 wbs_dat_i[27]
+*596 wbs_dat_i[28]
+*597 wbs_dat_i[29]
+*598 wbs_dat_i[2]
+*599 wbs_dat_i[30]
+*600 wbs_dat_i[31]
+*601 wbs_dat_i[3]
+*602 wbs_dat_i[4]
+*603 wbs_dat_i[5]
+*604 wbs_dat_i[6]
+*605 wbs_dat_i[7]
+*606 wbs_dat_i[8]
+*607 wbs_dat_i[9]
+*608 wbs_dat_o[0]
+*609 wbs_dat_o[10]
+*610 wbs_dat_o[11]
+*611 wbs_dat_o[12]
+*612 wbs_dat_o[13]
+*613 wbs_dat_o[14]
+*614 wbs_dat_o[15]
+*615 wbs_dat_o[16]
+*616 wbs_dat_o[17]
+*617 wbs_dat_o[18]
+*618 wbs_dat_o[19]
+*619 wbs_dat_o[1]
+*620 wbs_dat_o[20]
+*621 wbs_dat_o[21]
+*622 wbs_dat_o[22]
+*623 wbs_dat_o[23]
+*624 wbs_dat_o[24]
+*625 wbs_dat_o[25]
+*626 wbs_dat_o[26]
+*627 wbs_dat_o[27]
+*628 wbs_dat_o[28]
+*629 wbs_dat_o[29]
+*630 wbs_dat_o[2]
+*631 wbs_dat_o[30]
+*632 wbs_dat_o[31]
+*633 wbs_dat_o[3]
+*634 wbs_dat_o[4]
+*635 wbs_dat_o[5]
+*636 wbs_dat_o[6]
+*637 wbs_dat_o[7]
+*638 wbs_dat_o[8]
+*639 wbs_dat_o[9]
+*640 wbs_sel_i[0]
+*641 wbs_sel_i[1]
+*642 wbs_sel_i[2]
+*643 wbs_sel_i[3]
+*644 wbs_stb_i
+*645 wbs_we_i
+*646 mprj
+
+*PORTS
+analog_io[0] I
+analog_io[10] I
+analog_io[11] I
+analog_io[12] I
+analog_io[13] I
+analog_io[14] I
+analog_io[15] I
+analog_io[16] I
+analog_io[17] I
+analog_io[18] I
+analog_io[19] I
+analog_io[1] I
+analog_io[20] I
+analog_io[21] I
+analog_io[22] I
+analog_io[23] I
+analog_io[24] I
+analog_io[25] I
+analog_io[26] I
+analog_io[27] I
+analog_io[28] I
+analog_io[2] I
+analog_io[3] I
+analog_io[4] I
+analog_io[5] I
+analog_io[6] I
+analog_io[7] I
+analog_io[8] I
+analog_io[9] I
+io_in[0] I
+io_in[10] I
+io_in[11] I
+io_in[12] I
+io_in[13] I
+io_in[14] I
+io_in[15] I
+io_in[16] I
+io_in[17] I
+io_in[18] I
+io_in[19] I
+io_in[1] I
+io_in[20] I
+io_in[21] I
+io_in[22] I
+io_in[23] I
+io_in[24] I
+io_in[25] I
+io_in[26] I
+io_in[27] I
+io_in[28] I
+io_in[29] I
+io_in[2] I
+io_in[30] I
+io_in[31] I
+io_in[32] I
+io_in[33] I
+io_in[34] I
+io_in[35] I
+io_in[36] I
+io_in[37] I
+io_in[3] I
+io_in[4] I
+io_in[5] I
+io_in[6] I
+io_in[7] I
+io_in[8] I
+io_in[9] I
+io_oeb[0] O
+io_oeb[10] O
+io_oeb[11] O
+io_oeb[12] O
+io_oeb[13] O
+io_oeb[14] O
+io_oeb[15] O
+io_oeb[16] O
+io_oeb[17] O
+io_oeb[18] O
+io_oeb[19] O
+io_oeb[1] O
+io_oeb[20] O
+io_oeb[21] O
+io_oeb[22] O
+io_oeb[23] O
+io_oeb[24] O
+io_oeb[25] O
+io_oeb[26] O
+io_oeb[27] O
+io_oeb[28] O
+io_oeb[29] O
+io_oeb[2] O
+io_oeb[30] O
+io_oeb[31] O
+io_oeb[32] O
+io_oeb[33] O
+io_oeb[34] O
+io_oeb[35] O
+io_oeb[36] O
+io_oeb[37] O
+io_oeb[3] O
+io_oeb[4] O
+io_oeb[5] O
+io_oeb[6] O
+io_oeb[7] O
+io_oeb[8] O
+io_oeb[9] O
+io_out[0] O
+io_out[10] O
+io_out[11] O
+io_out[12] O
+io_out[13] O
+io_out[14] O
+io_out[15] O
+io_out[16] O
+io_out[17] O
+io_out[18] O
+io_out[19] O
+io_out[1] O
+io_out[20] O
+io_out[21] O
+io_out[22] O
+io_out[23] O
+io_out[24] O
+io_out[25] O
+io_out[26] O
+io_out[27] O
+io_out[28] O
+io_out[29] O
+io_out[2] O
+io_out[30] O
+io_out[31] O
+io_out[32] O
+io_out[33] O
+io_out[34] O
+io_out[35] O
+io_out[36] O
+io_out[37] O
+io_out[3] O
+io_out[4] O
+io_out[5] O
+io_out[6] O
+io_out[7] O
+io_out[8] O
+io_out[9] O
+la_data_in[0] I
+la_data_in[100] I
+la_data_in[101] I
+la_data_in[102] I
+la_data_in[103] I
+la_data_in[104] I
+la_data_in[105] I
+la_data_in[106] I
+la_data_in[107] I
+la_data_in[108] I
+la_data_in[109] I
+la_data_in[10] I
+la_data_in[110] I
+la_data_in[111] I
+la_data_in[112] I
+la_data_in[113] I
+la_data_in[114] I
+la_data_in[115] I
+la_data_in[116] I
+la_data_in[117] I
+la_data_in[118] I
+la_data_in[119] I
+la_data_in[11] I
+la_data_in[120] I
+la_data_in[121] I
+la_data_in[122] I
+la_data_in[123] I
+la_data_in[124] I
+la_data_in[125] I
+la_data_in[126] I
+la_data_in[127] I
+la_data_in[12] I
+la_data_in[13] I
+la_data_in[14] I
+la_data_in[15] I
+la_data_in[16] I
+la_data_in[17] I
+la_data_in[18] I
+la_data_in[19] I
+la_data_in[1] I
+la_data_in[20] I
+la_data_in[21] I
+la_data_in[22] I
+la_data_in[23] I
+la_data_in[24] I
+la_data_in[25] I
+la_data_in[26] I
+la_data_in[27] I
+la_data_in[28] I
+la_data_in[29] I
+la_data_in[2] I
+la_data_in[30] I
+la_data_in[31] I
+la_data_in[32] I
+la_data_in[33] I
+la_data_in[34] I
+la_data_in[35] I
+la_data_in[36] I
+la_data_in[37] I
+la_data_in[38] I
+la_data_in[39] I
+la_data_in[3] I
+la_data_in[40] I
+la_data_in[41] I
+la_data_in[42] I
+la_data_in[43] I
+la_data_in[44] I
+la_data_in[45] I
+la_data_in[46] I
+la_data_in[47] I
+la_data_in[48] I
+la_data_in[49] I
+la_data_in[4] I
+la_data_in[50] I
+la_data_in[51] I
+la_data_in[52] I
+la_data_in[53] I
+la_data_in[54] I
+la_data_in[55] I
+la_data_in[56] I
+la_data_in[57] I
+la_data_in[58] I
+la_data_in[59] I
+la_data_in[5] I
+la_data_in[60] I
+la_data_in[61] I
+la_data_in[62] I
+la_data_in[63] I
+la_data_in[64] I
+la_data_in[65] I
+la_data_in[66] I
+la_data_in[67] I
+la_data_in[68] I
+la_data_in[69] I
+la_data_in[6] I
+la_data_in[70] I
+la_data_in[71] I
+la_data_in[72] I
+la_data_in[73] I
+la_data_in[74] I
+la_data_in[75] I
+la_data_in[76] I
+la_data_in[77] I
+la_data_in[78] I
+la_data_in[79] I
+la_data_in[7] I
+la_data_in[80] I
+la_data_in[81] I
+la_data_in[82] I
+la_data_in[83] I
+la_data_in[84] I
+la_data_in[85] I
+la_data_in[86] I
+la_data_in[87] I
+la_data_in[88] I
+la_data_in[89] I
+la_data_in[8] I
+la_data_in[90] I
+la_data_in[91] I
+la_data_in[92] I
+la_data_in[93] I
+la_data_in[94] I
+la_data_in[95] I
+la_data_in[96] I
+la_data_in[97] I
+la_data_in[98] I
+la_data_in[99] I
+la_data_in[9] I
+la_data_out[0] O
+la_data_out[100] O
+la_data_out[101] O
+la_data_out[102] O
+la_data_out[103] O
+la_data_out[104] O
+la_data_out[105] O
+la_data_out[106] O
+la_data_out[107] O
+la_data_out[108] O
+la_data_out[109] O
+la_data_out[10] O
+la_data_out[110] O
+la_data_out[111] O
+la_data_out[112] O
+la_data_out[113] O
+la_data_out[114] O
+la_data_out[115] O
+la_data_out[116] O
+la_data_out[117] O
+la_data_out[118] O
+la_data_out[119] O
+la_data_out[11] O
+la_data_out[120] O
+la_data_out[121] O
+la_data_out[122] O
+la_data_out[123] O
+la_data_out[124] O
+la_data_out[125] O
+la_data_out[126] O
+la_data_out[127] O
+la_data_out[12] O
+la_data_out[13] O
+la_data_out[14] O
+la_data_out[15] O
+la_data_out[16] O
+la_data_out[17] O
+la_data_out[18] O
+la_data_out[19] O
+la_data_out[1] O
+la_data_out[20] O
+la_data_out[21] O
+la_data_out[22] O
+la_data_out[23] O
+la_data_out[24] O
+la_data_out[25] O
+la_data_out[26] O
+la_data_out[27] O
+la_data_out[28] O
+la_data_out[29] O
+la_data_out[2] O
+la_data_out[30] O
+la_data_out[31] O
+la_data_out[32] O
+la_data_out[33] O
+la_data_out[34] O
+la_data_out[35] O
+la_data_out[36] O
+la_data_out[37] O
+la_data_out[38] O
+la_data_out[39] O
+la_data_out[3] O
+la_data_out[40] O
+la_data_out[41] O
+la_data_out[42] O
+la_data_out[43] O
+la_data_out[44] O
+la_data_out[45] O
+la_data_out[46] O
+la_data_out[47] O
+la_data_out[48] O
+la_data_out[49] O
+la_data_out[4] O
+la_data_out[50] O
+la_data_out[51] O
+la_data_out[52] O
+la_data_out[53] O
+la_data_out[54] O
+la_data_out[55] O
+la_data_out[56] O
+la_data_out[57] O
+la_data_out[58] O
+la_data_out[59] O
+la_data_out[5] O
+la_data_out[60] O
+la_data_out[61] O
+la_data_out[62] O
+la_data_out[63] O
+la_data_out[64] O
+la_data_out[65] O
+la_data_out[66] O
+la_data_out[67] O
+la_data_out[68] O
+la_data_out[69] O
+la_data_out[6] O
+la_data_out[70] O
+la_data_out[71] O
+la_data_out[72] O
+la_data_out[73] O
+la_data_out[74] O
+la_data_out[75] O
+la_data_out[76] O
+la_data_out[77] O
+la_data_out[78] O
+la_data_out[79] O
+la_data_out[7] O
+la_data_out[80] O
+la_data_out[81] O
+la_data_out[82] O
+la_data_out[83] O
+la_data_out[84] O
+la_data_out[85] O
+la_data_out[86] O
+la_data_out[87] O
+la_data_out[88] O
+la_data_out[89] O
+la_data_out[8] O
+la_data_out[90] O
+la_data_out[91] O
+la_data_out[92] O
+la_data_out[93] O
+la_data_out[94] O
+la_data_out[95] O
+la_data_out[96] O
+la_data_out[97] O
+la_data_out[98] O
+la_data_out[99] O
+la_data_out[9] O
+la_oenb[0] I
+la_oenb[100] I
+la_oenb[101] I
+la_oenb[102] I
+la_oenb[103] I
+la_oenb[104] I
+la_oenb[105] I
+la_oenb[106] I
+la_oenb[107] I
+la_oenb[108] I
+la_oenb[109] I
+la_oenb[10] I
+la_oenb[110] I
+la_oenb[111] I
+la_oenb[112] I
+la_oenb[113] I
+la_oenb[114] I
+la_oenb[115] I
+la_oenb[116] I
+la_oenb[117] I
+la_oenb[118] I
+la_oenb[119] I
+la_oenb[11] I
+la_oenb[120] I
+la_oenb[121] I
+la_oenb[122] I
+la_oenb[123] I
+la_oenb[124] I
+la_oenb[125] I
+la_oenb[126] I
+la_oenb[127] I
+la_oenb[12] I
+la_oenb[13] I
+la_oenb[14] I
+la_oenb[15] I
+la_oenb[16] I
+la_oenb[17] I
+la_oenb[18] I
+la_oenb[19] I
+la_oenb[1] I
+la_oenb[20] I
+la_oenb[21] I
+la_oenb[22] I
+la_oenb[23] I
+la_oenb[24] I
+la_oenb[25] I
+la_oenb[26] I
+la_oenb[27] I
+la_oenb[28] I
+la_oenb[29] I
+la_oenb[2] I
+la_oenb[30] I
+la_oenb[31] I
+la_oenb[32] I
+la_oenb[33] I
+la_oenb[34] I
+la_oenb[35] I
+la_oenb[36] I
+la_oenb[37] I
+la_oenb[38] I
+la_oenb[39] I
+la_oenb[3] I
+la_oenb[40] I
+la_oenb[41] I
+la_oenb[42] I
+la_oenb[43] I
+la_oenb[44] I
+la_oenb[45] I
+la_oenb[46] I
+la_oenb[47] I
+la_oenb[48] I
+la_oenb[49] I
+la_oenb[4] I
+la_oenb[50] I
+la_oenb[51] I
+la_oenb[52] I
+la_oenb[53] I
+la_oenb[54] I
+la_oenb[55] I
+la_oenb[56] I
+la_oenb[57] I
+la_oenb[58] I
+la_oenb[59] I
+la_oenb[5] I
+la_oenb[60] I
+la_oenb[61] I
+la_oenb[62] I
+la_oenb[63] I
+la_oenb[64] I
+la_oenb[65] I
+la_oenb[66] I
+la_oenb[67] I
+la_oenb[68] I
+la_oenb[69] I
+la_oenb[6] I
+la_oenb[70] I
+la_oenb[71] I
+la_oenb[72] I
+la_oenb[73] I
+la_oenb[74] I
+la_oenb[75] I
+la_oenb[76] I
+la_oenb[77] I
+la_oenb[78] I
+la_oenb[79] I
+la_oenb[7] I
+la_oenb[80] I
+la_oenb[81] I
+la_oenb[82] I
+la_oenb[83] I
+la_oenb[84] I
+la_oenb[85] I
+la_oenb[86] I
+la_oenb[87] I
+la_oenb[88] I
+la_oenb[89] I
+la_oenb[8] I
+la_oenb[90] I
+la_oenb[91] I
+la_oenb[92] I
+la_oenb[93] I
+la_oenb[94] I
+la_oenb[95] I
+la_oenb[96] I
+la_oenb[97] I
+la_oenb[98] I
+la_oenb[99] I
+la_oenb[9] I
+user_clock2 I
+user_irq[0] O
+user_irq[1] O
+user_irq[2] O
+wb_clk_i I
+wb_rst_i I
+wbs_ack_o O
+wbs_adr_i[0] I
+wbs_adr_i[10] I
+wbs_adr_i[11] I
+wbs_adr_i[12] I
+wbs_adr_i[13] I
+wbs_adr_i[14] I
+wbs_adr_i[15] I
+wbs_adr_i[16] I
+wbs_adr_i[17] I
+wbs_adr_i[18] I
+wbs_adr_i[19] I
+wbs_adr_i[1] I
+wbs_adr_i[20] I
+wbs_adr_i[21] I
+wbs_adr_i[22] I
+wbs_adr_i[23] I
+wbs_adr_i[24] I
+wbs_adr_i[25] I
+wbs_adr_i[26] I
+wbs_adr_i[27] I
+wbs_adr_i[28] I
+wbs_adr_i[29] I
+wbs_adr_i[2] I
+wbs_adr_i[30] I
+wbs_adr_i[31] I
+wbs_adr_i[3] I
+wbs_adr_i[4] I
+wbs_adr_i[5] I
+wbs_adr_i[6] I
+wbs_adr_i[7] I
+wbs_adr_i[8] I
+wbs_adr_i[9] I
+wbs_cyc_i I
+wbs_dat_i[0] I
+wbs_dat_i[10] I
+wbs_dat_i[11] I
+wbs_dat_i[12] I
+wbs_dat_i[13] I
+wbs_dat_i[14] I
+wbs_dat_i[15] I
+wbs_dat_i[16] I
+wbs_dat_i[17] I
+wbs_dat_i[18] I
+wbs_dat_i[19] I
+wbs_dat_i[1] I
+wbs_dat_i[20] I
+wbs_dat_i[21] I
+wbs_dat_i[22] I
+wbs_dat_i[23] I
+wbs_dat_i[24] I
+wbs_dat_i[25] I
+wbs_dat_i[26] I
+wbs_dat_i[27] I
+wbs_dat_i[28] I
+wbs_dat_i[29] I
+wbs_dat_i[2] I
+wbs_dat_i[30] I
+wbs_dat_i[31] I
+wbs_dat_i[3] I
+wbs_dat_i[4] I
+wbs_dat_i[5] I
+wbs_dat_i[6] I
+wbs_dat_i[7] I
+wbs_dat_i[8] I
+wbs_dat_i[9] I
+wbs_dat_o[0] O
+wbs_dat_o[10] O
+wbs_dat_o[11] O
+wbs_dat_o[12] O
+wbs_dat_o[13] O
+wbs_dat_o[14] O
+wbs_dat_o[15] O
+wbs_dat_o[16] O
+wbs_dat_o[17] O
+wbs_dat_o[18] O
+wbs_dat_o[19] O
+wbs_dat_o[1] O
+wbs_dat_o[20] O
+wbs_dat_o[21] O
+wbs_dat_o[22] O
+wbs_dat_o[23] O
+wbs_dat_o[24] O
+wbs_dat_o[25] O
+wbs_dat_o[26] O
+wbs_dat_o[27] O
+wbs_dat_o[28] O
+wbs_dat_o[29] O
+wbs_dat_o[2] O
+wbs_dat_o[30] O
+wbs_dat_o[31] O
+wbs_dat_o[3] O
+wbs_dat_o[4] O
+wbs_dat_o[5] O
+wbs_dat_o[6] O
+wbs_dat_o[7] O
+wbs_dat_o[8] O
+wbs_dat_o[9] O
+wbs_sel_i[0] I
+wbs_sel_i[1] I
+wbs_sel_i[2] I
+wbs_sel_i[3] I
+wbs_stb_i I
+wbs_we_i I
+
+*D_NET *576 0.295796
+*CONN
+*P wbs_dat_i[0] I
+*I *646:a[0] I *D user_proj_example
+*CAP
+1 wbs_dat_i[0] 0.000726451
+2 *646:a[0] 0.00223439
+3 *576:11 0.0717161
+4 *576:10 0.0694817
+5 *576:8 0.0321436
+6 *576:7 0.0328701
+7 *576:7 *608:13 0
+8 *576:8 *602:8 0.0866239
+*RES
+1 wbs_dat_i[0] *576:7 15.185 
+2 *576:7 *576:8 867.78 
+3 *576:8 *576:10 2 
+4 *576:10 *576:11 1217.35 
+5 *576:11 *646:a[0] 38.46 
+*END
+
+*D_NET *577 0.406072
+*CONN
+*P wbs_dat_i[10] I
+*I *646:b[2] I *D user_proj_example
+*CAP
+1 wbs_dat_i[10] 0.000726664
+2 *646:b[2] 0.00221251
+3 *577:11 0.0717242
+4 *577:10 0.0695117
+5 *577:8 0.0215466
+6 *577:7 0.0222733
+7 *577:8 *578:8 0.122095
+8 *577:8 *602:8 0.0959821
+*RES
+1 wbs_dat_i[10] *577:7 14.675 
+2 *577:7 *577:8 1136.19 
+3 *577:8 *577:10 2 
+4 *577:10 *577:11 1217.86 
+5 *577:11 *646:b[2] 40.185 
+*END
+
+*D_NET *578 0.421672
+*CONN
+*P wbs_dat_i[11] I
+*I *646:b[3] I *D user_proj_example
+*CAP
+1 wbs_dat_i[11] 0.000684861
+2 *646:b[3] 0.00224444
+3 *578:11 0.0690878
+4 *578:10 0.0668433
+5 *578:8 0.0174297
+6 *578:7 0.0181145
+7 *578:8 *579:8 0.125172
+8 *577:8 *578:8 0.122095
+*RES
+1 wbs_dat_i[11] *578:7 14.42 
+2 *578:7 *578:8 1164.14 
+3 *578:8 *578:10 2 
+4 *578:10 *578:11 1218.11 
+5 *578:11 *646:b[3] 40.875 
+*END
+
+*D_NET *579 0.429015
+*CONN
+*P wbs_dat_i[12] I
+*I *646:b[4] I *D user_proj_example
+*CAP
+1 wbs_dat_i[12] 0.000670998
+2 *646:b[4] 1.22321e-05
+3 *579:11 0.0688469
+4 *579:10 0.0688347
+5 *579:8 0.0180169
+6 *579:7 0.0186878
+7 *579:8 *580:8 0.128774
+8 *578:8 *579:8 0.125172
+*RES
+1 wbs_dat_i[12] *579:7 14.165 
+2 *579:7 *579:8 1197.6 
+3 *579:8 *579:10 2 
+4 *579:10 *579:11 1254.32 
+5 *579:11 *646:b[4] 0.225 
+*END
+
+*D_NET *580 0.436294
+*CONN
+*P wbs_dat_i[13] I
+*I *646:b[5] I *D user_proj_example
+*CAP
+1 wbs_dat_i[13] 0.000657135
+2 *646:b[5] 4.9744e-05
+3 *580:11 0.0688983
+4 *580:10 0.0688485
+5 *580:8 0.0182986
+6 *580:7 0.0189557
+7 *580:8 *581:8 0.131813
+8 *579:8 *580:8 0.128774
+*RES
+1 wbs_dat_i[13] *580:7 13.91 
+2 *580:7 *580:8 1225.55 
+3 *580:8 *580:10 2 
+4 *580:10 *580:11 1254.58 
+5 *580:11 *646:b[5] 0.915 
+*END
+
+*D_NET *581 0.360907
+*CONN
+*P wbs_dat_i[14] I
+*I *646:b[6] I *D user_proj_example
+*CAP
+1 wbs_dat_i[14] 0.000643272
+2 *646:b[6] 9.00619e-05
+3 *581:11 0.0689525
+4 *581:10 0.0688624
+5 *581:8 0.0449513
+6 *581:7 0.0455945
+7 *580:8 *581:8 0.131813
+*RES
+1 wbs_dat_i[14] *581:7 13.655 
+2 *581:7 *581:8 1253.49 
+3 *581:8 *581:10 2 
+4 *581:10 *581:11 1254.83 
+5 *581:11 *646:b[6] 1.605 
+*END
+
+*D_NET *582 0.356448
+*CONN
+*P wbs_dat_i[15] I
+*I *646:b[7] I *D user_proj_example
+*CAP
+1 wbs_dat_i[15] 0.00205118
+2 *646:b[7] 0.000494432
+3 *582:12 0.0519317
+4 *582:11 0.0514373
+5 *582:9 0.0671631
+6 *582:7 0.0692143
+7 *582:12 *607:14 0.114156
+*RES
+1 wbs_dat_i[15] *582:7 36.8325 
+2 *582:7 *582:9 1223.96 
+3 *582:9 *582:11 2 
+4 *582:11 *582:12 1284.54 
+5 *582:12 *646:b[7] 10.8875 
+*END
+
+*D_NET *587 0.301707
+*CONN
+*P wbs_dat_i[1] I
+*I *646:a[1] I *D user_proj_example
+*CAP
+1 wbs_dat_i[1] 0.0022399
+2 *646:a[1] 0.000360505
+3 *587:12 0.0328501
+4 *587:11 0.0324896
+5 *587:9 0.0672755
+6 *587:7 0.0695154
+7 *587:7 *619:13 3.60024e-06
+8 *587:12 *598:10 0.0969723
+*RES
+1 wbs_dat_i[1] *587:7 39.2475 
+2 *587:7 *587:9 1226 
+3 *587:9 *587:11 2 
+4 *587:11 *587:12 897.45 
+5 *587:12 *646:a[1] 8.5025 
+*END
+
+*D_NET *598 0.363297
+*CONN
+*P wbs_dat_i[2] I
+*I *646:a[2] I *D user_proj_example
+*CAP
+1 wbs_dat_i[2] 5.99008e-05
+2 *646:a[2] 0.000393306
+3 *598:10 0.0139818
+4 *598:9 0.0135885
+5 *598:7 0.0691838
+6 *598:5 0.0692437
+7 *598:10 *601:14 0.0998733
+8 *587:12 *598:10 0.0969723
+*RES
+1 wbs_dat_i[2] *598:5 1.0875 
+2 *598:5 *598:7 1260.7 
+3 *598:7 *598:9 2 
+4 *598:9 *598:10 918.495 
+5 *598:10 *646:a[2] 9.1025 
+*END
+
+*D_NET *601 0.369115
+*CONN
+*P wbs_dat_i[3] I
+*I *646:a[3] I *D user_proj_example
+*CAP
+1 wbs_dat_i[3] 0.00212396
+2 *646:a[3] 0.000407352
+3 *601:14 0.0147014
+4 *601:13 0.014294
+5 *601:11 0.0672474
+6 *601:9 0.0693713
+7 *601:9 *633:13 0
+8 *601:14 *603:14 0.101096
+9 *598:10 *601:14 0.0998733
+*RES
+1 wbs_dat_i[3] *601:9 38.6625 
+2 *601:9 *601:11 1225.49 
+3 *601:11 *601:13 2 
+4 *601:13 *601:14 945.06 
+5 *601:14 *646:a[3] 9.3575 
+*END
+
+*D_NET *602 0.359657
+*CONN
+*P wbs_dat_i[4] I
+*I *646:a[4] I *D user_proj_example
+*CAP
+1 wbs_dat_i[4] 0.000712588
+2 *646:a[4] 0.00228631
+3 *602:11 0.0691019
+4 *602:10 0.0668156
+5 *602:8 0.0187111
+6 *602:7 0.0194237
+7 *602:7 wbs_dat_o[4] 0
+8 *576:8 *602:8 0.0866239
+9 *577:8 *602:8 0.0959821
+*RES
+1 wbs_dat_i[4] *602:7 14.93 
+2 *602:7 *602:8 962.31 
+3 *602:8 *602:10 2 
+4 *602:10 *602:11 1217.6 
+5 *602:11 *646:a[4] 41.22 
+*END
+
+*D_NET *603 0.380583
+*CONN
+*P wbs_dat_i[5] I
+*I *646:a[5] I *D user_proj_example
+*CAP
+1 wbs_dat_i[5] 0.00212863
+2 *646:a[5] 0.000383886
+3 *603:14 0.015998
+4 *603:13 0.0156141
+5 *603:11 0.0672333
+6 *603:9 0.069362
+7 *603:9 *635:13 0
+8 *603:14 *604:10 0.108767
+9 *601:14 *603:14 0.101096
+*RES
+1 wbs_dat_i[5] *603:9 38.6625 
+2 *603:9 *603:11 1225.24 
+3 *603:11 *603:13 2 
+4 *603:13 *603:14 998.88 
+5 *603:14 *646:a[5] 8.9225 
+*END
+
+*D_NET *604 0.389998
+*CONN
+*P wbs_dat_i[6] I
+*I *646:a[6] I *D user_proj_example
+*CAP
+1 wbs_dat_i[6] 5.99008e-05
+2 *646:a[6] 0.000435443
+3 *604:10 0.0153111
+4 *604:9 0.0148757
+5 *604:7 0.0691463
+6 *604:5 0.0692062
+7 *604:10 *605:12 0.112196
+8 *603:14 *604:10 0.108767
+*RES
+1 wbs_dat_i[6] *604:5 1.0875 
+2 *604:5 *604:7 1259.93 
+3 *604:7 *604:9 2 
+4 *604:9 *604:10 1024.76 
+5 *604:10 *646:a[6] 9.8675 
+*END
+
+*D_NET *605 0.398044
+*CONN
+*P wbs_dat_i[7] I
+*I *646:a[7] I *D user_proj_example
+*CAP
+1 wbs_dat_i[7] 0.00224454
+2 *646:a[7] 0.000411977
+3 *605:12 0.0158657
+4 *605:11 0.0154538
+5 *605:9 0.0672052
+6 *605:7 0.0694498
+7 *605:7 *637:13 3.60024e-06
+8 *605:12 *606:12 0.115213
+9 *604:10 *605:12 0.112196
+*RES
+1 wbs_dat_i[7] *605:7 39.2475 
+2 *605:7 *605:9 1224.73 
+3 *605:9 *605:11 2 
+4 *605:11 *605:12 1057.19 
+5 *605:12 *646:a[7] 9.4325 
+*END
+
+*D_NET *606 0.410109
+*CONN
+*P wbs_dat_i[8] I
+*I *646:b[0] I *D user_proj_example
+*CAP
+1 wbs_dat_i[8] 0.00210992
+2 *646:b[0] 0.000478561
+3 *606:12 0.0161231
+4 *606:11 0.0156445
+5 *606:9 0.0698892
+6 *606:7 0.0719992
+7 *606:12 *607:14 0.118652
+8 *605:12 *606:12 0.115213
+*RES
+1 wbs_dat_i[8] *606:7 36.8325 
+2 *606:7 *606:9 1224.47 
+3 *606:9 *606:11 2 
+4 *606:11 *606:12 1083.06 
+5 *606:12 *646:b[0] 10.3775 
+*END
+
+*D_NET *607 0.407917
+*CONN
+*P wbs_dat_i[9] I
+*I *646:b[1] I *D user_proj_example
+*CAP
+1 wbs_dat_i[9] 0.00220774
+2 *646:b[1] 0.00047758
+3 *607:14 0.0181699
+4 *607:13 0.0176924
+5 *607:11 0.0671772
+6 *607:9 0.0693849
+7 *582:12 *607:14 0.114156
+8 *606:12 *607:14 0.118652
+*RES
+1 wbs_dat_i[9] *607:9 40.0425 
+2 *607:9 *607:11 1224.22 
+3 *607:11 *607:13 2 
+4 *607:13 *607:14 1114.8 
+5 *607:14 *646:b[1] 10.6325 
+*END
+
+*D_NET *608 0.358185
+*CONN
+*P wbs_dat_o[0] O
+*I *646:p[0] O *D user_proj_example
+*CAP
+1 wbs_dat_o[0] 6.17242e-05
+2 *646:p[0] 0.000536967
+3 *608:13 0.098455
+4 *608:12 0.0983933
+5 *608:10 0.0319356
+6 *608:9 0.0324725
+7 *608:10 *619:10 0.0963303
+8 *576:7 *608:13 0
+*RES
+1 *646:p[0] *608:9 11.1425 
+2 *608:9 *608:10 886.41 
+3 *608:10 *608:12 2 
+4 *608:12 *608:13 1724.03 
+5 *608:13 wbs_dat_o[0] 1.0875 
+*END
+
+*D_NET *619 0.420619
+*CONN
+*P wbs_dat_o[1] O
+*I *646:p[1] O *D user_proj_example
+*CAP
+1 wbs_dat_o[1] 0.00216239
+2 *646:p[1] 0.000520219
+3 *619:13 0.0948372
+4 *619:12 0.0926748
+5 *619:10 0.0151086
+6 *619:9 0.0156288
+7 *619:10 *630:10 0.103354
+8 *587:7 *619:13 3.60024e-06
+9 *608:10 *619:10 0.0963303
+*RES
+1 *646:p[1] *619:9 10.8875 
+2 *619:9 *619:10 955.065 
+3 *619:10 *619:12 2 
+4 *619:12 *619:13 1688.83 
+5 *619:13 wbs_dat_o[1] 38.6625 
+*END
+
+*D_NET *630 0.43629
+*CONN
+*P wbs_dat_o[2] O
+*I *646:p[2] O *D user_proj_example
+*CAP
+1 wbs_dat_o[2] 0.00194715
+2 *646:p[2] 0.000443461
+3 *630:13 0.0946117
+4 *630:12 0.0926646
+5 *630:10 0.0158823
+6 *630:9 0.0163257
+7 *630:10 *633:10 0.111061
+8 *619:10 *630:10 0.103354
+*RES
+1 *646:p[2] *630:9 9.5975 
+2 *630:9 *630:10 1019.58 
+3 *630:10 *630:12 2 
+4 *630:12 *630:13 1688.57 
+5 *630:13 wbs_dat_o[2] 35.4525 
+*END
+
+*D_NET *633 0.453684
+*CONN
+*P wbs_dat_o[3] O
+*I *646:p[3] O *D user_proj_example
+*CAP
+1 wbs_dat_o[3] 0.00215828
+2 *646:p[3] 0.00048111
+3 *633:13 0.0948155
+4 *633:12 0.0926573
+5 *633:10 0.016748
+6 *633:9 0.0172291
+7 *633:10 *634:10 0.118533
+8 *601:9 *633:13 0
+9 *630:10 *633:10 0.111061
+*RES
+1 *646:p[3] *633:9 10.3775 
+2 *633:9 *633:10 1087.2 
+3 *633:10 *633:12 2 
+4 *633:12 *633:13 1688.32 
+5 *633:13 wbs_dat_o[3] 37.8675 
+*END
+
+*D_NET *634 0.470807
+*CONN
+*P wbs_dat_o[4] O
+*I *646:p[4] O *D user_proj_example
+*CAP
+1 wbs_dat_o[4] 0.00227308
+2 *646:p[4] 0.000462492
+3 *634:13 0.0949163
+4 *634:12 0.0926432
+5 *634:10 0.0176918
+6 *634:9 0.0181543
+7 *634:10 *635:10 0.126133
+8 *602:7 wbs_dat_o[4] 0
+9 *633:10 *634:10 0.118533
+*RES
+1 *646:p[4] *634:9 10.1225 
+2 *634:9 *634:10 1155.85 
+3 *634:10 *634:12 2 
+4 *634:12 *634:13 1688.06 
+5 *634:13 wbs_dat_o[4] 40.0425 
+*END
+
+*D_NET *635 0.487374
+*CONN
+*P wbs_dat_o[5] O
+*I *646:p[5] O *D user_proj_example
+*CAP
+1 wbs_dat_o[5] 0.00207162
+2 *646:p[5] 0.000443873
+3 *635:13 0.0947034
+4 *635:12 0.0926318
+5 *635:10 0.0186146
+6 *635:9 0.0190585
+7 *635:10 *636:10 0.133718
+8 *603:9 *635:13 0
+9 *634:10 *635:10 0.126133
+*RES
+1 *646:p[5] *635:9 9.8675 
+2 *635:9 *635:10 1224.51 
+3 *635:10 *635:12 2 
+4 *635:12 *635:13 1687.81 
+5 *635:13 wbs_dat_o[5] 37.6275 
+*END
+
+*D_NET *636 0.504534
+*CONN
+*P wbs_dat_o[6] O
+*I *646:p[6] O *D user_proj_example
+*CAP
+1 wbs_dat_o[6] 0.00195182
+2 *646:p[6] 0.000402973
+3 *636:13 0.0945739
+4 *636:12 0.0926221
+5 *636:10 0.0194536
+6 *636:9 0.0198566
+7 *636:10 *637:10 0.141956
+8 *635:10 *636:10 0.133718
+*RES
+1 *646:p[6] *636:9 8.9225 
+2 *636:9 *636:10 1293.85 
+3 *636:10 *636:12 2 
+4 *636:12 *636:13 1687.55 
+5 *636:13 wbs_dat_o[6] 35.4525 
+*END
+
+*D_NET *637 0.433561
+*CONN
+*P wbs_dat_o[7] O
+*I *646:p[7] O *D user_proj_example
+*CAP
+1 wbs_dat_o[7] 0.00216704
+2 *646:p[7] 0.000406635
+3 *637:13 0.0947804
+4 *637:12 0.0926134
+5 *637:10 0.0506137
+6 *637:9 0.0510203
+7 *605:7 *637:13 3.60024e-06
+8 *636:10 *637:10 0.141956
+*RES
+1 *646:p[7] *637:9 9.3575 
+2 *637:9 *637:10 1366.99 
+3 *637:10 *637:12 2 
+4 *637:12 *637:13 1687.3 
+5 *637:13 wbs_dat_o[7] 38.6625 
+*END

signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.nom.spef

diff --git a/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.nom.spef b/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.nom.spef
new file mode 100644
index 0000000..99bfbd4
--- /dev/null
+++ b/signoff/user_project_wrapper/openlane-signoff/spef/user_project_wrapper.nom.spef
@@ -0,0 +1,1803 @@
+*SPEF "ieee 1481-1999"
+*DESIGN "user_project_wrapper"
+*DATE "11:11:11 Fri 11 11, 1111"
+*VENDOR "OpenRCX"
+*PROGRAM "Parallel Extraction"
+*VERSION "1.0"
+*DESIGN_FLOW "NAME_SCOPE LOCAL" "PIN_CAP NONE"
+*DIVIDER /
+*DELIMITER :
+*BUS_DELIMITER []
+*T_UNIT 1 NS
+*C_UNIT 1 PF
+*R_UNIT 1 OHM
+*L_UNIT 1 HENRY
+
+*NAME_MAP
+*1 analog_io[0]
+*2 analog_io[10]
+*3 analog_io[11]
+*4 analog_io[12]
+*5 analog_io[13]
+*6 analog_io[14]
+*7 analog_io[15]
+*8 analog_io[16]
+*9 analog_io[17]
+*10 analog_io[18]
+*11 analog_io[19]
+*12 analog_io[1]
+*13 analog_io[20]
+*14 analog_io[21]
+*15 analog_io[22]
+*16 analog_io[23]
+*17 analog_io[24]
+*18 analog_io[25]
+*19 analog_io[26]
+*20 analog_io[27]
+*21 analog_io[28]
+*22 analog_io[2]
+*23 analog_io[3]
+*24 analog_io[4]
+*25 analog_io[5]
+*26 analog_io[6]
+*27 analog_io[7]
+*28 analog_io[8]
+*29 analog_io[9]
+*30 io_in[0]
+*31 io_in[10]
+*32 io_in[11]
+*33 io_in[12]
+*34 io_in[13]
+*35 io_in[14]
+*36 io_in[15]
+*37 io_in[16]
+*38 io_in[17]
+*39 io_in[18]
+*40 io_in[19]
+*41 io_in[1]
+*42 io_in[20]
+*43 io_in[21]
+*44 io_in[22]
+*45 io_in[23]
+*46 io_in[24]
+*47 io_in[25]
+*48 io_in[26]
+*49 io_in[27]
+*50 io_in[28]
+*51 io_in[29]
+*52 io_in[2]
+*53 io_in[30]
+*54 io_in[31]
+*55 io_in[32]
+*56 io_in[33]
+*57 io_in[34]
+*58 io_in[35]
+*59 io_in[36]
+*60 io_in[37]
+*61 io_in[3]
+*62 io_in[4]
+*63 io_in[5]
+*64 io_in[6]
+*65 io_in[7]
+*66 io_in[8]
+*67 io_in[9]
+*68 io_oeb[0]
+*69 io_oeb[10]
+*70 io_oeb[11]
+*71 io_oeb[12]
+*72 io_oeb[13]
+*73 io_oeb[14]
+*74 io_oeb[15]
+*75 io_oeb[16]
+*76 io_oeb[17]
+*77 io_oeb[18]
+*78 io_oeb[19]
+*79 io_oeb[1]
+*80 io_oeb[20]
+*81 io_oeb[21]
+*82 io_oeb[22]
+*83 io_oeb[23]
+*84 io_oeb[24]
+*85 io_oeb[25]
+*86 io_oeb[26]
+*87 io_oeb[27]
+*88 io_oeb[28]
+*89 io_oeb[29]
+*90 io_oeb[2]
+*91 io_oeb[30]
+*92 io_oeb[31]
+*93 io_oeb[32]
+*94 io_oeb[33]
+*95 io_oeb[34]
+*96 io_oeb[35]
+*97 io_oeb[36]
+*98 io_oeb[37]
+*99 io_oeb[3]
+*100 io_oeb[4]
+*101 io_oeb[5]
+*102 io_oeb[6]
+*103 io_oeb[7]
+*104 io_oeb[8]
+*105 io_oeb[9]
+*106 io_out[0]
+*107 io_out[10]
+*108 io_out[11]
+*109 io_out[12]
+*110 io_out[13]
+*111 io_out[14]
+*112 io_out[15]
+*113 io_out[16]
+*114 io_out[17]
+*115 io_out[18]
+*116 io_out[19]
+*117 io_out[1]
+*118 io_out[20]
+*119 io_out[21]
+*120 io_out[22]
+*121 io_out[23]
+*122 io_out[24]
+*123 io_out[25]
+*124 io_out[26]
+*125 io_out[27]
+*126 io_out[28]
+*127 io_out[29]
+*128 io_out[2]
+*129 io_out[30]
+*130 io_out[31]
+*131 io_out[32]
+*132 io_out[33]
+*133 io_out[34]
+*134 io_out[35]
+*135 io_out[36]
+*136 io_out[37]
+*137 io_out[3]
+*138 io_out[4]
+*139 io_out[5]
+*140 io_out[6]
+*141 io_out[7]
+*142 io_out[8]
+*143 io_out[9]
+*144 la_data_in[0]
+*145 la_data_in[100]
+*146 la_data_in[101]
+*147 la_data_in[102]
+*148 la_data_in[103]
+*149 la_data_in[104]
+*150 la_data_in[105]
+*151 la_data_in[106]
+*152 la_data_in[107]
+*153 la_data_in[108]
+*154 la_data_in[109]
+*155 la_data_in[10]
+*156 la_data_in[110]
+*157 la_data_in[111]
+*158 la_data_in[112]
+*159 la_data_in[113]
+*160 la_data_in[114]
+*161 la_data_in[115]
+*162 la_data_in[116]
+*163 la_data_in[117]
+*164 la_data_in[118]
+*165 la_data_in[119]
+*166 la_data_in[11]
+*167 la_data_in[120]
+*168 la_data_in[121]
+*169 la_data_in[122]
+*170 la_data_in[123]
+*171 la_data_in[124]
+*172 la_data_in[125]
+*173 la_data_in[126]
+*174 la_data_in[127]
+*175 la_data_in[12]
+*176 la_data_in[13]
+*177 la_data_in[14]
+*178 la_data_in[15]
+*179 la_data_in[16]
+*180 la_data_in[17]
+*181 la_data_in[18]
+*182 la_data_in[19]
+*183 la_data_in[1]
+*184 la_data_in[20]
+*185 la_data_in[21]
+*186 la_data_in[22]
+*187 la_data_in[23]
+*188 la_data_in[24]
+*189 la_data_in[25]
+*190 la_data_in[26]
+*191 la_data_in[27]
+*192 la_data_in[28]
+*193 la_data_in[29]
+*194 la_data_in[2]
+*195 la_data_in[30]
+*196 la_data_in[31]
+*197 la_data_in[32]
+*198 la_data_in[33]
+*199 la_data_in[34]
+*200 la_data_in[35]
+*201 la_data_in[36]
+*202 la_data_in[37]
+*203 la_data_in[38]
+*204 la_data_in[39]
+*205 la_data_in[3]
+*206 la_data_in[40]
+*207 la_data_in[41]
+*208 la_data_in[42]
+*209 la_data_in[43]
+*210 la_data_in[44]
+*211 la_data_in[45]
+*212 la_data_in[46]
+*213 la_data_in[47]
+*214 la_data_in[48]
+*215 la_data_in[49]
+*216 la_data_in[4]
+*217 la_data_in[50]
+*218 la_data_in[51]
+*219 la_data_in[52]
+*220 la_data_in[53]
+*221 la_data_in[54]
+*222 la_data_in[55]
+*223 la_data_in[56]
+*224 la_data_in[57]
+*225 la_data_in[58]
+*226 la_data_in[59]
+*227 la_data_in[5]
+*228 la_data_in[60]
+*229 la_data_in[61]
+*230 la_data_in[62]
+*231 la_data_in[63]
+*232 la_data_in[64]
+*233 la_data_in[65]
+*234 la_data_in[66]
+*235 la_data_in[67]
+*236 la_data_in[68]
+*237 la_data_in[69]
+*238 la_data_in[6]
+*239 la_data_in[70]
+*240 la_data_in[71]
+*241 la_data_in[72]
+*242 la_data_in[73]
+*243 la_data_in[74]
+*244 la_data_in[75]
+*245 la_data_in[76]
+*246 la_data_in[77]
+*247 la_data_in[78]
+*248 la_data_in[79]
+*249 la_data_in[7]
+*250 la_data_in[80]
+*251 la_data_in[81]
+*252 la_data_in[82]
+*253 la_data_in[83]
+*254 la_data_in[84]
+*255 la_data_in[85]
+*256 la_data_in[86]
+*257 la_data_in[87]
+*258 la_data_in[88]
+*259 la_data_in[89]
+*260 la_data_in[8]
+*261 la_data_in[90]
+*262 la_data_in[91]
+*263 la_data_in[92]
+*264 la_data_in[93]
+*265 la_data_in[94]
+*266 la_data_in[95]
+*267 la_data_in[96]
+*268 la_data_in[97]
+*269 la_data_in[98]
+*270 la_data_in[99]
+*271 la_data_in[9]
+*272 la_data_out[0]
+*273 la_data_out[100]
+*274 la_data_out[101]
+*275 la_data_out[102]
+*276 la_data_out[103]
+*277 la_data_out[104]
+*278 la_data_out[105]
+*279 la_data_out[106]
+*280 la_data_out[107]
+*281 la_data_out[108]
+*282 la_data_out[109]
+*283 la_data_out[10]
+*284 la_data_out[110]
+*285 la_data_out[111]
+*286 la_data_out[112]
+*287 la_data_out[113]
+*288 la_data_out[114]
+*289 la_data_out[115]
+*290 la_data_out[116]
+*291 la_data_out[117]
+*292 la_data_out[118]
+*293 la_data_out[119]
+*294 la_data_out[11]
+*295 la_data_out[120]
+*296 la_data_out[121]
+*297 la_data_out[122]
+*298 la_data_out[123]
+*299 la_data_out[124]
+*300 la_data_out[125]
+*301 la_data_out[126]
+*302 la_data_out[127]
+*303 la_data_out[12]
+*304 la_data_out[13]
+*305 la_data_out[14]
+*306 la_data_out[15]
+*307 la_data_out[16]
+*308 la_data_out[17]
+*309 la_data_out[18]
+*310 la_data_out[19]
+*311 la_data_out[1]
+*312 la_data_out[20]
+*313 la_data_out[21]
+*314 la_data_out[22]
+*315 la_data_out[23]
+*316 la_data_out[24]
+*317 la_data_out[25]
+*318 la_data_out[26]
+*319 la_data_out[27]
+*320 la_data_out[28]
+*321 la_data_out[29]
+*322 la_data_out[2]
+*323 la_data_out[30]
+*324 la_data_out[31]
+*325 la_data_out[32]
+*326 la_data_out[33]
+*327 la_data_out[34]
+*328 la_data_out[35]
+*329 la_data_out[36]
+*330 la_data_out[37]
+*331 la_data_out[38]
+*332 la_data_out[39]
+*333 la_data_out[3]
+*334 la_data_out[40]
+*335 la_data_out[41]
+*336 la_data_out[42]
+*337 la_data_out[43]
+*338 la_data_out[44]
+*339 la_data_out[45]
+*340 la_data_out[46]
+*341 la_data_out[47]
+*342 la_data_out[48]
+*343 la_data_out[49]
+*344 la_data_out[4]
+*345 la_data_out[50]
+*346 la_data_out[51]
+*347 la_data_out[52]
+*348 la_data_out[53]
+*349 la_data_out[54]
+*350 la_data_out[55]
+*351 la_data_out[56]
+*352 la_data_out[57]
+*353 la_data_out[58]
+*354 la_data_out[59]
+*355 la_data_out[5]
+*356 la_data_out[60]
+*357 la_data_out[61]
+*358 la_data_out[62]
+*359 la_data_out[63]
+*360 la_data_out[64]
+*361 la_data_out[65]
+*362 la_data_out[66]
+*363 la_data_out[67]
+*364 la_data_out[68]
+*365 la_data_out[69]
+*366 la_data_out[6]
+*367 la_data_out[70]
+*368 la_data_out[71]
+*369 la_data_out[72]
+*370 la_data_out[73]
+*371 la_data_out[74]
+*372 la_data_out[75]
+*373 la_data_out[76]
+*374 la_data_out[77]
+*375 la_data_out[78]
+*376 la_data_out[79]
+*377 la_data_out[7]
+*378 la_data_out[80]
+*379 la_data_out[81]
+*380 la_data_out[82]
+*381 la_data_out[83]
+*382 la_data_out[84]
+*383 la_data_out[85]
+*384 la_data_out[86]
+*385 la_data_out[87]
+*386 la_data_out[88]
+*387 la_data_out[89]
+*388 la_data_out[8]
+*389 la_data_out[90]
+*390 la_data_out[91]
+*391 la_data_out[92]
+*392 la_data_out[93]
+*393 la_data_out[94]
+*394 la_data_out[95]
+*395 la_data_out[96]
+*396 la_data_out[97]
+*397 la_data_out[98]
+*398 la_data_out[99]
+*399 la_data_out[9]
+*400 la_oenb[0]
+*401 la_oenb[100]
+*402 la_oenb[101]
+*403 la_oenb[102]
+*404 la_oenb[103]
+*405 la_oenb[104]
+*406 la_oenb[105]
+*407 la_oenb[106]
+*408 la_oenb[107]
+*409 la_oenb[108]
+*410 la_oenb[109]
+*411 la_oenb[10]
+*412 la_oenb[110]
+*413 la_oenb[111]
+*414 la_oenb[112]
+*415 la_oenb[113]
+*416 la_oenb[114]
+*417 la_oenb[115]
+*418 la_oenb[116]
+*419 la_oenb[117]
+*420 la_oenb[118]
+*421 la_oenb[119]
+*422 la_oenb[11]
+*423 la_oenb[120]
+*424 la_oenb[121]
+*425 la_oenb[122]
+*426 la_oenb[123]
+*427 la_oenb[124]
+*428 la_oenb[125]
+*429 la_oenb[126]
+*430 la_oenb[127]
+*431 la_oenb[12]
+*432 la_oenb[13]
+*433 la_oenb[14]
+*434 la_oenb[15]
+*435 la_oenb[16]
+*436 la_oenb[17]
+*437 la_oenb[18]
+*438 la_oenb[19]
+*439 la_oenb[1]
+*440 la_oenb[20]
+*441 la_oenb[21]
+*442 la_oenb[22]
+*443 la_oenb[23]
+*444 la_oenb[24]
+*445 la_oenb[25]
+*446 la_oenb[26]
+*447 la_oenb[27]
+*448 la_oenb[28]
+*449 la_oenb[29]
+*450 la_oenb[2]
+*451 la_oenb[30]
+*452 la_oenb[31]
+*453 la_oenb[32]
+*454 la_oenb[33]
+*455 la_oenb[34]
+*456 la_oenb[35]
+*457 la_oenb[36]
+*458 la_oenb[37]
+*459 la_oenb[38]
+*460 la_oenb[39]
+*461 la_oenb[3]
+*462 la_oenb[40]
+*463 la_oenb[41]
+*464 la_oenb[42]
+*465 la_oenb[43]
+*466 la_oenb[44]
+*467 la_oenb[45]
+*468 la_oenb[46]
+*469 la_oenb[47]
+*470 la_oenb[48]
+*471 la_oenb[49]
+*472 la_oenb[4]
+*473 la_oenb[50]
+*474 la_oenb[51]
+*475 la_oenb[52]
+*476 la_oenb[53]
+*477 la_oenb[54]
+*478 la_oenb[55]
+*479 la_oenb[56]
+*480 la_oenb[57]
+*481 la_oenb[58]
+*482 la_oenb[59]
+*483 la_oenb[5]
+*484 la_oenb[60]
+*485 la_oenb[61]
+*486 la_oenb[62]
+*487 la_oenb[63]
+*488 la_oenb[64]
+*489 la_oenb[65]
+*490 la_oenb[66]
+*491 la_oenb[67]
+*492 la_oenb[68]
+*493 la_oenb[69]
+*494 la_oenb[6]
+*495 la_oenb[70]
+*496 la_oenb[71]
+*497 la_oenb[72]
+*498 la_oenb[73]
+*499 la_oenb[74]
+*500 la_oenb[75]
+*501 la_oenb[76]
+*502 la_oenb[77]
+*503 la_oenb[78]
+*504 la_oenb[79]
+*505 la_oenb[7]
+*506 la_oenb[80]
+*507 la_oenb[81]
+*508 la_oenb[82]
+*509 la_oenb[83]
+*510 la_oenb[84]
+*511 la_oenb[85]
+*512 la_oenb[86]
+*513 la_oenb[87]
+*514 la_oenb[88]
+*515 la_oenb[89]
+*516 la_oenb[8]
+*517 la_oenb[90]
+*518 la_oenb[91]
+*519 la_oenb[92]
+*520 la_oenb[93]
+*521 la_oenb[94]
+*522 la_oenb[95]
+*523 la_oenb[96]
+*524 la_oenb[97]
+*525 la_oenb[98]
+*526 la_oenb[99]
+*527 la_oenb[9]
+*528 user_clock2
+*529 user_irq[0]
+*530 user_irq[1]
+*531 user_irq[2]
+*540 wb_clk_i
+*541 wb_rst_i
+*542 wbs_ack_o
+*543 wbs_adr_i[0]
+*544 wbs_adr_i[10]
+*545 wbs_adr_i[11]
+*546 wbs_adr_i[12]
+*547 wbs_adr_i[13]
+*548 wbs_adr_i[14]
+*549 wbs_adr_i[15]
+*550 wbs_adr_i[16]
+*551 wbs_adr_i[17]
+*552 wbs_adr_i[18]
+*553 wbs_adr_i[19]
+*554 wbs_adr_i[1]
+*555 wbs_adr_i[20]
+*556 wbs_adr_i[21]
+*557 wbs_adr_i[22]
+*558 wbs_adr_i[23]
+*559 wbs_adr_i[24]
+*560 wbs_adr_i[25]
+*561 wbs_adr_i[26]
+*562 wbs_adr_i[27]
+*563 wbs_adr_i[28]
+*564 wbs_adr_i[29]
+*565 wbs_adr_i[2]
+*566 wbs_adr_i[30]
+*567 wbs_adr_i[31]
+*568 wbs_adr_i[3]
+*569 wbs_adr_i[4]
+*570 wbs_adr_i[5]
+*571 wbs_adr_i[6]
+*572 wbs_adr_i[7]
+*573 wbs_adr_i[8]
+*574 wbs_adr_i[9]
+*575 wbs_cyc_i
+*576 wbs_dat_i[0]
+*577 wbs_dat_i[10]
+*578 wbs_dat_i[11]
+*579 wbs_dat_i[12]
+*580 wbs_dat_i[13]
+*581 wbs_dat_i[14]
+*582 wbs_dat_i[15]
+*583 wbs_dat_i[16]
+*584 wbs_dat_i[17]
+*585 wbs_dat_i[18]
+*586 wbs_dat_i[19]
+*587 wbs_dat_i[1]
+*588 wbs_dat_i[20]
+*589 wbs_dat_i[21]
+*590 wbs_dat_i[22]
+*591 wbs_dat_i[23]
+*592 wbs_dat_i[24]
+*593 wbs_dat_i[25]
+*594 wbs_dat_i[26]
+*595 wbs_dat_i[27]
+*596 wbs_dat_i[28]
+*597 wbs_dat_i[29]
+*598 wbs_dat_i[2]
+*599 wbs_dat_i[30]
+*600 wbs_dat_i[31]
+*601 wbs_dat_i[3]
+*602 wbs_dat_i[4]
+*603 wbs_dat_i[5]
+*604 wbs_dat_i[6]
+*605 wbs_dat_i[7]
+*606 wbs_dat_i[8]
+*607 wbs_dat_i[9]
+*608 wbs_dat_o[0]
+*609 wbs_dat_o[10]
+*610 wbs_dat_o[11]
+*611 wbs_dat_o[12]
+*612 wbs_dat_o[13]
+*613 wbs_dat_o[14]
+*614 wbs_dat_o[15]
+*615 wbs_dat_o[16]
+*616 wbs_dat_o[17]
+*617 wbs_dat_o[18]
+*618 wbs_dat_o[19]
+*619 wbs_dat_o[1]
+*620 wbs_dat_o[20]
+*621 wbs_dat_o[21]
+*622 wbs_dat_o[22]
+*623 wbs_dat_o[23]
+*624 wbs_dat_o[24]
+*625 wbs_dat_o[25]
+*626 wbs_dat_o[26]
+*627 wbs_dat_o[27]
+*628 wbs_dat_o[28]
+*629 wbs_dat_o[29]
+*630 wbs_dat_o[2]
+*631 wbs_dat_o[30]
+*632 wbs_dat_o[31]
+*633 wbs_dat_o[3]
+*634 wbs_dat_o[4]
+*635 wbs_dat_o[5]
+*636 wbs_dat_o[6]
+*637 wbs_dat_o[7]
+*638 wbs_dat_o[8]
+*639 wbs_dat_o[9]
+*640 wbs_sel_i[0]
+*641 wbs_sel_i[1]
+*642 wbs_sel_i[2]
+*643 wbs_sel_i[3]
+*644 wbs_stb_i
+*645 wbs_we_i
+*646 mprj
+
+*PORTS
+analog_io[0] I
+analog_io[10] I
+analog_io[11] I
+analog_io[12] I
+analog_io[13] I
+analog_io[14] I
+analog_io[15] I
+analog_io[16] I
+analog_io[17] I
+analog_io[18] I
+analog_io[19] I
+analog_io[1] I
+analog_io[20] I
+analog_io[21] I
+analog_io[22] I
+analog_io[23] I
+analog_io[24] I
+analog_io[25] I
+analog_io[26] I
+analog_io[27] I
+analog_io[28] I
+analog_io[2] I
+analog_io[3] I
+analog_io[4] I
+analog_io[5] I
+analog_io[6] I
+analog_io[7] I
+analog_io[8] I
+analog_io[9] I
+io_in[0] I
+io_in[10] I
+io_in[11] I
+io_in[12] I
+io_in[13] I
+io_in[14] I
+io_in[15] I
+io_in[16] I
+io_in[17] I
+io_in[18] I
+io_in[19] I
+io_in[1] I
+io_in[20] I
+io_in[21] I
+io_in[22] I
+io_in[23] I
+io_in[24] I
+io_in[25] I
+io_in[26] I
+io_in[27] I
+io_in[28] I
+io_in[29] I
+io_in[2] I
+io_in[30] I
+io_in[31] I
+io_in[32] I
+io_in[33] I
+io_in[34] I
+io_in[35] I
+io_in[36] I
+io_in[37] I
+io_in[3] I
+io_in[4] I
+io_in[5] I
+io_in[6] I
+io_in[7] I
+io_in[8] I
+io_in[9] I
+io_oeb[0] O
+io_oeb[10] O
+io_oeb[11] O
+io_oeb[12] O
+io_oeb[13] O
+io_oeb[14] O
+io_oeb[15] O
+io_oeb[16] O
+io_oeb[17] O
+io_oeb[18] O
+io_oeb[19] O
+io_oeb[1] O
+io_oeb[20] O
+io_oeb[21] O
+io_oeb[22] O
+io_oeb[23] O
+io_oeb[24] O
+io_oeb[25] O
+io_oeb[26] O
+io_oeb[27] O
+io_oeb[28] O
+io_oeb[29] O
+io_oeb[2] O
+io_oeb[30] O
+io_oeb[31] O
+io_oeb[32] O
+io_oeb[33] O
+io_oeb[34] O
+io_oeb[35] O
+io_oeb[36] O
+io_oeb[37] O
+io_oeb[3] O
+io_oeb[4] O
+io_oeb[5] O
+io_oeb[6] O
+io_oeb[7] O
+io_oeb[8] O
+io_oeb[9] O
+io_out[0] O
+io_out[10] O
+io_out[11] O
+io_out[12] O
+io_out[13] O
+io_out[14] O
+io_out[15] O
+io_out[16] O
+io_out[17] O
+io_out[18] O
+io_out[19] O
+io_out[1] O
+io_out[20] O
+io_out[21] O
+io_out[22] O
+io_out[23] O
+io_out[24] O
+io_out[25] O
+io_out[26] O
+io_out[27] O
+io_out[28] O
+io_out[29] O
+io_out[2] O
+io_out[30] O
+io_out[31] O
+io_out[32] O
+io_out[33] O
+io_out[34] O
+io_out[35] O
+io_out[36] O
+io_out[37] O
+io_out[3] O
+io_out[4] O
+io_out[5] O
+io_out[6] O
+io_out[7] O
+io_out[8] O
+io_out[9] O
+la_data_in[0] I
+la_data_in[100] I
+la_data_in[101] I
+la_data_in[102] I
+la_data_in[103] I
+la_data_in[104] I
+la_data_in[105] I
+la_data_in[106] I
+la_data_in[107] I
+la_data_in[108] I
+la_data_in[109] I
+la_data_in[10] I
+la_data_in[110] I
+la_data_in[111] I
+la_data_in[112] I
+la_data_in[113] I
+la_data_in[114] I
+la_data_in[115] I
+la_data_in[116] I
+la_data_in[117] I
+la_data_in[118] I
+la_data_in[119] I
+la_data_in[11] I
+la_data_in[120] I
+la_data_in[121] I
+la_data_in[122] I
+la_data_in[123] I
+la_data_in[124] I
+la_data_in[125] I
+la_data_in[126] I
+la_data_in[127] I
+la_data_in[12] I
+la_data_in[13] I
+la_data_in[14] I
+la_data_in[15] I
+la_data_in[16] I
+la_data_in[17] I
+la_data_in[18] I
+la_data_in[19] I
+la_data_in[1] I
+la_data_in[20] I
+la_data_in[21] I
+la_data_in[22] I
+la_data_in[23] I
+la_data_in[24] I
+la_data_in[25] I
+la_data_in[26] I
+la_data_in[27] I
+la_data_in[28] I
+la_data_in[29] I
+la_data_in[2] I
+la_data_in[30] I
+la_data_in[31] I
+la_data_in[32] I
+la_data_in[33] I
+la_data_in[34] I
+la_data_in[35] I
+la_data_in[36] I
+la_data_in[37] I
+la_data_in[38] I
+la_data_in[39] I
+la_data_in[3] I
+la_data_in[40] I
+la_data_in[41] I
+la_data_in[42] I
+la_data_in[43] I
+la_data_in[44] I
+la_data_in[45] I
+la_data_in[46] I
+la_data_in[47] I
+la_data_in[48] I
+la_data_in[49] I
+la_data_in[4] I
+la_data_in[50] I
+la_data_in[51] I
+la_data_in[52] I
+la_data_in[53] I
+la_data_in[54] I
+la_data_in[55] I
+la_data_in[56] I
+la_data_in[57] I
+la_data_in[58] I
+la_data_in[59] I
+la_data_in[5] I
+la_data_in[60] I
+la_data_in[61] I
+la_data_in[62] I
+la_data_in[63] I
+la_data_in[64] I
+la_data_in[65] I
+la_data_in[66] I
+la_data_in[67] I
+la_data_in[68] I
+la_data_in[69] I
+la_data_in[6] I
+la_data_in[70] I
+la_data_in[71] I
+la_data_in[72] I
+la_data_in[73] I
+la_data_in[74] I
+la_data_in[75] I
+la_data_in[76] I
+la_data_in[77] I
+la_data_in[78] I
+la_data_in[79] I
+la_data_in[7] I
+la_data_in[80] I
+la_data_in[81] I
+la_data_in[82] I
+la_data_in[83] I
+la_data_in[84] I
+la_data_in[85] I
+la_data_in[86] I
+la_data_in[87] I
+la_data_in[88] I
+la_data_in[89] I
+la_data_in[8] I
+la_data_in[90] I
+la_data_in[91] I
+la_data_in[92] I
+la_data_in[93] I
+la_data_in[94] I
+la_data_in[95] I
+la_data_in[96] I
+la_data_in[97] I
+la_data_in[98] I
+la_data_in[99] I
+la_data_in[9] I
+la_data_out[0] O
+la_data_out[100] O
+la_data_out[101] O
+la_data_out[102] O
+la_data_out[103] O
+la_data_out[104] O
+la_data_out[105] O
+la_data_out[106] O
+la_data_out[107] O
+la_data_out[108] O
+la_data_out[109] O
+la_data_out[10] O
+la_data_out[110] O
+la_data_out[111] O
+la_data_out[112] O
+la_data_out[113] O
+la_data_out[114] O
+la_data_out[115] O
+la_data_out[116] O
+la_data_out[117] O
+la_data_out[118] O
+la_data_out[119] O
+la_data_out[11] O
+la_data_out[120] O
+la_data_out[121] O
+la_data_out[122] O
+la_data_out[123] O
+la_data_out[124] O
+la_data_out[125] O
+la_data_out[126] O
+la_data_out[127] O
+la_data_out[12] O
+la_data_out[13] O
+la_data_out[14] O
+la_data_out[15] O
+la_data_out[16] O
+la_data_out[17] O
+la_data_out[18] O
+la_data_out[19] O
+la_data_out[1] O
+la_data_out[20] O
+la_data_out[21] O
+la_data_out[22] O
+la_data_out[23] O
+la_data_out[24] O
+la_data_out[25] O
+la_data_out[26] O
+la_data_out[27] O
+la_data_out[28] O
+la_data_out[29] O
+la_data_out[2] O
+la_data_out[30] O
+la_data_out[31] O
+la_data_out[32] O
+la_data_out[33] O
+la_data_out[34] O
+la_data_out[35] O
+la_data_out[36] O
+la_data_out[37] O
+la_data_out[38] O
+la_data_out[39] O
+la_data_out[3] O
+la_data_out[40] O
+la_data_out[41] O
+la_data_out[42] O
+la_data_out[43] O
+la_data_out[44] O
+la_data_out[45] O
+la_data_out[46] O
+la_data_out[47] O
+la_data_out[48] O
+la_data_out[49] O
+la_data_out[4] O
+la_data_out[50] O
+la_data_out[51] O
+la_data_out[52] O
+la_data_out[53] O
+la_data_out[54] O
+la_data_out[55] O
+la_data_out[56] O
+la_data_out[57] O
+la_data_out[58] O
+la_data_out[59] O
+la_data_out[5] O
+la_data_out[60] O
+la_data_out[61] O
+la_data_out[62] O
+la_data_out[63] O
+la_data_out[64] O
+la_data_out[65] O
+la_data_out[66] O
+la_data_out[67] O
+la_data_out[68] O
+la_data_out[69] O
+la_data_out[6] O
+la_data_out[70] O
+la_data_out[71] O
+la_data_out[72] O
+la_data_out[73] O
+la_data_out[74] O
+la_data_out[75] O
+la_data_out[76] O
+la_data_out[77] O
+la_data_out[78] O
+la_data_out[79] O
+la_data_out[7] O
+la_data_out[80] O
+la_data_out[81] O
+la_data_out[82] O
+la_data_out[83] O
+la_data_out[84] O
+la_data_out[85] O
+la_data_out[86] O
+la_data_out[87] O
+la_data_out[88] O
+la_data_out[89] O
+la_data_out[8] O
+la_data_out[90] O
+la_data_out[91] O
+la_data_out[92] O
+la_data_out[93] O
+la_data_out[94] O
+la_data_out[95] O
+la_data_out[96] O
+la_data_out[97] O
+la_data_out[98] O
+la_data_out[99] O
+la_data_out[9] O
+la_oenb[0] I
+la_oenb[100] I
+la_oenb[101] I
+la_oenb[102] I
+la_oenb[103] I
+la_oenb[104] I
+la_oenb[105] I
+la_oenb[106] I
+la_oenb[107] I
+la_oenb[108] I
+la_oenb[109] I
+la_oenb[10] I
+la_oenb[110] I
+la_oenb[111] I
+la_oenb[112] I
+la_oenb[113] I
+la_oenb[114] I
+la_oenb[115] I
+la_oenb[116] I
+la_oenb[117] I
+la_oenb[118] I
+la_oenb[119] I
+la_oenb[11] I
+la_oenb[120] I
+la_oenb[121] I
+la_oenb[122] I
+la_oenb[123] I
+la_oenb[124] I
+la_oenb[125] I
+la_oenb[126] I
+la_oenb[127] I
+la_oenb[12] I
+la_oenb[13] I
+la_oenb[14] I
+la_oenb[15] I
+la_oenb[16] I
+la_oenb[17] I
+la_oenb[18] I
+la_oenb[19] I
+la_oenb[1] I
+la_oenb[20] I
+la_oenb[21] I
+la_oenb[22] I
+la_oenb[23] I
+la_oenb[24] I
+la_oenb[25] I
+la_oenb[26] I
+la_oenb[27] I
+la_oenb[28] I
+la_oenb[29] I
+la_oenb[2] I
+la_oenb[30] I
+la_oenb[31] I
+la_oenb[32] I
+la_oenb[33] I
+la_oenb[34] I
+la_oenb[35] I
+la_oenb[36] I
+la_oenb[37] I
+la_oenb[38] I
+la_oenb[39] I
+la_oenb[3] I
+la_oenb[40] I
+la_oenb[41] I
+la_oenb[42] I
+la_oenb[43] I
+la_oenb[44] I
+la_oenb[45] I
+la_oenb[46] I
+la_oenb[47] I
+la_oenb[48] I
+la_oenb[49] I
+la_oenb[4] I
+la_oenb[50] I
+la_oenb[51] I
+la_oenb[52] I
+la_oenb[53] I
+la_oenb[54] I
+la_oenb[55] I
+la_oenb[56] I
+la_oenb[57] I
+la_oenb[58] I
+la_oenb[59] I
+la_oenb[5] I
+la_oenb[60] I
+la_oenb[61] I
+la_oenb[62] I
+la_oenb[63] I
+la_oenb[64] I
+la_oenb[65] I
+la_oenb[66] I
+la_oenb[67] I
+la_oenb[68] I
+la_oenb[69] I
+la_oenb[6] I
+la_oenb[70] I
+la_oenb[71] I
+la_oenb[72] I
+la_oenb[73] I
+la_oenb[74] I
+la_oenb[75] I
+la_oenb[76] I
+la_oenb[77] I
+la_oenb[78] I
+la_oenb[79] I
+la_oenb[7] I
+la_oenb[80] I
+la_oenb[81] I
+la_oenb[82] I
+la_oenb[83] I
+la_oenb[84] I
+la_oenb[85] I
+la_oenb[86] I
+la_oenb[87] I
+la_oenb[88] I
+la_oenb[89] I
+la_oenb[8] I
+la_oenb[90] I
+la_oenb[91] I
+la_oenb[92] I
+la_oenb[93] I
+la_oenb[94] I
+la_oenb[95] I
+la_oenb[96] I
+la_oenb[97] I
+la_oenb[98] I
+la_oenb[99] I
+la_oenb[9] I
+user_clock2 I
+user_irq[0] O
+user_irq[1] O
+user_irq[2] O
+wb_clk_i I
+wb_rst_i I
+wbs_ack_o O
+wbs_adr_i[0] I
+wbs_adr_i[10] I
+wbs_adr_i[11] I
+wbs_adr_i[12] I
+wbs_adr_i[13] I
+wbs_adr_i[14] I
+wbs_adr_i[15] I
+wbs_adr_i[16] I
+wbs_adr_i[17] I
+wbs_adr_i[18] I
+wbs_adr_i[19] I
+wbs_adr_i[1] I
+wbs_adr_i[20] I
+wbs_adr_i[21] I
+wbs_adr_i[22] I
+wbs_adr_i[23] I
+wbs_adr_i[24] I
+wbs_adr_i[25] I
+wbs_adr_i[26] I
+wbs_adr_i[27] I
+wbs_adr_i[28] I
+wbs_adr_i[29] I
+wbs_adr_i[2] I
+wbs_adr_i[30] I
+wbs_adr_i[31] I
+wbs_adr_i[3] I
+wbs_adr_i[4] I
+wbs_adr_i[5] I
+wbs_adr_i[6] I
+wbs_adr_i[7] I
+wbs_adr_i[8] I
+wbs_adr_i[9] I
+wbs_cyc_i I
+wbs_dat_i[0] I
+wbs_dat_i[10] I
+wbs_dat_i[11] I
+wbs_dat_i[12] I
+wbs_dat_i[13] I
+wbs_dat_i[14] I
+wbs_dat_i[15] I
+wbs_dat_i[16] I
+wbs_dat_i[17] I
+wbs_dat_i[18] I
+wbs_dat_i[19] I
+wbs_dat_i[1] I
+wbs_dat_i[20] I
+wbs_dat_i[21] I
+wbs_dat_i[22] I
+wbs_dat_i[23] I
+wbs_dat_i[24] I
+wbs_dat_i[25] I
+wbs_dat_i[26] I
+wbs_dat_i[27] I
+wbs_dat_i[28] I
+wbs_dat_i[29] I
+wbs_dat_i[2] I
+wbs_dat_i[30] I
+wbs_dat_i[31] I
+wbs_dat_i[3] I
+wbs_dat_i[4] I
+wbs_dat_i[5] I
+wbs_dat_i[6] I
+wbs_dat_i[7] I
+wbs_dat_i[8] I
+wbs_dat_i[9] I
+wbs_dat_o[0] O
+wbs_dat_o[10] O
+wbs_dat_o[11] O
+wbs_dat_o[12] O
+wbs_dat_o[13] O
+wbs_dat_o[14] O
+wbs_dat_o[15] O
+wbs_dat_o[16] O
+wbs_dat_o[17] O
+wbs_dat_o[18] O
+wbs_dat_o[19] O
+wbs_dat_o[1] O
+wbs_dat_o[20] O
+wbs_dat_o[21] O
+wbs_dat_o[22] O
+wbs_dat_o[23] O
+wbs_dat_o[24] O
+wbs_dat_o[25] O
+wbs_dat_o[26] O
+wbs_dat_o[27] O
+wbs_dat_o[28] O
+wbs_dat_o[29] O
+wbs_dat_o[2] O
+wbs_dat_o[30] O
+wbs_dat_o[31] O
+wbs_dat_o[3] O
+wbs_dat_o[4] O
+wbs_dat_o[5] O
+wbs_dat_o[6] O
+wbs_dat_o[7] O
+wbs_dat_o[8] O
+wbs_dat_o[9] O
+wbs_sel_i[0] I
+wbs_sel_i[1] I
+wbs_sel_i[2] I
+wbs_sel_i[3] I
+wbs_stb_i I
+wbs_we_i I
+
+*D_NET *576 0.320274
+*CONN
+*P wbs_dat_i[0] I
+*I *646:a[0] I *D user_proj_example
+*CAP
+1 wbs_dat_i[0] 0.000765455
+2 *646:a[0] 0.0023535
+3 *576:11 0.0750585
+4 *576:10 0.072705
+5 *576:8 0.0341526
+6 *576:7 0.0349181
+7 *576:7 *608:13 0
+8 *576:8 *602:8 0.100321
+*RES
+1 wbs_dat_i[0] *576:7 20.1964 
+2 *576:7 *576:8 1033.07 
+3 *576:8 *576:10 4.5 
+4 *576:10 *576:11 1449.22 
+5 *576:11 *646:a[0] 45.7857 
+*END
+
+*D_NET *577 0.450193
+*CONN
+*P wbs_dat_i[10] I
+*I *646:b[2] I *D user_proj_example
+*CAP
+1 wbs_dat_i[10] 0.000761576
+2 *646:b[2] 0.00232856
+3 *577:11 0.0750649
+4 *577:10 0.0727364
+5 *577:8 0.0229846
+6 *577:7 0.0237462
+7 *577:8 *578:8 0.141407
+8 *577:8 *602:8 0.111164
+*RES
+1 wbs_dat_i[10] *577:7 19.5893 
+2 *577:7 *577:8 1352.61 
+3 *577:8 *577:10 4.5 
+4 *577:10 *577:11 1449.83 
+5 *577:11 *646:b[2] 47.8393 
+*END
+
+*D_NET *578 0.470552
+*CONN
+*P wbs_dat_i[11] I
+*I *646:b[3] I *D user_proj_example
+*CAP
+1 wbs_dat_i[11] 0.000722188
+2 *646:b[3] 0.0023638
+3 *578:11 0.0727196
+4 *578:10 0.0703558
+5 *578:8 0.0186446
+6 *578:7 0.0193668
+7 *578:8 *579:8 0.144971
+8 *577:8 *578:8 0.141407
+*RES
+1 wbs_dat_i[11] *578:7 19.2857 
+2 *578:7 *578:8 1385.88 
+3 *578:8 *578:10 4.5 
+4 *578:10 *578:11 1450.13 
+5 *578:11 *646:b[3] 48.6607 
+*END
+
+*D_NET *579 0.479005
+*CONN
+*P wbs_dat_i[12] I
+*I *646:b[4] I *D user_proj_example
+*CAP
+1 wbs_dat_i[12] 0.000707766
+2 *646:b[4] 1.27254e-05
+3 *579:11 0.0724659
+4 *579:10 0.0724532
+5 *579:8 0.0192718
+6 *579:7 0.0199795
+7 *579:8 *580:8 0.149143
+8 *578:8 *579:8 0.144971
+*RES
+1 wbs_dat_i[12] *579:7 18.9821 
+2 *579:7 *579:8 1425.71 
+3 *579:8 *579:10 4.5 
+4 *579:10 *579:11 1493.24 
+5 *579:11 *646:b[4] 0.267857 
+*END
+
+*D_NET *580 0.487381
+*CONN
+*P wbs_dat_i[13] I
+*I *646:b[5] I *D user_proj_example
+*CAP
+1 wbs_dat_i[13] 0.000693344
+2 *646:b[5] 5.17501e-05
+3 *580:11 0.0725194
+4 *580:10 0.0724677
+5 *580:8 0.019575
+6 *580:7 0.0202683
+7 *580:8 *581:8 0.152662
+8 *579:8 *580:8 0.149143
+*RES
+1 wbs_dat_i[13] *580:7 18.6786 
+2 *580:7 *580:8 1458.98 
+3 *580:8 *580:10 4.5 
+4 *580:10 *580:11 1493.54 
+5 *580:11 *646:b[5] 1.08929 
+*END
+
+*D_NET *581 0.3946
+*CONN
+*P wbs_dat_i[14] I
+*I *646:b[6] I *D user_proj_example
+*CAP
+1 wbs_dat_i[14] 0.000678922
+2 *646:b[6] 9.40517e-05
+3 *581:11 0.0725761
+4 *581:10 0.0724821
+5 *581:8 0.0477135
+6 *581:7 0.0483924
+7 *580:8 *581:8 0.152662
+*RES
+1 wbs_dat_i[14] *581:7 18.375 
+2 *581:7 *581:8 1492.25 
+3 *581:8 *581:10 4.5 
+4 *581:10 *581:11 1493.85 
+5 *581:11 *646:b[6] 1.91071 
+*END
+
+*D_NET *582 0.388146
+*CONN
+*P wbs_dat_i[15] I
+*I *646:b[7] I *D user_proj_example
+*CAP
+1 wbs_dat_i[15] 0.00217157
+2 *646:b[7] 0.000522841
+3 *582:12 0.055797
+4 *582:11 0.0552741
+5 *582:9 0.0706908
+6 *582:7 0.0728623
+7 *582:12 *607:14 0.130827
+*RES
+1 wbs_dat_i[15] *582:7 43.8482 
+2 *582:7 *582:9 1457.1 
+3 *582:9 *582:11 4.5 
+4 *582:11 *582:12 1529.21 
+5 *582:12 *646:b[7] 15.0804 
+*END
+
+*D_NET *587 0.328069
+*CONN
+*P wbs_dat_i[1] I
+*I *646:a[1] I *D user_proj_example
+*CAP
+1 wbs_dat_i[1] 0.00234656
+2 *646:a[1] 0.000381224
+3 *587:12 0.0353107
+4 *587:11 0.0349295
+5 *587:9 0.0708096
+6 *587:7 0.0731561
+7 *587:7 *619:13 3.4846e-06
+8 *587:12 *598:10 0.111132
+*RES
+1 wbs_dat_i[1] *587:7 46.7232 
+2 *587:7 *587:9 1459.53 
+3 *587:9 *587:11 4.5 
+4 *587:11 *587:12 1068.39 
+5 *587:12 *646:a[1] 12.2411 
+*END
+
+*D_NET *598 0.401552
+*CONN
+*P wbs_dat_i[2] I
+*I *646:a[2] I *D user_proj_example
+*CAP
+1 wbs_dat_i[2] 6.33454e-05
+2 *646:a[2] 0.00041559
+3 *598:10 0.0150979
+4 *598:9 0.0146823
+5 *598:7 0.0728198
+6 *598:5 0.0728832
+7 *598:10 *601:14 0.114458
+8 *587:12 *598:10 0.111132
+*RES
+1 wbs_dat_i[2] *598:5 1.29464 
+2 *598:5 *598:7 1500.83 
+3 *598:7 *598:9 4.5 
+4 *598:9 *598:10 1093.45 
+5 *598:10 *646:a[2] 12.9554 
+*END
+
+*D_NET *601 0.408096
+*CONN
+*P wbs_dat_i[3] I
+*I *646:a[3] I *D user_proj_example
+*CAP
+1 wbs_dat_i[3] 0.00223828
+2 *646:a[3] 0.000430443
+3 *601:14 0.0158702
+4 *601:13 0.0154398
+5 *601:11 0.0707799
+6 *601:9 0.0730182
+7 *601:9 *633:13 0
+8 *601:14 *603:14 0.115862
+9 *598:10 *601:14 0.114458
+*RES
+1 wbs_dat_i[3] *601:9 46.0268 
+2 *601:9 *601:11 1458.92 
+3 *601:11 *601:13 4.5 
+4 *601:13 *601:14 1125.07 
+5 *601:14 *646:a[3] 13.2589 
+*END
+
+*D_NET *602 0.398423
+*CONN
+*P wbs_dat_i[4] I
+*I *646:a[4] I *D user_proj_example
+*CAP
+1 wbs_dat_i[4] 0.000751032
+2 *646:a[4] 0.00241612
+3 *602:11 0.0727431
+4 *602:10 0.070327
+5 *602:8 0.0199749
+6 *602:7 0.020726
+7 *602:7 wbs_dat_o[4] 0
+8 *576:8 *602:8 0.100321
+9 *577:8 *602:8 0.111164
+*RES
+1 wbs_dat_i[4] *602:7 19.8929 
+2 *602:7 *602:8 1145.61 
+3 *602:8 *602:10 4.5 
+4 *602:10 *602:11 1449.53 
+5 *602:11 *646:a[4] 49.0714 
+*END
+
+*D_NET *603 0.421069
+*CONN
+*P wbs_dat_i[5] I
+*I *646:a[5] I *D user_proj_example
+*CAP
+1 wbs_dat_i[5] 0.00224493
+2 *646:a[5] 0.000406272
+3 *603:14 0.0172675
+4 *603:13 0.0168612
+5 *603:11 0.070765
+6 *603:9 0.0730099
+7 *603:9 *635:13 0
+8 *603:14 *604:10 0.124653
+9 *601:14 *603:14 0.115862
+*RES
+1 wbs_dat_i[5] *603:9 46.0268 
+2 *603:9 *603:11 1458.62 
+3 *603:11 *603:13 4.5 
+4 *603:13 *603:14 1189.14 
+5 *603:14 *646:a[5] 12.7411 
+*END
+
+*D_NET *604 0.431989
+*CONN
+*P wbs_dat_i[6] I
+*I *646:a[6] I *D user_proj_example
+*CAP
+1 wbs_dat_i[6] 6.33454e-05
+2 *646:a[6] 0.00046015
+3 *604:10 0.0165292
+4 *604:9 0.016069
+5 *604:7 0.0727819
+6 *604:5 0.0728453
+7 *604:10 *605:12 0.128588
+8 *603:14 *604:10 0.124653
+*RES
+1 wbs_dat_i[6] *604:5 1.29464 
+2 *604:5 *604:7 1499.92 
+3 *604:7 *604:9 4.5 
+4 *604:9 *604:10 1219.95 
+5 *604:10 *646:a[6] 13.8661 
+*END
+
+*D_NET *605 0.441065
+*CONN
+*P wbs_dat_i[7] I
+*I *646:a[7] I *D user_proj_example
+*CAP
+1 wbs_dat_i[7] 0.00235313
+2 *646:a[7] 0.000435979
+3 *605:12 0.0171257
+4 *605:11 0.0166897
+5 *605:9 0.0707353
+6 *605:7 0.0730884
+7 *605:7 *637:13 3.4846e-06
+8 *605:12 *606:12 0.132046
+9 *604:10 *605:12 0.128588
+*RES
+1 wbs_dat_i[7] *605:7 46.7232 
+2 *605:7 *605:9 1458.01 
+3 *605:9 *605:11 4.5 
+4 *605:11 *605:12 1258.55 
+5 *605:12 *646:a[7] 13.3482 
+*END
+
+*D_NET *606 0.453511
+*CONN
+*P wbs_dat_i[8] I
+*I *646:b[0] I *D user_proj_example
+*CAP
+1 wbs_dat_i[8] 0.00221119
+2 *646:b[0] 0.000501622
+3 *606:12 0.0173978
+4 *606:11 0.0168962
+5 *606:9 0.0731315
+6 *606:7 0.0753427
+7 *606:12 *607:14 0.135984
+8 *605:12 *606:12 0.132046
+*RES
+1 wbs_dat_i[8] *606:7 43.8482 
+2 *606:7 *606:9 1457.71 
+3 *606:9 *606:11 4.5 
+4 *606:11 *606:12 1289.36 
+5 *606:12 *646:b[0] 14.4732 
+*END
+
+*D_NET *607 0.452071
+*CONN
+*P wbs_dat_i[9] I
+*I *646:b[1] I *D user_proj_example
+*CAP
+1 wbs_dat_i[9] 0.0023276
+2 *646:b[1] 0.00050471
+3 *607:14 0.0195966
+4 *607:13 0.0190918
+5 *607:11 0.0707056
+6 *607:9 0.0730332
+7 *582:12 *607:14 0.130827
+8 *606:12 *607:14 0.135984
+*RES
+1 wbs_dat_i[9] *607:9 47.6696 
+2 *607:9 *607:11 1457.4 
+3 *607:11 *607:13 4.5 
+4 *607:13 *607:14 1327.14 
+5 *607:14 *646:b[1] 14.7768 
+*END
+
+*D_NET *608 0.386247
+*CONN
+*P wbs_dat_o[0] O
+*I *646:p[0] O *D user_proj_example
+*CAP
+1 wbs_dat_o[0] 6.46928e-05
+2 *646:p[0] 0.000577822
+3 *608:13 0.103026
+4 *608:12 0.102961
+5 *608:10 0.0343187
+6 *608:9 0.0348965
+7 *608:10 *619:10 0.110402
+8 *576:7 *608:13 0
+*RES
+1 *646:p[0] *608:9 15.3839 
+2 *608:9 *608:10 1055.25 
+3 *608:10 *608:12 4.5 
+4 *608:12 *608:13 2052.42 
+5 *608:13 wbs_dat_o[0] 1.29464 
+*END
+
+*D_NET *619 0.46222
+*CONN
+*P wbs_dat_o[1] O
+*I *646:p[1] O *D user_proj_example
+*CAP
+1 wbs_dat_o[1] 0.00227258
+2 *646:p[1] 0.000558709
+3 *619:13 0.0998176
+4 *619:12 0.097545
+5 *619:10 0.0163067
+6 *619:9 0.0168655
+7 *619:10 *630:10 0.118449
+8 *587:7 *619:13 3.4846e-06
+9 *608:10 *619:10 0.110402
+*RES
+1 *646:p[1] *619:9 15.0804 
+2 *619:9 *619:10 1136.98 
+3 *619:10 *619:12 4.5 
+4 *619:12 *619:13 2010.51 
+5 *619:13 wbs_dat_o[1] 46.0268 
+*END
+
+*D_NET *630 0.480145
+*CONN
+*P wbs_dat_o[2] O
+*I *646:p[2] O *D user_proj_example
+*CAP
+1 wbs_dat_o[2] 0.0020513
+2 *646:p[2] 0.00047669
+3 *630:13 0.099587
+4 *630:12 0.0975357
+5 *630:10 0.0171437
+6 *630:9 0.0176204
+7 *630:10 *633:10 0.127282
+8 *619:10 *630:10 0.118449
+*RES
+1 *646:p[2] *630:9 13.5446 
+2 *630:9 *630:10 1213.79 
+3 *630:10 *630:12 4.5 
+4 *630:12 *630:13 2010.21 
+5 *630:13 wbs_dat_o[2] 42.2054 
+*END
+
+*D_NET *633 0.4999
+*CONN
+*P wbs_dat_o[3] O
+*I *646:p[3] O *D user_proj_example
+*CAP
+1 wbs_dat_o[3] 0.00226148
+2 *646:p[3] 0.000513929
+3 *633:13 0.0997911
+4 *633:12 0.0975296
+5 *633:10 0.0180802
+6 *633:9 0.0185941
+7 *633:10 *634:10 0.135848
+8 *601:9 *633:13 0
+9 *630:10 *633:10 0.127282
+*RES
+1 *646:p[3] *633:9 14.4732 
+2 *633:9 *633:10 1294.29 
+3 *633:10 *633:12 4.5 
+4 *633:12 *633:13 2009.9 
+5 *633:13 wbs_dat_o[3] 45.0804 
+*END
+
+*D_NET *634 0.519394
+*CONN
+*P wbs_dat_o[4] O
+*I *646:p[4] O *D user_proj_example
+*CAP
+1 wbs_dat_o[4] 0.00238532
+2 *646:p[4] 0.000492631
+3 *634:13 0.0999001
+4 *634:12 0.0975147
+5 *634:10 0.0191035
+6 *634:9 0.0195962
+7 *634:10 *635:10 0.144553
+8 *602:7 wbs_dat_o[4] 0
+9 *633:10 *634:10 0.135848
+*RES
+1 *646:p[4] *634:9 14.1696 
+2 *634:9 *634:10 1376.02 
+3 *634:10 *634:12 4.5 
+4 *634:12 *634:13 2009.6 
+5 *634:13 wbs_dat_o[4] 47.6696 
+*END
+
+*D_NET *635 0.538328
+*CONN
+*P wbs_dat_o[5] O
+*I *646:p[5] O *D user_proj_example
+*CAP
+1 wbs_dat_o[5] 0.00218464
+2 *646:p[5] 0.000471334
+3 *635:13 0.0996889
+4 *635:12 0.0975043
+5 *635:10 0.0201019
+6 *635:9 0.0205733
+7 *635:10 *636:10 0.15325
+8 *603:9 *635:13 0
+9 *634:10 *635:10 0.144553
+*RES
+1 *646:p[5] *635:9 13.8661 
+2 *635:9 *635:10 1457.75 
+3 *635:10 *635:12 4.5 
+4 *635:12 *635:13 2009.29 
+5 *635:13 wbs_dat_o[5] 44.7946 
+*END
+
+*D_NET *636 0.557916
+*CONN
+*P wbs_dat_o[6] O
+*I *646:p[6] O *D user_proj_example
+*CAP
+1 wbs_dat_o[6] 0.00205795
+2 *646:p[6] 0.000424593
+3 *636:13 0.0995536
+4 *636:12 0.0974956
+5 *636:10 0.0210082
+6 *636:9 0.0214328
+7 *636:10 *637:10 0.162693
+8 *635:10 *636:10 0.15325
+*RES
+1 *646:p[6] *636:9 12.7411 
+2 *636:9 *636:10 1540.3 
+3 *636:10 *636:12 4.5 
+4 *636:12 *636:13 2008.99 
+5 *636:13 wbs_dat_o[6] 42.2054 
+*END
+
+*D_NET *637 0.471887
+*CONN
+*P wbs_dat_o[7] O
+*I *646:p[7] O *D user_proj_example
+*CAP
+1 wbs_dat_o[7] 0.00227919
+2 *646:p[7] 0.000428739
+3 *637:13 0.0997673
+4 *637:12 0.0974881
+5 *637:10 0.0543992
+6 *637:9 0.0548279
+7 *605:7 *637:13 3.4846e-06
+8 *636:10 *637:10 0.162693
+*RES
+1 *646:p[7] *637:9 13.2589 
+2 *637:9 *637:10 1627.38 
+3 *637:10 *637:12 4.5 
+4 *637:12 *637:13 2008.69 
+5 *637:13 wbs_dat_o[7] 46.0268 
+*END

tapeout/logs/compose.log

diff --git a/tapeout/logs/compose.log b/tapeout/logs/compose.log
new file mode 100644
index 0000000..dc5ca8f
--- /dev/null
+++ b/tapeout/logs/compose.log
@@ -0,0 +1,1518 @@
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/compose.tcl" from command line.
+caravel: 10000 rects
+caravel: 20000 rects
+caravel: 30000 rects
+caravel: 40000 rects
+caravel: 50000 rects
+caravel: 60000 rects
+caravel: 70000 rects
+caravel: 80000 rects
+caravel
+Scaled magic input cell advSeal_6um_gen geometry by factor of 2
+Writing final GDS. . . 
+Scaled magic input cell seal_ring_corner_abstract geometry by factor of 2
+Scaled magic input cell caravel_motto geometry by factor of 2
+Scaled magic input cell font_22 geometry by factor of 24
+Scaled magic input cell font_73 geometry by factor of 24
+Scaled magic input cell font_43 geometry by factor of 24
+Scaled magic input cell font_49 geometry by factor of 24
+Scaled magic input cell font_65 geometry by factor of 24
+Scaled magic input cell font_68 geometry by factor of 24
+Scaled magic input cell font_54 geometry by factor of 24
+Scaled magic input cell font_67 geometry by factor of 24
+Scaled magic input cell font_6E geometry by factor of 24
+Scaled magic input cell font_69 geometry by factor of 24
+Scaled magic input cell font_6C geometry by factor of 24
+Scaled magic input cell font_61 geometry by factor of 24
+Scaled magic input cell font_53 geometry by factor of 24
+Scaled magic input cell font_79 geometry by factor of 24
+Scaled magic input cell font_76 geometry by factor of 24
+Scaled magic input cell font_74 geometry by factor of 24
+Scaled magic input cell font_72 geometry by factor of 24
+Scaled magic input cell font_70 geometry by factor of 24
+Scaled magic input cell font_66 geometry by factor of 24
+Scaled magic input cell font_63 geometry by factor of 24
+Scaled magic input cell font_62 geometry by factor of 24
+Scaled magic input cell font_57 geometry by factor of 24
+Scaled magic input cell font_56 geometry by factor of 24
+Scaled magic input cell font_50 geometry by factor of 24
+Scaled magic input cell font_47 geometry by factor of 24
+Scaled magic input cell font_44 geometry by factor of 24
+Scaled magic input cell font_35 geometry by factor of 24
+Scaled magic input cell font_32 geometry by factor of 24
+Scaled magic input cell font_30 geometry by factor of 24
+Scaled magic input cell font_29 geometry by factor of 24
+Scaled magic input cell font_28 geometry by factor of 24
+Scaled magic input cell font_20 geometry by factor of 24
+Scaled magic input cell font_6F geometry by factor of 24
+Scaled magic input cell font_6B geometry by factor of 24
+Scaled magic input cell font_4F geometry by factor of 24
+Scaled magic input cell font_4B geometry by factor of 24
+Scaled magic input cell font_2D geometry by factor of 24
+Scaled magic input cell open_source geometry by factor of 2
+Scaled magic input cell user_id_textblock geometry by factor of 2
+Scaled magic input cell alpha_0 geometry by factor of 2
+caravel_clocking: 10000 rects
+caravel_clocking: 20000 rects
+caravel_clocking: 30000 rects
+housekeeping: 10000 rects
+housekeeping: 20000 rects
+housekeeping: 30000 rects
+housekeeping: 40000 rects
+housekeeping: 50000 rects
+housekeeping: 60000 rects
+housekeeping: 70000 rects
+housekeeping: 80000 rects
+housekeeping: 90000 rects
+housekeeping: 100000 rects
+housekeeping: 110000 rects
+housekeeping: 120000 rects
+housekeeping: 130000 rects
+housekeeping: 140000 rects
+housekeeping: 150000 rects
+housekeeping: 160000 rects
+housekeeping: 170000 rects
+housekeeping: 180000 rects
+housekeeping: 190000 rects
+housekeeping: 200000 rects
+housekeeping: 210000 rects
+housekeeping: 220000 rects
+housekeeping: 230000 rects
+housekeeping: 240000 rects
+housekeeping: 250000 rects
+housekeeping: 260000 rects
+housekeeping: 270000 rects
+housekeeping: 280000 rects
+housekeeping: 290000 rects
+housekeeping: 300000 rects
+housekeeping: 310000 rects
+housekeeping: 320000 rects
+housekeeping: 330000 rects
+housekeeping: 340000 rects
+housekeeping: 350000 rects
+housekeeping: 360000 rects
+housekeeping: 370000 rects
+housekeeping: 380000 rects
+housekeeping: 390000 rects
+housekeeping: 400000 rects
+housekeeping: 410000 rects
+housekeeping: 420000 rects
+housekeeping: 430000 rects
+housekeeping: 440000 rects
+housekeeping: 450000 rects
+housekeeping: 460000 rects
+housekeeping: 470000 rects
+housekeeping: 480000 rects
+housekeeping: 490000 rects
+housekeeping: 500000 rects
+housekeeping: 510000 rects
+housekeeping: 520000 rects
+digital_pll: 10000 rects
+digital_pll: 20000 rects
+Scaled magic input cell sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__nfet_g5v0d10v5_PKVMTM geometry by factor of 2
+mgmt_protect: 10000 rects
+mgmt_protect: 20000 rects
+mgmt_protect: 30000 rects
+mgmt_protect: 40000 rects
+mgmt_protect: 50000 rects
+mgmt_protect: 60000 rects
+mgmt_protect: 70000 rects
+mgmt_protect: 80000 rects
+mgmt_protect: 90000 rects
+mgmt_protect: 100000 rects
+mgmt_protect: 110000 rects
+mgmt_protect: 120000 rects
+mgmt_protect: 130000 rects
+mgmt_protect: 140000 rects
+mgmt_protect: 150000 rects
+mgmt_protect: 160000 rects
+mgmt_protect: 170000 rects
+mgmt_protect: 180000 rects
+mgmt_protect: 190000 rects
+mgmt_protect: 200000 rects
+mgmt_protect: 210000 rects
+mgmt_protect: 220000 rects
+mgmt_protect: 230000 rects
+mgmt_protect: 240000 rects
+mgmt_protect: 250000 rects
+mgmt_protect: 260000 rects
+mgmt_protect: 270000 rects
+mgmt_protect: 280000 rects
+mgmt_protect: 290000 rects
+mgmt_protect: 300000 rects
+mgmt_protect: 310000 rects
+mgmt_protect: 320000 rects
+mgmt_protect: 330000 rects
+mgmt_protect: 340000 rects
+mgmt_protect: 350000 rects
+mgmt_protect: 360000 rects
+mgmt_protect: 370000 rects
+mgmt_protect: 380000 rects
+mgmt_protect: 390000 rects
+mgmt_protect: 400000 rects
+Scaled magic input cell user_project_wrapper geometry by factor of 2
+user_project_wrapper: 10000 rects
+user_project_wrapper: 20000 rects
+user_project_wrapper: 30000 rects
+user_project_wrapper: 40000 rects
+user_project_wrapper: 50000 rects
+Processing timestamp mismatches: sky130_fd_sc_hd__tapvpwrvgnd_1, sky130_fd_sc_hd__buf_8, sky130_ef_sc_hd__decap_12, sky130_ef_io__com_bus_slice_10um, sky130_ef_io__com_bus_slice_20um, sky130_ef_io__com_bus_slice_1um, sky130_ef_io__com_bus_slice_5um, sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um, sky130_ef_io__disconnect_vdda_slice_5um, sky130_ef_io__vccd_lvc_clamped_pad, sky130_ef_io__vddio_hvc_clamped_pad, sky130_ef_io__vssd_lvc_clamped_pad, sky130_ef_io__vssio_hvc_clamped_pad, sky130_ef_io__gpiov2_pad_wrapped, sky130_fd_io__top_xres4v2, sky130_ef_io__corner_pad, sky130_ef_io__vccd_lvc_clamped3_pad, sky130_ef_io__vdda_hvc_clamped_pad, sky130_ef_io__vssa_hvc_clamped_pad, sky130_ef_io__vssd_lvc_clamped3_pad, gpio_control_power_routing, gpio_control_power_routing_right, gpio_control_power_routing_top, sky130_fd_sc_hd__inv_12, mprj2_logic_high, sky130_fd_sc_hd__conb_1, sky130_fd_sc_hd__decap_3, sky130_fd_sc_hd__fill_1, sky130_fd_sc_hd__decap_4, sky130_fd_sc_hd__decap_12, sky130_fd_sc_hd__decap_6, mprj_logic_high, sky130_fd_sc_hd__fill_2, sky130_fd_sc_hd__decap_8, sky130_fd_sc_hvl__conb_1, mgmt_protect_hv, sky130_fd_sc_hvl__lsbufhv2lv_1, sky130_fd_sc_hvl__fill_2, sky130_fd_sc_hvl__fill_1, sky130_fd_sc_hd__bufbuf_8, sky130_fd_sc_hd__buf_6, sky130_fd_sc_hd__buf_4, sky130_fd_sc_hd__nand2_8, sky130_fd_sc_hd__nand2_4, sky130_fd_sc_hd__nand2_2, sky130_fd_sc_hd__nand2_1, sky130_fd_sc_hd__clkbuf_4, sky130_fd_sc_hd__clkbuf_8, sky130_fd_sc_hd__and2_1, sky130_fd_sc_hd__and2_2, sky130_fd_sc_hd__and2_4, sky130_fd_sc_hd__and3b_4, sky130_fd_sc_hd__and3b_2, sky130_fd_sc_hd__and3b_1, sky130_fd_sc_hd__and2b_4, sky130_fd_sc_hd__clkinv_2, sky130_fd_sc_hd__inv_2, sky130_fd_sc_hd__clkinv_8, sky130_fd_sc_hd__clkinv_4, sky130_fd_sc_hd__inv_4, sky130_fd_sc_hd__diode_2, sky130_fd_sc_hd__dfbbp_1, sky130_fd_sc_hd__inv_8, sky130_fd_sc_hd__nor2_2, sky130_fd_sc_hd__mux2_2, sky130_fd_sc_hvl__buf_8, sky130_fd_sc_hvl__fill_4, sky130_fd_sc_hvl__inv_8, sky130_fd_sc_hvl__schmittbuf_1, sky130_fd_sc_hd__o32a_2, sky130_fd_sc_hd__o21ba_2, sky130_fd_sc_hd__nand4b_2, sky130_fd_sc_hd__o2bb2a_2, sky130_fd_sc_hd__xor2_2, sky130_fd_sc_hd__a21boi_2, sky130_fd_sc_hd__nand3b_2, sky130_fd_sc_hd__o221a_2, sky130_fd_sc_hd__o22a_2, sky130_fd_sc_hd__o2111a_2, sky130_fd_sc_hd__a32o_2, sky130_fd_sc_hd__or2_2, sky130_fd_sc_hd__einvp_2, sky130_fd_sc_hd__einvn_8, sky130_fd_sc_hd__einvn_4, sky130_fd_sc_hd__clkinv_1, sky130_fd_sc_hd__einvp_1, sky130_fd_sc_hd__clkbuf_1, sky130_fd_sc_hd__clkbuf_2, sky130_fd_sc_hd__clkbuf_16, sky130_fd_sc_hd__dfrtp_2, sky130_fd_sc_hd__buf_2, sky130_fd_sc_hd__a22o_2, sky130_fd_sc_hd__a21o_2, sky130_fd_sc_hd__nand3_2, sky130_fd_sc_hd__o31a_2, sky130_fd_sc_hd__o21ai_2, sky130_fd_sc_hd__o211a_2, sky130_fd_sc_hd__and3_2, sky130_fd_sc_hd__nand2b_2, sky130_fd_sc_hd__a211o_2, sky130_fd_sc_hd__o21a_2, sky130_fd_sc_hd__a21oi_2, sky130_fd_sc_hd__and2b_2, sky130_fd_sc_hd__xnor2_2, sky130_fd_sc_hd__and4b_2, sky130_fd_sc_hd__nand4_2, sky130_fd_sc_hd__a31o_2, sky130_fd_sc_hd__inv_6, sky130_fd_sc_hd__a21o_4, sky130_fd_sc_hd__a21oi_4, sky130_fd_sc_hd__a221o_4, sky130_fd_sc_hd__a221oi_1, sky130_fd_sc_hd__and4_2, sky130_fd_sc_hd__o31a_4, sky130_fd_sc_hd__mux2_8, sky130_fd_sc_hd__o221a_4, sky130_fd_sc_hd__nor3_4, sky130_fd_sc_hd__xor2_1, sky130_fd_sc_hd__o21a_4, sky130_fd_sc_hd__nand3b_4, sky130_fd_sc_hd__and4b_4, sky130_fd_sc_hd__a31oi_4, sky130_fd_sc_hd__nand4b_4, sky130_fd_sc_hd__a2111oi_1, sky130_fd_sc_hd__nor3b_1, sky130_fd_sc_hd__o41a_1, sky130_fd_sc_hd__a311oi_2, sky130_fd_sc_hd__and2b_1, sky130_fd_sc_hd__a41o_1, sky130_fd_sc_hd__and4_1, sky130_fd_sc_hd__a31oi_1, sky130_fd_sc_hd__nand4b_1, sky130_fd_sc_hd__o2111a_1, sky130_fd_sc_hd__o211a_1, sky130_fd_sc_hd__o311a_1, sky130_fd_sc_hd__nand4_1, sky130_fd_sc_hd__a21boi_1, sky130_fd_sc_hd__o32a_1, sky130_fd_sc_hd__and3_1, sky130_fd_sc_hd__nand2b_4, sky130_fd_sc_hd__a2111o_2, sky130_fd_sc_hd__nor4_4, sky130_fd_sc_hd__a2111o_4, sky130_fd_sc_hd__nor4_2, sky130_fd_sc_hd__a2111o_1, sky130_fd_sc_hd__o221a_1, sky130_fd_sc_hd__nor2_8, sky130_fd_sc_hd__nor2_4, sky130_fd_sc_hd__a311o_1, sky130_fd_sc_hd__nand3_4, sky130_fd_sc_hd__and3_4, sky130_fd_sc_hd__and4bb_2, sky130_fd_sc_hd__and4bb_1, sky130_fd_sc_hd__and4b_1, sky130_fd_sc_hd__o21ba_1, sky130_fd_sc_hd__a211o_1, sky130_fd_sc_hd__a221o_2, sky130_fd_sc_hd__o2bb2a_1, sky130_fd_sc_hd__a21bo_1, sky130_fd_sc_hd__a211o_4, sky130_fd_sc_hd__a221o_1, sky130_fd_sc_hd__a22o_1, sky130_fd_sc_hd__a32o_1, sky130_fd_sc_hd__dfstp_4, sky130_fd_sc_hd__buf_12, sky130_fd_sc_hd__dlymetal6s2s_1, sky130_fd_sc_hd__dlygate4sd3_1, sky130_fd_sc_hd__dfrtp_1, sky130_fd_sc_hd__dfstp_2, sky130_fd_sc_hd__dfrtn_1, sky130_fd_sc_hd__dfrtp_4, sky130_fd_sc_hd__dfstp_1, sky130_fd_sc_hd__dfxtp_1, sky130_fd_sc_hd__mux2_1, sky130_fd_sc_hd__o31a_1, sky130_fd_sc_hd__a21o_1, sky130_fd_sc_hd__o31ai_1, sky130_fd_sc_hd__nor4_1, sky130_fd_sc_hd__nor3_1, sky130_fd_sc_hd__nor3_2, sky130_fd_sc_hd__a21oi_1, sky130_fd_sc_hd__nor2_1, sky130_fd_sc_hd__a2bb2o_1, sky130_fd_sc_hd__o21ai_1, sky130_fd_sc_hd__o22a_1, sky130_fd_sc_hd__nand2b_1, sky130_fd_sc_hd__o21a_1, sky130_fd_sc_hd__a31o_1, sky130_fd_sc_hd__nand3_1, sky130_fd_sc_hd__o2111ai_1, sky130_fd_sc_hd__xnor2_1, sky130_fd_sc_hd__mux2_4, gpio_defaults_block, sky130_fd_sc_hd__and2_0, sky130_fd_sc_hd__o21ai_4, sky130_fd_sc_hd__or2_0, sky130_fd_sc_hd__dfbbn_2, sky130_fd_sc_hd__macro_sparecell, sky130_fd_sc_hd__buf_16, sky130_fd_sc_hd__nor3b_2, sky130_fd_sc_hd__o211ai_4, sky130_fd_sc_hd__a41oi_1, sky130_fd_sc_hd__o2bb2ai_1, sky130_fd_sc_hd__o31ai_2, sky130_fd_sc_hd__o2111ai_2, sky130_fd_sc_hd__nand4bb_1, sky130_fd_sc_hd__nand3b_1, sky130_fd_sc_hd__o21bai_1, sky130_fd_sc_hvl__diode_2, sky130_fd_sc_hvl__decap_4, sky130_fd_sc_hvl__decap_8, seal_ring_corner_abstract.
+   Generating output for cell advSeal_6um_gen
+Reading "sealring_slots".
+Reading "seal_ring_slots_array".
+Reading "sr_polygon00011".
+Reading "sr_polygon00039".
+Reading "sr_polygon00035".
+Reading "sr_polygon00015".
+Reading "sr_polygon00007".
+Reading "sr_polygon00001".
+Reading "sr_polygon00002".
+Reading "sr_polygon00003".
+Reading "sr_polygon00004".
+Reading "sr_polygon00005".
+Reading "sr_polygon00006".
+Reading "nikon_sealring_shape".
+Reading "sr_polygon00019".
+Reading "sr_polygon00023".
+Reading "sr_polygon00027".
+Reading "sr_polygon00031".
+Reading "sr_polygon00036".
+Reading "sr_polygon00032".
+Reading "sr_polygon00016".
+Reading "sr_polygon00020".
+Reading "sr_polygon00024".
+Reading "sr_polygon00028".
+Reading "seal_ring_corner".
+Reading "advSeal_6um_gen".
+   Generating output for cell caravel_0008d8db_fill_pattern
+Reading "caravel_0008d8db_fill_pattern_0_0".
+Reading "caravel_0008d8db_fill_pattern_1_0".
+Reading "caravel_0008d8db_fill_pattern_0_1".
+Reading "caravel_0008d8db_fill_pattern_1_1".
+Reading "caravel_0008d8db_fill_pattern_2_0".
+Reading "caravel_0008d8db_fill_pattern_2_1".
+Reading "caravel_0008d8db_fill_pattern_3_0".
+Reading "caravel_0008d8db_fill_pattern_3_1".
+Reading "caravel_0008d8db_fill_pattern_4_0".
+Reading "caravel_0008d8db_fill_pattern_4_1".
+Reading "caravel_0008d8db_fill_pattern_5_0".
+Reading "caravel_0008d8db_fill_pattern_5_1".
+Reading "caravel_0008d8db_fill_pattern_0_2".
+Reading "caravel_0008d8db_fill_pattern_1_2".
+Reading "caravel_0008d8db_fill_pattern_2_2".
+Reading "caravel_0008d8db_fill_pattern_3_2".
+Reading "caravel_0008d8db_fill_pattern_4_2".
+Reading "caravel_0008d8db_fill_pattern_5_2".
+Reading "caravel_0008d8db_fill_pattern_0_3".
+Reading "caravel_0008d8db_fill_pattern_1_3".
+Reading "caravel_0008d8db_fill_pattern_2_3".
+Reading "caravel_0008d8db_fill_pattern_3_3".
+Reading "caravel_0008d8db_fill_pattern_4_3".
+Reading "caravel_0008d8db_fill_pattern_5_3".
+Reading "caravel_0008d8db_fill_pattern_0_4".
+Reading "caravel_0008d8db_fill_pattern_1_4".
+Reading "caravel_0008d8db_fill_pattern_2_4".
+Reading "caravel_0008d8db_fill_pattern_3_4".
+Reading "caravel_0008d8db_fill_pattern_4_4".
+Reading "caravel_0008d8db_fill_pattern_5_4".
+Reading "caravel_0008d8db_fill_pattern_0_5".
+Reading "caravel_0008d8db_fill_pattern_1_5".
+Reading "caravel_0008d8db_fill_pattern_2_5".
+Reading "caravel_0008d8db_fill_pattern_3_5".
+Reading "caravel_0008d8db_fill_pattern_4_5".
+Reading "caravel_0008d8db_fill_pattern_5_5".
+Reading "caravel_0008d8db_fill_pattern_0_6".
+Reading "caravel_0008d8db_fill_pattern_1_6".
+Reading "caravel_0008d8db_fill_pattern_2_6".
+Reading "caravel_0008d8db_fill_pattern_3_6".
+Reading "caravel_0008d8db_fill_pattern_4_6".
+Reading "caravel_0008d8db_fill_pattern_5_6".
+Reading "caravel_0008d8db_fill_pattern_0_7".
+Reading "caravel_0008d8db_fill_pattern_1_7".
+Reading "caravel_0008d8db_fill_pattern_2_7".
+Reading "caravel_0008d8db_fill_pattern_3_7".
+Reading "caravel_0008d8db_fill_pattern_4_7".
+Reading "caravel_0008d8db_fill_pattern_5_7".
+Reading "caravel_0008d8db_fill_pattern".
+   Generating output for cell caravel
+Reading "caravel_logo".
+Reading "font_22".
+Reading "font_73".
+Reading "font_43".
+Reading "font_49".
+Reading "font_65".
+Reading "font_68".
+Reading "font_54".
+Reading "font_67".
+Reading "font_6E".
+Reading "font_69".
+Reading "font_6C".
+Reading "font_61".
+Reading "font_53".
+Reading "caravel_motto".
+Reading "font_79".
+Reading "font_76".
+Reading "font_74".
+Reading "font_72".
+Reading "font_70".
+Reading "font_66".
+Reading "font_63".
+Reading "font_62".
+Reading "font_57".
+Reading "font_56".
+Reading "font_50".
+Reading "font_47".
+Reading "font_44".
+Reading "font_35".
+Reading "font_32".
+Reading "font_30".
+Reading "font_29".
+Reading "font_28".
+Reading "font_20".
+Reading "font_6F".
+Reading "font_6B".
+Reading "font_4F".
+Reading "font_4B".
+Reading "font_2D".
+Reading "copyright_block".
+Reading "open_source".
+Reading "sky130_fd_sc_hvl__decap_8".
+Reading "sky130_fd_sc_hvl__decap_4".
+Reading "sky130_fd_sc_hvl__diode_2".
+Reading "sky130_fd_sc_hvl__fill_1".
+Reading "sky130_fd_sc_hvl__fill_2".
+Reading "sky130_fd_sc_hvl__lsbufhv2lv_1".
+Reading "xres_buf".
+Reading "alpha_8".
+Reading "alpha_D".
+Reading "alpha_B".
+Reading "alpha_0".
+Reading "user_id_textblock".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "gpio_defaults_block_1803".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__nand4bb_1".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__a41oi_1".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__dfstp_1".
+Reading "sky130_fd_sc_hd__dfrtp_4".
+Reading "sky130_fd_sc_hd__dfrtn_1".
+Reading "sky130_fd_sc_hd__dfstp_2".
+Reading "sky130_fd_sc_hd__dfrtp_1".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__dfrtp_2".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "caravel_clocking".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "buff_flash_clkrst".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__macro_sparecell".
+Reading "sky130_fd_sc_hd__dfbbn_2".
+Reading "sky130_fd_sc_hd__or2_0".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__and2_0".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__buf_16".
+Reading "gpio_logic_high".
+Reading "gpio_control_block".
+Reading "sky130_fd_sc_hd__dfstp_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__nand4b_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "housekeeping".
+Reading "sky130_fd_sc_hd__einvp_1".
+Reading "sky130_fd_sc_hd__clkinv_1".
+Reading "sky130_fd_sc_hd__einvn_4".
+Reading "sky130_fd_sc_hd__einvn_8".
+Reading "sky130_fd_sc_hd__einvp_2".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__nand4b_2".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__o32a_2".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "digital_pll".
+Reading "user_id_programming".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "CB_sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "CB_sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "CB_sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "CB_sky130_fd_sc_hvl__schmittbuf_1".
+Reading "CB_sky130_fd_sc_hvl__buf_8".
+Reading "CB_sky130_fd_sc_hvl__inv_8".
+Reading "CB_sky130_fd_sc_hvl__fill_4".
+Reading "CB_sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "CB_sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "CB_sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "simple_por".
+Reading "YA_sky130_fd_sc_hd__decap_3".
+Reading "YA_sky130_ef_sc_hd__decap_12".
+Reading "YA_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "YA_sky130_fd_sc_hd__fill_1".
+Reading "YA_sky130_fd_sc_hd__decap_4".
+Reading "YA_sky130_fd_sc_hd__decap_6".
+Reading "YA_sky130_fd_sc_hd__fill_2".
+Reading "YA_sky130_fd_sc_hd__decap_8".
+Reading "YA_sky130_fd_sc_hd__diode_2".
+Reading "YA_sky130_fd_sc_hd__clkbuf_16".
+Reading "YA_sky130_fd_sc_hd__o211a_1".
+Reading "YA_sky130_fd_sc_hd__dfxtp_2".
+Reading "YA_sky130_fd_sc_hd__o21a_1".
+Reading "YA_sky130_fd_sc_hd__mux2_1".
+Reading "YA_sky130_fd_sc_hd__or2_1".
+Reading "YA_sky130_fd_sc_hd__dfxtp_1".
+Reading "YA_sky130_fd_sc_hd__a22o_1".
+Reading "YA_sky130_fd_sc_hd__a21o_2".
+Reading "YA_sky130_fd_sc_hd__a21o_1".
+Reading "YA_sky130_fd_sc_hd__a22o_4".
+Reading "YA_sky130_fd_sc_hd__buf_8".
+Reading "YA_sky130_fd_sc_hd__o21a_2".
+Reading "YA_sky130_fd_sc_hd__mux2_2".
+Reading "YA_sky130_fd_sc_hd__buf_4".
+Reading "YA_sky130_fd_sc_hd__clkbuf_8".
+Reading "YA_sky130_fd_sc_hd__buf_6".
+Reading "YA_sky130_fd_sc_hd__dfxtp_4".
+Reading "YA_sky130_fd_sc_hd__buf_2".
+Reading "YA_sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "YA_sky130_fd_sc_hd__o21ai_1".
+Reading "YA_sky130_fd_sc_hd__mux4_1".
+Reading "YA_sky130_fd_sc_hd__buf_12".
+Reading "YA_sky130_fd_sc_hd__mux4_2".
+Reading "YA_sky130_fd_sc_hd__inv_2".
+Reading "YA_sky130_fd_sc_hd__and3_2".
+Reading "YA_sky130_fd_sc_hd__nand2_1".
+Reading "YA_sky130_fd_sc_hd__a2bb2o_1".
+Reading "YA_sky130_fd_sc_hd__or3b_1".
+Reading "YA_sky130_fd_sc_hd__o32a_1".
+Reading "YA_sky130_fd_sc_hd__a2bb2o_2".
+Reading "YA_sky130_fd_sc_hd__o311a_1".
+Reading "YA_sky130_fd_sc_hd__o221a_1".
+Reading "YA_sky130_fd_sc_hd__o31a_1".
+Reading "YA_sky130_fd_sc_hd__o211a_2".
+Reading "YA_sky130_fd_sc_hd__and3_1".
+Reading "YA_sky130_fd_sc_hd__a211oi_1".
+Reading "YA_sky130_fd_sc_hd__and4_4".
+Reading "YA_sky130_fd_sc_hd__and4_1".
+Reading "YA_sky130_fd_sc_hd__clkbuf_4".
+Reading "YA_sky130_fd_sc_hd__and3b_1".
+Reading "YA_sky130_fd_sc_hd__a211o_4".
+Reading "YA_sky130_fd_sc_hd__a211o_1".
+Reading "YA_sky130_fd_sc_hd__o21ba_1".
+Reading "YA_sky130_fd_sc_hd__a21oi_1".
+Reading "YA_sky130_fd_sc_hd__nor2_1".
+Reading "YA_sky130_fd_sc_hd__nand2_8".
+Reading "YA_sky130_fd_sc_hd__a311o_1".
+Reading "YA_sky130_fd_sc_hd__nor2_2".
+Reading "YA_sky130_fd_sc_hd__a41o_1".
+Reading "YA_sky130_fd_sc_hd__nor3_2".
+Reading "YA_sky130_fd_sc_hd__or4bb_4".
+Reading "YA_sky130_fd_sc_hd__nor3_1".
+Reading "YA_sky130_fd_sc_hd__or4b_4".
+Reading "YA_sky130_fd_sc_hd__or3b_4".
+Reading "YA_sky130_fd_sc_hd__a31o_1".
+Reading "YA_sky130_fd_sc_hd__a211o_2".
+Reading "YA_sky130_fd_sc_hd__or2_2".
+Reading "YA_sky130_fd_sc_hd__a31o_2".
+Reading "YA_sky130_fd_sc_hd__a221o_1".
+Reading "YA_sky130_fd_sc_hd__and4b_4".
+Reading "YA_sky130_fd_sc_hd__and3_4".
+Reading "YA_sky130_fd_sc_hd__mux2_8".
+Reading "YA_sky130_fd_sc_hd__o21ai_2".
+Reading "YA_sky130_fd_sc_hd__and4b_1".
+Reading "YA_sky130_fd_sc_hd__or4b_1".
+Reading "YA_sky130_fd_sc_hd__o211a_4".
+Reading "YA_sky130_fd_sc_hd__a32o_1".
+Reading "YA_sky130_fd_sc_hd__a21boi_1".
+Reading "YA_sky130_fd_sc_hd__o41ai_4".
+Reading "YA_sky130_fd_sc_hd__o31a_2".
+Reading "YA_sky130_fd_sc_hd__nand2_4".
+Reading "YA_sky130_fd_sc_hd__a31oi_4".
+Reading "YA_sky130_fd_sc_hd__and4_2".
+Reading "YA_sky130_fd_sc_hd__nand3_4".
+Reading "YA_sky130_fd_sc_hd__and4b_2".
+Reading "YA_sky130_fd_sc_hd__o41a_4".
+Reading "YA_sky130_fd_sc_hd__and4bb_2".
+Reading "YA_sky130_fd_sc_hd__clkinv_2".
+Reading "YA_sky130_fd_sc_hd__and2b_2".
+Reading "YA_sky130_fd_sc_hd__or4bb_1".
+Reading "YA_sky130_fd_sc_hd__a21oi_2".
+Reading "YA_sky130_fd_sc_hd__a221oi_1".
+Reading "YA_sky130_fd_sc_hd__a31oi_1".
+Reading "YA_sky130_fd_sc_hd__xor2_4".
+Reading "YA_sky130_fd_sc_hd__clkbuf_1".
+Reading "YA_sky130_fd_sc_hd__nand3b_4".
+Reading "YA_sky130_fd_sc_hd__nand2_2".
+Reading "YA_sky130_fd_sc_hd__xnor2_1".
+Reading "YA_sky130_fd_sc_hd__and2_1".
+Reading "YA_sky130_fd_sc_hd__nor2_4".
+Reading "YA_sky130_fd_sc_hd__nand4_4".
+Reading "YA_sky130_fd_sc_hd__a32o_2".
+Reading "YA_sky130_fd_sc_hd__nor4_1".
+Reading "YA_sky130_fd_sc_hd__nand4_1".
+Reading "YA_sky130_fd_sc_hd__xor2_1".
+Reading "YA_sky130_fd_sc_hd__and4bb_4".
+Reading "YA_sky130_fd_sc_hd__a41o_2".
+Reading "YA_sky130_fd_sc_hd__o2bb2a_1".
+Reading "YA_sky130_fd_sc_hd__xnor2_2".
+Reading "YA_sky130_fd_sc_hd__xor2_2".
+Reading "YA_sky130_fd_sc_hd__or2_4".
+Reading "YA_sky130_fd_sc_hd__a2111oi_2".
+Reading "YA_sky130_fd_sc_hd__nor4_4".
+Reading "YA_sky130_fd_sc_hd__mux2_4".
+Reading "YA_sky130_fd_sc_hd__and2b_1".
+Reading "YA_sky130_fd_sc_hd__and2_2".
+Reading "YA_sky130_fd_sc_hd__nor4b_1".
+Reading "YA_sky130_fd_sc_hd__o2111ai_4".
+Reading "YA_sky130_fd_sc_hd__nor4_2".
+Reading "YA_sky130_fd_sc_hd__nand3b_2".
+Reading "YA_sky130_fd_sc_hd__nand3_1".
+Reading "YA_sky130_fd_sc_hd__nand2b_2".
+Reading "YA_sky130_fd_sc_hd__o31ai_1".
+Reading "YA_sky130_fd_sc_hd__o41a_1".
+Reading "YA_sky130_fd_sc_hd__a21bo_1".
+Reading "YA_sky130_fd_sc_hd__o41ai_1".
+Reading "YA_sky130_fd_sc_hd__nand3b_1".
+Reading "YA_sky130_fd_sc_hd__o2111a_1".
+Reading "YA_sky130_fd_sc_hd__o21a_4".
+Reading "YA_sky130_fd_sc_hd__o22a_1".
+Reading "YA_sky130_fd_sc_hd__or3b_2".
+Reading "YA_sky130_fd_sc_hd__nand2b_1".
+Reading "YA_sky130_fd_sc_hd__nor4b_4".
+Reading "YA_sky130_fd_sc_hd__o21bai_1".
+Reading "YA_sky130_fd_sc_hd__nor3_4".
+Reading "YA_sky130_fd_sc_hd__o41a_2".
+Reading "YA_sky130_fd_sc_hd__or4b_2".
+Reading "YA_sky130_fd_sc_hd__a221o_4".
+Reading "YA_sky130_fd_sc_hd__a2111oi_1".
+Reading "YA_sky130_fd_sc_hd__o31a_4".
+Reading "YA_sky130_fd_sc_hd__nor2_8".
+Reading "YA_sky130_fd_sc_hd__clkinv_4".
+Reading "YA_sky130_fd_sc_hd__a221o_2".
+Reading "YA_sky130_fd_sc_hd__o21ai_4".
+Reading "YA_sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "YA_sky130_fd_sc_hd__clkbuf_2".
+Reading "YA_sky130_fd_sc_hd__a31o_4".
+Reading "YA_sky130_fd_sc_hd__ebufn_4".
+Reading "YA_sky130_fd_sc_hd__dlxtp_1".
+Reading "YA_sky130_fd_sc_hd__dlclkp_1".
+Reading "YA_sky130_fd_sc_hd__conb_1".
+Reading "YA_sky130_fd_sc_hd__inv_1".
+Reading "YA_sky130_fd_sc_hd__nor4b_2".
+Reading "YA_sky130_fd_sc_hd__and3b_2".
+Reading "YA_sky130_fd_sc_hd__nor3b_2".
+Reading "YA_RAM256".
+Reading "YA_sky130_fd_sc_hd__a21o_4".
+Reading "YA_sky130_fd_sc_hd__o2111a_4".
+Reading "YA_sky130_fd_sc_hd__a22o_2".
+Reading "YA_sky130_fd_sc_hd__o211ai_4".
+Reading "YA_sky130_fd_sc_hd__o22ai_4".
+Reading "YA_sky130_fd_sc_hd__a221oi_4".
+Reading "YA_sky130_fd_sc_hd__and2b_4".
+Reading "YA_sky130_fd_sc_hd__and3b_4".
+Reading "YA_sky130_fd_sc_hd__and4bb_1".
+Reading "YA_sky130_fd_sc_hd__a21oi_4".
+Reading "YA_sky130_fd_sc_hd__o22ai_1".
+Reading "YA_sky130_fd_sc_hd__inv_4".
+Reading "YA_sky130_fd_sc_hd__a311o_2".
+Reading "YA_sky130_fd_sc_hd__a2111o_1".
+Reading "YA_sky130_fd_sc_hd__o311a_4".
+Reading "YA_sky130_fd_sc_hd__o2111ai_1".
+Reading "YA_sky130_fd_sc_hd__clkinv_8".
+Reading "YA_sky130_fd_sc_hd__nand3_2".
+Reading "YA_sky130_fd_sc_hd__a22oi_1".
+Reading "YA_sky130_fd_sc_hd__nand4b_4".
+Reading "YA_sky130_fd_sc_hd__o221ai_4".
+Reading "YA_sky130_fd_sc_hd__nand4_2".
+Reading "YA_sky130_fd_sc_hd__inv_6".
+Reading "YA_sky130_fd_sc_hd__o2bb2ai_1".
+Reading "YA_sky130_fd_sc_hd__a311oi_4".
+Reading "YA_sky130_fd_sc_hd__o32ai_4".
+Reading "YA_sky130_fd_sc_hd__o211ai_1".
+Reading "YA_sky130_fd_sc_hd__nand4b_1".
+Reading "YA_sky130_fd_sc_hd__o211ai_2".
+Reading "YA_sky130_fd_sc_hd__a22oi_4".
+Reading "YA_sky130_fd_sc_hd__and2_4".
+Reading "YA_sky130_fd_sc_hd__a211oi_4".
+Reading "YA_sky130_fd_sc_hd__nor3b_4".
+Reading "YA_sky130_fd_sc_hd__o22a_2".
+Reading "YA_sky130_fd_sc_hd__a2111oi_4".
+Reading "YA_sky130_fd_sc_hd__nand2b_4".
+Reading "YA_sky130_fd_sc_hd__a2bb2o_4".
+Reading "YA_sky130_fd_sc_hd__o2bb2a_2".
+Reading "YA_sky130_fd_sc_hd__o2111ai_2".
+Reading "YA_sky130_fd_sc_hd__a22oi_2".
+Reading "YA_sky130_fd_sc_hd__nor3b_1".
+Reading "YA_sky130_fd_sc_hd__o2bb2a_4".
+Reading "YA_sky130_fd_sc_hd__o21bai_4".
+Reading "YA_sky130_fd_sc_hd__o311ai_1".
+Reading "YA_sky130_fd_sc_hd__a32oi_2".
+Reading "YA_sky130_fd_sc_hd__o2bb2ai_2".
+Reading "YA_sky130_fd_sc_hd__o311ai_4".
+Reading "YA_sky130_fd_sc_hd__o2bb2ai_4".
+Reading "YA_sky130_fd_sc_hd__o31ai_4".
+Reading "YA_sky130_fd_sc_hd__o221a_2".
+Reading "YA_sky130_fd_sc_hd__o2111a_2".
+Reading "YA_sky130_fd_sc_hd__a31oi_2".
+Reading "YA_sky130_fd_sc_hd__o311a_2".
+Reading "YA_sky130_fd_sc_hd__o22a_4".
+Reading "YA_sky130_fd_sc_hd__a32oi_4".
+Reading "YA_sky130_fd_sc_hd__a211oi_2".
+Reading "YA_sky130_fd_sc_hd__o31ai_2".
+Reading "YA_sky130_fd_sc_hd__o221ai_1".
+Reading "YA_sky130_fd_sc_hd__clkinv_16".
+Reading "YA_sky130_fd_sc_hd__or4bb_2".
+Reading "YA_sky130_fd_sc_hd__a221oi_2".
+Reading "YA_sky130_fd_sc_hd__inv_8".
+Reading "YA_sky130_fd_sc_hd__a311oi_2".
+Reading "YA_sky130_fd_sc_hd__a311oi_1".
+Reading "YA_sky130_fd_sc_hd__o311ai_2".
+Reading "YA_sky130_fd_sc_hd__a32oi_1".
+Reading "YA_sky130_fd_sc_hd__a2bb2oi_2".
+Reading "YA_sky130_fd_sc_hd__a2bb2oi_1".
+Reading "YA_sky130_fd_sc_hd__a2bb2oi_4".
+Reading "YA_sky130_fd_sc_hd__xnor2_4".
+Reading "YA_sky130_fd_sc_hd__inv_12".
+Reading "YA_sky130_fd_sc_hd__a2111o_4".
+Reading "YA_sky130_fd_sc_hd__a32o_4".
+Reading "YA_sky130_fd_sc_hd__o21ba_2".
+Reading "YA_sky130_fd_sc_hd__a41oi_2".
+Reading "YA_sky130_fd_sc_hd__o22ai_2".
+Reading "YA_sky130_fd_sc_hd__o21bai_2".
+Reading "YA_sky130_fd_sc_hd__a41oi_4".
+Reading "YA_sky130_fd_sc_hd__a41o_4".
+Reading "YA_sky130_fd_sc_hd__a311o_4".
+Reading "YA_sky130_fd_sc_hd__o32ai_1".
+Reading "YA_sky130_fd_sc_hd__a21boi_4".
+Reading "YA_sky130_fd_sc_hd__o32ai_2".
+Reading "YA_sky130_fd_sc_hd__a21bo_2".
+Reading "YA_RAM128".
+Reading "mgmt_core_wrapper".
+Reading "gpio_defaults_block_0403".
+Reading "gpio_defaults_block_1801".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__dfbbp_1".
+Reading "spare_logic_block".
+Reading "sky130_fd_sc_hd__bufbuf_8".
+Reading "sky130_fd_sc_hvl__conb_1".
+Reading "mgmt_protect_hv".
+Reading "mprj_logic_high".
+Reading "mprj2_logic_high".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "mgmt_protect".
+Reading "gpio_defaults_block_0801".
+Reading "gpio_control_power_routing_top".
+Reading "gpio_control_power_routing_right".
+Reading "gpio_control_power_routing".
+Reading "caravel_power_routing".
+Reading "JM_sky130_fd_sc_hd__decap_3".
+Reading "JM_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "JM_sky130_ef_sc_hd__decap_12".
+Reading "JM_sky130_fd_sc_hd__fill_1".
+Reading "JM_sky130_fd_sc_hd__decap_8".
+Reading "JM_sky130_fd_sc_hd__buf_2".
+Reading "JM_sky130_fd_sc_hd__fill_2".
+Reading "JM_sky130_fd_sc_hd__diode_2".
+Reading "JM_sky130_fd_sc_hd__decap_4".
+Reading "JM_sky130_fd_sc_hd__decap_6".
+Reading "JM_sky130_fd_sc_hd__xnor2_4".
+Reading "JM_sky130_fd_sc_hd__xor2_4".
+Reading "JM_sky130_fd_sc_hd__a21oi_1".
+Reading "JM_sky130_fd_sc_hd__nand2_1".
+Reading "JM_sky130_fd_sc_hd__a21oi_4".
+Reading "JM_sky130_fd_sc_hd__a21boi_2".
+Reading "JM_sky130_fd_sc_hd__a21o_2".
+Reading "JM_sky130_fd_sc_hd__or2b_1".
+Reading "JM_sky130_fd_sc_hd__nand3_1".
+Reading "JM_sky130_fd_sc_hd__or2_2".
+Reading "JM_sky130_fd_sc_hd__o21ai_4".
+Reading "JM_sky130_fd_sc_hd__or2_1".
+Reading "JM_sky130_fd_sc_hd__and2_1".
+Reading "JM_sky130_fd_sc_hd__o21a_1".
+Reading "JM_sky130_fd_sc_hd__nor2_1".
+Reading "JM_sky130_fd_sc_hd__buf_6".
+Reading "JM_sky130_fd_sc_hd__xnor2_2".
+Reading "JM_sky130_fd_sc_hd__xnor2_1".
+Reading "JM_sky130_fd_sc_hd__xor2_1".
+Reading "JM_sky130_fd_sc_hd__a21boi_1".
+Reading "JM_sky130_fd_sc_hd__and2_2".
+Reading "JM_sky130_fd_sc_hd__a21o_1".
+Reading "JM_sky130_fd_sc_hd__nor2_2".
+Reading "JM_sky130_fd_sc_hd__a211o_1".
+Reading "JM_sky130_fd_sc_hd__o211ai_1".
+Reading "JM_sky130_fd_sc_hd__a21o_4".
+Reading "JM_sky130_fd_sc_hd__nor3_1".
+Reading "JM_sky130_fd_sc_hd__and3_1".
+Reading "JM_sky130_fd_sc_hd__o211a_1".
+Reading "JM_sky130_fd_sc_hd__o21bai_2".
+Reading "JM_sky130_fd_sc_hd__nand2_2".
+Reading "JM_sky130_fd_sc_hd__o21ba_1".
+Reading "JM_sky130_fd_sc_hd__and3b_1".
+Reading "JM_sky130_fd_sc_hd__o21ba_2".
+Reading "JM_sky130_fd_sc_hd__a211oi_1".
+Reading "JM_sky130_fd_sc_hd__inv_2".
+Reading "JM_sky130_fd_sc_hd__o21ai_1".
+Reading "JM_sky130_fd_sc_hd__a22oi_2".
+Reading "JM_sky130_fd_sc_hd__a21bo_1".
+Reading "JM_sky130_fd_sc_hd__o2bb2ai_1".
+Reading "JM_sky130_fd_sc_hd__mux2_1".
+Reading "JM_sky130_fd_sc_hd__a22o_1".
+Reading "JM_sky130_fd_sc_hd__a22oi_1".
+Reading "JM_sky130_fd_sc_hd__o2bb2a_1".
+Reading "JM_sky130_fd_sc_hd__and2b_1".
+Reading "JM_sky130_fd_sc_hd__buf_4".
+Reading "JM_sky130_fd_sc_hd__clkbuf_4".
+Reading "JM_sky130_fd_sc_hd__clkbuf_2".
+Reading "JM_sky130_fd_sc_hd__clkbuf_1".
+Reading "JM_sky130_fd_sc_hd__nand4_1".
+Reading "JM_sky130_fd_sc_hd__and4_1".
+Reading "JM_user_proj_example".
+Reading "user_project_wrapper".
+Reading "sky130_ef_io__com_bus_slice_20um".
+Reading "sky130_fd_io__corner_bus_overlay".
+Reading "sky130_ef_io__corner_pad".
+Reading "sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um".
+Reading "sky130_ef_io__com_bus_slice_1um".
+Reading "sky130_ef_io__com_bus_slice_5um".
+Reading "sky130_ef_io__com_bus_slice_10um".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180851".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808664".
+Reading "sky130_fd_io__sio_clamp_pcap_4x5".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808680".
+Reading "sky130_fd_io__esd_rcclamp_nfetcap".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808336".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808666".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808665".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808678".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808679".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808677".
+Reading "sky130_fd_pr__via_pol1__example_5595914180839".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808667".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808671".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808672".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808673".
+Reading "sky130_fd_pr__dfl1__example_55959141808663".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808660".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808670".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808668".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808675".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808676".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808674".
+Reading "sky130_fd_pr__dfl1__example_55959141808662".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808661".
+Reading "sky130_fd_pr__via_l1m1__example_559591418084".
+Reading "sky130_fd_pr__genrivetdlring__example_559591418082".
+Reading "sky130_fd_pr__gendlring__example_559591418081".
+Reading "sky130_fd_pr__padplhp__example_559591418080".
+Reading "sky130_fd_io__pad_esd".
+Reading "sky130_fd_io__com_bus_slice".
+Reading "sky130_fd_io__com_bus_hookup".
+Reading "sky130_fd_io__com_busses_esd".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808669".
+Reading "sky130_fd_io__top_ground_hvc_wpad".
+Reading "sky130_fd_io__overlay_vssa_hvc".
+Reading "sky130_ef_io__hvc_vdda_overlay".
+Reading "sky130_ef_io__vssa_hvc_clamped_pad".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808719".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808767".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808765".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808764".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808720".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808718".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808717".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808716".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808243".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808723".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808722".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180890".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808721".
+Reading "sky130_fd_io__xres_inv_hysv2".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180838".
+Reading "sky130_fd_io__tk_tie_r_out_esd".
+Reading "sky130_fd_io__res250_sub_small".
+Reading "sky130_fd_io__res250only_small".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808264".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180858".
+Reading "sky130_fd_pr__via_pol1__example_5595914180833".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180864".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808715".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180863".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180862".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808288".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180859".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808289".
+Reading "sky130_fd_io__com_res_weak_v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808274".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808728".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808727".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808726".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808725".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808724".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808554".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808553".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808552".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808551".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808402".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808350".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808261".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808260".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808259".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808400".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808372".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808326".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808290".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808128".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808127".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180897".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180819".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808555".
+Reading "sky130_fd_pr__via_pol1__example_55959141808147".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808157".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808156".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808155".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808154".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808153".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808152".
+Reading "sky130_fd_pr__tpl1__example_55959141808151".
+Reading "sky130_fd_pr__tpl1__example_55959141808150".
+Reading "sky130_fd_pr__tpl1__example_55959141808149".
+Reading "sky130_fd_pr__tpl1__example_55959141808148".
+Reading "sky130_fd_pr__dfl1__example_55959141808158".
+Reading "sky130_fd_io__signal_5_sym_hv_local_5term".
+Reading "sky130_fd_io__gpio_buf_localesdv2".
+Reading "sky130_fd_pr__via_pol1__example_559591418083".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808137".
+Reading "sky130_fd_pr__dfl1sd__example_559591418086".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808371".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808370".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808369".
+Reading "sky130_fd_io__hvsbt_inv_x1".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808316".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808421".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808385".
+Reading "sky130_fd_pr__dfl1sd__example_559591418088".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808422".
+Reading "sky130_fd_io__hvsbt_inv_x2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808612".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808616".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808615".
+Reading "sky130_fd_io__hvsbt_inv_x4".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180848".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180849".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808766".
+Reading "sky130_fd_pr__via_m2m3__example_55959141808714".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418081".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808652".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808653".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180812".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180811".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418086".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418084".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808659".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808658".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808657".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808202".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pudrvr_strong_axres4v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808273".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808740".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808739".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808738".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808737".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808736".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808735".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808734".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808733".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808732".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808731".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808730".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808752".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808751".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808750".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808749".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808748".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808747".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808746".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808745".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808744".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808743".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808742".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808741".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808324".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808270".
+Reading "sky130_fd_pr__dfl1__example_55959141808187".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808755".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808754".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808338".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808337".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808763".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808700".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808559".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808762".
+Reading "sky130_fd_pr__dfl1__example_55959141808729".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759".
+Reading "sky130_fd_io__xres_p_em1c_cdns_55959141808753".
+Reading "sky130_fd_io__xres2v2_rcfilter_lpfv2".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180860".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180861".
+Reading "sky130_fd_io__com_res_weak_bentbigres".
+Reading "sky130_fd_io__com_res_weak".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180857".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808649".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808651".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808650".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808648".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808646".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808647".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808645".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808378".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_xres4v2".
+Reading "sky130_fd_io__top_gpio_pad".
+Reading "sky130_fd_io__com_busses".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808768".
+Reading "sky130_fd_pr__res_bent_nd__example_55959141808769".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808787".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808786".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808782".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808785".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808449".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808784".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808452".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808783".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808781".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808780".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808779".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808233".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180827".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808778".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180835".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808777".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808776".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808775".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808242".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808774".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180829".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808773".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808237".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808772".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808771".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808770".
+Reading "sky130_fd_io__tap_1".
+Reading "sky130_fd_io__inv_1".
+Reading "sky130_fd_pr__pfet_01v8__example_559591418085".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418089".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418087".
+Reading "sky130_fd_io__hvsbt_nand2".
+Reading "sky130_fd_io__xres4v2_in_buf".
+Reading "sky130_fd_io__top_xres4v2".
+Reading "sky130_fd_sc_hd__fill_4".
+Reading "sky130_fd_sc_hd__fill_8".
+Reading "constant_block".
+Reading "sky130_fd_io__res75only_small".
+Reading "sky130_fd_io__com_bus_slice_m4".
+Reading "sky130_fd_io__overlay_gpiov2_m4".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808420".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808419".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808418".
+Reading "sky130_fd_io__hvsbt_nor".
+Reading "sky130_fd_io__hvsbt_nand2v2".
+Reading "sky130_fd_io__gpiov2_ictl_logic".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808190".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808611".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180811".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808549".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808548".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808191".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808189".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808517".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808518".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808610".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808609".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180815".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180816".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808608".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808604".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808533".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808529".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180884".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808230".
+Reading "sky130_fd_io__gpiov2_in_buf".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808537".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808106".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808481".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808607".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808504".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808600".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808550".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808528".
+Reading "sky130_fd_io__gpiov2_ipath_hvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808595".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180825".
+Reading "sky130_fd_io__gpiov2_inbuf_lvinv_x1".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180812".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808599".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808598".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808597".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808596".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808547".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808546".
+Reading "sky130_fd_io__gpiov2_ipath_lvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808606".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180875".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808605".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808540".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808603".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808602".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808601".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808535".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808527".
+Reading "sky130_fd_io__gpiov2_vcchib_in_buf".
+Reading "sky130_fd_io__gpiov2_ibuf_se".
+Reading "sky130_fd_io__gpiov2_buf_localesd".
+Reading "sky130_fd_io__gpiov2_ipath".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808438".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808439".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180882".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180881".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180880".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180879".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808430".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180823".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180822".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180813".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808624".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808510".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808623".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808622".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808621".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808620".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808619".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808618".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808116".
+Reading "sky130_fd_io__com_ctl_lsv2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808394".
+Reading "sky130_fd_pr__via_pol1__example_55959141808298".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808440".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180878".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808434".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808435".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808433".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808432".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808102".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808431".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808115".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808429".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808428".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808100".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808140".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808427".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808426".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808280".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808425".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808424".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808423".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808306".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808383".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808382".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808380".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808379".
+Reading "sky130_fd_io__com_ctl_ls_v2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808617".
+Reading "sky130_fd_io__com_ctl_ls_en_1_v2".
+Reading "sky130_fd_io__com_ctl_ls_1v2".
+Reading "sky130_fd_io__gpiov2_ctl_lsbank".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808614".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808613".
+Reading "sky130_fd_io__hvsbt_inv_x8v2".
+Reading "sky130_fd_io__hvsbt_inv_x8".
+Reading "sky130_fd_io__com_ctl_ls".
+Reading "sky130_fd_io__com_ctl_hldv2".
+Reading "sky130_fd_io__gpiov2_ctl".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808178".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808591".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808594".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808593".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808488".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808592".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808586".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808122".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808123".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808477".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808476".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808475".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808589".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808570".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808569".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808588".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808587".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808590".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808460".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808468".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808467".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808466".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808465".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808464".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808463".
+Reading "sky130_fd_io__gpiov2_amux_ctl_ls".
+Reading "sky130_fd_io__gpiov2_amux_ctl_inv_1".
+Reading "sky130_fd_io__gpiov2_amux_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808573".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808572".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808579".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808578".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808577".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808576".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808566".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180868".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180869".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808565".
+Reading "sky130_fd_io__gpiov2_amx_pucsd_inv".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808441".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808571".
+Reading "sky130_fd_io__gpiov2_amx_inv4".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808567".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808568".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv2".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808581".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808580".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808278".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808462".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808583".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808582".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808498".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808497".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808496".
+Reading "sky130_fd_io__gpiov2_amux_drvr_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808574".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808575".
+Reading "sky130_fd_io__amx_inv1".
+Reading "sky130_fd_io__gpiov2_amux_drvr".
+Reading "sky130_fd_io__xor2_1".
+Reading "sky130_fd_io__nor2_1".
+Reading "sky130_fd_io__nand2_1".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808200".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808457".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808451".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808450".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180894".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808584".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808455".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808447".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808445".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808248".
+Reading "sky130_fd_io__gpiov2_amux_nand5".
+Reading "sky130_fd_pr__dfm1sd__example_55959141808258".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808585".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808446".
+Reading "sky130_fd_io__gpiov2_amux_nand4".
+Reading "sky130_fd_io__gpiov2_amux_decoder".
+Reading "sky130_fd_io__gpiov2_amux_ctl_logic".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808563".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808564".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808562".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808251".
+Reading "sky130_fd_pr__dfm1sd2__example_55959141808561".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808560".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808558".
+Reading "sky130_fd_io__amux_switch_1v2b".
+Reading "sky130_fd_io__gpiov2_amux".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808416".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808417".
+Reading "sky130_fd_io__hvsbt_xorv2".
+Reading "sky130_fd_io__hvsbt_xor".
+Reading "sky130_fd_io__com_ctl_ls_octl".
+Reading "sky130_fd_io__gpiov2_octl".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808267".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808266".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808642".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808184".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808141".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808643".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808183".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808139".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808636".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808635".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808634".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808633".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808632".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808630".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808638".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808637".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr3".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808629".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808628".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808627".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808626".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808354".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808631".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180888".
+Reading "sky130_fd_io__gpiov2_octl_mux".
+Reading "sky130_fd_pr__via_pol1__example_55959141808322".
+Reading "sky130_fd_pr__via_pol1__example_55959141808321".
+Reading "sky130_fd_pr__via_pol1__example_55959141808320".
+Reading "sky130_fd_pr__via_pol1__example_55959141808294".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808325".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808323".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808291".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808641".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808640".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808639".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808348".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808347".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808194".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808346".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808345".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808344".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808343".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808334".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808333".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808332".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808331".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808330".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808329".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808304".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808134".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808328".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808327".
+Reading "sky130_fd_io__com_pdpredrvr_pbiasv2".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong".
+Reading "sky130_fd_pr__via_pol1__example_55959141808272".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808271".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808143".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808142".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808101".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808144".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_5595914180899".
+Reading "sky130_fd_pr__via_pol1__example_55959141808275".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808276".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808286".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808285".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808284".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808283".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808644".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808287".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808282".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808281".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808297".
+Reading "sky130_fd_pr__via_pol1__example_55959141808296".
+Reading "sky130_fd_pr__via_pol1__example_55959141808295".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808293".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808292".
+Reading "sky130_fd_pr__tpl1__example_55959141808300".
+Reading "sky130_fd_pr__tpl1__example_55959141808299".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808319".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808318".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808317".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808315".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808314".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808313".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808312".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808311".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808310".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808309".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808308".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808307".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808305".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808303".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808301".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808302".
+Reading "sky130_fd_io__feascom_pupredrvr_nbiasv2".
+Reading "sky130_fd_io__gpio_pupredrvr_strongv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808361".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808360".
+Reading "sky130_fd_io__feas_com_pupredrvr_weak".
+Reading "sky130_fd_pr__via_pol1__example_5595914180854".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808363".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808362".
+Reading "sky130_fd_io__com_pupredrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808366".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808365".
+Reading "sky130_fd_io__com_pdpredrvr_weakv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808364".
+Reading "sky130_fd_io__com_pdpredrvr_strong_slowv2".
+Reading "sky130_fd_io__gpiov2_obpredrvr".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808368".
+Reading "sky130_fd_pr__tpl1__example_55959141808625".
+Reading "sky130_fd_pr__via_pol1__example_55959141808373".
+Reading "sky130_fd_pr__tpl1__example_55959141808374".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808393".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808392".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808391".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808390".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808389".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808388".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808387".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808386".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808384".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808381".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808377".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808376".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808375".
+Reading "sky130_fd_io__gpio_dat_lsv2".
+Reading "sky130_fd_io__gpio_dat_ls_1v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808398".
+Reading "sky130_fd_pr__via_pol1__example_55959141808397".
+Reading "sky130_fd_pr__via_pol1__example_55959141808396".
+Reading "sky130_fd_pr__via_pol1__example_55959141808395".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808401".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808399".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808269".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808410".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808409".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808408".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808407".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808406".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808405".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808404".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808403".
+Reading "sky130_fd_io__com_cclat".
+Reading "sky130_fd_io__com_opath_datoev2".
+Reading "sky130_fd_io__gpiov2_octl_dat".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418080".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180832".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180856".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180855".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180853".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180852".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418083".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418082".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpiov2_pddrvr_strong".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418085".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpio_pudrvr_strongv2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180850".
+Reading "sky130_fd_io__gpio_pddrvr_weakv2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808656".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808655".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808654".
+Reading "sky130_fd_io__com_pudrvr_weakv2".
+Reading "sky130_fd_io__com_pudrvr_strong_slowv2".
+Reading "sky130_fd_io__gpio_odrvr_subv2".
+Reading "sky130_fd_io__gpio_odrvrv2".
+Reading "sky130_fd_io__gpio_opathv2".
+Reading "sky130_fd_io__top_gpiov2".
+Reading "sky130_fd_io__overlay_gpiov2".
+Reading "sky130_ef_io__gpiov2_pad".
+Reading "sky130_ef_io__gpiov2_pad_wrapped".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808691".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808687".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808684".
+Reading "sky130_fd_pr__tpl1__example_55959141808686".
+Reading "sky130_fd_pr__tpl1__example_55959141808685".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808683".
+Reading "sky130_fd_io__gnd2gnd_strap".
+Reading "sky130_fd_io__gnd2gnd_tap".
+Reading "sky130_fd_io__gnd2gnd_diff".
+Reading "sky130_fd_io__gnd2gnd_sub_dnwl".
+Reading "sky130_fd_io__gnd2gnd_120x2_lv_isosub".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808690".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808702".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808705".
+Reading "sky130_fd_pr__dfl1__example_55959141808682".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808694".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808693".
+Reading "sky130_fd_pr__dfl1__example_55959141808681".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808688".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808699".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808698".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808697".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808696".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808695".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808704".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808703".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808701".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808689".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808692".
+Reading "sky130_fd_io__top_ground_lvc_wpad".
+Reading "sky130_fd_io__overlay_vssd_lvc".
+Reading "sky130_ef_io__lvc_vccdx_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped_pad".
+Reading "sky130_fd_io__overlay_vssio_hvc".
+Reading "sky130_ef_io__hvc_vssio_overlay".
+Reading "sky130_ef_io__vssio_hvc_clamped_pad".
+Reading "sky130_fd_io__hvc_clampv2".
+Reading "sky130_fd_io__top_power_hvc_wpadv2".
+Reading "sky130_fd_io__overlay_vdda_hvc".
+Reading "sky130_ef_io__vdda_hvc_clamped_pad".
+Reading "sky130_fd_io__top_power_lvc_wpad".
+Reading "sky130_fd_io__overlay_vccd_lvc".
+Reading "sky130_ef_io__vccd_lvc_clamped_pad".
+Reading "sky130_ef_io__disconnect_vdda_slice_5um".
+Reading "sky130_fd_io__overlay_vddio_hvc".
+Reading "sky130_ef_io__hvc_vddio_overlay".
+Reading "sky130_ef_io__vddio_hvc_clamped_pad".
+Reading "chip_io_gpio_connects".
+Reading "sky130_ef_io__lvc_vccdy_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped3_pad".
+Reading "sky130_ef_io__vccd_lvc_clamped3_pad".
+Reading "chip_io".
+Reading "gpio_signal_buffering".
+Reading "caravel".
+   Generating output for cell caravel_0008d8db
+Ended: 01/01/2023 09:08:43

tapeout/logs/fill_final.log

diff --git a/tapeout/logs/fill_final.log b/tapeout/logs/fill_final.log
new file mode 100644
index 0000000..9e9f840
--- /dev/null
+++ b/tapeout/logs/fill_final.log
@@ -0,0 +1,124 @@
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_final.tcl" from command line.
+CIF output style is now "wafflefill(tiled)"
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_2 geometry by factor of 2
+Scaled magic input cell caravel_0008d8db_fill_pattern_2_2 geometry by factor of 2
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_3 geometry by factor of 2
+Scaled magic input cell caravel_0008d8db_fill_pattern_2_3 geometry by factor of 2
+Scaled magic input cell caravel_0008d8db_fill_pattern_3_3 geometry by factor of 2
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_4 geometry by factor of 2
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_5 geometry by factor of 2
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_6 geometry by factor of 2
+Scaled magic input cell caravel_0008d8db_fill_pattern_2_6 geometry by factor of 2
+Scaled magic input cell caravel_0008d8db_fill_pattern_3_6 geometry by factor of 2
+Writing final GDS
+   Generating output for cell caravel_0008d8db_fill_pattern_0_0
+Reading "caravel_0008d8db_fill_pattern_0_0".
+   Generating output for cell caravel_0008d8db_fill_pattern_1_0
+Reading "caravel_0008d8db_fill_pattern_1_0".
+   Generating output for cell caravel_0008d8db_fill_pattern_0_1
+Reading "caravel_0008d8db_fill_pattern_0_1".
+   Generating output for cell caravel_0008d8db_fill_pattern_1_1
+Reading "caravel_0008d8db_fill_pattern_1_1".
+   Generating output for cell caravel_0008d8db_fill_pattern_2_0
+Reading "caravel_0008d8db_fill_pattern_2_0".
+   Generating output for cell caravel_0008d8db_fill_pattern_2_1
+Reading "caravel_0008d8db_fill_pattern_2_1".
+   Generating output for cell caravel_0008d8db_fill_pattern_3_0
+Reading "caravel_0008d8db_fill_pattern_3_0".
+   Generating output for cell caravel_0008d8db_fill_pattern_3_1
+Reading "caravel_0008d8db_fill_pattern_3_1".
+   Generating output for cell caravel_0008d8db_fill_pattern_4_0
+Reading "caravel_0008d8db_fill_pattern_4_0".
+   Generating output for cell caravel_0008d8db_fill_pattern_4_1
+Reading "caravel_0008d8db_fill_pattern_4_1".
+   Generating output for cell caravel_0008d8db_fill_pattern_5_0
+Reading "caravel_0008d8db_fill_pattern_5_0".
+   Generating output for cell caravel_0008d8db_fill_pattern_5_1
+Reading "caravel_0008d8db_fill_pattern_5_1".
+   Generating output for cell caravel_0008d8db_fill_pattern_0_2
+Reading "caravel_0008d8db_fill_pattern_0_2".
+   Generating output for cell caravel_0008d8db_fill_pattern_1_2
+Reading "caravel_0008d8db_fill_pattern_1_2".
+   Generating output for cell caravel_0008d8db_fill_pattern_2_2
+Reading "caravel_0008d8db_fill_pattern_2_2".
+   Generating output for cell caravel_0008d8db_fill_pattern_3_2
+Reading "caravel_0008d8db_fill_pattern_3_2".
+   Generating output for cell caravel_0008d8db_fill_pattern_4_2
+Reading "caravel_0008d8db_fill_pattern_4_2".
+   Generating output for cell caravel_0008d8db_fill_pattern_5_2
+Reading "caravel_0008d8db_fill_pattern_5_2".
+   Generating output for cell caravel_0008d8db_fill_pattern_0_3
+Reading "caravel_0008d8db_fill_pattern_0_3".
+   Generating output for cell caravel_0008d8db_fill_pattern_1_3
+Reading "caravel_0008d8db_fill_pattern_1_3".
+   Generating output for cell caravel_0008d8db_fill_pattern_2_3
+Reading "caravel_0008d8db_fill_pattern_2_3".
+   Generating output for cell caravel_0008d8db_fill_pattern_3_3
+Reading "caravel_0008d8db_fill_pattern_3_3".
+   Generating output for cell caravel_0008d8db_fill_pattern_4_3
+Reading "caravel_0008d8db_fill_pattern_4_3".
+   Generating output for cell caravel_0008d8db_fill_pattern_5_3
+Reading "caravel_0008d8db_fill_pattern_5_3".
+   Generating output for cell caravel_0008d8db_fill_pattern_0_4
+Reading "caravel_0008d8db_fill_pattern_0_4".
+   Generating output for cell caravel_0008d8db_fill_pattern_1_4
+Reading "caravel_0008d8db_fill_pattern_1_4".
+   Generating output for cell caravel_0008d8db_fill_pattern_2_4
+Reading "caravel_0008d8db_fill_pattern_2_4".
+   Generating output for cell caravel_0008d8db_fill_pattern_3_4
+Reading "caravel_0008d8db_fill_pattern_3_4".
+   Generating output for cell caravel_0008d8db_fill_pattern_4_4
+Reading "caravel_0008d8db_fill_pattern_4_4".
+   Generating output for cell caravel_0008d8db_fill_pattern_5_4
+Reading "caravel_0008d8db_fill_pattern_5_4".
+   Generating output for cell caravel_0008d8db_fill_pattern_0_5
+Reading "caravel_0008d8db_fill_pattern_0_5".
+   Generating output for cell caravel_0008d8db_fill_pattern_1_5
+Reading "caravel_0008d8db_fill_pattern_1_5".
+   Generating output for cell caravel_0008d8db_fill_pattern_2_5
+Reading "caravel_0008d8db_fill_pattern_2_5".
+   Generating output for cell caravel_0008d8db_fill_pattern_3_5
+Reading "caravel_0008d8db_fill_pattern_3_5".
+   Generating output for cell caravel_0008d8db_fill_pattern_4_5
+Reading "caravel_0008d8db_fill_pattern_4_5".
+   Generating output for cell caravel_0008d8db_fill_pattern_5_5
+Reading "caravel_0008d8db_fill_pattern_5_5".
+   Generating output for cell caravel_0008d8db_fill_pattern_0_6
+Reading "caravel_0008d8db_fill_pattern_0_6".
+   Generating output for cell caravel_0008d8db_fill_pattern_1_6
+Reading "caravel_0008d8db_fill_pattern_1_6".
+   Generating output for cell caravel_0008d8db_fill_pattern_2_6
+Reading "caravel_0008d8db_fill_pattern_2_6".
+   Generating output for cell caravel_0008d8db_fill_pattern_3_6
+Reading "caravel_0008d8db_fill_pattern_3_6".
+   Generating output for cell caravel_0008d8db_fill_pattern_4_6
+Reading "caravel_0008d8db_fill_pattern_4_6".
+   Generating output for cell caravel_0008d8db_fill_pattern_5_6
+Reading "caravel_0008d8db_fill_pattern_5_6".
+   Generating output for cell caravel_0008d8db_fill_pattern_0_7
+Reading "caravel_0008d8db_fill_pattern_0_7".
+   Generating output for cell caravel_0008d8db_fill_pattern_1_7
+Reading "caravel_0008d8db_fill_pattern_1_7".
+   Generating output for cell caravel_0008d8db_fill_pattern_2_7
+Reading "caravel_0008d8db_fill_pattern_2_7".
+   Generating output for cell caravel_0008d8db_fill_pattern_3_7
+Reading "caravel_0008d8db_fill_pattern_3_7".
+   Generating output for cell caravel_0008d8db_fill_pattern_4_7
+Reading "caravel_0008d8db_fill_pattern_4_7".
+   Generating output for cell caravel_0008d8db_fill_pattern_5_7
+Reading "caravel_0008d8db_fill_pattern_5_7".
+   Generating output for cell caravel_0008d8db_fill_pattern
+Ended: 01/01/2023 09:07:32

tapeout/logs/fill_initial.log

diff --git a/tapeout/logs/fill_initial.log b/tapeout/logs/fill_initial.log
new file mode 100644
index 0000000..a42000d
--- /dev/null
+++ b/tapeout/logs/fill_initial.log
@@ -0,0 +1,1423 @@
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill.tcl" from command line.
+Started: 01/01/2023 08:42:11
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: caravel
+Reading "caravel_logo".
+Reading "font_22".
+Reading "font_73".
+Reading "font_43".
+Reading "font_49".
+Reading "font_65".
+Reading "font_68".
+Reading "font_54".
+Reading "font_67".
+Reading "font_6E".
+Reading "font_69".
+Reading "font_6C".
+Reading "font_61".
+Reading "font_53".
+Reading "caravel_motto".
+Reading "font_79".
+Reading "font_76".
+Reading "font_74".
+Reading "font_72".
+Reading "font_70".
+Reading "font_66".
+Reading "font_63".
+Reading "font_62".
+Reading "font_57".
+Reading "font_56".
+Reading "font_50".
+Reading "font_47".
+Reading "font_44".
+Reading "font_35".
+Reading "font_32".
+Reading "font_30".
+Reading "font_29".
+Reading "font_28".
+Reading "font_20".
+Reading "font_6F".
+Reading "font_6B".
+Reading "font_4F".
+Reading "font_4B".
+Reading "font_2D".
+Reading "copyright_block".
+Reading "open_source".
+Reading "sky130_fd_sc_hvl__decap_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__decap_4".
+Reading "sky130_fd_sc_hvl__diode_2".
+Reading "sky130_fd_sc_hvl__fill_1".
+Reading "sky130_fd_sc_hvl__fill_2".
+Reading "sky130_fd_sc_hvl__lsbufhv2lv_1".
+Reading "xres_buf".
+Reading "alpha_8".
+Reading "alpha_D".
+Reading "alpha_B".
+Reading "alpha_0".
+Reading "user_id_textblock".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "gpio_defaults_block_1803".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__nand4bb_1".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__a41oi_1".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__dfstp_1".
+Reading "sky130_fd_sc_hd__dfrtp_4".
+Reading "sky130_fd_sc_hd__dfrtn_1".
+Reading "sky130_fd_sc_hd__dfstp_2".
+Reading "sky130_fd_sc_hd__dfrtp_1".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__dfrtp_2".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "caravel_clocking".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "buff_flash_clkrst".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__macro_sparecell".
+Reading "sky130_fd_sc_hd__dfbbn_2".
+Reading "sky130_fd_sc_hd__or2_0".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__and2_0".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__buf_16".
+Reading "gpio_logic_high".
+Reading "gpio_control_block".
+Reading "sky130_fd_sc_hd__dfstp_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__nand4b_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+CIF file read warning: Input off lambda grid by 2/5; snapped to grid.
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "housekeeping".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+Reading "sky130_fd_sc_hd__einvp_1".
+Reading "sky130_fd_sc_hd__clkinv_1".
+Reading "sky130_fd_sc_hd__einvn_4".
+Reading "sky130_fd_sc_hd__einvn_8".
+Reading "sky130_fd_sc_hd__einvp_2".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__nand4b_2".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__o32a_2".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "digital_pll".
+Reading "user_id_programming".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "CB_sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "CB_sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "CB_sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "CB_sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "CB_sky130_fd_sc_hvl__schmittbuf_1".
+Reading "CB_sky130_fd_sc_hvl__buf_8".
+Reading "CB_sky130_fd_sc_hvl__inv_8".
+Reading "CB_sky130_fd_sc_hvl__fill_4".
+Reading "CB_sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "CB_sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "CB_sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "simple_por".
+Reading "YA_sky130_fd_sc_hd__decap_3".
+Reading "YA_sky130_ef_sc_hd__decap_12".
+Reading "YA_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "YA_sky130_fd_sc_hd__fill_1".
+Reading "YA_sky130_fd_sc_hd__decap_4".
+Reading "YA_sky130_fd_sc_hd__decap_6".
+Reading "YA_sky130_fd_sc_hd__fill_2".
+Reading "YA_sky130_fd_sc_hd__decap_8".
+Reading "YA_sky130_fd_sc_hd__diode_2".
+Reading "YA_sky130_fd_sc_hd__clkbuf_16".
+Reading "YA_sky130_fd_sc_hd__o211a_1".
+Reading "YA_sky130_fd_sc_hd__dfxtp_2".
+Reading "YA_sky130_fd_sc_hd__o21a_1".
+Reading "YA_sky130_fd_sc_hd__mux2_1".
+Reading "YA_sky130_fd_sc_hd__or2_1".
+Reading "YA_sky130_fd_sc_hd__dfxtp_1".
+Reading "YA_sky130_fd_sc_hd__a22o_1".
+Reading "YA_sky130_fd_sc_hd__a21o_2".
+Reading "YA_sky130_fd_sc_hd__a21o_1".
+Reading "YA_sky130_fd_sc_hd__a22o_4".
+Reading "YA_sky130_fd_sc_hd__buf_8".
+Reading "YA_sky130_fd_sc_hd__o21a_2".
+Reading "YA_sky130_fd_sc_hd__mux2_2".
+Reading "YA_sky130_fd_sc_hd__buf_4".
+Reading "YA_sky130_fd_sc_hd__clkbuf_8".
+Reading "YA_sky130_fd_sc_hd__buf_6".
+Reading "YA_sky130_fd_sc_hd__dfxtp_4".
+Reading "YA_sky130_fd_sc_hd__buf_2".
+Reading "YA_sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "YA_sky130_fd_sc_hd__o21ai_1".
+Reading "YA_sky130_fd_sc_hd__mux4_1".
+Reading "YA_sky130_fd_sc_hd__buf_12".
+Reading "YA_sky130_fd_sc_hd__mux4_2".
+Reading "YA_sky130_fd_sc_hd__inv_2".
+Reading "YA_sky130_fd_sc_hd__and3_2".
+Reading "YA_sky130_fd_sc_hd__nand2_1".
+Reading "YA_sky130_fd_sc_hd__a2bb2o_1".
+Reading "YA_sky130_fd_sc_hd__or3b_1".
+Reading "YA_sky130_fd_sc_hd__o32a_1".
+Reading "YA_sky130_fd_sc_hd__a2bb2o_2".
+Reading "YA_sky130_fd_sc_hd__o311a_1".
+Reading "YA_sky130_fd_sc_hd__o221a_1".
+Reading "YA_sky130_fd_sc_hd__o31a_1".
+Reading "YA_sky130_fd_sc_hd__o211a_2".
+Reading "YA_sky130_fd_sc_hd__and3_1".
+Reading "YA_sky130_fd_sc_hd__a211oi_1".
+Reading "YA_sky130_fd_sc_hd__and4_4".
+Reading "YA_sky130_fd_sc_hd__and4_1".
+Reading "YA_sky130_fd_sc_hd__clkbuf_4".
+Reading "YA_sky130_fd_sc_hd__and3b_1".
+Reading "YA_sky130_fd_sc_hd__a211o_4".
+Reading "YA_sky130_fd_sc_hd__a211o_1".
+Reading "YA_sky130_fd_sc_hd__o21ba_1".
+Reading "YA_sky130_fd_sc_hd__a21oi_1".
+Reading "YA_sky130_fd_sc_hd__nor2_1".
+Reading "YA_sky130_fd_sc_hd__nand2_8".
+Reading "YA_sky130_fd_sc_hd__a311o_1".
+Reading "YA_sky130_fd_sc_hd__nor2_2".
+Reading "YA_sky130_fd_sc_hd__a41o_1".
+Reading "YA_sky130_fd_sc_hd__nor3_2".
+Reading "YA_sky130_fd_sc_hd__or4bb_4".
+Reading "YA_sky130_fd_sc_hd__nor3_1".
+Reading "YA_sky130_fd_sc_hd__or4b_4".
+Reading "YA_sky130_fd_sc_hd__or3b_4".
+Reading "YA_sky130_fd_sc_hd__a31o_1".
+Reading "YA_sky130_fd_sc_hd__a211o_2".
+Reading "YA_sky130_fd_sc_hd__or2_2".
+Reading "YA_sky130_fd_sc_hd__a31o_2".
+Reading "YA_sky130_fd_sc_hd__a221o_1".
+Reading "YA_sky130_fd_sc_hd__and4b_4".
+Reading "YA_sky130_fd_sc_hd__and3_4".
+Reading "YA_sky130_fd_sc_hd__mux2_8".
+Reading "YA_sky130_fd_sc_hd__o21ai_2".
+Reading "YA_sky130_fd_sc_hd__and4b_1".
+Reading "YA_sky130_fd_sc_hd__or4b_1".
+Reading "YA_sky130_fd_sc_hd__o211a_4".
+Reading "YA_sky130_fd_sc_hd__a32o_1".
+Reading "YA_sky130_fd_sc_hd__a21boi_1".
+Reading "YA_sky130_fd_sc_hd__o41ai_4".
+Reading "YA_sky130_fd_sc_hd__o31a_2".
+Reading "YA_sky130_fd_sc_hd__nand2_4".
+Reading "YA_sky130_fd_sc_hd__a31oi_4".
+Reading "YA_sky130_fd_sc_hd__and4_2".
+Reading "YA_sky130_fd_sc_hd__nand3_4".
+Reading "YA_sky130_fd_sc_hd__and4b_2".
+Reading "YA_sky130_fd_sc_hd__o41a_4".
+Reading "YA_sky130_fd_sc_hd__and4bb_2".
+Reading "YA_sky130_fd_sc_hd__clkinv_2".
+Reading "YA_sky130_fd_sc_hd__and2b_2".
+Reading "YA_sky130_fd_sc_hd__or4bb_1".
+Reading "YA_sky130_fd_sc_hd__a21oi_2".
+Reading "YA_sky130_fd_sc_hd__a221oi_1".
+Reading "YA_sky130_fd_sc_hd__a31oi_1".
+Reading "YA_sky130_fd_sc_hd__xor2_4".
+Reading "YA_sky130_fd_sc_hd__clkbuf_1".
+Reading "YA_sky130_fd_sc_hd__nand3b_4".
+Reading "YA_sky130_fd_sc_hd__nand2_2".
+Reading "YA_sky130_fd_sc_hd__xnor2_1".
+Reading "YA_sky130_fd_sc_hd__and2_1".
+Reading "YA_sky130_fd_sc_hd__nor2_4".
+Reading "YA_sky130_fd_sc_hd__nand4_4".
+Reading "YA_sky130_fd_sc_hd__a32o_2".
+Reading "YA_sky130_fd_sc_hd__nor4_1".
+Reading "YA_sky130_fd_sc_hd__nand4_1".
+Reading "YA_sky130_fd_sc_hd__xor2_1".
+Reading "YA_sky130_fd_sc_hd__and4bb_4".
+Reading "YA_sky130_fd_sc_hd__a41o_2".
+Reading "YA_sky130_fd_sc_hd__o2bb2a_1".
+Reading "YA_sky130_fd_sc_hd__xnor2_2".
+Reading "YA_sky130_fd_sc_hd__xor2_2".
+Reading "YA_sky130_fd_sc_hd__or2_4".
+Reading "YA_sky130_fd_sc_hd__a2111oi_2".
+Reading "YA_sky130_fd_sc_hd__nor4_4".
+Reading "YA_sky130_fd_sc_hd__mux2_4".
+Reading "YA_sky130_fd_sc_hd__and2b_1".
+Reading "YA_sky130_fd_sc_hd__and2_2".
+Reading "YA_sky130_fd_sc_hd__nor4b_1".
+Reading "YA_sky130_fd_sc_hd__o2111ai_4".
+Reading "YA_sky130_fd_sc_hd__nor4_2".
+Reading "YA_sky130_fd_sc_hd__nand3b_2".
+Reading "YA_sky130_fd_sc_hd__nand3_1".
+Reading "YA_sky130_fd_sc_hd__nand2b_2".
+Reading "YA_sky130_fd_sc_hd__o31ai_1".
+Reading "YA_sky130_fd_sc_hd__o41a_1".
+Reading "YA_sky130_fd_sc_hd__a21bo_1".
+Reading "YA_sky130_fd_sc_hd__o41ai_1".
+Reading "YA_sky130_fd_sc_hd__nand3b_1".
+Reading "YA_sky130_fd_sc_hd__o2111a_1".
+Reading "YA_sky130_fd_sc_hd__o21a_4".
+Reading "YA_sky130_fd_sc_hd__o22a_1".
+Reading "YA_sky130_fd_sc_hd__or3b_2".
+Reading "YA_sky130_fd_sc_hd__nand2b_1".
+Reading "YA_sky130_fd_sc_hd__nor4b_4".
+Reading "YA_sky130_fd_sc_hd__o21bai_1".
+Reading "YA_sky130_fd_sc_hd__nor3_4".
+Reading "YA_sky130_fd_sc_hd__o41a_2".
+Reading "YA_sky130_fd_sc_hd__or4b_2".
+Reading "YA_sky130_fd_sc_hd__a221o_4".
+Reading "YA_sky130_fd_sc_hd__a2111oi_1".
+Reading "YA_sky130_fd_sc_hd__o31a_4".
+Reading "YA_sky130_fd_sc_hd__nor2_8".
+Reading "YA_sky130_fd_sc_hd__clkinv_4".
+Reading "YA_sky130_fd_sc_hd__a221o_2".
+Reading "YA_sky130_fd_sc_hd__o21ai_4".
+Reading "YA_sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "YA_sky130_fd_sc_hd__clkbuf_2".
+Reading "YA_sky130_fd_sc_hd__a31o_4".
+Reading "YA_sky130_fd_sc_hd__ebufn_4".
+Reading "YA_sky130_fd_sc_hd__dlxtp_1".
+Reading "YA_sky130_fd_sc_hd__dlclkp_1".
+Reading "YA_sky130_fd_sc_hd__conb_1".
+Reading "YA_sky130_fd_sc_hd__inv_1".
+Reading "YA_sky130_fd_sc_hd__nor4b_2".
+Reading "YA_sky130_fd_sc_hd__and3b_2".
+Reading "YA_sky130_fd_sc_hd__nor3b_2".
+Reading "YA_RAM256".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+Reading "YA_sky130_fd_sc_hd__a21o_4".
+Reading "YA_sky130_fd_sc_hd__o2111a_4".
+Reading "YA_sky130_fd_sc_hd__a22o_2".
+Reading "YA_sky130_fd_sc_hd__o211ai_4".
+Reading "YA_sky130_fd_sc_hd__o22ai_4".
+Reading "YA_sky130_fd_sc_hd__a221oi_4".
+Reading "YA_sky130_fd_sc_hd__and2b_4".
+Reading "YA_sky130_fd_sc_hd__and3b_4".
+Reading "YA_sky130_fd_sc_hd__and4bb_1".
+Reading "YA_sky130_fd_sc_hd__a21oi_4".
+Reading "YA_sky130_fd_sc_hd__o22ai_1".
+Reading "YA_sky130_fd_sc_hd__inv_4".
+Reading "YA_sky130_fd_sc_hd__a311o_2".
+Reading "YA_sky130_fd_sc_hd__a2111o_1".
+Reading "YA_sky130_fd_sc_hd__o311a_4".
+Reading "YA_sky130_fd_sc_hd__o2111ai_1".
+Reading "YA_sky130_fd_sc_hd__clkinv_8".
+Reading "YA_sky130_fd_sc_hd__nand3_2".
+Reading "YA_sky130_fd_sc_hd__a22oi_1".
+Reading "YA_sky130_fd_sc_hd__nand4b_4".
+Reading "YA_sky130_fd_sc_hd__o221ai_4".
+Reading "YA_sky130_fd_sc_hd__nand4_2".
+Reading "YA_sky130_fd_sc_hd__inv_6".
+Reading "YA_sky130_fd_sc_hd__o2bb2ai_1".
+Reading "YA_sky130_fd_sc_hd__a311oi_4".
+Reading "YA_sky130_fd_sc_hd__o32ai_4".
+Reading "YA_sky130_fd_sc_hd__o211ai_1".
+Reading "YA_sky130_fd_sc_hd__nand4b_1".
+Reading "YA_sky130_fd_sc_hd__o211ai_2".
+Reading "YA_sky130_fd_sc_hd__a22oi_4".
+Reading "YA_sky130_fd_sc_hd__and2_4".
+Reading "YA_sky130_fd_sc_hd__a211oi_4".
+Reading "YA_sky130_fd_sc_hd__nor3b_4".
+Reading "YA_sky130_fd_sc_hd__o22a_2".
+Reading "YA_sky130_fd_sc_hd__a2111oi_4".
+Reading "YA_sky130_fd_sc_hd__nand2b_4".
+Reading "YA_sky130_fd_sc_hd__a2bb2o_4".
+Reading "YA_sky130_fd_sc_hd__o2bb2a_2".
+Reading "YA_sky130_fd_sc_hd__o2111ai_2".
+Reading "YA_sky130_fd_sc_hd__a22oi_2".
+Reading "YA_sky130_fd_sc_hd__nor3b_1".
+Reading "YA_sky130_fd_sc_hd__o2bb2a_4".
+Reading "YA_sky130_fd_sc_hd__o21bai_4".
+Reading "YA_sky130_fd_sc_hd__o311ai_1".
+Reading "YA_sky130_fd_sc_hd__a32oi_2".
+Reading "YA_sky130_fd_sc_hd__o2bb2ai_2".
+Reading "YA_sky130_fd_sc_hd__o311ai_4".
+Reading "YA_sky130_fd_sc_hd__o2bb2ai_4".
+Reading "YA_sky130_fd_sc_hd__o31ai_4".
+Reading "YA_sky130_fd_sc_hd__o221a_2".
+Reading "YA_sky130_fd_sc_hd__o2111a_2".
+Reading "YA_sky130_fd_sc_hd__a31oi_2".
+Reading "YA_sky130_fd_sc_hd__o311a_2".
+Reading "YA_sky130_fd_sc_hd__o22a_4".
+Reading "YA_sky130_fd_sc_hd__a32oi_4".
+Reading "YA_sky130_fd_sc_hd__a211oi_2".
+Reading "YA_sky130_fd_sc_hd__o31ai_2".
+Reading "YA_sky130_fd_sc_hd__o221ai_1".
+Reading "YA_sky130_fd_sc_hd__clkinv_16".
+Reading "YA_sky130_fd_sc_hd__or4bb_2".
+Reading "YA_sky130_fd_sc_hd__a221oi_2".
+Reading "YA_sky130_fd_sc_hd__inv_8".
+Reading "YA_sky130_fd_sc_hd__a311oi_2".
+Reading "YA_sky130_fd_sc_hd__a311oi_1".
+Reading "YA_sky130_fd_sc_hd__o311ai_2".
+Reading "YA_sky130_fd_sc_hd__a32oi_1".
+Reading "YA_sky130_fd_sc_hd__a2bb2oi_2".
+Reading "YA_sky130_fd_sc_hd__a2bb2oi_1".
+Reading "YA_sky130_fd_sc_hd__a2bb2oi_4".
+Reading "YA_sky130_fd_sc_hd__xnor2_4".
+Reading "YA_sky130_fd_sc_hd__inv_12".
+Reading "YA_sky130_fd_sc_hd__a2111o_4".
+Reading "YA_sky130_fd_sc_hd__a32o_4".
+Reading "YA_sky130_fd_sc_hd__o21ba_2".
+Reading "YA_sky130_fd_sc_hd__a41oi_2".
+Reading "YA_sky130_fd_sc_hd__o22ai_2".
+Reading "YA_sky130_fd_sc_hd__o21bai_2".
+Reading "YA_sky130_fd_sc_hd__a41oi_4".
+Reading "YA_sky130_fd_sc_hd__a41o_4".
+Reading "YA_sky130_fd_sc_hd__a311o_4".
+Reading "YA_sky130_fd_sc_hd__o32ai_1".
+Reading "YA_sky130_fd_sc_hd__a21boi_4".
+Reading "YA_sky130_fd_sc_hd__o32ai_2".
+Reading "YA_sky130_fd_sc_hd__a21bo_2".
+Reading "YA_RAM128".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+Reading "mgmt_core_wrapper".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+    60000 uses
+    65000 uses
+    70000 uses
+    75000 uses
+    80000 uses
+    85000 uses
+    90000 uses
+    95000 uses
+    100000 uses
+    105000 uses
+    110000 uses
+    115000 uses
+    120000 uses
+    125000 uses
+    130000 uses
+    135000 uses
+    140000 uses
+    145000 uses
+    150000 uses
+    155000 uses
+    160000 uses
+    165000 uses
+    170000 uses
+    175000 uses
+    180000 uses
+    185000 uses
+    190000 uses
+    195000 uses
+    200000 uses
+    205000 uses
+    210000 uses
+    215000 uses
+    220000 uses
+Reading "gpio_defaults_block_0403".
+Reading "gpio_defaults_block_1801".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__dfbbp_1".
+Reading "spare_logic_block".
+Reading "sky130_fd_sc_hd__bufbuf_8".
+Reading "sky130_fd_sc_hvl__conb_1".
+Reading "mgmt_protect_hv".
+Reading "mprj_logic_high".
+Reading "mprj2_logic_high".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "mgmt_protect".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+Reading "gpio_defaults_block_0801".
+Reading "gpio_control_power_routing_top".
+Reading "gpio_control_power_routing_right".
+Reading "gpio_control_power_routing".
+Reading "caravel_power_routing".
+Reading "JM_sky130_fd_sc_hd__decap_3".
+Reading "JM_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "JM_sky130_ef_sc_hd__decap_12".
+Reading "JM_sky130_fd_sc_hd__fill_1".
+Reading "JM_sky130_fd_sc_hd__decap_8".
+Reading "JM_sky130_fd_sc_hd__buf_2".
+Reading "JM_sky130_fd_sc_hd__fill_2".
+Reading "JM_sky130_fd_sc_hd__diode_2".
+Reading "JM_sky130_fd_sc_hd__decap_4".
+Reading "JM_sky130_fd_sc_hd__decap_6".
+Reading "JM_sky130_fd_sc_hd__xnor2_4".
+Reading "JM_sky130_fd_sc_hd__xor2_4".
+Reading "JM_sky130_fd_sc_hd__a21oi_1".
+Reading "JM_sky130_fd_sc_hd__nand2_1".
+Reading "JM_sky130_fd_sc_hd__a21oi_4".
+Reading "JM_sky130_fd_sc_hd__a21boi_2".
+Reading "JM_sky130_fd_sc_hd__a21o_2".
+Reading "JM_sky130_fd_sc_hd__or2b_1".
+Reading "JM_sky130_fd_sc_hd__nand3_1".
+Reading "JM_sky130_fd_sc_hd__or2_2".
+Reading "JM_sky130_fd_sc_hd__o21ai_4".
+Reading "JM_sky130_fd_sc_hd__or2_1".
+Reading "JM_sky130_fd_sc_hd__and2_1".
+Reading "JM_sky130_fd_sc_hd__o21a_1".
+Reading "JM_sky130_fd_sc_hd__nor2_1".
+Reading "JM_sky130_fd_sc_hd__buf_6".
+Reading "JM_sky130_fd_sc_hd__xnor2_2".
+Reading "JM_sky130_fd_sc_hd__xnor2_1".
+Reading "JM_sky130_fd_sc_hd__xor2_1".
+Reading "JM_sky130_fd_sc_hd__a21boi_1".
+Reading "JM_sky130_fd_sc_hd__and2_2".
+Reading "JM_sky130_fd_sc_hd__a21o_1".
+Reading "JM_sky130_fd_sc_hd__nor2_2".
+Reading "JM_sky130_fd_sc_hd__a211o_1".
+Reading "JM_sky130_fd_sc_hd__o211ai_1".
+Reading "JM_sky130_fd_sc_hd__a21o_4".
+Reading "JM_sky130_fd_sc_hd__nor3_1".
+Reading "JM_sky130_fd_sc_hd__and3_1".
+Reading "JM_sky130_fd_sc_hd__o211a_1".
+Reading "JM_sky130_fd_sc_hd__o21bai_2".
+Reading "JM_sky130_fd_sc_hd__nand2_2".
+Reading "JM_sky130_fd_sc_hd__o21ba_1".
+Reading "JM_sky130_fd_sc_hd__and3b_1".
+Reading "JM_sky130_fd_sc_hd__o21ba_2".
+Reading "JM_sky130_fd_sc_hd__a211oi_1".
+Reading "JM_sky130_fd_sc_hd__inv_2".
+Reading "JM_sky130_fd_sc_hd__o21ai_1".
+Reading "JM_sky130_fd_sc_hd__a22oi_2".
+Reading "JM_sky130_fd_sc_hd__a21bo_1".
+Reading "JM_sky130_fd_sc_hd__o2bb2ai_1".
+Reading "JM_sky130_fd_sc_hd__mux2_1".
+Reading "JM_sky130_fd_sc_hd__a22o_1".
+Reading "JM_sky130_fd_sc_hd__a22oi_1".
+Reading "JM_sky130_fd_sc_hd__o2bb2a_1".
+Reading "JM_sky130_fd_sc_hd__and2b_1".
+Reading "JM_sky130_fd_sc_hd__buf_4".
+Reading "JM_sky130_fd_sc_hd__clkbuf_4".
+Reading "JM_sky130_fd_sc_hd__clkbuf_2".
+Reading "JM_sky130_fd_sc_hd__clkbuf_1".
+Reading "JM_sky130_fd_sc_hd__nand4_1".
+Reading "JM_sky130_fd_sc_hd__and4_1".
+Reading "JM_user_proj_example".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+Reading "user_project_wrapper".
+Reading "sky130_ef_io__com_bus_slice_20um".
+Reading "sky130_fd_io__corner_bus_overlay".
+Reading "sky130_ef_io__corner_pad".
+Reading "sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um".
+Reading "sky130_ef_io__com_bus_slice_1um".
+Reading "sky130_ef_io__com_bus_slice_5um".
+Reading "sky130_ef_io__com_bus_slice_10um".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180851".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808664".
+Reading "sky130_fd_io__sio_clamp_pcap_4x5".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808680".
+Reading "sky130_fd_io__esd_rcclamp_nfetcap".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808336".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808666".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808665".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808678".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808679".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808677".
+Reading "sky130_fd_pr__via_pol1__example_5595914180839".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808667".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808671".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808672".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808673".
+Reading "sky130_fd_pr__dfl1__example_55959141808663".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808660".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808670".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808668".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808675".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808676".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808674".
+Reading "sky130_fd_pr__dfl1__example_55959141808662".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808661".
+Reading "sky130_fd_pr__via_l1m1__example_559591418084".
+Reading "sky130_fd_pr__genrivetdlring__example_559591418082".
+Reading "sky130_fd_pr__gendlring__example_559591418081".
+Reading "sky130_fd_pr__padplhp__example_559591418080".
+Reading "sky130_fd_io__pad_esd".
+Reading "sky130_fd_io__com_bus_slice".
+Reading "sky130_fd_io__com_bus_hookup".
+Reading "sky130_fd_io__com_busses_esd".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808669".
+Reading "sky130_fd_io__top_ground_hvc_wpad".
+Reading "sky130_fd_io__overlay_vssa_hvc".
+Reading "sky130_ef_io__hvc_vdda_overlay".
+Reading "sky130_ef_io__vssa_hvc_clamped_pad".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808719".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808767".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808765".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808764".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808720".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808718".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808717".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808716".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808243".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808723".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808722".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180890".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808721".
+Reading "sky130_fd_io__xres_inv_hysv2".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180838".
+Reading "sky130_fd_io__tk_tie_r_out_esd".
+Reading "sky130_fd_io__res250_sub_small".
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 315630550): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 315630582): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 315633174): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 315633206): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 315633238): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 315633270): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 315633302): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 315633398): NODE elements not supported: skipping.
+Reading "sky130_fd_io__res250only_small".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808264".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180858".
+Reading "sky130_fd_pr__via_pol1__example_5595914180833".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180864".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808715".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180863".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180862".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808288".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180859".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808289".
+Reading "sky130_fd_io__com_res_weak_v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808274".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808728".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808727".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808726".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808725".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808724".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808554".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808553".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808552".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808551".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808402".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808350".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808261".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808260".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808259".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808400".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808372".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808326".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808290".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808128".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808127".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180897".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180819".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808555".
+Reading "sky130_fd_pr__via_pol1__example_55959141808147".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808157".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808156".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808155".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808154".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808153".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808152".
+Reading "sky130_fd_pr__tpl1__example_55959141808151".
+Reading "sky130_fd_pr__tpl1__example_55959141808150".
+Reading "sky130_fd_pr__tpl1__example_55959141808149".
+Reading "sky130_fd_pr__tpl1__example_55959141808148".
+Reading "sky130_fd_pr__dfl1__example_55959141808158".
+Reading "sky130_fd_io__signal_5_sym_hv_local_5term".
+Reading "sky130_fd_io__gpio_buf_localesdv2".
+Reading "sky130_fd_pr__via_pol1__example_559591418083".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808137".
+Reading "sky130_fd_pr__dfl1sd__example_559591418086".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808371".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808370".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808369".
+Reading "sky130_fd_io__hvsbt_inv_x1".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808316".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808421".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808385".
+Reading "sky130_fd_pr__dfl1sd__example_559591418088".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808422".
+Reading "sky130_fd_io__hvsbt_inv_x2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808612".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808616".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808615".
+Reading "sky130_fd_io__hvsbt_inv_x4".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180848".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180849".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808766".
+Reading "sky130_fd_pr__via_m2m3__example_55959141808714".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418081".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808652".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808653".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180812".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180811".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418086".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418084".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808659".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808658".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808657".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808202".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pudrvr_strong_axres4v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808273".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808740".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808739".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808738".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808737".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808736".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808735".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808734".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808733".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808732".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808731".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808730".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808752".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808751".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808750".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808749".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808748".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808747".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808746".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808745".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808744".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808743".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808742".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808741".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808324".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808270".
+Reading "sky130_fd_pr__dfl1__example_55959141808187".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808755".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808754".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808338".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808337".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808763".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808700".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808559".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808762".
+Reading "sky130_fd_pr__dfl1__example_55959141808729".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759".
+Reading "sky130_fd_io__xres_p_em1c_cdns_55959141808753".
+Reading "sky130_fd_io__xres2v2_rcfilter_lpfv2".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180860".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180861".
+Reading "sky130_fd_io__com_res_weak_bentbigres".
+Reading "sky130_fd_io__com_res_weak".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180857".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808649".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808651".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808650".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808648".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808646".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808647".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808645".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808378".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_xres4v2".
+Reading "sky130_fd_io__top_gpio_pad".
+Reading "sky130_fd_io__com_busses".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808768".
+Reading "sky130_fd_pr__res_bent_nd__example_55959141808769".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808787".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808786".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808782".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808785".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808449".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808784".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808452".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808783".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808781".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808780".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808779".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808233".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180827".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808778".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180835".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808777".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808776".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808775".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808242".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808774".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180829".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808773".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808237".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808772".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808771".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808770".
+Reading "sky130_fd_io__tap_1".
+Reading "sky130_fd_io__inv_1".
+Reading "sky130_fd_pr__pfet_01v8__example_559591418085".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418089".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418087".
+Reading "sky130_fd_io__hvsbt_nand2".
+Reading "sky130_fd_io__xres4v2_in_buf".
+Reading "sky130_fd_io__top_xres4v2".
+Reading "sky130_fd_sc_hd__fill_4".
+Reading "sky130_fd_sc_hd__fill_8".
+Reading "constant_block".
+Reading "sky130_fd_io__res75only_small".
+Reading "sky130_fd_io__com_bus_slice_m4".
+Reading "sky130_fd_io__overlay_gpiov2_m4".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808420".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808419".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808418".
+Reading "sky130_fd_io__hvsbt_nor".
+Reading "sky130_fd_io__hvsbt_nand2v2".
+Reading "sky130_fd_io__gpiov2_ictl_logic".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808190".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808611".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180811".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808549".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808548".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808191".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808189".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808517".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808518".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808610".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808609".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180815".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180816".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808608".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808604".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808533".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808529".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180884".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808230".
+Reading "sky130_fd_io__gpiov2_in_buf".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808537".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808106".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808481".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808607".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808504".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808600".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808550".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808528".
+Reading "sky130_fd_io__gpiov2_ipath_hvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808595".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180825".
+Reading "sky130_fd_io__gpiov2_inbuf_lvinv_x1".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180812".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808599".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808598".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808597".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808596".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808547".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808546".
+Reading "sky130_fd_io__gpiov2_ipath_lvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808606".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180875".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808605".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808540".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808603".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808602".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808601".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808535".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808527".
+Reading "sky130_fd_io__gpiov2_vcchib_in_buf".
+Reading "sky130_fd_io__gpiov2_ibuf_se".
+Reading "sky130_fd_io__gpiov2_buf_localesd".
+Reading "sky130_fd_io__gpiov2_ipath".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808438".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808439".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180882".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180881".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180880".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180879".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808430".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180823".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180822".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180813".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808624".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808510".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808623".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808622".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808621".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808620".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808619".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808618".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808116".
+Reading "sky130_fd_io__com_ctl_lsv2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808394".
+Reading "sky130_fd_pr__via_pol1__example_55959141808298".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808440".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180878".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808434".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808435".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808433".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808432".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808102".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808431".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808115".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808429".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808428".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808100".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808140".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808427".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808426".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808280".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808425".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808424".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808423".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808306".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808383".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808382".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808380".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808379".
+Reading "sky130_fd_io__com_ctl_ls_v2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808617".
+Reading "sky130_fd_io__com_ctl_ls_en_1_v2".
+Reading "sky130_fd_io__com_ctl_ls_1v2".
+Reading "sky130_fd_io__gpiov2_ctl_lsbank".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808614".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808613".
+Reading "sky130_fd_io__hvsbt_inv_x8v2".
+Reading "sky130_fd_io__hvsbt_inv_x8".
+Reading "sky130_fd_io__com_ctl_ls".
+Reading "sky130_fd_io__com_ctl_hldv2".
+Reading "sky130_fd_io__gpiov2_ctl".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808178".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808591".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808594".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808593".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808488".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808592".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808586".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808122".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808123".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808477".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808476".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808475".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808589".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808570".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808569".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808588".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808587".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808590".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808460".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808468".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808467".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808466".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808465".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808464".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808463".
+Reading "sky130_fd_io__gpiov2_amux_ctl_ls".
+Reading "sky130_fd_io__gpiov2_amux_ctl_inv_1".
+Reading "sky130_fd_io__gpiov2_amux_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808573".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808572".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808579".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808578".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808577".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808576".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808566".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180868".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180869".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808565".
+Reading "sky130_fd_io__gpiov2_amx_pucsd_inv".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808441".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808571".
+Reading "sky130_fd_io__gpiov2_amx_inv4".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808567".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808568".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv2".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808581".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808580".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808278".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808462".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808583".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808582".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808498".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808497".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808496".
+Reading "sky130_fd_io__gpiov2_amux_drvr_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808574".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808575".
+Reading "sky130_fd_io__amx_inv1".
+Reading "sky130_fd_io__gpiov2_amux_drvr".
+Reading "sky130_fd_io__xor2_1".
+Reading "sky130_fd_io__nor2_1".
+Reading "sky130_fd_io__nand2_1".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808200".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808457".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808451".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808450".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180894".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808584".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808455".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808447".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808445".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808248".
+Reading "sky130_fd_io__gpiov2_amux_nand5".
+Reading "sky130_fd_pr__dfm1sd__example_55959141808258".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808585".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808446".
+Reading "sky130_fd_io__gpiov2_amux_nand4".
+Reading "sky130_fd_io__gpiov2_amux_decoder".
+Reading "sky130_fd_io__gpiov2_amux_ctl_logic".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808563".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808564".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808562".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808251".
+Reading "sky130_fd_pr__dfm1sd2__example_55959141808561".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808560".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808558".
+Reading "sky130_fd_io__amux_switch_1v2b".
+Reading "sky130_fd_io__gpiov2_amux".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808416".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808417".
+Reading "sky130_fd_io__hvsbt_xorv2".
+Reading "sky130_fd_io__hvsbt_xor".
+Reading "sky130_fd_io__com_ctl_ls_octl".
+Reading "sky130_fd_io__gpiov2_octl".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808267".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808266".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808642".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808184".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808141".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808643".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808183".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808139".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808636".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808635".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808634".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808633".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808632".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808630".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808638".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808637".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr3".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808629".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808628".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808627".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808626".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808354".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808631".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180888".
+Reading "sky130_fd_io__gpiov2_octl_mux".
+Reading "sky130_fd_pr__via_pol1__example_55959141808322".
+Reading "sky130_fd_pr__via_pol1__example_55959141808321".
+Reading "sky130_fd_pr__via_pol1__example_55959141808320".
+Reading "sky130_fd_pr__via_pol1__example_55959141808294".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808325".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808323".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808291".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808641".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808640".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808639".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808348".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808347".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808194".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808346".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808345".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808344".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808343".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808334".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808333".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808332".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808331".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808330".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808329".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808304".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808134".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808328".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808327".
+Reading "sky130_fd_io__com_pdpredrvr_pbiasv2".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong".
+Reading "sky130_fd_pr__via_pol1__example_55959141808272".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808271".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808143".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808142".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808101".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808144".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_5595914180899".
+Reading "sky130_fd_pr__via_pol1__example_55959141808275".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808276".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808286".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808285".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808284".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808283".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808644".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808287".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808282".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808281".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808297".
+Reading "sky130_fd_pr__via_pol1__example_55959141808296".
+Reading "sky130_fd_pr__via_pol1__example_55959141808295".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808293".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808292".
+Reading "sky130_fd_pr__tpl1__example_55959141808300".
+Reading "sky130_fd_pr__tpl1__example_55959141808299".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808319".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808318".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808317".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808315".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808314".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808313".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808312".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808311".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808310".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808309".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808308".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808307".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808305".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808303".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808301".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808302".
+Reading "sky130_fd_io__feascom_pupredrvr_nbiasv2".
+Reading "sky130_fd_io__gpio_pupredrvr_strongv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808361".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808360".
+Reading "sky130_fd_io__feas_com_pupredrvr_weak".
+Reading "sky130_fd_pr__via_pol1__example_5595914180854".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808363".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808362".
+Reading "sky130_fd_io__com_pupredrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808366".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808365".
+Reading "sky130_fd_io__com_pdpredrvr_weakv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808364".
+Reading "sky130_fd_io__com_pdpredrvr_strong_slowv2".
+Reading "sky130_fd_io__gpiov2_obpredrvr".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808368".
+Reading "sky130_fd_pr__tpl1__example_55959141808625".
+Reading "sky130_fd_pr__via_pol1__example_55959141808373".
+Reading "sky130_fd_pr__tpl1__example_55959141808374".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808393".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808392".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808391".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808390".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808389".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808388".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808387".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808386".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808384".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808381".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808377".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808376".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808375".
+Reading "sky130_fd_io__gpio_dat_lsv2".
+Reading "sky130_fd_io__gpio_dat_ls_1v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808398".
+Reading "sky130_fd_pr__via_pol1__example_55959141808397".
+Reading "sky130_fd_pr__via_pol1__example_55959141808396".
+Reading "sky130_fd_pr__via_pol1__example_55959141808395".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808401".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808399".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808269".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808410".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808409".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808408".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808407".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808406".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808405".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808404".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808403".
+Reading "sky130_fd_io__com_cclat".
+Reading "sky130_fd_io__com_opath_datoev2".
+Reading "sky130_fd_io__gpiov2_octl_dat".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418080".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180832".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180856".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180855".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180853".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180852".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418083".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418082".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpiov2_pddrvr_strong".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418085".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpio_pudrvr_strongv2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180850".
+Reading "sky130_fd_io__gpio_pddrvr_weakv2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808656".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808655".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808654".
+Reading "sky130_fd_io__com_pudrvr_weakv2".
+Reading "sky130_fd_io__com_pudrvr_strong_slowv2".
+Reading "sky130_fd_io__gpio_odrvr_subv2".
+Reading "sky130_fd_io__gpio_odrvrv2".
+Reading "sky130_fd_io__gpio_opathv2".
+Reading "sky130_fd_io__top_gpiov2".
+Reading "sky130_fd_io__overlay_gpiov2".
+Reading "sky130_ef_io__gpiov2_pad".
+Reading "sky130_ef_io__gpiov2_pad_wrapped".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808691".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808687".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808684".
+Reading "sky130_fd_pr__tpl1__example_55959141808686".
+Reading "sky130_fd_pr__tpl1__example_55959141808685".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808683".
+Reading "sky130_fd_io__gnd2gnd_strap".
+Reading "sky130_fd_io__gnd2gnd_tap".
+Reading "sky130_fd_io__gnd2gnd_diff".
+Reading "sky130_fd_io__gnd2gnd_sub_dnwl".
+Reading "sky130_fd_io__gnd2gnd_120x2_lv_isosub".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808690".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808702".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808705".
+Reading "sky130_fd_pr__dfl1__example_55959141808682".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808694".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808693".
+Reading "sky130_fd_pr__dfl1__example_55959141808681".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808688".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808699".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808698".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808697".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808696".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808695".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808704".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808703".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808701".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808689".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808692".
+Reading "sky130_fd_io__top_ground_lvc_wpad".
+Reading "sky130_fd_io__overlay_vssd_lvc".
+Reading "sky130_ef_io__lvc_vccdx_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped_pad".
+Reading "sky130_fd_io__overlay_vssio_hvc".
+Reading "sky130_ef_io__hvc_vssio_overlay".
+Reading "sky130_ef_io__vssio_hvc_clamped_pad".
+Reading "sky130_fd_io__hvc_clampv2".
+Reading "sky130_fd_io__top_power_hvc_wpadv2".
+Reading "sky130_fd_io__overlay_vdda_hvc".
+Reading "sky130_ef_io__vdda_hvc_clamped_pad".
+Reading "sky130_fd_io__top_power_lvc_wpad".
+Reading "sky130_fd_io__overlay_vccd_lvc".
+Reading "sky130_ef_io__vccd_lvc_clamped_pad".
+Reading "sky130_ef_io__disconnect_vdda_slice_5um".
+Reading "sky130_fd_io__overlay_vddio_hvc".
+Reading "sky130_ef_io__hvc_vddio_overlay".
+Reading "sky130_ef_io__vddio_hvc_clamped_pad".
+Reading "chip_io_gpio_connects".
+Reading "sky130_ef_io__lvc_vccdy_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped3_pad".
+Reading "sky130_ef_io__vccd_lvc_clamped3_pad".
+Reading "chip_io".
+Reading "gpio_signal_buffering".
+Reading "caravel".
+Flattening layout of tile x=0 y=0. . . 
+Flattening layout of tile x=1 y=0. . . 
+Flattening layout of tile x=2 y=0. . . 
+Flattening layout of tile x=3 y=0. . . 
+Flattening layout of tile x=4 y=0. . . 
+Flattening layout of tile x=5 y=0. . . 
+Flattening layout of tile x=0 y=1. . . 
+Flattening layout of tile x=1 y=1. . . 
+Flattening layout of tile x=2 y=1. . . 
+Flattening layout of tile x=3 y=1. . . 
+Flattening layout of tile x=4 y=1. . . 
+Flattening layout of tile x=5 y=1. . . 
+Flattening layout of tile x=0 y=2. . . 
+Flattening layout of tile x=1 y=2. . . 
+Flattening layout of tile x=2 y=2. . . 
+Flattening layout of tile x=3 y=2. . . 
+Flattening layout of tile x=4 y=2. . . 
+Flattening layout of tile x=5 y=2. . . 
+Flattening layout of tile x=0 y=3. . . 
+Flattening layout of tile x=1 y=3. . . 
+Flattening layout of tile x=2 y=3. . . 
+Flattening layout of tile x=3 y=3. . . 
+Flattening layout of tile x=4 y=3. . . 
+Flattening layout of tile x=5 y=3. . . 
+Flattening layout of tile x=0 y=4. . . 
+Flattening layout of tile x=1 y=4. . . 
+Flattening layout of tile x=2 y=4. . . 
+Flattening layout of tile x=3 y=4. . . 
+Flattening layout of tile x=4 y=4. . . 
+Flattening layout of tile x=5 y=4. . . 
+Flattening layout of tile x=0 y=5. . . 
+Flattening layout of tile x=1 y=5. . . 
+Flattening layout of tile x=2 y=5. . . 
+Flattening layout of tile x=3 y=5. . . 
+Flattening layout of tile x=4 y=5. . . 
+Flattening layout of tile x=5 y=5. . . 
+Flattening layout of tile x=0 y=6. . . 
+Flattening layout of tile x=1 y=6. . . 
+Flattening layout of tile x=2 y=6. . . 
+Flattening layout of tile x=3 y=6. . . 
+Flattening layout of tile x=4 y=6. . . 
+Flattening layout of tile x=5 y=6. . . 
+Flattening layout of tile x=0 y=7. . . 
+Flattening layout of tile x=1 y=7. . . 
+Flattening layout of tile x=2 y=7. . . 
+Flattening layout of tile x=3 y=7. . . 
+Flattening layout of tile x=4 y=7. . . 
+Flattening layout of tile x=5 y=7. . . 
+Ended: 01/01/2023 08:51:31

tapeout/logs/fill_intermediate.log

diff --git a/tapeout/logs/fill_intermediate.log b/tapeout/logs/fill_intermediate.log
new file mode 100644
index 0000000..e3d297f
--- /dev/null
+++ b/tapeout/logs/fill_intermediate.log
@@ -0,0 +1,8942 @@
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Processing system .magicrc file
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled magic input cell caravel_0008d8db_fill_pattern_2_3 geometry by factor of 2
+caravel_0008d8db_fill_pattern_4_5: 10000 rects
+caravel_0008d8db_fill_pattern_4_1: 10000 rects
+Scaled magic input cell caravel_0008d8db_fill_pattern_3_6 geometry by factor of 2
+caravel_0008d8db_fill_pattern_0_5: 10000 rects
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_4 geometry by factor of 2
+caravel_0008d8db_fill_pattern_5_0: 10000 rects
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_6 geometry by factor of 2
+caravel_0008d8db_fill_pattern_4_5: 20000 rects
+caravel_0008d8db_fill_pattern_0_5: 20000 rects
+caravel_0008d8db_fill_pattern_2_5: 10000 rects
+caravel_0008d8db_fill_pattern_4_1: 20000 rects
+caravel_0008d8db_fill_pattern_1_0: 10000 rects
+caravel_0008d8db_fill_pattern_5_0: 20000 rects
+caravel_0008d8db_fill_pattern_4_3: 10000 rects
+caravel_0008d8db_fill_pattern_5_4: 10000 rects
+caravel_0008d8db_fill_pattern_0_7: 10000 rects
+caravel_0008d8db_fill_pattern_4_5: 30000 rects
+caravel_0008d8db_fill_pattern_0_1: 10000 rects
+caravel_0008d8db_fill_pattern_0_5: 30000 rects
+caravel_0008d8db_fill_pattern_4_1: 30000 rects
+caravel_0008d8db_fill_pattern_2_5: 20000 rects
+caravel_0008d8db_fill_pattern_2_7: 10000 rects
+caravel_0008d8db_fill_pattern_1_0: 20000 rects
+caravel_0008d8db_fill_pattern_5_0: 30000 rects
+caravel_0008d8db_fill_pattern_4_3: 20000 rects
+caravel_0008d8db_fill_pattern_5_4: 20000 rects
+caravel_0008d8db_fill_pattern_0_7: 20000 rects
+caravel_0008d8db_fill_pattern_4_5: 40000 rects
+caravel_0008d8db_fill_pattern_0_1: 20000 rects
+caravel_0008d8db_fill_pattern_0_5: 40000 rects
+caravel_0008d8db_fill_pattern_4_1: 40000 rects
+caravel_0008d8db_fill_pattern_2_5: 30000 rects
+caravel_0008d8db_fill_pattern_1_0: 30000 rects
+caravel_0008d8db_fill_pattern_5_0: 40000 rects
+caravel_0008d8db_fill_pattern_4_3: 30000 rects
+caravel_0008d8db_fill_pattern_5_4: 30000 rects
+caravel_0008d8db_fill_pattern_4_5: 50000 rects
+caravel_0008d8db_fill_pattern_0_1: 30000 rects
+caravel_0008d8db_fill_pattern_0_7: 30000 rects
+caravel_0008d8db_fill_pattern_0_5: 50000 rects
+caravel_0008d8db_fill_pattern_2_7: 20000 rects
+caravel_0008d8db_fill_pattern_1_0: 40000 rects
+caravel_0008d8db_fill_pattern_4_1: 50000 rects
+caravel_0008d8db_fill_pattern_2_5: 40000 rects
+caravel_0008d8db_fill_pattern_4_3: 40000 rects
+caravel_0008d8db_fill_pattern_5_4: 40000 rects
+caravel_0008d8db_fill_pattern_0_1: 40000 rects
+caravel_0008d8db_fill_pattern_0_7: 40000 rects
+caravel_0008d8db_fill_pattern_4_5: 60000 rects
+caravel_0008d8db_fill_pattern_5_0: 50000 rects
+caravel_0008d8db_fill_pattern_0_5: 60000 rects
+caravel_0008d8db_fill_pattern_1_0: 50000 rects
+caravel_0008d8db_fill_pattern_4_1: 60000 rects
+caravel_0008d8db_fill_pattern_2_7: 30000 rects
+caravel_0008d8db_fill_pattern_5_4: 50000 rects
+caravel_0008d8db_fill_pattern_4_3: 50000 rects
+caravel_0008d8db_fill_pattern_2_5: 50000 rects
+caravel_0008d8db_fill_pattern_0_7: 50000 rects
+caravel_0008d8db_fill_pattern_0_1: 50000 rects
+caravel_0008d8db_fill_pattern_4_5: 70000 rects
+caravel_0008d8db_fill_pattern_0_5: 70000 rects
+caravel_0008d8db_fill_pattern_5_0: 60000 rects
+caravel_0008d8db_fill_pattern_1_0: 60000 rects
+caravel_0008d8db_fill_pattern_2_7: 40000 rects
+caravel_0008d8db_fill_pattern_5_4: 60000 rects
+caravel_0008d8db_fill_pattern_4_1: 70000 rects
+caravel_0008d8db_fill_pattern_0_7: 60000 rects
+caravel_0008d8db_fill_pattern_0_1: 60000 rects
+caravel_0008d8db_fill_pattern_4_3: 60000 rects
+caravel_0008d8db_fill_pattern_2_5: 60000 rects
+caravel_0008d8db_fill_pattern_0_5: 80000 rects
+caravel_0008d8db_fill_pattern_4_5: 80000 rects
+caravel_0008d8db_fill_pattern_1_0: 70000 rects
+caravel_0008d8db_fill_pattern_5_4: 70000 rects
+caravel_0008d8db_fill_pattern_4_1: 80000 rects
+caravel_0008d8db_fill_pattern_0_7: 70000 rects
+caravel_0008d8db_fill_pattern_2_7: 50000 rects
+caravel_0008d8db_fill_pattern_0_1: 70000 rects
+caravel_0008d8db_fill_pattern_5_0: 70000 rects
+caravel_0008d8db_fill_pattern_0_5: 90000 rects
+caravel_0008d8db_fill_pattern_2_5: 70000 rects
+caravel_0008d8db_fill_pattern_4_3: 70000 rects
+caravel_0008d8db_fill_pattern_1_0: 80000 rects
+caravel_0008d8db_fill_pattern_4_5: 90000 rects
+caravel_0008d8db_fill_pattern_5_4: 80000 rects
+caravel_0008d8db_fill_pattern_0_7: 80000 rects
+caravel_0008d8db_fill_pattern_0_5: 100000 rects
+caravel_0008d8db_fill_pattern_4_1: 90000 rects
+caravel_0008d8db_fill_pattern_0_1: 80000 rects
+caravel_0008d8db_fill_pattern_5_0: 80000 rects
+caravel_0008d8db_fill_pattern_2_5: 80000 rects
+caravel_0008d8db_fill_pattern_4_3: 80000 rects
+caravel_0008d8db_fill_pattern_5_4: 90000 rects
+caravel_0008d8db_fill_pattern_1_0: 90000 rects
+caravel_0008d8db_fill_pattern_4_5: 100000 rects
+caravel_0008d8db_fill_pattern_2_7: 60000 rects
+caravel_0008d8db_fill_pattern_0_7: 90000 rects
+caravel_0008d8db_fill_pattern_0_5: 110000 rects
+caravel_0008d8db_fill_pattern_4_1: 100000 rects
+caravel_0008d8db_fill_pattern_2_5: 90000 rects
+caravel_0008d8db_fill_pattern_5_0: 90000 rects
+caravel_0008d8db_fill_pattern_0_1: 90000 rects
+caravel_0008d8db_fill_pattern_5_4: 100000 rects
+caravel_0008d8db_fill_pattern_0_5: 120000 rects
+caravel_0008d8db_fill_pattern_0_7: 100000 rects
+caravel_0008d8db_fill_pattern_1_0: 100000 rects
+caravel_0008d8db_fill_pattern_4_3: 90000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_4_5: 110000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_4_1: 110000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_2_7: 70000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_2_3
+caravel_0008d8db_fill_pattern_0_5: 130000 rects
+caravel_0008d8db_fill_pattern_5_4: 110000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_3_2
+caravel_0008d8db_fill_pattern_2_5: 100000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_1_4
+caravel_0008d8db_fill_pattern_0_1: 100000 rects
+caravel_0008d8db_fill_pattern_0_7: 110000 rects
+caravel_0008d8db_fill_pattern_1_0: 110000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_4_3: 100000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_1_6
+caravel_0008d8db_fill_pattern_4_1: 120000 rects
+caravel_0008d8db_fill_pattern_4_5: 120000 rects
+caravel_0008d8db_fill_pattern_2_7: 80000 rects
+caravel_0008d8db_fill_pattern_0_5: 140000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_3_6
+caravel_0008d8db_fill_pattern_5_0: 100000 rects
+caravel_0008d8db_fill_pattern_5_4: 120000 rects
+caravel_0008d8db_fill_pattern_2_5: 110000 rects
+caravel_0008d8db_fill_pattern_0_7: 120000 rects
+caravel_0008d8db_fill_pattern_0_1: 110000 rects
+caravel_0008d8db_fill_pattern_1_0: 120000 rects
+caravel_0008d8db_fill_pattern_2_7: 90000 rects
+caravel_0008d8db_fill_pattern_4_1: 130000 rects
+caravel_0008d8db_fill_pattern_0_5: 150000 rects
+caravel_0008d8db_fill_pattern_4_3: 110000 rects
+caravel_0008d8db_fill_pattern_4_5: 130000 rects
+caravel_0008d8db_fill_pattern_5_4: 130000 rects
+caravel_0008d8db_fill_pattern_2_5: 120000 rects
+caravel_0008d8db_fill_pattern_0_1: 120000 rects
+caravel_0008d8db_fill_pattern_0_7: 130000 rects
+caravel_0008d8db_fill_pattern_2_7: 100000 rects
+caravel_0008d8db_fill_pattern_4_1: 140000 rects
+caravel_0008d8db_fill_pattern_1_0: 130000 rects
+caravel_0008d8db_fill_pattern_0_5: 160000 rects
+caravel_0008d8db_fill_pattern_4_3: 120000 rects
+caravel_0008d8db_fill_pattern_2_5: 130000 rects
+caravel_0008d8db_fill_pattern_0_1: 130000 rects
+caravel_0008d8db_fill_pattern_5_0: 110000 rects
+caravel_0008d8db_fill_pattern_4_5: 140000 rects
+caravel_0008d8db_fill_pattern_2_7: 110000 rects
+caravel_0008d8db_fill_pattern_5_4: 140000 rects
+caravel_0008d8db_fill_pattern_0_7: 140000 rects
+caravel_0008d8db_fill_pattern_4_1: 150000 rects
+caravel_0008d8db_fill_pattern_1_0: 140000 rects
+caravel_0008d8db_fill_pattern_0_5: 170000 rects
+caravel_0008d8db_fill_pattern_2_5: 140000 rects
+caravel_0008d8db_fill_pattern_2_7: 120000 rects
+caravel_0008d8db_fill_pattern_0_1: 140000 rects
+caravel_0008d8db_fill_pattern_4_5: 150000 rects
+caravel_0008d8db_fill_pattern_5_4: 150000 rects
+caravel_0008d8db_fill_pattern_4_1: 160000 rects
+caravel_0008d8db_fill_pattern_1_0: 150000 rects
+caravel_0008d8db_fill_pattern_4_3: 130000 rects
+caravel_0008d8db_fill_pattern_0_7: 150000 rects
+caravel_0008d8db_fill_pattern_0_5: 180000 rects
+caravel_0008d8db_fill_pattern_2_7: 130000 rects
+caravel_0008d8db_fill_pattern_2_5: 150000 rects
+caravel_0008d8db_fill_pattern_0_1: 150000 rects
+caravel_0008d8db_fill_pattern_5_0: 120000 rects
+caravel_0008d8db_fill_pattern_5_4: 160000 rects
+caravel_0008d8db_fill_pattern_4_1: 170000 rects
+caravel_0008d8db_fill_pattern_1_0: 160000 rects
+caravel_0008d8db_fill_pattern_4_3: 140000 rects
+caravel_0008d8db_fill_pattern_0_5: 190000 rects
+caravel_0008d8db_fill_pattern_0_7: 160000 rects
+caravel_0008d8db_fill_pattern_4_5: 160000 rects
+caravel_0008d8db_fill_pattern_2_7: 140000 rects
+caravel_0008d8db_fill_pattern_2_5: 160000 rects
+caravel_0008d8db_fill_pattern_0_1: 160000 rects
+caravel_0008d8db_fill_pattern_4_1: 180000 rects
+caravel_0008d8db_fill_pattern_5_4: 170000 rects
+caravel_0008d8db_fill_pattern_1_0: 170000 rects
+caravel_0008d8db_fill_pattern_2_7: 150000 rects
+caravel_0008d8db_fill_pattern_0_5: 200000 rects
+caravel_0008d8db_fill_pattern_4_3: 150000 rects
+caravel_0008d8db_fill_pattern_4_5: 170000 rects
+caravel_0008d8db_fill_pattern_0_7: 170000 rects
+caravel_0008d8db_fill_pattern_0_1: 170000 rects
+caravel_0008d8db_fill_pattern_2_7: 160000 rects
+caravel_0008d8db_fill_pattern_4_1: 190000 rects
+caravel_0008d8db_fill_pattern_5_0: 130000 rects
+caravel_0008d8db_fill_pattern_2_5: 170000 rects
+caravel_0008d8db_fill_pattern_5_4: 180000 rects
+caravel_0008d8db_fill_pattern_0_5: 210000 rects
+caravel_0008d8db_fill_pattern_1_0: 180000 rects
+caravel_0008d8db_fill_pattern_0_1: 180000 rects
+caravel_0008d8db_fill_pattern_4_5: 180000 rects
+caravel_0008d8db_fill_pattern_2_7: 170000 rects
+caravel_0008d8db_fill_pattern_4_1: 200000 rects
+caravel_0008d8db_fill_pattern_4_3: 160000 rects
+caravel_0008d8db_fill_pattern_0_7: 180000 rects
+caravel_0008d8db_fill_pattern_0_5: 220000 rects
+caravel_0008d8db_fill_pattern_5_4: 190000 rects
+caravel_0008d8db_fill_pattern_0_1: 190000 rects
+caravel_0008d8db_fill_pattern_2_5: 180000 rects
+caravel_0008d8db_fill_pattern_1_0: 190000 rects
+caravel_0008d8db_fill_pattern_2_7: 180000 rects
+caravel_0008d8db_fill_pattern_4_1: 210000 rects
+caravel_0008d8db_fill_pattern_4_5: 190000 rects
+caravel_0008d8db_fill_pattern_5_0: 140000 rects
+caravel_0008d8db_fill_pattern_0_5: 230000 rects
+caravel_0008d8db_fill_pattern_0_7: 190000 rects
+caravel_0008d8db_fill_pattern_5_4: 200000 rects
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+   Generating output for cell caravel_0008d8db_fill_pattern_5_0
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+caravel_0008d8db_fill_pattern_2_7: 820000 rects
+caravel_0008d8db_fill_pattern_4_1: 1190000 rects
+caravel_0008d8db_fill_pattern_0_1: 1160000 rects
+caravel_0008d8db_fill_pattern_1_0: 1180000 rects
+caravel_0008d8db_fill_pattern_0_7: 830000 rects
+caravel_0008d8db_fill_pattern_0_5: 850000 rects
+caravel_0008d8db_fill_pattern_5_4: 870000 rects
+caravel_0008d8db_fill_pattern_2_5: 590000 rects
+caravel_0008d8db_fill_pattern_2_7: 830000 rects
+caravel_0008d8db_fill_pattern_1_0: 1190000 rects
+caravel_0008d8db_fill_pattern_4_1: 1200000 rects
+caravel_0008d8db_fill_pattern_0_1: 1170000 rects
+caravel_0008d8db_fill_pattern_5_4: 880000 rects
+caravel_0008d8db_fill_pattern_2_7: 840000 rects
+caravel_0008d8db_fill_pattern_1_0: 1200000 rects
+caravel_0008d8db_fill_pattern_0_7: 840000 rects
+caravel_0008d8db_fill_pattern_0_5: 860000 rects
+caravel_0008d8db_fill_pattern_5_4: 890000 rects
+caravel_0008d8db_fill_pattern_4_1: 1210000 rects
+caravel_0008d8db_fill_pattern_0_1: 1180000 rects
+caravel_0008d8db_fill_pattern_1_0: 1210000 rects
+caravel_0008d8db_fill_pattern_0_7: 850000 rects
+caravel_0008d8db_fill_pattern_2_5: 600000 rects
+caravel_0008d8db_fill_pattern_5_4: 900000 rects
+caravel_0008d8db_fill_pattern_2_7: 850000 rects
+caravel_0008d8db_fill_pattern_0_1: 1190000 rects
+caravel_0008d8db_fill_pattern_4_1: 1220000 rects
+caravel_0008d8db_fill_pattern_1_0: 1220000 rects
+caravel_0008d8db_fill_pattern_0_7: 860000 rects
+caravel_0008d8db_fill_pattern_0_5: 870000 rects
+caravel_0008d8db_fill_pattern_5_4: 910000 rects
+caravel_0008d8db_fill_pattern_2_7: 860000 rects
+caravel_0008d8db_fill_pattern_1_0: 1230000 rects
+caravel_0008d8db_fill_pattern_0_7: 870000 rects
+caravel_0008d8db_fill_pattern_0_1: 1200000 rects
+caravel_0008d8db_fill_pattern_4_1: 1230000 rects
+caravel_0008d8db_fill_pattern_0_5: 880000 rects
+caravel_0008d8db_fill_pattern_5_4: 920000 rects
+caravel_0008d8db_fill_pattern_2_5: 610000 rects
+caravel_0008d8db_fill_pattern_1_0: 1240000 rects
+caravel_0008d8db_fill_pattern_0_5: 890000 rects
+caravel_0008d8db_fill_pattern_0_7: 880000 rects
+caravel_0008d8db_fill_pattern_0_1: 1210000 rects
+caravel_0008d8db_fill_pattern_2_7: 870000 rects
+caravel_0008d8db_fill_pattern_4_1: 1240000 rects
+caravel_0008d8db_fill_pattern_5_4: 930000 rects
+caravel_0008d8db_fill_pattern_1_0: 1250000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_0_5: 900000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_4_5
+caravel_0008d8db_fill_pattern_1_0: 1260000 rects
+caravel_0008d8db_fill_pattern_0_7: 890000 rects
+caravel_0008d8db_fill_pattern_2_7: 880000 rects
+caravel_0008d8db_fill_pattern_0_1: 1220000 rects
+caravel_0008d8db_fill_pattern_4_1: 1250000 rects
+caravel_0008d8db_fill_pattern_2_5: 620000 rects
+caravel_0008d8db_fill_pattern_5_4: 940000 rects
+caravel_0008d8db_fill_pattern_0_5: 910000 rects
+caravel_0008d8db_fill_pattern_1_0: 1270000 rects
+caravel_0008d8db_fill_pattern_0_5: 920000 rects
+caravel_0008d8db_fill_pattern_2_7: 890000 rects
+caravel_0008d8db_fill_pattern_4_1: 1260000 rects
+caravel_0008d8db_fill_pattern_1_0: 1280000 rects
+caravel_0008d8db_fill_pattern_0_1: 1230000 rects
+caravel_0008d8db_fill_pattern_5_4: 950000 rects
+caravel_0008d8db_fill_pattern_0_5: 930000 rects
+caravel_0008d8db_fill_pattern_1_0: 1290000 rects
+caravel_0008d8db_fill_pattern_2_5: 630000 rects
+caravel_0008d8db_fill_pattern_0_1: 1240000 rects
+caravel_0008d8db_fill_pattern_4_1: 1270000 rects
+caravel_0008d8db_fill_pattern_5_4: 960000 rects
+caravel_0008d8db_fill_pattern_0_7: 900000 rects
+caravel_0008d8db_fill_pattern_0_5: 940000 rects
+caravel_0008d8db_fill_pattern_1_0: 1300000 rects
+caravel_0008d8db_fill_pattern_2_7: 900000 rects
+caravel_0008d8db_fill_pattern_5_4: 970000 rects
+caravel_0008d8db_fill_pattern_0_5: 950000 rects
+caravel_0008d8db_fill_pattern_0_1: 1250000 rects
+caravel_0008d8db_fill_pattern_4_1: 1280000 rects
+caravel_0008d8db_fill_pattern_1_0: 1310000 rects
+caravel_0008d8db_fill_pattern_0_7: 910000 rects
+caravel_0008d8db_fill_pattern_5_4: 980000 rects
+caravel_0008d8db_fill_pattern_2_7: 910000 rects
+caravel_0008d8db_fill_pattern_0_5: 960000 rects
+caravel_0008d8db_fill_pattern_1_0: 1320000 rects
+caravel_0008d8db_fill_pattern_0_1: 1260000 rects
+caravel_0008d8db_fill_pattern_2_5: 640000 rects
+caravel_0008d8db_fill_pattern_4_1: 1290000 rects
+caravel_0008d8db_fill_pattern_0_7: 920000 rects
+caravel_0008d8db_fill_pattern_5_4: 990000 rects
+caravel_0008d8db_fill_pattern_1_0: 1330000 rects
+caravel_0008d8db_fill_pattern_0_5: 970000 rects
+caravel_0008d8db_fill_pattern_2_7: 920000 rects
+caravel_0008d8db_fill_pattern_0_1: 1270000 rects
+caravel_0008d8db_fill_pattern_0_7: 930000 rects
+caravel_0008d8db_fill_pattern_4_1: 1300000 rects
+caravel_0008d8db_fill_pattern_1_0: 1340000 rects
+caravel_0008d8db_fill_pattern_0_5: 980000 rects
+caravel_0008d8db_fill_pattern_0_7: 940000 rects
+caravel_0008d8db_fill_pattern_2_7: 930000 rects
+caravel_0008d8db_fill_pattern_5_4: 1000000 rects
+caravel_0008d8db_fill_pattern_1_0: 1350000 rects
+caravel_0008d8db_fill_pattern_0_1: 1280000 rects
+caravel_0008d8db_fill_pattern_4_1: 1310000 rects
+caravel_0008d8db_fill_pattern_0_5: 990000 rects
+caravel_0008d8db_fill_pattern_2_5: 650000 rects
+caravel_0008d8db_fill_pattern_1_0: 1360000 rects
+caravel_0008d8db_fill_pattern_0_5: 1000000 rects
+caravel_0008d8db_fill_pattern_0_1: 1290000 rects
+caravel_0008d8db_fill_pattern_5_4: 1010000 rects
+caravel_0008d8db_fill_pattern_4_1: 1320000 rects
+caravel_0008d8db_fill_pattern_1_0: 1370000 rects
+caravel_0008d8db_fill_pattern_0_7: 950000 rects
+caravel_0008d8db_fill_pattern_2_7: 940000 rects
+caravel_0008d8db_fill_pattern_5_4: 1020000 rects
+caravel_0008d8db_fill_pattern_0_5: 1010000 rects
+caravel_0008d8db_fill_pattern_1_0: 1380000 rects
+caravel_0008d8db_fill_pattern_0_1: 1300000 rects
+caravel_0008d8db_fill_pattern_5_4: 1030000 rects
+caravel_0008d8db_fill_pattern_4_1: 1330000 rects
+caravel_0008d8db_fill_pattern_0_5: 1020000 rects
+caravel_0008d8db_fill_pattern_1_0: 1390000 rects
+caravel_0008d8db_fill_pattern_0_1: 1310000 rects
+caravel_0008d8db_fill_pattern_2_7: 950000 rects
+caravel_0008d8db_fill_pattern_2_5: 660000 rects
+caravel_0008d8db_fill_pattern_4_1: 1340000 rects
+caravel_0008d8db_fill_pattern_0_5: 1030000 rects
+caravel_0008d8db_fill_pattern_0_7: 960000 rects
+caravel_0008d8db_fill_pattern_1_0: 1400000 rects
+caravel_0008d8db_fill_pattern_0_1: 1320000 rects
+caravel_0008d8db_fill_pattern_0_5: 1040000 rects
+caravel_0008d8db_fill_pattern_4_1: 1350000 rects
+caravel_0008d8db_fill_pattern_1_0: 1410000 rects
+caravel_0008d8db_fill_pattern_0_1: 1330000 rects
+caravel_0008d8db_fill_pattern_2_7: 960000 rects
+caravel_0008d8db_fill_pattern_0_5: 1050000 rects
+caravel_0008d8db_fill_pattern_1_0: 1420000 rects
+caravel_0008d8db_fill_pattern_0_1: 1340000 rects
+caravel_0008d8db_fill_pattern_4_1: 1360000 rects
+caravel_0008d8db_fill_pattern_0_7: 970000 rects
+caravel_0008d8db_fill_pattern_1_0: 1430000 rects
+caravel_0008d8db_fill_pattern_0_5: 1060000 rects
+caravel_0008d8db_fill_pattern_2_5: 670000 rects
+caravel_0008d8db_fill_pattern_2_7: 970000 rects
+caravel_0008d8db_fill_pattern_0_7: 980000 rects
+caravel_0008d8db_fill_pattern_4_1: 1370000 rects
+caravel_0008d8db_fill_pattern_1_0: 1440000 rects
+caravel_0008d8db_fill_pattern_0_5: 1070000 rects
+caravel_0008d8db_fill_pattern_0_7: 990000 rects
+caravel_0008d8db_fill_pattern_0_1: 1350000 rects
+caravel_0008d8db_fill_pattern_2_7: 980000 rects
+caravel_0008d8db_fill_pattern_1_0: 1450000 rects
+caravel_0008d8db_fill_pattern_4_1: 1380000 rects
+caravel_0008d8db_fill_pattern_0_7: 1000000 rects
+caravel_0008d8db_fill_pattern_0_5: 1080000 rects
+caravel_0008d8db_fill_pattern_1_0: 1460000 rects
+caravel_0008d8db_fill_pattern_2_7: 990000 rects
+caravel_0008d8db_fill_pattern_0_5: 1090000 rects
+caravel_0008d8db_fill_pattern_4_1: 1390000 rects
+caravel_0008d8db_fill_pattern_2_5: 680000 rects
+caravel_0008d8db_fill_pattern_1_0: 1470000 rects
+caravel_0008d8db_fill_pattern_0_5: 1100000 rects
+caravel_0008d8db_fill_pattern_1_0: 1480000 rects
+caravel_0008d8db_fill_pattern_0_1: 1360000 rects
+caravel_0008d8db_fill_pattern_4_1: 1400000 rects
+caravel_0008d8db_fill_pattern_2_7: 1000000 rects
+caravel_0008d8db_fill_pattern_0_7: 1010000 rects
+caravel_0008d8db_fill_pattern_1_0: 1490000 rects
+caravel_0008d8db_fill_pattern_0_5: 1110000 rects
+caravel_0008d8db_fill_pattern_0_1: 1370000 rects
+caravel_0008d8db_fill_pattern_4_1: 1410000 rects
+caravel_0008d8db_fill_pattern_2_7: 1010000 rects
+caravel_0008d8db_fill_pattern_1_0: 1500000 rects
+caravel_0008d8db_fill_pattern_2_5: 690000 rects
+caravel_0008d8db_fill_pattern_0_5: 1120000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_0_1: 1380000 rects
+caravel_0008d8db_fill_pattern_1_0: 1510000 rects
+caravel_0008d8db_fill_pattern_4_1: 1420000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_5_4
+caravel_0008d8db_fill_pattern_1_0: 1520000 rects
+caravel_0008d8db_fill_pattern_0_5: 1130000 rects
+caravel_0008d8db_fill_pattern_2_7: 1020000 rects
+caravel_0008d8db_fill_pattern_0_1: 1390000 rects
+caravel_0008d8db_fill_pattern_4_1: 1430000 rects
+caravel_0008d8db_fill_pattern_1_0: 1530000 rects
+caravel_0008d8db_fill_pattern_0_1: 1400000 rects
+caravel_0008d8db_fill_pattern_1_0: 1540000 rects
+caravel_0008d8db_fill_pattern_4_1: 1440000 rects
+caravel_0008d8db_fill_pattern_0_5: 1140000 rects
+caravel_0008d8db_fill_pattern_2_5: 700000 rects
+caravel_0008d8db_fill_pattern_1_0: 1550000 rects
+caravel_0008d8db_fill_pattern_0_1: 1410000 rects
+caravel_0008d8db_fill_pattern_4_1: 1450000 rects
+caravel_0008d8db_fill_pattern_2_7: 1030000 rects
+caravel_0008d8db_fill_pattern_1_0: 1560000 rects
+caravel_0008d8db_fill_pattern_0_5: 1150000 rects
+caravel_0008d8db_fill_pattern_1_0: 1570000 rects
+caravel_0008d8db_fill_pattern_0_1: 1420000 rects
+caravel_0008d8db_fill_pattern_2_7: 1040000 rects
+caravel_0008d8db_fill_pattern_4_1: 1460000 rects
+caravel_0008d8db_fill_pattern_2_7: 1050000 rects
+caravel_0008d8db_fill_pattern_0_5: 1160000 rects
+caravel_0008d8db_fill_pattern_4_1: 1470000 rects
+caravel_0008d8db_fill_pattern_1_0: 1580000 rects
+caravel_0008d8db_fill_pattern_0_1: 1430000 rects
+caravel_0008d8db_fill_pattern_2_5: 710000 rects
+caravel_0008d8db_fill_pattern_2_7: 1060000 rects
+caravel_0008d8db_fill_pattern_4_1: 1480000 rects
+caravel_0008d8db_fill_pattern_0_1: 1440000 rects
+caravel_0008d8db_fill_pattern_1_0: 1590000 rects
+caravel_0008d8db_fill_pattern_0_5: 1170000 rects
+caravel_0008d8db_fill_pattern_2_7: 1070000 rects
+caravel_0008d8db_fill_pattern_4_1: 1490000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_0_1: 1450000 rects
+caravel_0008d8db_fill_pattern_2_7: 1080000 rects
+caravel_0008d8db_fill_pattern_1_0: 1600000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_0_7
+caravel_0008d8db_fill_pattern_4_1: 1500000 rects
+caravel_0008d8db_fill_pattern_0_5: 1180000 rects
+caravel_0008d8db_fill_pattern_2_7: 1090000 rects
+caravel_0008d8db_fill_pattern_0_1: 1460000 rects
+caravel_0008d8db_fill_pattern_1_0: 1610000 rects
+caravel_0008d8db_fill_pattern_2_5: 720000 rects
+caravel_0008d8db_fill_pattern_2_7: 1100000 rects
+caravel_0008d8db_fill_pattern_4_1: 1510000 rects
+caravel_0008d8db_fill_pattern_0_1: 1470000 rects
+caravel_0008d8db_fill_pattern_2_7: 1110000 rects
+caravel_0008d8db_fill_pattern_2_5: 730000 rects
+caravel_0008d8db_fill_pattern_0_5: 1190000 rects
+caravel_0008d8db_fill_pattern_1_0: 1620000 rects
+caravel_0008d8db_fill_pattern_2_7: 1120000 rects
+caravel_0008d8db_fill_pattern_2_5: 740000 rects
+caravel_0008d8db_fill_pattern_0_1: 1480000 rects
+caravel_0008d8db_fill_pattern_4_1: 1520000 rects
+caravel_0008d8db_fill_pattern_1_0: 1630000 rects
+caravel_0008d8db_fill_pattern_0_5: 1200000 rects
+caravel_0008d8db_fill_pattern_0_1: 1490000 rects
+caravel_0008d8db_fill_pattern_1_0: 1640000 rects
+caravel_0008d8db_fill_pattern_0_5: 1210000 rects
+caravel_0008d8db_fill_pattern_2_7: 1130000 rects
+caravel_0008d8db_fill_pattern_4_1: 1530000 rects
+caravel_0008d8db_fill_pattern_0_1: 1500000 rects
+caravel_0008d8db_fill_pattern_1_0: 1650000 rects
+caravel_0008d8db_fill_pattern_0_5: 1220000 rects
+caravel_0008d8db_fill_pattern_2_7: 1140000 rects
+caravel_0008d8db_fill_pattern_0_1: 1510000 rects
+caravel_0008d8db_fill_pattern_4_1: 1540000 rects
+caravel_0008d8db_fill_pattern_1_0: 1660000 rects
+caravel_0008d8db_fill_pattern_0_1: 1520000 rects
+caravel_0008d8db_fill_pattern_0_5: 1230000 rects
+caravel_0008d8db_fill_pattern_2_7: 1150000 rects
+caravel_0008d8db_fill_pattern_4_1: 1550000 rects
+caravel_0008d8db_fill_pattern_1_0: 1670000 rects
+caravel_0008d8db_fill_pattern_0_1: 1530000 rects
+caravel_0008d8db_fill_pattern_0_5: 1240000 rects
+caravel_0008d8db_fill_pattern_1_0: 1680000 rects
+caravel_0008d8db_fill_pattern_4_1: 1560000 rects
+caravel_0008d8db_fill_pattern_0_1: 1540000 rects
+caravel_0008d8db_fill_pattern_0_5: 1250000 rects
+caravel_0008d8db_fill_pattern_2_7: 1160000 rects
+caravel_0008d8db_fill_pattern_1_0: 1690000 rects
+caravel_0008d8db_fill_pattern_4_1: 1570000 rects
+caravel_0008d8db_fill_pattern_1_0: 1700000 rects
+caravel_0008d8db_fill_pattern_0_1: 1550000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_0_5: 1260000 rects
+caravel_0008d8db_fill_pattern_2_7: 1170000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_2_5
+caravel_0008d8db_fill_pattern_1_0: 1710000 rects
+caravel_0008d8db_fill_pattern_1_0: 1720000 rects
+caravel_0008d8db_fill_pattern_0_1: 1560000 rects
+caravel_0008d8db_fill_pattern_0_5: 1270000 rects
+caravel_0008d8db_fill_pattern_2_7: 1180000 rects
+caravel_0008d8db_fill_pattern_4_1: 1580000 rects
+caravel_0008d8db_fill_pattern_1_0: 1730000 rects
+caravel_0008d8db_fill_pattern_0_1: 1570000 rects
+caravel_0008d8db_fill_pattern_0_5: 1280000 rects
+caravel_0008d8db_fill_pattern_1_0: 1740000 rects
+caravel_0008d8db_fill_pattern_0_1: 1580000 rects
+caravel_0008d8db_fill_pattern_0_5: 1290000 rects
+caravel_0008d8db_fill_pattern_2_7: 1190000 rects
+caravel_0008d8db_fill_pattern_1_0: 1750000 rects
+caravel_0008d8db_fill_pattern_4_1: 1590000 rects
+caravel_0008d8db_fill_pattern_2_7: 1200000 rects
+caravel_0008d8db_fill_pattern_0_5: 1300000 rects
+caravel_0008d8db_fill_pattern_0_1: 1590000 rects
+caravel_0008d8db_fill_pattern_1_0: 1760000 rects
+caravel_0008d8db_fill_pattern_0_5: 1310000 rects
+caravel_0008d8db_fill_pattern_1_0: 1770000 rects
+caravel_0008d8db_fill_pattern_2_7: 1210000 rects
+caravel_0008d8db_fill_pattern_0_1: 1600000 rects
+caravel_0008d8db_fill_pattern_1_0: 1780000 rects
+caravel_0008d8db_fill_pattern_0_5: 1320000 rects
+caravel_0008d8db_fill_pattern_2_7: 1220000 rects
+caravel_0008d8db_fill_pattern_4_1: 1600000 rects
+caravel_0008d8db_fill_pattern_0_1: 1610000 rects
+caravel_0008d8db_fill_pattern_2_7: 1230000 rects
+caravel_0008d8db_fill_pattern_1_0: 1790000 rects
+caravel_0008d8db_fill_pattern_2_7: 1240000 rects
+caravel_0008d8db_fill_pattern_0_5: 1330000 rects
+caravel_0008d8db_fill_pattern_0_1: 1620000 rects
+caravel_0008d8db_fill_pattern_2_7: 1250000 rects
+caravel_0008d8db_fill_pattern_1_0: 1800000 rects
+caravel_0008d8db_fill_pattern_2_7: 1260000 rects
+caravel_0008d8db_fill_pattern_4_1: 1610000 rects
+caravel_0008d8db_fill_pattern_0_5: 1340000 rects
+caravel_0008d8db_fill_pattern_1_0: 1810000 rects
+caravel_0008d8db_fill_pattern_0_1: 1630000 rects
+caravel_0008d8db_fill_pattern_2_7: 1270000 rects
+caravel_0008d8db_fill_pattern_0_5: 1350000 rects
+caravel_0008d8db_fill_pattern_1_0: 1820000 rects
+caravel_0008d8db_fill_pattern_0_1: 1640000 rects
+caravel_0008d8db_fill_pattern_2_7: 1280000 rects
+caravel_0008d8db_fill_pattern_0_5: 1360000 rects
+caravel_0008d8db_fill_pattern_1_0: 1830000 rects
+caravel_0008d8db_fill_pattern_4_1: 1620000 rects
+caravel_0008d8db_fill_pattern_0_5: 1370000 rects
+caravel_0008d8db_fill_pattern_0_1: 1650000 rects
+caravel_0008d8db_fill_pattern_0_5: 1380000 rects
+caravel_0008d8db_fill_pattern_1_0: 1840000 rects
+caravel_0008d8db_fill_pattern_0_5: 1390000 rects
+caravel_0008d8db_fill_pattern_2_7: 1290000 rects
+caravel_0008d8db_fill_pattern_0_1: 1660000 rects
+caravel_0008d8db_fill_pattern_1_0: 1850000 rects
+caravel_0008d8db_fill_pattern_0_5: 1400000 rects
+caravel_0008d8db_fill_pattern_4_1: 1630000 rects
+caravel_0008d8db_fill_pattern_0_5: 1410000 rects
+caravel_0008d8db_fill_pattern_1_0: 1860000 rects
+caravel_0008d8db_fill_pattern_0_1: 1670000 rects
+caravel_0008d8db_fill_pattern_0_5: 1420000 rects
+caravel_0008d8db_fill_pattern_2_7: 1300000 rects
+caravel_0008d8db_fill_pattern_0_5: 1430000 rects
+caravel_0008d8db_fill_pattern_1_0: 1870000 rects
+caravel_0008d8db_fill_pattern_0_1: 1680000 rects
+caravel_0008d8db_fill_pattern_0_5: 1440000 rects
+caravel_0008d8db_fill_pattern_4_1: 1640000 rects
+Ended: 01/01/2023 08:51:40
+caravel_0008d8db_fill_pattern_1_0: 1880000 rects
+caravel_0008d8db_fill_pattern_0_5: 1450000 rects
+caravel_0008d8db_fill_pattern_0_1: 1690000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_2_7: 1310000 rects
+caravel_0008d8db_fill_pattern_1_0: 1890000 rects
+caravel_0008d8db_fill_pattern_0_5: 1460000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_0_1: 1700000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_1_0: 1900000 rects
+caravel_0008d8db_fill_pattern_2_7: 1320000 rects
+caravel_0008d8db_fill_pattern_4_1: 1650000 rects
+caravel_0008d8db_fill_pattern_0_5: 1470000 rects
+caravel_0008d8db_fill_pattern_1_0: 1910000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_2_7: 1330000 rects
+caravel_0008d8db_fill_pattern_0_1: 1710000 rects
+caravel_0008d8db_fill_pattern_0_5: 1480000 rects
+caravel_0008d8db_fill_pattern_2_7: 1340000 rects
+caravel_0008d8db_fill_pattern_1_0: 1920000 rects
+caravel_0008d8db_fill_pattern_2_7: 1350000 rects
+caravel_0008d8db_fill_pattern_0_1: 1720000 rects
+caravel_0008d8db_fill_pattern_0_5: 1490000 rects
+caravel_0008d8db_fill_pattern_4_1: 1660000 rects
+caravel_0008d8db_fill_pattern_2_7: 1360000 rects
+caravel_0008d8db_fill_pattern_1_0: 1930000 rects
+caravel_0008d8db_fill_pattern_0_1: 1730000 rects
+caravel_0008d8db_fill_pattern_0_5: 1500000 rects
+caravel_0008d8db_fill_pattern_1_0: 1940000 rects
+caravel_0008d8db_fill_pattern_2_7: 1370000 rects
+caravel_0008d8db_fill_pattern_0_1: 1740000 rects
+caravel_0008d8db_fill_pattern_4_1: 1670000 rects
+caravel_0008d8db_fill_pattern_1_0: 1950000 rects
+caravel_0008d8db_fill_pattern_0_5: 1510000 rects
+caravel_0008d8db_fill_pattern_2_7: 1380000 rects
+caravel_0008d8db_fill_pattern_0_1: 1750000 rects
+caravel_0008d8db_fill_pattern_1_0: 1960000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008d8db_fill_pattern_0_5: 1520000 rects
+caravel_0008d8db_fill_pattern_4_1: 1680000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_0_1: 1760000 rects
+caravel_0008d8db_fill_pattern_1_0: 1970000 rects
+caravel_0008d8db_fill_pattern_0_1: 1770000 rects
+caravel_0008d8db_fill_pattern_0_5: 1530000 rects
+caravel_0008d8db_fill_pattern_5_2: 10000 rects
+caravel_0008d8db_fill_pattern_1_0: 1980000 rects
+caravel_0008d8db_fill_pattern_0_1: 1780000 rects
+caravel_0008d8db_fill_pattern_5_2: 20000 rects
+caravel_0008d8db_fill_pattern_2_7: 1390000 rects
+caravel_0008d8db_fill_pattern_1_0: 1990000 rects
+caravel_0008d8db_fill_pattern_4_1: 1690000 rects
+caravel_0008d8db_fill_pattern_5_2: 30000 rects
+caravel_0008d8db_fill_pattern_0_5: 1540000 rects
+caravel_0008d8db_fill_pattern_0_1: 1790000 rects
+caravel_0008d8db_fill_pattern_1_0: 2000000 rects
+caravel_0008d8db_fill_pattern_5_2: 40000 rects
+caravel_0008d8db_fill_pattern_2_7: 1400000 rects
+caravel_0008d8db_fill_pattern_0_1: 1800000 rects
+caravel_0008d8db_fill_pattern_5_2: 50000 rects
+caravel_0008d8db_fill_pattern_2_7: 1410000 rects
+caravel_0008d8db_fill_pattern_0_5: 1550000 rects
+caravel_0008d8db_fill_pattern_0_1: 1810000 rects
+caravel_0008d8db_fill_pattern_1_0: 2010000 rects
+caravel_0008d8db_fill_pattern_5_2: 60000 rects
+caravel_0008d8db_fill_pattern_2_7: 1420000 rects
+caravel_0008d8db_fill_pattern_5_2: 70000 rects
+caravel_0008d8db_fill_pattern_4_1: 1700000 rects
+caravel_0008d8db_fill_pattern_0_1: 1820000 rects
+caravel_0008d8db_fill_pattern_0_5: 1560000 rects
+caravel_0008d8db_fill_pattern_5_2: 80000 rects
+caravel_0008d8db_fill_pattern_2_7: 1430000 rects
+caravel_0008d8db_fill_pattern_1_0: 2020000 rects
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+caravel_0008d8db_fill_pattern_5_2: 90000 rects
+caravel_0008d8db_fill_pattern_2_7: 1440000 rects
+caravel_0008d8db_fill_pattern_0_1: 1840000 rects
+caravel_0008d8db_fill_pattern_5_2: 100000 rects
+caravel_0008d8db_fill_pattern_0_5: 1570000 rects
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+caravel_0008d8db_fill_pattern_0_1: 1850000 rects
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+caravel_0008d8db_fill_pattern_4_1: 1710000 rects
+caravel_0008d8db_fill_pattern_0_5: 1580000 rects
+caravel_0008d8db_fill_pattern_1_0: 2040000 rects
+caravel_0008d8db_fill_pattern_5_2: 120000 rects
+caravel_0008d8db_fill_pattern_0_1: 1860000 rects
+caravel_0008d8db_fill_pattern_0_5: 1590000 rects
+caravel_0008d8db_fill_pattern_1_0: 2050000 rects
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+caravel_0008d8db_fill_pattern_0_5: 1600000 rects
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+caravel_0008d8db_fill_pattern_0_5: 1610000 rects
+caravel_0008d8db_fill_pattern_5_2: 140000 rects
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+caravel_0008d8db_fill_pattern_4_1: 1720000 rects
+caravel_0008d8db_fill_pattern_0_1: 1880000 rects
+caravel_0008d8db_fill_pattern_0_5: 1620000 rects
+caravel_0008d8db_fill_pattern_5_2: 150000 rects
+caravel_0008d8db_fill_pattern_0_5: 1630000 rects
+caravel_0008d8db_fill_pattern_1_0: 2070000 rects
+caravel_0008d8db_fill_pattern_0_1: 1890000 rects
+caravel_0008d8db_fill_pattern_5_2: 160000 rects
+caravel_0008d8db_fill_pattern_0_5: 1640000 rects
+caravel_0008d8db_fill_pattern_5_2: 170000 rects
+caravel_0008d8db_fill_pattern_4_1: 1730000 rects
+caravel_0008d8db_fill_pattern_1_0: 2080000 rects
+caravel_0008d8db_fill_pattern_0_1: 1900000 rects
+caravel_0008d8db_fill_pattern_5_2: 180000 rects
+caravel_0008d8db_fill_pattern_0_5: 1650000 rects
+caravel_0008d8db_fill_pattern_5_2: 190000 rects
+caravel_0008d8db_fill_pattern_1_0: 2090000 rects
+caravel_0008d8db_fill_pattern_0_5: 1660000 rects
+caravel_0008d8db_fill_pattern_0_1: 1910000 rects
+caravel_0008d8db_fill_pattern_4_1: 1740000 rects
+caravel_0008d8db_fill_pattern_5_2: 200000 rects
+caravel_0008d8db_fill_pattern_1_0: 2100000 rects
+caravel_0008d8db_fill_pattern_0_5: 1670000 rects
+caravel_0008d8db_fill_pattern_0_1: 1920000 rects
+caravel_0008d8db_fill_pattern_5_2: 210000 rects
+caravel_0008d8db_fill_pattern_1_0: 2110000 rects
+caravel_0008d8db_fill_pattern_5_2: 220000 rects
+caravel_0008d8db_fill_pattern_0_5: 1680000 rects
+caravel_0008d8db_fill_pattern_4_1: 1750000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_0_1: 1930000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_2_7
+caravel_0008d8db_fill_pattern_1_0: 2120000 rects
+caravel_0008d8db_fill_pattern_5_2: 230000 rects
+caravel_0008d8db_fill_pattern_0_5: 1690000 rects
+caravel_0008d8db_fill_pattern_5_2: 240000 rects
+caravel_0008d8db_fill_pattern_0_1: 1940000 rects
+caravel_0008d8db_fill_pattern_1_0: 2130000 rects
+caravel_0008d8db_fill_pattern_5_2: 250000 rects
+caravel_0008d8db_fill_pattern_4_1: 1760000 rects
+caravel_0008d8db_fill_pattern_5_2: 260000 rects
+caravel_0008d8db_fill_pattern_1_0: 2140000 rects
+caravel_0008d8db_fill_pattern_0_5: 1700000 rects
+caravel_0008d8db_fill_pattern_0_1: 1950000 rects
+caravel_0008d8db_fill_pattern_5_2: 270000 rects
+caravel_0008d8db_fill_pattern_0_5: 1710000 rects
+caravel_0008d8db_fill_pattern_1_0: 2150000 rects
+caravel_0008d8db_fill_pattern_5_2: 280000 rects
+caravel_0008d8db_fill_pattern_0_1: 1960000 rects
+caravel_0008d8db_fill_pattern_4_1: 1770000 rects
+caravel_0008d8db_fill_pattern_5_2: 290000 rects
+caravel_0008d8db_fill_pattern_1_0: 2160000 rects
+caravel_0008d8db_fill_pattern_0_5: 1720000 rects
+caravel_0008d8db_fill_pattern_0_1: 1970000 rects
+caravel_0008d8db_fill_pattern_0_5: 1730000 rects
+caravel_0008d8db_fill_pattern_1_0: 2170000 rects
+caravel_0008d8db_fill_pattern_5_2: 300000 rects
+caravel_0008d8db_fill_pattern_0_5: 1740000 rects
+caravel_0008d8db_fill_pattern_4_1: 1780000 rects
+caravel_0008d8db_fill_pattern_0_5: 1750000 rects
+caravel_0008d8db_fill_pattern_0_1: 1980000 rects
+caravel_0008d8db_fill_pattern_1_0: 2180000 rects
+caravel_0008d8db_fill_pattern_0_5: 1760000 rects
+caravel_0008d8db_fill_pattern_5_2: 310000 rects
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+caravel_0008d8db_fill_pattern_0_1: 1990000 rects
+caravel_0008d8db_fill_pattern_4_1: 1790000 rects
+caravel_0008d8db_fill_pattern_0_5: 1770000 rects
+caravel_0008d8db_fill_pattern_5_2: 320000 rects
+caravel_0008d8db_fill_pattern_1_0: 2200000 rects
+caravel_0008d8db_fill_pattern_0_1: 2000000 rects
+caravel_0008d8db_fill_pattern_4_1: 1800000 rects
+caravel_0008d8db_fill_pattern_5_2: 330000 rects
+caravel_0008d8db_fill_pattern_0_5: 1780000 rects
+caravel_0008d8db_fill_pattern_1_0: 2210000 rects
+caravel_0008d8db_fill_pattern_0_1: 2010000 rects
+caravel_0008d8db_fill_pattern_1_0: 2220000 rects
+caravel_0008d8db_fill_pattern_5_2: 340000 rects
+caravel_0008d8db_fill_pattern_0_5: 1790000 rects
+caravel_0008d8db_fill_pattern_4_1: 1810000 rects
+caravel_0008d8db_fill_pattern_0_1: 2020000 rects
+caravel_0008d8db_fill_pattern_1_0: 2230000 rects
+caravel_0008d8db_fill_pattern_5_2: 350000 rects
+caravel_0008d8db_fill_pattern_0_1: 2030000 rects
+caravel_0008d8db_fill_pattern_1_0: 2240000 rects
+caravel_0008d8db_fill_pattern_0_5: 1800000 rects
+caravel_0008d8db_fill_pattern_4_1: 1820000 rects
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+caravel_0008d8db_fill_pattern_0_5: 1810000 rects
+caravel_0008d8db_fill_pattern_1_0: 2250000 rects
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+caravel_0008d8db_fill_pattern_5_2: 370000 rects
+caravel_0008d8db_fill_pattern_0_5: 1830000 rects
+caravel_0008d8db_fill_pattern_0_1: 2050000 rects
+caravel_0008d8db_fill_pattern_1_0: 2260000 rects
+caravel_0008d8db_fill_pattern_4_1: 1830000 rects
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+caravel_0008d8db_fill_pattern_5_2: 380000 rects
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+caravel_0008d8db_fill_pattern_1_0: 2270000 rects
+caravel_0008d8db_fill_pattern_0_1: 2060000 rects
+caravel_0008d8db_fill_pattern_4_1: 1840000 rects
+caravel_0008d8db_fill_pattern_1_0: 2280000 rects
+caravel_0008d8db_fill_pattern_5_2: 390000 rects
+caravel_0008d8db_fill_pattern_0_5: 1860000 rects
+caravel_0008d8db_fill_pattern_0_1: 2070000 rects
+caravel_0008d8db_fill_pattern_1_0: 2290000 rects
+caravel_0008d8db_fill_pattern_4_1: 1850000 rects
+caravel_0008d8db_fill_pattern_5_2: 400000 rects
+caravel_0008d8db_fill_pattern_0_1: 2080000 rects
+caravel_0008d8db_fill_pattern_1_0: 2300000 rects
+caravel_0008d8db_fill_pattern_5_2: 410000 rects
+caravel_0008d8db_fill_pattern_1_0: 2310000 rects
+caravel_0008d8db_fill_pattern_4_1: 1860000 rects
+caravel_0008d8db_fill_pattern_0_1: 2090000 rects
+caravel_0008d8db_fill_pattern_5_2: 420000 rects
+caravel_0008d8db_fill_pattern_0_5: 1870000 rects
+caravel_0008d8db_fill_pattern_1_0: 2320000 rects
+caravel_0008d8db_fill_pattern_0_1: 2100000 rects
+caravel_0008d8db_fill_pattern_5_2: 430000 rects
+caravel_0008d8db_fill_pattern_4_1: 1870000 rects
+caravel_0008d8db_fill_pattern_1_0: 2330000 rects
+caravel_0008d8db_fill_pattern_1_0: 2340000 rects
+caravel_0008d8db_fill_pattern_5_2: 440000 rects
+caravel_0008d8db_fill_pattern_4_1: 1880000 rects
+caravel_0008d8db_fill_pattern_1_0: 2350000 rects
+caravel_0008d8db_fill_pattern_5_2: 450000 rects
+caravel_0008d8db_fill_pattern_0_1: 2110000 rects
+caravel_0008d8db_fill_pattern_1_0: 2360000 rects
+caravel_0008d8db_fill_pattern_5_2: 460000 rects
+caravel_0008d8db_fill_pattern_4_1: 1890000 rects
+caravel_0008d8db_fill_pattern_1_0: 2370000 rects
+caravel_0008d8db_fill_pattern_5_2: 470000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_1_0: 2380000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_0_5
+caravel_0008d8db_fill_pattern_0_1: 2120000 rects
+caravel_0008d8db_fill_pattern_4_1: 1900000 rects
+caravel_0008d8db_fill_pattern_5_2: 480000 rects
+caravel_0008d8db_fill_pattern_1_0: 2390000 rects
+caravel_0008d8db_fill_pattern_1_0: 2400000 rects
+caravel_0008d8db_fill_pattern_5_2: 490000 rects
+caravel_0008d8db_fill_pattern_4_1: 1910000 rects
+caravel_0008d8db_fill_pattern_5_2: 500000 rects
+caravel_0008d8db_fill_pattern_1_0: 2410000 rects
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+caravel_0008d8db_fill_pattern_1_0: 2420000 rects
+caravel_0008d8db_fill_pattern_5_2: 520000 rects
+caravel_0008d8db_fill_pattern_4_1: 1920000 rects
+caravel_0008d8db_fill_pattern_5_2: 530000 rects
+caravel_0008d8db_fill_pattern_1_0: 2430000 rects
+caravel_0008d8db_fill_pattern_5_2: 540000 rects
+caravel_0008d8db_fill_pattern_0_1: 2140000 rects
+caravel_0008d8db_fill_pattern_5_2: 550000 rects
+caravel_0008d8db_fill_pattern_1_0: 2440000 rects
+caravel_0008d8db_fill_pattern_4_1: 1930000 rects
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+caravel_0008d8db_fill_pattern_1_0: 2450000 rects
+caravel_0008d8db_fill_pattern_5_2: 570000 rects
+caravel_0008d8db_fill_pattern_0_1: 2150000 rects
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+caravel_0008d8db_fill_pattern_5_2: 600000 rects
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+caravel_0008d8db_fill_pattern_5_2: 640000 rects
+caravel_0008d8db_fill_pattern_1_0: 2500000 rects
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+caravel_0008d8db_fill_pattern_5_2: 660000 rects
+caravel_0008d8db_fill_pattern_1_0: 2520000 rects
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+caravel_0008d8db_fill_pattern_1_0: 2630000 rects
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+caravel_0008d8db_fill_pattern_1_0: 2640000 rects
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+caravel_0008d8db_fill_pattern_0_1: 2360000 rects
+caravel_0008d8db_fill_pattern_1_0: 2820000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_5_2
+caravel_0008d8db_fill_pattern_1_0: 2830000 rects
+caravel_0008d8db_fill_pattern_4_1: 2120000 rects
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+caravel_0008d8db_fill_pattern_1_0: 3180000 rects
+caravel_0008d8db_fill_pattern_4_1: 2330000 rects
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+caravel_0008d8db_fill_pattern_1_0: 3190000 rects
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+caravel_0008d8db_fill_pattern_0_1: 2590000 rects
+caravel_0008d8db_fill_pattern_4_1: 2350000 rects
+caravel_0008d8db_fill_pattern_1_0: 3200000 rects
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+caravel_0008d8db_fill_pattern_0_1: 2610000 rects
+caravel_0008d8db_fill_pattern_4_1: 2370000 rects
+Ended: 01/01/2023 08:51:49
+caravel_0008d8db_fill_pattern_1_0: 3220000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_4_1: 2380000 rects
+caravel_0008d8db_fill_pattern_0_1: 2620000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_1_0: 3230000 rects
+caravel_0008d8db_fill_pattern_4_1: 2390000 rects
+caravel_0008d8db_fill_pattern_4_1: 2400000 rects
+caravel_0008d8db_fill_pattern_0_1: 2630000 rects
+caravel_0008d8db_fill_pattern_1_0: 3240000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008d8db_fill_pattern_4_1: 2410000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008d8db_fill_pattern_1_0: 3250000 rects
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+caravel_0008d8db_fill_pattern_4_1: 3100000 rects
+caravel_0008d8db_fill_pattern_1_0: 3660000 rects
+caravel_0008d8db_fill_pattern_4_1: 3110000 rects
+caravel_0008d8db_fill_pattern_0_1: 3030000 rects
+caravel_0008d8db_fill_pattern_4_1: 3120000 rects
+caravel_0008d8db_fill_pattern_1_0: 3670000 rects
+caravel_0008d8db_fill_pattern_4_1: 3130000 rects
+caravel_0008d8db_fill_pattern_0_1: 3040000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_4_1: 3140000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_3_4
+caravel_0008d8db_fill_pattern_1_0: 3680000 rects
+caravel_0008d8db_fill_pattern_4_1: 3150000 rects
+caravel_0008d8db_fill_pattern_4_1: 3160000 rects
+caravel_0008d8db_fill_pattern_0_1: 3050000 rects
+caravel_0008d8db_fill_pattern_4_1: 3170000 rects
+caravel_0008d8db_fill_pattern_4_1: 3180000 rects
+caravel_0008d8db_fill_pattern_4_1: 3190000 rects
+caravel_0008d8db_fill_pattern_1_0: 3690000 rects
+caravel_0008d8db_fill_pattern_4_1: 3200000 rects
+caravel_0008d8db_fill_pattern_4_1: 3210000 rects
+caravel_0008d8db_fill_pattern_4_1: 3220000 rects
+caravel_0008d8db_fill_pattern_0_1: 3060000 rects
+caravel_0008d8db_fill_pattern_1_0: 3700000 rects
+caravel_0008d8db_fill_pattern_4_1: 3230000 rects
+caravel_0008d8db_fill_pattern_4_1: 3240000 rects
+caravel_0008d8db_fill_pattern_4_1: 3250000 rects
+caravel_0008d8db_fill_pattern_4_1: 3260000 rects
+caravel_0008d8db_fill_pattern_0_1: 3070000 rects
+caravel_0008d8db_fill_pattern_1_0: 3710000 rects
+caravel_0008d8db_fill_pattern_0_1: 3080000 rects
+caravel_0008d8db_fill_pattern_1_0: 3720000 rects
+caravel_0008d8db_fill_pattern_0_1: 3090000 rects
+caravel_0008d8db_fill_pattern_0_1: 3100000 rects
+caravel_0008d8db_fill_pattern_0_1: 3110000 rects
+caravel_0008d8db_fill_pattern_0_1: 3120000 rects
+caravel_0008d8db_fill_pattern_1_0: 3730000 rects
+Ended: 01/01/2023 08:51:56
+caravel_0008d8db_fill_pattern_0_1: 3130000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_0_1: 3140000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_0_1: 3150000 rects
+caravel_0008d8db_fill_pattern_4_1: 3270000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_1_0: 3740000 rects
+caravel_0008d8db_fill_pattern_0_1: 3160000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_0_1: 3170000 rects
+caravel_0008d8db_fill_pattern_0_1: 3180000 rects
+caravel_0008d8db_fill_pattern_0_1: 3190000 rects
+caravel_0008d8db_fill_pattern_1_0: 3750000 rects
+caravel_0008d8db_fill_pattern_0_1: 3200000 rects
+caravel_0008d8db_fill_pattern_0_1: 3210000 rects
+caravel_0008d8db_fill_pattern_0_1: 3220000 rects
+caravel_0008d8db_fill_pattern_1_0: 3760000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008d8db_fill_pattern_4_7: 10000 rects
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+caravel_0008d8db_fill_pattern_0_1: 3770000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_4_1: 3580000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_4_7
+caravel_0008d8db_fill_pattern_1_0: 4090000 rects
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+caravel_0008d8db_fill_pattern_0_1: 3850000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_4_1
+caravel_0008d8db_fill_pattern_0_1: 3860000 rects
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+caravel_0008d8db_fill_pattern_1_0: 6580000 rects
+Ended: 01/01/2023 08:52:25
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_1_0: 6590000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008d8db_fill_pattern_1_0: 6870000 rects
+caravel_0008d8db_fill_pattern_5_6: 640000 rects
+caravel_0008d8db_fill_pattern_5_6: 650000 rects
+caravel_0008d8db_fill_pattern_1_0: 6880000 rects
+caravel_0008d8db_fill_pattern_5_6: 660000 rects
+caravel_0008d8db_fill_pattern_1_0: 6890000 rects
+caravel_0008d8db_fill_pattern_5_6: 670000 rects
+caravel_0008d8db_fill_pattern_1_0: 6900000 rects
+caravel_0008d8db_fill_pattern_1_0: 6910000 rects
+caravel_0008d8db_fill_pattern_1_0: 6920000 rects
+caravel_0008d8db_fill_pattern_1_0: 6930000 rects
+caravel_0008d8db_fill_pattern_1_0: 6940000 rects
+caravel_0008d8db_fill_pattern_1_0: 6950000 rects
+caravel_0008d8db_fill_pattern_1_0: 6960000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_5_6
+caravel_0008d8db_fill_pattern_1_0: 6970000 rects
+caravel_0008d8db_fill_pattern_1_0: 6980000 rects
+caravel_0008d8db_fill_pattern_1_0: 6990000 rects
+caravel_0008d8db_fill_pattern_1_0: 7000000 rects
+caravel_0008d8db_fill_pattern_1_0: 7010000 rects
+caravel_0008d8db_fill_pattern_1_0: 7020000 rects
+caravel_0008d8db_fill_pattern_1_0: 7030000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_1_0
+Ended: 01/01/2023 08:52:37
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Ended: 01/01/2023 08:52:38
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_2 geometry by factor of 2
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_1_2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_3_0: 10000 rects
+caravel_0008d8db_fill_pattern_3_0: 20000 rects
+caravel_0008d8db_fill_pattern_3_0: 30000 rects
+caravel_0008d8db_fill_pattern_3_0: 40000 rects
+caravel_0008d8db_fill_pattern_3_0: 50000 rects
+caravel_0008d8db_fill_pattern_3_0: 60000 rects
+caravel_0008d8db_fill_pattern_3_0: 70000 rects
+caravel_0008d8db_fill_pattern_3_0: 80000 rects
+caravel_0008d8db_fill_pattern_3_0: 90000 rects
+caravel_0008d8db_fill_pattern_3_0: 100000 rects
+caravel_0008d8db_fill_pattern_3_0: 110000 rects
+caravel_0008d8db_fill_pattern_3_0: 120000 rects
+caravel_0008d8db_fill_pattern_3_0: 130000 rects
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+caravel_0008d8db_fill_pattern_3_0: 190000 rects
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+caravel_0008d8db_fill_pattern_3_0: 230000 rects
+caravel_0008d8db_fill_pattern_3_0: 240000 rects
+caravel_0008d8db_fill_pattern_3_0: 250000 rects
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+caravel_0008d8db_fill_pattern_3_0: 270000 rects
+caravel_0008d8db_fill_pattern_3_0: 280000 rects
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+caravel_0008d8db_fill_pattern_3_0: 810000 rects
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+caravel_0008d8db_fill_pattern_3_0: 2270000 rects
+caravel_0008d8db_fill_pattern_3_0: 2280000 rects
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+caravel_0008d8db_fill_pattern_3_0: 2330000 rects
+caravel_0008d8db_fill_pattern_3_0: 2340000 rects
+Ended: 01/01/2023 08:52:49
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_3_0: 2350000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_3_0: 2360000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_3_0: 2370000 rects
+caravel_0008d8db_fill_pattern_3_0: 2380000 rects
+caravel_0008d8db_fill_pattern_3_0: 2390000 rects
+caravel_0008d8db_fill_pattern_3_0: 2400000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008d8db_fill_pattern_3_0: 2410000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_3_0: 2420000 rects
+caravel_0008d8db_fill_pattern_2_1: 10000 rects
+caravel_0008d8db_fill_pattern_2_1: 20000 rects
+caravel_0008d8db_fill_pattern_2_1: 30000 rects
+caravel_0008d8db_fill_pattern_3_0: 2430000 rects
+caravel_0008d8db_fill_pattern_2_1: 40000 rects
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+caravel_0008d8db_fill_pattern_2_1: 310000 rects
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+caravel_0008d8db_fill_pattern_2_1: 380000 rects
+caravel_0008d8db_fill_pattern_3_0: 2610000 rects
+caravel_0008d8db_fill_pattern_2_1: 390000 rects
+caravel_0008d8db_fill_pattern_2_1: 400000 rects
+caravel_0008d8db_fill_pattern_3_0: 2620000 rects
+caravel_0008d8db_fill_pattern_2_1: 410000 rects
+caravel_0008d8db_fill_pattern_2_1: 420000 rects
+caravel_0008d8db_fill_pattern_3_0: 2630000 rects
+caravel_0008d8db_fill_pattern_2_1: 430000 rects
+caravel_0008d8db_fill_pattern_2_1: 440000 rects
+caravel_0008d8db_fill_pattern_3_0: 2640000 rects
+caravel_0008d8db_fill_pattern_2_1: 450000 rects
+caravel_0008d8db_fill_pattern_2_1: 460000 rects
+caravel_0008d8db_fill_pattern_3_0: 2650000 rects
+caravel_0008d8db_fill_pattern_2_1: 470000 rects
+caravel_0008d8db_fill_pattern_2_1: 480000 rects
+caravel_0008d8db_fill_pattern_3_0: 2660000 rects
+caravel_0008d8db_fill_pattern_2_1: 490000 rects
+caravel_0008d8db_fill_pattern_2_1: 500000 rects
+caravel_0008d8db_fill_pattern_3_0: 2670000 rects
+caravel_0008d8db_fill_pattern_2_1: 510000 rects
+caravel_0008d8db_fill_pattern_2_1: 520000 rects
+caravel_0008d8db_fill_pattern_3_0: 2680000 rects
+caravel_0008d8db_fill_pattern_2_1: 530000 rects
+caravel_0008d8db_fill_pattern_2_1: 540000 rects
+caravel_0008d8db_fill_pattern_3_0: 2690000 rects
+Ended: 01/01/2023 08:52:52
+caravel_0008d8db_fill_pattern_2_1: 550000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_2_1: 560000 rects
+caravel_0008d8db_fill_pattern_3_0: 2700000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_2_1: 570000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_2_1: 580000 rects
+caravel_0008d8db_fill_pattern_3_0: 2710000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_2_1: 590000 rects
+caravel_0008d8db_fill_pattern_2_1: 600000 rects
+caravel_0008d8db_fill_pattern_3_0: 2720000 rects
+caravel_0008d8db_fill_pattern_2_1: 610000 rects
+caravel_0008d8db_fill_pattern_2_1: 620000 rects
+caravel_0008d8db_fill_pattern_3_0: 2730000 rects
+caravel_0008d8db_fill_pattern_2_1: 630000 rects
+caravel_0008d8db_fill_pattern_2_1: 640000 rects
+caravel_0008d8db_fill_pattern_3_0: 2740000 rects
+caravel_0008d8db_fill_pattern_2_1: 650000 rects
+caravel_0008d8db_fill_pattern_3_0: 2750000 rects
+caravel_0008d8db_fill_pattern_2_1: 660000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+caravel_0008d8db_fill_pattern_2_1: 670000 rects
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_3_0: 2760000 rects
+caravel_0008d8db_fill_pattern_2_1: 680000 rects
+caravel_0008d8db_fill_pattern_0_3: 10000 rects
+caravel_0008d8db_fill_pattern_2_1: 690000 rects
+caravel_0008d8db_fill_pattern_0_3: 20000 rects
+caravel_0008d8db_fill_pattern_2_1: 700000 rects
+caravel_0008d8db_fill_pattern_3_0: 2770000 rects
+caravel_0008d8db_fill_pattern_0_3: 30000 rects
+caravel_0008d8db_fill_pattern_2_1: 710000 rects
+caravel_0008d8db_fill_pattern_0_3: 40000 rects
+caravel_0008d8db_fill_pattern_0_3: 50000 rects
+caravel_0008d8db_fill_pattern_2_1: 720000 rects
+caravel_0008d8db_fill_pattern_3_0: 2780000 rects
+caravel_0008d8db_fill_pattern_0_3: 60000 rects
+caravel_0008d8db_fill_pattern_2_1: 730000 rects
+caravel_0008d8db_fill_pattern_0_3: 70000 rects
+caravel_0008d8db_fill_pattern_2_1: 740000 rects
+caravel_0008d8db_fill_pattern_0_3: 80000 rects
+caravel_0008d8db_fill_pattern_3_0: 2790000 rects
+caravel_0008d8db_fill_pattern_2_1: 750000 rects
+caravel_0008d8db_fill_pattern_0_3: 90000 rects
+caravel_0008d8db_fill_pattern_2_1: 760000 rects
+caravel_0008d8db_fill_pattern_0_3: 100000 rects
+caravel_0008d8db_fill_pattern_0_3: 110000 rects
+caravel_0008d8db_fill_pattern_3_0: 2800000 rects
+caravel_0008d8db_fill_pattern_2_1: 770000 rects
+caravel_0008d8db_fill_pattern_2_1: 780000 rects
+caravel_0008d8db_fill_pattern_0_3: 120000 rects
+caravel_0008d8db_fill_pattern_3_0: 2810000 rects
+caravel_0008d8db_fill_pattern_2_1: 790000 rects
+caravel_0008d8db_fill_pattern_0_3: 130000 rects
+caravel_0008d8db_fill_pattern_0_3: 140000 rects
+caravel_0008d8db_fill_pattern_2_1: 800000 rects
+caravel_0008d8db_fill_pattern_3_0: 2820000 rects
+caravel_0008d8db_fill_pattern_0_3: 150000 rects
+caravel_0008d8db_fill_pattern_2_1: 810000 rects
+caravel_0008d8db_fill_pattern_0_3: 160000 rects
+caravel_0008d8db_fill_pattern_3_0: 2830000 rects
+caravel_0008d8db_fill_pattern_2_1: 820000 rects
+caravel_0008d8db_fill_pattern_0_3: 170000 rects
+caravel_0008d8db_fill_pattern_2_1: 830000 rects
+caravel_0008d8db_fill_pattern_3_0: 2840000 rects
+caravel_0008d8db_fill_pattern_0_3: 180000 rects
+caravel_0008d8db_fill_pattern_2_1: 840000 rects
+caravel_0008d8db_fill_pattern_0_3: 190000 rects
+caravel_0008d8db_fill_pattern_3_0: 2850000 rects
+caravel_0008d8db_fill_pattern_2_1: 850000 rects
+caravel_0008d8db_fill_pattern_0_3: 200000 rects
+caravel_0008d8db_fill_pattern_2_1: 860000 rects
+caravel_0008d8db_fill_pattern_0_3: 210000 rects
+caravel_0008d8db_fill_pattern_3_0: 2860000 rects
+caravel_0008d8db_fill_pattern_2_1: 870000 rects
+caravel_0008d8db_fill_pattern_2_1: 880000 rects
+caravel_0008d8db_fill_pattern_0_3: 220000 rects
+caravel_0008d8db_fill_pattern_2_1: 890000 rects
+caravel_0008d8db_fill_pattern_3_0: 2870000 rects
+caravel_0008d8db_fill_pattern_0_3: 230000 rects
+caravel_0008d8db_fill_pattern_2_1: 900000 rects
+caravel_0008d8db_fill_pattern_2_1: 910000 rects
+caravel_0008d8db_fill_pattern_3_0: 2880000 rects
+caravel_0008d8db_fill_pattern_0_3: 240000 rects
+caravel_0008d8db_fill_pattern_2_1: 920000 rects
+caravel_0008d8db_fill_pattern_0_3: 250000 rects
+caravel_0008d8db_fill_pattern_2_1: 930000 rects
+caravel_0008d8db_fill_pattern_3_0: 2890000 rects
+caravel_0008d8db_fill_pattern_0_3: 260000 rects
+caravel_0008d8db_fill_pattern_2_1: 940000 rects
+caravel_0008d8db_fill_pattern_0_3: 270000 rects
+caravel_0008d8db_fill_pattern_2_1: 950000 rects
+caravel_0008d8db_fill_pattern_3_0: 2900000 rects
+caravel_0008d8db_fill_pattern_2_1: 960000 rects
+caravel_0008d8db_fill_pattern_0_3: 280000 rects
+caravel_0008d8db_fill_pattern_2_1: 970000 rects
+caravel_0008d8db_fill_pattern_0_3: 290000 rects
+caravel_0008d8db_fill_pattern_3_0: 2910000 rects
+caravel_0008d8db_fill_pattern_2_1: 980000 rects
+caravel_0008d8db_fill_pattern_0_3: 300000 rects
+caravel_0008d8db_fill_pattern_2_1: 990000 rects
+caravel_0008d8db_fill_pattern_3_0: 2920000 rects
+caravel_0008d8db_fill_pattern_0_3: 310000 rects
+caravel_0008d8db_fill_pattern_2_1: 1000000 rects
+caravel_0008d8db_fill_pattern_2_1: 1010000 rects
+caravel_0008d8db_fill_pattern_0_3: 320000 rects
+caravel_0008d8db_fill_pattern_3_0: 2930000 rects
+caravel_0008d8db_fill_pattern_2_1: 1020000 rects
+caravel_0008d8db_fill_pattern_0_3: 330000 rects
+caravel_0008d8db_fill_pattern_2_1: 1030000 rects
+caravel_0008d8db_fill_pattern_2_1: 1040000 rects
+caravel_0008d8db_fill_pattern_3_0: 2940000 rects
+Ended: 01/01/2023 08:52:54
+caravel_0008d8db_fill_pattern_2_1: 1050000 rects
+caravel_0008d8db_fill_pattern_0_3: 340000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_2_1: 1060000 rects
+caravel_0008d8db_fill_pattern_3_0: 2950000 rects
+caravel_0008d8db_fill_pattern_2_1: 1070000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_0_3: 350000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_2_1: 1080000 rects
+caravel_0008d8db_fill_pattern_2_1: 1090000 rects
+caravel_0008d8db_fill_pattern_3_0: 2960000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_0_3: 360000 rects
+caravel_0008d8db_fill_pattern_2_1: 1100000 rects
+caravel_0008d8db_fill_pattern_2_1: 1110000 rects
+caravel_0008d8db_fill_pattern_0_3: 370000 rects
+caravel_0008d8db_fill_pattern_3_0: 2970000 rects
+caravel_0008d8db_fill_pattern_2_1: 1120000 rects
+caravel_0008d8db_fill_pattern_3_0: 2980000 rects
+caravel_0008d8db_fill_pattern_0_3: 380000 rects
+caravel_0008d8db_fill_pattern_2_1: 1130000 rects
+caravel_0008d8db_fill_pattern_2_1: 1140000 rects
+caravel_0008d8db_fill_pattern_3_0: 2990000 rects
+caravel_0008d8db_fill_pattern_0_3: 390000 rects
+caravel_0008d8db_fill_pattern_2_1: 1150000 rects
+caravel_0008d8db_fill_pattern_3_0: 3000000 rects
+Ended: 01/01/2023 08:52:54
+caravel_0008d8db_fill_pattern_0_3: 400000 rects
+caravel_0008d8db_fill_pattern_2_1: 1160000 rects
+caravel_0008d8db_fill_pattern_3_0: 3010000 rects
+caravel_0008d8db_fill_pattern_2_1: 1170000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_3_0: 3020000 rects
+caravel_0008d8db_fill_pattern_0_3: 410000 rects
+caravel_0008d8db_fill_pattern_2_1: 1180000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Processing system .magicrc file
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_3_0: 3030000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_2_1: 1190000 rects
+caravel_0008d8db_fill_pattern_3_0: 3040000 rects
+caravel_0008d8db_fill_pattern_0_3: 420000 rects
+caravel_0008d8db_fill_pattern_2_1: 1200000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_3_0: 3050000 rects
+caravel_0008d8db_fill_pattern_2_1: 1210000 rects
+caravel_0008d8db_fill_pattern_0_3: 430000 rects
+caravel_0008d8db_fill_pattern_3_0: 3060000 rects
+caravel_0008d8db_fill_pattern_2_1: 1220000 rects
+caravel_0008d8db_fill_pattern_2_4: 10000 rects
+caravel_0008d8db_fill_pattern_3_0: 3070000 rects
+caravel_0008d8db_fill_pattern_2_4: 20000 rects
+caravel_0008d8db_fill_pattern_2_1: 1230000 rects
+Ended: 01/01/2023 08:52:55
+caravel_0008d8db_fill_pattern_0_3: 440000 rects
+caravel_0008d8db_fill_pattern_3_0: 3080000 rects
+caravel_0008d8db_fill_pattern_2_4: 30000 rects
+caravel_0008d8db_fill_pattern_2_1: 1240000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_2_4: 40000 rects
+caravel_0008d8db_fill_pattern_3_0: 3090000 rects
+caravel_0008d8db_fill_pattern_2_1: 1250000 rects
+caravel_0008d8db_fill_pattern_2_4: 50000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_3_0: 3100000 rects
+caravel_0008d8db_fill_pattern_0_3: 450000 rects
+caravel_0008d8db_fill_pattern_2_4: 60000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_2_1: 1260000 rects
+caravel_0008d8db_fill_pattern_3_0: 3110000 rects
+caravel_0008d8db_fill_pattern_2_4: 70000 rects
+caravel_0008d8db_fill_pattern_2_1: 1270000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_2_4: 80000 rects
+caravel_0008d8db_fill_pattern_0_3: 460000 rects
+caravel_0008d8db_fill_pattern_3_0: 3120000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_2_4: 90000 rects
+caravel_0008d8db_fill_pattern_2_1: 1280000 rects
+caravel_0008d8db_fill_pattern_3_0: 3130000 rects
+caravel_0008d8db_fill_pattern_0_3: 470000 rects
+caravel_0008d8db_fill_pattern_2_4: 100000 rects
+caravel_0008d8db_fill_pattern_3_0: 3140000 rects
+caravel_0008d8db_fill_pattern_4_2: 10000 rects
+caravel_0008d8db_fill_pattern_2_4: 110000 rects
+caravel_0008d8db_fill_pattern_2_1: 1290000 rects
+caravel_0008d8db_fill_pattern_4_2: 20000 rects
+caravel_0008d8db_fill_pattern_3_0: 3150000 rects
+caravel_0008d8db_fill_pattern_2_4: 120000 rects
+caravel_0008d8db_fill_pattern_0_3: 480000 rects
+caravel_0008d8db_fill_pattern_4_2: 30000 rects
+caravel_0008d8db_fill_pattern_2_1: 1300000 rects
+caravel_0008d8db_fill_pattern_2_4: 130000 rects
+caravel_0008d8db_fill_pattern_3_0: 3160000 rects
+caravel_0008d8db_fill_pattern_4_2: 40000 rects
+caravel_0008d8db_fill_pattern_2_1: 1310000 rects
+caravel_0008d8db_fill_pattern_2_4: 140000 rects
+caravel_0008d8db_fill_pattern_4_2: 50000 rects
+caravel_0008d8db_fill_pattern_3_0: 3170000 rects
+caravel_0008d8db_fill_pattern_0_3: 490000 rects
+caravel_0008d8db_fill_pattern_2_4: 150000 rects
+caravel_0008d8db_fill_pattern_4_2: 60000 rects
+caravel_0008d8db_fill_pattern_2_1: 1320000 rects
+caravel_0008d8db_fill_pattern_3_0: 3180000 rects
+caravel_0008d8db_fill_pattern_2_4: 160000 rects
+caravel_0008d8db_fill_pattern_4_2: 70000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008d8db_fill_pattern_2_1: 1330000 rects
+caravel_0008d8db_fill_pattern_0_3: 500000 rects
+caravel_0008d8db_fill_pattern_3_0: 3190000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+caravel_0008d8db_fill_pattern_2_4: 170000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_4_2: 80000 rects
+caravel_0008d8db_fill_pattern_2_1: 1340000 rects
+caravel_0008d8db_fill_pattern_2_4: 180000 rects
+caravel_0008d8db_fill_pattern_3_0: 3200000 rects
+caravel_0008d8db_fill_pattern_4_2: 90000 rects
+caravel_0008d8db_fill_pattern_0_6: 10000 rects
+caravel_0008d8db_fill_pattern_0_3: 510000 rects
+caravel_0008d8db_fill_pattern_2_4: 190000 rects
+caravel_0008d8db_fill_pattern_2_1: 1350000 rects
+caravel_0008d8db_fill_pattern_0_6: 20000 rects
+caravel_0008d8db_fill_pattern_3_0: 3210000 rects
+caravel_0008d8db_fill_pattern_4_2: 100000 rects
+caravel_0008d8db_fill_pattern_2_4: 200000 rects
+caravel_0008d8db_fill_pattern_0_6: 30000 rects
+caravel_0008d8db_fill_pattern_2_1: 1360000 rects
+caravel_0008d8db_fill_pattern_4_2: 110000 rects
+caravel_0008d8db_fill_pattern_3_0: 3220000 rects
+caravel_0008d8db_fill_pattern_2_4: 210000 rects
+caravel_0008d8db_fill_pattern_0_6: 40000 rects
+caravel_0008d8db_fill_pattern_0_3: 520000 rects
+caravel_0008d8db_fill_pattern_0_6: 50000 rects
+caravel_0008d8db_fill_pattern_2_4: 220000 rects
+caravel_0008d8db_fill_pattern_4_2: 120000 rects
+caravel_0008d8db_fill_pattern_3_0: 3230000 rects
+caravel_0008d8db_fill_pattern_2_1: 1370000 rects
+caravel_0008d8db_fill_pattern_0_6: 60000 rects
+caravel_0008d8db_fill_pattern_2_4: 230000 rects
+caravel_0008d8db_fill_pattern_4_2: 130000 rects
+caravel_0008d8db_fill_pattern_0_6: 70000 rects
+caravel_0008d8db_fill_pattern_3_0: 3240000 rects
+caravel_0008d8db_fill_pattern_0_3: 530000 rects
+caravel_0008d8db_fill_pattern_2_1: 1380000 rects
+caravel_0008d8db_fill_pattern_2_4: 240000 rects
+caravel_0008d8db_fill_pattern_0_6: 80000 rects
+caravel_0008d8db_fill_pattern_4_2: 140000 rects
+caravel_0008d8db_fill_pattern_2_1: 1390000 rects
+caravel_0008d8db_fill_pattern_0_6: 90000 rects
+caravel_0008d8db_fill_pattern_0_3: 540000 rects
+caravel_0008d8db_fill_pattern_2_4: 250000 rects
+caravel_0008d8db_fill_pattern_4_2: 150000 rects
+caravel_0008d8db_fill_pattern_0_6: 100000 rects
+caravel_0008d8db_fill_pattern_2_4: 260000 rects
+caravel_0008d8db_fill_pattern_0_3: 550000 rects
+caravel_0008d8db_fill_pattern_2_1: 1400000 rects
+caravel_0008d8db_fill_pattern_2_4: 270000 rects
+caravel_0008d8db_fill_pattern_0_6: 110000 rects
+caravel_0008d8db_fill_pattern_4_2: 160000 rects
+caravel_0008d8db_fill_pattern_0_3: 560000 rects
+caravel_0008d8db_fill_pattern_2_4: 280000 rects
+caravel_0008d8db_fill_pattern_2_1: 1410000 rects
+caravel_0008d8db_fill_pattern_3_0: 3250000 rects
+caravel_0008d8db_fill_pattern_0_3: 570000 rects
+caravel_0008d8db_fill_pattern_0_6: 120000 rects
+caravel_0008d8db_fill_pattern_4_2: 170000 rects
+caravel_0008d8db_fill_pattern_2_4: 290000 rects
+caravel_0008d8db_fill_pattern_2_1: 1420000 rects
+caravel_0008d8db_fill_pattern_0_3: 580000 rects
+caravel_0008d8db_fill_pattern_0_6: 130000 rects
+caravel_0008d8db_fill_pattern_4_2: 180000 rects
+caravel_0008d8db_fill_pattern_2_4: 300000 rects
+caravel_0008d8db_fill_pattern_2_1: 1430000 rects
+caravel_0008d8db_fill_pattern_0_3: 590000 rects
+caravel_0008d8db_fill_pattern_2_4: 310000 rects
+caravel_0008d8db_fill_pattern_0_6: 140000 rects
+caravel_0008d8db_fill_pattern_4_2: 190000 rects
+caravel_0008d8db_fill_pattern_2_4: 320000 rects
+caravel_0008d8db_fill_pattern_2_1: 1440000 rects
+caravel_0008d8db_fill_pattern_0_3: 600000 rects
+caravel_0008d8db_fill_pattern_0_6: 150000 rects
+caravel_0008d8db_fill_pattern_2_4: 330000 rects
+caravel_0008d8db_fill_pattern_4_2: 200000 rects
+caravel_0008d8db_fill_pattern_3_0: 3260000 rects
+caravel_0008d8db_fill_pattern_2_1: 1450000 rects
+caravel_0008d8db_fill_pattern_0_3: 610000 rects
+caravel_0008d8db_fill_pattern_2_4: 340000 rects
+caravel_0008d8db_fill_pattern_0_6: 160000 rects
+caravel_0008d8db_fill_pattern_4_2: 210000 rects
+caravel_0008d8db_fill_pattern_2_1: 1460000 rects
+caravel_0008d8db_fill_pattern_0_3: 620000 rects
+caravel_0008d8db_fill_pattern_2_4: 350000 rects
+caravel_0008d8db_fill_pattern_2_1: 1470000 rects
+caravel_0008d8db_fill_pattern_0_6: 170000 rects
+caravel_0008d8db_fill_pattern_0_3: 630000 rects
+caravel_0008d8db_fill_pattern_4_2: 220000 rects
+caravel_0008d8db_fill_pattern_2_4: 360000 rects
+caravel_0008d8db_fill_pattern_2_1: 1480000 rects
+caravel_0008d8db_fill_pattern_0_6: 180000 rects
+caravel_0008d8db_fill_pattern_2_4: 370000 rects
+caravel_0008d8db_fill_pattern_0_3: 640000 rects
+caravel_0008d8db_fill_pattern_4_2: 230000 rects
+caravel_0008d8db_fill_pattern_3_0: 3270000 rects
+caravel_0008d8db_fill_pattern_2_1: 1490000 rects
+caravel_0008d8db_fill_pattern_2_4: 380000 rects
+caravel_0008d8db_fill_pattern_0_6: 190000 rects
+caravel_0008d8db_fill_pattern_0_3: 650000 rects
+caravel_0008d8db_fill_pattern_2_1: 1500000 rects
+caravel_0008d8db_fill_pattern_4_2: 240000 rects
+caravel_0008d8db_fill_pattern_2_4: 390000 rects
+caravel_0008d8db_fill_pattern_0_3: 660000 rects
+caravel_0008d8db_fill_pattern_0_6: 200000 rects
+caravel_0008d8db_fill_pattern_2_4: 400000 rects
+caravel_0008d8db_fill_pattern_2_1: 1510000 rects
+caravel_0008d8db_fill_pattern_0_3: 670000 rects
+caravel_0008d8db_fill_pattern_4_2: 250000 rects
+caravel_0008d8db_fill_pattern_3_0: 3280000 rects
+caravel_0008d8db_fill_pattern_2_1: 1520000 rects
+caravel_0008d8db_fill_pattern_2_4: 410000 rects
+caravel_0008d8db_fill_pattern_0_6: 210000 rects
+caravel_0008d8db_fill_pattern_0_3: 680000 rects
+caravel_0008d8db_fill_pattern_2_1: 1530000 rects
+caravel_0008d8db_fill_pattern_0_6: 220000 rects
+caravel_0008d8db_fill_pattern_2_4: 420000 rects
+caravel_0008d8db_fill_pattern_0_3: 690000 rects
+caravel_0008d8db_fill_pattern_4_2: 260000 rects
+caravel_0008d8db_fill_pattern_0_6: 230000 rects
+caravel_0008d8db_fill_pattern_2_4: 430000 rects
+caravel_0008d8db_fill_pattern_2_1: 1540000 rects
+caravel_0008d8db_fill_pattern_0_3: 700000 rects
+caravel_0008d8db_fill_pattern_3_0: 3290000 rects
+caravel_0008d8db_fill_pattern_4_2: 270000 rects
+caravel_0008d8db_fill_pattern_2_4: 440000 rects
+caravel_0008d8db_fill_pattern_0_6: 240000 rects
+caravel_0008d8db_fill_pattern_0_3: 710000 rects
+caravel_0008d8db_fill_pattern_2_1: 1550000 rects
+caravel_0008d8db_fill_pattern_0_6: 250000 rects
+caravel_0008d8db_fill_pattern_2_4: 450000 rects
+caravel_0008d8db_fill_pattern_4_2: 280000 rects
+caravel_0008d8db_fill_pattern_0_6: 260000 rects
+caravel_0008d8db_fill_pattern_0_3: 720000 rects
+caravel_0008d8db_fill_pattern_2_4: 460000 rects
+caravel_0008d8db_fill_pattern_2_1: 1560000 rects
+caravel_0008d8db_fill_pattern_0_6: 270000 rects
+caravel_0008d8db_fill_pattern_2_4: 470000 rects
+caravel_0008d8db_fill_pattern_4_2: 290000 rects
+caravel_0008d8db_fill_pattern_3_0: 3300000 rects
+caravel_0008d8db_fill_pattern_0_3: 730000 rects
+caravel_0008d8db_fill_pattern_0_6: 280000 rects
+caravel_0008d8db_fill_pattern_2_1: 1570000 rects
+caravel_0008d8db_fill_pattern_2_4: 480000 rects
+caravel_0008d8db_fill_pattern_4_2: 300000 rects
+caravel_0008d8db_fill_pattern_0_6: 290000 rects
+caravel_0008d8db_fill_pattern_0_3: 740000 rects
+caravel_0008d8db_fill_pattern_2_4: 490000 rects
+caravel_0008d8db_fill_pattern_0_6: 300000 rects
+caravel_0008d8db_fill_pattern_2_1: 1580000 rects
+caravel_0008d8db_fill_pattern_4_2: 310000 rects
+caravel_0008d8db_fill_pattern_0_3: 750000 rects
+caravel_0008d8db_fill_pattern_3_0: 3310000 rects
+caravel_0008d8db_fill_pattern_2_1: 1590000 rects
+caravel_0008d8db_fill_pattern_2_4: 500000 rects
+caravel_0008d8db_fill_pattern_0_6: 310000 rects
+caravel_0008d8db_fill_pattern_4_2: 320000 rects
+caravel_0008d8db_fill_pattern_2_1: 1600000 rects
+caravel_0008d8db_fill_pattern_0_3: 760000 rects
+caravel_0008d8db_fill_pattern_2_4: 510000 rects
+caravel_0008d8db_fill_pattern_2_1: 1610000 rects
+caravel_0008d8db_fill_pattern_0_6: 320000 rects
+caravel_0008d8db_fill_pattern_2_4: 520000 rects
+caravel_0008d8db_fill_pattern_4_2: 330000 rects
+caravel_0008d8db_fill_pattern_0_3: 770000 rects
+caravel_0008d8db_fill_pattern_2_1: 1620000 rects
+caravel_0008d8db_fill_pattern_3_0: 3320000 rects
+caravel_0008d8db_fill_pattern_2_4: 530000 rects
+caravel_0008d8db_fill_pattern_0_3: 780000 rects
+caravel_0008d8db_fill_pattern_0_6: 330000 rects
+Ended: 01/01/2023 08:52:57
+caravel_0008d8db_fill_pattern_4_2: 340000 rects
+caravel_0008d8db_fill_pattern_2_4: 540000 rects
+caravel_0008d8db_fill_pattern_2_1: 1630000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_2_4: 550000 rects
+caravel_0008d8db_fill_pattern_0_3: 790000 rects
+caravel_0008d8db_fill_pattern_0_6: 340000 rects
+caravel_0008d8db_fill_pattern_4_2: 350000 rects
+caravel_0008d8db_fill_pattern_2_1: 1640000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_2_4: 560000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_3_0: 3330000 rects
+caravel_0008d8db_fill_pattern_0_3: 800000 rects
+caravel_0008d8db_fill_pattern_2_1: 1650000 rects
+caravel_0008d8db_fill_pattern_2_4: 570000 rects
+caravel_0008d8db_fill_pattern_0_6: 350000 rects
+caravel_0008d8db_fill_pattern_4_2: 360000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_2_1: 1660000 rects
+caravel_0008d8db_fill_pattern_2_4: 580000 rects
+caravel_0008d8db_fill_pattern_0_3: 810000 rects
+caravel_0008d8db_fill_pattern_0_6: 360000 rects
+caravel_0008d8db_fill_pattern_2_4: 590000 rects
+caravel_0008d8db_fill_pattern_2_1: 1670000 rects
+caravel_0008d8db_fill_pattern_4_2: 370000 rects
+caravel_0008d8db_fill_pattern_0_3: 820000 rects
+caravel_0008d8db_fill_pattern_3_0: 3340000 rects
+caravel_0008d8db_fill_pattern_2_4: 600000 rects
+caravel_0008d8db_fill_pattern_2_1: 1680000 rects
+caravel_0008d8db_fill_pattern_0_6: 370000 rects
+caravel_0008d8db_fill_pattern_0_3: 830000 rects
+caravel_0008d8db_fill_pattern_2_4: 610000 rects
+caravel_0008d8db_fill_pattern_4_2: 380000 rects
+caravel_0008d8db_fill_pattern_0_3: 840000 rects
+caravel_0008d8db_fill_pattern_2_4: 620000 rects
+caravel_0008d8db_fill_pattern_2_1: 1690000 rects
+caravel_0008d8db_fill_pattern_0_6: 380000 rects
+caravel_0008d8db_fill_pattern_0_3: 850000 rects
+caravel_0008d8db_fill_pattern_4_2: 390000 rects
+caravel_0008d8db_fill_pattern_2_4: 630000 rects
+caravel_0008d8db_fill_pattern_0_3: 860000 rects
+caravel_0008d8db_fill_pattern_3_0: 3350000 rects
+caravel_0008d8db_fill_pattern_4_2: 400000 rects
+caravel_0008d8db_fill_pattern_2_4: 640000 rects
+caravel_0008d8db_fill_pattern_2_1: 1700000 rects
+caravel_0008d8db_fill_pattern_0_3: 870000 rects
+caravel_0008d8db_fill_pattern_0_6: 390000 rects
+caravel_0008d8db_fill_pattern_4_2: 410000 rects
+caravel_0008d8db_fill_pattern_2_4: 650000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008d8db_fill_pattern_0_3: 880000 rects
+caravel_0008d8db_fill_pattern_2_4: 660000 rects
+caravel_0008d8db_fill_pattern_4_2: 420000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled magic input cell caravel_0008d8db_fill_pattern_3_3 geometry by factor of 2
+caravel_0008d8db_fill_pattern_0_6: 400000 rects
+caravel_0008d8db_fill_pattern_0_3: 890000 rects
+caravel_0008d8db_fill_pattern_2_4: 670000 rects
+caravel_0008d8db_fill_pattern_4_2: 430000 rects
+caravel_0008d8db_fill_pattern_2_1: 1710000 rects
+caravel_0008d8db_fill_pattern_0_3: 900000 rects
+caravel_0008d8db_fill_pattern_3_0: 3360000 rects
+caravel_0008d8db_fill_pattern_2_4: 680000 rects
+caravel_0008d8db_fill_pattern_4_2: 440000 rects
+caravel_0008d8db_fill_pattern_0_3: 910000 rects
+caravel_0008d8db_fill_pattern_0_6: 410000 rects
+caravel_0008d8db_fill_pattern_2_4: 690000 rects
+caravel_0008d8db_fill_pattern_4_2: 450000 rects
+caravel_0008d8db_fill_pattern_0_3: 920000 rects
+caravel_0008d8db_fill_pattern_2_4: 700000 rects
+caravel_0008d8db_fill_pattern_4_2: 460000 rects
+caravel_0008d8db_fill_pattern_0_3: 930000 rects
+caravel_0008d8db_fill_pattern_2_1: 1720000 rects
+caravel_0008d8db_fill_pattern_0_6: 420000 rects
+caravel_0008d8db_fill_pattern_4_2: 470000 rects
+caravel_0008d8db_fill_pattern_2_4: 710000 rects
+caravel_0008d8db_fill_pattern_3_0: 3370000 rects
+caravel_0008d8db_fill_pattern_0_3: 940000 rects
+caravel_0008d8db_fill_pattern_4_2: 480000 rects
+caravel_0008d8db_fill_pattern_2_4: 720000 rects
+caravel_0008d8db_fill_pattern_0_6: 430000 rects
+caravel_0008d8db_fill_pattern_2_4: 730000 rects
+caravel_0008d8db_fill_pattern_0_3: 950000 rects
+caravel_0008d8db_fill_pattern_0_6: 440000 rects
+caravel_0008d8db_fill_pattern_2_1: 1730000 rects
+caravel_0008d8db_fill_pattern_2_4: 740000 rects
+caravel_0008d8db_fill_pattern_2_4: 750000 rects
+caravel_0008d8db_fill_pattern_0_3: 960000 rects
+caravel_0008d8db_fill_pattern_3_0: 3380000 rects
+caravel_0008d8db_fill_pattern_0_6: 450000 rects
+caravel_0008d8db_fill_pattern_2_4: 760000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_2_1: 1740000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_3_3
+caravel_0008d8db_fill_pattern_2_4: 770000 rects
+caravel_0008d8db_fill_pattern_0_3: 970000 rects
+caravel_0008d8db_fill_pattern_0_6: 460000 rects
+caravel_0008d8db_fill_pattern_2_4: 780000 rects
+caravel_0008d8db_fill_pattern_0_3: 980000 rects
+caravel_0008d8db_fill_pattern_2_1: 1750000 rects
+caravel_0008d8db_fill_pattern_3_0: 3390000 rects
+caravel_0008d8db_fill_pattern_0_6: 470000 rects
+caravel_0008d8db_fill_pattern_0_3: 990000 rects
+caravel_0008d8db_fill_pattern_2_1: 1760000 rects
+caravel_0008d8db_fill_pattern_0_3: 1000000 rects
+caravel_0008d8db_fill_pattern_2_4: 790000 rects
+caravel_0008d8db_fill_pattern_0_6: 480000 rects
+caravel_0008d8db_fill_pattern_2_1: 1770000 rects
+caravel_0008d8db_fill_pattern_0_3: 1010000 rects
+caravel_0008d8db_fill_pattern_0_6: 490000 rects
+caravel_0008d8db_fill_pattern_3_0: 3400000 rects
+caravel_0008d8db_fill_pattern_2_1: 1780000 rects
+caravel_0008d8db_fill_pattern_0_3: 1020000 rects
+caravel_0008d8db_fill_pattern_0_6: 500000 rects
+caravel_0008d8db_fill_pattern_0_3: 1030000 rects
+caravel_0008d8db_fill_pattern_2_4: 800000 rects
+caravel_0008d8db_fill_pattern_2_1: 1790000 rects
+caravel_0008d8db_fill_pattern_0_6: 510000 rects
+caravel_0008d8db_fill_pattern_0_3: 1040000 rects
+caravel_0008d8db_fill_pattern_0_6: 520000 rects
+caravel_0008d8db_fill_pattern_0_3: 1050000 rects
+caravel_0008d8db_fill_pattern_2_1: 1800000 rects
+caravel_0008d8db_fill_pattern_0_6: 530000 rects
+caravel_0008d8db_fill_pattern_0_3: 1060000 rects
+caravel_0008d8db_fill_pattern_3_0: 3410000 rects
+caravel_0008d8db_fill_pattern_2_1: 1810000 rects
+caravel_0008d8db_fill_pattern_2_4: 810000 rects
+caravel_0008d8db_fill_pattern_0_6: 540000 rects
+caravel_0008d8db_fill_pattern_0_3: 1070000 rects
+caravel_0008d8db_fill_pattern_0_6: 550000 rects
+caravel_0008d8db_fill_pattern_2_1: 1820000 rects
+caravel_0008d8db_fill_pattern_0_6: 560000 rects
+caravel_0008d8db_fill_pattern_2_1: 1830000 rects
+caravel_0008d8db_fill_pattern_0_6: 570000 rects
+caravel_0008d8db_fill_pattern_0_3: 1080000 rects
+caravel_0008d8db_fill_pattern_2_4: 820000 rects
+caravel_0008d8db_fill_pattern_0_6: 580000 rects
+caravel_0008d8db_fill_pattern_3_0: 3420000 rects
+caravel_0008d8db_fill_pattern_2_1: 1840000 rects
+caravel_0008d8db_fill_pattern_4_2: 490000 rects
+caravel_0008d8db_fill_pattern_0_3: 1090000 rects
+caravel_0008d8db_fill_pattern_0_6: 590000 rects
+caravel_0008d8db_fill_pattern_2_1: 1850000 rects
+caravel_0008d8db_fill_pattern_0_6: 600000 rects
+caravel_0008d8db_fill_pattern_2_4: 830000 rects
+caravel_0008d8db_fill_pattern_0_3: 1100000 rects
+caravel_0008d8db_fill_pattern_0_6: 610000 rects
+caravel_0008d8db_fill_pattern_2_1: 1860000 rects
+caravel_0008d8db_fill_pattern_0_3: 1110000 rects
+caravel_0008d8db_fill_pattern_0_6: 620000 rects
+caravel_0008d8db_fill_pattern_3_0: 3430000 rects
+caravel_0008d8db_fill_pattern_4_2: 500000 rects
+caravel_0008d8db_fill_pattern_2_1: 1870000 rects
+caravel_0008d8db_fill_pattern_0_3: 1120000 rects
+caravel_0008d8db_fill_pattern_0_6: 630000 rects
+caravel_0008d8db_fill_pattern_2_4: 840000 rects
+caravel_0008d8db_fill_pattern_2_1: 1880000 rects
+caravel_0008d8db_fill_pattern_4_2: 510000 rects
+caravel_0008d8db_fill_pattern_0_6: 640000 rects
+caravel_0008d8db_fill_pattern_0_3: 1130000 rects
+caravel_0008d8db_fill_pattern_2_1: 1890000 rects
+caravel_0008d8db_fill_pattern_0_6: 650000 rects
+caravel_0008d8db_fill_pattern_4_2: 520000 rects
+caravel_0008d8db_fill_pattern_3_0: 3440000 rects
+caravel_0008d8db_fill_pattern_2_1: 1900000 rects
+caravel_0008d8db_fill_pattern_2_4: 850000 rects
+caravel_0008d8db_fill_pattern_0_6: 660000 rects
+caravel_0008d8db_fill_pattern_4_2: 530000 rects
+caravel_0008d8db_fill_pattern_0_3: 1140000 rects
+caravel_0008d8db_fill_pattern_2_1: 1910000 rects
+caravel_0008d8db_fill_pattern_0_6: 670000 rects
+caravel_0008d8db_fill_pattern_2_1: 1920000 rects
+caravel_0008d8db_fill_pattern_3_0: 3450000 rects
+caravel_0008d8db_fill_pattern_4_2: 540000 rects
+caravel_0008d8db_fill_pattern_2_4: 860000 rects
+caravel_0008d8db_fill_pattern_0_6: 680000 rects
+caravel_0008d8db_fill_pattern_2_1: 1930000 rects
+caravel_0008d8db_fill_pattern_0_3: 1150000 rects
+caravel_0008d8db_fill_pattern_4_2: 550000 rects
+caravel_0008d8db_fill_pattern_0_6: 690000 rects
+caravel_0008d8db_fill_pattern_2_1: 1940000 rects
+caravel_0008d8db_fill_pattern_0_3: 1160000 rects
+caravel_0008d8db_fill_pattern_0_3: 1170000 rects
+caravel_0008d8db_fill_pattern_2_4: 870000 rects
+caravel_0008d8db_fill_pattern_2_1: 1950000 rects
+caravel_0008d8db_fill_pattern_4_2: 560000 rects
+caravel_0008d8db_fill_pattern_3_0: 3460000 rects
+caravel_0008d8db_fill_pattern_0_6: 700000 rects
+caravel_0008d8db_fill_pattern_2_1: 1960000 rects
+caravel_0008d8db_fill_pattern_0_3: 1180000 rects
+caravel_0008d8db_fill_pattern_4_2: 570000 rects
+caravel_0008d8db_fill_pattern_0_6: 710000 rects
+caravel_0008d8db_fill_pattern_2_4: 880000 rects
+caravel_0008d8db_fill_pattern_2_1: 1970000 rects
+caravel_0008d8db_fill_pattern_4_2: 580000 rects
+caravel_0008d8db_fill_pattern_0_6: 720000 rects
+caravel_0008d8db_fill_pattern_2_1: 1980000 rects
+caravel_0008d8db_fill_pattern_3_0: 3470000 rects
+caravel_0008d8db_fill_pattern_0_6: 730000 rects
+caravel_0008d8db_fill_pattern_4_2: 590000 rects
+caravel_0008d8db_fill_pattern_2_1: 1990000 rects
+caravel_0008d8db_fill_pattern_2_4: 890000 rects
+caravel_0008d8db_fill_pattern_0_6: 740000 rects
+caravel_0008d8db_fill_pattern_2_1: 2000000 rects
+caravel_0008d8db_fill_pattern_4_2: 600000 rects
+caravel_0008d8db_fill_pattern_0_6: 750000 rects
+caravel_0008d8db_fill_pattern_2_1: 2010000 rects
+caravel_0008d8db_fill_pattern_3_0: 3480000 rects
+caravel_0008d8db_fill_pattern_4_2: 610000 rects
+caravel_0008d8db_fill_pattern_0_6: 760000 rects
+caravel_0008d8db_fill_pattern_2_4: 900000 rects
+caravel_0008d8db_fill_pattern_2_1: 2020000 rects
+caravel_0008d8db_fill_pattern_4_2: 620000 rects
+caravel_0008d8db_fill_pattern_0_6: 770000 rects
+caravel_0008d8db_fill_pattern_2_1: 2030000 rects
+caravel_0008d8db_fill_pattern_4_2: 630000 rects
+caravel_0008d8db_fill_pattern_2_1: 2040000 rects
+caravel_0008d8db_fill_pattern_2_4: 910000 rects
+caravel_0008d8db_fill_pattern_0_6: 780000 rects
+caravel_0008d8db_fill_pattern_4_2: 640000 rects
+caravel_0008d8db_fill_pattern_3_0: 3490000 rects
+caravel_0008d8db_fill_pattern_2_1: 2050000 rects
+caravel_0008d8db_fill_pattern_4_2: 650000 rects
+caravel_0008d8db_fill_pattern_0_6: 790000 rects
+caravel_0008d8db_fill_pattern_4_2: 660000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_0_6: 800000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_0_3
+caravel_0008d8db_fill_pattern_2_1: 2060000 rects
+caravel_0008d8db_fill_pattern_4_2: 670000 rects
+caravel_0008d8db_fill_pattern_0_6: 810000 rects
+caravel_0008d8db_fill_pattern_2_4: 920000 rects
+caravel_0008d8db_fill_pattern_3_0: 3500000 rects
+caravel_0008d8db_fill_pattern_4_2: 680000 rects
+caravel_0008d8db_fill_pattern_0_6: 820000 rects
+caravel_0008d8db_fill_pattern_2_1: 2070000 rects
+caravel_0008d8db_fill_pattern_0_6: 830000 rects
+caravel_0008d8db_fill_pattern_2_1: 2080000 rects
+caravel_0008d8db_fill_pattern_0_6: 840000 rects
+caravel_0008d8db_fill_pattern_2_4: 930000 rects
+caravel_0008d8db_fill_pattern_0_6: 850000 rects
+caravel_0008d8db_fill_pattern_2_1: 2090000 rects
+caravel_0008d8db_fill_pattern_0_6: 860000 rects
+caravel_0008d8db_fill_pattern_3_0: 3510000 rects
+caravel_0008d8db_fill_pattern_2_1: 2100000 rects
+caravel_0008d8db_fill_pattern_0_6: 870000 rects
+caravel_0008d8db_fill_pattern_2_4: 940000 rects
+caravel_0008d8db_fill_pattern_0_6: 880000 rects
+caravel_0008d8db_fill_pattern_2_1: 2110000 rects
+caravel_0008d8db_fill_pattern_4_2: 690000 rects
+caravel_0008d8db_fill_pattern_0_6: 890000 rects
+caravel_0008d8db_fill_pattern_2_1: 2120000 rects
+caravel_0008d8db_fill_pattern_4_2: 700000 rects
+caravel_0008d8db_fill_pattern_3_0: 3520000 rects
+caravel_0008d8db_fill_pattern_2_1: 2130000 rects
+caravel_0008d8db_fill_pattern_0_6: 900000 rects
+caravel_0008d8db_fill_pattern_2_4: 950000 rects
+caravel_0008d8db_fill_pattern_2_1: 2140000 rects
+caravel_0008d8db_fill_pattern_4_2: 710000 rects
+caravel_0008d8db_fill_pattern_0_6: 910000 rects
+caravel_0008d8db_fill_pattern_2_1: 2150000 rects
+caravel_0008d8db_fill_pattern_4_2: 720000 rects
+caravel_0008d8db_fill_pattern_2_4: 960000 rects
+caravel_0008d8db_fill_pattern_0_6: 920000 rects
+caravel_0008d8db_fill_pattern_3_0: 3530000 rects
+caravel_0008d8db_fill_pattern_2_1: 2160000 rects
+caravel_0008d8db_fill_pattern_4_2: 730000 rects
+caravel_0008d8db_fill_pattern_0_6: 930000 rects
+caravel_0008d8db_fill_pattern_2_1: 2170000 rects
+caravel_0008d8db_fill_pattern_2_4: 970000 rects
+caravel_0008d8db_fill_pattern_0_6: 940000 rects
+caravel_0008d8db_fill_pattern_4_2: 740000 rects
+caravel_0008d8db_fill_pattern_2_1: 2180000 rects
+caravel_0008d8db_fill_pattern_4_2: 750000 rects
+caravel_0008d8db_fill_pattern_0_6: 950000 rects
+caravel_0008d8db_fill_pattern_2_1: 2190000 rects
+caravel_0008d8db_fill_pattern_3_0: 3540000 rects
+caravel_0008d8db_fill_pattern_4_2: 760000 rects
+caravel_0008d8db_fill_pattern_0_6: 960000 rects
+caravel_0008d8db_fill_pattern_2_1: 2200000 rects
+caravel_0008d8db_fill_pattern_2_4: 980000 rects
+caravel_0008d8db_fill_pattern_4_2: 770000 rects
+caravel_0008d8db_fill_pattern_0_6: 970000 rects
+caravel_0008d8db_fill_pattern_2_1: 2210000 rects
+caravel_0008d8db_fill_pattern_3_0: 3550000 rects
+caravel_0008d8db_fill_pattern_0_6: 980000 rects
+caravel_0008d8db_fill_pattern_2_1: 2220000 rects
+caravel_0008d8db_fill_pattern_0_6: 990000 rects
+caravel_0008d8db_fill_pattern_4_2: 780000 rects
+caravel_0008d8db_fill_pattern_2_1: 2230000 rects
+caravel_0008d8db_fill_pattern_0_6: 1000000 rects
+caravel_0008d8db_fill_pattern_2_4: 990000 rects
+caravel_0008d8db_fill_pattern_0_6: 1010000 rects
+caravel_0008d8db_fill_pattern_2_1: 2240000 rects
+caravel_0008d8db_fill_pattern_4_2: 790000 rects
+caravel_0008d8db_fill_pattern_2_1: 2250000 rects
+caravel_0008d8db_fill_pattern_4_2: 800000 rects
+caravel_0008d8db_fill_pattern_0_6: 1020000 rects
+caravel_0008d8db_fill_pattern_2_1: 2260000 rects
+caravel_0008d8db_fill_pattern_3_0: 3560000 rects
+caravel_0008d8db_fill_pattern_2_4: 1000000 rects
+caravel_0008d8db_fill_pattern_2_1: 2270000 rects
+caravel_0008d8db_fill_pattern_2_1: 2280000 rects
+caravel_0008d8db_fill_pattern_0_6: 1030000 rects
+caravel_0008d8db_fill_pattern_2_1: 2290000 rects
+caravel_0008d8db_fill_pattern_2_1: 2300000 rects
+caravel_0008d8db_fill_pattern_0_6: 1040000 rects
+caravel_0008d8db_fill_pattern_4_2: 810000 rects
+caravel_0008d8db_fill_pattern_2_4: 1010000 rects
+caravel_0008d8db_fill_pattern_2_1: 2310000 rects
+caravel_0008d8db_fill_pattern_3_0: 3570000 rects
+caravel_0008d8db_fill_pattern_0_6: 1050000 rects
+caravel_0008d8db_fill_pattern_2_1: 2320000 rects
+caravel_0008d8db_fill_pattern_4_2: 820000 rects
+caravel_0008d8db_fill_pattern_2_1: 2330000 rects
+caravel_0008d8db_fill_pattern_0_6: 1060000 rects
+caravel_0008d8db_fill_pattern_2_4: 1020000 rects
+caravel_0008d8db_fill_pattern_2_1: 2340000 rects
+caravel_0008d8db_fill_pattern_4_2: 830000 rects
+caravel_0008d8db_fill_pattern_0_6: 1070000 rects
+caravel_0008d8db_fill_pattern_2_1: 2350000 rects
+caravel_0008d8db_fill_pattern_4_2: 840000 rects
+caravel_0008d8db_fill_pattern_0_6: 1080000 rects
+caravel_0008d8db_fill_pattern_3_0: 3580000 rects
+caravel_0008d8db_fill_pattern_2_1: 2360000 rects
+caravel_0008d8db_fill_pattern_0_6: 1090000 rects
+caravel_0008d8db_fill_pattern_4_2: 850000 rects
+caravel_0008d8db_fill_pattern_2_4: 1030000 rects
+caravel_0008d8db_fill_pattern_2_1: 2370000 rects
+caravel_0008d8db_fill_pattern_2_1: 2380000 rects
+caravel_0008d8db_fill_pattern_0_6: 1100000 rects
+caravel_0008d8db_fill_pattern_2_1: 2390000 rects
+caravel_0008d8db_fill_pattern_3_0: 3590000 rects
+caravel_0008d8db_fill_pattern_2_4: 1040000 rects
+caravel_0008d8db_fill_pattern_2_1: 2400000 rects
+caravel_0008d8db_fill_pattern_0_6: 1110000 rects
+caravel_0008d8db_fill_pattern_2_1: 2410000 rects
+caravel_0008d8db_fill_pattern_2_1: 2420000 rects
+caravel_0008d8db_fill_pattern_3_0: 3600000 rects
+caravel_0008d8db_fill_pattern_2_4: 1050000 rects
+caravel_0008d8db_fill_pattern_2_1: 2430000 rects
+caravel_0008d8db_fill_pattern_0_6: 1120000 rects
+caravel_0008d8db_fill_pattern_2_1: 2440000 rects
+caravel_0008d8db_fill_pattern_0_6: 1130000 rects
+caravel_0008d8db_fill_pattern_0_6: 1140000 rects
+caravel_0008d8db_fill_pattern_0_6: 1150000 rects
+caravel_0008d8db_fill_pattern_2_4: 1060000 rects
+caravel_0008d8db_fill_pattern_3_0: 3610000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_0_6: 1160000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_4_2
+caravel_0008d8db_fill_pattern_2_1: 2450000 rects
+caravel_0008d8db_fill_pattern_2_4: 1070000 rects
+caravel_0008d8db_fill_pattern_3_0: 3620000 rects
+caravel_0008d8db_fill_pattern_2_4: 1080000 rects
+caravel_0008d8db_fill_pattern_3_0: 3630000 rects
+caravel_0008d8db_fill_pattern_2_4: 1090000 rects
+caravel_0008d8db_fill_pattern_2_1: 2460000 rects
+caravel_0008d8db_fill_pattern_2_4: 1100000 rects
+caravel_0008d8db_fill_pattern_3_0: 3640000 rects
+caravel_0008d8db_fill_pattern_2_1: 2470000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_0_6
+caravel_0008d8db_fill_pattern_2_4: 1110000 rects
+caravel_0008d8db_fill_pattern_3_0: 3650000 rects
+caravel_0008d8db_fill_pattern_2_1: 2480000 rects
+caravel_0008d8db_fill_pattern_2_4: 1120000 rects
+caravel_0008d8db_fill_pattern_3_0: 3660000 rects
+caravel_0008d8db_fill_pattern_2_1: 2490000 rects
+caravel_0008d8db_fill_pattern_2_4: 1130000 rects
+caravel_0008d8db_fill_pattern_3_0: 3670000 rects
+caravel_0008d8db_fill_pattern_2_4: 1140000 rects
+caravel_0008d8db_fill_pattern_2_1: 2500000 rects
+caravel_0008d8db_fill_pattern_2_4: 1150000 rects
+caravel_0008d8db_fill_pattern_3_0: 3680000 rects
+caravel_0008d8db_fill_pattern_2_1: 2510000 rects
+caravel_0008d8db_fill_pattern_2_4: 1160000 rects
+caravel_0008d8db_fill_pattern_2_1: 2520000 rects
+caravel_0008d8db_fill_pattern_3_0: 3690000 rects
+caravel_0008d8db_fill_pattern_2_4: 1170000 rects
+caravel_0008d8db_fill_pattern_2_1: 2530000 rects
+caravel_0008d8db_fill_pattern_3_0: 3700000 rects
+caravel_0008d8db_fill_pattern_2_4: 1180000 rects
+caravel_0008d8db_fill_pattern_3_0: 3710000 rects
+caravel_0008d8db_fill_pattern_2_4: 1190000 rects
+caravel_0008d8db_fill_pattern_2_1: 2540000 rects
+caravel_0008d8db_fill_pattern_2_4: 1200000 rects
+caravel_0008d8db_fill_pattern_3_0: 3720000 rects
+caravel_0008d8db_fill_pattern_2_1: 2550000 rects
+caravel_0008d8db_fill_pattern_2_4: 1210000 rects
+caravel_0008d8db_fill_pattern_3_0: 3730000 rects
+caravel_0008d8db_fill_pattern_2_1: 2560000 rects
+caravel_0008d8db_fill_pattern_2_4: 1220000 rects
+caravel_0008d8db_fill_pattern_2_4: 1230000 rects
+caravel_0008d8db_fill_pattern_3_0: 3740000 rects
+caravel_0008d8db_fill_pattern_2_1: 2570000 rects
+caravel_0008d8db_fill_pattern_2_4: 1240000 rects
+caravel_0008d8db_fill_pattern_3_0: 3750000 rects
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+caravel_0008d8db_fill_pattern_2_4: 1250000 rects
+caravel_0008d8db_fill_pattern_3_0: 3760000 rects
+caravel_0008d8db_fill_pattern_2_4: 1260000 rects
+caravel_0008d8db_fill_pattern_3_0: 3770000 rects
+caravel_0008d8db_fill_pattern_2_1: 2590000 rects
+caravel_0008d8db_fill_pattern_2_4: 1270000 rects
+caravel_0008d8db_fill_pattern_2_4: 1280000 rects
+caravel_0008d8db_fill_pattern_3_0: 3780000 rects
+caravel_0008d8db_fill_pattern_2_1: 2600000 rects
+caravel_0008d8db_fill_pattern_2_4: 1290000 rects
+caravel_0008d8db_fill_pattern_3_0: 3790000 rects
+caravel_0008d8db_fill_pattern_2_1: 2610000 rects
+caravel_0008d8db_fill_pattern_2_4: 1300000 rects
+caravel_0008d8db_fill_pattern_3_0: 3800000 rects
+caravel_0008d8db_fill_pattern_2_4: 1310000 rects
+caravel_0008d8db_fill_pattern_2_1: 2620000 rects
+caravel_0008d8db_fill_pattern_2_4: 1320000 rects
+caravel_0008d8db_fill_pattern_3_0: 3810000 rects
+caravel_0008d8db_fill_pattern_2_1: 2630000 rects
+caravel_0008d8db_fill_pattern_2_4: 1330000 rects
+caravel_0008d8db_fill_pattern_3_0: 3820000 rects
+caravel_0008d8db_fill_pattern_2_1: 2640000 rects
+caravel_0008d8db_fill_pattern_2_4: 1340000 rects
+caravel_0008d8db_fill_pattern_3_0: 3830000 rects
+caravel_0008d8db_fill_pattern_2_1: 2650000 rects
+caravel_0008d8db_fill_pattern_2_4: 1350000 rects
+caravel_0008d8db_fill_pattern_2_1: 2660000 rects
+caravel_0008d8db_fill_pattern_3_0: 3840000 rects
+Ended: 01/01/2023 08:53:05
+caravel_0008d8db_fill_pattern_2_4: 1360000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_2_1: 2670000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_2_4: 1370000 rects
+caravel_0008d8db_fill_pattern_3_0: 3850000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_2_1: 2680000 rects
+caravel_0008d8db_fill_pattern_2_4: 1380000 rects
+caravel_0008d8db_fill_pattern_2_1: 2690000 rects
+caravel_0008d8db_fill_pattern_3_0: 3860000 rects
+caravel_0008d8db_fill_pattern_2_4: 1390000 rects
+caravel_0008d8db_fill_pattern_2_4: 1400000 rects
+caravel_0008d8db_fill_pattern_3_0: 3870000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_2_4: 1410000 rects
+caravel_0008d8db_fill_pattern_2_1: 2700000 rects
+caravel_0008d8db_fill_pattern_5_1: 10000 rects
+caravel_0008d8db_fill_pattern_5_1: 20000 rects
+caravel_0008d8db_fill_pattern_3_0: 3880000 rects
+caravel_0008d8db_fill_pattern_5_1: 30000 rects
+caravel_0008d8db_fill_pattern_2_4: 1420000 rects
+caravel_0008d8db_fill_pattern_5_1: 40000 rects
+caravel_0008d8db_fill_pattern_5_1: 50000 rects
+caravel_0008d8db_fill_pattern_5_1: 60000 rects
+caravel_0008d8db_fill_pattern_5_1: 70000 rects
+caravel_0008d8db_fill_pattern_2_4: 1430000 rects
+caravel_0008d8db_fill_pattern_5_1: 80000 rects
+caravel_0008d8db_fill_pattern_3_0: 3890000 rects
+caravel_0008d8db_fill_pattern_2_1: 2710000 rects
+caravel_0008d8db_fill_pattern_5_1: 90000 rects
+caravel_0008d8db_fill_pattern_5_1: 100000 rects
+caravel_0008d8db_fill_pattern_2_4: 1440000 rects
+caravel_0008d8db_fill_pattern_5_1: 110000 rects
+caravel_0008d8db_fill_pattern_5_1: 120000 rects
+caravel_0008d8db_fill_pattern_3_0: 3900000 rects
+caravel_0008d8db_fill_pattern_5_1: 130000 rects
+caravel_0008d8db_fill_pattern_2_4: 1450000 rects
+caravel_0008d8db_fill_pattern_2_1: 2720000 rects
+caravel_0008d8db_fill_pattern_5_1: 140000 rects
+caravel_0008d8db_fill_pattern_5_1: 150000 rects
+caravel_0008d8db_fill_pattern_2_4: 1460000 rects
+caravel_0008d8db_fill_pattern_5_1: 160000 rects
+caravel_0008d8db_fill_pattern_5_1: 170000 rects
+caravel_0008d8db_fill_pattern_3_0: 3910000 rects
+caravel_0008d8db_fill_pattern_5_1: 180000 rects
+caravel_0008d8db_fill_pattern_2_4: 1470000 rects
+caravel_0008d8db_fill_pattern_5_1: 190000 rects
+caravel_0008d8db_fill_pattern_2_1: 2730000 rects
+caravel_0008d8db_fill_pattern_2_4: 1480000 rects
+caravel_0008d8db_fill_pattern_5_1: 200000 rects
+caravel_0008d8db_fill_pattern_3_0: 3920000 rects
+caravel_0008d8db_fill_pattern_5_1: 210000 rects
+caravel_0008d8db_fill_pattern_2_4: 1490000 rects
+caravel_0008d8db_fill_pattern_5_1: 220000 rects
+caravel_0008d8db_fill_pattern_2_1: 2740000 rects
+caravel_0008d8db_fill_pattern_5_1: 230000 rects
+caravel_0008d8db_fill_pattern_3_0: 3930000 rects
+caravel_0008d8db_fill_pattern_5_1: 240000 rects
+caravel_0008d8db_fill_pattern_2_4: 1500000 rects
+caravel_0008d8db_fill_pattern_5_1: 250000 rects
+caravel_0008d8db_fill_pattern_5_1: 260000 rects
+caravel_0008d8db_fill_pattern_2_4: 1510000 rects
+caravel_0008d8db_fill_pattern_5_1: 270000 rects
+caravel_0008d8db_fill_pattern_3_0: 3940000 rects
+caravel_0008d8db_fill_pattern_2_1: 2750000 rects
+caravel_0008d8db_fill_pattern_5_1: 280000 rects
+caravel_0008d8db_fill_pattern_2_4: 1520000 rects
+caravel_0008d8db_fill_pattern_5_1: 290000 rects
+caravel_0008d8db_fill_pattern_2_4: 1530000 rects
+caravel_0008d8db_fill_pattern_3_0: 3950000 rects
+caravel_0008d8db_fill_pattern_5_1: 300000 rects
+caravel_0008d8db_fill_pattern_2_1: 2760000 rects
+caravel_0008d8db_fill_pattern_5_1: 310000 rects
+caravel_0008d8db_fill_pattern_2_4: 1540000 rects
+caravel_0008d8db_fill_pattern_5_1: 320000 rects
+caravel_0008d8db_fill_pattern_3_0: 3960000 rects
+caravel_0008d8db_fill_pattern_2_4: 1550000 rects
+caravel_0008d8db_fill_pattern_5_1: 330000 rects
+caravel_0008d8db_fill_pattern_2_1: 2770000 rects
+caravel_0008d8db_fill_pattern_2_4: 1560000 rects
+caravel_0008d8db_fill_pattern_5_1: 340000 rects
+caravel_0008d8db_fill_pattern_3_0: 3970000 rects
+caravel_0008d8db_fill_pattern_5_1: 350000 rects
+caravel_0008d8db_fill_pattern_2_4: 1570000 rects
+caravel_0008d8db_fill_pattern_5_1: 360000 rects
+caravel_0008d8db_fill_pattern_3_0: 3980000 rects
+caravel_0008d8db_fill_pattern_2_1: 2780000 rects
+caravel_0008d8db_fill_pattern_5_1: 370000 rects
+caravel_0008d8db_fill_pattern_2_4: 1580000 rects
+caravel_0008d8db_fill_pattern_3_0: 3990000 rects
+caravel_0008d8db_fill_pattern_5_1: 380000 rects
+caravel_0008d8db_fill_pattern_2_4: 1590000 rects
+caravel_0008d8db_fill_pattern_5_1: 390000 rects
+caravel_0008d8db_fill_pattern_5_1: 400000 rects
+caravel_0008d8db_fill_pattern_3_0: 4000000 rects
+caravel_0008d8db_fill_pattern_2_4: 1600000 rects
+caravel_0008d8db_fill_pattern_5_1: 410000 rects
+caravel_0008d8db_fill_pattern_2_1: 2790000 rects
+caravel_0008d8db_fill_pattern_5_1: 420000 rects
+Ended: 01/01/2023 08:53:08
+caravel_0008d8db_fill_pattern_3_0: 4010000 rects
+caravel_0008d8db_fill_pattern_2_4: 1610000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_5_1: 430000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_5_1: 440000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_2_4: 1620000 rects
+caravel_0008d8db_fill_pattern_3_0: 4020000 rects
+caravel_0008d8db_fill_pattern_2_1: 2800000 rects
+caravel_0008d8db_fill_pattern_5_1: 450000 rects
+caravel_0008d8db_fill_pattern_2_4: 1630000 rects
+caravel_0008d8db_fill_pattern_5_1: 460000 rects
+caravel_0008d8db_fill_pattern_3_0: 4030000 rects
+caravel_0008d8db_fill_pattern_5_1: 470000 rects
+caravel_0008d8db_fill_pattern_2_4: 1640000 rects
+caravel_0008d8db_fill_pattern_5_1: 480000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_3_0: 4040000 rects
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_5 geometry by factor of 2
+caravel_0008d8db_fill_pattern_5_1: 490000 rects
+caravel_0008d8db_fill_pattern_5_1: 500000 rects
+caravel_0008d8db_fill_pattern_2_4: 1650000 rects
+caravel_0008d8db_fill_pattern_5_1: 510000 rects
+caravel_0008d8db_fill_pattern_5_1: 520000 rects
+caravel_0008d8db_fill_pattern_5_1: 530000 rects
+caravel_0008d8db_fill_pattern_2_1: 2810000 rects
+caravel_0008d8db_fill_pattern_3_0: 4050000 rects
+caravel_0008d8db_fill_pattern_5_1: 540000 rects
+caravel_0008d8db_fill_pattern_2_4: 1660000 rects
+caravel_0008d8db_fill_pattern_5_1: 550000 rects
+caravel_0008d8db_fill_pattern_5_1: 560000 rects
+caravel_0008d8db_fill_pattern_5_1: 570000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_1_5
+caravel_0008d8db_fill_pattern_2_4: 1670000 rects
+caravel_0008d8db_fill_pattern_3_0: 4060000 rects
+caravel_0008d8db_fill_pattern_5_1: 580000 rects
+caravel_0008d8db_fill_pattern_5_1: 590000 rects
+caravel_0008d8db_fill_pattern_2_1: 2820000 rects
+caravel_0008d8db_fill_pattern_5_1: 600000 rects
+caravel_0008d8db_fill_pattern_2_4: 1680000 rects
+caravel_0008d8db_fill_pattern_5_1: 610000 rects
+caravel_0008d8db_fill_pattern_3_0: 4070000 rects
+caravel_0008d8db_fill_pattern_5_1: 620000 rects
+caravel_0008d8db_fill_pattern_5_1: 630000 rects
+caravel_0008d8db_fill_pattern_2_4: 1690000 rects
+caravel_0008d8db_fill_pattern_5_1: 640000 rects
+caravel_0008d8db_fill_pattern_3_0: 4080000 rects
+caravel_0008d8db_fill_pattern_5_1: 650000 rects
+caravel_0008d8db_fill_pattern_2_4: 1700000 rects
+caravel_0008d8db_fill_pattern_5_1: 660000 rects
+caravel_0008d8db_fill_pattern_2_1: 2830000 rects
+caravel_0008d8db_fill_pattern_5_1: 670000 rects
+caravel_0008d8db_fill_pattern_3_0: 4090000 rects
+caravel_0008d8db_fill_pattern_5_1: 680000 rects
+caravel_0008d8db_fill_pattern_2_4: 1710000 rects
+caravel_0008d8db_fill_pattern_5_1: 690000 rects
+caravel_0008d8db_fill_pattern_5_1: 700000 rects
+caravel_0008d8db_fill_pattern_3_0: 4100000 rects
+caravel_0008d8db_fill_pattern_2_4: 1720000 rects
+caravel_0008d8db_fill_pattern_5_1: 710000 rects
+caravel_0008d8db_fill_pattern_5_1: 720000 rects
+caravel_0008d8db_fill_pattern_5_1: 730000 rects
+caravel_0008d8db_fill_pattern_5_1: 740000 rects
+caravel_0008d8db_fill_pattern_2_1: 2840000 rects
+caravel_0008d8db_fill_pattern_2_4: 1730000 rects
+caravel_0008d8db_fill_pattern_5_1: 750000 rects
+caravel_0008d8db_fill_pattern_3_0: 4110000 rects
+caravel_0008d8db_fill_pattern_5_1: 760000 rects
+caravel_0008d8db_fill_pattern_5_1: 770000 rects
+caravel_0008d8db_fill_pattern_2_4: 1740000 rects
+caravel_0008d8db_fill_pattern_5_1: 780000 rects
+caravel_0008d8db_fill_pattern_2_1: 2850000 rects
+caravel_0008d8db_fill_pattern_3_0: 4120000 rects
+caravel_0008d8db_fill_pattern_5_1: 790000 rects
+caravel_0008d8db_fill_pattern_2_4: 1750000 rects
+caravel_0008d8db_fill_pattern_5_1: 800000 rects
+caravel_0008d8db_fill_pattern_5_1: 810000 rects
+caravel_0008d8db_fill_pattern_2_4: 1760000 rects
+caravel_0008d8db_fill_pattern_3_0: 4130000 rects
+caravel_0008d8db_fill_pattern_5_1: 820000 rects
+caravel_0008d8db_fill_pattern_5_1: 830000 rects
+caravel_0008d8db_fill_pattern_2_4: 1770000 rects
+caravel_0008d8db_fill_pattern_5_1: 840000 rects
+caravel_0008d8db_fill_pattern_2_4: 1780000 rects
+caravel_0008d8db_fill_pattern_2_1: 2860000 rects
+caravel_0008d8db_fill_pattern_5_1: 850000 rects
+caravel_0008d8db_fill_pattern_2_4: 1790000 rects
+caravel_0008d8db_fill_pattern_5_1: 860000 rects
+caravel_0008d8db_fill_pattern_3_0: 4140000 rects
+caravel_0008d8db_fill_pattern_2_4: 1800000 rects
+caravel_0008d8db_fill_pattern_5_1: 870000 rects
+caravel_0008d8db_fill_pattern_2_4: 1810000 rects
+caravel_0008d8db_fill_pattern_5_1: 880000 rects
+caravel_0008d8db_fill_pattern_3_0: 4150000 rects
+caravel_0008d8db_fill_pattern_5_1: 890000 rects
+caravel_0008d8db_fill_pattern_2_1: 2870000 rects
+caravel_0008d8db_fill_pattern_5_1: 900000 rects
+caravel_0008d8db_fill_pattern_5_1: 910000 rects
+caravel_0008d8db_fill_pattern_5_1: 920000 rects
+caravel_0008d8db_fill_pattern_2_1: 2880000 rects
+caravel_0008d8db_fill_pattern_3_0: 4160000 rects
+caravel_0008d8db_fill_pattern_5_1: 930000 rects
+caravel_0008d8db_fill_pattern_5_1: 940000 rects
+caravel_0008d8db_fill_pattern_5_1: 950000 rects
+caravel_0008d8db_fill_pattern_5_1: 960000 rects
+caravel_0008d8db_fill_pattern_3_0: 4170000 rects
+caravel_0008d8db_fill_pattern_2_1: 2890000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_2_4
+caravel_0008d8db_fill_pattern_3_0: 4180000 rects
+caravel_0008d8db_fill_pattern_2_1: 2900000 rects
+caravel_0008d8db_fill_pattern_3_0: 4190000 rects
+caravel_0008d8db_fill_pattern_2_1: 2910000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_5_1
+caravel_0008d8db_fill_pattern_3_0: 4200000 rects
+caravel_0008d8db_fill_pattern_2_1: 2920000 rects
+caravel_0008d8db_fill_pattern_3_0: 4210000 rects
+caravel_0008d8db_fill_pattern_2_1: 2930000 rects
+caravel_0008d8db_fill_pattern_3_0: 4220000 rects
+caravel_0008d8db_fill_pattern_2_1: 2940000 rects
+caravel_0008d8db_fill_pattern_3_0: 4230000 rects
+caravel_0008d8db_fill_pattern_2_1: 2950000 rects
+caravel_0008d8db_fill_pattern_3_0: 4240000 rects
+caravel_0008d8db_fill_pattern_2_1: 2960000 rects
+caravel_0008d8db_fill_pattern_3_0: 4250000 rects
+caravel_0008d8db_fill_pattern_3_0: 4260000 rects
+caravel_0008d8db_fill_pattern_2_1: 2970000 rects
+caravel_0008d8db_fill_pattern_3_0: 4270000 rects
+caravel_0008d8db_fill_pattern_2_1: 2980000 rects
+caravel_0008d8db_fill_pattern_3_0: 4280000 rects
+caravel_0008d8db_fill_pattern_2_1: 2990000 rects
+caravel_0008d8db_fill_pattern_2_1: 3000000 rects
+caravel_0008d8db_fill_pattern_3_0: 4290000 rects
+caravel_0008d8db_fill_pattern_2_1: 3010000 rects
+caravel_0008d8db_fill_pattern_3_0: 4300000 rects
+caravel_0008d8db_fill_pattern_3_0: 4310000 rects
+caravel_0008d8db_fill_pattern_2_1: 3020000 rects
+caravel_0008d8db_fill_pattern_3_0: 4320000 rects
+caravel_0008d8db_fill_pattern_2_1: 3030000 rects
+caravel_0008d8db_fill_pattern_3_0: 4330000 rects
+caravel_0008d8db_fill_pattern_2_1: 3040000 rects
+caravel_0008d8db_fill_pattern_3_0: 4340000 rects
+caravel_0008d8db_fill_pattern_2_1: 3050000 rects
+caravel_0008d8db_fill_pattern_3_0: 4350000 rects
+caravel_0008d8db_fill_pattern_2_1: 3060000 rects
+caravel_0008d8db_fill_pattern_3_0: 4360000 rects
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+caravel_0008d8db_fill_pattern_3_0: 4370000 rects
+caravel_0008d8db_fill_pattern_2_1: 3080000 rects
+caravel_0008d8db_fill_pattern_3_0: 4380000 rects
+caravel_0008d8db_fill_pattern_2_1: 3090000 rects
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+caravel_0008d8db_fill_pattern_2_1: 3100000 rects
+caravel_0008d8db_fill_pattern_3_0: 4400000 rects
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+caravel_0008d8db_fill_pattern_3_0: 4410000 rects
+caravel_0008d8db_fill_pattern_2_1: 3120000 rects
+caravel_0008d8db_fill_pattern_3_0: 4420000 rects
+caravel_0008d8db_fill_pattern_2_1: 3130000 rects
+caravel_0008d8db_fill_pattern_3_0: 4430000 rects
+caravel_0008d8db_fill_pattern_2_1: 3140000 rects
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+caravel_0008d8db_fill_pattern_2_1: 3160000 rects
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+caravel_0008d8db_fill_pattern_2_1: 3170000 rects
+caravel_0008d8db_fill_pattern_3_0: 4480000 rects
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+caravel_0008d8db_fill_pattern_3_0: 4490000 rects
+caravel_0008d8db_fill_pattern_2_1: 3190000 rects
+caravel_0008d8db_fill_pattern_3_0: 4500000 rects
+caravel_0008d8db_fill_pattern_2_1: 3200000 rects
+caravel_0008d8db_fill_pattern_3_0: 4510000 rects
+caravel_0008d8db_fill_pattern_2_1: 3210000 rects
+caravel_0008d8db_fill_pattern_3_0: 4520000 rects
+caravel_0008d8db_fill_pattern_3_0: 4530000 rects
+caravel_0008d8db_fill_pattern_2_1: 3220000 rects
+caravel_0008d8db_fill_pattern_3_0: 4540000 rects
+caravel_0008d8db_fill_pattern_2_1: 3230000 rects
+caravel_0008d8db_fill_pattern_3_0: 4550000 rects
+caravel_0008d8db_fill_pattern_2_1: 3240000 rects
+caravel_0008d8db_fill_pattern_3_0: 4560000 rects
+caravel_0008d8db_fill_pattern_2_1: 3250000 rects
+caravel_0008d8db_fill_pattern_3_0: 4570000 rects
+caravel_0008d8db_fill_pattern_2_1: 3260000 rects
+caravel_0008d8db_fill_pattern_3_0: 4580000 rects
+caravel_0008d8db_fill_pattern_2_1: 3270000 rects
+caravel_0008d8db_fill_pattern_3_0: 4590000 rects
+caravel_0008d8db_fill_pattern_2_1: 3280000 rects
+caravel_0008d8db_fill_pattern_3_0: 4600000 rects
+caravel_0008d8db_fill_pattern_2_1: 3290000 rects
+caravel_0008d8db_fill_pattern_2_1: 3300000 rects
+caravel_0008d8db_fill_pattern_3_0: 4610000 rects
+caravel_0008d8db_fill_pattern_2_1: 3310000 rects
+Ended: 01/01/2023 08:53:17
+caravel_0008d8db_fill_pattern_3_0: 4620000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_3_0: 4630000 rects
+caravel_0008d8db_fill_pattern_2_1: 3320000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_3_0: 4640000 rects
+caravel_0008d8db_fill_pattern_2_1: 3330000 rects
+caravel_0008d8db_fill_pattern_2_1: 3340000 rects
+caravel_0008d8db_fill_pattern_3_0: 4650000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_4_6: 10000 rects
+caravel_0008d8db_fill_pattern_4_6: 20000 rects
+caravel_0008d8db_fill_pattern_4_6: 30000 rects
+caravel_0008d8db_fill_pattern_4_6: 40000 rects
+caravel_0008d8db_fill_pattern_3_0: 4660000 rects
+caravel_0008d8db_fill_pattern_2_1: 3350000 rects
+caravel_0008d8db_fill_pattern_4_6: 50000 rects
+caravel_0008d8db_fill_pattern_4_6: 60000 rects
+caravel_0008d8db_fill_pattern_4_6: 70000 rects
+caravel_0008d8db_fill_pattern_4_6: 80000 rects
+caravel_0008d8db_fill_pattern_4_6: 90000 rects
+caravel_0008d8db_fill_pattern_3_0: 4670000 rects
+caravel_0008d8db_fill_pattern_2_1: 3360000 rects
+caravel_0008d8db_fill_pattern_4_6: 100000 rects
+caravel_0008d8db_fill_pattern_4_6: 110000 rects
+caravel_0008d8db_fill_pattern_4_6: 120000 rects
+caravel_0008d8db_fill_pattern_3_0: 4680000 rects
+caravel_0008d8db_fill_pattern_4_6: 130000 rects
+caravel_0008d8db_fill_pattern_2_1: 3370000 rects
+caravel_0008d8db_fill_pattern_4_6: 140000 rects
+caravel_0008d8db_fill_pattern_4_6: 150000 rects
+caravel_0008d8db_fill_pattern_3_0: 4690000 rects
+caravel_0008d8db_fill_pattern_4_6: 160000 rects
+caravel_0008d8db_fill_pattern_2_1: 3380000 rects
+caravel_0008d8db_fill_pattern_4_6: 170000 rects
+caravel_0008d8db_fill_pattern_4_6: 180000 rects
+caravel_0008d8db_fill_pattern_4_6: 190000 rects
+caravel_0008d8db_fill_pattern_3_0: 4700000 rects
+caravel_0008d8db_fill_pattern_2_1: 3390000 rects
+caravel_0008d8db_fill_pattern_4_6: 200000 rects
+caravel_0008d8db_fill_pattern_4_6: 210000 rects
+caravel_0008d8db_fill_pattern_3_0: 4710000 rects
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+caravel_0008d8db_fill_pattern_4_6: 220000 rects
+caravel_0008d8db_fill_pattern_4_6: 230000 rects
+caravel_0008d8db_fill_pattern_3_0: 4720000 rects
+caravel_0008d8db_fill_pattern_4_6: 240000 rects
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+caravel_0008d8db_fill_pattern_4_6: 250000 rects
+caravel_0008d8db_fill_pattern_4_6: 260000 rects
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+caravel_0008d8db_fill_pattern_4_6: 270000 rects
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+caravel_0008d8db_fill_pattern_4_6: 280000 rects
+caravel_0008d8db_fill_pattern_2_1: 3430000 rects
+caravel_0008d8db_fill_pattern_4_6: 290000 rects
+caravel_0008d8db_fill_pattern_3_0: 4750000 rects
+caravel_0008d8db_fill_pattern_4_6: 300000 rects
+caravel_0008d8db_fill_pattern_2_1: 3440000 rects
+caravel_0008d8db_fill_pattern_4_6: 310000 rects
+caravel_0008d8db_fill_pattern_4_6: 320000 rects
+caravel_0008d8db_fill_pattern_4_6: 330000 rects
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+caravel_0008d8db_fill_pattern_4_6: 350000 rects
+caravel_0008d8db_fill_pattern_4_6: 360000 rects
+caravel_0008d8db_fill_pattern_4_6: 370000 rects
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+caravel_0008d8db_fill_pattern_4_6: 390000 rects
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+caravel_0008d8db_fill_pattern_2_1: 3480000 rects
+caravel_0008d8db_fill_pattern_4_6: 410000 rects
+caravel_0008d8db_fill_pattern_3_0: 4800000 rects
+caravel_0008d8db_fill_pattern_4_6: 420000 rects
+caravel_0008d8db_fill_pattern_4_6: 430000 rects
+caravel_0008d8db_fill_pattern_2_1: 3490000 rects
+caravel_0008d8db_fill_pattern_3_0: 4810000 rects
+caravel_0008d8db_fill_pattern_4_6: 440000 rects
+caravel_0008d8db_fill_pattern_4_6: 450000 rects
+caravel_0008d8db_fill_pattern_4_6: 460000 rects
+caravel_0008d8db_fill_pattern_3_0: 4820000 rects
+caravel_0008d8db_fill_pattern_2_1: 3500000 rects
+caravel_0008d8db_fill_pattern_4_6: 470000 rects
+caravel_0008d8db_fill_pattern_4_6: 480000 rects
+caravel_0008d8db_fill_pattern_3_0: 4830000 rects
+caravel_0008d8db_fill_pattern_2_1: 3510000 rects
+caravel_0008d8db_fill_pattern_4_6: 490000 rects
+caravel_0008d8db_fill_pattern_4_6: 500000 rects
+caravel_0008d8db_fill_pattern_4_6: 510000 rects
+Ended: 01/01/2023 08:53:21
+caravel_0008d8db_fill_pattern_4_6: 520000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_3_0: 4840000 rects
+caravel_0008d8db_fill_pattern_4_6: 530000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_2_1: 3520000 rects
+caravel_0008d8db_fill_pattern_4_6: 540000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_4_6: 550000 rects
+caravel_0008d8db_fill_pattern_3_0: 4850000 rects
+caravel_0008d8db_fill_pattern_4_6: 560000 rects
+caravel_0008d8db_fill_pattern_2_1: 3530000 rects
+caravel_0008d8db_fill_pattern_4_6: 570000 rects
+caravel_0008d8db_fill_pattern_3_0: 4860000 rects
+caravel_0008d8db_fill_pattern_4_6: 580000 rects
+caravel_0008d8db_fill_pattern_2_1: 3540000 rects
+caravel_0008d8db_fill_pattern_4_6: 590000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_4_6: 600000 rects
+caravel_0008d8db_fill_pattern_3_0: 4870000 rects
+caravel_0008d8db_fill_pattern_3_7: 10000 rects
+caravel_0008d8db_fill_pattern_4_6: 610000 rects
+caravel_0008d8db_fill_pattern_3_7: 20000 rects
+caravel_0008d8db_fill_pattern_2_1: 3550000 rects
+caravel_0008d8db_fill_pattern_3_7: 30000 rects
+caravel_0008d8db_fill_pattern_4_6: 620000 rects
+caravel_0008d8db_fill_pattern_3_7: 40000 rects
+caravel_0008d8db_fill_pattern_3_7: 50000 rects
+caravel_0008d8db_fill_pattern_4_6: 630000 rects
+caravel_0008d8db_fill_pattern_3_0: 4880000 rects
+caravel_0008d8db_fill_pattern_3_7: 60000 rects
+caravel_0008d8db_fill_pattern_3_7: 70000 rects
+caravel_0008d8db_fill_pattern_2_1: 3560000 rects
+caravel_0008d8db_fill_pattern_3_7: 80000 rects
+caravel_0008d8db_fill_pattern_3_7: 90000 rects
+caravel_0008d8db_fill_pattern_4_6: 640000 rects
+caravel_0008d8db_fill_pattern_3_7: 100000 rects
+caravel_0008d8db_fill_pattern_3_7: 110000 rects
+caravel_0008d8db_fill_pattern_3_0: 4890000 rects
+caravel_0008d8db_fill_pattern_3_7: 120000 rects
+caravel_0008d8db_fill_pattern_4_6: 650000 rects
+caravel_0008d8db_fill_pattern_3_7: 130000 rects
+caravel_0008d8db_fill_pattern_2_1: 3570000 rects
+caravel_0008d8db_fill_pattern_3_7: 140000 rects
+caravel_0008d8db_fill_pattern_3_7: 150000 rects
+caravel_0008d8db_fill_pattern_4_6: 660000 rects
+caravel_0008d8db_fill_pattern_3_0: 4900000 rects
+caravel_0008d8db_fill_pattern_4_6: 670000 rects
+caravel_0008d8db_fill_pattern_3_7: 160000 rects
+caravel_0008d8db_fill_pattern_3_7: 170000 rects
+caravel_0008d8db_fill_pattern_3_7: 180000 rects
+caravel_0008d8db_fill_pattern_2_1: 3580000 rects
+caravel_0008d8db_fill_pattern_3_7: 190000 rects
+caravel_0008d8db_fill_pattern_4_6: 680000 rects
+caravel_0008d8db_fill_pattern_3_7: 200000 rects
+caravel_0008d8db_fill_pattern_3_0: 4910000 rects
+caravel_0008d8db_fill_pattern_3_7: 210000 rects
+caravel_0008d8db_fill_pattern_3_7: 220000 rects
+caravel_0008d8db_fill_pattern_2_1: 3590000 rects
+caravel_0008d8db_fill_pattern_3_7: 230000 rects
+caravel_0008d8db_fill_pattern_3_0: 4920000 rects
+caravel_0008d8db_fill_pattern_3_7: 240000 rects
+caravel_0008d8db_fill_pattern_3_7: 250000 rects
+caravel_0008d8db_fill_pattern_3_7: 260000 rects
+caravel_0008d8db_fill_pattern_2_1: 3600000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_3_7: 270000 rects
+caravel_0008d8db_fill_pattern_3_0: 4930000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_4_6
+caravel_0008d8db_fill_pattern_3_7: 280000 rects
+caravel_0008d8db_fill_pattern_3_7: 290000 rects
+caravel_0008d8db_fill_pattern_3_0: 4940000 rects
+caravel_0008d8db_fill_pattern_2_1: 3610000 rects
+caravel_0008d8db_fill_pattern_3_7: 300000 rects
+caravel_0008d8db_fill_pattern_3_7: 310000 rects
+caravel_0008d8db_fill_pattern_3_0: 4950000 rects
+caravel_0008d8db_fill_pattern_3_7: 320000 rects
+caravel_0008d8db_fill_pattern_3_7: 330000 rects
+caravel_0008d8db_fill_pattern_2_1: 3620000 rects
+caravel_0008d8db_fill_pattern_3_7: 340000 rects
+caravel_0008d8db_fill_pattern_3_0: 4960000 rects
+caravel_0008d8db_fill_pattern_3_7: 350000 rects
+caravel_0008d8db_fill_pattern_3_7: 360000 rects
+caravel_0008d8db_fill_pattern_3_7: 370000 rects
+caravel_0008d8db_fill_pattern_2_1: 3630000 rects
+caravel_0008d8db_fill_pattern_3_7: 380000 rects
+caravel_0008d8db_fill_pattern_3_0: 4970000 rects
+caravel_0008d8db_fill_pattern_3_7: 390000 rects
+caravel_0008d8db_fill_pattern_3_7: 400000 rects
+caravel_0008d8db_fill_pattern_2_1: 3640000 rects
+caravel_0008d8db_fill_pattern_3_0: 4980000 rects
+caravel_0008d8db_fill_pattern_3_7: 410000 rects
+caravel_0008d8db_fill_pattern_3_7: 420000 rects
+caravel_0008d8db_fill_pattern_3_0: 4990000 rects
+caravel_0008d8db_fill_pattern_2_1: 3650000 rects
+caravel_0008d8db_fill_pattern_3_7: 430000 rects
+caravel_0008d8db_fill_pattern_3_7: 440000 rects
+caravel_0008d8db_fill_pattern_3_0: 5000000 rects
+caravel_0008d8db_fill_pattern_3_7: 450000 rects
+caravel_0008d8db_fill_pattern_2_1: 3660000 rects
+caravel_0008d8db_fill_pattern_3_0: 5010000 rects
+caravel_0008d8db_fill_pattern_3_7: 460000 rects
+caravel_0008d8db_fill_pattern_3_7: 470000 rects
+caravel_0008d8db_fill_pattern_3_0: 5020000 rects
+caravel_0008d8db_fill_pattern_2_1: 3670000 rects
+caravel_0008d8db_fill_pattern_3_7: 480000 rects
+caravel_0008d8db_fill_pattern_3_0: 5030000 rects
+caravel_0008d8db_fill_pattern_3_7: 490000 rects
+caravel_0008d8db_fill_pattern_3_0: 5040000 rects
+caravel_0008d8db_fill_pattern_3_7: 500000 rects
+caravel_0008d8db_fill_pattern_2_1: 3680000 rects
+caravel_0008d8db_fill_pattern_3_0: 5050000 rects
+caravel_0008d8db_fill_pattern_3_7: 510000 rects
+caravel_0008d8db_fill_pattern_3_0: 5060000 rects
+caravel_0008d8db_fill_pattern_3_7: 520000 rects
+caravel_0008d8db_fill_pattern_3_0: 5070000 rects
+caravel_0008d8db_fill_pattern_2_1: 3690000 rects
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+caravel_0008d8db_fill_pattern_3_0: 5080000 rects
+caravel_0008d8db_fill_pattern_3_0: 5090000 rects
+caravel_0008d8db_fill_pattern_3_7: 540000 rects
+caravel_0008d8db_fill_pattern_2_1: 3700000 rects
+caravel_0008d8db_fill_pattern_3_0: 5100000 rects
+caravel_0008d8db_fill_pattern_3_7: 550000 rects
+caravel_0008d8db_fill_pattern_3_0: 5110000 rects
+caravel_0008d8db_fill_pattern_3_7: 560000 rects
+caravel_0008d8db_fill_pattern_2_1: 3710000 rects
+caravel_0008d8db_fill_pattern_3_7: 570000 rects
+caravel_0008d8db_fill_pattern_3_0: 5120000 rects
+caravel_0008d8db_fill_pattern_3_7: 580000 rects
+caravel_0008d8db_fill_pattern_3_0: 5130000 rects
+caravel_0008d8db_fill_pattern_3_7: 590000 rects
+caravel_0008d8db_fill_pattern_3_0: 5140000 rects
+caravel_0008d8db_fill_pattern_2_1: 3720000 rects
+caravel_0008d8db_fill_pattern_3_7: 600000 rects
+caravel_0008d8db_fill_pattern_3_0: 5150000 rects
+caravel_0008d8db_fill_pattern_3_7: 610000 rects
+caravel_0008d8db_fill_pattern_3_0: 5160000 rects
+caravel_0008d8db_fill_pattern_3_7: 620000 rects
+caravel_0008d8db_fill_pattern_2_1: 3730000 rects
+caravel_0008d8db_fill_pattern_3_0: 5170000 rects
+caravel_0008d8db_fill_pattern_3_7: 630000 rects
+caravel_0008d8db_fill_pattern_3_0: 5180000 rects
+caravel_0008d8db_fill_pattern_3_7: 640000 rects
+caravel_0008d8db_fill_pattern_2_1: 3740000 rects
+caravel_0008d8db_fill_pattern_3_7: 650000 rects
+caravel_0008d8db_fill_pattern_3_0: 5190000 rects
+caravel_0008d8db_fill_pattern_3_7: 660000 rects
+caravel_0008d8db_fill_pattern_3_7: 670000 rects
+caravel_0008d8db_fill_pattern_3_0: 5200000 rects
+caravel_0008d8db_fill_pattern_3_7: 680000 rects
+caravel_0008d8db_fill_pattern_2_1: 3750000 rects
+caravel_0008d8db_fill_pattern_3_7: 690000 rects
+caravel_0008d8db_fill_pattern_3_0: 5210000 rects
+caravel_0008d8db_fill_pattern_3_7: 700000 rects
+caravel_0008d8db_fill_pattern_3_0: 5220000 rects
+caravel_0008d8db_fill_pattern_3_7: 710000 rects
+caravel_0008d8db_fill_pattern_3_7: 720000 rects
+caravel_0008d8db_fill_pattern_2_1: 3760000 rects
+caravel_0008d8db_fill_pattern_3_0: 5230000 rects
+caravel_0008d8db_fill_pattern_3_7: 730000 rects
+caravel_0008d8db_fill_pattern_3_0: 5240000 rects
+caravel_0008d8db_fill_pattern_3_7: 740000 rects
+caravel_0008d8db_fill_pattern_3_7: 750000 rects
+caravel_0008d8db_fill_pattern_3_0: 5250000 rects
+caravel_0008d8db_fill_pattern_3_7: 760000 rects
+caravel_0008d8db_fill_pattern_2_1: 3770000 rects
+caravel_0008d8db_fill_pattern_3_7: 770000 rects
+caravel_0008d8db_fill_pattern_3_0: 5260000 rects
+caravel_0008d8db_fill_pattern_3_7: 780000 rects
+caravel_0008d8db_fill_pattern_3_0: 5270000 rects
+caravel_0008d8db_fill_pattern_3_7: 790000 rects
+caravel_0008d8db_fill_pattern_3_0: 5280000 rects
+caravel_0008d8db_fill_pattern_3_7: 800000 rects
+caravel_0008d8db_fill_pattern_2_1: 3780000 rects
+caravel_0008d8db_fill_pattern_3_0: 5290000 rects
+caravel_0008d8db_fill_pattern_3_0: 5300000 rects
+caravel_0008d8db_fill_pattern_3_7: 810000 rects
+caravel_0008d8db_fill_pattern_3_0: 5310000 rects
+caravel_0008d8db_fill_pattern_3_7: 820000 rects
+caravel_0008d8db_fill_pattern_2_1: 3790000 rects
+caravel_0008d8db_fill_pattern_3_0: 5320000 rects
+caravel_0008d8db_fill_pattern_3_7: 830000 rects
+caravel_0008d8db_fill_pattern_3_0: 5330000 rects
+caravel_0008d8db_fill_pattern_3_7: 840000 rects
+caravel_0008d8db_fill_pattern_3_0: 5340000 rects
+caravel_0008d8db_fill_pattern_3_7: 850000 rects
+caravel_0008d8db_fill_pattern_2_1: 3800000 rects
+caravel_0008d8db_fill_pattern_3_0: 5350000 rects
+caravel_0008d8db_fill_pattern_3_7: 860000 rects
+caravel_0008d8db_fill_pattern_3_0: 5360000 rects
+caravel_0008d8db_fill_pattern_3_7: 870000 rects
+caravel_0008d8db_fill_pattern_2_1: 3810000 rects
+caravel_0008d8db_fill_pattern_3_0: 5370000 rects
+Ended: 01/01/2023 08:53:26
+caravel_0008d8db_fill_pattern_3_7: 880000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_3_0: 5380000 rects
+caravel_0008d8db_fill_pattern_3_7: 890000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_3_7: 900000 rects
+caravel_0008d8db_fill_pattern_3_0: 5390000 rects
+caravel_0008d8db_fill_pattern_2_1: 3820000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_3_0: 5400000 rects
+caravel_0008d8db_fill_pattern_3_7: 910000 rects
+caravel_0008d8db_fill_pattern_3_7: 920000 rects
+caravel_0008d8db_fill_pattern_3_0: 5410000 rects
+caravel_0008d8db_fill_pattern_3_7: 930000 rects
+caravel_0008d8db_fill_pattern_3_0: 5420000 rects
+caravel_0008d8db_fill_pattern_2_1: 3830000 rects
+caravel_0008d8db_fill_pattern_3_7: 940000 rects
+caravel_0008d8db_fill_pattern_3_0: 5430000 rects
+caravel_0008d8db_fill_pattern_3_7: 950000 rects
+caravel_0008d8db_fill_pattern_3_0: 5440000 rects
+caravel_0008d8db_fill_pattern_3_7: 960000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008d8db_fill_pattern_3_7: 970000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_3_0: 5450000 rects
+caravel_0008d8db_fill_pattern_3_7: 980000 rects
+caravel_0008d8db_fill_pattern_2_1: 3840000 rects
+caravel_0008d8db_fill_pattern_5_5: 10000 rects
+caravel_0008d8db_fill_pattern_3_7: 990000 rects
+caravel_0008d8db_fill_pattern_3_0: 5460000 rects
+caravel_0008d8db_fill_pattern_5_5: 20000 rects
+caravel_0008d8db_fill_pattern_3_7: 1000000 rects
+caravel_0008d8db_fill_pattern_5_5: 30000 rects
+caravel_0008d8db_fill_pattern_3_7: 1010000 rects
+caravel_0008d8db_fill_pattern_5_5: 40000 rects
+caravel_0008d8db_fill_pattern_3_0: 5470000 rects
+caravel_0008d8db_fill_pattern_3_7: 1020000 rects
+caravel_0008d8db_fill_pattern_5_5: 50000 rects
+caravel_0008d8db_fill_pattern_5_5: 60000 rects
+caravel_0008d8db_fill_pattern_3_0: 5480000 rects
+caravel_0008d8db_fill_pattern_2_1: 3850000 rects
+caravel_0008d8db_fill_pattern_5_5: 70000 rects
+caravel_0008d8db_fill_pattern_3_7: 1030000 rects
+caravel_0008d8db_fill_pattern_5_5: 80000 rects
+caravel_0008d8db_fill_pattern_3_0: 5490000 rects
+caravel_0008d8db_fill_pattern_5_5: 90000 rects
+caravel_0008d8db_fill_pattern_3_7: 1040000 rects
+caravel_0008d8db_fill_pattern_3_0: 5500000 rects
+caravel_0008d8db_fill_pattern_5_5: 100000 rects
+caravel_0008d8db_fill_pattern_2_1: 3860000 rects
+caravel_0008d8db_fill_pattern_3_7: 1050000 rects
+caravel_0008d8db_fill_pattern_5_5: 110000 rects
+caravel_0008d8db_fill_pattern_3_0: 5510000 rects
+caravel_0008d8db_fill_pattern_5_5: 120000 rects
+caravel_0008d8db_fill_pattern_5_5: 130000 rects
+caravel_0008d8db_fill_pattern_3_0: 5520000 rects
+caravel_0008d8db_fill_pattern_3_7: 1060000 rects
+caravel_0008d8db_fill_pattern_5_5: 140000 rects
+caravel_0008d8db_fill_pattern_3_0: 5530000 rects
+caravel_0008d8db_fill_pattern_5_5: 150000 rects
+caravel_0008d8db_fill_pattern_3_7: 1070000 rects
+caravel_0008d8db_fill_pattern_2_1: 3870000 rects
+caravel_0008d8db_fill_pattern_3_0: 5540000 rects
+caravel_0008d8db_fill_pattern_5_5: 160000 rects
+caravel_0008d8db_fill_pattern_5_5: 170000 rects
+caravel_0008d8db_fill_pattern_3_7: 1080000 rects
+caravel_0008d8db_fill_pattern_5_5: 180000 rects
+caravel_0008d8db_fill_pattern_3_0: 5550000 rects
+caravel_0008d8db_fill_pattern_5_5: 190000 rects
+caravel_0008d8db_fill_pattern_5_5: 200000 rects
+caravel_0008d8db_fill_pattern_3_7: 1090000 rects
+caravel_0008d8db_fill_pattern_5_5: 210000 rects
+caravel_0008d8db_fill_pattern_2_1: 3880000 rects
+caravel_0008d8db_fill_pattern_3_7: 1100000 rects
+caravel_0008d8db_fill_pattern_3_0: 5560000 rects
+caravel_0008d8db_fill_pattern_3_7: 1110000 rects
+caravel_0008d8db_fill_pattern_5_5: 220000 rects
+caravel_0008d8db_fill_pattern_3_7: 1120000 rects
+caravel_0008d8db_fill_pattern_3_7: 1130000 rects
+caravel_0008d8db_fill_pattern_3_0: 5570000 rects
+caravel_0008d8db_fill_pattern_5_5: 230000 rects
+caravel_0008d8db_fill_pattern_3_0: 5580000 rects
+caravel_0008d8db_fill_pattern_3_0: 5590000 rects
+caravel_0008d8db_fill_pattern_5_5: 240000 rects
+caravel_0008d8db_fill_pattern_2_1: 3890000 rects
+caravel_0008d8db_fill_pattern_3_7: 1140000 rects
+caravel_0008d8db_fill_pattern_3_0: 5600000 rects
+caravel_0008d8db_fill_pattern_5_5: 250000 rects
+caravel_0008d8db_fill_pattern_3_7: 1150000 rects
+caravel_0008d8db_fill_pattern_3_0: 5610000 rects
+caravel_0008d8db_fill_pattern_3_0: 5620000 rects
+caravel_0008d8db_fill_pattern_5_5: 260000 rects
+caravel_0008d8db_fill_pattern_3_0: 5630000 rects
+caravel_0008d8db_fill_pattern_2_1: 3900000 rects
+caravel_0008d8db_fill_pattern_3_7: 1160000 rects
+caravel_0008d8db_fill_pattern_3_0: 5640000 rects
+caravel_0008d8db_fill_pattern_5_5: 270000 rects
+caravel_0008d8db_fill_pattern_3_0: 5650000 rects
+caravel_0008d8db_fill_pattern_3_7: 1170000 rects
+caravel_0008d8db_fill_pattern_3_0: 5660000 rects
+caravel_0008d8db_fill_pattern_5_5: 280000 rects
+caravel_0008d8db_fill_pattern_3_7: 1180000 rects
+caravel_0008d8db_fill_pattern_3_0: 5670000 rects
+caravel_0008d8db_fill_pattern_3_7: 1190000 rects
+caravel_0008d8db_fill_pattern_2_1: 3910000 rects
+caravel_0008d8db_fill_pattern_3_0: 5680000 rects
+caravel_0008d8db_fill_pattern_5_5: 290000 rects
+Ended: 01/01/2023 08:53:28
+caravel_0008d8db_fill_pattern_3_7: 1200000 rects
+caravel_0008d8db_fill_pattern_3_0: 5690000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_3_7: 1210000 rects
+caravel_0008d8db_fill_pattern_5_5: 300000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_3_0: 5700000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_5_5: 310000 rects
+caravel_0008d8db_fill_pattern_3_7: 1220000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_3_0: 5710000 rects
+caravel_0008d8db_fill_pattern_2_1: 3920000 rects
+caravel_0008d8db_fill_pattern_5_5: 320000 rects
+caravel_0008d8db_fill_pattern_3_0: 5720000 rects
+caravel_0008d8db_fill_pattern_3_7: 1230000 rects
+caravel_0008d8db_fill_pattern_5_5: 330000 rects
+caravel_0008d8db_fill_pattern_3_7: 1240000 rects
+caravel_0008d8db_fill_pattern_3_7: 1250000 rects
+caravel_0008d8db_fill_pattern_3_0: 5730000 rects
+caravel_0008d8db_fill_pattern_2_1: 3930000 rects
+caravel_0008d8db_fill_pattern_3_7: 1260000 rects
+caravel_0008d8db_fill_pattern_5_5: 340000 rects
+caravel_0008d8db_fill_pattern_3_0: 5740000 rects
+caravel_0008d8db_fill_pattern_5_5: 350000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_3_0: 5750000 rects
+caravel_0008d8db_fill_pattern_5_5: 360000 rects
+caravel_0008d8db_fill_pattern_3_7: 1270000 rects
+caravel_0008d8db_fill_pattern_2_1: 3940000 rects
+caravel_0008d8db_fill_pattern_5_5: 370000 rects
+caravel_0008d8db_fill_pattern_1_1: 10000 rects
+caravel_0008d8db_fill_pattern_5_5: 380000 rects
+caravel_0008d8db_fill_pattern_3_0: 5760000 rects
+caravel_0008d8db_fill_pattern_1_1: 20000 rects
+caravel_0008d8db_fill_pattern_5_5: 390000 rects
+caravel_0008d8db_fill_pattern_1_1: 30000 rects
+caravel_0008d8db_fill_pattern_1_1: 40000 rects
+caravel_0008d8db_fill_pattern_3_0: 5770000 rects
+caravel_0008d8db_fill_pattern_5_5: 400000 rects
+caravel_0008d8db_fill_pattern_1_1: 50000 rects
+caravel_0008d8db_fill_pattern_2_1: 3950000 rects
+caravel_0008d8db_fill_pattern_5_5: 410000 rects
+caravel_0008d8db_fill_pattern_1_1: 60000 rects
+caravel_0008d8db_fill_pattern_5_5: 420000 rects
+caravel_0008d8db_fill_pattern_3_0: 5780000 rects
+caravel_0008d8db_fill_pattern_1_1: 70000 rects
+caravel_0008d8db_fill_pattern_5_5: 430000 rects
+caravel_0008d8db_fill_pattern_1_1: 80000 rects
+caravel_0008d8db_fill_pattern_1_1: 90000 rects
+caravel_0008d8db_fill_pattern_3_0: 5790000 rects
+caravel_0008d8db_fill_pattern_5_5: 440000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_1_1: 100000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_3_7
+caravel_0008d8db_fill_pattern_5_5: 450000 rects
+caravel_0008d8db_fill_pattern_1_1: 110000 rects
+caravel_0008d8db_fill_pattern_2_1: 3960000 rects
+caravel_0008d8db_fill_pattern_3_0: 5800000 rects
+caravel_0008d8db_fill_pattern_5_5: 460000 rects
+caravel_0008d8db_fill_pattern_1_1: 120000 rects
+caravel_0008d8db_fill_pattern_1_1: 130000 rects
+caravel_0008d8db_fill_pattern_3_0: 5810000 rects
+caravel_0008d8db_fill_pattern_5_5: 470000 rects
+caravel_0008d8db_fill_pattern_1_1: 140000 rects
+caravel_0008d8db_fill_pattern_5_5: 480000 rects
+caravel_0008d8db_fill_pattern_1_1: 150000 rects
+caravel_0008d8db_fill_pattern_3_0: 5820000 rects
+caravel_0008d8db_fill_pattern_1_1: 160000 rects
+caravel_0008d8db_fill_pattern_5_5: 490000 rects
+caravel_0008d8db_fill_pattern_2_1: 3970000 rects
+caravel_0008d8db_fill_pattern_1_1: 170000 rects
+caravel_0008d8db_fill_pattern_3_0: 5830000 rects
+caravel_0008d8db_fill_pattern_5_5: 500000 rects
+caravel_0008d8db_fill_pattern_1_1: 180000 rects
+caravel_0008d8db_fill_pattern_3_0: 5840000 rects
+caravel_0008d8db_fill_pattern_1_1: 190000 rects
+caravel_0008d8db_fill_pattern_5_5: 510000 rects
+caravel_0008d8db_fill_pattern_5_5: 520000 rects
+caravel_0008d8db_fill_pattern_2_1: 3980000 rects
+caravel_0008d8db_fill_pattern_1_1: 200000 rects
+caravel_0008d8db_fill_pattern_3_0: 5850000 rects
+caravel_0008d8db_fill_pattern_5_5: 530000 rects
+caravel_0008d8db_fill_pattern_1_1: 210000 rects
+caravel_0008d8db_fill_pattern_5_5: 540000 rects
+caravel_0008d8db_fill_pattern_3_0: 5860000 rects
+caravel_0008d8db_fill_pattern_1_1: 220000 rects
+caravel_0008d8db_fill_pattern_5_5: 550000 rects
+caravel_0008d8db_fill_pattern_5_5: 560000 rects
+caravel_0008d8db_fill_pattern_1_1: 230000 rects
+caravel_0008d8db_fill_pattern_5_5: 570000 rects
+caravel_0008d8db_fill_pattern_3_0: 5870000 rects
+caravel_0008d8db_fill_pattern_2_1: 3990000 rects
+caravel_0008d8db_fill_pattern_1_1: 240000 rects
+caravel_0008d8db_fill_pattern_5_5: 580000 rects
+caravel_0008d8db_fill_pattern_1_1: 250000 rects
+caravel_0008d8db_fill_pattern_3_0: 5880000 rects
+caravel_0008d8db_fill_pattern_5_5: 590000 rects
+caravel_0008d8db_fill_pattern_1_1: 260000 rects
+caravel_0008d8db_fill_pattern_5_5: 600000 rects
+caravel_0008d8db_fill_pattern_3_0: 5890000 rects
+caravel_0008d8db_fill_pattern_2_1: 4000000 rects
+caravel_0008d8db_fill_pattern_1_1: 270000 rects
+caravel_0008d8db_fill_pattern_5_5: 610000 rects
+caravel_0008d8db_fill_pattern_1_1: 280000 rects
+caravel_0008d8db_fill_pattern_3_0: 5900000 rects
+caravel_0008d8db_fill_pattern_1_1: 290000 rects
+caravel_0008d8db_fill_pattern_5_5: 620000 rects
+caravel_0008d8db_fill_pattern_1_1: 300000 rects
+caravel_0008d8db_fill_pattern_5_5: 630000 rects
+caravel_0008d8db_fill_pattern_3_0: 5910000 rects
+caravel_0008d8db_fill_pattern_5_5: 640000 rects
+caravel_0008d8db_fill_pattern_1_1: 310000 rects
+caravel_0008d8db_fill_pattern_2_1: 4010000 rects
+caravel_0008d8db_fill_pattern_5_5: 650000 rects
+caravel_0008d8db_fill_pattern_1_1: 320000 rects
+caravel_0008d8db_fill_pattern_3_0: 5920000 rects
+caravel_0008d8db_fill_pattern_5_5: 660000 rects
+caravel_0008d8db_fill_pattern_1_1: 330000 rects
+caravel_0008d8db_fill_pattern_1_1: 340000 rects
+caravel_0008d8db_fill_pattern_5_5: 670000 rects
+caravel_0008d8db_fill_pattern_3_0: 5930000 rects
+caravel_0008d8db_fill_pattern_1_1: 350000 rects
+caravel_0008d8db_fill_pattern_5_5: 680000 rects
+caravel_0008d8db_fill_pattern_2_1: 4020000 rects
+caravel_0008d8db_fill_pattern_3_0: 5940000 rects
+caravel_0008d8db_fill_pattern_1_1: 360000 rects
+caravel_0008d8db_fill_pattern_5_5: 690000 rects
+caravel_0008d8db_fill_pattern_5_5: 700000 rects
+caravel_0008d8db_fill_pattern_3_0: 5950000 rects
+caravel_0008d8db_fill_pattern_1_1: 370000 rects
+caravel_0008d8db_fill_pattern_5_5: 710000 rects
+caravel_0008d8db_fill_pattern_1_1: 380000 rects
+caravel_0008d8db_fill_pattern_3_0: 5960000 rects
+caravel_0008d8db_fill_pattern_2_1: 4030000 rects
+caravel_0008d8db_fill_pattern_5_5: 720000 rects
+caravel_0008d8db_fill_pattern_1_1: 390000 rects
+caravel_0008d8db_fill_pattern_5_5: 730000 rects
+caravel_0008d8db_fill_pattern_3_0: 5970000 rects
+caravel_0008d8db_fill_pattern_1_1: 400000 rects
+caravel_0008d8db_fill_pattern_5_5: 740000 rects
+caravel_0008d8db_fill_pattern_1_1: 410000 rects
+caravel_0008d8db_fill_pattern_2_1: 4040000 rects
+caravel_0008d8db_fill_pattern_3_0: 5980000 rects
+caravel_0008d8db_fill_pattern_1_1: 420000 rects
+caravel_0008d8db_fill_pattern_5_5: 750000 rects
+caravel_0008d8db_fill_pattern_1_1: 430000 rects
+caravel_0008d8db_fill_pattern_3_0: 5990000 rects
+caravel_0008d8db_fill_pattern_2_1: 4050000 rects
+caravel_0008d8db_fill_pattern_1_1: 440000 rects
+caravel_0008d8db_fill_pattern_1_1: 450000 rects
+caravel_0008d8db_fill_pattern_3_0: 6000000 rects
+caravel_0008d8db_fill_pattern_1_1: 460000 rects
+caravel_0008d8db_fill_pattern_2_1: 4060000 rects
+caravel_0008d8db_fill_pattern_1_1: 470000 rects
+caravel_0008d8db_fill_pattern_3_0: 6010000 rects
+caravel_0008d8db_fill_pattern_1_1: 480000 rects
+caravel_0008d8db_fill_pattern_2_1: 4070000 rects
+caravel_0008d8db_fill_pattern_1_1: 490000 rects
+caravel_0008d8db_fill_pattern_3_0: 6020000 rects
+caravel_0008d8db_fill_pattern_1_1: 500000 rects
+caravel_0008d8db_fill_pattern_1_1: 510000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_3_0: 6030000 rects
+caravel_0008d8db_fill_pattern_2_1: 4080000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_5_5
+caravel_0008d8db_fill_pattern_1_1: 520000 rects
+caravel_0008d8db_fill_pattern_2_1: 4090000 rects
+caravel_0008d8db_fill_pattern_1_1: 530000 rects
+caravel_0008d8db_fill_pattern_3_0: 6040000 rects
+caravel_0008d8db_fill_pattern_1_1: 540000 rects
+caravel_0008d8db_fill_pattern_2_1: 4100000 rects
+caravel_0008d8db_fill_pattern_1_1: 550000 rects
+caravel_0008d8db_fill_pattern_3_0: 6050000 rects
+caravel_0008d8db_fill_pattern_1_1: 560000 rects
+caravel_0008d8db_fill_pattern_3_0: 6060000 rects
+caravel_0008d8db_fill_pattern_1_1: 570000 rects
+caravel_0008d8db_fill_pattern_2_1: 4110000 rects
+caravel_0008d8db_fill_pattern_1_1: 580000 rects
+caravel_0008d8db_fill_pattern_3_0: 6070000 rects
+caravel_0008d8db_fill_pattern_1_1: 590000 rects
+caravel_0008d8db_fill_pattern_1_1: 600000 rects
+caravel_0008d8db_fill_pattern_2_1: 4120000 rects
+caravel_0008d8db_fill_pattern_3_0: 6080000 rects
+caravel_0008d8db_fill_pattern_1_1: 610000 rects
+caravel_0008d8db_fill_pattern_1_1: 620000 rects
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+caravel_0008d8db_fill_pattern_1_1: 2250000 rects
+caravel_0008d8db_fill_pattern_2_1: 4910000 rects
+Ended: 01/01/2023 08:53:39
+caravel_0008d8db_fill_pattern_1_1: 2260000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
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+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
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+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+caravel_0008d8db_fill_pattern_3_0: 6920000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
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+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_3_0
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+caravel_0008d8db_fill_pattern_1_1: 3180000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_2_1
+caravel_0008d8db_fill_pattern_1_1: 3190000 rects
+caravel_0008d8db_fill_pattern_1_1: 3200000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_0_2
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+caravel_0008d8db_fill_pattern_1_1: 3220000 rects
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+caravel_0008d8db_fill_pattern_1_1: 3580000 rects
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+caravel_0008d8db_fill_pattern_1_1: 3600000 rects
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+caravel_0008d8db_fill_pattern_1_1: 3630000 rects
+caravel_0008d8db_fill_pattern_1_1: 3640000 rects
+caravel_0008d8db_fill_pattern_1_1: 3650000 rects
+caravel_0008d8db_fill_pattern_1_1: 3660000 rects
+caravel_0008d8db_fill_pattern_1_1: 3670000 rects
+caravel_0008d8db_fill_pattern_1_1: 3680000 rects
+caravel_0008d8db_fill_pattern_1_1: 3690000 rects
+caravel_0008d8db_fill_pattern_1_1: 3700000 rects
+caravel_0008d8db_fill_pattern_1_1: 3710000 rects
+caravel_0008d8db_fill_pattern_1_1: 3720000 rects
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+caravel_0008d8db_fill_pattern_1_1: 3750000 rects
+caravel_0008d8db_fill_pattern_1_1: 3760000 rects
+Ended: 01/01/2023 08:54:00
+caravel_0008d8db_fill_pattern_1_1: 3770000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_1_1: 3780000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_1_1: 3790000 rects
+caravel_0008d8db_fill_pattern_1_1: 3800000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008d8db_fill_pattern_1_1: 4990000 rects
+Ended: 01/01/2023 08:54:15
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_2_0: 2640000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_1_1: 5000000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_1_1: 5010000 rects
+caravel_0008d8db_fill_pattern_2_0: 2650000 rects
+caravel_0008d8db_fill_pattern_1_1: 5020000 rects
+caravel_0008d8db_fill_pattern_1_1: 5030000 rects
+caravel_0008d8db_fill_pattern_2_0: 2660000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled magic input cell caravel_0008d8db_fill_pattern_2_6 geometry by factor of 2
+caravel_0008d8db_fill_pattern_1_1: 5040000 rects
+caravel_0008d8db_fill_pattern_1_1: 5050000 rects
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+caravel_0008d8db_fill_pattern_1_1: 5060000 rects
+caravel_0008d8db_fill_pattern_1_1: 5070000 rects
+caravel_0008d8db_fill_pattern_2_0: 2680000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_2_6
+caravel_0008d8db_fill_pattern_1_1: 5080000 rects
+caravel_0008d8db_fill_pattern_2_0: 2690000 rects
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+caravel_0008d8db_fill_pattern_2_0: 2870000 rects
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+caravel_0008d8db_fill_pattern_1_1: 5450000 rects
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+caravel_0008d8db_fill_pattern_1_1: 5490000 rects
+caravel_0008d8db_fill_pattern_2_0: 2900000 rects
+Ended: 01/01/2023 08:54:20
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_1_1: 5500000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_1_1: 5510000 rects
+caravel_0008d8db_fill_pattern_2_0: 2910000 rects
+caravel_0008d8db_fill_pattern_1_1: 5520000 rects
+caravel_0008d8db_fill_pattern_1_1: 5530000 rects
+caravel_0008d8db_fill_pattern_2_0: 2920000 rects
+caravel_0008d8db_fill_pattern_1_1: 5540000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_1_1: 5550000 rects
+caravel_0008d8db_fill_pattern_4_4: 10000 rects
+caravel_0008d8db_fill_pattern_2_0: 2930000 rects
+caravel_0008d8db_fill_pattern_4_4: 20000 rects
+caravel_0008d8db_fill_pattern_4_4: 30000 rects
+caravel_0008d8db_fill_pattern_4_4: 40000 rects
+caravel_0008d8db_fill_pattern_1_1: 5560000 rects
+caravel_0008d8db_fill_pattern_4_4: 50000 rects
+caravel_0008d8db_fill_pattern_4_4: 60000 rects
+caravel_0008d8db_fill_pattern_4_4: 70000 rects
+caravel_0008d8db_fill_pattern_1_1: 5570000 rects
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+caravel_0008d8db_fill_pattern_4_4: 90000 rects
+caravel_0008d8db_fill_pattern_4_4: 100000 rects
+caravel_0008d8db_fill_pattern_1_1: 5580000 rects
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+caravel_0008d8db_fill_pattern_4_4: 140000 rects
+caravel_0008d8db_fill_pattern_4_4: 150000 rects
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+caravel_0008d8db_fill_pattern_4_4: 190000 rects
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+caravel_0008d8db_fill_pattern_4_4: 200000 rects
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+caravel_0008d8db_fill_pattern_1_1: 5690000 rects
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+caravel_0008d8db_fill_pattern_4_4: 550000 rects
+caravel_0008d8db_fill_pattern_1_1: 5870000 rects
+caravel_0008d8db_fill_pattern_2_0: 3120000 rects
+caravel_0008d8db_fill_pattern_4_4: 560000 rects
+caravel_0008d8db_fill_pattern_4_4: 570000 rects
+caravel_0008d8db_fill_pattern_2_0: 3130000 rects
+caravel_0008d8db_fill_pattern_1_1: 5880000 rects
+caravel_0008d8db_fill_pattern_4_4: 580000 rects
+caravel_0008d8db_fill_pattern_4_4: 590000 rects
+caravel_0008d8db_fill_pattern_2_0: 3140000 rects
+caravel_0008d8db_fill_pattern_4_4: 600000 rects
+caravel_0008d8db_fill_pattern_1_1: 5890000 rects
+caravel_0008d8db_fill_pattern_4_4: 610000 rects
+caravel_0008d8db_fill_pattern_2_0: 3150000 rects
+caravel_0008d8db_fill_pattern_4_4: 620000 rects
+caravel_0008d8db_fill_pattern_1_1: 5900000 rects
+caravel_0008d8db_fill_pattern_4_4: 630000 rects
+caravel_0008d8db_fill_pattern_4_4: 640000 rects
+caravel_0008d8db_fill_pattern_2_0: 3160000 rects
+caravel_0008d8db_fill_pattern_4_4: 650000 rects
+caravel_0008d8db_fill_pattern_1_1: 5910000 rects
+caravel_0008d8db_fill_pattern_4_4: 660000 rects
+caravel_0008d8db_fill_pattern_4_4: 670000 rects
+caravel_0008d8db_fill_pattern_4_4: 680000 rects
+caravel_0008d8db_fill_pattern_2_0: 3170000 rects
+caravel_0008d8db_fill_pattern_4_4: 690000 rects
+caravel_0008d8db_fill_pattern_4_4: 700000 rects
+caravel_0008d8db_fill_pattern_4_4: 710000 rects
+caravel_0008d8db_fill_pattern_2_0: 3180000 rects
+caravel_0008d8db_fill_pattern_1_1: 5920000 rects
+caravel_0008d8db_fill_pattern_2_0: 3190000 rects
+caravel_0008d8db_fill_pattern_4_4: 720000 rects
+caravel_0008d8db_fill_pattern_1_1: 5930000 rects
+caravel_0008d8db_fill_pattern_4_4: 730000 rects
+caravel_0008d8db_fill_pattern_4_4: 740000 rects
+caravel_0008d8db_fill_pattern_2_0: 3200000 rects
+caravel_0008d8db_fill_pattern_4_4: 750000 rects
+caravel_0008d8db_fill_pattern_4_4: 760000 rects
+caravel_0008d8db_fill_pattern_2_0: 3210000 rects
+caravel_0008d8db_fill_pattern_1_1: 5940000 rects
+caravel_0008d8db_fill_pattern_4_4: 770000 rects
+caravel_0008d8db_fill_pattern_4_4: 780000 rects
+caravel_0008d8db_fill_pattern_4_4: 790000 rects
+caravel_0008d8db_fill_pattern_4_4: 800000 rects
+caravel_0008d8db_fill_pattern_2_0: 3220000 rects
+caravel_0008d8db_fill_pattern_4_4: 810000 rects
+caravel_0008d8db_fill_pattern_1_1: 5950000 rects
+caravel_0008d8db_fill_pattern_4_4: 820000 rects
+caravel_0008d8db_fill_pattern_2_0: 3230000 rects
+caravel_0008d8db_fill_pattern_4_4: 830000 rects
+caravel_0008d8db_fill_pattern_4_4: 840000 rects
+caravel_0008d8db_fill_pattern_1_1: 5960000 rects
+caravel_0008d8db_fill_pattern_2_0: 3240000 rects
+caravel_0008d8db_fill_pattern_4_4: 850000 rects
+caravel_0008d8db_fill_pattern_1_1: 5970000 rects
+caravel_0008d8db_fill_pattern_4_4: 860000 rects
+caravel_0008d8db_fill_pattern_2_0: 3250000 rects
+caravel_0008d8db_fill_pattern_4_4: 870000 rects
+caravel_0008d8db_fill_pattern_4_4: 880000 rects
+caravel_0008d8db_fill_pattern_1_1: 5980000 rects
+caravel_0008d8db_fill_pattern_4_4: 890000 rects
+caravel_0008d8db_fill_pattern_2_0: 3260000 rects
+caravel_0008d8db_fill_pattern_1_1: 5990000 rects
+caravel_0008d8db_fill_pattern_2_0: 3270000 rects
+caravel_0008d8db_fill_pattern_1_1: 6000000 rects
+caravel_0008d8db_fill_pattern_1_1: 6010000 rects
+caravel_0008d8db_fill_pattern_1_1: 6020000 rects
+caravel_0008d8db_fill_pattern_1_1: 6030000 rects
+caravel_0008d8db_fill_pattern_2_0: 3280000 rects
+caravel_0008d8db_fill_pattern_1_1: 6040000 rects
+caravel_0008d8db_fill_pattern_1_1: 6050000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_4_4
+caravel_0008d8db_fill_pattern_1_1: 6060000 rects
+caravel_0008d8db_fill_pattern_2_0: 3290000 rects
+caravel_0008d8db_fill_pattern_1_1: 6070000 rects
+caravel_0008d8db_fill_pattern_1_1: 6080000 rects
+caravel_0008d8db_fill_pattern_2_0: 3300000 rects
+caravel_0008d8db_fill_pattern_1_1: 6090000 rects
+caravel_0008d8db_fill_pattern_1_1: 6100000 rects
+caravel_0008d8db_fill_pattern_2_0: 3310000 rects
+caravel_0008d8db_fill_pattern_1_1: 6110000 rects
+caravel_0008d8db_fill_pattern_2_0: 3320000 rects
+caravel_0008d8db_fill_pattern_1_1: 6120000 rects
+caravel_0008d8db_fill_pattern_1_1: 6130000 rects
+caravel_0008d8db_fill_pattern_2_0: 3330000 rects
+caravel_0008d8db_fill_pattern_1_1: 6140000 rects
+caravel_0008d8db_fill_pattern_2_0: 3340000 rects
+caravel_0008d8db_fill_pattern_1_1: 6150000 rects
+Ended: 01/01/2023 08:54:27
+caravel_0008d8db_fill_pattern_2_0: 3350000 rects
+caravel_0008d8db_fill_pattern_1_1: 6160000 rects
+caravel_0008d8db_fill_pattern_1_1: 6170000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_1_1: 6180000 rects
+caravel_0008d8db_fill_pattern_1_1: 6190000 rects
+caravel_0008d8db_fill_pattern_2_0: 3360000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_1_1: 6200000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_2_0: 3370000 rects
+caravel_0008d8db_fill_pattern_1_1: 6210000 rects
+caravel_0008d8db_fill_pattern_2_0: 3380000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_3_5: 10000 rects
+caravel_0008d8db_fill_pattern_1_1: 6220000 rects
+caravel_0008d8db_fill_pattern_3_5: 20000 rects
+caravel_0008d8db_fill_pattern_3_5: 30000 rects
+caravel_0008d8db_fill_pattern_2_0: 3390000 rects
+caravel_0008d8db_fill_pattern_3_5: 40000 rects
+caravel_0008d8db_fill_pattern_3_5: 50000 rects
+caravel_0008d8db_fill_pattern_3_5: 60000 rects
+caravel_0008d8db_fill_pattern_3_5: 70000 rects
+caravel_0008d8db_fill_pattern_3_5: 80000 rects
+caravel_0008d8db_fill_pattern_2_0: 3400000 rects
+caravel_0008d8db_fill_pattern_3_5: 90000 rects
+caravel_0008d8db_fill_pattern_3_5: 100000 rects
+caravel_0008d8db_fill_pattern_3_5: 110000 rects
+caravel_0008d8db_fill_pattern_2_0: 3410000 rects
+caravel_0008d8db_fill_pattern_3_5: 120000 rects
+caravel_0008d8db_fill_pattern_3_5: 130000 rects
+Ended: 01/01/2023 08:54:29
+caravel_0008d8db_fill_pattern_3_5: 140000 rects
+caravel_0008d8db_fill_pattern_3_5: 150000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_3_5: 160000 rects
+caravel_0008d8db_fill_pattern_2_0: 3420000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_3_5: 170000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_2_0: 3430000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_1_1
+caravel_0008d8db_fill_pattern_3_5: 180000 rects
+caravel_0008d8db_fill_pattern_3_5: 190000 rects
+caravel_0008d8db_fill_pattern_2_0: 3440000 rects
+caravel_0008d8db_fill_pattern_3_5: 200000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_2_0: 3450000 rects
+caravel_0008d8db_fill_pattern_1_7: 10000 rects
+caravel_0008d8db_fill_pattern_3_5: 210000 rects
+caravel_0008d8db_fill_pattern_1_7: 20000 rects
+caravel_0008d8db_fill_pattern_1_7: 30000 rects
+caravel_0008d8db_fill_pattern_3_5: 220000 rects
+caravel_0008d8db_fill_pattern_1_7: 40000 rects
+caravel_0008d8db_fill_pattern_2_0: 3460000 rects
+caravel_0008d8db_fill_pattern_1_7: 50000 rects
+caravel_0008d8db_fill_pattern_1_7: 60000 rects
+caravel_0008d8db_fill_pattern_3_5: 230000 rects
+caravel_0008d8db_fill_pattern_1_7: 70000 rects
+caravel_0008d8db_fill_pattern_1_7: 80000 rects
+caravel_0008d8db_fill_pattern_1_7: 90000 rects
+caravel_0008d8db_fill_pattern_1_7: 100000 rects
+caravel_0008d8db_fill_pattern_3_5: 240000 rects
+caravel_0008d8db_fill_pattern_2_0: 3470000 rects
+caravel_0008d8db_fill_pattern_1_7: 110000 rects
+caravel_0008d8db_fill_pattern_1_7: 120000 rects
+caravel_0008d8db_fill_pattern_1_7: 130000 rects
+caravel_0008d8db_fill_pattern_3_5: 250000 rects
+caravel_0008d8db_fill_pattern_1_7: 140000 rects
+caravel_0008d8db_fill_pattern_1_7: 150000 rects
+caravel_0008d8db_fill_pattern_2_0: 3480000 rects
+caravel_0008d8db_fill_pattern_1_7: 160000 rects
+caravel_0008d8db_fill_pattern_3_5: 260000 rects
+caravel_0008d8db_fill_pattern_1_7: 170000 rects
+caravel_0008d8db_fill_pattern_1_7: 180000 rects
+caravel_0008d8db_fill_pattern_3_5: 270000 rects
+caravel_0008d8db_fill_pattern_1_7: 190000 rects
+caravel_0008d8db_fill_pattern_1_7: 200000 rects
+caravel_0008d8db_fill_pattern_2_0: 3490000 rects
+caravel_0008d8db_fill_pattern_1_7: 210000 rects
+caravel_0008d8db_fill_pattern_3_5: 280000 rects
+caravel_0008d8db_fill_pattern_1_7: 220000 rects
+caravel_0008d8db_fill_pattern_1_7: 230000 rects
+caravel_0008d8db_fill_pattern_3_5: 290000 rects
+caravel_0008d8db_fill_pattern_1_7: 240000 rects
+caravel_0008d8db_fill_pattern_1_7: 250000 rects
+caravel_0008d8db_fill_pattern_2_0: 3500000 rects
+Ended: 01/01/2023 08:54:30
+caravel_0008d8db_fill_pattern_3_5: 300000 rects
+caravel_0008d8db_fill_pattern_1_7: 260000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_3_5: 310000 rects
+caravel_0008d8db_fill_pattern_1_7: 270000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_1_7: 280000 rects
+caravel_0008d8db_fill_pattern_3_5: 320000 rects
+caravel_0008d8db_fill_pattern_2_0: 3510000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_1_7: 290000 rects
+caravel_0008d8db_fill_pattern_3_5: 330000 rects
+caravel_0008d8db_fill_pattern_1_7: 300000 rects
+caravel_0008d8db_fill_pattern_1_7: 310000 rects
+caravel_0008d8db_fill_pattern_2_0: 3520000 rects
+caravel_0008d8db_fill_pattern_3_5: 340000 rects
+caravel_0008d8db_fill_pattern_1_7: 320000 rects
+Ended: 01/01/2023 08:54:30
+caravel_0008d8db_fill_pattern_1_7: 330000 rects
+caravel_0008d8db_fill_pattern_3_5: 350000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_1_7: 340000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_2_0: 3530000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_1_7: 350000 rects
+caravel_0008d8db_fill_pattern_3_5: 360000 rects
+caravel_0008d8db_fill_pattern_1_7: 360000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_5_3: 10000 rects
+caravel_0008d8db_fill_pattern_3_5: 370000 rects
+caravel_0008d8db_fill_pattern_5_3: 20000 rects
+caravel_0008d8db_fill_pattern_1_7: 370000 rects
+caravel_0008d8db_fill_pattern_5_3: 30000 rects
+caravel_0008d8db_fill_pattern_1_7: 380000 rects
+caravel_0008d8db_fill_pattern_5_3: 40000 rects
+caravel_0008d8db_fill_pattern_1_7: 390000 rects
+caravel_0008d8db_fill_pattern_5_3: 50000 rects
+caravel_0008d8db_fill_pattern_2_0: 3540000 rects
+caravel_0008d8db_fill_pattern_5_3: 60000 rects
+caravel_0008d8db_fill_pattern_1_7: 400000 rects
+caravel_0008d8db_fill_pattern_5_3: 70000 rects
+caravel_0008d8db_fill_pattern_1_7: 410000 rects
+caravel_0008d8db_fill_pattern_5_3: 80000 rects
+caravel_0008d8db_fill_pattern_1_7: 420000 rects
+caravel_0008d8db_fill_pattern_5_3: 90000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008d8db_fill_pattern_5_3: 100000 rects
+caravel_0008d8db_fill_pattern_2_0: 3550000 rects
+caravel_0008d8db_fill_pattern_1_7: 430000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_5_3: 110000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_0_0: 10000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_3_5
+caravel_0008d8db_fill_pattern_1_7: 440000 rects
+caravel_0008d8db_fill_pattern_5_3: 120000 rects
+caravel_0008d8db_fill_pattern_0_0: 20000 rects
+caravel_0008d8db_fill_pattern_0_0: 30000 rects
+caravel_0008d8db_fill_pattern_2_0: 3560000 rects
+caravel_0008d8db_fill_pattern_0_0: 40000 rects
+caravel_0008d8db_fill_pattern_5_3: 130000 rects
+caravel_0008d8db_fill_pattern_0_0: 50000 rects
+caravel_0008d8db_fill_pattern_1_7: 450000 rects
+caravel_0008d8db_fill_pattern_5_3: 140000 rects
+caravel_0008d8db_fill_pattern_0_0: 60000 rects
+caravel_0008d8db_fill_pattern_5_3: 150000 rects
+caravel_0008d8db_fill_pattern_0_0: 70000 rects
+caravel_0008d8db_fill_pattern_1_7: 460000 rects
+caravel_0008d8db_fill_pattern_5_3: 160000 rects
+caravel_0008d8db_fill_pattern_0_0: 80000 rects
+caravel_0008d8db_fill_pattern_2_0: 3570000 rects
+caravel_0008d8db_fill_pattern_5_3: 170000 rects
+caravel_0008d8db_fill_pattern_0_0: 90000 rects
+caravel_0008d8db_fill_pattern_1_7: 470000 rects
+caravel_0008d8db_fill_pattern_0_0: 100000 rects
+caravel_0008d8db_fill_pattern_5_3: 180000 rects
+caravel_0008d8db_fill_pattern_0_0: 110000 rects
+caravel_0008d8db_fill_pattern_5_3: 190000 rects
+caravel_0008d8db_fill_pattern_0_0: 120000 rects
+caravel_0008d8db_fill_pattern_1_7: 480000 rects
+caravel_0008d8db_fill_pattern_0_0: 130000 rects
+caravel_0008d8db_fill_pattern_2_0: 3580000 rects
+caravel_0008d8db_fill_pattern_5_3: 200000 rects
+caravel_0008d8db_fill_pattern_0_0: 140000 rects
+caravel_0008d8db_fill_pattern_1_7: 490000 rects
+caravel_0008d8db_fill_pattern_0_0: 150000 rects
+caravel_0008d8db_fill_pattern_0_0: 160000 rects
+caravel_0008d8db_fill_pattern_5_3: 210000 rects
+caravel_0008d8db_fill_pattern_1_7: 500000 rects
+caravel_0008d8db_fill_pattern_0_0: 170000 rects
+caravel_0008d8db_fill_pattern_2_0: 3590000 rects
+caravel_0008d8db_fill_pattern_0_0: 180000 rects
+caravel_0008d8db_fill_pattern_5_3: 220000 rects
+caravel_0008d8db_fill_pattern_1_7: 510000 rects
+caravel_0008d8db_fill_pattern_0_0: 190000 rects
+caravel_0008d8db_fill_pattern_0_0: 200000 rects
+caravel_0008d8db_fill_pattern_1_7: 520000 rects
+caravel_0008d8db_fill_pattern_5_3: 230000 rects
+caravel_0008d8db_fill_pattern_0_0: 210000 rects
+caravel_0008d8db_fill_pattern_0_0: 220000 rects
+caravel_0008d8db_fill_pattern_5_3: 240000 rects
+caravel_0008d8db_fill_pattern_1_7: 530000 rects
+caravel_0008d8db_fill_pattern_2_0: 3600000 rects
+caravel_0008d8db_fill_pattern_0_0: 230000 rects
+caravel_0008d8db_fill_pattern_0_0: 240000 rects
+caravel_0008d8db_fill_pattern_1_7: 540000 rects
+caravel_0008d8db_fill_pattern_5_3: 250000 rects
+caravel_0008d8db_fill_pattern_0_0: 250000 rects
+caravel_0008d8db_fill_pattern_0_0: 260000 rects
+caravel_0008d8db_fill_pattern_1_7: 550000 rects
+caravel_0008d8db_fill_pattern_5_3: 260000 rects
+caravel_0008d8db_fill_pattern_2_0: 3610000 rects
+caravel_0008d8db_fill_pattern_0_0: 270000 rects
+caravel_0008d8db_fill_pattern_0_0: 280000 rects
+caravel_0008d8db_fill_pattern_1_7: 560000 rects
+caravel_0008d8db_fill_pattern_0_0: 290000 rects
+caravel_0008d8db_fill_pattern_5_3: 270000 rects
+caravel_0008d8db_fill_pattern_0_0: 300000 rects
+caravel_0008d8db_fill_pattern_1_7: 570000 rects
+caravel_0008d8db_fill_pattern_5_3: 280000 rects
+caravel_0008d8db_fill_pattern_0_0: 310000 rects
+caravel_0008d8db_fill_pattern_2_0: 3620000 rects
+caravel_0008d8db_fill_pattern_0_0: 320000 rects
+caravel_0008d8db_fill_pattern_1_7: 580000 rects
+caravel_0008d8db_fill_pattern_5_3: 290000 rects
+caravel_0008d8db_fill_pattern_0_0: 330000 rects
+caravel_0008d8db_fill_pattern_0_0: 340000 rects
+caravel_0008d8db_fill_pattern_5_3: 300000 rects
+caravel_0008d8db_fill_pattern_1_7: 590000 rects
+caravel_0008d8db_fill_pattern_0_0: 350000 rects
+caravel_0008d8db_fill_pattern_5_3: 310000 rects
+caravel_0008d8db_fill_pattern_2_0: 3630000 rects
+caravel_0008d8db_fill_pattern_0_0: 360000 rects
+caravel_0008d8db_fill_pattern_5_3: 320000 rects
+caravel_0008d8db_fill_pattern_1_7: 600000 rects
+caravel_0008d8db_fill_pattern_0_0: 370000 rects
+caravel_0008d8db_fill_pattern_5_3: 330000 rects
+caravel_0008d8db_fill_pattern_0_0: 380000 rects
+caravel_0008d8db_fill_pattern_1_7: 610000 rects
+caravel_0008d8db_fill_pattern_5_3: 340000 rects
+caravel_0008d8db_fill_pattern_0_0: 390000 rects
+caravel_0008d8db_fill_pattern_5_3: 350000 rects
+caravel_0008d8db_fill_pattern_2_0: 3640000 rects
+caravel_0008d8db_fill_pattern_1_7: 620000 rects
+caravel_0008d8db_fill_pattern_0_0: 400000 rects
+caravel_0008d8db_fill_pattern_5_3: 360000 rects
+caravel_0008d8db_fill_pattern_0_0: 410000 rects
+caravel_0008d8db_fill_pattern_5_3: 370000 rects
+caravel_0008d8db_fill_pattern_1_7: 630000 rects
+caravel_0008d8db_fill_pattern_0_0: 420000 rects
+caravel_0008d8db_fill_pattern_5_3: 380000 rects
+caravel_0008d8db_fill_pattern_0_0: 430000 rects
+caravel_0008d8db_fill_pattern_1_7: 640000 rects
+caravel_0008d8db_fill_pattern_5_3: 390000 rects
+caravel_0008d8db_fill_pattern_0_0: 440000 rects
+caravel_0008d8db_fill_pattern_2_0: 3650000 rects
+caravel_0008d8db_fill_pattern_0_0: 450000 rects
+caravel_0008d8db_fill_pattern_5_3: 400000 rects
+caravel_0008d8db_fill_pattern_1_7: 650000 rects
+caravel_0008d8db_fill_pattern_0_0: 460000 rects
+caravel_0008d8db_fill_pattern_5_3: 410000 rects
+caravel_0008d8db_fill_pattern_0_0: 470000 rects
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+   Generating output for cell caravel_0008d8db_fill_pattern_1_7
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+caravel_0008d8db_fill_pattern_0_0: 2080000 rects
+caravel_0008d8db_fill_pattern_0_0: 2090000 rects
+caravel_0008d8db_fill_pattern_2_0: 4590000 rects
+caravel_0008d8db_fill_pattern_0_0: 2100000 rects
+caravel_0008d8db_fill_pattern_0_0: 2110000 rects
+caravel_0008d8db_fill_pattern_2_0: 4600000 rects
+caravel_0008d8db_fill_pattern_0_0: 2120000 rects
+caravel_0008d8db_fill_pattern_0_0: 2130000 rects
+caravel_0008d8db_fill_pattern_0_0: 2140000 rects
+caravel_0008d8db_fill_pattern_2_0: 4610000 rects
+caravel_0008d8db_fill_pattern_0_0: 2150000 rects
+caravel_0008d8db_fill_pattern_0_0: 2160000 rects
+caravel_0008d8db_fill_pattern_2_0: 4620000 rects
+caravel_0008d8db_fill_pattern_0_0: 2170000 rects
+caravel_0008d8db_fill_pattern_0_0: 2180000 rects
+caravel_0008d8db_fill_pattern_2_0: 4630000 rects
+caravel_0008d8db_fill_pattern_0_0: 2190000 rects
+caravel_0008d8db_fill_pattern_0_0: 2200000 rects
+caravel_0008d8db_fill_pattern_2_0: 4640000 rects
+caravel_0008d8db_fill_pattern_0_0: 2210000 rects
+caravel_0008d8db_fill_pattern_2_0: 4650000 rects
+Ended: 01/01/2023 08:54:41
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_0_0: 2220000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_2_0: 4660000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_2_0: 4670000 rects
+caravel_0008d8db_fill_pattern_0_0: 2230000 rects
+caravel_0008d8db_fill_pattern_2_0: 4680000 rects
+caravel_0008d8db_fill_pattern_2_0: 4690000 rects
+caravel_0008d8db_fill_pattern_0_0: 2240000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+caravel_0008d8db_fill_pattern_2_0: 4700000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_0_0: 2250000 rects
+caravel_0008d8db_fill_pattern_2_0: 4710000 rects
+caravel_0008d8db_fill_pattern_2_0: 4720000 rects
+caravel_0008d8db_fill_pattern_0_0: 2260000 rects
+caravel_0008d8db_fill_pattern_2_0: 4730000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_0_0: 2270000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_5_7
+caravel_0008d8db_fill_pattern_2_0: 4740000 rects
+caravel_0008d8db_fill_pattern_2_0: 4750000 rects
+caravel_0008d8db_fill_pattern_0_0: 2280000 rects
+caravel_0008d8db_fill_pattern_2_0: 4760000 rects
+caravel_0008d8db_fill_pattern_2_0: 4770000 rects
+caravel_0008d8db_fill_pattern_0_0: 2290000 rects
+caravel_0008d8db_fill_pattern_2_0: 4780000 rects
+caravel_0008d8db_fill_pattern_0_0: 2300000 rects
+caravel_0008d8db_fill_pattern_2_0: 4790000 rects
+Ended: 01/01/2023 08:54:43
+caravel_0008d8db_fill_pattern_2_0: 4800000 rects
+caravel_0008d8db_fill_pattern_0_0: 2310000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_2_0: 4810000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_0_0: 2320000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_2_0: 4820000 rects
+caravel_0008d8db_fill_pattern_2_0: 4830000 rects
+caravel_0008d8db_fill_pattern_0_0: 2330000 rects
+caravel_0008d8db_fill_pattern_2_0: 4840000 rects
+Ended: 01/01/2023 08:54:43
+The following types are not handled by extraction and will be treated as non-electrical types:
+caravel_0008d8db_fill_pattern_2_0: 4850000 rects
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_0_0: 2340000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_3_1: 10000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_2_0: 4860000 rects
+caravel_0008d8db_fill_pattern_3_1: 20000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_3_1: 30000 rects
+caravel_0008d8db_fill_pattern_3_1: 40000 rects
+caravel_0008d8db_fill_pattern_0_0: 2350000 rects
+caravel_0008d8db_fill_pattern_3_1: 50000 rects
+caravel_0008d8db_fill_pattern_2_0: 4870000 rects
+Ended: 01/01/2023 08:54:44
+caravel_0008d8db_fill_pattern_3_1: 60000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008d8db_fill_pattern_3_1: 70000 rects
+caravel_0008d8db_fill_pattern_3_1: 80000 rects
+Processing system .magicrc file
+caravel_0008d8db_fill_pattern_2_0: 4880000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008d8db_fill_pattern_3_1: 90000 rects
+caravel_0008d8db_fill_pattern_0_0: 2360000 rects
+caravel_0008d8db_fill_pattern_3_1: 100000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_3_1: 110000 rects
+caravel_0008d8db_fill_pattern_2_0: 4890000 rects
+caravel_0008d8db_fill_pattern_3_1: 120000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+caravel_0008d8db_fill_pattern_3_1: 130000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_0_0: 2370000 rects
+Scaled magic input cell caravel_0008d8db_fill_pattern_1_3 geometry by factor of 2
+caravel_0008d8db_fill_pattern_3_1: 140000 rects
+caravel_0008d8db_fill_pattern_2_0: 4900000 rects
+caravel_0008d8db_fill_pattern_3_1: 150000 rects
+caravel_0008d8db_fill_pattern_3_1: 160000 rects
+caravel_0008d8db_fill_pattern_2_0: 4910000 rects
+caravel_0008d8db_fill_pattern_3_1: 170000 rects
+caravel_0008d8db_fill_pattern_0_0: 2380000 rects
+caravel_0008d8db_fill_pattern_3_1: 180000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008d8db_fill_pattern_2_0: 4920000 rects
+caravel_0008d8db_fill_pattern_3_1: 190000 rects
+caravel_0008d8db_fill_pattern_0_4: 10000 rects
+caravel_0008d8db_fill_pattern_3_1: 200000 rects
+caravel_0008d8db_fill_pattern_0_4: 20000 rects
+caravel_0008d8db_fill_pattern_3_1: 210000 rects
+caravel_0008d8db_fill_pattern_0_0: 2390000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008d8db_fill_pattern_2_0: 4930000 rects
+caravel_0008d8db_fill_pattern_0_4: 30000 rects
+   Generating output for cell caravel_0008d8db_fill_pattern_1_3
+caravel_0008d8db_fill_pattern_3_1: 220000 rects
+caravel_0008d8db_fill_pattern_0_4: 40000 rects
+caravel_0008d8db_fill_pattern_0_4: 50000 rects
+caravel_0008d8db_fill_pattern_3_1: 230000 rects
+caravel_0008d8db_fill_pattern_0_4: 60000 rects
+caravel_0008d8db_fill_pattern_2_0: 4940000 rects
+caravel_0008d8db_fill_pattern_0_4: 70000 rects
+caravel_0008d8db_fill_pattern_3_1: 240000 rects
+caravel_0008d8db_fill_pattern_0_4: 80000 rects
+caravel_0008d8db_fill_pattern_0_0: 2400000 rects
+caravel_0008d8db_fill_pattern_3_1: 250000 rects
+caravel_0008d8db_fill_pattern_0_4: 90000 rects
+caravel_0008d8db_fill_pattern_3_1: 260000 rects
+caravel_0008d8db_fill_pattern_2_0: 4950000 rects
+caravel_0008d8db_fill_pattern_0_4: 100000 rects
+caravel_0008d8db_fill_pattern_3_1: 270000 rects
+caravel_0008d8db_fill_pattern_0_4: 110000 rects
+caravel_0008d8db_fill_pattern_3_1: 280000 rects
+caravel_0008d8db_fill_pattern_0_4: 120000 rects
+caravel_0008d8db_fill_pattern_2_0: 4960000 rects
+caravel_0008d8db_fill_pattern_3_1: 290000 rects
+caravel_0008d8db_fill_pattern_0_4: 130000 rects
+caravel_0008d8db_fill_pattern_3_1: 300000 rects
+caravel_0008d8db_fill_pattern_0_4: 140000 rects
+caravel_0008d8db_fill_pattern_0_0: 2410000 rects
+caravel_0008d8db_fill_pattern_0_4: 150000 rects
+caravel_0008d8db_fill_pattern_3_1: 310000 rects
+caravel_0008d8db_fill_pattern_0_4: 160000 rects
+caravel_0008d8db_fill_pattern_2_0: 4970000 rects
+caravel_0008d8db_fill_pattern_3_1: 320000 rects
+caravel_0008d8db_fill_pattern_0_4: 170000 rects
+caravel_0008d8db_fill_pattern_0_4: 180000 rects
+caravel_0008d8db_fill_pattern_0_0: 2420000 rects
+caravel_0008d8db_fill_pattern_2_0: 4980000 rects
+caravel_0008d8db_fill_pattern_0_4: 190000 rects
+caravel_0008d8db_fill_pattern_3_1: 330000 rects
+caravel_0008d8db_fill_pattern_0_4: 200000 rects
+caravel_0008d8db_fill_pattern_0_4: 210000 rects
+caravel_0008d8db_fill_pattern_3_1: 340000 rects
+caravel_0008d8db_fill_pattern_2_0: 4990000 rects
+caravel_0008d8db_fill_pattern_0_4: 220000 rects
+caravel_0008d8db_fill_pattern_3_1: 350000 rects
+caravel_0008d8db_fill_pattern_0_0: 2430000 rects
+caravel_0008d8db_fill_pattern_0_4: 230000 rects
+caravel_0008d8db_fill_pattern_3_1: 360000 rects
+caravel_0008d8db_fill_pattern_0_4: 240000 rects
+caravel_0008d8db_fill_pattern_3_1: 370000 rects
+caravel_0008d8db_fill_pattern_2_0: 5000000 rects
+caravel_0008d8db_fill_pattern_3_1: 380000 rects
+caravel_0008d8db_fill_pattern_0_4: 250000 rects
+caravel_0008d8db_fill_pattern_3_1: 390000 rects
+caravel_0008d8db_fill_pattern_0_4: 260000 rects
+caravel_0008d8db_fill_pattern_2_0: 5010000 rects
+caravel_0008d8db_fill_pattern_0_0: 2440000 rects
+caravel_0008d8db_fill_pattern_3_1: 400000 rects
+caravel_0008d8db_fill_pattern_0_4: 270000 rects
+caravel_0008d8db_fill_pattern_3_1: 410000 rects
+caravel_0008d8db_fill_pattern_0_4: 280000 rects
+caravel_0008d8db_fill_pattern_3_1: 420000 rects
+caravel_0008d8db_fill_pattern_2_0: 5020000 rects
+caravel_0008d8db_fill_pattern_0_4: 290000 rects
+caravel_0008d8db_fill_pattern_3_1: 430000 rects
+caravel_0008d8db_fill_pattern_0_0: 2450000 rects
+caravel_0008d8db_fill_pattern_0_4: 300000 rects
+caravel_0008d8db_fill_pattern_3_1: 440000 rects
+caravel_0008d8db_fill_pattern_2_0: 5030000 rects
+caravel_0008d8db_fill_pattern_3_1: 450000 rects
+caravel_0008d8db_fill_pattern_0_4: 310000 rects
+caravel_0008d8db_fill_pattern_3_1: 460000 rects
+caravel_0008d8db_fill_pattern_0_4: 320000 rects
+caravel_0008d8db_fill_pattern_0_0: 2460000 rects
+caravel_0008d8db_fill_pattern_3_1: 470000 rects
+caravel_0008d8db_fill_pattern_2_0: 5040000 rects
+caravel_0008d8db_fill_pattern_0_4: 330000 rects
+caravel_0008d8db_fill_pattern_3_1: 480000 rects
+caravel_0008d8db_fill_pattern_0_4: 340000 rects
+caravel_0008d8db_fill_pattern_3_1: 490000 rects
+caravel_0008d8db_fill_pattern_0_0: 2470000 rects
+caravel_0008d8db_fill_pattern_2_0: 5050000 rects
+caravel_0008d8db_fill_pattern_0_4: 350000 rects
+caravel_0008d8db_fill_pattern_3_1: 500000 rects
+caravel_0008d8db_fill_pattern_0_0: 2480000 rects
+caravel_0008d8db_fill_pattern_3_1: 510000 rects
+caravel_0008d8db_fill_pattern_0_4: 360000 rects
+caravel_0008d8db_fill_pattern_3_1: 520000 rects
+caravel_0008d8db_fill_pattern_2_0: 5060000 rects
+caravel_0008d8db_fill_pattern_0_4: 370000 rects
+caravel_0008d8db_fill_pattern_3_1: 530000 rects
+caravel_0008d8db_fill_pattern_0_0: 2490000 rects
+caravel_0008d8db_fill_pattern_0_4: 380000 rects
+caravel_0008d8db_fill_pattern_3_1: 540000 rects
+caravel_0008d8db_fill_pattern_2_0: 5070000 rects
+caravel_0008d8db_fill_pattern_3_1: 550000 rects
+caravel_0008d8db_fill_pattern_0_4: 390000 rects
+caravel_0008d8db_fill_pattern_3_1: 560000 rects
+caravel_0008d8db_fill_pattern_0_4: 400000 rects
+caravel_0008d8db_fill_pattern_0_0: 2500000 rects
+caravel_0008d8db_fill_pattern_2_0: 5080000 rects
+caravel_0008d8db_fill_pattern_3_1: 570000 rects
+caravel_0008d8db_fill_pattern_0_4: 410000 rects
+caravel_0008d8db_fill_pattern_3_1: 580000 rects
+caravel_0008d8db_fill_pattern_0_4: 420000 rects
+caravel_0008d8db_fill_pattern_2_0: 5090000 rects
+caravel_0008d8db_fill_pattern_3_1: 590000 rects
+caravel_0008d8db_fill_pattern_0_0: 2510000 rects
+caravel_0008d8db_fill_pattern_3_1: 600000 rects
+caravel_0008d8db_fill_pattern_0_4: 430000 rects
+caravel_0008d8db_fill_pattern_3_1: 610000 rects
+caravel_0008d8db_fill_pattern_2_0: 5100000 rects
+caravel_0008d8db_fill_pattern_0_4: 440000 rects
+caravel_0008d8db_fill_pattern_3_1: 620000 rects
+caravel_0008d8db_fill_pattern_0_4: 450000 rects
+caravel_0008d8db_fill_pattern_3_1: 630000 rects
+caravel_0008d8db_fill_pattern_0_0: 2520000 rects
+caravel_0008d8db_fill_pattern_0_4: 460000 rects
+caravel_0008d8db_fill_pattern_2_0: 5110000 rects
+caravel_0008d8db_fill_pattern_3_1: 640000 rects
+caravel_0008d8db_fill_pattern_0_4: 470000 rects
+caravel_0008d8db_fill_pattern_3_1: 650000 rects
+caravel_0008d8db_fill_pattern_0_4: 480000 rects
+caravel_0008d8db_fill_pattern_3_1: 660000 rects
+caravel_0008d8db_fill_pattern_2_0: 5120000 rects
+caravel_0008d8db_fill_pattern_0_4: 490000 rects
+caravel_0008d8db_fill_pattern_3_1: 670000 rects
+caravel_0008d8db_fill_pattern_0_4: 500000 rects
+caravel_0008d8db_fill_pattern_0_0: 2530000 rects
+caravel_0008d8db_fill_pattern_3_1: 680000 rects
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+caravel_0008d8db_fill_pattern_2_0: 5130000 rects
+caravel_0008d8db_fill_pattern_0_4: 520000 rects
+caravel_0008d8db_fill_pattern_3_1: 700000 rects
+caravel_0008d8db_fill_pattern_3_1: 710000 rects
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+caravel_0008d8db_fill_pattern_3_1: 2070000 rects
+Ended: 01/01/2023 08:54:53
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+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
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+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
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+2 Magic internal units = 1 Lambda
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+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
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+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_4_0
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+caravel_0008d8db_fill_pattern_3_1: 3410000 rects
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+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_0_0
+caravel_0008d8db_fill_pattern_3_1: 3430000 rects
+caravel_0008d8db_fill_pattern_3_1: 3440000 rects
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+caravel_0008d8db_fill_pattern_3_1: 3790000 rects
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+caravel_0008d8db_fill_pattern_3_1: 3900000 rects
+caravel_0008d8db_fill_pattern_3_1: 3910000 rects
+Ended: 01/01/2023 08:55:22
+caravel_0008d8db_fill_pattern_3_1: 3920000 rects
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008d8db_fill_pattern_3_1: 3930000 rects
+caravel_0008d8db_fill_pattern_3_1: 3940000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled magic input cell caravel_0008d8db_fill_pattern_2_2 geometry by factor of 2
+caravel_0008d8db_fill_pattern_3_1: 3950000 rects
+caravel_0008d8db_fill_pattern_3_1: 3960000 rects
+caravel_0008d8db_fill_pattern_3_1: 3970000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_2_2
+caravel_0008d8db_fill_pattern_3_1: 3980000 rects
+caravel_0008d8db_fill_pattern_3_1: 3990000 rects
+caravel_0008d8db_fill_pattern_3_1: 4000000 rects
+caravel_0008d8db_fill_pattern_3_1: 4010000 rects
+caravel_0008d8db_fill_pattern_3_1: 4020000 rects
+caravel_0008d8db_fill_pattern_3_1: 4030000 rects
+caravel_0008d8db_fill_pattern_3_1: 4040000 rects
+caravel_0008d8db_fill_pattern_3_1: 4050000 rects
+caravel_0008d8db_fill_pattern_3_1: 4060000 rects
+caravel_0008d8db_fill_pattern_3_1: 4070000 rects
+caravel_0008d8db_fill_pattern_3_1: 4080000 rects
+caravel_0008d8db_fill_pattern_3_1: 4090000 rects
+caravel_0008d8db_fill_pattern_3_1: 4100000 rects
+caravel_0008d8db_fill_pattern_3_1: 4110000 rects
+caravel_0008d8db_fill_pattern_3_1: 4120000 rects
+caravel_0008d8db_fill_pattern_3_1: 4130000 rects
+caravel_0008d8db_fill_pattern_3_1: 4140000 rects
+caravel_0008d8db_fill_pattern_3_1: 4150000 rects
+caravel_0008d8db_fill_pattern_3_1: 4160000 rects
+caravel_0008d8db_fill_pattern_3_1: 4170000 rects
+caravel_0008d8db_fill_pattern_3_1: 4180000 rects
+caravel_0008d8db_fill_pattern_3_1: 4190000 rects
+caravel_0008d8db_fill_pattern_3_1: 4200000 rects
+caravel_0008d8db_fill_pattern_3_1: 4210000 rects
+caravel_0008d8db_fill_pattern_3_1: 4220000 rects
+caravel_0008d8db_fill_pattern_3_1: 4230000 rects
+caravel_0008d8db_fill_pattern_3_1: 4240000 rects
+caravel_0008d8db_fill_pattern_3_1: 4250000 rects
+caravel_0008d8db_fill_pattern_3_1: 4260000 rects
+caravel_0008d8db_fill_pattern_3_1: 4270000 rects
+caravel_0008d8db_fill_pattern_3_1: 4280000 rects
+caravel_0008d8db_fill_pattern_3_1: 4290000 rects
+caravel_0008d8db_fill_pattern_3_1: 4300000 rects
+caravel_0008d8db_fill_pattern_3_1: 4310000 rects
+caravel_0008d8db_fill_pattern_3_1: 4320000 rects
+caravel_0008d8db_fill_pattern_3_1: 4330000 rects
+caravel_0008d8db_fill_pattern_3_1: 4340000 rects
+caravel_0008d8db_fill_pattern_3_1: 4350000 rects
+caravel_0008d8db_fill_pattern_3_1: 4360000 rects
+caravel_0008d8db_fill_pattern_3_1: 4370000 rects
+caravel_0008d8db_fill_pattern_3_1: 4380000 rects
+caravel_0008d8db_fill_pattern_3_1: 4390000 rects
+caravel_0008d8db_fill_pattern_3_1: 4400000 rects
+caravel_0008d8db_fill_pattern_3_1: 4410000 rects
+caravel_0008d8db_fill_pattern_3_1: 4420000 rects
+caravel_0008d8db_fill_pattern_3_1: 4430000 rects
+caravel_0008d8db_fill_pattern_3_1: 4440000 rects
+caravel_0008d8db_fill_pattern_3_1: 4450000 rects
+caravel_0008d8db_fill_pattern_3_1: 4460000 rects
+caravel_0008d8db_fill_pattern_3_1: 4470000 rects
+caravel_0008d8db_fill_pattern_3_1: 4480000 rects
+caravel_0008d8db_fill_pattern_3_1: 4490000 rects
+caravel_0008d8db_fill_pattern_3_1: 4500000 rects
+caravel_0008d8db_fill_pattern_3_1: 4510000 rects
+caravel_0008d8db_fill_pattern_3_1: 4520000 rects
+caravel_0008d8db_fill_pattern_3_1: 4530000 rects
+caravel_0008d8db_fill_pattern_3_1: 4540000 rects
+caravel_0008d8db_fill_pattern_3_1: 4550000 rects
+caravel_0008d8db_fill_pattern_3_1: 4560000 rects
+caravel_0008d8db_fill_pattern_3_1: 4570000 rects
+caravel_0008d8db_fill_pattern_3_1: 4580000 rects
+caravel_0008d8db_fill_pattern_3_1: 4590000 rects
+caravel_0008d8db_fill_pattern_3_1: 4600000 rects
+caravel_0008d8db_fill_pattern_3_1: 4610000 rects
+caravel_0008d8db_fill_pattern_3_1: 4620000 rects
+caravel_0008d8db_fill_pattern_3_1: 4630000 rects
+caravel_0008d8db_fill_pattern_3_1: 4640000 rects
+caravel_0008d8db_fill_pattern_3_1: 4650000 rects
+caravel_0008d8db_fill_pattern_3_1: 4660000 rects
+Ended: 01/01/2023 08:55:29
+caravel_0008d8db_fill_pattern_3_1: 4670000 rects
+caravel_0008d8db_fill_pattern_3_1: 4680000 rects
+Ended: 01/01/2023 08:55:29
+caravel_0008d8db_fill_pattern_3_1: 4690000 rects
+caravel_0008d8db_fill_pattern_3_1: 4700000 rects
+caravel_0008d8db_fill_pattern_3_1: 4710000 rects
+caravel_0008d8db_fill_pattern_3_1: 4720000 rects
+caravel_0008d8db_fill_pattern_3_1: 4730000 rects
+caravel_0008d8db_fill_pattern_3_1: 4740000 rects
+caravel_0008d8db_fill_pattern_3_1: 4750000 rects
+caravel_0008d8db_fill_pattern_3_1: 4760000 rects
+caravel_0008d8db_fill_pattern_3_1: 4770000 rects
+caravel_0008d8db_fill_pattern_3_1: 4780000 rects
+caravel_0008d8db_fill_pattern_3_1: 4790000 rects
+caravel_0008d8db_fill_pattern_3_1: 4800000 rects
+caravel_0008d8db_fill_pattern_3_1: 4810000 rects
+caravel_0008d8db_fill_pattern_3_1: 4820000 rects
+caravel_0008d8db_fill_pattern_3_1: 4830000 rects
+caravel_0008d8db_fill_pattern_3_1: 4840000 rects
+caravel_0008d8db_fill_pattern_3_1: 4850000 rects
+caravel_0008d8db_fill_pattern_3_1: 4860000 rects
+caravel_0008d8db_fill_pattern_3_1: 4870000 rects
+caravel_0008d8db_fill_pattern_3_1: 4880000 rects
+caravel_0008d8db_fill_pattern_3_1: 4890000 rects
+caravel_0008d8db_fill_pattern_3_1: 4900000 rects
+caravel_0008d8db_fill_pattern_3_1: 4910000 rects
+caravel_0008d8db_fill_pattern_3_1: 4920000 rects
+caravel_0008d8db_fill_pattern_3_1: 4930000 rects
+caravel_0008d8db_fill_pattern_3_1: 4940000 rects
+caravel_0008d8db_fill_pattern_3_1: 4950000 rects
+caravel_0008d8db_fill_pattern_3_1: 4960000 rects
+caravel_0008d8db_fill_pattern_3_1: 4970000 rects
+caravel_0008d8db_fill_pattern_3_1: 4980000 rects
+caravel_0008d8db_fill_pattern_3_1: 4990000 rects
+caravel_0008d8db_fill_pattern_3_1: 5000000 rects
+caravel_0008d8db_fill_pattern_3_1: 5010000 rects
+caravel_0008d8db_fill_pattern_3_1: 5020000 rects
+caravel_0008d8db_fill_pattern_3_1: 5030000 rects
+caravel_0008d8db_fill_pattern_3_1: 5040000 rects
+caravel_0008d8db_fill_pattern_3_1: 5050000 rects
+caravel_0008d8db_fill_pattern_3_1: 5060000 rects
+caravel_0008d8db_fill_pattern_3_1: 5070000 rects
+caravel_0008d8db_fill_pattern_3_1: 5080000 rects
+caravel_0008d8db_fill_pattern_3_1: 5090000 rects
+caravel_0008d8db_fill_pattern_3_1: 5100000 rects
+caravel_0008d8db_fill_pattern_3_1: 5110000 rects
+caravel_0008d8db_fill_pattern_3_1: 5120000 rects
+caravel_0008d8db_fill_pattern_3_1: 5130000 rects
+caravel_0008d8db_fill_pattern_3_1: 5140000 rects
+caravel_0008d8db_fill_pattern_3_1: 5150000 rects
+caravel_0008d8db_fill_pattern_3_1: 5160000 rects
+caravel_0008d8db_fill_pattern_3_1: 5170000 rects
+caravel_0008d8db_fill_pattern_3_1: 5180000 rects
+caravel_0008d8db_fill_pattern_3_1: 5190000 rects
+caravel_0008d8db_fill_pattern_3_1: 5200000 rects
+caravel_0008d8db_fill_pattern_3_1: 5210000 rects
+caravel_0008d8db_fill_pattern_3_1: 5220000 rects
+caravel_0008d8db_fill_pattern_3_1: 5230000 rects
+caravel_0008d8db_fill_pattern_3_1: 5240000 rects
+caravel_0008d8db_fill_pattern_3_1: 5250000 rects
+caravel_0008d8db_fill_pattern_3_1: 5260000 rects
+caravel_0008d8db_fill_pattern_3_1: 5270000 rects
+caravel_0008d8db_fill_pattern_3_1: 5280000 rects
+caravel_0008d8db_fill_pattern_3_1: 5290000 rects
+caravel_0008d8db_fill_pattern_3_1: 5300000 rects
+caravel_0008d8db_fill_pattern_3_1: 5310000 rects
+caravel_0008d8db_fill_pattern_3_1: 5320000 rects
+caravel_0008d8db_fill_pattern_3_1: 5330000 rects
+caravel_0008d8db_fill_pattern_3_1: 5340000 rects
+caravel_0008d8db_fill_pattern_3_1: 5350000 rects
+caravel_0008d8db_fill_pattern_3_1: 5360000 rects
+caravel_0008d8db_fill_pattern_3_1: 5370000 rects
+caravel_0008d8db_fill_pattern_3_1: 5380000 rects
+caravel_0008d8db_fill_pattern_3_1: 5390000 rects
+caravel_0008d8db_fill_pattern_3_1: 5400000 rects
+caravel_0008d8db_fill_pattern_3_1: 5410000 rects
+caravel_0008d8db_fill_pattern_3_1: 5420000 rects
+caravel_0008d8db_fill_pattern_3_1: 5430000 rects
+caravel_0008d8db_fill_pattern_3_1: 5440000 rects
+caravel_0008d8db_fill_pattern_3_1: 5450000 rects
+caravel_0008d8db_fill_pattern_3_1: 5460000 rects
+caravel_0008d8db_fill_pattern_3_1: 5470000 rects
+caravel_0008d8db_fill_pattern_3_1: 5480000 rects
+caravel_0008d8db_fill_pattern_3_1: 5490000 rects
+caravel_0008d8db_fill_pattern_3_1: 5500000 rects
+caravel_0008d8db_fill_pattern_3_1: 5510000 rects
+caravel_0008d8db_fill_pattern_3_1: 5520000 rects
+Ended: 01/01/2023 08:55:38
+caravel_0008d8db_fill_pattern_3_1: 5530000 rects
+caravel_0008d8db_fill_pattern_3_1: 5540000 rects
+caravel_0008d8db_fill_pattern_3_1: 5550000 rects
+caravel_0008d8db_fill_pattern_3_1: 5560000 rects
+caravel_0008d8db_fill_pattern_3_1: 5570000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008d8db_fill_pattern_3_1
+Ended: 01/01/2023 08:55:45
+Ended: 01/01/2023 08:55:53
+Ended: 01/01/2023 08:56:06
+Ended: 01/01/2023 08:56:06
+Ended: 01/01/2023 08:56:27
+Ended: 01/01/2023 08:56:39
+Ended: 01/01/2023 08:56:50
+Ended: 01/01/2023 08:56:59
+Ended: 01/01/2023 08:57:25
+Ended: 01/01/2023 08:57:50
+Ended: 01/01/2023 08:58:17
+Ended: 01/01/2023 08:58:20
+Ended: 01/01/2023 08:59:03

tapeout/logs/gds.info

diff --git a/tapeout/logs/gds.info b/tapeout/logs/gds.info
new file mode 100644
index 0000000..d0d021a
--- /dev/null
+++ b/tapeout/logs/gds.info
@@ -0,0 +1 @@
+user_project_wrapper.gds: bf7ee72cd8e936579febc9ad9e572e4716383a43
\ No newline at end of file

tapeout/logs/gen_gpio_defaults.log

diff --git a/tapeout/logs/gen_gpio_defaults.log b/tapeout/logs/gen_gpio_defaults.log
new file mode 100644
index 0000000..4fd9866
--- /dev/null
+++ b/tapeout/logs/gen_gpio_defaults.log
@@ -0,0 +1,79 @@
+Step 1:  Create new cells for new GPIO default vectors.
+Creating new layout file /root/project/mag/gpio_defaults_block_1803.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1803.v
+Layout file /root/project/mag/gpio_defaults_block_1803.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1803.v already exists and does not need to be generated.
+Creating new layout file /root/project/mag/gpio_defaults_block_0403.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v
+Creating new layout file /root/project/mag/gpio_defaults_block_0801.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0801.v
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Creating new layout file /root/project/mag/gpio_defaults_block_1801.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Step 2:  Modify top-level layouts to use the specified defaults.
+Done.

tapeout/logs/git.info

diff --git a/tapeout/logs/git.info b/tapeout/logs/git.info
new file mode 100644
index 0000000..975269c
--- /dev/null
+++ b/tapeout/logs/git.info
@@ -0,0 +1,3 @@
+Repository: https://github.com/adityan18/BW_mul_foundary.git
+Branch: HEAD
+Commit: c20e407b5dd4364047d05a1dbd71eb67548b999c
\ No newline at end of file

tapeout/logs/git_clone.log

diff --git a/tapeout/logs/git_clone.log b/tapeout/logs/git_clone.log
new file mode 100644
index 0000000..38588bd
--- /dev/null
+++ b/tapeout/logs/git_clone.log
Binary files differ

tapeout/logs/klayout_beol.log

diff --git a/tapeout/logs/klayout_beol.log b/tapeout/logs/klayout_beol.log
new file mode 100644
index 0000000..31997d1
--- /dev/null
+++ b/tapeout/logs/klayout_beol.log
@@ -0,0 +1,1005 @@
+/opt/scripts/tech/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/scripts/tech/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/scripts/tech/sky130A_mr.drc:54: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/scripts/tech/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/scripts/tech/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/scripts/tech/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/scripts/tech/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/scripts/tech/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/scripts/tech/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/scripts/tech/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:124
+    Polygons (raw): 988321 (flat)  3961 (hierarchical)
+    Elapsed: 0.240s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:125
+    Polygons (raw): 122717 (flat)  1002 (hierarchical)
+    Elapsed: 0.150s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:126
+    Polygons (raw): 546645 (flat)  1200 (hierarchical)
+    Elapsed: 0.140s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:127
+    Polygons (raw): 853 (flat)  36 (hierarchical)
+    Elapsed: 0.010s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:128
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:129
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:130
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:131
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:132
+    Polygons (raw): 446391 (flat)  508 (hierarchical)
+    Elapsed: 0.130s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:133
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2155.00M
+"polygons" in: sky130A_mr.drc:134
+    Polygons (raw): 54311 (flat)  575 (hierarchical)
+    Elapsed: 0.020s  Memory: 2155.00M
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+END: 76/20 (pad)
+Writing report database: /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/tapeout/9969cfef-4da3-48bd-8c0b-f14d13c62f73/outputs/klayout_beol_report.xml ..
+Total elapsed: 2679.960s  Memory: 6821.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07

tapeout/logs/klayout_feol.log

diff --git a/tapeout/logs/klayout_feol.log b/tapeout/logs/klayout_feol.log
new file mode 100644
index 0000000..ae7c42e
--- /dev/null
+++ b/tapeout/logs/klayout_feol.log
@@ -0,0 +1,817 @@
+/opt/scripts/tech/sky130A_mr.drc:48: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/scripts/tech/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/scripts/tech/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/scripts/tech/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/scripts/tech/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/scripts/tech/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/scripts/tech/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/scripts/tech/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/scripts/tech/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/scripts/tech/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
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+DRC section
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+    Elapsed: 0.020s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:383
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5137.00M
+"and" in: sky130A_mr.drc:384
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.030s  Memory: 5137.00M
+"enclosing" in: sky130A_mr.drc:384
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.200s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:384
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.020s  Memory: 5137.00M
+"enclosing" in: sky130A_mr.drc:385
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.110s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:385
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5137.00M
+"enclosing" in: sky130A_mr.drc:386
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:386
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5137.00M
+"separation" in: sky130A_mr.drc:387
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.020s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:387
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5137.00M
+"not_interacting" in: sky130A_mr.drc:388
+    Polygons (raw): 7569 (flat)  5720 (hierarchical)
+    Elapsed: 0.270s  Memory: 5137.00M
+"separation" in: sky130A_mr.drc:388
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.140s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:388
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5137.00M
+END: 97/44 (cap2m)
+FEOL section
+START: 75/20 (hvi)
+"not" in: sky130A_mr.drc:688
+    Polygons (raw): 54311 (flat)  575 (hierarchical)
+    Elapsed: 0.010s  Memory: 5137.00M
+"width" in: sky130A_mr.drc:689
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.210s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:689
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5137.00M
+"space" in: sky130A_mr.drc:690
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.330s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:690
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.090s  Memory: 5137.00M
+END: 75/20 (hvi)
+START: 125/20 (hvntm)
+"not" in: sky130A_mr.drc:695
+    Polygons (raw): 33 (flat)  16 (hierarchical)
+    Elapsed: 0.000s  Memory: 5137.00M
+"width" in: sky130A_mr.drc:696
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.170s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:696
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5137.00M
+"space" in: sky130A_mr.drc:697
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 5137.00M
+"output" in: sky130A_mr.drc:697
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5137.00M
+END: 125/20 (hvntm)
+Writing report database: /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/tapeout/9969cfef-4da3-48bd-8c0b-f14d13c62f73/outputs/klayout_feol_report.xml ..
+Total elapsed: 895.380s  Memory: 5121.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07

tapeout/logs/klayout_fom_density.log

diff --git a/tapeout/logs/klayout_fom_density.log b/tapeout/logs/klayout_fom_density.log
new file mode 100644
index 0000000..2453916
--- /dev/null
+++ b/tapeout/logs/klayout_fom_density.log
@@ -0,0 +1,58 @@
+fom_density.drc:: sourcing design file=/mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/tapeout/9969cfef-4da3-48bd-8c0b-f14d13c62f73/outputs/caravel_0008d8db.oas topcell=caravel_0008d8db ...
+done.
+flattening chip boundary...
+done.
+step size = 70.0
+llx=5.964999999999999 lly=5.999999999999999 urx=3594.0349999999994 ury=5193.999999999999
+x_cnt = 51
+y_cnt = 74
+dbu = 0.0009999999999999998
+bbox_area = 18614907.159999993
+calculating subtile areas (= 3774)...
+tiles per step = 10
+calculating window step densities (= 2730)...
+{{ CHECK }} 0/2730
+{{ CHECK }} 65/2730
+{{ CHECK }} 130/2730
+{{ CHECK }} 195/2730
+{{ CHECK }} 260/2730
+{{ CHECK }} 325/2730
+{{ CHECK }} 390/2730
+{{ CHECK }} 455/2730
+{{ CHECK }} 520/2730
+{{ CHECK }} 585/2730
+{{ CHECK }} 650/2730
+{{ CHECK }} 715/2730
+{{ CHECK }} 780/2730
+{{ CHECK }} 845/2730
+{{ CHECK }} 910/2730
+{{ CHECK }} 975/2730
+{{ CHECK }} 1040/2730
+{{ CHECK }} 1105/2730
+{{ CHECK }} 1170/2730
+{{ CHECK }} 1235/2730
+{{ CHECK }} 1300/2730
+{{ CHECK }} 1365/2730
+{{ CHECK }} 1430/2730
+{{ CHECK }} 1495/2730
+{{ CHECK }} 1560/2730
+{{ CHECK }} 1625/2730
+{{ CHECK }} 1690/2730
+{{ CHECK }} 1755/2730
+{{ CHECK }} 1820/2730
+{{ CHECK }} 1885/2730
+{{ CHECK }} 1950/2730
+{{ CHECK }} 2015/2730
+{{ CHECK }} 2080/2730
+{{ CHECK }} 2145/2730
+{{ CHECK }} 2210/2730
+{{ CHECK }} 2275/2730
+{{ CHECK }} 2340/2730
+{{ CHECK }} 2405/2730
+{{ CHECK }} 2470/2730
+{{ CHECK }} 2535/2730
+{{ CHECK }} 2600/2730
+{{ CHECK }} 2665/2730
+minimum fom density  = 0.3913
+maximum fom density  = 0.5128
+finish received: success = true

tapeout/logs/klayout_gds2oas.log

diff --git a/tapeout/logs/klayout_gds2oas.log b/tapeout/logs/klayout_gds2oas.log
new file mode 100644
index 0000000..e98499c
--- /dev/null
+++ b/tapeout/logs/klayout_gds2oas.log
@@ -0,0 +1 @@
+[INFO] Changing from /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/tapeout/9969cfef-4da3-48bd-8c0b-f14d13c62f73/outputs/caravel_0008d8db.gds to /mnt/uffs/user/u9855_adityas/design/modified_baugh_wooley_multiplier/jobs/tapeout/9969cfef-4da3-48bd-8c0b-f14d13c62f73/outputs/caravel_0008d8db.oas

tapeout/logs/klayout_met_density.log

diff --git a/tapeout/logs/klayout_met_density.log b/tapeout/logs/klayout_met_density.log
new file mode 100644
index 0000000..ce35a68
--- /dev/null
+++ b/tapeout/logs/klayout_met_density.log
@@ -0,0 +1,6 @@
+li1_ca_density is 0.4420188045205443
+m1_ca_density is 0.49205275148905436
+m2_ca_density is 0.5194442236038659
+m3_ca_density is 0.5130490234959524
+m4_ca_density is 0.46824838333552243
+m5_ca_density is 0.5295135192466178

tapeout/logs/klayout_missing_cells.log

diff --git a/tapeout/logs/klayout_missing_cells.log b/tapeout/logs/klayout_missing_cells.log
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/tapeout/logs/klayout_missing_cells.log

tapeout/logs/klayout_zero_area.log

diff --git a/tapeout/logs/klayout_zero_area.log b/tapeout/logs/klayout_zero_area.log
new file mode 100644
index 0000000..2b11f67
--- /dev/null
+++ b/tapeout/logs/klayout_zero_area.log
@@ -0,0 +1,4 @@
+0 zero-length paths,  0 zero-length paths deleted.
+0 total zero-area objects,  0 total objects deleted.
+VmPeak:	 3064540 kB
+VmHWM:	 2553160 kB

tapeout/logs/missing_cells.info

diff --git a/tapeout/logs/missing_cells.info b/tapeout/logs/missing_cells.info
new file mode 100644
index 0000000..bc59c12
--- /dev/null
+++ b/tapeout/logs/missing_cells.info
@@ -0,0 +1 @@
+False

tapeout/logs/oasis.info

diff --git a/tapeout/logs/oasis.info b/tapeout/logs/oasis.info
new file mode 100644
index 0000000..2e547e0
--- /dev/null
+++ b/tapeout/logs/oasis.info
@@ -0,0 +1 @@
+caravel_0008d8db.oas: eb7ba03df1fb0cc3404a83ce4839764feea580cd
\ No newline at end of file

tapeout/logs/pdks.info

diff --git a/tapeout/logs/pdks.info b/tapeout/logs/pdks.info
new file mode 100644
index 0000000..a007d09
--- /dev/null
+++ b/tapeout/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs: 0059588eebfc704681dc2368bd1d33d96281d10f
+sky130A PDK: f70d8ca46961ff92719d8870a18a076370b85f6c
\ No newline at end of file

tapeout/logs/rram.info

diff --git a/tapeout/logs/rram.info b/tapeout/logs/rram.info
new file mode 100644
index 0000000..bc59c12
--- /dev/null
+++ b/tapeout/logs/rram.info
@@ -0,0 +1 @@
+False

tapeout/logs/set_user_id.log

diff --git a/tapeout/logs/set_user_id.log b/tapeout/logs/set_user_id.log
new file mode 100644
index 0000000..09be6a0
--- /dev/null
+++ b/tapeout/logs/set_user_id.log
@@ -0,0 +1,10 @@
+Project Chip ID is: 579803
+Setting Project Chip ID to: 0008d8db
+Step 1: Modify Layout of the user_id_programming subcell
+Done!
+Step 2: Add user project ID parameter to source verilog.
+Done!
+Step 3: Add user project ID parameter to gate-level verilog.
+Done!
+Step 4: Add user project ID text to top level layout.
+Done!

tapeout/logs/ship_truck.log

diff --git a/tapeout/logs/ship_truck.log b/tapeout/logs/ship_truck.log
new file mode 100644
index 0000000..f8764e2
--- /dev/null
+++ b/tapeout/logs/ship_truck.log
@@ -0,0 +1,1842 @@
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/mag2gds.tcl" from command line.
+Scaled magic input cell user_project_wrapper geometry by factor of 2
+user_project_wrapper: 10000 rects
+user_project_wrapper: 20000 rects
+user_project_wrapper: 30000 rects
+user_project_wrapper: 40000 rects
+user_project_wrapper: 50000 rects
+Scaled magic input cell user_id_textblock geometry by factor of 2
+caravel: 10000 rects
+caravel: 20000 rects
+caravel: 30000 rects
+caravel: 40000 rects
+caravel: 50000 rects
+caravel: 60000 rects
+caravel: 70000 rects
+caravel: 80000 rects
+Processing timestamp mismatches: simple_por.
+Scaled magic input cell caravel_motto geometry by factor of 2
+Scaled magic input cell font_22 geometry by factor of 24
+Scaled magic input cell font_73 geometry by factor of 24
+Scaled magic input cell font_43 geometry by factor of 24
+Scaled magic input cell font_49 geometry by factor of 24
+Scaled magic input cell font_65 geometry by factor of 24
+Scaled magic input cell font_68 geometry by factor of 24
+Scaled magic input cell font_54 geometry by factor of 24
+Scaled magic input cell font_67 geometry by factor of 24
+Scaled magic input cell font_6E geometry by factor of 24
+Scaled magic input cell font_69 geometry by factor of 24
+Scaled magic input cell font_6C geometry by factor of 24
+Scaled magic input cell font_61 geometry by factor of 24
+Scaled magic input cell font_53 geometry by factor of 24
+Scaled magic input cell font_79 geometry by factor of 24
+Scaled magic input cell font_76 geometry by factor of 24
+Scaled magic input cell font_74 geometry by factor of 24
+Scaled magic input cell font_72 geometry by factor of 24
+Scaled magic input cell font_70 geometry by factor of 24
+Scaled magic input cell font_66 geometry by factor of 24
+Scaled magic input cell font_63 geometry by factor of 24
+Scaled magic input cell font_62 geometry by factor of 24
+Scaled magic input cell font_57 geometry by factor of 24
+Scaled magic input cell font_56 geometry by factor of 24
+Scaled magic input cell font_50 geometry by factor of 24
+Scaled magic input cell font_47 geometry by factor of 24
+Scaled magic input cell font_44 geometry by factor of 24
+Scaled magic input cell font_35 geometry by factor of 24
+Scaled magic input cell font_32 geometry by factor of 24
+Scaled magic input cell font_30 geometry by factor of 24
+Scaled magic input cell font_29 geometry by factor of 24
+Scaled magic input cell font_28 geometry by factor of 24
+Scaled magic input cell font_20 geometry by factor of 24
+Scaled magic input cell font_6F geometry by factor of 24
+Scaled magic input cell font_6B geometry by factor of 24
+Scaled magic input cell font_4F geometry by factor of 24
+Scaled magic input cell font_4B geometry by factor of 24
+Scaled magic input cell font_2D geometry by factor of 24
+Scaled magic input cell open_source geometry by factor of 2
+Scaled magic input cell alpha_0 geometry by factor of 2
+Scaled magic input cell alpha_8 geometry by factor of 72
+Scaled magic input cell alpha_D geometry by factor of 72
+Scaled magic input cell alpha_B geometry by factor of 72
+caravel_clocking: 10000 rects
+caravel_clocking: 20000 rects
+caravel_clocking: 30000 rects
+housekeeping: 10000 rects
+housekeeping: 20000 rects
+housekeeping: 30000 rects
+housekeeping: 40000 rects
+housekeeping: 50000 rects
+housekeeping: 60000 rects
+housekeeping: 70000 rects
+housekeeping: 80000 rects
+housekeeping: 90000 rects
+housekeeping: 100000 rects
+housekeeping: 110000 rects
+housekeeping: 120000 rects
+housekeeping: 130000 rects
+housekeeping: 140000 rects
+housekeeping: 150000 rects
+housekeeping: 160000 rects
+housekeeping: 170000 rects
+housekeeping: 180000 rects
+housekeeping: 190000 rects
+housekeeping: 200000 rects
+housekeeping: 210000 rects
+housekeeping: 220000 rects
+housekeeping: 230000 rects
+housekeeping: 240000 rects
+housekeeping: 250000 rects
+housekeeping: 260000 rects
+housekeeping: 270000 rects
+housekeeping: 280000 rects
+housekeeping: 290000 rects
+housekeeping: 300000 rects
+housekeeping: 310000 rects
+housekeeping: 320000 rects
+housekeeping: 330000 rects
+housekeeping: 340000 rects
+housekeeping: 350000 rects
+housekeeping: 360000 rects
+housekeeping: 370000 rects
+housekeeping: 380000 rects
+housekeeping: 390000 rects
+housekeeping: 400000 rects
+housekeeping: 410000 rects
+housekeeping: 420000 rects
+housekeeping: 430000 rects
+housekeeping: 440000 rects
+housekeeping: 450000 rects
+housekeeping: 460000 rects
+housekeeping: 470000 rects
+housekeeping: 480000 rects
+housekeeping: 490000 rects
+housekeeping: 500000 rects
+housekeeping: 510000 rects
+housekeeping: 520000 rects
+digital_pll: 10000 rects
+digital_pll: 20000 rects
+mgmt_protect: 10000 rects
+mgmt_protect: 20000 rects
+mgmt_protect: 30000 rects
+mgmt_protect: 40000 rects
+mgmt_protect: 50000 rects
+mgmt_protect: 60000 rects
+mgmt_protect: 70000 rects
+mgmt_protect: 80000 rects
+mgmt_protect: 90000 rects
+mgmt_protect: 100000 rects
+mgmt_protect: 110000 rects
+mgmt_protect: 120000 rects
+mgmt_protect: 130000 rects
+mgmt_protect: 140000 rects
+mgmt_protect: 150000 rects
+mgmt_protect: 160000 rects
+mgmt_protect: 170000 rects
+mgmt_protect: 180000 rects
+mgmt_protect: 190000 rects
+mgmt_protect: 200000 rects
+mgmt_protect: 210000 rects
+mgmt_protect: 220000 rects
+mgmt_protect: 230000 rects
+mgmt_protect: 240000 rects
+mgmt_protect: 250000 rects
+mgmt_protect: 260000 rects
+mgmt_protect: 270000 rects
+mgmt_protect: 280000 rects
+mgmt_protect: 290000 rects
+mgmt_protect: 300000 rects
+mgmt_protect: 310000 rects
+mgmt_protect: 320000 rects
+mgmt_protect: 330000 rects
+mgmt_protect: 340000 rects
+mgmt_protect: 350000 rects
+mgmt_protect: 360000 rects
+mgmt_protect: 370000 rects
+mgmt_protect: 380000 rects
+mgmt_protect: 390000 rects
+mgmt_protect: 400000 rects
+sky130_fd_io__corner_bus_overlay: 10000 rects
+sky130_fd_io__top_ground_hvc_wpad: 10000 rects
+sky130_fd_io__top_ground_hvc_wpad: 20000 rects
+sky130_fd_io__top_ground_hvc_wpad: 30000 rects
+sky130_fd_io__top_ground_hvc_wpad: 40000 rects
+sky130_fd_io__top_ground_hvc_wpad: 50000 rects
+sky130_fd_io__top_ground_hvc_wpad: 60000 rects
+sky130_fd_io__top_ground_hvc_wpad: 70000 rects
+sky130_fd_io__top_ground_hvc_wpad: 80000 rects
+sky130_fd_io__top_ground_hvc_wpad: 90000 rects
+sky130_fd_io__top_ground_hvc_wpad: 100000 rects
+sky130_fd_io__top_ground_hvc_wpad: 110000 rects
+sky130_fd_io__top_ground_hvc_wpad: 120000 rects
+sky130_fd_io__top_ground_hvc_wpad: 130000 rects
+sky130_fd_io__top_ground_hvc_wpad: 140000 rects
+sky130_fd_io__top_ground_hvc_wpad: 150000 rects
+sky130_fd_io__top_ground_hvc_wpad: 160000 rects
+sky130_fd_io__top_ground_hvc_wpad: 170000 rects
+sky130_fd_io__top_ground_hvc_wpad: 180000 rects
+sky130_fd_io__top_ground_hvc_wpad: 190000 rects
+sky130_fd_io__top_ground_hvc_wpad: 200000 rects
+sky130_fd_io__top_ground_hvc_wpad: 210000 rects
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_5595914180851 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808336 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808666 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808678 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808679 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_5595914180839 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s__example_55959141808671 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s2__example_55959141808672 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808663 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808660 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s__example_55959141808675 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s2__example_55959141808676 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808662 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808661 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_559591418084 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__genrivetdlring__example_559591418082 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__gendlring__example_559591418081 geometry by factor of 2
+sky130_fd_io__top_xres4v2: 10000 rects
+sky130_fd_io__top_xres4v2: 20000 rects
+sky130_fd_io__top_xres4v2: 30000 rects
+sky130_fd_io__top_xres4v2: 40000 rects
+sky130_fd_io__top_xres4v2: 50000 rects
+sky130_fd_io__top_xres4v2: 60000 rects
+sky130_fd_io__top_xres4v2: 70000 rects
+sky130_fd_io__top_xres4v2: 80000 rects
+sky130_fd_io__top_xres4v2: 90000 rects
+sky130_fd_io__top_xres4v2: 100000 rects
+sky130_fd_io__top_xres4v2: 110000 rects
+sky130_fd_io__top_xres4v2: 120000 rects
+sky130_fd_io__top_xres4v2: 130000 rects
+sky130_fd_io__top_xres4v2: 140000 rects
+sky130_fd_io__top_xres4v2: 150000 rects
+sky130_fd_io__top_xres4v2: 160000 rects
+sky130_fd_io__top_xres4v2: 170000 rects
+sky130_fd_io__top_xres4v2: 180000 rects
+sky130_fd_io__top_xres4v2: 190000 rects
+sky130_fd_io__top_xres4v2: 200000 rects
+sky130_fd_io__top_xres4v2: 210000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808719 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808765 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808717 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808243 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180890 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808264 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180858 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_5595914180833 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_55959141808288 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180859 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808289 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808274 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808728 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808727 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808726 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808725 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808724 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808554 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808553 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808552 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808551 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808402 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808350 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808261 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808260 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808259 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808400 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808372 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808326 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808290 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808128 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808127 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180897 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180819 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808147 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808157 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808156 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808155 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808154 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808153 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808152 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808151 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808150 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808149 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808148 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808158 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_559591418083 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808137 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_559591418086 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808370 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808316 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808385 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_559591418088 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808612 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_5595914180848 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180849 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m2m3__example_55959141808714 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1_centered__example_559591418081 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2s_cdns_55959141808652 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2o_cdns_55959141808653 geometry by factor of 2
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 10000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 20000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 30000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 40000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_5595914180812 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_5595914180811 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418086 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418084 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpm1s2__example_55959141808659 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__pfet_01v8__example_55959141808657 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808202 geometry by factor of 2
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 10000 rects
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 20000 rects
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 30000 rects
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 40000 rects
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808273 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808740 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808739 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808738 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808737 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808736 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808735 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808734 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808733 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808732 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808731 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808730 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808752 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808751 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808750 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808749 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808748 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808747 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808746 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808745 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808744 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808743 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808742 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808741 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808324 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808270 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808187 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808338 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808337 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808700 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808559 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808729 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_p_em1c_cdns_55959141808753 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_5595914180860 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180857 geometry by factor of 2
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 10000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 20000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 30000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 40000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 50000 rects
+Scaled magic input cell sky130_fd_pr__hvdftpm1s2__example_55959141808649 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s__example_55959141808646 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808378 geometry by factor of 2
+sky130_fd_io__xres4v2_in_buf: 10000 rects
+sky130_fd_io__xres4v2_in_buf: 20000 rects
+sky130_fd_io__xres4v2_in_buf: 30000 rects
+sky130_fd_io__xres4v2_in_buf: 40000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808782 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808449 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808452 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808233 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180827 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_5595914180835 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808242 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180829 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808237 geometry by factor of 2
+sky130_fd_io__top_gpiov2: 10000 rects
+sky130_fd_io__top_gpiov2: 20000 rects
+sky130_fd_io__top_gpiov2: 30000 rects
+sky130_fd_io__top_gpiov2: 40000 rects
+sky130_fd_io__top_gpiov2: 50000 rects
+sky130_fd_io__top_gpiov2: 60000 rects
+sky130_fd_io__top_gpiov2: 70000 rects
+sky130_fd_io__top_gpiov2: 80000 rects
+sky130_fd_io__top_gpiov2: 90000 rects
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808418 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808190 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180811 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808191 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808517 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808518 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180815 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180816 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180884 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808106 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808504 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180812 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180875 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2s_cdns_55959141808438 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2o_cdns_55959141808439 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180882 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180881 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_5595914180880 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_5595914180879 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180823 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808510 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808394 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808298 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808440 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180878 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808434 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808102 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808115 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808100 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808140 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808280 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808425 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808306 geometry by factor of 2
+sky130_fd_io__gpiov2_amux: 10000 rects
+sky130_fd_io__gpiov2_amux: 20000 rects
+sky130_fd_io__gpiov2_amux: 30000 rects
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808178 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808488 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808122 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808123 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808476 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180868 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180869 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808581 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808278 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808462 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808200 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_5595914180894 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfm1sd__example_55959141808258 geometry by factor of 2
+sky130_fd_io__amux_switch_1v2b: 10000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808563 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808251 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfm1sd2__example_55959141808561 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808267 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808266 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808633 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808322 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808321 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808320 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808294 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808325 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808323 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808291 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__pfet_01v8__example_55959141808640 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808194 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808328 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808327 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808272 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808271 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808143 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808275 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808276 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808297 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808296 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808295 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808293 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808292 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808300 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808299 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__nfet_01v8__example_55959141808308 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_55959141808301 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808302 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_5595914180854 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808368 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808625 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808373 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808374 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808398 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808397 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808396 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808395 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808401 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808399 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808269 geometry by factor of 2
+sky130_fd_io__gpio_odrvr_subv2: 10000 rects
+sky130_fd_io__gpio_odrvr_subv2: 20000 rects
+sky130_fd_io__gpio_odrvr_subv2: 30000 rects
+Scaled magic input cell sky130_fd_pr__via_pol1_centered__example_559591418080 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180832 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180852 geometry by factor of 2
+sky130_fd_io__nfet_con_diff_wo_abt_270v2: 10000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270v2: 20000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270v2: 30000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418083 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418082 geometry by factor of 2
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 10000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 20000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 30000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 40000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418085 geometry by factor of 2
+sky130_fd_io__gpio_pddrvr_strong_slowv2: 10000 rects
+sky130_fd_io__gpio_pddrvr_strong_slowv2: 20000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808655 geometry by factor of 2
+sky130_fd_io__top_ground_lvc_wpad: 10000 rects
+sky130_fd_io__top_ground_lvc_wpad: 20000 rects
+sky130_fd_io__top_ground_lvc_wpad: 30000 rects
+sky130_fd_io__top_ground_lvc_wpad: 40000 rects
+sky130_fd_io__top_ground_lvc_wpad: 50000 rects
+sky130_fd_io__top_ground_lvc_wpad: 60000 rects
+sky130_fd_io__top_ground_lvc_wpad: 70000 rects
+sky130_fd_io__top_ground_lvc_wpad: 80000 rects
+sky130_fd_io__top_ground_lvc_wpad: 90000 rects
+sky130_fd_io__top_ground_lvc_wpad: 100000 rects
+sky130_fd_io__top_ground_lvc_wpad: 110000 rects
+sky130_fd_io__top_ground_lvc_wpad: 120000 rects
+sky130_fd_io__top_ground_lvc_wpad: 130000 rects
+sky130_fd_io__top_ground_lvc_wpad: 140000 rects
+sky130_fd_io__top_ground_lvc_wpad: 150000 rects
+sky130_fd_io__top_ground_lvc_wpad: 160000 rects
+sky130_fd_io__top_ground_lvc_wpad: 170000 rects
+sky130_fd_io__top_ground_lvc_wpad: 180000 rects
+sky130_fd_io__top_ground_lvc_wpad: 190000 rects
+sky130_fd_io__top_ground_lvc_wpad: 200000 rects
+sky130_fd_io__top_ground_lvc_wpad: 210000 rects
+sky130_fd_io__top_ground_lvc_wpad: 220000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808684 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808686 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808685 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__gnd2gnd_tap geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808683 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dftpl1s2__example_55959141808702 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808682 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dftpl1s2__example_55959141808694 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808681 geometry by factor of 2
+sky130_fd_io__overlay_vssio_hvc: 10000 rects
+sky130_fd_io__hvc_clampv2: 10000 rects
+sky130_fd_io__hvc_clampv2: 20000 rects
+sky130_fd_io__hvc_clampv2: 30000 rects
+sky130_fd_io__hvc_clampv2: 40000 rects
+sky130_fd_io__hvc_clampv2: 50000 rects
+sky130_fd_io__hvc_clampv2: 60000 rects
+sky130_fd_io__hvc_clampv2: 70000 rects
+sky130_fd_io__hvc_clampv2: 80000 rects
+sky130_fd_io__hvc_clampv2: 90000 rects
+sky130_fd_io__hvc_clampv2: 100000 rects
+sky130_fd_io__hvc_clampv2: 110000 rects
+sky130_fd_io__hvc_clampv2: 120000 rects
+sky130_fd_io__hvc_clampv2: 130000 rects
+sky130_fd_io__hvc_clampv2: 140000 rects
+sky130_fd_io__hvc_clampv2: 150000 rects
+sky130_fd_io__hvc_clampv2: 160000 rects
+sky130_fd_io__hvc_clampv2: 170000 rects
+sky130_fd_io__hvc_clampv2: 180000 rects
+sky130_fd_io__hvc_clampv2: 190000 rects
+sky130_fd_io__hvc_clampv2: 200000 rects
+sky130_fd_io__hvc_clampv2: 210000 rects
+sky130_fd_io__hvc_clampv2: 220000 rects
+sky130_fd_io__hvc_clampv2: 230000 rects
+sky130_fd_io__hvc_clampv2: 240000 rects
+sky130_fd_io__hvc_clampv2: 250000 rects
+sky130_fd_io__hvc_clampv2: 260000 rects
+sky130_fd_io__hvc_clampv2: 270000 rects
+sky130_fd_io__hvc_clampv2: 280000 rects
+sky130_fd_io__top_power_lvc_wpad: 10000 rects
+sky130_fd_io__top_power_lvc_wpad: 20000 rects
+sky130_fd_io__top_power_lvc_wpad: 30000 rects
+sky130_fd_io__top_power_lvc_wpad: 40000 rects
+sky130_fd_io__top_power_lvc_wpad: 50000 rects
+sky130_fd_io__top_power_lvc_wpad: 60000 rects
+sky130_fd_io__top_power_lvc_wpad: 70000 rects
+sky130_fd_io__top_power_lvc_wpad: 80000 rects
+sky130_fd_io__top_power_lvc_wpad: 90000 rects
+sky130_fd_io__top_power_lvc_wpad: 100000 rects
+sky130_fd_io__top_power_lvc_wpad: 110000 rects
+sky130_fd_io__top_power_lvc_wpad: 120000 rects
+sky130_fd_io__top_power_lvc_wpad: 130000 rects
+sky130_fd_io__top_power_lvc_wpad: 140000 rects
+sky130_fd_io__top_power_lvc_wpad: 150000 rects
+sky130_fd_io__top_power_lvc_wpad: 160000 rects
+sky130_fd_io__top_power_lvc_wpad: 170000 rects
+sky130_fd_io__top_power_lvc_wpad: 180000 rects
+sky130_fd_io__top_power_lvc_wpad: 190000 rects
+sky130_fd_io__top_power_lvc_wpad: 200000 rects
+sky130_fd_io__top_power_lvc_wpad: 210000 rects
+sky130_fd_io__top_power_lvc_wpad: 220000 rects
+sky130_fd_io__top_power_lvc_wpad: 230000 rects
+sky130_fd_io__overlay_vddio_hvc: 10000 rects
+Processing timestamp mismatches: sky130_fd_sc_hd__tapvpwrvgnd_1, sky130_fd_sc_hd__buf_8, sky130_ef_sc_hd__decap_12, sky130_ef_io__vccd_lvc_clamped3_pad, sky130_ef_io__vssd_lvc_clamped3_pad, sky130_ef_io__vddio_hvc_clamped_pad, sky130_ef_io__disconnect_vdda_slice_5um, sky130_ef_io__vccd_lvc_clamped_pad, sky130_ef_io__vdda_hvc_clamped_pad, sky130_ef_io__vssio_hvc_clamped_pad, sky130_ef_io__vssd_lvc_clamped_pad, sky130_ef_io__gpiov2_pad_wrapped, sky130_fd_sc_hd__fill_8, sky130_fd_sc_hd__fill_4, constant_block, sky130_fd_sc_hd__buf_16, sky130_fd_sc_hd__conb_1, sky130_fd_sc_hd__fill_1, sky130_fd_sc_hd__fill_2, sky130_fd_io__top_xres4v2, sky130_ef_io__vssa_hvc_clamped_pad, sky130_ef_io__com_bus_slice_10um, sky130_ef_io__com_bus_slice_5um, sky130_ef_io__com_bus_slice_1um, sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um, sky130_ef_io__corner_pad, sky130_ef_io__com_bus_slice_20um, gpio_control_power_routing, gpio_control_power_routing_right, gpio_control_power_routing_top, gpio_defaults_block_0801, sky130_fd_sc_hd__decap_3, sky130_fd_sc_hd__decap_4, sky130_fd_sc_hd__decap_12, sky130_fd_sc_hd__decap_6, sky130_fd_sc_hd__inv_12, mprj2_logic_high, mprj_logic_high, sky130_fd_sc_hd__decap_8, sky130_fd_sc_hvl__conb_1, mgmt_protect_hv, sky130_fd_sc_hvl__lsbufhv2lv_1, sky130_fd_sc_hvl__fill_2, sky130_fd_sc_hvl__fill_1, sky130_fd_sc_hd__bufbuf_8, sky130_fd_sc_hd__buf_6, sky130_fd_sc_hd__buf_4, sky130_fd_sc_hd__nand2_8, sky130_fd_sc_hd__nand2_4, sky130_fd_sc_hd__nand2_2, sky130_fd_sc_hd__nand2_1, sky130_fd_sc_hd__clkbuf_4, sky130_fd_sc_hd__clkbuf_8, sky130_fd_sc_hd__and2_1, sky130_fd_sc_hd__and2_2, sky130_fd_sc_hd__and2_4, sky130_fd_sc_hd__and3b_4, sky130_fd_sc_hd__and3b_2, sky130_fd_sc_hd__and3b_1, sky130_fd_sc_hd__and2b_4, sky130_fd_sc_hd__clkinv_2, sky130_fd_sc_hd__inv_2, sky130_fd_sc_hd__clkinv_8, sky130_fd_sc_hd__clkinv_4, sky130_fd_sc_hd__inv_4, sky130_fd_sc_hd__diode_2, sky130_fd_sc_hd__dfbbp_1, sky130_fd_sc_hd__inv_8, sky130_fd_sc_hd__nor2_2, sky130_fd_sc_hd__mux2_2, gpio_defaults_block_1801, gpio_defaults_block_0403, sky130_fd_sc_hd__o32a_2, sky130_fd_sc_hd__o21ba_2, sky130_fd_sc_hd__nand4b_2, sky130_fd_sc_hd__o2bb2a_2, sky130_fd_sc_hd__xor2_2, sky130_fd_sc_hd__a21boi_2, sky130_fd_sc_hd__nand3b_2, sky130_fd_sc_hd__o221a_2, sky130_fd_sc_hd__o22a_2, sky130_fd_sc_hd__o2111a_2, sky130_fd_sc_hd__a32o_2, sky130_fd_sc_hd__or2_2, sky130_fd_sc_hd__einvp_2, sky130_fd_sc_hd__einvn_8, sky130_fd_sc_hd__einvn_4, sky130_fd_sc_hd__clkinv_1, sky130_fd_sc_hd__einvp_1, sky130_fd_sc_hd__clkbuf_1, sky130_fd_sc_hd__clkbuf_2, sky130_fd_sc_hd__clkbuf_16, sky130_fd_sc_hd__dfrtp_2, sky130_fd_sc_hd__buf_2, sky130_fd_sc_hd__a22o_2, sky130_fd_sc_hd__a21o_2, sky130_fd_sc_hd__nand3_2, sky130_fd_sc_hd__o31a_2, sky130_fd_sc_hd__o21ai_2, sky130_fd_sc_hd__o211a_2, sky130_fd_sc_hd__and3_2, sky130_fd_sc_hd__nand2b_2, sky130_fd_sc_hd__a211o_2, sky130_fd_sc_hd__o21a_2, sky130_fd_sc_hd__a21oi_2, sky130_fd_sc_hd__and2b_2, sky130_fd_sc_hd__xnor2_2, sky130_fd_sc_hd__and4b_2, sky130_fd_sc_hd__nand4_2, sky130_fd_sc_hd__a31o_2, sky130_fd_sc_hd__inv_6, sky130_fd_sc_hd__a21o_4, sky130_fd_sc_hd__a21oi_4, sky130_fd_sc_hd__a221o_4, sky130_fd_sc_hd__a221oi_1, sky130_fd_sc_hd__and4_2, sky130_fd_sc_hd__o31a_4, sky130_fd_sc_hd__mux2_8, sky130_fd_sc_hd__o221a_4, sky130_fd_sc_hd__nor3_4, sky130_fd_sc_hd__xor2_1, sky130_fd_sc_hd__o21a_4, sky130_fd_sc_hd__nand3b_4, sky130_fd_sc_hd__and4b_4, sky130_fd_sc_hd__a31oi_4, sky130_fd_sc_hd__nand4b_4, sky130_fd_sc_hd__a2111oi_1, sky130_fd_sc_hd__nor3b_1, sky130_fd_sc_hd__o41a_1, sky130_fd_sc_hd__a311oi_2, sky130_fd_sc_hd__and2b_1, sky130_fd_sc_hd__a41o_1, sky130_fd_sc_hd__and4_1, sky130_fd_sc_hd__a31oi_1, sky130_fd_sc_hd__nand4b_1, sky130_fd_sc_hd__o2111a_1, sky130_fd_sc_hd__o211a_1, sky130_fd_sc_hd__o311a_1, sky130_fd_sc_hd__nand4_1, sky130_fd_sc_hd__a21boi_1, sky130_fd_sc_hd__o32a_1, sky130_fd_sc_hd__and3_1, sky130_fd_sc_hd__nand2b_4, sky130_fd_sc_hd__a2111o_2, sky130_fd_sc_hd__nor4_4, sky130_fd_sc_hd__a2111o_4, sky130_fd_sc_hd__nor4_2, sky130_fd_sc_hd__a2111o_1, sky130_fd_sc_hd__o221a_1, sky130_fd_sc_hd__nor2_8, sky130_fd_sc_hd__nor2_4, sky130_fd_sc_hd__a311o_1, sky130_fd_sc_hd__nand3_4, sky130_fd_sc_hd__and3_4, sky130_fd_sc_hd__and4bb_2, sky130_fd_sc_hd__and4bb_1, sky130_fd_sc_hd__and4b_1, sky130_fd_sc_hd__o21ba_1, sky130_fd_sc_hd__a211o_1, sky130_fd_sc_hd__a221o_2, sky130_fd_sc_hd__o2bb2a_1, sky130_fd_sc_hd__a21bo_1, sky130_fd_sc_hd__a211o_4, sky130_fd_sc_hd__a221o_1, sky130_fd_sc_hd__a22o_1, sky130_fd_sc_hd__a32o_1, sky130_fd_sc_hd__dfstp_4, sky130_fd_sc_hd__buf_12, sky130_fd_sc_hd__dlymetal6s2s_1, sky130_fd_sc_hd__dlygate4sd3_1, sky130_fd_sc_hd__dfrtp_1, sky130_fd_sc_hd__dfstp_2, sky130_fd_sc_hd__dfrtn_1, sky130_fd_sc_hd__dfrtp_4, sky130_fd_sc_hd__dfstp_1, sky130_fd_sc_hd__dfxtp_1, sky130_fd_sc_hd__mux2_1, sky130_fd_sc_hd__o31a_1, sky130_fd_sc_hd__a21o_1, sky130_fd_sc_hd__o31ai_1, sky130_fd_sc_hd__nor4_1, sky130_fd_sc_hd__nor3_1, sky130_fd_sc_hd__nor3_2, sky130_fd_sc_hd__a21oi_1, sky130_fd_sc_hd__nor2_1, sky130_fd_sc_hd__a2bb2o_1, sky130_fd_sc_hd__o21ai_1, sky130_fd_sc_hd__o22a_1, sky130_fd_sc_hd__nand2b_1, sky130_fd_sc_hd__o21a_1, sky130_fd_sc_hd__a31o_1, sky130_fd_sc_hd__nand3_1, sky130_fd_sc_hd__o2111ai_1, sky130_fd_sc_hd__xnor2_1, sky130_fd_sc_hd__mux2_4, gpio_defaults_block_1803, sky130_fd_sc_hd__and2_0, sky130_fd_sc_hd__o21ai_4, sky130_fd_sc_hd__or2_0, sky130_fd_sc_hd__dfbbn_2, sky130_fd_sc_hd__macro_sparecell, sky130_fd_sc_hd__nor3b_2, sky130_fd_sc_hd__o211ai_4, sky130_fd_sc_hd__a41oi_1, sky130_fd_sc_hd__o2bb2ai_1, sky130_fd_sc_hd__o31ai_2, sky130_fd_sc_hd__o2111ai_2, sky130_fd_sc_hd__nand4bb_1, sky130_fd_sc_hd__nand3b_1, sky130_fd_sc_hd__o21bai_1, alpha_B, alpha_D, alpha_8, sky130_fd_sc_hvl__diode_2, sky130_fd_sc_hvl__decap_4, sky130_fd_sc_hvl__decap_8.
+   Generating output for cell caravel_logo
+   Generating output for cell font_22
+   Generating output for cell font_73
+   Generating output for cell font_43
+   Generating output for cell font_49
+   Generating output for cell font_65
+   Generating output for cell font_68
+   Generating output for cell font_54
+   Generating output for cell font_67
+   Generating output for cell font_6E
+   Generating output for cell font_69
+   Generating output for cell font_6C
+   Generating output for cell font_61
+   Generating output for cell font_53
+   Generating output for cell caravel_motto
+   Generating output for cell font_79
+   Generating output for cell font_76
+   Generating output for cell font_74
+   Generating output for cell font_72
+   Generating output for cell font_70
+   Generating output for cell font_66
+   Generating output for cell font_63
+   Generating output for cell font_62
+   Generating output for cell font_57
+   Generating output for cell font_56
+   Generating output for cell font_50
+   Generating output for cell font_47
+   Generating output for cell font_44
+   Generating output for cell font_35
+   Generating output for cell font_32
+   Generating output for cell font_30
+   Generating output for cell font_29
+   Generating output for cell font_28
+   Generating output for cell font_20
+   Generating output for cell font_6F
+   Generating output for cell font_6B
+   Generating output for cell font_4F
+   Generating output for cell font_4B
+   Generating output for cell font_2D
+   Generating output for cell copyright_block
+   Generating output for cell open_source
+   Generating output for cell sky130_fd_sc_hvl__decap_8
+   Generating output for cell sky130_fd_sc_hvl__decap_4
+   Generating output for cell sky130_fd_sc_hvl__diode_2
+   Generating output for cell sky130_fd_sc_hvl__fill_1
+   Generating output for cell sky130_fd_sc_hvl__fill_2
+   Generating output for cell sky130_fd_sc_hvl__lsbufhv2lv_1
+   Generating output for cell xres_buf
+   Generating output for cell alpha_8
+   Generating output for cell alpha_D
+   Generating output for cell alpha_B
+   Generating output for cell alpha_0
+   Generating output for cell user_id_textblock
+   Generating output for cell sky130_fd_sc_hd__decap_6
+   Generating output for cell sky130_fd_sc_hd__decap_12
+   Generating output for cell sky130_fd_sc_hd__decap_4
+   Generating output for cell sky130_fd_sc_hd__decap_3
+   Generating output for cell sky130_fd_sc_hd__fill_2
+   Generating output for cell sky130_fd_sc_hd__fill_1
+   Generating output for cell sky130_fd_sc_hd__conb_1
+   Generating output for cell sky130_fd_sc_hd__tapvpwrvgnd_1
+   Generating output for cell gpio_defaults_block_1803
+   Generating output for cell sky130_fd_sc_hd__o21bai_1
+   Generating output for cell sky130_fd_sc_hd__nand3b_1
+   Generating output for cell sky130_fd_sc_hd__nand4bb_1
+   Generating output for cell sky130_fd_sc_hd__o2111ai_2
+   Generating output for cell sky130_fd_sc_hd__o31ai_2
+   Generating output for cell sky130_fd_sc_hd__o2bb2ai_1
+   Generating output for cell sky130_fd_sc_hd__a41oi_1
+   Generating output for cell sky130_fd_sc_hd__o211ai_4
+   Generating output for cell sky130_fd_sc_hd__nor3b_2
+   Generating output for cell sky130_fd_sc_hd__xnor2_1
+   Generating output for cell sky130_fd_sc_hd__o2111ai_1
+   Generating output for cell sky130_fd_sc_hd__nand3_1
+   Generating output for cell sky130_fd_sc_hd__a31o_1
+   Generating output for cell sky130_fd_sc_hd__o21a_1
+   Generating output for cell sky130_fd_sc_hd__nand2b_1
+   Generating output for cell sky130_fd_sc_hd__o22a_1
+   Generating output for cell sky130_fd_sc_hd__o21ai_1
+   Generating output for cell sky130_fd_sc_hd__a2bb2o_1
+   Generating output for cell sky130_fd_sc_hd__nor2_1
+   Generating output for cell sky130_fd_sc_hd__a21oi_1
+   Generating output for cell sky130_fd_sc_hd__nor3_2
+   Generating output for cell sky130_fd_sc_hd__nor3_1
+   Generating output for cell sky130_fd_sc_hd__nor4_1
+   Generating output for cell sky130_fd_sc_hd__o31ai_1
+   Generating output for cell sky130_fd_sc_hd__a21o_1
+   Generating output for cell sky130_fd_sc_hd__o31a_1
+   Generating output for cell sky130_fd_sc_hd__mux2_1
+   Generating output for cell sky130_fd_sc_hd__dfxtp_1
+   Generating output for cell sky130_fd_sc_hd__dfstp_1
+   Generating output for cell sky130_fd_sc_hd__dfrtp_4
+   Generating output for cell sky130_fd_sc_hd__dfrtn_1
+   Generating output for cell sky130_fd_sc_hd__dfstp_2
+   Generating output for cell sky130_fd_sc_hd__dfrtp_1
+   Generating output for cell sky130_fd_sc_hd__dlymetal6s2s_1
+   Generating output for cell sky130_fd_sc_hd__buf_12
+   Generating output for cell sky130_fd_sc_hd__o21a_2
+   Generating output for cell sky130_fd_sc_hd__nand2b_2
+   Generating output for cell sky130_fd_sc_hd__o21ai_2
+   Generating output for cell sky130_fd_sc_hd__buf_2
+   Generating output for cell sky130_fd_sc_hd__dfrtp_2
+   Generating output for cell sky130_fd_sc_hd__clkbuf_16
+   Generating output for cell sky130_fd_sc_hd__clkbuf_2
+   Generating output for cell sky130_fd_sc_hd__clkbuf_1
+   Generating output for cell sky130_fd_sc_hd__nor2_2
+   Generating output for cell sky130_fd_sc_hd__diode_2
+   Generating output for cell sky130_fd_sc_hd__inv_4
+   Generating output for cell sky130_fd_sc_hd__clkinv_4
+   Generating output for cell sky130_fd_sc_hd__inv_2
+   Generating output for cell sky130_fd_sc_hd__clkinv_2
+   Generating output for cell sky130_fd_sc_hd__and2_1
+   Generating output for cell sky130_fd_sc_hd__clkbuf_4
+   Generating output for cell sky130_fd_sc_hd__nand2_1
+   Generating output for cell sky130_fd_sc_hd__buf_4
+   Generating output for cell sky130_fd_sc_hd__decap_8
+   Generating output for cell sky130_ef_sc_hd__decap_12
+   Generating output for cell caravel_clocking
+   Generating output for cell sky130_fd_sc_hd__clkbuf_8
+   Generating output for cell buff_flash_clkrst
+   Generating output for cell sky130_fd_sc_hd__nand2_2
+   Generating output for cell sky130_fd_sc_hd__macro_sparecell
+   Generating output for cell sky130_fd_sc_hd__dfbbn_2
+   Generating output for cell sky130_fd_sc_hd__or2_0
+   Generating output for cell sky130_fd_sc_hd__o21ai_4
+   Generating output for cell sky130_fd_sc_hd__and2_0
+   Generating output for cell sky130_fd_sc_hd__mux2_4
+   Generating output for cell sky130_fd_sc_hd__dlygate4sd3_1
+   Generating output for cell sky130_fd_sc_hd__and2b_2
+   Generating output for cell sky130_fd_sc_hd__and3b_2
+   Generating output for cell sky130_fd_sc_hd__and2_2
+   Generating output for cell sky130_fd_sc_hd__buf_16
+   Generating output for cell gpio_logic_high
+   Generating output for cell gpio_control_block
+   Generating output for cell sky130_fd_sc_hd__dfstp_4
+   Generating output for cell sky130_fd_sc_hd__a32o_1
+   Generating output for cell sky130_fd_sc_hd__a22o_1
+   Generating output for cell sky130_fd_sc_hd__a221o_1
+   Generating output for cell sky130_fd_sc_hd__a211o_4
+   Generating output for cell sky130_fd_sc_hd__a21bo_1
+   Generating output for cell sky130_fd_sc_hd__o2bb2a_1
+   Generating output for cell sky130_fd_sc_hd__a221o_2
+   Generating output for cell sky130_fd_sc_hd__a211o_1
+   Generating output for cell sky130_fd_sc_hd__o21ba_1
+   Generating output for cell sky130_fd_sc_hd__and4b_1
+   Generating output for cell sky130_fd_sc_hd__and4bb_1
+   Generating output for cell sky130_fd_sc_hd__and4bb_2
+   Generating output for cell sky130_fd_sc_hd__and3_4
+   Generating output for cell sky130_fd_sc_hd__nand3_4
+   Generating output for cell sky130_fd_sc_hd__a311o_1
+   Generating output for cell sky130_fd_sc_hd__nor2_4
+   Generating output for cell sky130_fd_sc_hd__nor2_8
+   Generating output for cell sky130_fd_sc_hd__o221a_1
+   Generating output for cell sky130_fd_sc_hd__a2111o_1
+   Generating output for cell sky130_fd_sc_hd__nor4_2
+   Generating output for cell sky130_fd_sc_hd__a2111o_4
+   Generating output for cell sky130_fd_sc_hd__nor4_4
+   Generating output for cell sky130_fd_sc_hd__a2111o_2
+   Generating output for cell sky130_fd_sc_hd__nand2b_4
+   Generating output for cell sky130_fd_sc_hd__and3_1
+   Generating output for cell sky130_fd_sc_hd__o32a_1
+   Generating output for cell sky130_fd_sc_hd__a21boi_1
+   Generating output for cell sky130_fd_sc_hd__nand4_1
+   Generating output for cell sky130_fd_sc_hd__o311a_1
+   Generating output for cell sky130_fd_sc_hd__o211a_1
+   Generating output for cell sky130_fd_sc_hd__o2111a_1
+   Generating output for cell sky130_fd_sc_hd__nand4b_1
+   Generating output for cell sky130_fd_sc_hd__a31oi_1
+   Generating output for cell sky130_fd_sc_hd__and4_1
+   Generating output for cell sky130_fd_sc_hd__a41o_1
+   Generating output for cell sky130_fd_sc_hd__and2b_1
+   Generating output for cell sky130_fd_sc_hd__a311oi_2
+   Generating output for cell sky130_fd_sc_hd__o41a_1
+   Generating output for cell sky130_fd_sc_hd__nor3b_1
+   Generating output for cell sky130_fd_sc_hd__a2111oi_1
+   Generating output for cell sky130_fd_sc_hd__nand4b_4
+   Generating output for cell sky130_fd_sc_hd__a31oi_4
+   Generating output for cell sky130_fd_sc_hd__and4b_4
+   Generating output for cell sky130_fd_sc_hd__nand3b_4
+   Generating output for cell sky130_fd_sc_hd__o21a_4
+   Generating output for cell sky130_fd_sc_hd__xor2_1
+   Generating output for cell sky130_fd_sc_hd__nor3_4
+   Generating output for cell sky130_fd_sc_hd__o221a_4
+   Generating output for cell sky130_fd_sc_hd__mux2_8
+   Generating output for cell sky130_fd_sc_hd__o31a_4
+   Generating output for cell sky130_fd_sc_hd__and4_2
+   Generating output for cell sky130_fd_sc_hd__a221oi_1
+   Generating output for cell sky130_fd_sc_hd__a221o_4
+   Generating output for cell sky130_fd_sc_hd__a21oi_4
+   Generating output for cell sky130_fd_sc_hd__a21o_4
+   Generating output for cell sky130_fd_sc_hd__inv_6
+   Generating output for cell sky130_fd_sc_hd__a31o_2
+   Generating output for cell sky130_fd_sc_hd__nand4_2
+   Generating output for cell sky130_fd_sc_hd__and4b_2
+   Generating output for cell sky130_fd_sc_hd__xnor2_2
+   Generating output for cell sky130_fd_sc_hd__a21oi_2
+   Generating output for cell sky130_fd_sc_hd__a211o_2
+   Generating output for cell sky130_fd_sc_hd__and3_2
+   Generating output for cell sky130_fd_sc_hd__o211a_2
+   Generating output for cell sky130_fd_sc_hd__o31a_2
+   Generating output for cell sky130_fd_sc_hd__nand3_2
+   Generating output for cell sky130_fd_sc_hd__a21o_2
+   Generating output for cell sky130_fd_sc_hd__a22o_2
+   Generating output for cell sky130_fd_sc_hd__mux2_2
+   Generating output for cell sky130_fd_sc_hd__and2b_4
+   Generating output for cell sky130_fd_sc_hd__and3b_1
+   Generating output for cell sky130_fd_sc_hd__and3b_4
+   Generating output for cell sky130_fd_sc_hd__and2_4
+   Generating output for cell sky130_fd_sc_hd__nand2_4
+   Generating output for cell sky130_fd_sc_hd__nand2_8
+   Generating output for cell sky130_fd_sc_hd__buf_6
+   Generating output for cell sky130_fd_sc_hd__buf_8
+   Generating output for cell housekeeping
+   Generating output for cell sky130_fd_sc_hd__einvp_1
+   Generating output for cell sky130_fd_sc_hd__clkinv_1
+   Generating output for cell sky130_fd_sc_hd__einvn_4
+   Generating output for cell sky130_fd_sc_hd__einvn_8
+   Generating output for cell sky130_fd_sc_hd__einvp_2
+   Generating output for cell sky130_fd_sc_hd__or2_2
+   Generating output for cell sky130_fd_sc_hd__a32o_2
+   Generating output for cell sky130_fd_sc_hd__o2111a_2
+   Generating output for cell sky130_fd_sc_hd__o22a_2
+   Generating output for cell sky130_fd_sc_hd__o221a_2
+   Generating output for cell sky130_fd_sc_hd__nand3b_2
+   Generating output for cell sky130_fd_sc_hd__a21boi_2
+   Generating output for cell sky130_fd_sc_hd__xor2_2
+   Generating output for cell sky130_fd_sc_hd__o2bb2a_2
+   Generating output for cell sky130_fd_sc_hd__nand4b_2
+   Generating output for cell sky130_fd_sc_hd__o21ba_2
+   Generating output for cell sky130_fd_sc_hd__o32a_2
+   Generating output for cell sky130_fd_sc_hd__clkinv_8
+   Generating output for cell digital_pll
+   Generating output for cell user_id_programming
+   Generating output for cell simple_por
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__buf_8".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "simple_por".
+   Generating output for cell mgmt_core_wrapper
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__dfxtp_2".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__a22o_4".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__dfxtp_4".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__mux4_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__mux4_2".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a2bb2o_2".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__and4_4".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__or4bb_4".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__or4b_4".
+Reading "sky130_fd_sc_hd__or3b_4".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__or4b_1".
+Reading "sky130_fd_sc_hd__o211a_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__o41ai_4".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__o41a_4".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__or4bb_1".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__xor2_4".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__nand4_4".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__and4bb_4".
+Reading "sky130_fd_sc_hd__a41o_2".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__or2_4".
+Reading "sky130_fd_sc_hd__a2111oi_2".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__nor4b_1".
+Reading "sky130_fd_sc_hd__o2111ai_4".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o41ai_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__or3b_2".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__nor4b_4".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__o41a_2".
+Reading "sky130_fd_sc_hd__or4b_2".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__a31o_4".
+Reading "sky130_fd_sc_hd__ebufn_4".
+Reading "sky130_fd_sc_hd__dlxtp_1".
+Reading "sky130_fd_sc_hd__dlclkp_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__inv_1".
+Reading "sky130_fd_sc_hd__nor4b_2".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "RAM256".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__o2111a_4".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__o22ai_4".
+Reading "sky130_fd_sc_hd__a221oi_4".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__o22ai_1".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__a311o_2".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__o311a_4".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__o221ai_4".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__a311oi_4".
+Reading "sky130_fd_sc_hd__o32ai_4".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__nand4b_1".
+Reading "sky130_fd_sc_hd__o211ai_2".
+Reading "sky130_fd_sc_hd__a22oi_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__a211oi_4".
+Reading "sky130_fd_sc_hd__nor3b_4".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__a2111oi_4".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_fd_sc_hd__a2bb2o_4".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__a22oi_2".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__o2bb2a_4".
+Reading "sky130_fd_sc_hd__o21bai_4".
+Reading "sky130_fd_sc_hd__o311ai_1".
+Reading "sky130_fd_sc_hd__a32oi_2".
+Reading "sky130_fd_sc_hd__o2bb2ai_2".
+Reading "sky130_fd_sc_hd__o311ai_4".
+Reading "sky130_fd_sc_hd__o2bb2ai_4".
+Reading "sky130_fd_sc_hd__o31ai_4".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__a31oi_2".
+Reading "sky130_fd_sc_hd__o311a_2".
+Reading "sky130_fd_sc_hd__o22a_4".
+Reading "sky130_fd_sc_hd__a32oi_4".
+Reading "sky130_fd_sc_hd__a211oi_2".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o221ai_1".
+Reading "sky130_fd_sc_hd__clkinv_16".
+Reading "sky130_fd_sc_hd__or4bb_2".
+Reading "sky130_fd_sc_hd__a221oi_2".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__a311oi_1".
+Reading "sky130_fd_sc_hd__o311ai_2".
+Reading "sky130_fd_sc_hd__a32oi_1".
+Reading "sky130_fd_sc_hd__a2bb2oi_2".
+Reading "sky130_fd_sc_hd__a2bb2oi_1".
+Reading "sky130_fd_sc_hd__a2bb2oi_4".
+Reading "sky130_fd_sc_hd__xnor2_4".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__a32o_4".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__a41oi_2".
+Reading "sky130_fd_sc_hd__o22ai_2".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__a41oi_4".
+Reading "sky130_fd_sc_hd__a41o_4".
+Reading "sky130_fd_sc_hd__a311o_4".
+Reading "sky130_fd_sc_hd__o32ai_1".
+Reading "sky130_fd_sc_hd__a21boi_4".
+Reading "sky130_fd_sc_hd__o32ai_2".
+Reading "sky130_fd_sc_hd__a21bo_2".
+Reading "RAM128".
+Reading "mgmt_core_wrapper".
+   Generating output for cell gpio_defaults_block_0403
+   Generating output for cell gpio_defaults_block_1801
+   Generating output for cell sky130_fd_sc_hd__inv_8
+   Generating output for cell sky130_fd_sc_hd__dfbbp_1
+   Generating output for cell spare_logic_block
+   Generating output for cell sky130_fd_sc_hd__bufbuf_8
+   Generating output for cell sky130_fd_sc_hvl__conb_1
+   Generating output for cell mgmt_protect_hv
+   Generating output for cell mprj_logic_high
+   Generating output for cell mprj2_logic_high
+   Generating output for cell sky130_fd_sc_hd__inv_12
+   Generating output for cell mgmt_protect
+   Generating output for cell gpio_defaults_block_0801
+   Generating output for cell gpio_control_power_routing_top
+   Generating output for cell gpio_control_power_routing_right
+   Generating output for cell gpio_control_power_routing
+   Generating output for cell caravel_power_routing
+   Generating output for cell user_project_wrapper
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__xnor2_4".
+Reading "sky130_fd_sc_hd__xor2_4".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__or2b_1".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a22oi_2".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "user_proj_example".
+Reading "user_project_wrapper".
+   Generating output for cell sky130_ef_io__com_bus_slice_20um
+   Generating output for cell sky130_fd_io__corner_bus_overlay
+   Generating output for cell sky130_ef_io__corner_pad
+   Generating output for cell sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um
+   Generating output for cell sky130_ef_io__com_bus_slice_1um
+   Generating output for cell sky130_ef_io__com_bus_slice_5um
+   Generating output for cell sky130_ef_io__com_bus_slice_10um
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_5595914180851
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808664
+   Generating output for cell sky130_fd_io__sio_clamp_pcap_4x5
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808680
+   Generating output for cell sky130_fd_io__esd_rcclamp_nfetcap
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808336
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808666
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808665
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808678
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808679
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808677
+   Generating output for cell sky130_fd_pr__via_pol1__example_5595914180839
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808667
+   Generating output for cell sky130_fd_pr__hvdftpl1s__example_55959141808671
+   Generating output for cell sky130_fd_pr__hvdftpl1s2__example_55959141808672
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808673
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808663
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808660
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808670
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808668
+   Generating output for cell sky130_fd_pr__hvdftpl1s__example_55959141808675
+   Generating output for cell sky130_fd_pr__hvdftpl1s2__example_55959141808676
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808674
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808662
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808661
+   Generating output for cell sky130_fd_pr__via_l1m1__example_559591418084
+   Generating output for cell sky130_fd_pr__genrivetdlring__example_559591418082
+   Generating output for cell sky130_fd_pr__gendlring__example_559591418081
+   Generating output for cell sky130_fd_pr__padplhp__example_559591418080
+   Generating output for cell sky130_fd_io__pad_esd
+   Generating output for cell sky130_fd_io__com_bus_slice
+   Generating output for cell sky130_fd_io__com_bus_hookup
+   Generating output for cell sky130_fd_io__com_busses_esd
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808669
+   Generating output for cell sky130_fd_io__top_ground_hvc_wpad
+   Generating output for cell sky130_fd_io__overlay_vssa_hvc
+   Generating output for cell sky130_ef_io__hvc_vdda_overlay
+   Generating output for cell sky130_ef_io__vssa_hvc_clamped_pad
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808719
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808767
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808765
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808764
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808720
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808718
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808717
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808716
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808243
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808723
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808722
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180890
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808721
+   Generating output for cell sky130_fd_io__xres_inv_hysv2
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180838
+   Generating output for cell sky130_fd_io__tk_tie_r_out_esd
+   Generating output for cell sky130_fd_io__res250_sub_small
+   Generating output for cell sky130_fd_io__res250only_small
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808264
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180858
+   Generating output for cell sky130_fd_pr__via_pol1__example_5595914180833
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180864
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808715
+   Generating output for cell sky130_fd_pr__res_bent_po__example_5595914180863
+   Generating output for cell sky130_fd_pr__res_bent_po__example_5595914180862
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_55959141808288
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180859
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808289
+   Generating output for cell sky130_fd_io__com_res_weak_v2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808274
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808728
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808727
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808726
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808725
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808724
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808554
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808553
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808552
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808551
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808402
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808350
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808261
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808260
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808259
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808400
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808372
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808326
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808290
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808128
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808127
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180897
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180819
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808555
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808147
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808157
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808156
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808155
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808154
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808153
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808152
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808151
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808150
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808149
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808148
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808158
+   Generating output for cell sky130_fd_io__signal_5_sym_hv_local_5term
+   Generating output for cell sky130_fd_io__gpio_buf_localesdv2
+   Generating output for cell sky130_fd_pr__via_pol1__example_559591418083
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808137
+   Generating output for cell sky130_fd_pr__dfl1sd__example_559591418086
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808371
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808370
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808369
+   Generating output for cell sky130_fd_io__hvsbt_inv_x1
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808316
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808421
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808385
+   Generating output for cell sky130_fd_pr__dfl1sd__example_559591418088
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808422
+   Generating output for cell sky130_fd_io__hvsbt_inv_x2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808612
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808616
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808615
+   Generating output for cell sky130_fd_io__hvsbt_inv_x4
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_5595914180848
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180849
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808766
+   Generating output for cell sky130_fd_pr__via_m2m3__example_55959141808714
+   Generating output for cell sky130_fd_pr__via_pol1_centered__example_559591418081
+   Generating output for cell sky130_fd_io__tk_em2s_cdns_55959141808652
+   Generating output for cell sky130_fd_io__tk_em2o_cdns_55959141808653
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_5595914180812
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_5595914180811
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418086
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418084
+   Generating output for cell sky130_fd_pr__hvdftpm1s2__example_55959141808659
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808658
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808657
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808202
+   Generating output for cell sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2
+   Generating output for cell sky130_fd_io__gpio_pudrvr_strong_axres4v2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808273
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808740
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808739
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808738
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808737
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808736
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808735
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808734
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808733
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808732
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808731
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808730
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808752
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808751
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808750
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808749
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808748
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808747
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808746
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808745
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808744
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808743
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808742
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808741
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808324
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808270
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808187
+   Generating output for cell sky130_fd_pr__res_generic_nd__example_55959141808755
+   Generating output for cell sky130_fd_pr__res_generic_nd__example_55959141808754
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808338
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808337
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808763
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808700
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808559
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808762
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808729
+   Generating output for cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758
+   Generating output for cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757
+   Generating output for cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756
+   Generating output for cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761
+   Generating output for cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760
+   Generating output for cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759
+   Generating output for cell sky130_fd_io__xres_p_em1c_cdns_55959141808753
+   Generating output for cell sky130_fd_io__xres2v2_rcfilter_lpfv2
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_5595914180860
+   Generating output for cell sky130_fd_pr__res_bent_po__example_5595914180861
+   Generating output for cell sky130_fd_io__com_res_weak_bentbigres
+   Generating output for cell sky130_fd_io__com_res_weak
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180857
+   Generating output for cell sky130_fd_pr__hvdftpm1s2__example_55959141808649
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808651
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808650
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808648
+   Generating output for cell sky130_fd_pr__hvdftpl1s__example_55959141808646
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808647
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808645
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808378
+   Generating output for cell sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2
+   Generating output for cell sky130_fd_io__gpio_pddrvr_strong_xres4v2
+   Generating output for cell sky130_fd_io__top_gpio_pad
+   Generating output for cell sky130_fd_io__com_busses
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808768
+   Generating output for cell sky130_fd_pr__res_bent_nd__example_55959141808769
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808787
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808786
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808782
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808785
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808449
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808784
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808452
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808783
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808781
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808780
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808779
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808233
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180827
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808778
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_5595914180835
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808777
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808776
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808775
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808242
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808774
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180829
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808773
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808237
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808772
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808771
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808770
+   Generating output for cell sky130_fd_io__tap_1
+   Generating output for cell sky130_fd_io__inv_1
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_559591418085
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_559591418089
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_559591418087
+   Generating output for cell sky130_fd_io__hvsbt_nand2
+   Generating output for cell sky130_fd_io__xres4v2_in_buf
+   Generating output for cell sky130_fd_io__top_xres4v2
+   Generating output for cell sky130_fd_sc_hd__fill_4
+   Generating output for cell sky130_fd_sc_hd__fill_8
+   Generating output for cell constant_block
+   Generating output for cell sky130_fd_io__res75only_small
+   Generating output for cell sky130_fd_io__com_bus_slice_m4
+   Generating output for cell sky130_fd_io__overlay_gpiov2_m4
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808420
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808419
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808418
+   Generating output for cell sky130_fd_io__hvsbt_nor
+   Generating output for cell sky130_fd_io__hvsbt_nand2v2
+   Generating output for cell sky130_fd_io__gpiov2_ictl_logic
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808190
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808611
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180811
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808549
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808548
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808191
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808189
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808517
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808518
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808610
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808609
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180815
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180816
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808608
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808604
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808533
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808529
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180884
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808230
+   Generating output for cell sky130_fd_io__gpiov2_in_buf
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808537
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808106
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808481
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808607
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808504
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808600
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808550
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808528
+   Generating output for cell sky130_fd_io__gpiov2_ipath_hvls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808595
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_5595914180825
+   Generating output for cell sky130_fd_io__gpiov2_inbuf_lvinv_x1
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180812
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808599
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808598
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808597
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808596
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808547
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808546
+   Generating output for cell sky130_fd_io__gpiov2_ipath_lvls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808606
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180875
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808605
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808540
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808603
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808602
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808601
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808535
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808527
+   Generating output for cell sky130_fd_io__gpiov2_vcchib_in_buf
+   Generating output for cell sky130_fd_io__gpiov2_ibuf_se
+   Generating output for cell sky130_fd_io__gpiov2_buf_localesd
+   Generating output for cell sky130_fd_io__gpiov2_ipath
+   Generating output for cell sky130_fd_io__tk_em2s_cdns_55959141808438
+   Generating output for cell sky130_fd_io__tk_em2o_cdns_55959141808439
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180882
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180881
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_5595914180880
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_5595914180879
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808430
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180823
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_5595914180822
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_5595914180813
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808624
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808510
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808623
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808622
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808621
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808620
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808619
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808618
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808116
+   Generating output for cell sky130_fd_io__com_ctl_lsv2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808394
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808298
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808440
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180878
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808434
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808435
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808433
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808432
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808102
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808431
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808115
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808429
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808428
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808100
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808140
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808427
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808426
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808280
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808425
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808424
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808423
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808306
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808383
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808382
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808380
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808379
+   Generating output for cell sky130_fd_io__com_ctl_ls_v2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808617
+   Generating output for cell sky130_fd_io__com_ctl_ls_en_1_v2
+   Generating output for cell sky130_fd_io__com_ctl_ls_1v2
+   Generating output for cell sky130_fd_io__gpiov2_ctl_lsbank
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808614
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808613
+   Generating output for cell sky130_fd_io__hvsbt_inv_x8v2
+   Generating output for cell sky130_fd_io__hvsbt_inv_x8
+   Generating output for cell sky130_fd_io__com_ctl_ls
+   Generating output for cell sky130_fd_io__com_ctl_hldv2
+   Generating output for cell sky130_fd_io__gpiov2_ctl
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808178
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808591
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808594
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808593
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808488
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808592
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808586
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808122
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808123
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808477
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808476
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808475
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808589
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808570
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808569
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_lshv2hv
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808588
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808587
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_lshv2hv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808590
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808460
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808468
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808467
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808466
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808465
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808464
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808463
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_ls
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_inv_1
+   Generating output for cell sky130_fd_io__gpiov2_amux_ls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808573
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808572
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808579
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808578
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808577
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808576
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808566
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180868
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180869
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808565
+   Generating output for cell sky130_fd_io__gpiov2_amx_pucsd_inv
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808441
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808571
+   Generating output for cell sky130_fd_io__gpiov2_amx_inv4
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808567
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808568
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr_lshv2hv
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr_lshv2hv2
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808581
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808580
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808278
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808462
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808583
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808582
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808498
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808497
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808496
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr_ls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808574
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808575
+   Generating output for cell sky130_fd_io__amx_inv1
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr
+   Generating output for cell sky130_fd_io__xor2_1
+   Generating output for cell sky130_fd_io__nor2_1
+   Generating output for cell sky130_fd_io__nand2_1
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808200
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808457
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808451
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808450
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_5595914180894
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808584
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808455
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808447
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808445
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808248
+   Generating output for cell sky130_fd_io__gpiov2_amux_nand5
+   Generating output for cell sky130_fd_pr__dfm1sd__example_55959141808258
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808585
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808446
+   Generating output for cell sky130_fd_io__gpiov2_amux_nand4
+   Generating output for cell sky130_fd_io__gpiov2_amux_decoder
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_logic
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808563
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808564
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808562
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808251
+   Generating output for cell sky130_fd_pr__dfm1sd2__example_55959141808561
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808560
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808558
+   Generating output for cell sky130_fd_io__amux_switch_1v2b
+   Generating output for cell sky130_fd_io__gpiov2_amux
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808416
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808417
+   Generating output for cell sky130_fd_io__hvsbt_xorv2
+   Generating output for cell sky130_fd_io__hvsbt_xor
+   Generating output for cell sky130_fd_io__com_ctl_ls_octl
+   Generating output for cell sky130_fd_io__gpiov2_octl
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808267
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808266
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808642
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808184
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808141
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808643
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808183
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808139
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808636
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808635
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808634
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808633
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808632
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808630
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808638
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808637
+   Generating output for cell sky130_fd_io__gpiov2_pdpredrvr_strong_nr3
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808629
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808628
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808627
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808626
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808354
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808631
+   Generating output for cell sky130_fd_io__gpiov2_pdpredrvr_strong_nr2
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_5595914180888
+   Generating output for cell sky130_fd_io__gpiov2_octl_mux
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808322
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808321
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808320
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808294
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808325
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808323
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808291
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808641
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808640
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808639
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808348
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808347
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808194
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808346
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808345
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808344
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808343
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808334
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808333
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808332
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808331
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808330
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808329
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808304
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808134
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808328
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808327
+   Generating output for cell sky130_fd_io__com_pdpredrvr_pbiasv2
+   Generating output for cell sky130_fd_io__gpiov2_pdpredrvr_strong
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808272
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808271
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808143
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808142
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808101
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808144
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_5595914180899
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808275
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808276
+   Generating output for cell sky130_fd_pr__res_generic_po__example_55959141808286
+   Generating output for cell sky130_fd_pr__res_generic_po__example_55959141808285
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808284
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808283
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808644
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808287
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808282
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808281
+   Generating output for cell sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a
+   Generating output for cell sky130_fd_io__gpiov2_pupredrvr_strong_nd2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808297
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808296
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808295
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808293
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808292
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808300
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808299
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808319
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808318
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808317
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808315
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808314
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808313
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808312
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808311
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808310
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808309
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808308
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808307
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808305
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808303
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_55959141808301
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808302
+   Generating output for cell sky130_fd_io__feascom_pupredrvr_nbiasv2
+   Generating output for cell sky130_fd_io__gpio_pupredrvr_strongv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808361
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808360
+   Generating output for cell sky130_fd_io__feas_com_pupredrvr_weak
+   Generating output for cell sky130_fd_pr__via_pol1__example_5595914180854
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808363
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808362
+   Generating output for cell sky130_fd_io__com_pupredrvr_strong_slowv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808366
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808365
+   Generating output for cell sky130_fd_io__com_pdpredrvr_weakv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808364
+   Generating output for cell sky130_fd_io__com_pdpredrvr_strong_slowv2
+   Generating output for cell sky130_fd_io__gpiov2_obpredrvr
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808368
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808625
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808373
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808374
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808393
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808392
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808391
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808390
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808389
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808388
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808387
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808386
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808384
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808381
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808377
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808376
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808375
+   Generating output for cell sky130_fd_io__gpio_dat_lsv2
+   Generating output for cell sky130_fd_io__gpio_dat_ls_1v2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808398
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808397
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808396
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808395
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808401
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808399
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808269
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808410
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808409
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808408
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808407
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808406
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808405
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808404
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808403
+   Generating output for cell sky130_fd_io__com_cclat
+   Generating output for cell sky130_fd_io__com_opath_datoev2
+   Generating output for cell sky130_fd_io__gpiov2_octl_dat
+   Generating output for cell sky130_fd_pr__via_pol1_centered__example_559591418080
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180832
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180856
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180855
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180853
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180852
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418083
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418082
+   Generating output for cell sky130_fd_io__nfet_con_diff_wo_abt_270v2
+   Generating output for cell sky130_fd_io__gpiov2_pddrvr_strong
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418085
+   Generating output for cell sky130_fd_io__pfet_con_diff_wo_abt_270v2
+   Generating output for cell sky130_fd_io__gpio_pudrvr_strongv2
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_5595914180850
+   Generating output for cell sky130_fd_io__gpio_pddrvr_weakv2
+   Generating output for cell sky130_fd_io__gpio_pddrvr_strong_slowv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808656
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808655
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808654
+   Generating output for cell sky130_fd_io__com_pudrvr_weakv2
+   Generating output for cell sky130_fd_io__com_pudrvr_strong_slowv2
+   Generating output for cell sky130_fd_io__gpio_odrvr_subv2
+   Generating output for cell sky130_fd_io__gpio_odrvrv2
+   Generating output for cell sky130_fd_io__gpio_opathv2
+   Generating output for cell sky130_fd_io__top_gpiov2
+   Generating output for cell sky130_fd_io__overlay_gpiov2
+   Generating output for cell sky130_ef_io__gpiov2_pad
+   Generating output for cell sky130_ef_io__gpiov2_pad_wrapped
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808691
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808687
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808684
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808686
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808685
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808683
+   Generating output for cell sky130_fd_io__gnd2gnd_strap
+   Generating output for cell sky130_fd_io__gnd2gnd_tap
+   Generating output for cell sky130_fd_io__gnd2gnd_diff
+   Generating output for cell sky130_fd_io__gnd2gnd_sub_dnwl
+   Generating output for cell sky130_fd_io__gnd2gnd_120x2_lv_isosub
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808690
+   Generating output for cell sky130_fd_pr__dftpl1s2__example_55959141808702
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808705
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808682
+   Generating output for cell sky130_fd_pr__dftpl1s2__example_55959141808694
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808693
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808681
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808688
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808699
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808698
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808697
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808696
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808695
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808704
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808703
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808701
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808689
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808692
+   Generating output for cell sky130_fd_io__top_ground_lvc_wpad
+   Generating output for cell sky130_fd_io__overlay_vssd_lvc
+   Generating output for cell sky130_ef_io__lvc_vccdx_overlay
+   Generating output for cell sky130_ef_io__vssd_lvc_clamped_pad
+   Generating output for cell sky130_fd_io__overlay_vssio_hvc
+   Generating output for cell sky130_ef_io__hvc_vssio_overlay
+   Generating output for cell sky130_ef_io__vssio_hvc_clamped_pad
+   Generating output for cell sky130_fd_io__hvc_clampv2
+   Generating output for cell sky130_fd_io__top_power_hvc_wpadv2
+   Generating output for cell sky130_fd_io__overlay_vdda_hvc
+   Generating output for cell sky130_ef_io__vdda_hvc_clamped_pad
+   Generating output for cell sky130_fd_io__top_power_lvc_wpad
+   Generating output for cell sky130_fd_io__overlay_vccd_lvc
+   Generating output for cell sky130_ef_io__vccd_lvc_clamped_pad
+   Generating output for cell sky130_ef_io__disconnect_vdda_slice_5um
+   Generating output for cell sky130_fd_io__overlay_vddio_hvc
+   Generating output for cell sky130_ef_io__hvc_vddio_overlay
+   Generating output for cell sky130_ef_io__vddio_hvc_clamped_pad
+   Generating output for cell chip_io_gpio_connects
+   Generating output for cell sky130_ef_io__lvc_vccdy_overlay
+   Generating output for cell sky130_ef_io__vssd_lvc_clamped3_pad
+   Generating output for cell sky130_ef_io__vccd_lvc_clamped3_pad
+   Generating output for cell chip_io
+   Generating output for cell gpio_signal_buffering
+   Generating output for cell caravel

tapeout/logs/tools.info

diff --git a/tapeout/logs/tools.info b/tapeout/logs/tools.info
new file mode 100644
index 0000000..98b8cee
--- /dev/null
+++ b/tapeout/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.28
+Magic: 8.3.348
\ No newline at end of file

tapeout/logs/uncompress.log

diff --git a/tapeout/logs/uncompress.log b/tapeout/logs/uncompress.log
new file mode 100644
index 0000000..f51ee68
--- /dev/null
+++ b/tapeout/logs/uncompress.log
@@ -0,0 +1,2 @@
+make: Nothing to be done for `check-env'.
+All files are uncompressed!

tapeout/outputs/gds/caravel_0008d8db.gds.gz.00.split

diff --git a/tapeout/outputs/gds/caravel_0008d8db.gds.gz.00.split b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.00.split
new file mode 100644
index 0000000..51f3615
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.00.split
Binary files differ

tapeout/outputs/gds/caravel_0008d8db.gds.gz.01.split

diff --git a/tapeout/outputs/gds/caravel_0008d8db.gds.gz.01.split b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.01.split
new file mode 100644
index 0000000..7748e0d
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.01.split
Binary files differ

tapeout/outputs/gds/caravel_0008d8db.gds.gz.02.split

diff --git a/tapeout/outputs/gds/caravel_0008d8db.gds.gz.02.split b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.02.split
new file mode 100644
index 0000000..4db372e
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.02.split
Binary files differ

tapeout/outputs/gds/caravel_0008d8db.gds.gz.03.split

diff --git a/tapeout/outputs/gds/caravel_0008d8db.gds.gz.03.split b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.03.split
new file mode 100644
index 0000000..2d12d79
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.03.split
Binary files differ

tapeout/outputs/gds/caravel_0008d8db.gds.gz.04.split

diff --git a/tapeout/outputs/gds/caravel_0008d8db.gds.gz.04.split b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.04.split
new file mode 100644
index 0000000..f413b29
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.04.split
Binary files differ

tapeout/outputs/gds/caravel_0008d8db.gds.gz.05.split

diff --git a/tapeout/outputs/gds/caravel_0008d8db.gds.gz.05.split b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.05.split
new file mode 100644
index 0000000..f30362c
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008d8db.gds.gz.05.split
Binary files differ

tapeout/outputs/klayout_beol_report.xml

diff --git a/tapeout/outputs/klayout_beol_report.xml b/tapeout/outputs/klayout_beol_report.xml
new file mode 100644
index 0000000..2408598
--- /dev/null
+++ b/tapeout/outputs/klayout_beol_report.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/sky130A_mr.drc'</generator>
+ <top-cell>caravel_0008d8db</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>li.1</name>
+   <description>li.1 : min. li width : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.3</name>
+   <description>li.3 : min. li spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.5</name>
+   <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.6</name>
+   <description>li.6 : min. li area : 0.0561um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1</name>
+   <description>ct.1: non-ring mcon should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_a</name>
+   <description>ct.1_a : minimum width of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_b</name>
+   <description>ct.1_b : maximum length of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.2</name>
+   <description>ct.2 : min. mcon spacing : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.4</name>
+   <description>ct.4 : mcon should covered by li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.1</name>
+   <description>m1.1 : min. m1 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.2</name>
+   <description>m1.2 : min. m1 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.3ab</name>
+   <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>791_m1.4</name>
+   <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4</name>
+   <description>m1.4 : mcon periphery must be enclosed by m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a</name>
+   <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a_a</name>
+   <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.6</name>
+   <description>m1.6 : min. m1 area : 0.083um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.7</name>
+   <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.5</name>
+   <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a</name>
+   <description>via.1a : via outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_a</name>
+   <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_b</name>
+   <description>via.1a_b : maximum length of via : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.2</name>
+   <description>via.2 : min. via spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a</name>
+   <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a_a</name>
+   <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.5a</name>
+   <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.1</name>
+   <description>m2.1 : min. m2 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.2</name>
+   <description>m2.2 : min. m2 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.3ab</name>
+   <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.6</name>
+   <description>m2.6 : min. m2 area : 0.0676um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.7</name>
+   <description>m2.7 : min. m2 holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4</name>
+   <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4_a</name>
+   <description>m2.4_a : via in periphery must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.5</name>
+   <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a</name>
+   <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_a</name>
+   <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_b</name>
+   <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.2</name>
+   <description>via2.2 : min. via2 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4</name>
+   <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4_a</name>
+   <description>via2.4_a : via must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.5</name>
+   <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.1</name>
+   <description>m3.1 : min. m3 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.2</name>
+   <description>m3.2 : min. m3 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.3cd</name>
+   <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4</name>
+   <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4_a</name>
+   <description>m3.4_a : via2 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1</name>
+   <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_a</name>
+   <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_b</name>
+   <description>via3.1_b : maximum length of via3 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.2</name>
+   <description>via3.2 : min. via3 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4</name>
+   <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4_a</name>
+   <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.5</name>
+   <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.1</name>
+   <description>m4.1 : min. m4 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.2</name>
+   <description>m4.2 : min. m4 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.4a</name>
+   <description>m4.4a : min. m4 area : 0.240um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.5ab</name>
+   <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3</name>
+   <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3_a</name>
+   <description>m4.3_a : via3 must be enclosed by met4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1</name>
+   <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_a</name>
+   <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_b</name>
+   <description>via4.1_b : maximum length of via4 : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.2</name>
+   <description>via4.2 : min. via4 spacing : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4</name>
+   <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4_a</name>
+   <description>via4.4_a : m4 must enclose all via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.1</name>
+   <description>m5.1 : min. m5 width : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.2</name>
+   <description>m5.2 : min. m5 spacing : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3</name>
+   <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3_a</name>
+   <description>m5.3_a : via must be enclosed by m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.4</name>
+   <description>m5.4 : min. m5 area : 4.0um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad.2</name>
+   <description>pad.2 : min. pad spacing : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0008d8db</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

tapeout/outputs/klayout_beol_report.xml.summary

diff --git a/tapeout/outputs/klayout_beol_report.xml.summary b/tapeout/outputs/klayout_beol_report.xml.summary
new file mode 100644
index 0000000..79b5c11
--- /dev/null
+++ b/tapeout/outputs/klayout_beol_report.xml.summary
@@ -0,0 +1,72 @@
+       0 791_m1.4 : min. m1 enclosure of mcon : 0.03um
+       0 ct.1: non-ring mcon should be rectangular
+       0 ct.1_a : minimum width of mcon : 0.17um
+       0 ct.1_b : maximum length of mcon : 0.17um
+       0 ct.2 : min. mcon spacing : 0.19um
+       0 ct.4 : mcon should covered by li
+       0 li.1 : min. li width : 0.17um
+       0 li.3 : min. li spacing : 0.17um
+       0 li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um
+       0 li.6 : min. li area : 0.0561um²
+       0 m1.1 : min. m1 width : 0.14um
+       0 m1.2 : min. m1 spacing : 0.14um
+       0 m1.3ab : min. 3um.m1 spacing m1 : 0.28um
+       0 m1.4 : mcon periphery must be enclosed by m1
+       0 m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um
+       0 m1.4a_a : mcon periph must be enclosed by met1 for specific cells
+       0 m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um
+       0 m1.6 : min. m1 area : 0.083um²
+       0 m1.7 : min. m1 with holes area : 0.14um²
+       0 m2.1 : min. m2 width : 0.14um
+       0 m2.2 : min. m2 spacing : 0.14um
+       0 m2.3ab : min. 3um.m2 spacing m2 : 0.28um
+       0 m2.4 : min. m2 enclosure of via : 0.055um
+       0 m2.4_a : via in periphery must be enclosed by met2
+       0 m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um
+       0 m2.6 : min. m2 area : 0.0676um²
+       0 m2.7 : min. m2 holes area : 0.14um²
+       0 m3.1 : min. m3 width : 0.3um
+       0 m3.2 : min. m3 spacing : 0.3um
+       0 m3.3cd : min. 3um.m3 spacing m3 : 0.4um
+       0 m3.4 : min. m3 enclosure of via2 : 0.065um
+       0 m3.4_a : via2 must be enclosed by met3
+       0 m4.1 : min. m4 width : 0.3um
+       0 m4.2 : min. m4 spacing : 0.3um
+       0 m4.3 : min. m4 enclosure of via3 : 0.065um
+       0 m4.3_a : via3 must be enclosed by met4
+       0 m4.4a : min. m4 area : 0.240um²
+       0 m4.5ab : min. 3um.m4 spacing m4 : 0.4um
+       0 m5.1 : min. m5 width : 1.6um
+       0 m5.2 : min. m5 spacing : 1.6um
+       0 m5.3 : min. m5 enclosure of via4 : 0.31um
+       0 m5.3_a : via must be enclosed by m5
+       0 m5.4 : min. m5 area : 4.0um²
+       0 pad.2 : min. pad spacing : 1.27um
+       0 via2.1a : via2 outside of moduleCut should be rectangular
+       0 via2.1a_a : min. width of via2 outside of moduleCut : 0.2um
+       0 via2.1a_b : maximum length of via2 : 0.2um
+       0 via2.2 : min. via2 spacing : 0.2um
+       0 via2.4 : min. m2 enclosure of via2 : 0.04um
+       0 via2.4_a : via must be enclosed by met2
+       0 via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um
+       0 via3.1 : via3 outside of moduleCut should be rectangular
+       0 via3.1_a : min. width of via3 outside of moduleCut : 0.2um
+       0 via3.1_b : maximum length of via3 : 0.2um
+       0 via3.2 : min. via3 spacing : 0.2um
+       0 via3.4 : min. m3 enclosure of via3 : 0.06um
+       0 via3.4_a : non-ring via3 must be enclosed by met3
+       0 via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um
+       0 via4.1 : via4 outside of moduleCut should be rectangular
+       0 via4.1_a : min. width of via4 outside of moduleCut : 0.8um
+       0 via4.1_b : maximum length of via4 : 0.8um
+       0 via4.2 : min. via4 spacing : 0.8um
+       0 via4.4 : min. m4 enclosure of via4 : 0.19um
+       0 via4.4_a : m4 must enclose all via4
+       0 via.1a : via outside of moduleCut should be rectangular
+       0 via.1a_a : min. width of via outside of moduleCut : 0.15um
+       0 via.1a_b : maximum length of via : 0.15um
+       0 via.2 : min. via spacing : 0.17um
+       0 via.4a : min. m1 enclosure of 0.15um via : 0.055um
+       0 via.4a_a : 0.15um via must be enclosed by met1
+       0 via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um
+       0 total error(s) among 71 error type(s), 0 non-zero type(s)

tapeout/outputs/klayout_feol_report.xml

diff --git a/tapeout/outputs/klayout_feol_report.xml b/tapeout/outputs/klayout_feol_report.xml
new file mode 100644
index 0000000..0b6305e
--- /dev/null
+++ b/tapeout/outputs/klayout_feol_report.xml
@@ -0,0 +1,375 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/sky130A_mr.drc'</generator>
+ <top-cell>caravel_0008d8db</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell.2</name>
+   <description>dnwell.2 : min. dnwell width : 3.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.1</name>
+   <description>nwell.1 : min. nwell width : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.2a</name>
+   <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.6</name>
+   <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.1</name>
+   <description>hvtp.1 : min. hvtp width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.2</name>
+   <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.1</name>
+   <description>hvtr.1 : min. hvtr width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2</name>
+   <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2_a</name>
+   <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.1a</name>
+   <description>lvtn.1a : min. lvtn width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.2</name>
+   <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.1</name>
+   <description>ncm.1 : min. ncm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.2a</name>
+   <description>ncm.2a : min. ncm spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1</name>
+   <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_a</name>
+   <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_b</name>
+   <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_c</name>
+   <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.3</name>
+   <description>difftap.3 : min. difftap spacing : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.1</name>
+   <description>tunm.1 : min. tunm width : 0.41um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.2</name>
+   <description>tunm.2 : min. tunm spacing : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.1a</name>
+   <description>poly.1a : min. poly width : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.2</name>
+   <description>poly.2 : min. poly spacing : 0.21um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.1a</name>
+   <description>rpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.2</name>
+   <description>rpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.1a</name>
+   <description>urpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.2</name>
+   <description>urpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.1</name>
+   <description>npc.1 : min. npc width : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.2</name>
+   <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.1</name>
+   <description>nsd.1 : min. nsdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.2</name>
+   <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.1</name>
+   <description>psd.1 : min. psdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.2</name>
+   <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1</name>
+   <description>licon.1 : licon should be rectangle</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1_a/b</name>
+   <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13</name>
+   <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13_a</name>
+   <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.17</name>
+   <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.1</name>
+   <description>capm.1 : min. capm width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2a</name>
+   <description>capm.2a : min. capm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b</name>
+   <description>capm.2b : min. capm spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b_a</name>
+   <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3</name>
+   <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3_a</name>
+   <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.4</name>
+   <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.5</name>
+   <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.11</name>
+   <description>capm.11 : Min spacing of capm and met3 not overlapping capm : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.1</name>
+   <description>cap2m.1 : min. cap2m width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2a</name>
+   <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b</name>
+   <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b_a</name>
+   <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3</name>
+   <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3_a</name>
+   <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.4</name>
+   <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.5</name>
+   <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.11</name>
+   <description>cap2m.11 : Min spacing of cap2m and met4 not overlapping cap2m : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.1</name>
+   <description>hvi.1 : min. hvi width : 0.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.2a</name>
+   <description>hvi.2a : min. hvi spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.1</name>
+   <description>hvntm.1 : min. hvntm width : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.2</name>
+   <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0008d8db</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

tapeout/outputs/klayout_feol_report.xml.summary

diff --git a/tapeout/outputs/klayout_feol_report.xml.summary b/tapeout/outputs/klayout_feol_report.xml.summary
new file mode 100644
index 0000000..2a7a007
--- /dev/null
+++ b/tapeout/outputs/klayout_feol_report.xml.summary
@@ -0,0 +1,60 @@
+       0 cap2m.1 : min. cap2m width : 1.0um
+       0 cap2m.2a : min. cap2m spacing : 0.84um
+       0 cap2m.2b : min. cap2m spacing : 1.2um
+       0 cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um
+       0 cap2m.3 : min. m4 enclosure of cap2m : 0.14um
+       0 cap2m.3_a : min. m4 enclosure of cap2m : 0.14um
+       0 cap2m.4 : min. cap2m enclosure of via4 : 0.14um
+       0 cap2m.5 : min. cap2m spacing to via4 : 0.14um
+       0 cap2m.11 : Min spacing of cap2m and met4 not overlapping cap2m : 0.5um
+       0 capm.1 : min. capm width : 1.0um
+       0 capm.2a : min. capm spacing : 0.84um
+       0 capm.2b : min. capm spacing : 1.2um
+       0 capm.2b_a : min. spacing of m3_bot_plate : 1.2um
+       0 capm.3 : min. capm and m3 enclosure of m3 : 0.14um
+       0 capm.3_a : min. m3 enclosure of capm : 0.14um
+       0 capm.4 : min. capm enclosure of via3 : 0.14um
+       0 capm.5 : min. capm spacing to via3 : 0.14um
+       0 capm.11 : Min spacing of capm and met3 not overlapping capm : 0.5um
+       0 difftap.1 : min. diff width across areaid:ce : 0.15um
+       0 difftap.1_a : min. diff width in periphery : 0.15um
+       0 difftap.1_b : min. tap width across areaid:ce : 0.15um
+       0 difftap.1_c : min. tap width in periphery : 0.15um
+       0 difftap.3 : min. difftap spacing : 0.27um
+       0 dnwell.2 : min. dnwell width : 3.0um
+       0 hvi.1 : min. hvi width : 0.6um
+       0 hvi.2a : min. hvi spacing : 0.7um
+       0 hvntm.1 : min. hvntm width : 0.7um
+       0 hvntm.2 : min. hvntm spacing : 0.7um
+       0 hvtp.1 : min. hvtp width : 0.38um
+       0 hvtp.2 : min. hvtp spacing : 0.38um
+       0 hvtr.1 : min. hvtr width : 0.38um
+       0 hvtr.2 : min. hvtr spacing : 0.38um
+       0 hvtr.2_a : hvtr must not overlap hvtp
+       0 licon.1 : licon should be rectangle
+       0 licon.1_a/b : minimum/maximum width of licon : 0.17um
+       0 licon.13 : min. difftap licon spacing to npc : 0.09um
+       0 licon.13_a : licon of diffTap in periphery must not overlap npc
+       0 licon.17 : Licons may not overlap both poly and (diff or tap)
+       0 lvtn.1a : min. lvtn width : 0.38um
+       0 lvtn.2 : min. lvtn spacing : 0.38um
+       0 ncm.1 : min. ncm width : 0.38um
+       0 ncm.2a : min. ncm spacing : 0.38um
+       0 npc.1 : min. npc width : 0.27um
+       0 npc.2 : min. npc spacing, should be manually merged if less than : 0.27um
+       0 nsd.1 : min. nsdm width : 0.38um
+       0 nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um
+       0 nwell.1 : min. nwell width : 0.84um
+       0 nwell.2a : min. nwell spacing (merged if less) : 1.27um
+       0 nwell.6 : min enclosure of nwellHole by dnwell : 1.03um
+       0 poly.1a : min. poly width : 0.15um
+       0 poly.2 : min. poly spacing : 0.21um
+       0 psd.1 : min. psdm width : 0.38um
+       0 psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um
+       0 rpm.1a : min. rpm width : 1.27um
+       0 rpm.2 : min. rpm spacing : 0.84um
+       0 tunm.1 : min. tunm width : 0.41um
+       0 tunm.2 : min. tunm spacing : 0.5um
+       0 urpm.1a : min. rpm width : 1.27um
+       0 urpm.2 : min. rpm spacing : 0.84um
+       0 total error(s) among 59 error type(s), 0 non-zero type(s)

tapeout/outputs/klayout_fom_density_report.xml

diff --git a/tapeout/outputs/klayout_fom_density_report.xml b/tapeout/outputs/klayout_fom_density_report.xml
new file mode 100644
index 0000000..8a20292
--- /dev/null
+++ b/tapeout/outputs/klayout_fom_density_report.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/fom_density.drc'</generator>
+ <top-cell>caravel_0008d8db</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0008d8db</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

tapeout/outputs/klayout_fom_density_report.xml.summary

diff --git a/tapeout/outputs/klayout_fom_density_report.xml.summary b/tapeout/outputs/klayout_fom_density_report.xml.summary
new file mode 100644
index 0000000..8d461a0
--- /dev/null
+++ b/tapeout/outputs/klayout_fom_density_report.xml.summary
@@ -0,0 +1 @@
+       0 total error(s) among 0 error type(s), 0 non-zero type(s)

tapeout/outputs/klayout_met_density_report.xml

diff --git a/tapeout/outputs/klayout_met_density_report.xml b/tapeout/outputs/klayout_met_density_report.xml
new file mode 100644
index 0000000..24aed4d
--- /dev/null
+++ b/tapeout/outputs/klayout_met_density_report.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/met_density.lydrc'</generator>
+ <top-cell>caravel_0008d8db</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0008d8db</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>

tapeout/outputs/klayout_met_density_report.xml.summary

diff --git a/tapeout/outputs/klayout_met_density_report.xml.summary b/tapeout/outputs/klayout_met_density_report.xml.summary
new file mode 100644
index 0000000..8d461a0
--- /dev/null
+++ b/tapeout/outputs/klayout_met_density_report.xml.summary
@@ -0,0 +1 @@
+       0 total error(s) among 0 error type(s), 0 non-zero type(s)

tapeout/outputs/mag/caravel.mag

diff --git a/tapeout/outputs/mag/caravel.mag b/tapeout/outputs/mag/caravel.mag
new file mode 100644
index 0000000..73990e8
--- /dev/null
+++ b/tapeout/outputs/mag/caravel.mag
@@ -0,0 +1,83878 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1667299471
+<< checkpaint >>
+rect -1260 -1260 718860 1038860
+<< metal1 >>
+rect 366174 1027828 366180 1027880
+rect 366232 1027868 366238 1027880
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+rect 657658 234528 657978 234645
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+rect 657658 230836 657688 231072
+rect 657924 230836 657978 231072
+rect 657658 230762 657978 230836
+rect 6598 183840 19088 196360
+rect 698512 191440 711002 203960
+rect 662713 150879 663033 150996
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+rect 698512 146440 711002 158960
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+rect 663597 139399 663917 139473
+rect 664538 133389 664858 133506
+rect 664538 133153 664581 133389
+rect 664817 133153 664858 133389
+rect 664538 129933 664858 133153
+rect 664538 129697 664568 129933
+rect 664804 129697 664858 129933
+rect 664538 129623 664858 129697
+rect 6811 111610 18976 123778
+rect 698512 101240 711002 113760
+rect 647060 94298 647748 94340
+rect 647060 94062 647102 94298
+rect 647338 94062 647748 94298
+rect 647060 94020 647748 94062
+rect 647428 93660 647748 94020
+rect 647428 93618 650508 93660
+rect 647428 93382 650230 93618
+rect 650466 93382 650508 93618
+rect 647428 93340 650508 93382
+rect 6167 70054 19620 80934
+rect 361860 41938 403120 41980
+rect 361860 41702 361902 41938
+rect 362138 41702 403120 41938
+rect 361860 41660 403120 41702
+rect 402800 41300 403120 41660
+rect 403444 41660 412044 41980
+rect 403444 41300 403764 41660
+rect 365356 41258 402476 41300
+rect 365356 41022 365398 41258
+rect 365634 41022 402198 41258
+rect 402434 41022 402476 41258
+rect 365356 40980 402476 41022
+rect 402800 40980 403764 41300
+rect 411724 41300 412044 41660
+rect 412460 41660 421796 41980
+rect 422120 41938 423820 41980
+rect 422120 41702 422162 41938
+rect 422398 41702 423820 41938
+rect 422120 41660 423820 41702
+rect 424972 41938 441668 41980
+rect 424972 41702 425014 41938
+rect 425250 41702 441390 41938
+rect 441626 41702 441668 41938
+rect 424972 41660 441668 41702
+rect 442084 41660 450684 41980
+rect 412460 41300 412780 41660
+rect 411724 40980 412780 41300
+rect 421476 41300 421796 41660
+rect 423500 41300 423820 41660
+rect 442084 41300 442404 41660
+rect 421476 40980 422440 41300
+rect 423500 40980 442404 41300
+rect 450364 41300 450684 41660
+rect 451100 41938 463932 41980
+rect 451100 41702 463654 41938
+rect 463890 41702 463932 41938
+rect 451100 41660 463932 41702
+rect 451100 41300 451420 41660
+rect 450364 40980 451420 41300
+rect 422120 40620 422440 40980
+rect 422120 40578 425292 40620
+rect 422120 40342 425014 40578
+rect 425250 40342 425292 40578
+rect 422120 40300 425292 40342
+rect 80222 6811 92390 18976
+rect 136713 7143 144150 18309
+rect 187640 6598 200160 19088
+rect 243266 6167 254146 19620
+rect 296240 6598 308760 19088
+rect 351040 6598 363560 19088
+rect 405840 6598 418360 19088
+rect 460640 6598 473160 19088
+rect 515440 6598 527960 19088
+rect 570422 6811 582590 18976
+rect 624222 6811 636390 18976
+use caravel_logo  caravel_logo
+timestamp 1638586901
+transform 1 0 269370 0 1 5100
+box -2520 0 15000 15560
+use caravel_motto  caravel_motto
+timestamp 1637698310
+transform 1 0 -54372 0 1 -4446
+box 373080 14838 395618 19242
+use caravel_power_routing  caravel_power_routing
+timestamp 1666994345
+transform 1 0 0 0 1 0
+box 6022 30806 711814 1031696
+use caravel_clocking  clock_ctrl
+timestamp 1666097791
+transform 1 0 626764 0 1 55284
+box 136 496 20000 20000
+use copyright_block  copyright_block
+timestamp 1665519328
+transform 1 0 149582 0 1 16298
+box -262 -10348 35048 2764
+use buff_flash_clkrst  flash_clkrst_buffers
+timestamp 1665682149
+transform 1 0 458400 0 1 47600
+box 330 0 7699 5000
+use gpio_control_block  gpio_control_bidir_1\[0\]
+timestamp 1666126335
+transform -1 0 710203 0 1 121000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_bidir_1\[1\]
+timestamp 1666126335
+transform -1 0 710203 0 1 166200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_bidir_2\[0\]
+timestamp 1666126335
+transform 1 0 7631 0 1 289000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_bidir_2\[1\]
+timestamp 1666126335
+transform 1 0 7631 0 1 245800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_bidir_2\[2\]
+timestamp 1666126335
+transform 1 0 7631 0 1 202600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[0\]
+timestamp 1666126335
+transform -1 0 710203 0 1 523800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[1\]
+timestamp 1666126335
+transform -1 0 710203 0 1 568800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[2\]
+timestamp 1666126335
+transform -1 0 710203 0 1 614000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[3\]
+timestamp 1666126335
+transform -1 0 710203 0 1 659000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[4\]
+timestamp 1666126335
+transform -1 0 710203 0 1 704200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[5\]
+timestamp 1666126335
+transform -1 0 710203 0 1 749200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[6\]
+timestamp 1666126335
+transform -1 0 710203 0 1 927600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[7\]
+timestamp 1666126335
+transform 0 1 549200 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[8\]
+timestamp 1666126335
+transform 0 1 497800 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[9\]
+timestamp 1666126335
+transform 0 1 420800 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[10\]
+timestamp 1666126335
+transform 0 1 353400 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[0\]
+timestamp 1666126335
+transform -1 0 710203 0 1 211200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[1\]
+timestamp 1666126335
+transform -1 0 710203 0 1 256400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[2\]
+timestamp 1666126335
+transform -1 0 710203 0 1 301400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[3\]
+timestamp 1666126335
+transform -1 0 710203 0 1 346400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[4\]
+timestamp 1666126335
+transform -1 0 710203 0 1 391600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[5\]
+timestamp 1666126335
+transform -1 0 710203 0 1 479800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[0\]
+timestamp 1666126335
+transform 0 1 303000 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[1\]
+timestamp 1666126335
+transform 0 1 251400 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[2\]
+timestamp 1666126335
+transform 0 1 200000 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[3\]
+timestamp 1666126335
+transform 0 1 148600 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[4\]
+timestamp 1666126335
+transform 0 1 97200 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[5\]
+timestamp 1666126335
+transform 1 0 7631 0 1 931200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[6\]
+timestamp 1666126335
+transform 1 0 7631 0 1 805400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[7\]
+timestamp 1666126335
+transform 1 0 7631 0 1 762200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[8\]
+timestamp 1666126335
+transform 1 0 7631 0 1 719000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[9\]
+timestamp 1666126335
+transform 1 0 7631 0 1 675800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[10\]
+timestamp 1666126335
+transform 1 0 7631 0 1 632600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[11\]
+timestamp 1666126335
+transform 1 0 7631 0 1 589400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[12\]
+timestamp 1666126335
+transform 1 0 7631 0 1 546200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[13\]
+timestamp 1666126335
+transform 1 0 7631 0 1 418600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[14\]
+timestamp 1666126335
+transform 1 0 7631 0 1 375400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[15\]
+timestamp 1666126335
+transform 1 0 7631 0 1 332200
+box 872 416 34000 13000
+use gpio_defaults_block_1803 gpio_defaults_block_0 ~/caravel_top_level/mag
+timestamp 1666360185
+transform -1 0 709467 0 1 134000
+box -38 0 6018 2224
+use gpio_defaults_block_1803 gpio_defaults_block_1
+timestamp 1666360185
+transform -1 0 709467 0 1 179200
+box -38 0 6018 2224
+use gpio_defaults_block_0403 gpio_defaults_block_2
+timestamp 1666360185
+transform -1 0 709467 0 1 224200
+box -38 0 6018 2224
+use gpio_defaults_block_0801 gpio_defaults_block_3
+timestamp 1666360185
+transform -1 0 709467 0 1 269400
+box -38 0 6018 2224
+use gpio_defaults_block_0403 gpio_defaults_block_4
+timestamp 1666360185
+transform -1 0 709467 0 1 314400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_5
+timestamp 1666360185
+transform -1 0 709467 0 1 359400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_6
+timestamp 1666360185
+transform -1 0 709467 0 1 404600
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_7
+timestamp 1666360185
+transform -1 0 709467 0 1 492800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_8
+timestamp 1666360185
+transform -1 0 709467 0 1 536800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_9
+timestamp 1666360185
+transform -1 0 709467 0 1 581800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_10
+timestamp 1666360185
+transform -1 0 709467 0 1 627000
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_11
+timestamp 1666360185
+transform -1 0 709467 0 1 672000
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_12
+timestamp 1666360185
+transform -1 0 709467 0 1 717200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_13
+timestamp 1666360185
+transform -1 0 709467 0 1 762200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_14
+timestamp 1666360185
+transform -1 0 709467 0 1 940600
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_15
+timestamp 1666360185
+transform 0 1 562194 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_16
+timestamp 1666360185
+transform 0 1 510794 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_17
+timestamp 1666360185
+transform 0 1 433794 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_18
+timestamp 1666360185
+transform 0 1 366394 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_19
+timestamp 1666360185
+transform 0 1 315994 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_20
+timestamp 1666360185
+transform 0 1 264394 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_21
+timestamp 1666360185
+transform 0 1 212994 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_22
+timestamp 1666360185
+transform 0 1 161594 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_23
+timestamp 1666360185
+transform 0 1 110194 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_24
+timestamp 1666360185
+transform 1 0 8367 0 1 944200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_25
+timestamp 1666360185
+transform 1 0 8367 0 1 818400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_26
+timestamp 1666360185
+transform 1 0 8367 0 1 775200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_27
+timestamp 1666360185
+transform 1 0 8367 0 1 732000
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_28
+timestamp 1666360185
+transform 1 0 8367 0 1 688800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_29
+timestamp 1666360185
+transform 1 0 8367 0 1 645600
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_30
+timestamp 1666360185
+transform 1 0 8367 0 1 602400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_31
+timestamp 1666360185
+transform 1 0 8367 0 1 559200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_32
+timestamp 1666360185
+transform 1 0 8367 0 1 431600
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_33
+timestamp 1666360185
+transform 1 0 8367 0 1 388400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_34
+timestamp 1666360185
+transform 1 0 8367 0 1 345200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_35
+timestamp 1666360185
+transform 1 0 8367 0 1 302000
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_36
+timestamp 1666360185
+transform 1 0 8367 0 1 258800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_37
+timestamp 1666360185
+transform 1 0 8367 0 1 215600
+box -38 0 6018 2224
+use housekeeping  housekeeping
+timestamp 1666084955
+transform 1 0 592434 0 1 100002
+box 0 0 74046 110190
+use mgmt_protect  mgmt_buffers
+timestamp 1666987233
+transform 1 0 128180 0 1 232036
+box 1066 -400 424400 32400
+use user_project_wrapper  mprj
+timestamp 1637147503
+transform 1 0 65308 0 1 278718
+box -8726 -7654 592650 711590
+use open_source  open_source
+timestamp 1666123577
+transform 1 0 206098 0 1 2054
+box 752 5164 29030 16242
+use chip_io  padframe
+timestamp 1666101711
+transform 1 0 0 0 1 0
+box 0 0 717600 1037600
+use digital_pll  pll
+timestamp 1666101174
+transform 1 0 628146 0 1 80944
+box 0 0 20000 15000
+use simple_por  por
+timestamp 1650914729
+transform 1 0 650146 0 -1 55282
+box -52 -62 11344 8684
+use xres_buf  rstb_level
+timestamp 1649268499
+transform -1 0 145710 0 -1 50488
+box 374 -400 3540 3800
+use gpio_signal_buffering  sigbuf
+timestamp 1666028385
+transform 1 0 0 0 1 0
+box 39992 41960 677583 997915
+use mgmt_core_wrapper  soc
+timestamp 1668034664
+transform 1 0 52034 0 1 53002
+box -156 0 524096 164000
+use spare_logic_block  spare_logic\[0\]
+timestamp 1638030917
+transform 1 0 88632 0 1 232528
+box 0 0 9000 9000
+use spare_logic_block  spare_logic\[1\]
+timestamp 1638030917
+transform 1 0 108632 0 1 232528
+box 0 0 9000 9000
+use spare_logic_block  spare_logic\[2\]
+timestamp 1638030917
+transform 1 0 640874 0 1 220592
+box 0 0 9000 9000
+use spare_logic_block  spare_logic\[3\]
+timestamp 1638030917
+transform 1 0 578632 0 1 232528
+box 0 0 9000 9000
+use user_id_textblock  user_id_textblock
+timestamp 1608324878
+transform 1 0 96272 0 1 6890
+box -656 1508 33720 10344
+use user_id_programming  user_id_value
+timestamp 1650371074
+transform 1 0 656624 0 1 88126
+box 0 0 7109 7077
+<< labels >>
+flabel metal5 s 187640 6598 200160 19088 0 FreeSans 16000 0 0 0 clock
+port 1 nsew signal input
+flabel metal5 s 351040 6598 363560 19088 0 FreeSans 16000 0 0 0 flash_clk
+port 2 nsew signal output
+flabel metal5 s 296240 6598 308760 19088 0 FreeSans 16000 0 0 0 flash_csb
+port 3 nsew signal output
+flabel metal5 s 405840 6598 418360 19088 0 FreeSans 16000 0 0 0 flash_io0
+port 4 nsew signal output
+flabel metal5 s 460640 6598 473160 19088 0 FreeSans 16000 0 0 0 flash_io1
+port 5 nsew signal output
+flabel metal5 s 515440 6598 527960 19088 0 FreeSans 16000 0 0 0 gpio
+port 6 nsew signal bidirectional
+flabel metal5 s 698512 101240 711002 113760 0 FreeSans 16000 0 0 0 mprj_io[0]
+port 7 nsew signal bidirectional
+flabel metal5 s 698512 684440 711002 696960 0 FreeSans 16000 0 0 0 mprj_io[10]
+port 8 nsew signal bidirectional
+flabel metal5 s 698512 729440 711002 741960 0 FreeSans 16000 0 0 0 mprj_io[11]
+port 9 nsew signal bidirectional
+flabel metal5 s 698512 774440 711002 786960 0 FreeSans 16000 0 0 0 mprj_io[12]
+port 10 nsew signal bidirectional
+flabel metal5 s 698512 863640 711002 876160 0 FreeSans 16000 0 0 0 mprj_io[13]
+port 11 nsew signal bidirectional
+flabel metal5 s 698512 952840 711002 965360 0 FreeSans 16000 0 0 0 mprj_io[14]
+port 12 nsew signal bidirectional
+flabel metal5 s 628240 1018512 640760 1031002 0 FreeSans 16000 0 0 0 mprj_io[15]
+port 13 nsew signal bidirectional
+flabel metal5 s 526440 1018512 538960 1031002 0 FreeSans 16000 0 0 0 mprj_io[16]
+port 14 nsew signal bidirectional
+flabel metal5 s 475040 1018512 487560 1031002 0 FreeSans 16000 0 0 0 mprj_io[17]
+port 15 nsew signal bidirectional
+flabel metal5 s 386040 1018512 398560 1031002 0 FreeSans 16000 0 0 0 mprj_io[18]
+port 16 nsew signal bidirectional
+flabel metal5 s 284240 1018512 296760 1031002 0 FreeSans 16000 0 0 0 mprj_io[19]
+port 17 nsew signal bidirectional
+flabel metal5 s 698512 146440 711002 158960 0 FreeSans 16000 0 0 0 mprj_io[1]
+port 18 nsew signal bidirectional
+flabel metal5 s 232640 1018512 245160 1031002 0 FreeSans 16000 0 0 0 mprj_io[20]
+port 19 nsew signal bidirectional
+flabel metal5 s 181240 1018512 193760 1031002 0 FreeSans 16000 0 0 0 mprj_io[21]
+port 20 nsew signal bidirectional
+flabel metal5 s 129840 1018512 142360 1031002 0 FreeSans 16000 0 0 0 mprj_io[22]
+port 21 nsew signal bidirectional
+flabel metal5 s 78440 1018512 90960 1031002 0 FreeSans 16000 0 0 0 mprj_io[23]
+port 22 nsew signal bidirectional
+flabel metal5 s 6598 956440 19088 968960 0 FreeSans 16000 0 0 0 mprj_io[24]
+port 23 nsew signal bidirectional
+flabel metal5 s 6598 786640 19088 799160 0 FreeSans 16000 0 0 0 mprj_io[25]
+port 24 nsew signal bidirectional
+flabel metal5 s 6598 743440 19088 755960 0 FreeSans 16000 0 0 0 mprj_io[26]
+port 25 nsew signal bidirectional
+flabel metal5 s 6598 700240 19088 712760 0 FreeSans 16000 0 0 0 mprj_io[27]
+port 26 nsew signal bidirectional
+flabel metal5 s 6598 657040 19088 669560 0 FreeSans 16000 0 0 0 mprj_io[28]
+port 27 nsew signal bidirectional
+flabel metal5 s 6598 613840 19088 626360 0 FreeSans 16000 0 0 0 mprj_io[29]
+port 28 nsew signal bidirectional
+flabel metal5 s 698512 191440 711002 203960 0 FreeSans 16000 0 0 0 mprj_io[2]
+port 29 nsew signal bidirectional
+flabel metal5 s 6598 570640 19088 583160 0 FreeSans 16000 0 0 0 mprj_io[30]
+port 30 nsew signal bidirectional
+flabel metal5 s 6598 527440 19088 539960 0 FreeSans 16000 0 0 0 mprj_io[31]
+port 31 nsew signal bidirectional
+flabel metal5 s 6598 399840 19088 412360 0 FreeSans 16000 0 0 0 mprj_io[32]
+port 32 nsew signal bidirectional
+flabel metal5 s 6598 356640 19088 369160 0 FreeSans 16000 0 0 0 mprj_io[33]
+port 33 nsew signal bidirectional
+flabel metal5 s 6598 313440 19088 325960 0 FreeSans 16000 0 0 0 mprj_io[34]
+port 34 nsew signal bidirectional
+flabel metal5 s 6598 270240 19088 282760 0 FreeSans 16000 0 0 0 mprj_io[35]
+port 35 nsew signal bidirectional
+flabel metal5 s 6598 227040 19088 239560 0 FreeSans 16000 0 0 0 mprj_io[36]
+port 36 nsew signal bidirectional
+flabel metal5 s 6598 183840 19088 196360 0 FreeSans 16000 0 0 0 mprj_io[37]
+port 37 nsew signal bidirectional
+flabel metal5 s 698512 236640 711002 249160 0 FreeSans 16000 0 0 0 mprj_io[3]
+port 38 nsew signal bidirectional
+flabel metal5 s 698512 281640 711002 294160 0 FreeSans 16000 0 0 0 mprj_io[4]
+port 39 nsew signal bidirectional
+flabel metal5 s 698512 326640 711002 339160 0 FreeSans 16000 0 0 0 mprj_io[5]
+port 40 nsew signal bidirectional
+flabel metal5 s 698512 371840 711002 384360 0 FreeSans 16000 0 0 0 mprj_io[6]
+port 41 nsew signal bidirectional
+flabel metal5 s 698512 549040 711002 561560 0 FreeSans 16000 0 0 0 mprj_io[7]
+port 42 nsew signal bidirectional
+flabel metal5 s 698512 594240 711002 606760 0 FreeSans 16000 0 0 0 mprj_io[8]
+port 43 nsew signal bidirectional
+flabel metal5 s 698512 639240 711002 651760 0 FreeSans 16000 0 0 0 mprj_io[9]
+port 44 nsew signal bidirectional
+flabel metal5 s 136713 7143 144150 18309 0 FreeSans 16000 0 0 0 resetb
+port 45 nsew signal input
+flabel metal5 s 6167 70054 19620 80934 0 FreeSans 16000 0 0 0 vccd
+port 46 nsew power input
+flabel metal5 s 697980 909666 711433 920546 0 FreeSans 16000 0 0 0 vccd1
+port 47 nsew power input
+flabel metal5 s 6167 914054 19620 924934 0 FreeSans 16000 0 0 0 vccd2
+port 48 nsew power input
+flabel metal5 s 624222 6811 636390 18976 0 FreeSans 16000 0 0 0 vdda
+port 49 nsew power input
+flabel metal5 s 698624 819822 710789 831990 0 FreeSans 16000 0 0 0 vdda1
+port 50 nsew power input
+flabel metal5 s 698624 505222 710789 517390 0 FreeSans 16000 0 0 0 vdda1_2
+port 51 nsew power input
+flabel metal5 s 6811 484410 18976 496578 0 FreeSans 16000 0 0 0 vdda2
+port 52 nsew power input
+flabel metal5 s 6811 111610 18976 123778 0 FreeSans 16000 0 0 0 vddio
+port 53 nsew power input
+flabel metal5 s 6811 871210 18976 883378 0 FreeSans 16000 0 0 0 vddio_2
+port 54 nsew power input
+flabel metal5 s 80222 6811 92390 18976 0 FreeSans 16000 0 0 0 vssa
+port 55 nsew ground input
+flabel metal5 s 577010 1018624 589178 1030789 0 FreeSans 16000 0 0 0 vssa1
+port 56 nsew ground input
+flabel metal5 s 698624 417022 710789 429190 0 FreeSans 16000 0 0 0 vssa1_2
+port 57 nsew ground input
+flabel metal5 s 6811 829010 18976 841178 0 FreeSans 16000 0 0 0 vssa2
+port 58 nsew ground input
+flabel metal5 s 243266 6167 254146 19620 0 FreeSans 16000 0 0 0 vssd
+port 59 nsew ground input
+flabel metal5 s 697980 461866 711433 472746 0 FreeSans 16000 0 0 0 vssd1
+port 60 nsew ground input
+flabel metal5 s 6167 442854 19620 453734 0 FreeSans 16000 0 0 0 vssd2
+port 61 nsew ground input
+flabel metal5 s 570422 6811 582590 18976 0 FreeSans 16000 0 0 0 vssio
+port 62 nsew ground input
+flabel metal5 s 334810 1018624 346978 1030789 0 FreeSans 16000 0 0 0 vssio_2
+port 63 nsew ground input
+<< properties >>
+string FIXED_BBOX 0 0 717600 1037600
+string LEFclass BLOCK
+<< end >>

tapeout/outputs/mag/gpio_defaults_block_0403.mag

diff --git a/tapeout/outputs/mag/gpio_defaults_block_0403.mag b/tapeout/outputs/mag/gpio_defaults_block_0403.mag
new file mode 100644
index 0000000..e15b2ba
--- /dev/null
+++ b/tapeout/outputs/mag/gpio_defaults_block_0403.mag
@@ -0,0 +1,1461 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1638587925
+<< viali >>
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+<< metal2 >>
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+<< via2 >>
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+<< metal3 >>
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+<< via3 >>
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+<< metal4 >>
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+<< via4 >>
+rect 82 778 318 1014
+rect 782 1664 1018 1714
+rect 782 1600 788 1664
+rect 788 1600 852 1664
+rect 852 1600 868 1664
+rect 868 1600 932 1664
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+<< metal5 >>
+rect 0 1714 5980 1756
+rect 0 1478 782 1714
+rect 1018 1478 2182 1714
+rect 2418 1478 3582 1714
+rect 3818 1478 4982 1714
+rect 5218 1478 5980 1714
+rect 0 1436 5980 1478
+rect 0 1014 5980 1056
+rect 0 778 82 1014
+rect 318 778 1482 1014
+rect 1718 778 2882 1014
+rect 3118 778 4282 1014
+rect 4518 778 5980 1014
+rect 0 736 5980 778
+use sky130_fd_sc_hd__fill_1  FILLER_0_9 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 828 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_2 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 0 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638322937
+transform 1 0 0 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 1 544
+box -38 -48 590 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 920 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_15
+timestamp 1638322937
+transform 1 0 1380 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[5\]
+timestamp 1638322937
+transform 1 0 2300 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[1\]
+timestamp 1638322937
+transform 1 0 1196 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[4\]
+timestamp 1638322937
+transform 1 0 2024 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[3\]
+timestamp 1638322937
+transform 1 0 1748 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[2\]
+timestamp 1638322937
+transform 1 0 1472 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_6 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 2576 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_38 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 3496 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_33
+timestamp 1638322937
+transform 1 0 3036 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_29
+timestamp 1638322937
+transform 1 0 2668 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_27
+timestamp 1638322937
+transform 1 0 2484 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[7\]
+timestamp 1638322937
+transform 1 0 3220 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[6\]
+timestamp 1638322937
+transform 1 0 2760 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_43
+timestamp 1638322937
+transform 1 0 3956 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_51 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 4692 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_48
+timestamp 1638322937
+transform 1 0 4416 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_39
+timestamp 1638322937
+transform 1 0 3588 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[9\]
+timestamp 1638322937
+transform 1 0 4140 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[8\]
+timestamp 1638322937
+transform 1 0 3680 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[12\]
+timestamp 1638322937
+transform 1 0 4508 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_8
+timestamp 1638322937
+transform 1 0 5152 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_7
+timestamp 1638322937
+transform 1 0 5152 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_55
+timestamp 1638322937
+transform 1 0 5060 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_55
+timestamp 1638322937
+transform 1 0 5060 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[10\]
+timestamp 1638322937
+transform 1 0 4784 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_60
+timestamp 1638322937
+transform 1 0 5520 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_57
+timestamp 1638322937
+transform 1 0 5244 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_61
+timestamp 1638322937
+transform 1 0 5612 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[11\]
+timestamp 1638322937
+transform 1 0 5244 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638322937
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638322937
+transform -1 0 5980 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638322937
+transform 1 0 0 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638322937
+transform 1 0 276 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638322937
+transform 1 0 1380 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_9
+timestamp 1638322937
+transform 1 0 2576 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_27
+timestamp 1638322937
+transform 1 0 2484 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_29
+timestamp 1638322937
+transform 1 0 2668 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_41
+timestamp 1638322937
+transform 1 0 3772 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_10
+timestamp 1638322937
+transform 1 0 5152 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_57
+timestamp 1638322937
+transform 1 0 5244 0 1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_61
+timestamp 1638322937
+transform 1 0 5612 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638322937
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_2_53
+timestamp 1638322937
+transform 1 0 4876 0 1 1632
+box -38 -48 314 592
+<< labels >>
+rlabel metal5 s 0 1436 5980 1756 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 760 496 1040 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 2160 496 2440 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 3560 496 3840 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 4960 496 5240 2224 6 VGND
+port 0 nsew ground input
+rlabel metal5 s 0 736 5980 1056 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 60 496 340 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 1460 496 1740 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 2860 496 3140 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 4260 496 4540 2224 6 VPWR
+port 1 nsew power input
+rlabel metal2 s 202 0 258 400 6 gpio_defaults[0]
+port 2 nsew signal tristate
+rlabel metal2 s 4802 0 4858 400 6 gpio_defaults[10]
+port 3 nsew signal tristate
+rlabel metal2 s 5262 0 5318 400 6 gpio_defaults[11]
+port 4 nsew signal tristate
+rlabel metal2 s 5722 0 5778 400 6 gpio_defaults[12]
+port 5 nsew signal tristate
+rlabel metal2 s 662 0 718 400 6 gpio_defaults[1]
+port 6 nsew signal tristate
+rlabel metal2 s 1122 0 1178 400 6 gpio_defaults[2]
+port 7 nsew signal tristate
+rlabel metal2 s 1582 0 1638 400 6 gpio_defaults[3]
+port 8 nsew signal tristate
+rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[4]
+port 9 nsew signal tristate
+rlabel metal2 s 2502 0 2558 400 6 gpio_defaults[5]
+port 10 nsew signal tristate
+rlabel metal2 s 2962 0 3018 400 6 gpio_defaults[6]
+port 11 nsew signal tristate
+rlabel metal2 s 3422 0 3478 400 6 gpio_defaults[7]
+port 12 nsew signal tristate
+rlabel metal2 s 3882 0 3938 400 6 gpio_defaults[8]
+port 13 nsew signal tristate
+rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[9]
+port 14 nsew signal tristate
+<< properties >>
+string FIXED_BBOX 0 0 6000 2200
+<< end >>

tapeout/outputs/mag/gpio_defaults_block_0801.mag

diff --git a/tapeout/outputs/mag/gpio_defaults_block_0801.mag b/tapeout/outputs/mag/gpio_defaults_block_0801.mag
new file mode 100644
index 0000000..a5d837d
--- /dev/null
+++ b/tapeout/outputs/mag/gpio_defaults_block_0801.mag
@@ -0,0 +1,1461 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1638587925
+<< viali >>
+rect 949 833 983 867
+rect 1639 833 1673 867
+rect 4721 833 4755 867
+rect 1363 765 1397 799
+rect 1915 765 1949 799
+rect 2191 765 2225 799
+rect 2513 765 2547 799
+rect 2973 765 3007 799
+rect 3433 765 3467 799
+rect 3893 765 3927 799
+rect 4353 765 4387 799
+rect 4951 765 4985 799
+rect 5273 765 5307 799
+<< metal1 >>
+rect 0 2202 5980 2224
+rect 0 2150 78 2202
+rect 130 2150 142 2202
+rect 194 2150 206 2202
+rect 258 2150 270 2202
+rect 322 2150 1478 2202
+rect 1530 2150 1542 2202
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+rect 4522 2150 5980 2202
+rect 0 2128 5980 2150
+rect 0 1658 5980 1680
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+rect 1636 728 1722 756
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+rect 716 688 722 700
+rect 0 570 5980 592
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+rect 0 496 5980 518
+<< via1 >>
+rect 78 2150 130 2202
+rect 142 2150 194 2202
+rect 206 2150 258 2202
+rect 270 2150 322 2202
+rect 1478 2150 1530 2202
+rect 1542 2150 1594 2202
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+rect 5724 824 5776 876
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+rect 1584 716 1636 768
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+<< metal2 >>
+rect 78 2204 322 2224
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+rect 308 2202 322 2204
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+<< via4 >>
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+rect 2182 1600 2188 1664
+rect 2188 1600 2252 1664
+rect 2252 1600 2268 1664
+rect 2268 1600 2332 1664
+rect 2332 1600 2348 1664
+rect 2348 1600 2412 1664
+rect 2412 1600 2418 1664
+rect 2182 1478 2418 1600
+rect 2882 778 3118 1014
+rect 3582 1664 3818 1714
+rect 3582 1600 3588 1664
+rect 3588 1600 3652 1664
+rect 3652 1600 3668 1664
+rect 3668 1600 3732 1664
+rect 3732 1600 3748 1664
+rect 3748 1600 3812 1664
+rect 3812 1600 3818 1664
+rect 3582 1478 3818 1600
+rect 4282 778 4518 1014
+rect 4982 1664 5218 1714
+rect 4982 1600 4988 1664
+rect 4988 1600 5052 1664
+rect 5052 1600 5068 1664
+rect 5068 1600 5132 1664
+rect 5132 1600 5148 1664
+rect 5148 1600 5212 1664
+rect 5212 1600 5218 1664
+rect 4982 1478 5218 1600
+<< metal5 >>
+rect 0 1714 5980 1756
+rect 0 1478 782 1714
+rect 1018 1478 2182 1714
+rect 2418 1478 3582 1714
+rect 3818 1478 4982 1714
+rect 5218 1478 5980 1714
+rect 0 1436 5980 1478
+rect 0 1014 5980 1056
+rect 0 778 82 1014
+rect 318 778 1482 1014
+rect 1718 778 2882 1014
+rect 3118 778 4282 1014
+rect 4518 778 5980 1014
+rect 0 736 5980 778
+use sky130_fd_sc_hd__fill_1  FILLER_0_9 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 828 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_2 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 0 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638322937
+transform 1 0 0 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 1 544
+box -38 -48 590 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 920 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_15
+timestamp 1638322937
+transform 1 0 1380 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[5\]
+timestamp 1638322937
+transform 1 0 2300 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[1\]
+timestamp 1638322937
+transform 1 0 1196 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[4\]
+timestamp 1638322937
+transform 1 0 2024 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[3\]
+timestamp 1638322937
+transform 1 0 1748 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[2\]
+timestamp 1638322937
+transform 1 0 1472 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_6 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 2576 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_38 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 3496 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_33
+timestamp 1638322937
+transform 1 0 3036 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_29
+timestamp 1638322937
+transform 1 0 2668 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_27
+timestamp 1638322937
+transform 1 0 2484 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[7\]
+timestamp 1638322937
+transform 1 0 3220 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[6\]
+timestamp 1638322937
+transform 1 0 2760 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_43
+timestamp 1638322937
+transform 1 0 3956 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_51 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 4692 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_48
+timestamp 1638322937
+transform 1 0 4416 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_39
+timestamp 1638322937
+transform 1 0 3588 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[9\]
+timestamp 1638322937
+transform 1 0 4140 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[8\]
+timestamp 1638322937
+transform 1 0 3680 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[12\]
+timestamp 1638322937
+transform 1 0 4508 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_8
+timestamp 1638322937
+transform 1 0 5152 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_7
+timestamp 1638322937
+transform 1 0 5152 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_55
+timestamp 1638322937
+transform 1 0 5060 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_55
+timestamp 1638322937
+transform 1 0 5060 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[10\]
+timestamp 1638322937
+transform 1 0 4784 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_60
+timestamp 1638322937
+transform 1 0 5520 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_57
+timestamp 1638322937
+transform 1 0 5244 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_61
+timestamp 1638322937
+transform 1 0 5612 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[11\]
+timestamp 1638322937
+transform 1 0 5244 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638322937
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638322937
+transform -1 0 5980 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638322937
+transform 1 0 0 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638322937
+transform 1 0 276 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638322937
+transform 1 0 1380 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_9
+timestamp 1638322937
+transform 1 0 2576 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_27
+timestamp 1638322937
+transform 1 0 2484 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_29
+timestamp 1638322937
+transform 1 0 2668 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_41
+timestamp 1638322937
+transform 1 0 3772 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_10
+timestamp 1638322937
+transform 1 0 5152 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_57
+timestamp 1638322937
+transform 1 0 5244 0 1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_61
+timestamp 1638322937
+transform 1 0 5612 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638322937
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_2_53
+timestamp 1638322937
+transform 1 0 4876 0 1 1632
+box -38 -48 314 592
+<< labels >>
+rlabel metal5 s 0 1436 5980 1756 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 760 496 1040 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 2160 496 2440 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 3560 496 3840 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 4960 496 5240 2224 6 VGND
+port 0 nsew ground input
+rlabel metal5 s 0 736 5980 1056 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 60 496 340 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 1460 496 1740 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 2860 496 3140 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 4260 496 4540 2224 6 VPWR
+port 1 nsew power input
+rlabel metal2 s 202 0 258 400 6 gpio_defaults[0]
+port 2 nsew signal tristate
+rlabel metal2 s 4802 0 4858 400 6 gpio_defaults[10]
+port 3 nsew signal tristate
+rlabel metal2 s 5262 0 5318 400 6 gpio_defaults[11]
+port 4 nsew signal tristate
+rlabel metal2 s 5722 0 5778 400 6 gpio_defaults[12]
+port 5 nsew signal tristate
+rlabel metal2 s 662 0 718 400 6 gpio_defaults[1]
+port 6 nsew signal tristate
+rlabel metal2 s 1122 0 1178 400 6 gpio_defaults[2]
+port 7 nsew signal tristate
+rlabel metal2 s 1582 0 1638 400 6 gpio_defaults[3]
+port 8 nsew signal tristate
+rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[4]
+port 9 nsew signal tristate
+rlabel metal2 s 2502 0 2558 400 6 gpio_defaults[5]
+port 10 nsew signal tristate
+rlabel metal2 s 2962 0 3018 400 6 gpio_defaults[6]
+port 11 nsew signal tristate
+rlabel metal2 s 3422 0 3478 400 6 gpio_defaults[7]
+port 12 nsew signal tristate
+rlabel metal2 s 3882 0 3938 400 6 gpio_defaults[8]
+port 13 nsew signal tristate
+rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[9]
+port 14 nsew signal tristate
+<< properties >>
+string FIXED_BBOX 0 0 6000 2200
+<< end >>

tapeout/outputs/mag/gpio_defaults_block_1801.mag

diff --git a/tapeout/outputs/mag/gpio_defaults_block_1801.mag b/tapeout/outputs/mag/gpio_defaults_block_1801.mag
new file mode 100644
index 0000000..97978aa
--- /dev/null
+++ b/tapeout/outputs/mag/gpio_defaults_block_1801.mag
@@ -0,0 +1,1461 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1638587925
+<< viali >>
+rect 949 833 983 867
+rect 1639 833 1673 867
+rect 4583 833 4617 867
+rect 1363 765 1397 799
+rect 1915 765 1949 799
+rect 2191 765 2225 799
+rect 2513 765 2547 799
+rect 2973 765 3007 799
+rect 3433 765 3467 799
+rect 3893 765 3927 799
+rect 4353 765 4387 799
+rect 4951 765 4985 799
+rect 5273 765 5307 799
+<< metal1 >>
+rect 0 2202 5980 2224
+rect 0 2150 78 2202
+rect 130 2150 142 2202
+rect 194 2150 206 2202
+rect 258 2150 270 2202
+rect 322 2150 1478 2202
+rect 1530 2150 1542 2202
+rect 1594 2150 1606 2202
+rect 1658 2150 1670 2202
+rect 1722 2150 2878 2202
+rect 2930 2150 2942 2202
+rect 2994 2150 3006 2202
+rect 3058 2150 3070 2202
+rect 3122 2150 4278 2202
+rect 4330 2150 4342 2202
+rect 4394 2150 4406 2202
+rect 4458 2150 4470 2202
+rect 4522 2150 5980 2202
+rect 0 2128 5980 2150
+rect 0 1658 5980 1680
+rect 0 1606 778 1658
+rect 830 1606 842 1658
+rect 894 1606 906 1658
+rect 958 1606 970 1658
+rect 1022 1606 2178 1658
+rect 2230 1606 2242 1658
+rect 2294 1606 2306 1658
+rect 2358 1606 2370 1658
+rect 2422 1606 3578 1658
+rect 3630 1606 3642 1658
+rect 3694 1606 3706 1658
+rect 3758 1606 3770 1658
+rect 3822 1606 4978 1658
+rect 5030 1606 5042 1658
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+rect 5222 1606 5980 1658
+rect 0 1584 5980 1606
+rect 0 1114 5980 1136
+rect 0 1062 78 1114
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+rect 0 1040 5980 1062
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+rect 1038 768 1409 796
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+rect 658 688 664 740
+rect 716 728 722 740
+rect 1038 728 1066 768
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+rect 2096 768 2240 796
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+rect 4161 768 4344 796
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+rect 4798 796 4804 808
+rect 4759 768 4804 796
+rect 4798 756 4804 768
+rect 4856 796 4862 808
+rect 4936 796 5000 808
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+rect 4856 768 5000 796
+rect 5219 768 5264 796
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+rect 5316 796 5322 808
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+rect 5316 768 5460 796
+rect 5316 756 5322 768
+rect 5396 756 5460 768
+rect 1636 728 1722 756
+rect 1636 716 1642 728
+rect 716 688 722 700
+rect 0 570 5980 592
+rect 0 518 778 570
+rect 830 518 842 570
+rect 894 518 906 570
+rect 958 518 970 570
+rect 1022 518 2178 570
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+rect 3822 518 4978 570
+rect 5030 518 5042 570
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+rect 5158 518 5170 570
+rect 5222 518 5980 570
+rect 0 496 5980 518
+<< via1 >>
+rect 78 2150 130 2202
+rect 142 2150 194 2202
+rect 206 2150 258 2202
+rect 270 2150 322 2202
+rect 1478 2150 1530 2202
+rect 1542 2150 1594 2202
+rect 1606 2150 1658 2202
+rect 1670 2150 1722 2202
+rect 2878 2150 2930 2202
+rect 2942 2150 2994 2202
+rect 3006 2150 3058 2202
+rect 3070 2150 3122 2202
+rect 4278 2150 4330 2202
+rect 4342 2150 4394 2202
+rect 4406 2150 4458 2202
+rect 4470 2150 4522 2202
+rect 778 1606 830 1658
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+rect 906 1606 958 1658
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+rect 2178 1606 2230 1658
+rect 2242 1606 2294 1658
+rect 2306 1606 2358 1658
+rect 2370 1606 2422 1658
+rect 3578 1606 3630 1658
+rect 3642 1606 3694 1658
+rect 3706 1606 3758 1658
+rect 3770 1606 3822 1658
+rect 4978 1606 5030 1658
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+rect 5170 1606 5222 1658
+rect 78 1062 130 1114
+rect 142 1062 194 1114
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+rect 3006 1062 3058 1114
+rect 3070 1062 3122 1114
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+rect 4342 1062 4394 1114
+rect 4406 1062 4458 1114
+rect 4470 1062 4522 1114
+rect 204 824 256 876
+rect 1262 864 1314 916
+rect 5724 824 5776 876
+rect 664 688 716 740
+rect 1584 716 1636 768
+rect 2044 756 2096 808
+rect 2504 756 2556 808
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+rect 3884 756 3936 808
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+rect 778 518 830 570
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+rect 3770 518 3822 570
+rect 4978 518 5030 570
+rect 5042 518 5094 570
+rect 5106 518 5158 570
+rect 5170 518 5222 570
+<< metal2 >>
+rect 78 2204 322 2224
+rect 78 2202 92 2204
+rect 148 2202 172 2204
+rect 228 2202 252 2204
+rect 308 2202 322 2204
+rect 78 2148 92 2150
+rect 148 2148 172 2150
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+rect 2878 2204 3122 2224
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+rect 4278 2204 4522 2224
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+<< metal4 >>
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+rect 232 1056 248 1120
+rect 312 1056 340 1120
+rect 60 1014 340 1056
+rect 60 778 82 1014
+rect 318 778 340 1014
+rect 60 496 340 778
+rect 760 1714 1040 2224
+rect 760 1478 782 1714
+rect 1018 1478 1040 1714
+rect 760 576 1040 1478
+rect 760 512 788 576
+rect 852 512 868 576
+rect 932 512 948 576
+rect 1012 512 1040 576
+rect 760 496 1040 512
+rect 1460 2208 1740 2224
+rect 1460 2144 1488 2208
+rect 1552 2144 1568 2208
+rect 1632 2144 1648 2208
+rect 1712 2144 1740 2208
+rect 1460 1120 1740 2144
+rect 1460 1056 1488 1120
+rect 1552 1056 1568 1120
+rect 1632 1056 1648 1120
+rect 1712 1056 1740 1120
+rect 1460 1014 1740 1056
+rect 1460 778 1482 1014
+rect 1718 778 1740 1014
+rect 1460 496 1740 778
+rect 2160 1714 2440 2224
+rect 2160 1478 2182 1714
+rect 2418 1478 2440 1714
+rect 2160 576 2440 1478
+rect 2160 512 2188 576
+rect 2252 512 2268 576
+rect 2332 512 2348 576
+rect 2412 512 2440 576
+rect 2160 496 2440 512
+rect 2860 2208 3140 2224
+rect 2860 2144 2888 2208
+rect 2952 2144 2968 2208
+rect 3032 2144 3048 2208
+rect 3112 2144 3140 2208
+rect 2860 1120 3140 2144
+rect 2860 1056 2888 1120
+rect 2952 1056 2968 1120
+rect 3032 1056 3048 1120
+rect 3112 1056 3140 1120
+rect 2860 1014 3140 1056
+rect 2860 778 2882 1014
+rect 3118 778 3140 1014
+rect 2860 496 3140 778
+rect 3560 1714 3840 2224
+rect 3560 1478 3582 1714
+rect 3818 1478 3840 1714
+rect 3560 576 3840 1478
+rect 3560 512 3588 576
+rect 3652 512 3668 576
+rect 3732 512 3748 576
+rect 3812 512 3840 576
+rect 3560 496 3840 512
+rect 4260 2208 4540 2224
+rect 4260 2144 4288 2208
+rect 4352 2144 4368 2208
+rect 4432 2144 4448 2208
+rect 4512 2144 4540 2208
+rect 4260 1120 4540 2144
+rect 4260 1056 4288 1120
+rect 4352 1056 4368 1120
+rect 4432 1056 4448 1120
+rect 4512 1056 4540 1120
+rect 4260 1014 4540 1056
+rect 4260 778 4282 1014
+rect 4518 778 4540 1014
+rect 4260 496 4540 778
+rect 4960 1714 5240 2224
+rect 4960 1478 4982 1714
+rect 5218 1478 5240 1714
+rect 4960 576 5240 1478
+rect 4960 512 4988 576
+rect 5052 512 5068 576
+rect 5132 512 5148 576
+rect 5212 512 5240 576
+rect 4960 496 5240 512
+<< via4 >>
+rect 82 778 318 1014
+rect 782 1664 1018 1714
+rect 782 1600 788 1664
+rect 788 1600 852 1664
+rect 852 1600 868 1664
+rect 868 1600 932 1664
+rect 932 1600 948 1664
+rect 948 1600 1012 1664
+rect 1012 1600 1018 1664
+rect 782 1478 1018 1600
+rect 1482 778 1718 1014
+rect 2182 1664 2418 1714
+rect 2182 1600 2188 1664
+rect 2188 1600 2252 1664
+rect 2252 1600 2268 1664
+rect 2268 1600 2332 1664
+rect 2332 1600 2348 1664
+rect 2348 1600 2412 1664
+rect 2412 1600 2418 1664
+rect 2182 1478 2418 1600
+rect 2882 778 3118 1014
+rect 3582 1664 3818 1714
+rect 3582 1600 3588 1664
+rect 3588 1600 3652 1664
+rect 3652 1600 3668 1664
+rect 3668 1600 3732 1664
+rect 3732 1600 3748 1664
+rect 3748 1600 3812 1664
+rect 3812 1600 3818 1664
+rect 3582 1478 3818 1600
+rect 4282 778 4518 1014
+rect 4982 1664 5218 1714
+rect 4982 1600 4988 1664
+rect 4988 1600 5052 1664
+rect 5052 1600 5068 1664
+rect 5068 1600 5132 1664
+rect 5132 1600 5148 1664
+rect 5148 1600 5212 1664
+rect 5212 1600 5218 1664
+rect 4982 1478 5218 1600
+<< metal5 >>
+rect 0 1714 5980 1756
+rect 0 1478 782 1714
+rect 1018 1478 2182 1714
+rect 2418 1478 3582 1714
+rect 3818 1478 4982 1714
+rect 5218 1478 5980 1714
+rect 0 1436 5980 1478
+rect 0 1014 5980 1056
+rect 0 778 82 1014
+rect 318 778 1482 1014
+rect 1718 778 2882 1014
+rect 3118 778 4282 1014
+rect 4518 778 5980 1014
+rect 0 736 5980 778
+use sky130_fd_sc_hd__fill_1  FILLER_0_9 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 828 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_2 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 0 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638322937
+transform 1 0 0 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 1 544
+box -38 -48 590 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 920 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_15
+timestamp 1638322937
+transform 1 0 1380 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[5\]
+timestamp 1638322937
+transform 1 0 2300 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[1\]
+timestamp 1638322937
+transform 1 0 1196 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[4\]
+timestamp 1638322937
+transform 1 0 2024 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[3\]
+timestamp 1638322937
+transform 1 0 1748 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[2\]
+timestamp 1638322937
+transform 1 0 1472 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_6 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 2576 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_38 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 3496 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_33
+timestamp 1638322937
+transform 1 0 3036 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_29
+timestamp 1638322937
+transform 1 0 2668 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_27
+timestamp 1638322937
+transform 1 0 2484 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[7\]
+timestamp 1638322937
+transform 1 0 3220 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[6\]
+timestamp 1638322937
+transform 1 0 2760 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_43
+timestamp 1638322937
+transform 1 0 3956 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_51 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 4692 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_48
+timestamp 1638322937
+transform 1 0 4416 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_39
+timestamp 1638322937
+transform 1 0 3588 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[9\]
+timestamp 1638322937
+transform 1 0 4140 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[8\]
+timestamp 1638322937
+transform 1 0 3680 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[12\]
+timestamp 1638322937
+transform 1 0 4508 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_8
+timestamp 1638322937
+transform 1 0 5152 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_7
+timestamp 1638322937
+transform 1 0 5152 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_55
+timestamp 1638322937
+transform 1 0 5060 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_55
+timestamp 1638322937
+transform 1 0 5060 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[10\]
+timestamp 1638322937
+transform 1 0 4784 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_60
+timestamp 1638322937
+transform 1 0 5520 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_57
+timestamp 1638322937
+transform 1 0 5244 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_61
+timestamp 1638322937
+transform 1 0 5612 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[11\]
+timestamp 1638322937
+transform 1 0 5244 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638322937
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638322937
+transform -1 0 5980 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638322937
+transform 1 0 0 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638322937
+transform 1 0 276 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638322937
+transform 1 0 1380 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_9
+timestamp 1638322937
+transform 1 0 2576 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_27
+timestamp 1638322937
+transform 1 0 2484 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_29
+timestamp 1638322937
+transform 1 0 2668 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_41
+timestamp 1638322937
+transform 1 0 3772 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_10
+timestamp 1638322937
+transform 1 0 5152 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_57
+timestamp 1638322937
+transform 1 0 5244 0 1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_61
+timestamp 1638322937
+transform 1 0 5612 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638322937
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_2_53
+timestamp 1638322937
+transform 1 0 4876 0 1 1632
+box -38 -48 314 592
+<< labels >>
+rlabel metal5 s 0 1436 5980 1756 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 760 496 1040 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 2160 496 2440 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 3560 496 3840 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 4960 496 5240 2224 6 VGND
+port 0 nsew ground input
+rlabel metal5 s 0 736 5980 1056 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 60 496 340 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 1460 496 1740 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 2860 496 3140 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 4260 496 4540 2224 6 VPWR
+port 1 nsew power input
+rlabel metal2 s 202 0 258 400 6 gpio_defaults[0]
+port 2 nsew signal tristate
+rlabel metal2 s 4802 0 4858 400 6 gpio_defaults[10]
+port 3 nsew signal tristate
+rlabel metal2 s 5262 0 5318 400 6 gpio_defaults[11]
+port 4 nsew signal tristate
+rlabel metal2 s 5722 0 5778 400 6 gpio_defaults[12]
+port 5 nsew signal tristate
+rlabel metal2 s 662 0 718 400 6 gpio_defaults[1]
+port 6 nsew signal tristate
+rlabel metal2 s 1122 0 1178 400 6 gpio_defaults[2]
+port 7 nsew signal tristate
+rlabel metal2 s 1582 0 1638 400 6 gpio_defaults[3]
+port 8 nsew signal tristate
+rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[4]
+port 9 nsew signal tristate
+rlabel metal2 s 2502 0 2558 400 6 gpio_defaults[5]
+port 10 nsew signal tristate
+rlabel metal2 s 2962 0 3018 400 6 gpio_defaults[6]
+port 11 nsew signal tristate
+rlabel metal2 s 3422 0 3478 400 6 gpio_defaults[7]
+port 12 nsew signal tristate
+rlabel metal2 s 3882 0 3938 400 6 gpio_defaults[8]
+port 13 nsew signal tristate
+rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[9]
+port 14 nsew signal tristate
+<< properties >>
+string FIXED_BBOX 0 0 6000 2200
+<< end >>

tapeout/outputs/mag/gpio_defaults_block_1803.mag

diff --git a/tapeout/outputs/mag/gpio_defaults_block_1803.mag b/tapeout/outputs/mag/gpio_defaults_block_1803.mag
new file mode 100644
index 0000000..39a381a
--- /dev/null
+++ b/tapeout/outputs/mag/gpio_defaults_block_1803.mag
@@ -0,0 +1,1461 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1638587925
+<< viali >>
+rect 949 833 983 867
+rect 1639 833 1673 867
+rect 4583 833 4617 867
+rect 1225 765 1259 799
+rect 1915 765 1949 799
+rect 2191 765 2225 799
+rect 2513 765 2547 799
+rect 2973 765 3007 799
+rect 3433 765 3467 799
+rect 3893 765 3927 799
+rect 4353 765 4387 799
+rect 4951 765 4985 799
+rect 5273 765 5307 799
+<< metal1 >>
+rect 0 2202 5980 2224
+rect 0 2150 78 2202
+rect 130 2150 142 2202
+rect 194 2150 206 2202
+rect 258 2150 270 2202
+rect 322 2150 1478 2202
+rect 1530 2150 1542 2202
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+rect 2994 2150 3006 2202
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+rect 3122 2150 4278 2202
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+rect 4394 2150 4406 2202
+rect 4458 2150 4470 2202
+rect 4522 2150 5980 2202
+rect 0 2128 5980 2150
+rect 0 1658 5980 1680
+rect 0 1606 778 1658
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+rect 1022 1606 2178 1658
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+rect 4161 768 4344 796
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+rect 4856 796 4862 808
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+rect 4856 768 5000 796
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+rect 4856 756 4862 768
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+rect 5316 796 5322 808
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+rect 5316 768 5460 796
+rect 5316 756 5322 768
+rect 5396 756 5460 768
+rect 1636 728 1722 756
+rect 1636 716 1642 728
+rect 716 688 722 700
+rect 0 570 5980 592
+rect 0 518 778 570
+rect 830 518 842 570
+rect 894 518 906 570
+rect 958 518 970 570
+rect 1022 518 2178 570
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+rect 3822 518 4978 570
+rect 5030 518 5042 570
+rect 5094 518 5106 570
+rect 5158 518 5170 570
+rect 5222 518 5980 570
+rect 0 496 5980 518
+<< via1 >>
+rect 78 2150 130 2202
+rect 142 2150 194 2202
+rect 206 2150 258 2202
+rect 270 2150 322 2202
+rect 1478 2150 1530 2202
+rect 1542 2150 1594 2202
+rect 1606 2150 1658 2202
+rect 1670 2150 1722 2202
+rect 2878 2150 2930 2202
+rect 2942 2150 2994 2202
+rect 3006 2150 3058 2202
+rect 3070 2150 3122 2202
+rect 4278 2150 4330 2202
+rect 4342 2150 4394 2202
+rect 4406 2150 4458 2202
+rect 4470 2150 4522 2202
+rect 778 1606 830 1658
+rect 842 1606 894 1658
+rect 906 1606 958 1658
+rect 970 1606 1022 1658
+rect 2178 1606 2230 1658
+rect 2242 1606 2294 1658
+rect 2306 1606 2358 1658
+rect 2370 1606 2422 1658
+rect 3578 1606 3630 1658
+rect 3642 1606 3694 1658
+rect 3706 1606 3758 1658
+rect 3770 1606 3822 1658
+rect 4978 1606 5030 1658
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+rect 5106 1606 5158 1658
+rect 5170 1606 5222 1658
+rect 78 1062 130 1114
+rect 142 1062 194 1114
+rect 206 1062 258 1114
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+rect 4470 1062 4522 1114
+rect 204 824 256 876
+rect 1262 864 1314 916
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+rect 1708 1060 1712 1116
+rect 1648 1056 1712 1060
+rect 2888 1116 2952 1120
+rect 2888 1060 2892 1116
+rect 2892 1060 2948 1116
+rect 2948 1060 2952 1116
+rect 2888 1056 2952 1060
+rect 2968 1116 3032 1120
+rect 2968 1060 2972 1116
+rect 2972 1060 3028 1116
+rect 3028 1060 3032 1116
+rect 2968 1056 3032 1060
+rect 3048 1116 3112 1120
+rect 3048 1060 3052 1116
+rect 3052 1060 3108 1116
+rect 3108 1060 3112 1116
+rect 3048 1056 3112 1060
+rect 4288 1116 4352 1120
+rect 4288 1060 4292 1116
+rect 4292 1060 4348 1116
+rect 4348 1060 4352 1116
+rect 4288 1056 4352 1060
+rect 4368 1116 4432 1120
+rect 4368 1060 4372 1116
+rect 4372 1060 4428 1116
+rect 4428 1060 4432 1116
+rect 4368 1056 4432 1060
+rect 4448 1116 4512 1120
+rect 4448 1060 4452 1116
+rect 4452 1060 4508 1116
+rect 4508 1060 4512 1116
+rect 4448 1056 4512 1060
+rect 788 572 852 576
+rect 788 516 792 572
+rect 792 516 848 572
+rect 848 516 852 572
+rect 788 512 852 516
+rect 868 572 932 576
+rect 868 516 872 572
+rect 872 516 928 572
+rect 928 516 932 572
+rect 868 512 932 516
+rect 948 572 1012 576
+rect 948 516 952 572
+rect 952 516 1008 572
+rect 1008 516 1012 572
+rect 948 512 1012 516
+rect 2188 572 2252 576
+rect 2188 516 2192 572
+rect 2192 516 2248 572
+rect 2248 516 2252 572
+rect 2188 512 2252 516
+rect 2268 572 2332 576
+rect 2268 516 2272 572
+rect 2272 516 2328 572
+rect 2328 516 2332 572
+rect 2268 512 2332 516
+rect 2348 572 2412 576
+rect 2348 516 2352 572
+rect 2352 516 2408 572
+rect 2408 516 2412 572
+rect 2348 512 2412 516
+rect 3588 572 3652 576
+rect 3588 516 3592 572
+rect 3592 516 3648 572
+rect 3648 516 3652 572
+rect 3588 512 3652 516
+rect 3668 572 3732 576
+rect 3668 516 3672 572
+rect 3672 516 3728 572
+rect 3728 516 3732 572
+rect 3668 512 3732 516
+rect 3748 572 3812 576
+rect 3748 516 3752 572
+rect 3752 516 3808 572
+rect 3808 516 3812 572
+rect 3748 512 3812 516
+rect 4988 572 5052 576
+rect 4988 516 4992 572
+rect 4992 516 5048 572
+rect 5048 516 5052 572
+rect 4988 512 5052 516
+rect 5068 572 5132 576
+rect 5068 516 5072 572
+rect 5072 516 5128 572
+rect 5128 516 5132 572
+rect 5068 512 5132 516
+rect 5148 572 5212 576
+rect 5148 516 5152 572
+rect 5152 516 5208 572
+rect 5208 516 5212 572
+rect 5148 512 5212 516
+<< metal4 >>
+rect 60 2208 340 2224
+rect 60 2144 88 2208
+rect 152 2144 168 2208
+rect 232 2144 248 2208
+rect 312 2144 340 2208
+rect 60 1120 340 2144
+rect 60 1056 88 1120
+rect 152 1056 168 1120
+rect 232 1056 248 1120
+rect 312 1056 340 1120
+rect 60 1014 340 1056
+rect 60 778 82 1014
+rect 318 778 340 1014
+rect 60 496 340 778
+rect 760 1714 1040 2224
+rect 760 1478 782 1714
+rect 1018 1478 1040 1714
+rect 760 576 1040 1478
+rect 760 512 788 576
+rect 852 512 868 576
+rect 932 512 948 576
+rect 1012 512 1040 576
+rect 760 496 1040 512
+rect 1460 2208 1740 2224
+rect 1460 2144 1488 2208
+rect 1552 2144 1568 2208
+rect 1632 2144 1648 2208
+rect 1712 2144 1740 2208
+rect 1460 1120 1740 2144
+rect 1460 1056 1488 1120
+rect 1552 1056 1568 1120
+rect 1632 1056 1648 1120
+rect 1712 1056 1740 1120
+rect 1460 1014 1740 1056
+rect 1460 778 1482 1014
+rect 1718 778 1740 1014
+rect 1460 496 1740 778
+rect 2160 1714 2440 2224
+rect 2160 1478 2182 1714
+rect 2418 1478 2440 1714
+rect 2160 576 2440 1478
+rect 2160 512 2188 576
+rect 2252 512 2268 576
+rect 2332 512 2348 576
+rect 2412 512 2440 576
+rect 2160 496 2440 512
+rect 2860 2208 3140 2224
+rect 2860 2144 2888 2208
+rect 2952 2144 2968 2208
+rect 3032 2144 3048 2208
+rect 3112 2144 3140 2208
+rect 2860 1120 3140 2144
+rect 2860 1056 2888 1120
+rect 2952 1056 2968 1120
+rect 3032 1056 3048 1120
+rect 3112 1056 3140 1120
+rect 2860 1014 3140 1056
+rect 2860 778 2882 1014
+rect 3118 778 3140 1014
+rect 2860 496 3140 778
+rect 3560 1714 3840 2224
+rect 3560 1478 3582 1714
+rect 3818 1478 3840 1714
+rect 3560 576 3840 1478
+rect 3560 512 3588 576
+rect 3652 512 3668 576
+rect 3732 512 3748 576
+rect 3812 512 3840 576
+rect 3560 496 3840 512
+rect 4260 2208 4540 2224
+rect 4260 2144 4288 2208
+rect 4352 2144 4368 2208
+rect 4432 2144 4448 2208
+rect 4512 2144 4540 2208
+rect 4260 1120 4540 2144
+rect 4260 1056 4288 1120
+rect 4352 1056 4368 1120
+rect 4432 1056 4448 1120
+rect 4512 1056 4540 1120
+rect 4260 1014 4540 1056
+rect 4260 778 4282 1014
+rect 4518 778 4540 1014
+rect 4260 496 4540 778
+rect 4960 1714 5240 2224
+rect 4960 1478 4982 1714
+rect 5218 1478 5240 1714
+rect 4960 576 5240 1478
+rect 4960 512 4988 576
+rect 5052 512 5068 576
+rect 5132 512 5148 576
+rect 5212 512 5240 576
+rect 4960 496 5240 512
+<< via4 >>
+rect 82 778 318 1014
+rect 782 1664 1018 1714
+rect 782 1600 788 1664
+rect 788 1600 852 1664
+rect 852 1600 868 1664
+rect 868 1600 932 1664
+rect 932 1600 948 1664
+rect 948 1600 1012 1664
+rect 1012 1600 1018 1664
+rect 782 1478 1018 1600
+rect 1482 778 1718 1014
+rect 2182 1664 2418 1714
+rect 2182 1600 2188 1664
+rect 2188 1600 2252 1664
+rect 2252 1600 2268 1664
+rect 2268 1600 2332 1664
+rect 2332 1600 2348 1664
+rect 2348 1600 2412 1664
+rect 2412 1600 2418 1664
+rect 2182 1478 2418 1600
+rect 2882 778 3118 1014
+rect 3582 1664 3818 1714
+rect 3582 1600 3588 1664
+rect 3588 1600 3652 1664
+rect 3652 1600 3668 1664
+rect 3668 1600 3732 1664
+rect 3732 1600 3748 1664
+rect 3748 1600 3812 1664
+rect 3812 1600 3818 1664
+rect 3582 1478 3818 1600
+rect 4282 778 4518 1014
+rect 4982 1664 5218 1714
+rect 4982 1600 4988 1664
+rect 4988 1600 5052 1664
+rect 5052 1600 5068 1664
+rect 5068 1600 5132 1664
+rect 5132 1600 5148 1664
+rect 5148 1600 5212 1664
+rect 5212 1600 5218 1664
+rect 4982 1478 5218 1600
+<< metal5 >>
+rect 0 1714 5980 1756
+rect 0 1478 782 1714
+rect 1018 1478 2182 1714
+rect 2418 1478 3582 1714
+rect 3818 1478 4982 1714
+rect 5218 1478 5980 1714
+rect 0 1436 5980 1478
+rect 0 1014 5980 1056
+rect 0 778 82 1014
+rect 318 778 1482 1014
+rect 1718 778 2882 1014
+rect 3118 778 4282 1014
+rect 4518 778 5980 1014
+rect 0 736 5980 778
+use sky130_fd_sc_hd__fill_1  FILLER_0_9 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 828 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_2 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 0 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638322937
+transform 1 0 0 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 1 544
+box -38 -48 590 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 920 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_15
+timestamp 1638322937
+transform 1 0 1380 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[5\]
+timestamp 1638322937
+transform 1 0 2300 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[1\]
+timestamp 1638322937
+transform 1 0 1196 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[4\]
+timestamp 1638322937
+transform 1 0 2024 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[3\]
+timestamp 1638322937
+transform 1 0 1748 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[2\]
+timestamp 1638322937
+transform 1 0 1472 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_6 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 2576 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_38 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 3496 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_33
+timestamp 1638322937
+transform 1 0 3036 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_29
+timestamp 1638322937
+transform 1 0 2668 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_27
+timestamp 1638322937
+transform 1 0 2484 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[7\]
+timestamp 1638322937
+transform 1 0 3220 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[6\]
+timestamp 1638322937
+transform 1 0 2760 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_43
+timestamp 1638322937
+transform 1 0 3956 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_51 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 4692 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_48
+timestamp 1638322937
+transform 1 0 4416 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_39
+timestamp 1638322937
+transform 1 0 3588 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[9\]
+timestamp 1638322937
+transform 1 0 4140 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[8\]
+timestamp 1638322937
+transform 1 0 3680 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[12\]
+timestamp 1638322937
+transform 1 0 4508 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_8
+timestamp 1638322937
+transform 1 0 5152 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_7
+timestamp 1638322937
+transform 1 0 5152 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_55
+timestamp 1638322937
+transform 1 0 5060 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_55
+timestamp 1638322937
+transform 1 0 5060 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[10\]
+timestamp 1638322937
+transform 1 0 4784 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_60
+timestamp 1638322937
+transform 1 0 5520 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_57
+timestamp 1638322937
+transform 1 0 5244 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_61
+timestamp 1638322937
+transform 1 0 5612 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[11\]
+timestamp 1638322937
+transform 1 0 5244 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638322937
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638322937
+transform -1 0 5980 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638322937
+transform 1 0 0 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638322937
+transform 1 0 276 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638322937
+transform 1 0 1380 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_9
+timestamp 1638322937
+transform 1 0 2576 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_27
+timestamp 1638322937
+transform 1 0 2484 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_29
+timestamp 1638322937
+transform 1 0 2668 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_41
+timestamp 1638322937
+transform 1 0 3772 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_10
+timestamp 1638322937
+transform 1 0 5152 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_57
+timestamp 1638322937
+transform 1 0 5244 0 1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_61
+timestamp 1638322937
+transform 1 0 5612 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638322937
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_2_53
+timestamp 1638322937
+transform 1 0 4876 0 1 1632
+box -38 -48 314 592
+<< labels >>
+rlabel metal5 s 0 1436 5980 1756 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 760 496 1040 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 2160 496 2440 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 3560 496 3840 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 4960 496 5240 2224 6 VGND
+port 0 nsew ground input
+rlabel metal5 s 0 736 5980 1056 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 60 496 340 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 1460 496 1740 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 2860 496 3140 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 4260 496 4540 2224 6 VPWR
+port 1 nsew power input
+rlabel metal2 s 202 0 258 400 6 gpio_defaults[0]
+port 2 nsew signal tristate
+rlabel metal2 s 4802 0 4858 400 6 gpio_defaults[10]
+port 3 nsew signal tristate
+rlabel metal2 s 5262 0 5318 400 6 gpio_defaults[11]
+port 4 nsew signal tristate
+rlabel metal2 s 5722 0 5778 400 6 gpio_defaults[12]
+port 5 nsew signal tristate
+rlabel metal2 s 662 0 718 400 6 gpio_defaults[1]
+port 6 nsew signal tristate
+rlabel metal2 s 1122 0 1178 400 6 gpio_defaults[2]
+port 7 nsew signal tristate
+rlabel metal2 s 1582 0 1638 400 6 gpio_defaults[3]
+port 8 nsew signal tristate
+rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[4]
+port 9 nsew signal tristate
+rlabel metal2 s 2502 0 2558 400 6 gpio_defaults[5]
+port 10 nsew signal tristate
+rlabel metal2 s 2962 0 3018 400 6 gpio_defaults[6]
+port 11 nsew signal tristate
+rlabel metal2 s 3422 0 3478 400 6 gpio_defaults[7]
+port 12 nsew signal tristate
+rlabel metal2 s 3882 0 3938 400 6 gpio_defaults[8]
+port 13 nsew signal tristate
+rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[9]
+port 14 nsew signal tristate
+<< properties >>
+string FIXED_BBOX 0 0 6000 2200
+<< end >>

tapeout/outputs/mag/user_id_prog_zero.mag

diff --git a/tapeout/outputs/mag/user_id_prog_zero.mag b/tapeout/outputs/mag/user_id_prog_zero.mag
new file mode 100644
index 0000000..6ad139c
--- /dev/null
+++ b/tapeout/outputs/mag/user_id_prog_zero.mag
@@ -0,0 +1,3074 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1650371074
+<< nwell >>
+rect 2304 2369 2397 2389
+<< viali >>
+rect 4353 5117 4387 5151
+rect 5273 5117 5307 5151
+rect 2145 4641 2179 4675
+rect 3249 4641 3283 4675
+rect 3617 4641 3651 4675
+rect 4721 4641 4755 4675
+rect 1593 4029 1627 4063
+rect 2053 4029 2087 4063
+rect 4445 4029 4479 4063
+rect 4721 4029 4755 4063
+rect 5549 4029 5583 4063
+rect 1685 3553 1719 3587
+rect 1961 3553 1995 3587
+rect 2697 3553 2731 3587
+rect 3157 3553 3191 3587
+rect 3433 3553 3467 3587
+rect 4261 3553 4295 3587
+rect 4813 3553 4847 3587
+rect 5273 3553 5307 3587
+rect 1593 2941 1627 2975
+rect 4813 2397 4847 2431
+rect 5089 2397 5123 2431
+rect 1593 1853 1627 1887
+rect 2145 1853 2179 1887
+rect 2605 1853 2639 1887
+rect 2881 1853 2915 1887
+rect 3249 1853 3283 1887
+rect 4077 1853 4111 1887
+rect 5641 1853 5675 1887
+rect 1685 1377 1719 1411
+rect 2973 1377 3007 1411
+rect 4629 1377 4663 1411
+<< locali >>
+rect 4353 5117 4387 5151
+rect 5273 5117 5307 5151
+rect 2145 4641 2179 4675
+rect 3249 4641 3283 4675
+rect 3617 4641 3651 4675
+rect 4721 4641 4755 4675
+rect 1593 4029 1627 4063
+rect 2053 4029 2087 4063
+rect 4445 4029 4479 4063
+rect 4721 4029 4755 4063
+rect 5549 4029 5583 4063
+rect 1685 3553 1719 3587
+rect 1961 3553 1995 3587
+rect 2697 3553 2731 3587
+rect 3157 3553 3191 3587
+rect 3433 3553 3467 3587
+rect 4261 3553 4295 3587
+rect 4813 3553 4847 3587
+rect 5273 3553 5307 3587
+rect 1593 2941 1627 2975
+rect 4813 2397 4847 2431
+rect 5089 2397 5123 2431
+rect 1593 1853 1627 1887
+rect 2145 1853 2179 1887
+rect 2605 1853 2639 1887
+rect 2881 1853 2915 1887
+rect 3249 1853 3283 1887
+rect 4077 1853 4111 1887
+rect 5641 1853 5675 1887
+rect 1685 1377 1719 1411
+rect 2973 1377 3007 1411
+rect 4629 1377 4663 1411
+<< metal1 >>
+rect 1104 6010 5980 6032
+rect 1104 5958 2607 6010
+rect 2659 5958 2671 6010
+rect 2723 5958 2735 6010
+rect 2787 5958 2799 6010
+rect 2851 5958 4232 6010
+rect 4284 5958 4296 6010
+rect 4348 5958 4360 6010
+rect 4412 5958 4424 6010
+rect 4476 5958 5980 6010
+rect 1104 5936 5980 5958
+rect 1104 5466 5980 5488
+rect 1104 5414 1794 5466
+rect 1846 5414 1858 5466
+rect 1910 5414 1922 5466
+rect 1974 5414 1986 5466
+rect 2038 5414 3420 5466
+rect 3472 5414 3484 5466
+rect 3536 5414 3548 5466
+rect 3600 5414 3612 5466
+rect 3664 5414 5045 5466
+rect 5097 5414 5109 5466
+rect 5161 5414 5173 5466
+rect 5225 5414 5237 5466
+rect 5289 5414 5980 5466
+rect 1104 5392 5980 5414
+rect 4062 5108 4068 5160
+rect 4120 5148 4126 5160
+rect 4157 5148 4215 5157
+rect 4341 5148 4399 5157
+rect 4120 5120 4399 5148
+rect 4120 5108 4126 5120
+rect 4157 5111 4215 5120
+rect 4341 5111 4399 5120
+rect 4614 5108 4620 5160
+rect 4672 5148 4678 5160
+rect 5077 5148 5135 5157
+rect 5261 5148 5319 5157
+rect 4672 5120 5319 5148
+rect 4672 5108 4678 5120
+rect 5077 5111 5135 5120
+rect 5261 5111 5319 5120
+rect 1104 4922 5980 4944
+rect 1104 4870 2607 4922
+rect 2659 4870 2671 4922
+rect 2723 4870 2735 4922
+rect 2787 4870 2799 4922
+rect 2851 4870 4232 4922
+rect 4284 4870 4296 4922
+rect 4348 4870 4360 4922
+rect 4412 4870 4424 4922
+rect 4476 4870 5980 4922
+rect 1104 4848 5980 4870
+rect 1949 4672 2007 4681
+rect 2133 4672 2191 4681
+rect 2958 4672 2964 4684
+rect 1949 4644 2964 4672
+rect 1949 4635 2007 4644
+rect 2133 4635 2191 4644
+rect 2958 4632 2964 4644
+rect 3016 4632 3022 4684
+rect 3050 4672 3114 4684
+rect 3234 4672 3240 4684
+rect 3050 4644 3240 4672
+rect 3050 4632 3114 4644
+rect 3234 4632 3240 4644
+rect 3292 4632 3298 4684
+rect 3418 4672 3482 4684
+rect 3602 4672 3666 4684
+rect 3418 4644 3666 4672
+rect 3418 4632 3482 4644
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+rect 4362 1604 4366 1660
+rect 4366 1604 4422 1660
+rect 4422 1604 4426 1660
+rect 4362 1600 4426 1604
+rect 4442 1660 4506 1664
+rect 4442 1604 4446 1660
+rect 4446 1604 4502 1660
+rect 4502 1604 4506 1660
+rect 4442 1600 4506 1604
+rect 1764 1116 1828 1120
+rect 1764 1060 1768 1116
+rect 1768 1060 1824 1116
+rect 1824 1060 1828 1116
+rect 1764 1056 1828 1060
+rect 1844 1116 1908 1120
+rect 1844 1060 1848 1116
+rect 1848 1060 1904 1116
+rect 1904 1060 1908 1116
+rect 1844 1056 1908 1060
+rect 1924 1116 1988 1120
+rect 1924 1060 1928 1116
+rect 1928 1060 1984 1116
+rect 1984 1060 1988 1116
+rect 1924 1056 1988 1060
+rect 2004 1116 2068 1120
+rect 2004 1060 2008 1116
+rect 2008 1060 2064 1116
+rect 2064 1060 2068 1116
+rect 2004 1056 2068 1060
+rect 3390 1116 3454 1120
+rect 3390 1060 3394 1116
+rect 3394 1060 3450 1116
+rect 3450 1060 3454 1116
+rect 3390 1056 3454 1060
+rect 3470 1116 3534 1120
+rect 3470 1060 3474 1116
+rect 3474 1060 3530 1116
+rect 3530 1060 3534 1116
+rect 3470 1056 3534 1060
+rect 3550 1116 3614 1120
+rect 3550 1060 3554 1116
+rect 3554 1060 3610 1116
+rect 3610 1060 3614 1116
+rect 3550 1056 3614 1060
+rect 3630 1116 3694 1120
+rect 3630 1060 3634 1116
+rect 3634 1060 3690 1116
+rect 3690 1060 3694 1116
+rect 3630 1056 3694 1060
+rect 5015 1116 5079 1120
+rect 5015 1060 5019 1116
+rect 5019 1060 5075 1116
+rect 5075 1060 5079 1116
+rect 5015 1056 5079 1060
+rect 5095 1116 5159 1120
+rect 5095 1060 5099 1116
+rect 5099 1060 5155 1116
+rect 5155 1060 5159 1116
+rect 5095 1056 5159 1060
+rect 5175 1116 5239 1120
+rect 5175 1060 5179 1116
+rect 5179 1060 5235 1116
+rect 5235 1060 5239 1116
+rect 5175 1056 5239 1060
+rect 5255 1116 5319 1120
+rect 5255 1060 5259 1116
+rect 5259 1060 5315 1116
+rect 5315 1060 5319 1116
+rect 5255 1056 5319 1060
+<< metal4 >>
+rect 1756 5472 2076 6032
+rect 1756 5408 1764 5472
+rect 1828 5408 1844 5472
+rect 1908 5408 1924 5472
+rect 1988 5408 2004 5472
+rect 2068 5408 2076 5472
+rect 1756 5238 2076 5408
+rect 1756 5002 1798 5238
+rect 2034 5002 2076 5238
+rect 1756 4384 2076 5002
+rect 1756 4320 1764 4384
+rect 1828 4320 1844 4384
+rect 1908 4320 1924 4384
+rect 1988 4320 2004 4384
+rect 2068 4320 2076 4384
+rect 1756 3606 2076 4320
+rect 1756 3370 1798 3606
+rect 2034 3370 2076 3606
+rect 1756 3296 2076 3370
+rect 1756 3232 1764 3296
+rect 1828 3232 1844 3296
+rect 1908 3232 1924 3296
+rect 1988 3232 2004 3296
+rect 2068 3232 2076 3296
+rect 1756 2208 2076 3232
+rect 1756 2144 1764 2208
+rect 1828 2144 1844 2208
+rect 1908 2144 1924 2208
+rect 1988 2144 2004 2208
+rect 2068 2144 2076 2208
+rect 1756 1974 2076 2144
+rect 1756 1738 1798 1974
+rect 2034 1738 2076 1974
+rect 1756 1120 2076 1738
+rect 1756 1056 1764 1120
+rect 1828 1056 1844 1120
+rect 1908 1056 1924 1120
+rect 1988 1056 2004 1120
+rect 2068 1056 2076 1120
+rect 1756 1040 2076 1056
+rect 2569 6016 2889 6032
+rect 2569 5952 2577 6016
+rect 2641 5952 2657 6016
+rect 2721 5952 2737 6016
+rect 2801 5952 2817 6016
+rect 2881 5952 2889 6016
+rect 2569 4928 2889 5952
+rect 2569 4864 2577 4928
+rect 2641 4864 2657 4928
+rect 2721 4864 2737 4928
+rect 2801 4864 2817 4928
+rect 2881 4864 2889 4928
+rect 2569 4422 2889 4864
+rect 2569 4186 2611 4422
+rect 2847 4186 2889 4422
+rect 2569 3840 2889 4186
+rect 2569 3776 2577 3840
+rect 2641 3776 2657 3840
+rect 2721 3776 2737 3840
+rect 2801 3776 2817 3840
+rect 2881 3776 2889 3840
+rect 2569 2790 2889 3776
+rect 2569 2752 2611 2790
+rect 2847 2752 2889 2790
+rect 2569 2688 2577 2752
+rect 2881 2688 2889 2752
+rect 2569 2554 2611 2688
+rect 2847 2554 2889 2688
+rect 2569 1664 2889 2554
+rect 2569 1600 2577 1664
+rect 2641 1600 2657 1664
+rect 2721 1600 2737 1664
+rect 2801 1600 2817 1664
+rect 2881 1600 2889 1664
+rect 2569 1040 2889 1600
+rect 3382 5472 3702 6032
+rect 3382 5408 3390 5472
+rect 3454 5408 3470 5472
+rect 3534 5408 3550 5472
+rect 3614 5408 3630 5472
+rect 3694 5408 3702 5472
+rect 3382 5238 3702 5408
+rect 3382 5002 3424 5238
+rect 3660 5002 3702 5238
+rect 3382 4384 3702 5002
+rect 3382 4320 3390 4384
+rect 3454 4320 3470 4384
+rect 3534 4320 3550 4384
+rect 3614 4320 3630 4384
+rect 3694 4320 3702 4384
+rect 3382 3606 3702 4320
+rect 3382 3370 3424 3606
+rect 3660 3370 3702 3606
+rect 3382 3296 3702 3370
+rect 3382 3232 3390 3296
+rect 3454 3232 3470 3296
+rect 3534 3232 3550 3296
+rect 3614 3232 3630 3296
+rect 3694 3232 3702 3296
+rect 3382 2208 3702 3232
+rect 3382 2144 3390 2208
+rect 3454 2144 3470 2208
+rect 3534 2144 3550 2208
+rect 3614 2144 3630 2208
+rect 3694 2144 3702 2208
+rect 3382 1974 3702 2144
+rect 3382 1738 3424 1974
+rect 3660 1738 3702 1974
+rect 3382 1120 3702 1738
+rect 3382 1056 3390 1120
+rect 3454 1056 3470 1120
+rect 3534 1056 3550 1120
+rect 3614 1056 3630 1120
+rect 3694 1056 3702 1120
+rect 3382 1040 3702 1056
+rect 4194 6016 4514 6032
+rect 4194 5952 4202 6016
+rect 4266 5952 4282 6016
+rect 4346 5952 4362 6016
+rect 4426 5952 4442 6016
+rect 4506 5952 4514 6016
+rect 4194 4928 4514 5952
+rect 4194 4864 4202 4928
+rect 4266 4864 4282 4928
+rect 4346 4864 4362 4928
+rect 4426 4864 4442 4928
+rect 4506 4864 4514 4928
+rect 4194 4422 4514 4864
+rect 4194 4186 4236 4422
+rect 4472 4186 4514 4422
+rect 4194 3840 4514 4186
+rect 4194 3776 4202 3840
+rect 4266 3776 4282 3840
+rect 4346 3776 4362 3840
+rect 4426 3776 4442 3840
+rect 4506 3776 4514 3840
+rect 4194 2790 4514 3776
+rect 4194 2752 4236 2790
+rect 4472 2752 4514 2790
+rect 4194 2688 4202 2752
+rect 4506 2688 4514 2752
+rect 4194 2554 4236 2688
+rect 4472 2554 4514 2688
+rect 4194 1664 4514 2554
+rect 4194 1600 4202 1664
+rect 4266 1600 4282 1664
+rect 4346 1600 4362 1664
+rect 4426 1600 4442 1664
+rect 4506 1600 4514 1664
+rect 4194 1040 4514 1600
+rect 5007 5472 5327 6032
+rect 5007 5408 5015 5472
+rect 5079 5408 5095 5472
+rect 5159 5408 5175 5472
+rect 5239 5408 5255 5472
+rect 5319 5408 5327 5472
+rect 5007 5238 5327 5408
+rect 5007 5002 5049 5238
+rect 5285 5002 5327 5238
+rect 5007 4384 5327 5002
+rect 5007 4320 5015 4384
+rect 5079 4320 5095 4384
+rect 5159 4320 5175 4384
+rect 5239 4320 5255 4384
+rect 5319 4320 5327 4384
+rect 5007 3606 5327 4320
+rect 5007 3370 5049 3606
+rect 5285 3370 5327 3606
+rect 5007 3296 5327 3370
+rect 5007 3232 5015 3296
+rect 5079 3232 5095 3296
+rect 5159 3232 5175 3296
+rect 5239 3232 5255 3296
+rect 5319 3232 5327 3296
+rect 5007 2208 5327 3232
+rect 5007 2144 5015 2208
+rect 5079 2144 5095 2208
+rect 5159 2144 5175 2208
+rect 5239 2144 5255 2208
+rect 5319 2144 5327 2208
+rect 5007 1974 5327 2144
+rect 5007 1738 5049 1974
+rect 5285 1738 5327 1974
+rect 5007 1120 5327 1738
+rect 5007 1056 5015 1120
+rect 5079 1056 5095 1120
+rect 5159 1056 5175 1120
+rect 5239 1056 5255 1120
+rect 5319 1056 5327 1120
+rect 5007 1040 5327 1056
+<< via4 >>
+rect 1798 5002 2034 5238
+rect 1798 3370 2034 3606
+rect 1798 1738 2034 1974
+rect 2611 4186 2847 4422
+rect 2611 2752 2847 2790
+rect 2611 2688 2641 2752
+rect 2641 2688 2657 2752
+rect 2657 2688 2721 2752
+rect 2721 2688 2737 2752
+rect 2737 2688 2801 2752
+rect 2801 2688 2817 2752
+rect 2817 2688 2847 2752
+rect 2611 2554 2847 2688
+rect 3424 5002 3660 5238
+rect 3424 3370 3660 3606
+rect 3424 1738 3660 1974
+rect 4236 4186 4472 4422
+rect 4236 2752 4472 2790
+rect 4236 2688 4266 2752
+rect 4266 2688 4282 2752
+rect 4282 2688 4346 2752
+rect 4346 2688 4362 2752
+rect 4362 2688 4426 2752
+rect 4426 2688 4442 2752
+rect 4442 2688 4472 2752
+rect 4236 2554 4472 2688
+rect 5049 5002 5285 5238
+rect 5049 3370 5285 3606
+rect 5049 1738 5285 1974
+<< metal5 >>
+rect 1104 5238 5980 5280
+rect 1104 5002 1798 5238
+rect 2034 5002 3424 5238
+rect 3660 5002 5049 5238
+rect 5285 5002 5980 5238
+rect 1104 4960 5980 5002
+rect 1104 4422 5980 4464
+rect 1104 4186 2611 4422
+rect 2847 4186 4236 4422
+rect 4472 4186 5980 4422
+rect 1104 4144 5980 4186
+rect 1104 3606 5980 3648
+rect 1104 3370 1798 3606
+rect 2034 3370 3424 3606
+rect 3660 3370 5049 3606
+rect 5285 3370 5980 3606
+rect 1104 3328 5980 3370
+rect 1104 2790 5980 2832
+rect 1104 2554 2611 2790
+rect 2847 2554 4236 2790
+rect 4472 2554 5980 2790
+rect 1104 2512 5980 2554
+rect 1104 1974 5980 2016
+rect 1104 1738 1798 1974
+rect 2034 1738 3424 1974
+rect 3660 1738 5049 1974
+rect 5285 1738 5980 1974
+rect 1104 1696 5980 1738
+use sky130_fd_sc_hd__fill_1  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 1380 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_7 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1648946573
+transform 1 0 1748 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_0_15 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 2484 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_21
+timestamp 1648946573
+transform 1 0 3036 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_29 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3772 0 -1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_0_32 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 4048 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_39
+timestamp 1648946573
+transform 1 0 4692 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_0_47
+timestamp 1638025753
+transform 1 0 5428 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_1_6
+timestamp 1638025753
+transform 1 0 1656 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_1_12
+timestamp 1638025753
+transform 1 0 2208 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_20
+timestamp 1638025753
+transform 1 0 2944 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_6  FILLER_1_24 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3312 0 1 1632
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_33 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 4140 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__fill_2  FILLER_1_45
+timestamp 1638025753
+transform 1 0 5244 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638025753
+transform 1 0 2484 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_27
+timestamp 1638025753
+transform 1 0 3588 0 -1 2720
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_6  FILLER_2_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_6  FILLER_2_44
+timestamp 1638025753
+transform 1 0 5152 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_6
+timestamp 1638025753
+transform 1 0 1656 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_18
+timestamp 1638025753
+transform 1 0 2760 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_30
+timestamp 1638025753
+transform 1 0 3864 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_8  FILLER_3_42
+timestamp 1648946573
+transform 1 0 4968 0 1 2720
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_10
+timestamp 1638025753
+transform 1 0 2024 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_14
+timestamp 1638025753
+transform 1 0 2392 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_4_18
+timestamp 1638025753
+transform 1 0 2760 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_26
+timestamp 1638025753
+transform 1 0 3496 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_30
+timestamp 1638025753
+transform 1 0 3864 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  FILLER_4_35
+timestamp 1638025753
+transform 1 0 4324 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_4_41
+timestamp 1638025753
+transform 1 0 4876 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_46
+timestamp 1638025753
+transform 1 0 5336 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_2  FILLER_5_6
+timestamp 1638025753
+transform 1 0 1656 0 1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_5_11
+timestamp 1638025753
+transform 1 0 2116 0 1 3808
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_8  FILLER_5_23
+timestamp 1648946573
+transform 1 0 3220 0 1 3808
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_5_31
+timestamp 1638025753
+transform 1 0 3956 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_6  FILLER_5_40
+timestamp 1638025753
+transform 1 0 4784 0 1 3808
+box -38 -48 590 592
+use sky130_fd_sc_hd__fill_1  FILLER_5_49
+timestamp 1638025753
+transform 1 0 5612 0 1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_6  FILLER_6_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_8  FILLER_6_12
+timestamp 1648946573
+transform 1 0 2208 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_20
+timestamp 1638025753
+transform 1 0 2944 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_24
+timestamp 1638025753
+transform 1 0 3312 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  FILLER_6_28
+timestamp 1638025753
+transform 1 0 3680 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_4  FILLER_6_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_36
+timestamp 1638025753
+transform 1 0 4416 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8  FILLER_6_40
+timestamp 1648946573
+transform 1 0 4784 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2  FILLER_6_48
+timestamp 1638025753
+transform 1 0 5520 0 -1 4896
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_7_3
+timestamp 1638025753
+transform 1 0 1380 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_7_15
+timestamp 1638025753
+transform 1 0 2484 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_7_27
+timestamp 1638025753
+transform 1 0 3588 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_6  FILLER_7_36
+timestamp 1638025753
+transform 1 0 4416 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__fill_1  FILLER_7_42
+timestamp 1638025753
+transform 1 0 4968 0 1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_7_46
+timestamp 1638025753
+transform 1 0 5336 0 1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_15
+timestamp 1638025753
+transform 1 0 2484 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_4  FILLER_8_27
+timestamp 1638025753
+transform 1 0 3588 0 -1 5984
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_8_44
+timestamp 1638025753
+transform 1 0 5152 0 -1 5984
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638025753
+transform 1 0 1104 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638025753
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_2
+timestamp 1638025753
+transform 1 0 1104 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638025753
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638025753
+transform 1 0 1104 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638025753
+transform -1 0 5980 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_6
+timestamp 1638025753
+transform 1 0 1104 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_7
+timestamp 1638025753
+transform -1 0 5980 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_8
+timestamp 1638025753
+transform 1 0 1104 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_9
+timestamp 1638025753
+transform -1 0 5980 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_10
+timestamp 1638025753
+transform 1 0 1104 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_11
+timestamp 1638025753
+transform -1 0 5980 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_12
+timestamp 1638025753
+transform 1 0 1104 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_13
+timestamp 1638025753
+transform -1 0 5980 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_14
+timestamp 1638025753
+transform 1 0 1104 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_15
+timestamp 1638025753
+transform -1 0 5980 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_16
+timestamp 1638025753
+transform 1 0 1104 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_17
+timestamp 1638025753
+transform -1 0 5980 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_18 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3956 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_19
+timestamp 1638025753
+transform 1 0 3956 0 -1 2720
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_20
+timestamp 1638025753
+transform 1 0 3956 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_21
+timestamp 1638025753
+transform 1 0 3956 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_22
+timestamp 1638025753
+transform 1 0 3956 0 -1 5984
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1648946573
+transform 1 0 2392 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[1\]
+timestamp 1648946573
+transform 1 0 3036 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[2\]
+timestamp 1648946573
+transform 1 0 1840 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[3\]
+timestamp 1648946573
+transform 1 0 1380 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[4\]
+timestamp 1648946573
+transform 1 0 5428 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[5\]
+timestamp 1648946573
+transform 1 0 4140 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[6\]
+timestamp 1648946573
+transform 1 0 1380 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[7\]
+timestamp 1648946573
+transform 1 0 3864 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[8\]
+timestamp 1648946573
+transform 1 0 3220 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[9\]
+timestamp 1648946573
+transform 1 0 4876 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[10\]
+timestamp 1648946573
+transform 1 0 4232 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[11\]
+timestamp 1648946573
+transform 1 0 2668 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[12\]
+timestamp 1648946573
+transform 1 0 4508 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[13\]
+timestamp 1648946573
+transform 1 0 4600 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[14\]
+timestamp 1648946573
+transform 1 0 2484 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[15\]
+timestamp 1648946573
+transform 1 0 4416 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[16\]
+timestamp 1648946573
+transform 1 0 4600 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[17\]
+timestamp 1648946573
+transform 1 0 1472 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[18\]
+timestamp 1648946573
+transform 1 0 4508 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[19\]
+timestamp 1648946573
+transform 1 0 1932 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[20\]
+timestamp 1648946573
+transform 1 0 2760 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[21\]
+timestamp 1648946573
+transform 1 0 3404 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[22\]
+timestamp 1648946573
+transform 1 0 4048 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[23\]
+timestamp 1648946573
+transform 1 0 5060 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[24\]
+timestamp 1648946573
+transform 1 0 1748 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[25\]
+timestamp 1648946573
+transform 1 0 2944 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[26\]
+timestamp 1648946573
+transform 1 0 5060 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[27\]
+timestamp 1648946573
+transform 1 0 1472 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[28\]
+timestamp 1648946573
+transform 1 0 1932 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[29\]
+timestamp 1648946573
+transform 1 0 5336 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[30\]
+timestamp 1648946573
+transform 1 0 3036 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[31\]
+timestamp 1648946573
+transform 1 0 1380 0 1 2720
+box -38 -48 314 592
+<< labels >>
+rlabel metal2 s 4066 6277 4122 7077 4 mask_rev[0]
+port 1 nsew
+rlabel metal2 s 4066 0 4122 800 4 mask_rev[10]
+port 2 nsew
+rlabel metal2 s 1122 0 1178 800 4 mask_rev[11]
+port 3 nsew
+rlabel metal2 s 570 0 626 800 4 mask_rev[12]
+port 4 nsew
+rlabel metal2 s 5354 6277 5410 7077 4 mask_rev[13]
+port 5 nsew
+rlabel metal2 s 5906 0 5962 800 4 mask_rev[14]
+port 6 nsew
+rlabel metal3 s 6309 1640 7109 1760 4 mask_rev[15]
+port 7 nsew
+rlabel metal2 s 2226 0 2282 800 4 mask_rev[16]
+port 8 nsew
+rlabel metal2 s 1674 6277 1730 7077 4 mask_rev[17]
+port 9 nsew
+rlabel metal3 s 0 5176 800 5296 4 mask_rev[18]
+port 10 nsew
+rlabel metal2 s 2962 6277 3018 7077 4 mask_rev[19]
+port 11 nsew
+rlabel metal3 s 0 3272 800 3392 4 mask_rev[1]
+port 12 nsew
+rlabel metal3 s 6309 2456 7109 2576 4 mask_rev[20]
+port 13 nsew
+rlabel metal3 s 6309 824 7109 944 4 mask_rev[21]
+port 14 nsew
+rlabel metal3 s 0 5992 800 6112 4 mask_rev[22]
+port 15 nsew
+rlabel metal2 s 1674 0 1730 800 4 mask_rev[23]
+port 16 nsew
+rlabel metal2 s 5906 6277 5962 7077 4 mask_rev[24]
+port 17 nsew
+rlabel metal3 s 0 1640 800 1760 4 mask_rev[25]
+port 18 nsew
+rlabel metal2 s 4802 6277 4858 7077 4 mask_rev[26]
+port 19 nsew
+rlabel metal2 s 1122 6277 1178 7077 4 mask_rev[27]
+port 20 nsew
+rlabel metal2 s 6458 6277 6514 7077 4 mask_rev[28]
+port 21 nsew
+rlabel metal2 s 5354 0 5410 800 4 mask_rev[29]
+port 22 nsew
+rlabel metal3 s 0 2456 800 2576 4 mask_rev[2]
+port 23 nsew
+rlabel metal3 s 6309 5176 7109 5296 4 mask_rev[30]
+port 24 nsew
+rlabel metal2 s 2962 0 3018 800 4 mask_rev[31]
+port 25 nsew
+rlabel metal2 s 3514 0 3570 800 4 mask_rev[3]
+port 26 nsew
+rlabel metal3 s 6309 3544 7109 3664 4 mask_rev[4]
+port 27 nsew
+rlabel metal3 s 6309 4360 7109 4480 4 mask_rev[5]
+port 28 nsew
+rlabel metal3 s 0 4360 800 4480 4 mask_rev[6]
+port 29 nsew
+rlabel metal2 s 3514 6277 3570 7077 4 mask_rev[7]
+port 30 nsew
+rlabel metal2 s 4802 0 4858 800 4 mask_rev[8]
+port 31 nsew
+rlabel metal2 s 2226 6277 2282 7077 4 mask_rev[9]
+port 32 nsew
+rlabel metal5 s 1104 1696 5980 2016 4 VPWR
+port 33 nsew
+rlabel metal5 s 1104 2512 5980 2832 4 VGND
+port 34 nsew
+<< properties >>
+string FIXED_BBOX 0 0 7109 7077
+<< end >>

tapeout/outputs/mag/user_id_programming.mag

diff --git a/tapeout/outputs/mag/user_id_programming.mag b/tapeout/outputs/mag/user_id_programming.mag
new file mode 100644
index 0000000..a38724c
--- /dev/null
+++ b/tapeout/outputs/mag/user_id_programming.mag
@@ -0,0 +1,3074 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1650371074
+<< nwell >>
+rect 2304 2369 2397 2389
+<< viali >>
+rect 4353 5117 4387 5151
+rect 5273 5117 5307 5151
+rect 1961 4641 1995 4675
+rect 3065 4641 3099 4675
+rect 3617 4641 3651 4675
+rect 4537 4641 4571 4675
+rect 1593 4029 1627 4063
+rect 2053 4029 2087 4063
+rect 4445 4029 4479 4063
+rect 4721 4029 4755 4063
+rect 5549 4029 5583 4063
+rect 1501 3553 1535 3587
+rect 1777 3553 1811 3587
+rect 2697 3553 2731 3587
+rect 2973 3553 3007 3587
+rect 3433 3553 3467 3587
+rect 4261 3553 4295 3587
+rect 4629 3553 4663 3587
+rect 5273 3553 5307 3587
+rect 1409 2941 1443 2975
+rect 4813 2397 4847 2431
+rect 5089 2397 5123 2431
+rect 1593 1853 1627 1887
+rect 1961 1853 1995 1887
+rect 2605 1853 2639 1887
+rect 2881 1853 2915 1887
+rect 3249 1853 3283 1887
+rect 4077 1853 4111 1887
+rect 5641 1853 5675 1887
+rect 1501 1377 1535 1411
+rect 2789 1377 2823 1411
+rect 4629 1377 4663 1411
+<< locali >>
+rect 4353 5117 4387 5151
+rect 5273 5117 5307 5151
+rect 1961 4641 1995 4675
+rect 3065 4641 3099 4675
+rect 3617 4641 3651 4675
+rect 4537 4641 4571 4675
+rect 1593 4029 1627 4063
+rect 2053 4029 2087 4063
+rect 4445 4029 4479 4063
+rect 4721 4029 4755 4063
+rect 5549 4029 5583 4063
+rect 1501 3553 1535 3587
+rect 1777 3553 1811 3587
+rect 2697 3553 2731 3587
+rect 2973 3553 3007 3587
+rect 3433 3553 3467 3587
+rect 4261 3553 4295 3587
+rect 4629 3553 4663 3587
+rect 5273 3553 5307 3587
+rect 1409 2941 1443 2975
+rect 4813 2397 4847 2431
+rect 5089 2397 5123 2431
+rect 1593 1853 1627 1887
+rect 1961 1853 1995 1887
+rect 2605 1853 2639 1887
+rect 2881 1853 2915 1887
+rect 3249 1853 3283 1887
+rect 4077 1853 4111 1887
+rect 5641 1853 5675 1887
+rect 1501 1377 1535 1411
+rect 2789 1377 2823 1411
+rect 4629 1377 4663 1411
+<< metal1 >>
+rect 1104 6010 5980 6032
+rect 1104 5958 2607 6010
+rect 2659 5958 2671 6010
+rect 2723 5958 2735 6010
+rect 2787 5958 2799 6010
+rect 2851 5958 4232 6010
+rect 4284 5958 4296 6010
+rect 4348 5958 4360 6010
+rect 4412 5958 4424 6010
+rect 4476 5958 5980 6010
+rect 1104 5936 5980 5958
+rect 1104 5466 5980 5488
+rect 1104 5414 1794 5466
+rect 1846 5414 1858 5466
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+rect 3472 5414 3484 5466
+rect 3536 5414 3548 5466
+rect 3600 5414 3612 5466
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+rect 5097 5414 5109 5466
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+rect 5289 5414 5980 5466
+rect 1104 5392 5980 5414
+rect 4062 5108 4068 5160
+rect 4120 5148 4126 5160
+rect 4157 5148 4215 5157
+rect 4341 5148 4399 5157
+rect 4120 5120 4399 5148
+rect 4120 5108 4126 5120
+rect 4157 5111 4215 5120
+rect 4341 5111 4399 5120
+rect 4614 5108 4620 5160
+rect 4672 5148 4678 5160
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+rect 5261 5148 5319 5157
+rect 4672 5120 5319 5148
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+rect 1104 4922 5980 4944
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+rect 2611 2554 2847 2688
+rect 3424 5002 3660 5238
+rect 3424 3370 3660 3606
+rect 3424 1738 3660 1974
+rect 4236 4186 4472 4422
+rect 4236 2752 4472 2790
+rect 4236 2688 4266 2752
+rect 4266 2688 4282 2752
+rect 4282 2688 4346 2752
+rect 4346 2688 4362 2752
+rect 4362 2688 4426 2752
+rect 4426 2688 4442 2752
+rect 4442 2688 4472 2752
+rect 4236 2554 4472 2688
+rect 5049 5002 5285 5238
+rect 5049 3370 5285 3606
+rect 5049 1738 5285 1974
+<< metal5 >>
+rect 1104 5238 5980 5280
+rect 1104 5002 1798 5238
+rect 2034 5002 3424 5238
+rect 3660 5002 5049 5238
+rect 5285 5002 5980 5238
+rect 1104 4960 5980 5002
+rect 1104 4422 5980 4464
+rect 1104 4186 2611 4422
+rect 2847 4186 4236 4422
+rect 4472 4186 5980 4422
+rect 1104 4144 5980 4186
+rect 1104 3606 5980 3648
+rect 1104 3370 1798 3606
+rect 2034 3370 3424 3606
+rect 3660 3370 5049 3606
+rect 5285 3370 5980 3606
+rect 1104 3328 5980 3370
+rect 1104 2790 5980 2832
+rect 1104 2554 2611 2790
+rect 2847 2554 4236 2790
+rect 4472 2554 5980 2790
+rect 1104 2512 5980 2554
+rect 1104 1974 5980 2016
+rect 1104 1738 1798 1974
+rect 2034 1738 3424 1974
+rect 3660 1738 5049 1974
+rect 5285 1738 5980 1974
+rect 1104 1696 5980 1738
+use sky130_fd_sc_hd__fill_1  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 1380 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_7 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1648946573
+transform 1 0 1748 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_0_15 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 2484 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_21
+timestamp 1648946573
+transform 1 0 3036 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_29 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3772 0 -1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_0_32 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 4048 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_39
+timestamp 1648946573
+transform 1 0 4692 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_0_47
+timestamp 1638025753
+transform 1 0 5428 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_1_6
+timestamp 1638025753
+transform 1 0 1656 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_1_12
+timestamp 1638025753
+transform 1 0 2208 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_20
+timestamp 1638025753
+transform 1 0 2944 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_6  FILLER_1_24 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3312 0 1 1632
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_33 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 4140 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__fill_2  FILLER_1_45
+timestamp 1638025753
+transform 1 0 5244 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638025753
+transform 1 0 2484 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_27
+timestamp 1638025753
+transform 1 0 3588 0 -1 2720
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_6  FILLER_2_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_6  FILLER_2_44
+timestamp 1638025753
+transform 1 0 5152 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_6
+timestamp 1638025753
+transform 1 0 1656 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_18
+timestamp 1638025753
+transform 1 0 2760 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_30
+timestamp 1638025753
+transform 1 0 3864 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_8  FILLER_3_42
+timestamp 1648946573
+transform 1 0 4968 0 1 2720
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_10
+timestamp 1638025753
+transform 1 0 2024 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_14
+timestamp 1638025753
+transform 1 0 2392 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_4_18
+timestamp 1638025753
+transform 1 0 2760 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_26
+timestamp 1638025753
+transform 1 0 3496 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_30
+timestamp 1638025753
+transform 1 0 3864 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  FILLER_4_35
+timestamp 1638025753
+transform 1 0 4324 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_4_41
+timestamp 1638025753
+transform 1 0 4876 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_46
+timestamp 1638025753
+transform 1 0 5336 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_2  FILLER_5_6
+timestamp 1638025753
+transform 1 0 1656 0 1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_5_11
+timestamp 1638025753
+transform 1 0 2116 0 1 3808
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_8  FILLER_5_23
+timestamp 1648946573
+transform 1 0 3220 0 1 3808
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_5_31
+timestamp 1638025753
+transform 1 0 3956 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_6  FILLER_5_40
+timestamp 1638025753
+transform 1 0 4784 0 1 3808
+box -38 -48 590 592
+use sky130_fd_sc_hd__fill_1  FILLER_5_49
+timestamp 1638025753
+transform 1 0 5612 0 1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_6  FILLER_6_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_8  FILLER_6_12
+timestamp 1648946573
+transform 1 0 2208 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_20
+timestamp 1638025753
+transform 1 0 2944 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_24
+timestamp 1638025753
+transform 1 0 3312 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  FILLER_6_28
+timestamp 1638025753
+transform 1 0 3680 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_4  FILLER_6_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_36
+timestamp 1638025753
+transform 1 0 4416 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8  FILLER_6_40
+timestamp 1648946573
+transform 1 0 4784 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2  FILLER_6_48
+timestamp 1638025753
+transform 1 0 5520 0 -1 4896
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_7_3
+timestamp 1638025753
+transform 1 0 1380 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_7_15
+timestamp 1638025753
+transform 1 0 2484 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_7_27
+timestamp 1638025753
+transform 1 0 3588 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_6  FILLER_7_36
+timestamp 1638025753
+transform 1 0 4416 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__fill_1  FILLER_7_42
+timestamp 1638025753
+transform 1 0 4968 0 1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_7_46
+timestamp 1638025753
+transform 1 0 5336 0 1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_15
+timestamp 1638025753
+transform 1 0 2484 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_4  FILLER_8_27
+timestamp 1638025753
+transform 1 0 3588 0 -1 5984
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_8_44
+timestamp 1638025753
+transform 1 0 5152 0 -1 5984
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638025753
+transform 1 0 1104 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638025753
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_2
+timestamp 1638025753
+transform 1 0 1104 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638025753
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638025753
+transform 1 0 1104 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638025753
+transform -1 0 5980 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_6
+timestamp 1638025753
+transform 1 0 1104 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_7
+timestamp 1638025753
+transform -1 0 5980 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_8
+timestamp 1638025753
+transform 1 0 1104 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_9
+timestamp 1638025753
+transform -1 0 5980 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_10
+timestamp 1638025753
+transform 1 0 1104 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_11
+timestamp 1638025753
+transform -1 0 5980 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_12
+timestamp 1638025753
+transform 1 0 1104 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_13
+timestamp 1638025753
+transform -1 0 5980 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_14
+timestamp 1638025753
+transform 1 0 1104 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_15
+timestamp 1638025753
+transform -1 0 5980 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_16
+timestamp 1638025753
+transform 1 0 1104 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_17
+timestamp 1638025753
+transform -1 0 5980 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_18 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3956 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_19
+timestamp 1638025753
+transform 1 0 3956 0 -1 2720
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_20
+timestamp 1638025753
+transform 1 0 3956 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_21
+timestamp 1638025753
+transform 1 0 3956 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_22
+timestamp 1638025753
+transform 1 0 3956 0 -1 5984
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1648946573
+transform 1 0 2392 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[1\]
+timestamp 1648946573
+transform 1 0 3036 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[2\]
+timestamp 1648946573
+transform 1 0 1840 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[3\]
+timestamp 1648946573
+transform 1 0 1380 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[4\]
+timestamp 1648946573
+transform 1 0 5428 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[5\]
+timestamp 1648946573
+transform 1 0 4140 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[6\]
+timestamp 1648946573
+transform 1 0 1380 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[7\]
+timestamp 1648946573
+transform 1 0 3864 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[8\]
+timestamp 1648946573
+transform 1 0 3220 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[9\]
+timestamp 1648946573
+transform 1 0 4876 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[10\]
+timestamp 1648946573
+transform 1 0 4232 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[11\]
+timestamp 1648946573
+transform 1 0 2668 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[12\]
+timestamp 1648946573
+transform 1 0 4508 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[13\]
+timestamp 1648946573
+transform 1 0 4600 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[14\]
+timestamp 1648946573
+transform 1 0 2484 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[15\]
+timestamp 1648946573
+transform 1 0 4416 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[16\]
+timestamp 1648946573
+transform 1 0 4600 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[17\]
+timestamp 1648946573
+transform 1 0 1472 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[18\]
+timestamp 1648946573
+transform 1 0 4508 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[19\]
+timestamp 1648946573
+transform 1 0 1932 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[20\]
+timestamp 1648946573
+transform 1 0 2760 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[21\]
+timestamp 1648946573
+transform 1 0 3404 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[22\]
+timestamp 1648946573
+transform 1 0 4048 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[23\]
+timestamp 1648946573
+transform 1 0 5060 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[24\]
+timestamp 1648946573
+transform 1 0 1748 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[25\]
+timestamp 1648946573
+transform 1 0 2944 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[26\]
+timestamp 1648946573
+transform 1 0 5060 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[27\]
+timestamp 1648946573
+transform 1 0 1472 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[28\]
+timestamp 1648946573
+transform 1 0 1932 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[29\]
+timestamp 1648946573
+transform 1 0 5336 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[30\]
+timestamp 1648946573
+transform 1 0 3036 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[31\]
+timestamp 1648946573
+transform 1 0 1380 0 1 2720
+box -38 -48 314 592
+<< labels >>
+rlabel metal2 s 4066 6277 4122 7077 4 mask_rev[0]
+port 1 nsew
+rlabel metal2 s 4066 0 4122 800 4 mask_rev[10]
+port 2 nsew
+rlabel metal2 s 1122 0 1178 800 4 mask_rev[11]
+port 3 nsew
+rlabel metal2 s 570 0 626 800 4 mask_rev[12]
+port 4 nsew
+rlabel metal2 s 5354 6277 5410 7077 4 mask_rev[13]
+port 5 nsew
+rlabel metal2 s 5906 0 5962 800 4 mask_rev[14]
+port 6 nsew
+rlabel metal3 s 6309 1640 7109 1760 4 mask_rev[15]
+port 7 nsew
+rlabel metal2 s 2226 0 2282 800 4 mask_rev[16]
+port 8 nsew
+rlabel metal2 s 1674 6277 1730 7077 4 mask_rev[17]
+port 9 nsew
+rlabel metal3 s 0 5176 800 5296 4 mask_rev[18]
+port 10 nsew
+rlabel metal2 s 2962 6277 3018 7077 4 mask_rev[19]
+port 11 nsew
+rlabel metal3 s 0 3272 800 3392 4 mask_rev[1]
+port 12 nsew
+rlabel metal3 s 6309 2456 7109 2576 4 mask_rev[20]
+port 13 nsew
+rlabel metal3 s 6309 824 7109 944 4 mask_rev[21]
+port 14 nsew
+rlabel metal3 s 0 5992 800 6112 4 mask_rev[22]
+port 15 nsew
+rlabel metal2 s 1674 0 1730 800 4 mask_rev[23]
+port 16 nsew
+rlabel metal2 s 5906 6277 5962 7077 4 mask_rev[24]
+port 17 nsew
+rlabel metal3 s 0 1640 800 1760 4 mask_rev[25]
+port 18 nsew
+rlabel metal2 s 4802 6277 4858 7077 4 mask_rev[26]
+port 19 nsew
+rlabel metal2 s 1122 6277 1178 7077 4 mask_rev[27]
+port 20 nsew
+rlabel metal2 s 6458 6277 6514 7077 4 mask_rev[28]
+port 21 nsew
+rlabel metal2 s 5354 0 5410 800 4 mask_rev[29]
+port 22 nsew
+rlabel metal3 s 0 2456 800 2576 4 mask_rev[2]
+port 23 nsew
+rlabel metal3 s 6309 5176 7109 5296 4 mask_rev[30]
+port 24 nsew
+rlabel metal2 s 2962 0 3018 800 4 mask_rev[31]
+port 25 nsew
+rlabel metal2 s 3514 0 3570 800 4 mask_rev[3]
+port 26 nsew
+rlabel metal3 s 6309 3544 7109 3664 4 mask_rev[4]
+port 27 nsew
+rlabel metal3 s 6309 4360 7109 4480 4 mask_rev[5]
+port 28 nsew
+rlabel metal3 s 0 4360 800 4480 4 mask_rev[6]
+port 29 nsew
+rlabel metal2 s 3514 6277 3570 7077 4 mask_rev[7]
+port 30 nsew
+rlabel metal2 s 4802 0 4858 800 4 mask_rev[8]
+port 31 nsew
+rlabel metal2 s 2226 6277 2282 7077 4 mask_rev[9]
+port 32 nsew
+rlabel metal5 s 1104 1696 5980 2016 4 VPWR
+port 33 nsew
+rlabel metal5 s 1104 2512 5980 2832 4 VGND
+port 34 nsew
+<< properties >>
+string FIXED_BBOX 0 0 7109 7077
+<< end >>

tapeout/outputs/mag/user_id_textblock.mag

diff --git a/tapeout/outputs/mag/user_id_textblock.mag b/tapeout/outputs/mag/user_id_textblock.mag
new file mode 100644
index 0000000..a89b72a
--- /dev/null
+++ b/tapeout/outputs/mag/user_id_textblock.mag
@@ -0,0 +1,43 @@
+magic
+tech sky130A
+timestamp 1608324878
+<< checkpaint >>
+rect 1495 5490 6500 6570
+rect -630 428 19262 5490
+rect -630 -630 6210 428
+rect 16092 356 18972 428
+<< fillblock >>
+rect -328 754 16860 5172
+use alpha_B  alphaX_0 hexdigits
+timestamp 1598786981
+transform 1 0 14887 0 1 1080
+box 0 0 1620 3780
+use alpha_D  alphaX_1 hexdigits
+timestamp 1598786981
+transform 1 0 12750 0 1 1080
+box 0 0 1620 3780
+use alpha_8  alphaX_2 hexdigits
+timestamp 1598786981
+transform 1 0 10625 0 1 1080
+box 0 0 1620 3780
+use alpha_D  alphaX_3
+timestamp 1598786981
+transform 1 0 8500 0 1 1080
+box 0 0 1620 3780
+use alpha_8  alphaX_4
+timestamp 1598786981
+transform 1 0 6375 0 1 1080
+box 0 0 1620 3780
+use alpha_0  alphaX_5 hexdigits
+timestamp 1598786981
+transform 1 0 4250 0 1 1080
+box 0 0 1620 3780
+use alpha_0  alphaX_6
+timestamp 1598786981
+transform 1 0 2125 0 1 1080
+box 0 0 1620 3780
+use alpha_0  alphaX_7
+timestamp 1598786981
+transform 1 0 0 0 1 1080
+box 0 0 1620 3780
+<< end >>

tapeout/outputs/oas/caravel_0008d8db.oas

diff --git a/tapeout/outputs/oas/caravel_0008d8db.oas b/tapeout/outputs/oas/caravel_0008d8db.oas
new file mode 100644
index 0000000..821c6a6
--- /dev/null
+++ b/tapeout/outputs/oas/caravel_0008d8db.oas
Binary files differ

tapeout/outputs/sky130A.magicrc

diff --git a/tapeout/outputs/sky130A.magicrc b/tapeout/outputs/sky130A.magicrc
new file mode 100644
index 0000000..5d93e4e
--- /dev/null
+++ b/tapeout/outputs/sky130A.magicrc
@@ -0,0 +1,87 @@
+puts stdout "Sourcing design .magicrc for technology sky130A ..."
+
+# Put grid on 0.005 pitch.  This is important, as some commands don't
+# rescale the grid automatically (such as lef read?).
+
+set scalefac [tech lambda]
+if {[lindex $scalefac 1] < 2} {
+    scalegrid 1 2
+}
+
+# drc off
+drc euclidean on
+# Change this to a fixed number for repeatable behavior with GDS writes
+# e.g., "random seed 12345"
+catch {random seed}
+
+# Turn off the scale option on ext2spice or else it conflicts with the
+# scale in the model files.
+ext2spice scale off
+
+# Allow override of PDK path from environment variable PDK_ROOT
+# "file nativename" guards against a local PDK_ROOT with "~" in the name
+if {[catch {set PDK_ROOT [file nativename $env(PDK_ROOT)]}]} {
+    set PDK_ROOT /usr/local/pdk/volare/sky130/build/0059588eebfc704681dc2368bd1d33d96281d10f
+}
+
+# loading technology
+tech load $PDK_ROOT/sky130A/libs.tech/magic/sky130A.tech
+
+# load device generator
+source $PDK_ROOT/sky130A/libs.tech/magic/sky130A.tcl
+
+# load bind keys (optional)
+# source $PDK_ROOT/sky130A/libs.tech/magic/sky130A-BindKeys
+
+# set units to lambda grid 
+snap lambda
+
+# set sky130 standard power, ground, and substrate names
+set VDD VPWR
+set GND VGND
+set SUB VSUBS
+
+# Allow override of type of magic library views used, "mag" or "maglef",
+# from environment variable MAGTYPE
+
+if {[catch {set MAGTYPE $env(MAGTYPE)}]} {
+   set MAGTYPE mag
+}
+
+# add path to reference cells
+if {[file isdir ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}]} {
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_fd_pr
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_fd_io
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_fd_sc_hd
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_fd_sc_hs
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_fd_sc_lp
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_fd_sc_ls
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_fd_sc_ms
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_osu_sc
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_osu_sc_t18
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_ml_xx_hd
+    addpath ${PDK_ROOT}/sky130A/libs.ref/${MAGTYPE}/sky130_sram_macros
+} else {
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_fd_pr/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_fd_io/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_fd_sc_hd/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_fd_sc_hdll/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_fd_sc_hs/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_fd_sc_hvl/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_fd_sc_lp/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_fd_sc_ls/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_fd_sc_ms/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_osu_sc/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_osu_sc_t18/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_ml_xx_hd/${MAGTYPE}
+    addpath ${PDK_ROOT}/sky130A/libs.ref/sky130_sram_macros/${MAGTYPE}
+}
+
+# add path to GDS cells
+
+# add path to IP from catalog.  This procedure defined in the PDK script.
+catch {magic::query_mylib_ip}
+# add path to local IP from user design space.  Defined in the PDK script.
+catch {magic::query_my_projects}

tapeout/outputs/verilog/gl/caravel.v

diff --git a/tapeout/outputs/verilog/gl/caravel.v b/tapeout/outputs/verilog/gl/caravel.v
new file mode 100644
index 0000000..acf3675
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/caravel.v
@@ -0,0 +1,5435 @@
+/* Generated by Yosys 0.9+4052 (git sha1 d061b0e, gcc 8.3.1 -fPIC -Os) */
+
+module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vdda1_2, vdda2, vssa1, vssa1_2, vssa2, vccd1, vccd2, vssd1, vssd2, gpio, mprj_io, clock, resetb, flash_csb, flash_clk, flash_io0, flash_io1);
+  wire caravel_clk;
+  wire caravel_clk2;
+  wire caravel_clk_buf;
+  wire caravel_rstn;
+  wire caravel_rstn_buf;
+  wire clk_passthru;
+  input clock;
+  wire clock_core;
+  wire clock_core_buf;
+  wire debug_in;
+  wire debug_mode;
+  wire debug_oeb;
+  wire debug_out;
+  wire ext_clk_sel;
+  wire ext_reset;
+  output flash_clk;
+  wire flash_clk_core;
+  wire flash_clk_frame;
+  wire flash_clk_frame_buf;
+  wire flash_clk_ieb;
+  wire flash_clk_ieb_buf;
+  wire flash_clk_oeb;
+  wire flash_clk_oeb_buf;
+  wire flash_clk_oeb_core;
+  output flash_csb;
+  wire flash_csb_core;
+  wire flash_csb_frame;
+  wire flash_csb_frame_buf;
+  wire flash_csb_ieb;
+  wire flash_csb_ieb_buf;
+  wire flash_csb_oeb;
+  wire flash_csb_oeb_buf;
+  wire flash_csb_oeb_core;
+  output flash_io0;
+  wire flash_io0_di;
+  wire flash_io0_di_buf;
+  wire flash_io0_di_core;
+  wire flash_io0_do;
+  wire flash_io0_do_buf;
+  wire flash_io0_do_core;
+  wire flash_io0_ieb;
+  wire flash_io0_ieb_buf;
+  wire flash_io0_ieb_core;
+  wire flash_io0_oeb;
+  wire flash_io0_oeb_buf;
+  wire flash_io0_oeb_core;
+  output flash_io1;
+  wire flash_io1_di;
+  wire flash_io1_di_buf;
+  wire flash_io1_di_core;
+  wire flash_io1_do;
+  wire flash_io1_do_buf;
+  wire flash_io1_do_core;
+  wire flash_io1_ieb;
+  wire flash_io1_ieb_buf;
+  wire flash_io1_ieb_core;
+  wire flash_io1_oeb;
+  wire flash_io1_oeb_buf;
+  wire flash_io1_oeb_core;
+  wire flash_io2_di_core;
+  wire flash_io2_do_core;
+  wire flash_io2_ieb_core;
+  wire flash_io2_oeb_core;
+  wire flash_io3_di_core;
+  wire flash_io3_do_core;
+  wire flash_io3_ieb_core;
+  wire flash_io3_oeb_core;
+  inout gpio;
+  wire \gpio_clock_1[0] ;
+  wire \gpio_clock_1[10] ;
+  wire \gpio_clock_1[11] ;
+  wire \gpio_clock_1[12] ;
+  wire \gpio_clock_1[13] ;
+  wire \gpio_clock_1[14] ;
+  wire \gpio_clock_1[15] ;
+  wire \gpio_clock_1[16] ;
+  wire \gpio_clock_1[17] ;
+  wire \gpio_clock_1[18] ;
+  wire \gpio_clock_1[1] ;
+  wire \gpio_clock_1[2] ;
+  wire \gpio_clock_1[3] ;
+  wire \gpio_clock_1[4] ;
+  wire \gpio_clock_1[5] ;
+  wire \gpio_clock_1[6] ;
+  wire \gpio_clock_1[7] ;
+  wire \gpio_clock_1[8] ;
+  wire \gpio_clock_1[9] ;
+  wire \gpio_clock_1_shifted[0] ;
+  wire \gpio_clock_1_shifted[10] ;
+  wire \gpio_clock_1_shifted[11] ;
+  wire \gpio_clock_1_shifted[12] ;
+  wire \gpio_clock_1_shifted[13] ;
+  wire \gpio_clock_1_shifted[14] ;
+  wire \gpio_clock_1_shifted[15] ;
+  wire \gpio_clock_1_shifted[16] ;
+  wire \gpio_clock_1_shifted[17] ;
+  wire \gpio_clock_1_shifted[18] ;
+  wire \gpio_clock_1_shifted[1] ;
+  wire \gpio_clock_1_shifted[2] ;
+  wire \gpio_clock_1_shifted[3] ;
+  wire \gpio_clock_1_shifted[4] ;
+  wire \gpio_clock_1_shifted[5] ;
+  wire \gpio_clock_1_shifted[6] ;
+  wire \gpio_clock_1_shifted[7] ;
+  wire \gpio_clock_1_shifted[8] ;
+  wire \gpio_clock_1_shifted[9] ;
+  wire \gpio_clock_2[0] ;
+  wire \gpio_clock_2[10] ;
+  wire \gpio_clock_2[11] ;
+  wire \gpio_clock_2[12] ;
+  wire \gpio_clock_2[13] ;
+  wire \gpio_clock_2[14] ;
+  wire \gpio_clock_2[15] ;
+  wire \gpio_clock_2[16] ;
+  wire \gpio_clock_2[17] ;
+  wire \gpio_clock_2[18] ;
+  wire \gpio_clock_2[1] ;
+  wire \gpio_clock_2[2] ;
+  wire \gpio_clock_2[3] ;
+  wire \gpio_clock_2[4] ;
+  wire \gpio_clock_2[5] ;
+  wire \gpio_clock_2[6] ;
+  wire \gpio_clock_2[7] ;
+  wire \gpio_clock_2[8] ;
+  wire \gpio_clock_2[9] ;
+  wire \gpio_clock_2_shifted[0] ;
+  wire \gpio_clock_2_shifted[10] ;
+  wire \gpio_clock_2_shifted[11] ;
+  wire \gpio_clock_2_shifted[12] ;
+  wire \gpio_clock_2_shifted[13] ;
+  wire \gpio_clock_2_shifted[14] ;
+  wire \gpio_clock_2_shifted[15] ;
+  wire \gpio_clock_2_shifted[16] ;
+  wire \gpio_clock_2_shifted[17] ;
+  wire \gpio_clock_2_shifted[18] ;
+  wire \gpio_clock_2_shifted[1] ;
+  wire \gpio_clock_2_shifted[2] ;
+  wire \gpio_clock_2_shifted[3] ;
+  wire \gpio_clock_2_shifted[4] ;
+  wire \gpio_clock_2_shifted[5] ;
+  wire \gpio_clock_2_shifted[6] ;
+  wire \gpio_clock_2_shifted[7] ;
+  wire \gpio_clock_2_shifted[8] ;
+  wire \gpio_clock_2_shifted[9] ;
+  wire \gpio_defaults[0] ;
+  wire \gpio_defaults[100] ;
+  wire \gpio_defaults[101] ;
+  wire \gpio_defaults[102] ;
+  wire \gpio_defaults[103] ;
+  wire \gpio_defaults[104] ;
+  wire \gpio_defaults[105] ;
+  wire \gpio_defaults[106] ;
+  wire \gpio_defaults[107] ;
+  wire \gpio_defaults[108] ;
+  wire \gpio_defaults[109] ;
+  wire \gpio_defaults[10] ;
+  wire \gpio_defaults[110] ;
+  wire \gpio_defaults[111] ;
+  wire \gpio_defaults[112] ;
+  wire \gpio_defaults[113] ;
+  wire \gpio_defaults[114] ;
+  wire \gpio_defaults[115] ;
+  wire \gpio_defaults[116] ;
+  wire \gpio_defaults[117] ;
+  wire \gpio_defaults[118] ;
+  wire \gpio_defaults[119] ;
+  wire \gpio_defaults[11] ;
+  wire \gpio_defaults[120] ;
+  wire \gpio_defaults[121] ;
+  wire \gpio_defaults[122] ;
+  wire \gpio_defaults[123] ;
+  wire \gpio_defaults[124] ;
+  wire \gpio_defaults[125] ;
+  wire \gpio_defaults[126] ;
+  wire \gpio_defaults[127] ;
+  wire \gpio_defaults[128] ;
+  wire \gpio_defaults[129] ;
+  wire \gpio_defaults[12] ;
+  wire \gpio_defaults[130] ;
+  wire \gpio_defaults[131] ;
+  wire \gpio_defaults[132] ;
+  wire \gpio_defaults[133] ;
+  wire \gpio_defaults[134] ;
+  wire \gpio_defaults[135] ;
+  wire \gpio_defaults[136] ;
+  wire \gpio_defaults[137] ;
+  wire \gpio_defaults[138] ;
+  wire \gpio_defaults[139] ;
+  wire \gpio_defaults[13] ;
+  wire \gpio_defaults[140] ;
+  wire \gpio_defaults[141] ;
+  wire \gpio_defaults[142] ;
+  wire \gpio_defaults[143] ;
+  wire \gpio_defaults[144] ;
+  wire \gpio_defaults[145] ;
+  wire \gpio_defaults[146] ;
+  wire \gpio_defaults[147] ;
+  wire \gpio_defaults[148] ;
+  wire \gpio_defaults[149] ;
+  wire \gpio_defaults[14] ;
+  wire \gpio_defaults[150] ;
+  wire \gpio_defaults[151] ;
+  wire \gpio_defaults[152] ;
+  wire \gpio_defaults[153] ;
+  wire \gpio_defaults[154] ;
+  wire \gpio_defaults[155] ;
+  wire \gpio_defaults[156] ;
+  wire \gpio_defaults[157] ;
+  wire \gpio_defaults[158] ;
+  wire \gpio_defaults[159] ;
+  wire \gpio_defaults[15] ;
+  wire \gpio_defaults[160] ;
+  wire \gpio_defaults[161] ;
+  wire \gpio_defaults[162] ;
+  wire \gpio_defaults[163] ;
+  wire \gpio_defaults[164] ;
+  wire \gpio_defaults[165] ;
+  wire \gpio_defaults[166] ;
+  wire \gpio_defaults[167] ;
+  wire \gpio_defaults[168] ;
+  wire \gpio_defaults[169] ;
+  wire \gpio_defaults[16] ;
+  wire \gpio_defaults[170] ;
+  wire \gpio_defaults[171] ;
+  wire \gpio_defaults[172] ;
+  wire \gpio_defaults[173] ;
+  wire \gpio_defaults[174] ;
+  wire \gpio_defaults[175] ;
+  wire \gpio_defaults[176] ;
+  wire \gpio_defaults[177] ;
+  wire \gpio_defaults[178] ;
+  wire \gpio_defaults[179] ;
+  wire \gpio_defaults[17] ;
+  wire \gpio_defaults[180] ;
+  wire \gpio_defaults[181] ;
+  wire \gpio_defaults[182] ;
+  wire \gpio_defaults[183] ;
+  wire \gpio_defaults[184] ;
+  wire \gpio_defaults[185] ;
+  wire \gpio_defaults[186] ;
+  wire \gpio_defaults[187] ;
+  wire \gpio_defaults[188] ;
+  wire \gpio_defaults[189] ;
+  wire \gpio_defaults[18] ;
+  wire \gpio_defaults[190] ;
+  wire \gpio_defaults[191] ;
+  wire \gpio_defaults[192] ;
+  wire \gpio_defaults[193] ;
+  wire \gpio_defaults[194] ;
+  wire \gpio_defaults[195] ;
+  wire \gpio_defaults[196] ;
+  wire \gpio_defaults[197] ;
+  wire \gpio_defaults[198] ;
+  wire \gpio_defaults[199] ;
+  wire \gpio_defaults[19] ;
+  wire \gpio_defaults[1] ;
+  wire \gpio_defaults[200] ;
+  wire \gpio_defaults[201] ;
+  wire \gpio_defaults[202] ;
+  wire \gpio_defaults[203] ;
+  wire \gpio_defaults[204] ;
+  wire \gpio_defaults[205] ;
+  wire \gpio_defaults[206] ;
+  wire \gpio_defaults[207] ;
+  wire \gpio_defaults[208] ;
+  wire \gpio_defaults[209] ;
+  wire \gpio_defaults[20] ;
+  wire \gpio_defaults[210] ;
+  wire \gpio_defaults[211] ;
+  wire \gpio_defaults[212] ;
+  wire \gpio_defaults[213] ;
+  wire \gpio_defaults[214] ;
+  wire \gpio_defaults[215] ;
+  wire \gpio_defaults[216] ;
+  wire \gpio_defaults[217] ;
+  wire \gpio_defaults[218] ;
+  wire \gpio_defaults[219] ;
+  wire \gpio_defaults[21] ;
+  wire \gpio_defaults[220] ;
+  wire \gpio_defaults[221] ;
+  wire \gpio_defaults[222] ;
+  wire \gpio_defaults[223] ;
+  wire \gpio_defaults[224] ;
+  wire \gpio_defaults[225] ;
+  wire \gpio_defaults[226] ;
+  wire \gpio_defaults[227] ;
+  wire \gpio_defaults[228] ;
+  wire \gpio_defaults[229] ;
+  wire \gpio_defaults[22] ;
+  wire \gpio_defaults[230] ;
+  wire \gpio_defaults[231] ;
+  wire \gpio_defaults[232] ;
+  wire \gpio_defaults[233] ;
+  wire \gpio_defaults[234] ;
+  wire \gpio_defaults[235] ;
+  wire \gpio_defaults[236] ;
+  wire \gpio_defaults[237] ;
+  wire \gpio_defaults[238] ;
+  wire \gpio_defaults[239] ;
+  wire \gpio_defaults[23] ;
+  wire \gpio_defaults[240] ;
+  wire \gpio_defaults[241] ;
+  wire \gpio_defaults[242] ;
+  wire \gpio_defaults[243] ;
+  wire \gpio_defaults[244] ;
+  wire \gpio_defaults[245] ;
+  wire \gpio_defaults[246] ;
+  wire \gpio_defaults[247] ;
+  wire \gpio_defaults[248] ;
+  wire \gpio_defaults[249] ;
+  wire \gpio_defaults[24] ;
+  wire \gpio_defaults[250] ;
+  wire \gpio_defaults[251] ;
+  wire \gpio_defaults[252] ;
+  wire \gpio_defaults[253] ;
+  wire \gpio_defaults[254] ;
+  wire \gpio_defaults[255] ;
+  wire \gpio_defaults[256] ;
+  wire \gpio_defaults[257] ;
+  wire \gpio_defaults[258] ;
+  wire \gpio_defaults[259] ;
+  wire \gpio_defaults[25] ;
+  wire \gpio_defaults[260] ;
+  wire \gpio_defaults[261] ;
+  wire \gpio_defaults[262] ;
+  wire \gpio_defaults[263] ;
+  wire \gpio_defaults[264] ;
+  wire \gpio_defaults[265] ;
+  wire \gpio_defaults[266] ;
+  wire \gpio_defaults[267] ;
+  wire \gpio_defaults[268] ;
+  wire \gpio_defaults[269] ;
+  wire \gpio_defaults[26] ;
+  wire \gpio_defaults[270] ;
+  wire \gpio_defaults[271] ;
+  wire \gpio_defaults[272] ;
+  wire \gpio_defaults[273] ;
+  wire \gpio_defaults[274] ;
+  wire \gpio_defaults[275] ;
+  wire \gpio_defaults[276] ;
+  wire \gpio_defaults[277] ;
+  wire \gpio_defaults[278] ;
+  wire \gpio_defaults[279] ;
+  wire \gpio_defaults[27] ;
+  wire \gpio_defaults[280] ;
+  wire \gpio_defaults[281] ;
+  wire \gpio_defaults[282] ;
+  wire \gpio_defaults[283] ;
+  wire \gpio_defaults[284] ;
+  wire \gpio_defaults[285] ;
+  wire \gpio_defaults[286] ;
+  wire \gpio_defaults[287] ;
+  wire \gpio_defaults[288] ;
+  wire \gpio_defaults[289] ;
+  wire \gpio_defaults[28] ;
+  wire \gpio_defaults[290] ;
+  wire \gpio_defaults[291] ;
+  wire \gpio_defaults[292] ;
+  wire \gpio_defaults[293] ;
+  wire \gpio_defaults[294] ;
+  wire \gpio_defaults[295] ;
+  wire \gpio_defaults[296] ;
+  wire \gpio_defaults[297] ;
+  wire \gpio_defaults[298] ;
+  wire \gpio_defaults[299] ;
+  wire \gpio_defaults[29] ;
+  wire \gpio_defaults[2] ;
+  wire \gpio_defaults[300] ;
+  wire \gpio_defaults[301] ;
+  wire \gpio_defaults[302] ;
+  wire \gpio_defaults[303] ;
+  wire \gpio_defaults[304] ;
+  wire \gpio_defaults[305] ;
+  wire \gpio_defaults[306] ;
+  wire \gpio_defaults[307] ;
+  wire \gpio_defaults[308] ;
+  wire \gpio_defaults[309] ;
+  wire \gpio_defaults[30] ;
+  wire \gpio_defaults[310] ;
+  wire \gpio_defaults[311] ;
+  wire \gpio_defaults[312] ;
+  wire \gpio_defaults[313] ;
+  wire \gpio_defaults[314] ;
+  wire \gpio_defaults[315] ;
+  wire \gpio_defaults[316] ;
+  wire \gpio_defaults[317] ;
+  wire \gpio_defaults[318] ;
+  wire \gpio_defaults[319] ;
+  wire \gpio_defaults[31] ;
+  wire \gpio_defaults[320] ;
+  wire \gpio_defaults[321] ;
+  wire \gpio_defaults[322] ;
+  wire \gpio_defaults[323] ;
+  wire \gpio_defaults[324] ;
+  wire \gpio_defaults[325] ;
+  wire \gpio_defaults[326] ;
+  wire \gpio_defaults[327] ;
+  wire \gpio_defaults[328] ;
+  wire \gpio_defaults[329] ;
+  wire \gpio_defaults[32] ;
+  wire \gpio_defaults[330] ;
+  wire \gpio_defaults[331] ;
+  wire \gpio_defaults[332] ;
+  wire \gpio_defaults[333] ;
+  wire \gpio_defaults[334] ;
+  wire \gpio_defaults[335] ;
+  wire \gpio_defaults[336] ;
+  wire \gpio_defaults[337] ;
+  wire \gpio_defaults[338] ;
+  wire \gpio_defaults[339] ;
+  wire \gpio_defaults[33] ;
+  wire \gpio_defaults[340] ;
+  wire \gpio_defaults[341] ;
+  wire \gpio_defaults[342] ;
+  wire \gpio_defaults[343] ;
+  wire \gpio_defaults[344] ;
+  wire \gpio_defaults[345] ;
+  wire \gpio_defaults[346] ;
+  wire \gpio_defaults[347] ;
+  wire \gpio_defaults[348] ;
+  wire \gpio_defaults[349] ;
+  wire \gpio_defaults[34] ;
+  wire \gpio_defaults[350] ;
+  wire \gpio_defaults[351] ;
+  wire \gpio_defaults[352] ;
+  wire \gpio_defaults[353] ;
+  wire \gpio_defaults[354] ;
+  wire \gpio_defaults[355] ;
+  wire \gpio_defaults[356] ;
+  wire \gpio_defaults[357] ;
+  wire \gpio_defaults[358] ;
+  wire \gpio_defaults[359] ;
+  wire \gpio_defaults[35] ;
+  wire \gpio_defaults[360] ;
+  wire \gpio_defaults[361] ;
+  wire \gpio_defaults[362] ;
+  wire \gpio_defaults[363] ;
+  wire \gpio_defaults[364] ;
+  wire \gpio_defaults[365] ;
+  wire \gpio_defaults[366] ;
+  wire \gpio_defaults[367] ;
+  wire \gpio_defaults[368] ;
+  wire \gpio_defaults[369] ;
+  wire \gpio_defaults[36] ;
+  wire \gpio_defaults[370] ;
+  wire \gpio_defaults[371] ;
+  wire \gpio_defaults[372] ;
+  wire \gpio_defaults[373] ;
+  wire \gpio_defaults[374] ;
+  wire \gpio_defaults[375] ;
+  wire \gpio_defaults[376] ;
+  wire \gpio_defaults[377] ;
+  wire \gpio_defaults[378] ;
+  wire \gpio_defaults[379] ;
+  wire \gpio_defaults[37] ;
+  wire \gpio_defaults[380] ;
+  wire \gpio_defaults[381] ;
+  wire \gpio_defaults[382] ;
+  wire \gpio_defaults[383] ;
+  wire \gpio_defaults[384] ;
+  wire \gpio_defaults[385] ;
+  wire \gpio_defaults[386] ;
+  wire \gpio_defaults[387] ;
+  wire \gpio_defaults[388] ;
+  wire \gpio_defaults[389] ;
+  wire \gpio_defaults[38] ;
+  wire \gpio_defaults[390] ;
+  wire \gpio_defaults[391] ;
+  wire \gpio_defaults[392] ;
+  wire \gpio_defaults[393] ;
+  wire \gpio_defaults[394] ;
+  wire \gpio_defaults[395] ;
+  wire \gpio_defaults[396] ;
+  wire \gpio_defaults[397] ;
+  wire \gpio_defaults[398] ;
+  wire \gpio_defaults[399] ;
+  wire \gpio_defaults[39] ;
+  wire \gpio_defaults[3] ;
+  wire \gpio_defaults[400] ;
+  wire \gpio_defaults[401] ;
+  wire \gpio_defaults[402] ;
+  wire \gpio_defaults[403] ;
+  wire \gpio_defaults[404] ;
+  wire \gpio_defaults[405] ;
+  wire \gpio_defaults[406] ;
+  wire \gpio_defaults[407] ;
+  wire \gpio_defaults[408] ;
+  wire \gpio_defaults[409] ;
+  wire \gpio_defaults[40] ;
+  wire \gpio_defaults[410] ;
+  wire \gpio_defaults[411] ;
+  wire \gpio_defaults[412] ;
+  wire \gpio_defaults[413] ;
+  wire \gpio_defaults[414] ;
+  wire \gpio_defaults[415] ;
+  wire \gpio_defaults[416] ;
+  wire \gpio_defaults[417] ;
+  wire \gpio_defaults[418] ;
+  wire \gpio_defaults[419] ;
+  wire \gpio_defaults[41] ;
+  wire \gpio_defaults[420] ;
+  wire \gpio_defaults[421] ;
+  wire \gpio_defaults[422] ;
+  wire \gpio_defaults[423] ;
+  wire \gpio_defaults[424] ;
+  wire \gpio_defaults[425] ;
+  wire \gpio_defaults[426] ;
+  wire \gpio_defaults[427] ;
+  wire \gpio_defaults[428] ;
+  wire \gpio_defaults[429] ;
+  wire \gpio_defaults[42] ;
+  wire \gpio_defaults[430] ;
+  wire \gpio_defaults[431] ;
+  wire \gpio_defaults[432] ;
+  wire \gpio_defaults[433] ;
+  wire \gpio_defaults[434] ;
+  wire \gpio_defaults[435] ;
+  wire \gpio_defaults[436] ;
+  wire \gpio_defaults[437] ;
+  wire \gpio_defaults[438] ;
+  wire \gpio_defaults[439] ;
+  wire \gpio_defaults[43] ;
+  wire \gpio_defaults[440] ;
+  wire \gpio_defaults[441] ;
+  wire \gpio_defaults[442] ;
+  wire \gpio_defaults[443] ;
+  wire \gpio_defaults[444] ;
+  wire \gpio_defaults[445] ;
+  wire \gpio_defaults[446] ;
+  wire \gpio_defaults[447] ;
+  wire \gpio_defaults[448] ;
+  wire \gpio_defaults[449] ;
+  wire \gpio_defaults[44] ;
+  wire \gpio_defaults[450] ;
+  wire \gpio_defaults[451] ;
+  wire \gpio_defaults[452] ;
+  wire \gpio_defaults[453] ;
+  wire \gpio_defaults[454] ;
+  wire \gpio_defaults[455] ;
+  wire \gpio_defaults[456] ;
+  wire \gpio_defaults[457] ;
+  wire \gpio_defaults[458] ;
+  wire \gpio_defaults[459] ;
+  wire \gpio_defaults[45] ;
+  wire \gpio_defaults[460] ;
+  wire \gpio_defaults[461] ;
+  wire \gpio_defaults[462] ;
+  wire \gpio_defaults[463] ;
+  wire \gpio_defaults[464] ;
+  wire \gpio_defaults[465] ;
+  wire \gpio_defaults[466] ;
+  wire \gpio_defaults[467] ;
+  wire \gpio_defaults[468] ;
+  wire \gpio_defaults[469] ;
+  wire \gpio_defaults[46] ;
+  wire \gpio_defaults[470] ;
+  wire \gpio_defaults[471] ;
+  wire \gpio_defaults[472] ;
+  wire \gpio_defaults[473] ;
+  wire \gpio_defaults[474] ;
+  wire \gpio_defaults[475] ;
+  wire \gpio_defaults[476] ;
+  wire \gpio_defaults[477] ;
+  wire \gpio_defaults[478] ;
+  wire \gpio_defaults[479] ;
+  wire \gpio_defaults[47] ;
+  wire \gpio_defaults[480] ;
+  wire \gpio_defaults[481] ;
+  wire \gpio_defaults[482] ;
+  wire \gpio_defaults[483] ;
+  wire \gpio_defaults[484] ;
+  wire \gpio_defaults[485] ;
+  wire \gpio_defaults[486] ;
+  wire \gpio_defaults[487] ;
+  wire \gpio_defaults[488] ;
+  wire \gpio_defaults[489] ;
+  wire \gpio_defaults[48] ;
+  wire \gpio_defaults[490] ;
+  wire \gpio_defaults[491] ;
+  wire \gpio_defaults[492] ;
+  wire \gpio_defaults[493] ;
+  wire \gpio_defaults[49] ;
+  wire \gpio_defaults[4] ;
+  wire \gpio_defaults[50] ;
+  wire \gpio_defaults[51] ;
+  wire \gpio_defaults[52] ;
+  wire \gpio_defaults[53] ;
+  wire \gpio_defaults[54] ;
+  wire \gpio_defaults[55] ;
+  wire \gpio_defaults[56] ;
+  wire \gpio_defaults[57] ;
+  wire \gpio_defaults[58] ;
+  wire \gpio_defaults[59] ;
+  wire \gpio_defaults[5] ;
+  wire \gpio_defaults[60] ;
+  wire \gpio_defaults[61] ;
+  wire \gpio_defaults[62] ;
+  wire \gpio_defaults[63] ;
+  wire \gpio_defaults[64] ;
+  wire \gpio_defaults[65] ;
+  wire \gpio_defaults[66] ;
+  wire \gpio_defaults[67] ;
+  wire \gpio_defaults[68] ;
+  wire \gpio_defaults[69] ;
+  wire \gpio_defaults[6] ;
+  wire \gpio_defaults[70] ;
+  wire \gpio_defaults[71] ;
+  wire \gpio_defaults[72] ;
+  wire \gpio_defaults[73] ;
+  wire \gpio_defaults[74] ;
+  wire \gpio_defaults[75] ;
+  wire \gpio_defaults[76] ;
+  wire \gpio_defaults[77] ;
+  wire \gpio_defaults[78] ;
+  wire \gpio_defaults[79] ;
+  wire \gpio_defaults[7] ;
+  wire \gpio_defaults[80] ;
+  wire \gpio_defaults[81] ;
+  wire \gpio_defaults[82] ;
+  wire \gpio_defaults[83] ;
+  wire \gpio_defaults[84] ;
+  wire \gpio_defaults[85] ;
+  wire \gpio_defaults[86] ;
+  wire \gpio_defaults[87] ;
+  wire \gpio_defaults[88] ;
+  wire \gpio_defaults[89] ;
+  wire \gpio_defaults[8] ;
+  wire \gpio_defaults[90] ;
+  wire \gpio_defaults[91] ;
+  wire \gpio_defaults[92] ;
+  wire \gpio_defaults[93] ;
+  wire \gpio_defaults[94] ;
+  wire \gpio_defaults[95] ;
+  wire \gpio_defaults[96] ;
+  wire \gpio_defaults[97] ;
+  wire \gpio_defaults[98] ;
+  wire \gpio_defaults[99] ;
+  wire \gpio_defaults[9] ;
+  wire gpio_in_core;
+  wire gpio_inenb_core;
+  wire \gpio_load_1[0] ;
+  wire \gpio_load_1[10] ;
+  wire \gpio_load_1[11] ;
+  wire \gpio_load_1[12] ;
+  wire \gpio_load_1[13] ;
+  wire \gpio_load_1[14] ;
+  wire \gpio_load_1[15] ;
+  wire \gpio_load_1[16] ;
+  wire \gpio_load_1[17] ;
+  wire \gpio_load_1[18] ;
+  wire \gpio_load_1[1] ;
+  wire \gpio_load_1[2] ;
+  wire \gpio_load_1[3] ;
+  wire \gpio_load_1[4] ;
+  wire \gpio_load_1[5] ;
+  wire \gpio_load_1[6] ;
+  wire \gpio_load_1[7] ;
+  wire \gpio_load_1[8] ;
+  wire \gpio_load_1[9] ;
+  wire \gpio_load_1_shifted[0] ;
+  wire \gpio_load_1_shifted[10] ;
+  wire \gpio_load_1_shifted[11] ;
+  wire \gpio_load_1_shifted[12] ;
+  wire \gpio_load_1_shifted[13] ;
+  wire \gpio_load_1_shifted[14] ;
+  wire \gpio_load_1_shifted[15] ;
+  wire \gpio_load_1_shifted[16] ;
+  wire \gpio_load_1_shifted[17] ;
+  wire \gpio_load_1_shifted[18] ;
+  wire \gpio_load_1_shifted[1] ;
+  wire \gpio_load_1_shifted[2] ;
+  wire \gpio_load_1_shifted[3] ;
+  wire \gpio_load_1_shifted[4] ;
+  wire \gpio_load_1_shifted[5] ;
+  wire \gpio_load_1_shifted[6] ;
+  wire \gpio_load_1_shifted[7] ;
+  wire \gpio_load_1_shifted[8] ;
+  wire \gpio_load_1_shifted[9] ;
+  wire \gpio_load_2[0] ;
+  wire \gpio_load_2[10] ;
+  wire \gpio_load_2[11] ;
+  wire \gpio_load_2[12] ;
+  wire \gpio_load_2[13] ;
+  wire \gpio_load_2[14] ;
+  wire \gpio_load_2[15] ;
+  wire \gpio_load_2[16] ;
+  wire \gpio_load_2[17] ;
+  wire \gpio_load_2[18] ;
+  wire \gpio_load_2[1] ;
+  wire \gpio_load_2[2] ;
+  wire \gpio_load_2[3] ;
+  wire \gpio_load_2[4] ;
+  wire \gpio_load_2[5] ;
+  wire \gpio_load_2[6] ;
+  wire \gpio_load_2[7] ;
+  wire \gpio_load_2[8] ;
+  wire \gpio_load_2[9] ;
+  wire \gpio_load_2_shifted[0] ;
+  wire \gpio_load_2_shifted[10] ;
+  wire \gpio_load_2_shifted[11] ;
+  wire \gpio_load_2_shifted[12] ;
+  wire \gpio_load_2_shifted[13] ;
+  wire \gpio_load_2_shifted[14] ;
+  wire \gpio_load_2_shifted[15] ;
+  wire \gpio_load_2_shifted[16] ;
+  wire \gpio_load_2_shifted[17] ;
+  wire \gpio_load_2_shifted[18] ;
+  wire \gpio_load_2_shifted[1] ;
+  wire \gpio_load_2_shifted[2] ;
+  wire \gpio_load_2_shifted[3] ;
+  wire \gpio_load_2_shifted[4] ;
+  wire \gpio_load_2_shifted[5] ;
+  wire \gpio_load_2_shifted[6] ;
+  wire \gpio_load_2_shifted[7] ;
+  wire \gpio_load_2_shifted[8] ;
+  wire \gpio_load_2_shifted[9] ;
+  wire gpio_mode0_core;
+  wire gpio_mode1_core;
+  wire gpio_out_core;
+  wire gpio_outenb_core;
+  wire \gpio_resetn_1[0] ;
+  wire \gpio_resetn_1[10] ;
+  wire \gpio_resetn_1[11] ;
+  wire \gpio_resetn_1[12] ;
+  wire \gpio_resetn_1[13] ;
+  wire \gpio_resetn_1[14] ;
+  wire \gpio_resetn_1[15] ;
+  wire \gpio_resetn_1[16] ;
+  wire \gpio_resetn_1[17] ;
+  wire \gpio_resetn_1[18] ;
+  wire \gpio_resetn_1[1] ;
+  wire \gpio_resetn_1[2] ;
+  wire \gpio_resetn_1[3] ;
+  wire \gpio_resetn_1[4] ;
+  wire \gpio_resetn_1[5] ;
+  wire \gpio_resetn_1[6] ;
+  wire \gpio_resetn_1[7] ;
+  wire \gpio_resetn_1[8] ;
+  wire \gpio_resetn_1[9] ;
+  wire \gpio_resetn_1_shifted[0] ;
+  wire \gpio_resetn_1_shifted[10] ;
+  wire \gpio_resetn_1_shifted[11] ;
+  wire \gpio_resetn_1_shifted[12] ;
+  wire \gpio_resetn_1_shifted[13] ;
+  wire \gpio_resetn_1_shifted[14] ;
+  wire \gpio_resetn_1_shifted[15] ;
+  wire \gpio_resetn_1_shifted[16] ;
+  wire \gpio_resetn_1_shifted[17] ;
+  wire \gpio_resetn_1_shifted[18] ;
+  wire \gpio_resetn_1_shifted[1] ;
+  wire \gpio_resetn_1_shifted[2] ;
+  wire \gpio_resetn_1_shifted[3] ;
+  wire \gpio_resetn_1_shifted[4] ;
+  wire \gpio_resetn_1_shifted[5] ;
+  wire \gpio_resetn_1_shifted[6] ;
+  wire \gpio_resetn_1_shifted[7] ;
+  wire \gpio_resetn_1_shifted[8] ;
+  wire \gpio_resetn_1_shifted[9] ;
+  wire \gpio_resetn_2[0] ;
+  wire \gpio_resetn_2[10] ;
+  wire \gpio_resetn_2[11] ;
+  wire \gpio_resetn_2[12] ;
+  wire \gpio_resetn_2[13] ;
+  wire \gpio_resetn_2[14] ;
+  wire \gpio_resetn_2[15] ;
+  wire \gpio_resetn_2[16] ;
+  wire \gpio_resetn_2[17] ;
+  wire \gpio_resetn_2[18] ;
+  wire \gpio_resetn_2[1] ;
+  wire \gpio_resetn_2[2] ;
+  wire \gpio_resetn_2[3] ;
+  wire \gpio_resetn_2[4] ;
+  wire \gpio_resetn_2[5] ;
+  wire \gpio_resetn_2[6] ;
+  wire \gpio_resetn_2[7] ;
+  wire \gpio_resetn_2[8] ;
+  wire \gpio_resetn_2[9] ;
+  wire \gpio_resetn_2_shifted[0] ;
+  wire \gpio_resetn_2_shifted[10] ;
+  wire \gpio_resetn_2_shifted[11] ;
+  wire \gpio_resetn_2_shifted[12] ;
+  wire \gpio_resetn_2_shifted[13] ;
+  wire \gpio_resetn_2_shifted[14] ;
+  wire \gpio_resetn_2_shifted[15] ;
+  wire \gpio_resetn_2_shifted[16] ;
+  wire \gpio_resetn_2_shifted[17] ;
+  wire \gpio_resetn_2_shifted[18] ;
+  wire \gpio_resetn_2_shifted[1] ;
+  wire \gpio_resetn_2_shifted[2] ;
+  wire \gpio_resetn_2_shifted[3] ;
+  wire \gpio_resetn_2_shifted[4] ;
+  wire \gpio_resetn_2_shifted[5] ;
+  wire \gpio_resetn_2_shifted[6] ;
+  wire \gpio_resetn_2_shifted[7] ;
+  wire \gpio_resetn_2_shifted[8] ;
+  wire \gpio_resetn_2_shifted[9] ;
+  wire \gpio_serial_link_1[0] ;
+  wire \gpio_serial_link_1[10] ;
+  wire \gpio_serial_link_1[11] ;
+  wire \gpio_serial_link_1[12] ;
+  wire \gpio_serial_link_1[13] ;
+  wire \gpio_serial_link_1[14] ;
+  wire \gpio_serial_link_1[15] ;
+  wire \gpio_serial_link_1[16] ;
+  wire \gpio_serial_link_1[17] ;
+  wire \gpio_serial_link_1[18] ;
+  wire \gpio_serial_link_1[1] ;
+  wire \gpio_serial_link_1[2] ;
+  wire \gpio_serial_link_1[3] ;
+  wire \gpio_serial_link_1[4] ;
+  wire \gpio_serial_link_1[5] ;
+  wire \gpio_serial_link_1[6] ;
+  wire \gpio_serial_link_1[7] ;
+  wire \gpio_serial_link_1[8] ;
+  wire \gpio_serial_link_1[9] ;
+  wire \gpio_serial_link_1_shifted[0] ;
+  wire \gpio_serial_link_1_shifted[10] ;
+  wire \gpio_serial_link_1_shifted[11] ;
+  wire \gpio_serial_link_1_shifted[12] ;
+  wire \gpio_serial_link_1_shifted[13] ;
+  wire \gpio_serial_link_1_shifted[14] ;
+  wire \gpio_serial_link_1_shifted[15] ;
+  wire \gpio_serial_link_1_shifted[16] ;
+  wire \gpio_serial_link_1_shifted[17] ;
+  wire \gpio_serial_link_1_shifted[18] ;
+  wire \gpio_serial_link_1_shifted[1] ;
+  wire \gpio_serial_link_1_shifted[2] ;
+  wire \gpio_serial_link_1_shifted[3] ;
+  wire \gpio_serial_link_1_shifted[4] ;
+  wire \gpio_serial_link_1_shifted[5] ;
+  wire \gpio_serial_link_1_shifted[6] ;
+  wire \gpio_serial_link_1_shifted[7] ;
+  wire \gpio_serial_link_1_shifted[8] ;
+  wire \gpio_serial_link_1_shifted[9] ;
+  wire \gpio_serial_link_2[0] ;
+  wire \gpio_serial_link_2[10] ;
+  wire \gpio_serial_link_2[11] ;
+  wire \gpio_serial_link_2[12] ;
+  wire \gpio_serial_link_2[13] ;
+  wire \gpio_serial_link_2[14] ;
+  wire \gpio_serial_link_2[15] ;
+  wire \gpio_serial_link_2[16] ;
+  wire \gpio_serial_link_2[17] ;
+  wire \gpio_serial_link_2[18] ;
+  wire \gpio_serial_link_2[1] ;
+  wire \gpio_serial_link_2[2] ;
+  wire \gpio_serial_link_2[3] ;
+  wire \gpio_serial_link_2[4] ;
+  wire \gpio_serial_link_2[5] ;
+  wire \gpio_serial_link_2[6] ;
+  wire \gpio_serial_link_2[7] ;
+  wire \gpio_serial_link_2[8] ;
+  wire \gpio_serial_link_2[9] ;
+  wire \gpio_serial_link_2_shifted[0] ;
+  wire \gpio_serial_link_2_shifted[10] ;
+  wire \gpio_serial_link_2_shifted[11] ;
+  wire \gpio_serial_link_2_shifted[12] ;
+  wire \gpio_serial_link_2_shifted[13] ;
+  wire \gpio_serial_link_2_shifted[14] ;
+  wire \gpio_serial_link_2_shifted[15] ;
+  wire \gpio_serial_link_2_shifted[16] ;
+  wire \gpio_serial_link_2_shifted[17] ;
+  wire \gpio_serial_link_2_shifted[18] ;
+  wire \gpio_serial_link_2_shifted[1] ;
+  wire \gpio_serial_link_2_shifted[2] ;
+  wire \gpio_serial_link_2_shifted[3] ;
+  wire \gpio_serial_link_2_shifted[4] ;
+  wire \gpio_serial_link_2_shifted[5] ;
+  wire \gpio_serial_link_2_shifted[6] ;
+  wire \gpio_serial_link_2_shifted[7] ;
+  wire \gpio_serial_link_2_shifted[8] ;
+  wire \gpio_serial_link_2_shifted[9] ;
+  wire hk_ack_i;
+  wire hk_cyc_o;
+  wire \hk_dat_i[0] ;
+  wire \hk_dat_i[10] ;
+  wire \hk_dat_i[11] ;
+  wire \hk_dat_i[12] ;
+  wire \hk_dat_i[13] ;
+  wire \hk_dat_i[14] ;
+  wire \hk_dat_i[15] ;
+  wire \hk_dat_i[16] ;
+  wire \hk_dat_i[17] ;
+  wire \hk_dat_i[18] ;
+  wire \hk_dat_i[19] ;
+  wire \hk_dat_i[1] ;
+  wire \hk_dat_i[20] ;
+  wire \hk_dat_i[21] ;
+  wire \hk_dat_i[22] ;
+  wire \hk_dat_i[23] ;
+  wire \hk_dat_i[24] ;
+  wire \hk_dat_i[25] ;
+  wire \hk_dat_i[26] ;
+  wire \hk_dat_i[27] ;
+  wire \hk_dat_i[28] ;
+  wire \hk_dat_i[29] ;
+  wire \hk_dat_i[2] ;
+  wire \hk_dat_i[30] ;
+  wire \hk_dat_i[31] ;
+  wire \hk_dat_i[3] ;
+  wire \hk_dat_i[4] ;
+  wire \hk_dat_i[5] ;
+  wire \hk_dat_i[6] ;
+  wire \hk_dat_i[7] ;
+  wire \hk_dat_i[8] ;
+  wire \hk_dat_i[9] ;
+  wire hk_stb_o;
+  wire \irq_spi[0] ;
+  wire \irq_spi[1] ;
+  wire \irq_spi[2] ;
+  wire \la_data_in_mprj[0] ;
+  wire \la_data_in_mprj[100] ;
+  wire \la_data_in_mprj[101] ;
+  wire \la_data_in_mprj[102] ;
+  wire \la_data_in_mprj[103] ;
+  wire \la_data_in_mprj[104] ;
+  wire \la_data_in_mprj[105] ;
+  wire \la_data_in_mprj[106] ;
+  wire \la_data_in_mprj[107] ;
+  wire \la_data_in_mprj[108] ;
+  wire \la_data_in_mprj[109] ;
+  wire \la_data_in_mprj[10] ;
+  wire \la_data_in_mprj[110] ;
+  wire \la_data_in_mprj[111] ;
+  wire \la_data_in_mprj[112] ;
+  wire \la_data_in_mprj[113] ;
+  wire \la_data_in_mprj[114] ;
+  wire \la_data_in_mprj[115] ;
+  wire \la_data_in_mprj[116] ;
+  wire \la_data_in_mprj[117] ;
+  wire \la_data_in_mprj[118] ;
+  wire \la_data_in_mprj[119] ;
+  wire \la_data_in_mprj[11] ;
+  wire \la_data_in_mprj[120] ;
+  wire \la_data_in_mprj[121] ;
+  wire \la_data_in_mprj[122] ;
+  wire \la_data_in_mprj[123] ;
+  wire \la_data_in_mprj[124] ;
+  wire \la_data_in_mprj[125] ;
+  wire \la_data_in_mprj[126] ;
+  wire \la_data_in_mprj[127] ;
+  wire \la_data_in_mprj[12] ;
+  wire \la_data_in_mprj[13] ;
+  wire \la_data_in_mprj[14] ;
+  wire \la_data_in_mprj[15] ;
+  wire \la_data_in_mprj[16] ;
+  wire \la_data_in_mprj[17] ;
+  wire \la_data_in_mprj[18] ;
+  wire \la_data_in_mprj[19] ;
+  wire \la_data_in_mprj[1] ;
+  wire \la_data_in_mprj[20] ;
+  wire \la_data_in_mprj[21] ;
+  wire \la_data_in_mprj[22] ;
+  wire \la_data_in_mprj[23] ;
+  wire \la_data_in_mprj[24] ;
+  wire \la_data_in_mprj[25] ;
+  wire \la_data_in_mprj[26] ;
+  wire \la_data_in_mprj[27] ;
+  wire \la_data_in_mprj[28] ;
+  wire \la_data_in_mprj[29] ;
+  wire \la_data_in_mprj[2] ;
+  wire \la_data_in_mprj[30] ;
+  wire \la_data_in_mprj[31] ;
+  wire \la_data_in_mprj[32] ;
+  wire \la_data_in_mprj[33] ;
+  wire \la_data_in_mprj[34] ;
+  wire \la_data_in_mprj[35] ;
+  wire \la_data_in_mprj[36] ;
+  wire \la_data_in_mprj[37] ;
+  wire \la_data_in_mprj[38] ;
+  wire \la_data_in_mprj[39] ;
+  wire \la_data_in_mprj[3] ;
+  wire \la_data_in_mprj[40] ;
+  wire \la_data_in_mprj[41] ;
+  wire \la_data_in_mprj[42] ;
+  wire \la_data_in_mprj[43] ;
+  wire \la_data_in_mprj[44] ;
+  wire \la_data_in_mprj[45] ;
+  wire \la_data_in_mprj[46] ;
+  wire \la_data_in_mprj[47] ;
+  wire \la_data_in_mprj[48] ;
+  wire \la_data_in_mprj[49] ;
+  wire \la_data_in_mprj[4] ;
+  wire \la_data_in_mprj[50] ;
+  wire \la_data_in_mprj[51] ;
+  wire \la_data_in_mprj[52] ;
+  wire \la_data_in_mprj[53] ;
+  wire \la_data_in_mprj[54] ;
+  wire \la_data_in_mprj[55] ;
+  wire \la_data_in_mprj[56] ;
+  wire \la_data_in_mprj[57] ;
+  wire \la_data_in_mprj[58] ;
+  wire \la_data_in_mprj[59] ;
+  wire \la_data_in_mprj[5] ;
+  wire \la_data_in_mprj[60] ;
+  wire \la_data_in_mprj[61] ;
+  wire \la_data_in_mprj[62] ;
+  wire \la_data_in_mprj[63] ;
+  wire \la_data_in_mprj[64] ;
+  wire \la_data_in_mprj[65] ;
+  wire \la_data_in_mprj[66] ;
+  wire \la_data_in_mprj[67] ;
+  wire \la_data_in_mprj[68] ;
+  wire \la_data_in_mprj[69] ;
+  wire \la_data_in_mprj[6] ;
+  wire \la_data_in_mprj[70] ;
+  wire \la_data_in_mprj[71] ;
+  wire \la_data_in_mprj[72] ;
+  wire \la_data_in_mprj[73] ;
+  wire \la_data_in_mprj[74] ;
+  wire \la_data_in_mprj[75] ;
+  wire \la_data_in_mprj[76] ;
+  wire \la_data_in_mprj[77] ;
+  wire \la_data_in_mprj[78] ;
+  wire \la_data_in_mprj[79] ;
+  wire \la_data_in_mprj[7] ;
+  wire \la_data_in_mprj[80] ;
+  wire \la_data_in_mprj[81] ;
+  wire \la_data_in_mprj[82] ;
+  wire \la_data_in_mprj[83] ;
+  wire \la_data_in_mprj[84] ;
+  wire \la_data_in_mprj[85] ;
+  wire \la_data_in_mprj[86] ;
+  wire \la_data_in_mprj[87] ;
+  wire \la_data_in_mprj[88] ;
+  wire \la_data_in_mprj[89] ;
+  wire \la_data_in_mprj[8] ;
+  wire \la_data_in_mprj[90] ;
+  wire \la_data_in_mprj[91] ;
+  wire \la_data_in_mprj[92] ;
+  wire \la_data_in_mprj[93] ;
+  wire \la_data_in_mprj[94] ;
+  wire \la_data_in_mprj[95] ;
+  wire \la_data_in_mprj[96] ;
+  wire \la_data_in_mprj[97] ;
+  wire \la_data_in_mprj[98] ;
+  wire \la_data_in_mprj[99] ;
+  wire \la_data_in_mprj[9] ;
+  wire \la_data_in_user[0] ;
+  wire \la_data_in_user[100] ;
+  wire \la_data_in_user[101] ;
+  wire \la_data_in_user[102] ;
+  wire \la_data_in_user[103] ;
+  wire \la_data_in_user[104] ;
+  wire \la_data_in_user[105] ;
+  wire \la_data_in_user[106] ;
+  wire \la_data_in_user[107] ;
+  wire \la_data_in_user[108] ;
+  wire \la_data_in_user[109] ;
+  wire \la_data_in_user[10] ;
+  wire \la_data_in_user[110] ;
+  wire \la_data_in_user[111] ;
+  wire \la_data_in_user[112] ;
+  wire \la_data_in_user[113] ;
+  wire \la_data_in_user[114] ;
+  wire \la_data_in_user[115] ;
+  wire \la_data_in_user[116] ;
+  wire \la_data_in_user[117] ;
+  wire \la_data_in_user[118] ;
+  wire \la_data_in_user[119] ;
+  wire \la_data_in_user[11] ;
+  wire \la_data_in_user[120] ;
+  wire \la_data_in_user[121] ;
+  wire \la_data_in_user[122] ;
+  wire \la_data_in_user[123] ;
+  wire \la_data_in_user[124] ;
+  wire \la_data_in_user[125] ;
+  wire \la_data_in_user[126] ;
+  wire \la_data_in_user[127] ;
+  wire \la_data_in_user[12] ;
+  wire \la_data_in_user[13] ;
+  wire \la_data_in_user[14] ;
+  wire \la_data_in_user[15] ;
+  wire \la_data_in_user[16] ;
+  wire \la_data_in_user[17] ;
+  wire \la_data_in_user[18] ;
+  wire \la_data_in_user[19] ;
+  wire \la_data_in_user[1] ;
+  wire \la_data_in_user[20] ;
+  wire \la_data_in_user[21] ;
+  wire \la_data_in_user[22] ;
+  wire \la_data_in_user[23] ;
+  wire \la_data_in_user[24] ;
+  wire \la_data_in_user[25] ;
+  wire \la_data_in_user[26] ;
+  wire \la_data_in_user[27] ;
+  wire \la_data_in_user[28] ;
+  wire \la_data_in_user[29] ;
+  wire \la_data_in_user[2] ;
+  wire \la_data_in_user[30] ;
+  wire \la_data_in_user[31] ;
+  wire \la_data_in_user[32] ;
+  wire \la_data_in_user[33] ;
+  wire \la_data_in_user[34] ;
+  wire \la_data_in_user[35] ;
+  wire \la_data_in_user[36] ;
+  wire \la_data_in_user[37] ;
+  wire \la_data_in_user[38] ;
+  wire \la_data_in_user[39] ;
+  wire \la_data_in_user[3] ;
+  wire \la_data_in_user[40] ;
+  wire \la_data_in_user[41] ;
+  wire \la_data_in_user[42] ;
+  wire \la_data_in_user[43] ;
+  wire \la_data_in_user[44] ;
+  wire \la_data_in_user[45] ;
+  wire \la_data_in_user[46] ;
+  wire \la_data_in_user[47] ;
+  wire \la_data_in_user[48] ;
+  wire \la_data_in_user[49] ;
+  wire \la_data_in_user[4] ;
+  wire \la_data_in_user[50] ;
+  wire \la_data_in_user[51] ;
+  wire \la_data_in_user[52] ;
+  wire \la_data_in_user[53] ;
+  wire \la_data_in_user[54] ;
+  wire \la_data_in_user[55] ;
+  wire \la_data_in_user[56] ;
+  wire \la_data_in_user[57] ;
+  wire \la_data_in_user[58] ;
+  wire \la_data_in_user[59] ;
+  wire \la_data_in_user[5] ;
+  wire \la_data_in_user[60] ;
+  wire \la_data_in_user[61] ;
+  wire \la_data_in_user[62] ;
+  wire \la_data_in_user[63] ;
+  wire \la_data_in_user[64] ;
+  wire \la_data_in_user[65] ;
+  wire \la_data_in_user[66] ;
+  wire \la_data_in_user[67] ;
+  wire \la_data_in_user[68] ;
+  wire \la_data_in_user[69] ;
+  wire \la_data_in_user[6] ;
+  wire \la_data_in_user[70] ;
+  wire \la_data_in_user[71] ;
+  wire \la_data_in_user[72] ;
+  wire \la_data_in_user[73] ;
+  wire \la_data_in_user[74] ;
+  wire \la_data_in_user[75] ;
+  wire \la_data_in_user[76] ;
+  wire \la_data_in_user[77] ;
+  wire \la_data_in_user[78] ;
+  wire \la_data_in_user[79] ;
+  wire \la_data_in_user[7] ;
+  wire \la_data_in_user[80] ;
+  wire \la_data_in_user[81] ;
+  wire \la_data_in_user[82] ;
+  wire \la_data_in_user[83] ;
+  wire \la_data_in_user[84] ;
+  wire \la_data_in_user[85] ;
+  wire \la_data_in_user[86] ;
+  wire \la_data_in_user[87] ;
+  wire \la_data_in_user[88] ;
+  wire \la_data_in_user[89] ;
+  wire \la_data_in_user[8] ;
+  wire \la_data_in_user[90] ;
+  wire \la_data_in_user[91] ;
+  wire \la_data_in_user[92] ;
+  wire \la_data_in_user[93] ;
+  wire \la_data_in_user[94] ;
+  wire \la_data_in_user[95] ;
+  wire \la_data_in_user[96] ;
+  wire \la_data_in_user[97] ;
+  wire \la_data_in_user[98] ;
+  wire \la_data_in_user[99] ;
+  wire \la_data_in_user[9] ;
+  wire \la_data_out_mprj[0] ;
+  wire \la_data_out_mprj[100] ;
+  wire \la_data_out_mprj[101] ;
+  wire \la_data_out_mprj[102] ;
+  wire \la_data_out_mprj[103] ;
+  wire \la_data_out_mprj[104] ;
+  wire \la_data_out_mprj[105] ;
+  wire \la_data_out_mprj[106] ;
+  wire \la_data_out_mprj[107] ;
+  wire \la_data_out_mprj[108] ;
+  wire \la_data_out_mprj[109] ;
+  wire \la_data_out_mprj[10] ;
+  wire \la_data_out_mprj[110] ;
+  wire \la_data_out_mprj[111] ;
+  wire \la_data_out_mprj[112] ;
+  wire \la_data_out_mprj[113] ;
+  wire \la_data_out_mprj[114] ;
+  wire \la_data_out_mprj[115] ;
+  wire \la_data_out_mprj[116] ;
+  wire \la_data_out_mprj[117] ;
+  wire \la_data_out_mprj[118] ;
+  wire \la_data_out_mprj[119] ;
+  wire \la_data_out_mprj[11] ;
+  wire \la_data_out_mprj[120] ;
+  wire \la_data_out_mprj[121] ;
+  wire \la_data_out_mprj[122] ;
+  wire \la_data_out_mprj[123] ;
+  wire \la_data_out_mprj[124] ;
+  wire \la_data_out_mprj[125] ;
+  wire \la_data_out_mprj[126] ;
+  wire \la_data_out_mprj[127] ;
+  wire \la_data_out_mprj[12] ;
+  wire \la_data_out_mprj[13] ;
+  wire \la_data_out_mprj[14] ;
+  wire \la_data_out_mprj[15] ;
+  wire \la_data_out_mprj[16] ;
+  wire \la_data_out_mprj[17] ;
+  wire \la_data_out_mprj[18] ;
+  wire \la_data_out_mprj[19] ;
+  wire \la_data_out_mprj[1] ;
+  wire \la_data_out_mprj[20] ;
+  wire \la_data_out_mprj[21] ;
+  wire \la_data_out_mprj[22] ;
+  wire \la_data_out_mprj[23] ;
+  wire \la_data_out_mprj[24] ;
+  wire \la_data_out_mprj[25] ;
+  wire \la_data_out_mprj[26] ;
+  wire \la_data_out_mprj[27] ;
+  wire \la_data_out_mprj[28] ;
+  wire \la_data_out_mprj[29] ;
+  wire \la_data_out_mprj[2] ;
+  wire \la_data_out_mprj[30] ;
+  wire \la_data_out_mprj[31] ;
+  wire \la_data_out_mprj[32] ;
+  wire \la_data_out_mprj[33] ;
+  wire \la_data_out_mprj[34] ;
+  wire \la_data_out_mprj[35] ;
+  wire \la_data_out_mprj[36] ;
+  wire \la_data_out_mprj[37] ;
+  wire \la_data_out_mprj[38] ;
+  wire \la_data_out_mprj[39] ;
+  wire \la_data_out_mprj[3] ;
+  wire \la_data_out_mprj[40] ;
+  wire \la_data_out_mprj[41] ;
+  wire \la_data_out_mprj[42] ;
+  wire \la_data_out_mprj[43] ;
+  wire \la_data_out_mprj[44] ;
+  wire \la_data_out_mprj[45] ;
+  wire \la_data_out_mprj[46] ;
+  wire \la_data_out_mprj[47] ;
+  wire \la_data_out_mprj[48] ;
+  wire \la_data_out_mprj[49] ;
+  wire \la_data_out_mprj[4] ;
+  wire \la_data_out_mprj[50] ;
+  wire \la_data_out_mprj[51] ;
+  wire \la_data_out_mprj[52] ;
+  wire \la_data_out_mprj[53] ;
+  wire \la_data_out_mprj[54] ;
+  wire \la_data_out_mprj[55] ;
+  wire \la_data_out_mprj[56] ;
+  wire \la_data_out_mprj[57] ;
+  wire \la_data_out_mprj[58] ;
+  wire \la_data_out_mprj[59] ;
+  wire \la_data_out_mprj[5] ;
+  wire \la_data_out_mprj[60] ;
+  wire \la_data_out_mprj[61] ;
+  wire \la_data_out_mprj[62] ;
+  wire \la_data_out_mprj[63] ;
+  wire \la_data_out_mprj[64] ;
+  wire \la_data_out_mprj[65] ;
+  wire \la_data_out_mprj[66] ;
+  wire \la_data_out_mprj[67] ;
+  wire \la_data_out_mprj[68] ;
+  wire \la_data_out_mprj[69] ;
+  wire \la_data_out_mprj[6] ;
+  wire \la_data_out_mprj[70] ;
+  wire \la_data_out_mprj[71] ;
+  wire \la_data_out_mprj[72] ;
+  wire \la_data_out_mprj[73] ;
+  wire \la_data_out_mprj[74] ;
+  wire \la_data_out_mprj[75] ;
+  wire \la_data_out_mprj[76] ;
+  wire \la_data_out_mprj[77] ;
+  wire \la_data_out_mprj[78] ;
+  wire \la_data_out_mprj[79] ;
+  wire \la_data_out_mprj[7] ;
+  wire \la_data_out_mprj[80] ;
+  wire \la_data_out_mprj[81] ;
+  wire \la_data_out_mprj[82] ;
+  wire \la_data_out_mprj[83] ;
+  wire \la_data_out_mprj[84] ;
+  wire \la_data_out_mprj[85] ;
+  wire \la_data_out_mprj[86] ;
+  wire \la_data_out_mprj[87] ;
+  wire \la_data_out_mprj[88] ;
+  wire \la_data_out_mprj[89] ;
+  wire \la_data_out_mprj[8] ;
+  wire \la_data_out_mprj[90] ;
+  wire \la_data_out_mprj[91] ;
+  wire \la_data_out_mprj[92] ;
+  wire \la_data_out_mprj[93] ;
+  wire \la_data_out_mprj[94] ;
+  wire \la_data_out_mprj[95] ;
+  wire \la_data_out_mprj[96] ;
+  wire \la_data_out_mprj[97] ;
+  wire \la_data_out_mprj[98] ;
+  wire \la_data_out_mprj[99] ;
+  wire \la_data_out_mprj[9] ;
+  wire \la_data_out_user[0] ;
+  wire \la_data_out_user[100] ;
+  wire \la_data_out_user[101] ;
+  wire \la_data_out_user[102] ;
+  wire \la_data_out_user[103] ;
+  wire \la_data_out_user[104] ;
+  wire \la_data_out_user[105] ;
+  wire \la_data_out_user[106] ;
+  wire \la_data_out_user[107] ;
+  wire \la_data_out_user[108] ;
+  wire \la_data_out_user[109] ;
+  wire \la_data_out_user[10] ;
+  wire \la_data_out_user[110] ;
+  wire \la_data_out_user[111] ;
+  wire \la_data_out_user[112] ;
+  wire \la_data_out_user[113] ;
+  wire \la_data_out_user[114] ;
+  wire \la_data_out_user[115] ;
+  wire \la_data_out_user[116] ;
+  wire \la_data_out_user[117] ;
+  wire \la_data_out_user[118] ;
+  wire \la_data_out_user[119] ;
+  wire \la_data_out_user[11] ;
+  wire \la_data_out_user[120] ;
+  wire \la_data_out_user[121] ;
+  wire \la_data_out_user[122] ;
+  wire \la_data_out_user[123] ;
+  wire \la_data_out_user[124] ;
+  wire \la_data_out_user[125] ;
+  wire \la_data_out_user[126] ;
+  wire \la_data_out_user[127] ;
+  wire \la_data_out_user[12] ;
+  wire \la_data_out_user[13] ;
+  wire \la_data_out_user[14] ;
+  wire \la_data_out_user[15] ;
+  wire \la_data_out_user[16] ;
+  wire \la_data_out_user[17] ;
+  wire \la_data_out_user[18] ;
+  wire \la_data_out_user[19] ;
+  wire \la_data_out_user[1] ;
+  wire \la_data_out_user[20] ;
+  wire \la_data_out_user[21] ;
+  wire \la_data_out_user[22] ;
+  wire \la_data_out_user[23] ;
+  wire \la_data_out_user[24] ;
+  wire \la_data_out_user[25] ;
+  wire \la_data_out_user[26] ;
+  wire \la_data_out_user[27] ;
+  wire \la_data_out_user[28] ;
+  wire \la_data_out_user[29] ;
+  wire \la_data_out_user[2] ;
+  wire \la_data_out_user[30] ;
+  wire \la_data_out_user[31] ;
+  wire \la_data_out_user[32] ;
+  wire \la_data_out_user[33] ;
+  wire \la_data_out_user[34] ;
+  wire \la_data_out_user[35] ;
+  wire \la_data_out_user[36] ;
+  wire \la_data_out_user[37] ;
+  wire \la_data_out_user[38] ;
+  wire \la_data_out_user[39] ;
+  wire \la_data_out_user[3] ;
+  wire \la_data_out_user[40] ;
+  wire \la_data_out_user[41] ;
+  wire \la_data_out_user[42] ;
+  wire \la_data_out_user[43] ;
+  wire \la_data_out_user[44] ;
+  wire \la_data_out_user[45] ;
+  wire \la_data_out_user[46] ;
+  wire \la_data_out_user[47] ;
+  wire \la_data_out_user[48] ;
+  wire \la_data_out_user[49] ;
+  wire \la_data_out_user[4] ;
+  wire \la_data_out_user[50] ;
+  wire \la_data_out_user[51] ;
+  wire \la_data_out_user[52] ;
+  wire \la_data_out_user[53] ;
+  wire \la_data_out_user[54] ;
+  wire \la_data_out_user[55] ;
+  wire \la_data_out_user[56] ;
+  wire \la_data_out_user[57] ;
+  wire \la_data_out_user[58] ;
+  wire \la_data_out_user[59] ;
+  wire \la_data_out_user[5] ;
+  wire \la_data_out_user[60] ;
+  wire \la_data_out_user[61] ;
+  wire \la_data_out_user[62] ;
+  wire \la_data_out_user[63] ;
+  wire \la_data_out_user[64] ;
+  wire \la_data_out_user[65] ;
+  wire \la_data_out_user[66] ;
+  wire \la_data_out_user[67] ;
+  wire \la_data_out_user[68] ;
+  wire \la_data_out_user[69] ;
+  wire \la_data_out_user[6] ;
+  wire \la_data_out_user[70] ;
+  wire \la_data_out_user[71] ;
+  wire \la_data_out_user[72] ;
+  wire \la_data_out_user[73] ;
+  wire \la_data_out_user[74] ;
+  wire \la_data_out_user[75] ;
+  wire \la_data_out_user[76] ;
+  wire \la_data_out_user[77] ;
+  wire \la_data_out_user[78] ;
+  wire \la_data_out_user[79] ;
+  wire \la_data_out_user[7] ;
+  wire \la_data_out_user[80] ;
+  wire \la_data_out_user[81] ;
+  wire \la_data_out_user[82] ;
+  wire \la_data_out_user[83] ;
+  wire \la_data_out_user[84] ;
+  wire \la_data_out_user[85] ;
+  wire \la_data_out_user[86] ;
+  wire \la_data_out_user[87] ;
+  wire \la_data_out_user[88] ;
+  wire \la_data_out_user[89] ;
+  wire \la_data_out_user[8] ;
+  wire \la_data_out_user[90] ;
+  wire \la_data_out_user[91] ;
+  wire \la_data_out_user[92] ;
+  wire \la_data_out_user[93] ;
+  wire \la_data_out_user[94] ;
+  wire \la_data_out_user[95] ;
+  wire \la_data_out_user[96] ;
+  wire \la_data_out_user[97] ;
+  wire \la_data_out_user[98] ;
+  wire \la_data_out_user[99] ;
+  wire \la_data_out_user[9] ;
+  wire \la_iena_mprj[0] ;
+  wire \la_iena_mprj[100] ;
+  wire \la_iena_mprj[101] ;
+  wire \la_iena_mprj[102] ;
+  wire \la_iena_mprj[103] ;
+  wire \la_iena_mprj[104] ;
+  wire \la_iena_mprj[105] ;
+  wire \la_iena_mprj[106] ;
+  wire \la_iena_mprj[107] ;
+  wire \la_iena_mprj[108] ;
+  wire \la_iena_mprj[109] ;
+  wire \la_iena_mprj[10] ;
+  wire \la_iena_mprj[110] ;
+  wire \la_iena_mprj[111] ;
+  wire \la_iena_mprj[112] ;
+  wire \la_iena_mprj[113] ;
+  wire \la_iena_mprj[114] ;
+  wire \la_iena_mprj[115] ;
+  wire \la_iena_mprj[116] ;
+  wire \la_iena_mprj[117] ;
+  wire \la_iena_mprj[118] ;
+  wire \la_iena_mprj[119] ;
+  wire \la_iena_mprj[11] ;
+  wire \la_iena_mprj[120] ;
+  wire \la_iena_mprj[121] ;
+  wire \la_iena_mprj[122] ;
+  wire \la_iena_mprj[123] ;
+  wire \la_iena_mprj[124] ;
+  wire \la_iena_mprj[125] ;
+  wire \la_iena_mprj[126] ;
+  wire \la_iena_mprj[127] ;
+  wire \la_iena_mprj[12] ;
+  wire \la_iena_mprj[13] ;
+  wire \la_iena_mprj[14] ;
+  wire \la_iena_mprj[15] ;
+  wire \la_iena_mprj[16] ;
+  wire \la_iena_mprj[17] ;
+  wire \la_iena_mprj[18] ;
+  wire \la_iena_mprj[19] ;
+  wire \la_iena_mprj[1] ;
+  wire \la_iena_mprj[20] ;
+  wire \la_iena_mprj[21] ;
+  wire \la_iena_mprj[22] ;
+  wire \la_iena_mprj[23] ;
+  wire \la_iena_mprj[24] ;
+  wire \la_iena_mprj[25] ;
+  wire \la_iena_mprj[26] ;
+  wire \la_iena_mprj[27] ;
+  wire \la_iena_mprj[28] ;
+  wire \la_iena_mprj[29] ;
+  wire \la_iena_mprj[2] ;
+  wire \la_iena_mprj[30] ;
+  wire \la_iena_mprj[31] ;
+  wire \la_iena_mprj[32] ;
+  wire \la_iena_mprj[33] ;
+  wire \la_iena_mprj[34] ;
+  wire \la_iena_mprj[35] ;
+  wire \la_iena_mprj[36] ;
+  wire \la_iena_mprj[37] ;
+  wire \la_iena_mprj[38] ;
+  wire \la_iena_mprj[39] ;
+  wire \la_iena_mprj[3] ;
+  wire \la_iena_mprj[40] ;
+  wire \la_iena_mprj[41] ;
+  wire \la_iena_mprj[42] ;
+  wire \la_iena_mprj[43] ;
+  wire \la_iena_mprj[44] ;
+  wire \la_iena_mprj[45] ;
+  wire \la_iena_mprj[46] ;
+  wire \la_iena_mprj[47] ;
+  wire \la_iena_mprj[48] ;
+  wire \la_iena_mprj[49] ;
+  wire \la_iena_mprj[4] ;
+  wire \la_iena_mprj[50] ;
+  wire \la_iena_mprj[51] ;
+  wire \la_iena_mprj[52] ;
+  wire \la_iena_mprj[53] ;
+  wire \la_iena_mprj[54] ;
+  wire \la_iena_mprj[55] ;
+  wire \la_iena_mprj[56] ;
+  wire \la_iena_mprj[57] ;
+  wire \la_iena_mprj[58] ;
+  wire \la_iena_mprj[59] ;
+  wire \la_iena_mprj[5] ;
+  wire \la_iena_mprj[60] ;
+  wire \la_iena_mprj[61] ;
+  wire \la_iena_mprj[62] ;
+  wire \la_iena_mprj[63] ;
+  wire \la_iena_mprj[64] ;
+  wire \la_iena_mprj[65] ;
+  wire \la_iena_mprj[66] ;
+  wire \la_iena_mprj[67] ;
+  wire \la_iena_mprj[68] ;
+  wire \la_iena_mprj[69] ;
+  wire \la_iena_mprj[6] ;
+  wire \la_iena_mprj[70] ;
+  wire \la_iena_mprj[71] ;
+  wire \la_iena_mprj[72] ;
+  wire \la_iena_mprj[73] ;
+  wire \la_iena_mprj[74] ;
+  wire \la_iena_mprj[75] ;
+  wire \la_iena_mprj[76] ;
+  wire \la_iena_mprj[77] ;
+  wire \la_iena_mprj[78] ;
+  wire \la_iena_mprj[79] ;
+  wire \la_iena_mprj[7] ;
+  wire \la_iena_mprj[80] ;
+  wire \la_iena_mprj[81] ;
+  wire \la_iena_mprj[82] ;
+  wire \la_iena_mprj[83] ;
+  wire \la_iena_mprj[84] ;
+  wire \la_iena_mprj[85] ;
+  wire \la_iena_mprj[86] ;
+  wire \la_iena_mprj[87] ;
+  wire \la_iena_mprj[88] ;
+  wire \la_iena_mprj[89] ;
+  wire \la_iena_mprj[8] ;
+  wire \la_iena_mprj[90] ;
+  wire \la_iena_mprj[91] ;
+  wire \la_iena_mprj[92] ;
+  wire \la_iena_mprj[93] ;
+  wire \la_iena_mprj[94] ;
+  wire \la_iena_mprj[95] ;
+  wire \la_iena_mprj[96] ;
+  wire \la_iena_mprj[97] ;
+  wire \la_iena_mprj[98] ;
+  wire \la_iena_mprj[99] ;
+  wire \la_iena_mprj[9] ;
+  wire \la_oenb_mprj[0] ;
+  wire \la_oenb_mprj[100] ;
+  wire \la_oenb_mprj[101] ;
+  wire \la_oenb_mprj[102] ;
+  wire \la_oenb_mprj[103] ;
+  wire \la_oenb_mprj[104] ;
+  wire \la_oenb_mprj[105] ;
+  wire \la_oenb_mprj[106] ;
+  wire \la_oenb_mprj[107] ;
+  wire \la_oenb_mprj[108] ;
+  wire \la_oenb_mprj[109] ;
+  wire \la_oenb_mprj[10] ;
+  wire \la_oenb_mprj[110] ;
+  wire \la_oenb_mprj[111] ;
+  wire \la_oenb_mprj[112] ;
+  wire \la_oenb_mprj[113] ;
+  wire \la_oenb_mprj[114] ;
+  wire \la_oenb_mprj[115] ;
+  wire \la_oenb_mprj[116] ;
+  wire \la_oenb_mprj[117] ;
+  wire \la_oenb_mprj[118] ;
+  wire \la_oenb_mprj[119] ;
+  wire \la_oenb_mprj[11] ;
+  wire \la_oenb_mprj[120] ;
+  wire \la_oenb_mprj[121] ;
+  wire \la_oenb_mprj[122] ;
+  wire \la_oenb_mprj[123] ;
+  wire \la_oenb_mprj[124] ;
+  wire \la_oenb_mprj[125] ;
+  wire \la_oenb_mprj[126] ;
+  wire \la_oenb_mprj[127] ;
+  wire \la_oenb_mprj[12] ;
+  wire \la_oenb_mprj[13] ;
+  wire \la_oenb_mprj[14] ;
+  wire \la_oenb_mprj[15] ;
+  wire \la_oenb_mprj[16] ;
+  wire \la_oenb_mprj[17] ;
+  wire \la_oenb_mprj[18] ;
+  wire \la_oenb_mprj[19] ;
+  wire \la_oenb_mprj[1] ;
+  wire \la_oenb_mprj[20] ;
+  wire \la_oenb_mprj[21] ;
+  wire \la_oenb_mprj[22] ;
+  wire \la_oenb_mprj[23] ;
+  wire \la_oenb_mprj[24] ;
+  wire \la_oenb_mprj[25] ;
+  wire \la_oenb_mprj[26] ;
+  wire \la_oenb_mprj[27] ;
+  wire \la_oenb_mprj[28] ;
+  wire \la_oenb_mprj[29] ;
+  wire \la_oenb_mprj[2] ;
+  wire \la_oenb_mprj[30] ;
+  wire \la_oenb_mprj[31] ;
+  wire \la_oenb_mprj[32] ;
+  wire \la_oenb_mprj[33] ;
+  wire \la_oenb_mprj[34] ;
+  wire \la_oenb_mprj[35] ;
+  wire \la_oenb_mprj[36] ;
+  wire \la_oenb_mprj[37] ;
+  wire \la_oenb_mprj[38] ;
+  wire \la_oenb_mprj[39] ;
+  wire \la_oenb_mprj[3] ;
+  wire \la_oenb_mprj[40] ;
+  wire \la_oenb_mprj[41] ;
+  wire \la_oenb_mprj[42] ;
+  wire \la_oenb_mprj[43] ;
+  wire \la_oenb_mprj[44] ;
+  wire \la_oenb_mprj[45] ;
+  wire \la_oenb_mprj[46] ;
+  wire \la_oenb_mprj[47] ;
+  wire \la_oenb_mprj[48] ;
+  wire \la_oenb_mprj[49] ;
+  wire \la_oenb_mprj[4] ;
+  wire \la_oenb_mprj[50] ;
+  wire \la_oenb_mprj[51] ;
+  wire \la_oenb_mprj[52] ;
+  wire \la_oenb_mprj[53] ;
+  wire \la_oenb_mprj[54] ;
+  wire \la_oenb_mprj[55] ;
+  wire \la_oenb_mprj[56] ;
+  wire \la_oenb_mprj[57] ;
+  wire \la_oenb_mprj[58] ;
+  wire \la_oenb_mprj[59] ;
+  wire \la_oenb_mprj[5] ;
+  wire \la_oenb_mprj[60] ;
+  wire \la_oenb_mprj[61] ;
+  wire \la_oenb_mprj[62] ;
+  wire \la_oenb_mprj[63] ;
+  wire \la_oenb_mprj[64] ;
+  wire \la_oenb_mprj[65] ;
+  wire \la_oenb_mprj[66] ;
+  wire \la_oenb_mprj[67] ;
+  wire \la_oenb_mprj[68] ;
+  wire \la_oenb_mprj[69] ;
+  wire \la_oenb_mprj[6] ;
+  wire \la_oenb_mprj[70] ;
+  wire \la_oenb_mprj[71] ;
+  wire \la_oenb_mprj[72] ;
+  wire \la_oenb_mprj[73] ;
+  wire \la_oenb_mprj[74] ;
+  wire \la_oenb_mprj[75] ;
+  wire \la_oenb_mprj[76] ;
+  wire \la_oenb_mprj[77] ;
+  wire \la_oenb_mprj[78] ;
+  wire \la_oenb_mprj[79] ;
+  wire \la_oenb_mprj[7] ;
+  wire \la_oenb_mprj[80] ;
+  wire \la_oenb_mprj[81] ;
+  wire \la_oenb_mprj[82] ;
+  wire \la_oenb_mprj[83] ;
+  wire \la_oenb_mprj[84] ;
+  wire \la_oenb_mprj[85] ;
+  wire \la_oenb_mprj[86] ;
+  wire \la_oenb_mprj[87] ;
+  wire \la_oenb_mprj[88] ;
+  wire \la_oenb_mprj[89] ;
+  wire \la_oenb_mprj[8] ;
+  wire \la_oenb_mprj[90] ;
+  wire \la_oenb_mprj[91] ;
+  wire \la_oenb_mprj[92] ;
+  wire \la_oenb_mprj[93] ;
+  wire \la_oenb_mprj[94] ;
+  wire \la_oenb_mprj[95] ;
+  wire \la_oenb_mprj[96] ;
+  wire \la_oenb_mprj[97] ;
+  wire \la_oenb_mprj[98] ;
+  wire \la_oenb_mprj[99] ;
+  wire \la_oenb_mprj[9] ;
+  wire \la_oenb_user[0] ;
+  wire \la_oenb_user[100] ;
+  wire \la_oenb_user[101] ;
+  wire \la_oenb_user[102] ;
+  wire \la_oenb_user[103] ;
+  wire \la_oenb_user[104] ;
+  wire \la_oenb_user[105] ;
+  wire \la_oenb_user[106] ;
+  wire \la_oenb_user[107] ;
+  wire \la_oenb_user[108] ;
+  wire \la_oenb_user[109] ;
+  wire \la_oenb_user[10] ;
+  wire \la_oenb_user[110] ;
+  wire \la_oenb_user[111] ;
+  wire \la_oenb_user[112] ;
+  wire \la_oenb_user[113] ;
+  wire \la_oenb_user[114] ;
+  wire \la_oenb_user[115] ;
+  wire \la_oenb_user[116] ;
+  wire \la_oenb_user[117] ;
+  wire \la_oenb_user[118] ;
+  wire \la_oenb_user[119] ;
+  wire \la_oenb_user[11] ;
+  wire \la_oenb_user[120] ;
+  wire \la_oenb_user[121] ;
+  wire \la_oenb_user[122] ;
+  wire \la_oenb_user[123] ;
+  wire \la_oenb_user[124] ;
+  wire \la_oenb_user[125] ;
+  wire \la_oenb_user[126] ;
+  wire \la_oenb_user[127] ;
+  wire \la_oenb_user[12] ;
+  wire \la_oenb_user[13] ;
+  wire \la_oenb_user[14] ;
+  wire \la_oenb_user[15] ;
+  wire \la_oenb_user[16] ;
+  wire \la_oenb_user[17] ;
+  wire \la_oenb_user[18] ;
+  wire \la_oenb_user[19] ;
+  wire \la_oenb_user[1] ;
+  wire \la_oenb_user[20] ;
+  wire \la_oenb_user[21] ;
+  wire \la_oenb_user[22] ;
+  wire \la_oenb_user[23] ;
+  wire \la_oenb_user[24] ;
+  wire \la_oenb_user[25] ;
+  wire \la_oenb_user[26] ;
+  wire \la_oenb_user[27] ;
+  wire \la_oenb_user[28] ;
+  wire \la_oenb_user[29] ;
+  wire \la_oenb_user[2] ;
+  wire \la_oenb_user[30] ;
+  wire \la_oenb_user[31] ;
+  wire \la_oenb_user[32] ;
+  wire \la_oenb_user[33] ;
+  wire \la_oenb_user[34] ;
+  wire \la_oenb_user[35] ;
+  wire \la_oenb_user[36] ;
+  wire \la_oenb_user[37] ;
+  wire \la_oenb_user[38] ;
+  wire \la_oenb_user[39] ;
+  wire \la_oenb_user[3] ;
+  wire \la_oenb_user[40] ;
+  wire \la_oenb_user[41] ;
+  wire \la_oenb_user[42] ;
+  wire \la_oenb_user[43] ;
+  wire \la_oenb_user[44] ;
+  wire \la_oenb_user[45] ;
+  wire \la_oenb_user[46] ;
+  wire \la_oenb_user[47] ;
+  wire \la_oenb_user[48] ;
+  wire \la_oenb_user[49] ;
+  wire \la_oenb_user[4] ;
+  wire \la_oenb_user[50] ;
+  wire \la_oenb_user[51] ;
+  wire \la_oenb_user[52] ;
+  wire \la_oenb_user[53] ;
+  wire \la_oenb_user[54] ;
+  wire \la_oenb_user[55] ;
+  wire \la_oenb_user[56] ;
+  wire \la_oenb_user[57] ;
+  wire \la_oenb_user[58] ;
+  wire \la_oenb_user[59] ;
+  wire \la_oenb_user[5] ;
+  wire \la_oenb_user[60] ;
+  wire \la_oenb_user[61] ;
+  wire \la_oenb_user[62] ;
+  wire \la_oenb_user[63] ;
+  wire \la_oenb_user[64] ;
+  wire \la_oenb_user[65] ;
+  wire \la_oenb_user[66] ;
+  wire \la_oenb_user[67] ;
+  wire \la_oenb_user[68] ;
+  wire \la_oenb_user[69] ;
+  wire \la_oenb_user[6] ;
+  wire \la_oenb_user[70] ;
+  wire \la_oenb_user[71] ;
+  wire \la_oenb_user[72] ;
+  wire \la_oenb_user[73] ;
+  wire \la_oenb_user[74] ;
+  wire \la_oenb_user[75] ;
+  wire \la_oenb_user[76] ;
+  wire \la_oenb_user[77] ;
+  wire \la_oenb_user[78] ;
+  wire \la_oenb_user[79] ;
+  wire \la_oenb_user[7] ;
+  wire \la_oenb_user[80] ;
+  wire \la_oenb_user[81] ;
+  wire \la_oenb_user[82] ;
+  wire \la_oenb_user[83] ;
+  wire \la_oenb_user[84] ;
+  wire \la_oenb_user[85] ;
+  wire \la_oenb_user[86] ;
+  wire \la_oenb_user[87] ;
+  wire \la_oenb_user[88] ;
+  wire \la_oenb_user[89] ;
+  wire \la_oenb_user[8] ;
+  wire \la_oenb_user[90] ;
+  wire \la_oenb_user[91] ;
+  wire \la_oenb_user[92] ;
+  wire \la_oenb_user[93] ;
+  wire \la_oenb_user[94] ;
+  wire \la_oenb_user[95] ;
+  wire \la_oenb_user[96] ;
+  wire \la_oenb_user[97] ;
+  wire \la_oenb_user[98] ;
+  wire \la_oenb_user[99] ;
+  wire \la_oenb_user[9] ;
+  wire \mask_rev[0] ;
+  wire \mask_rev[10] ;
+  wire \mask_rev[11] ;
+  wire \mask_rev[12] ;
+  wire \mask_rev[13] ;
+  wire \mask_rev[14] ;
+  wire \mask_rev[15] ;
+  wire \mask_rev[16] ;
+  wire \mask_rev[17] ;
+  wire \mask_rev[18] ;
+  wire \mask_rev[19] ;
+  wire \mask_rev[1] ;
+  wire \mask_rev[20] ;
+  wire \mask_rev[21] ;
+  wire \mask_rev[22] ;
+  wire \mask_rev[23] ;
+  wire \mask_rev[24] ;
+  wire \mask_rev[25] ;
+  wire \mask_rev[26] ;
+  wire \mask_rev[27] ;
+  wire \mask_rev[28] ;
+  wire \mask_rev[29] ;
+  wire \mask_rev[2] ;
+  wire \mask_rev[30] ;
+  wire \mask_rev[31] ;
+  wire \mask_rev[3] ;
+  wire \mask_rev[4] ;
+  wire \mask_rev[5] ;
+  wire \mask_rev[6] ;
+  wire \mask_rev[7] ;
+  wire \mask_rev[8] ;
+  wire \mask_rev[9] ;
+  wire \mgmt_io_in[0] ;
+  wire \mgmt_io_in[10] ;
+  wire \mgmt_io_in[11] ;
+  wire \mgmt_io_in[12] ;
+  wire \mgmt_io_in[13] ;
+  wire \mgmt_io_in[14] ;
+  wire \mgmt_io_in[15] ;
+  wire \mgmt_io_in[16] ;
+  wire \mgmt_io_in[17] ;
+  wire \mgmt_io_in[18] ;
+  wire \mgmt_io_in[19] ;
+  wire \mgmt_io_in[1] ;
+  wire \mgmt_io_in[20] ;
+  wire \mgmt_io_in[21] ;
+  wire \mgmt_io_in[22] ;
+  wire \mgmt_io_in[23] ;
+  wire \mgmt_io_in[24] ;
+  wire \mgmt_io_in[25] ;
+  wire \mgmt_io_in[26] ;
+  wire \mgmt_io_in[27] ;
+  wire \mgmt_io_in[28] ;
+  wire \mgmt_io_in[29] ;
+  wire \mgmt_io_in[2] ;
+  wire \mgmt_io_in[30] ;
+  wire \mgmt_io_in[31] ;
+  wire \mgmt_io_in[32] ;
+  wire \mgmt_io_in[33] ;
+  wire \mgmt_io_in[34] ;
+  wire \mgmt_io_in[35] ;
+  wire \mgmt_io_in[36] ;
+  wire \mgmt_io_in[37] ;
+  wire \mgmt_io_in[3] ;
+  wire \mgmt_io_in[4] ;
+  wire \mgmt_io_in[5] ;
+  wire \mgmt_io_in[6] ;
+  wire \mgmt_io_in[7] ;
+  wire \mgmt_io_in[8] ;
+  wire \mgmt_io_in[9] ;
+  wire \mgmt_io_in_hk[0] ;
+  wire \mgmt_io_in_hk[10] ;
+  wire \mgmt_io_in_hk[11] ;
+  wire \mgmt_io_in_hk[12] ;
+  wire \mgmt_io_in_hk[13] ;
+  wire \mgmt_io_in_hk[14] ;
+  wire \mgmt_io_in_hk[15] ;
+  wire \mgmt_io_in_hk[16] ;
+  wire \mgmt_io_in_hk[17] ;
+  wire \mgmt_io_in_hk[18] ;
+  wire \mgmt_io_in_hk[19] ;
+  wire \mgmt_io_in_hk[1] ;
+  wire \mgmt_io_in_hk[20] ;
+  wire \mgmt_io_in_hk[21] ;
+  wire \mgmt_io_in_hk[22] ;
+  wire \mgmt_io_in_hk[23] ;
+  wire \mgmt_io_in_hk[24] ;
+  wire \mgmt_io_in_hk[25] ;
+  wire \mgmt_io_in_hk[26] ;
+  wire \mgmt_io_in_hk[27] ;
+  wire \mgmt_io_in_hk[28] ;
+  wire \mgmt_io_in_hk[29] ;
+  wire \mgmt_io_in_hk[2] ;
+  wire \mgmt_io_in_hk[30] ;
+  wire \mgmt_io_in_hk[31] ;
+  wire \mgmt_io_in_hk[32] ;
+  wire \mgmt_io_in_hk[33] ;
+  wire \mgmt_io_in_hk[34] ;
+  wire \mgmt_io_in_hk[35] ;
+  wire \mgmt_io_in_hk[36] ;
+  wire \mgmt_io_in_hk[37] ;
+  wire \mgmt_io_in_hk[3] ;
+  wire \mgmt_io_in_hk[4] ;
+  wire \mgmt_io_in_hk[5] ;
+  wire \mgmt_io_in_hk[6] ;
+  wire \mgmt_io_in_hk[7] ;
+  wire \mgmt_io_in_hk[8] ;
+  wire \mgmt_io_in_hk[9] ;
+  wire \mgmt_io_oeb[0] ;
+  wire \mgmt_io_oeb[10] ;
+  wire \mgmt_io_oeb[11] ;
+  wire \mgmt_io_oeb[12] ;
+  wire \mgmt_io_oeb[13] ;
+  wire \mgmt_io_oeb[14] ;
+  wire \mgmt_io_oeb[15] ;
+  wire \mgmt_io_oeb[16] ;
+  wire \mgmt_io_oeb[17] ;
+  wire \mgmt_io_oeb[18] ;
+  wire \mgmt_io_oeb[19] ;
+  wire \mgmt_io_oeb[1] ;
+  wire \mgmt_io_oeb[20] ;
+  wire \mgmt_io_oeb[21] ;
+  wire \mgmt_io_oeb[22] ;
+  wire \mgmt_io_oeb[23] ;
+  wire \mgmt_io_oeb[24] ;
+  wire \mgmt_io_oeb[25] ;
+  wire \mgmt_io_oeb[26] ;
+  wire \mgmt_io_oeb[27] ;
+  wire \mgmt_io_oeb[28] ;
+  wire \mgmt_io_oeb[29] ;
+  wire \mgmt_io_oeb[2] ;
+  wire \mgmt_io_oeb[30] ;
+  wire \mgmt_io_oeb[31] ;
+  wire \mgmt_io_oeb[32] ;
+  wire \mgmt_io_oeb[33] ;
+  wire \mgmt_io_oeb[34] ;
+  wire \mgmt_io_oeb[35] ;
+  wire \mgmt_io_oeb[36] ;
+  wire \mgmt_io_oeb[37] ;
+  wire \mgmt_io_oeb[3] ;
+  wire \mgmt_io_oeb[4] ;
+  wire \mgmt_io_oeb[5] ;
+  wire \mgmt_io_oeb[6] ;
+  wire \mgmt_io_oeb[7] ;
+  wire \mgmt_io_oeb[8] ;
+  wire \mgmt_io_oeb[9] ;
+  wire \mgmt_io_oeb_hk[0] ;
+  wire \mgmt_io_oeb_hk[10] ;
+  wire \mgmt_io_oeb_hk[11] ;
+  wire \mgmt_io_oeb_hk[12] ;
+  wire \mgmt_io_oeb_hk[13] ;
+  wire \mgmt_io_oeb_hk[14] ;
+  wire \mgmt_io_oeb_hk[15] ;
+  wire \mgmt_io_oeb_hk[16] ;
+  wire \mgmt_io_oeb_hk[17] ;
+  wire \mgmt_io_oeb_hk[18] ;
+  wire \mgmt_io_oeb_hk[19] ;
+  wire \mgmt_io_oeb_hk[1] ;
+  wire \mgmt_io_oeb_hk[20] ;
+  wire \mgmt_io_oeb_hk[21] ;
+  wire \mgmt_io_oeb_hk[22] ;
+  wire \mgmt_io_oeb_hk[23] ;
+  wire \mgmt_io_oeb_hk[24] ;
+  wire \mgmt_io_oeb_hk[25] ;
+  wire \mgmt_io_oeb_hk[26] ;
+  wire \mgmt_io_oeb_hk[27] ;
+  wire \mgmt_io_oeb_hk[28] ;
+  wire \mgmt_io_oeb_hk[29] ;
+  wire \mgmt_io_oeb_hk[2] ;
+  wire \mgmt_io_oeb_hk[30] ;
+  wire \mgmt_io_oeb_hk[31] ;
+  wire \mgmt_io_oeb_hk[32] ;
+  wire \mgmt_io_oeb_hk[33] ;
+  wire \mgmt_io_oeb_hk[34] ;
+  wire \mgmt_io_oeb_hk[35] ;
+  wire \mgmt_io_oeb_hk[36] ;
+  wire \mgmt_io_oeb_hk[37] ;
+  wire \mgmt_io_oeb_hk[3] ;
+  wire \mgmt_io_oeb_hk[4] ;
+  wire \mgmt_io_oeb_hk[5] ;
+  wire \mgmt_io_oeb_hk[6] ;
+  wire \mgmt_io_oeb_hk[7] ;
+  wire \mgmt_io_oeb_hk[8] ;
+  wire \mgmt_io_oeb_hk[9] ;
+  wire \mgmt_io_out[0] ;
+  wire \mgmt_io_out[10] ;
+  wire \mgmt_io_out[11] ;
+  wire \mgmt_io_out[12] ;
+  wire \mgmt_io_out[13] ;
+  wire \mgmt_io_out[14] ;
+  wire \mgmt_io_out[15] ;
+  wire \mgmt_io_out[16] ;
+  wire \mgmt_io_out[17] ;
+  wire \mgmt_io_out[18] ;
+  wire \mgmt_io_out[19] ;
+  wire \mgmt_io_out[1] ;
+  wire \mgmt_io_out[20] ;
+  wire \mgmt_io_out[21] ;
+  wire \mgmt_io_out[22] ;
+  wire \mgmt_io_out[23] ;
+  wire \mgmt_io_out[24] ;
+  wire \mgmt_io_out[25] ;
+  wire \mgmt_io_out[26] ;
+  wire \mgmt_io_out[27] ;
+  wire \mgmt_io_out[28] ;
+  wire \mgmt_io_out[29] ;
+  wire \mgmt_io_out[2] ;
+  wire \mgmt_io_out[30] ;
+  wire \mgmt_io_out[31] ;
+  wire \mgmt_io_out[32] ;
+  wire \mgmt_io_out[33] ;
+  wire \mgmt_io_out[34] ;
+  wire \mgmt_io_out[35] ;
+  wire \mgmt_io_out[36] ;
+  wire \mgmt_io_out[37] ;
+  wire \mgmt_io_out[3] ;
+  wire \mgmt_io_out[4] ;
+  wire \mgmt_io_out[5] ;
+  wire \mgmt_io_out[6] ;
+  wire \mgmt_io_out[7] ;
+  wire \mgmt_io_out[8] ;
+  wire \mgmt_io_out[9] ;
+  wire \mgmt_io_out_hk[0] ;
+  wire \mgmt_io_out_hk[10] ;
+  wire \mgmt_io_out_hk[11] ;
+  wire \mgmt_io_out_hk[12] ;
+  wire \mgmt_io_out_hk[13] ;
+  wire \mgmt_io_out_hk[14] ;
+  wire \mgmt_io_out_hk[15] ;
+  wire \mgmt_io_out_hk[16] ;
+  wire \mgmt_io_out_hk[17] ;
+  wire \mgmt_io_out_hk[18] ;
+  wire \mgmt_io_out_hk[19] ;
+  wire \mgmt_io_out_hk[1] ;
+  wire \mgmt_io_out_hk[20] ;
+  wire \mgmt_io_out_hk[21] ;
+  wire \mgmt_io_out_hk[22] ;
+  wire \mgmt_io_out_hk[23] ;
+  wire \mgmt_io_out_hk[24] ;
+  wire \mgmt_io_out_hk[25] ;
+  wire \mgmt_io_out_hk[26] ;
+  wire \mgmt_io_out_hk[27] ;
+  wire \mgmt_io_out_hk[28] ;
+  wire \mgmt_io_out_hk[29] ;
+  wire \mgmt_io_out_hk[2] ;
+  wire \mgmt_io_out_hk[30] ;
+  wire \mgmt_io_out_hk[31] ;
+  wire \mgmt_io_out_hk[32] ;
+  wire \mgmt_io_out_hk[33] ;
+  wire \mgmt_io_out_hk[34] ;
+  wire \mgmt_io_out_hk[35] ;
+  wire \mgmt_io_out_hk[36] ;
+  wire \mgmt_io_out_hk[37] ;
+  wire \mgmt_io_out_hk[3] ;
+  wire \mgmt_io_out_hk[4] ;
+  wire \mgmt_io_out_hk[5] ;
+  wire \mgmt_io_out_hk[6] ;
+  wire \mgmt_io_out_hk[7] ;
+  wire \mgmt_io_out_hk[8] ;
+  wire \mgmt_io_out_hk[9] ;
+  wire mprj2_vcc_pwrgood;
+  wire mprj2_vdd_pwrgood;
+  wire mprj_ack_i_core;
+  wire mprj_ack_i_user;
+  wire \mprj_adr_o_core[0] ;
+  wire \mprj_adr_o_core[10] ;
+  wire \mprj_adr_o_core[11] ;
+  wire \mprj_adr_o_core[12] ;
+  wire \mprj_adr_o_core[13] ;
+  wire \mprj_adr_o_core[14] ;
+  wire \mprj_adr_o_core[15] ;
+  wire \mprj_adr_o_core[16] ;
+  wire \mprj_adr_o_core[17] ;
+  wire \mprj_adr_o_core[18] ;
+  wire \mprj_adr_o_core[19] ;
+  wire \mprj_adr_o_core[1] ;
+  wire \mprj_adr_o_core[20] ;
+  wire \mprj_adr_o_core[21] ;
+  wire \mprj_adr_o_core[22] ;
+  wire \mprj_adr_o_core[23] ;
+  wire \mprj_adr_o_core[24] ;
+  wire \mprj_adr_o_core[25] ;
+  wire \mprj_adr_o_core[26] ;
+  wire \mprj_adr_o_core[27] ;
+  wire \mprj_adr_o_core[28] ;
+  wire \mprj_adr_o_core[29] ;
+  wire \mprj_adr_o_core[2] ;
+  wire \mprj_adr_o_core[30] ;
+  wire \mprj_adr_o_core[31] ;
+  wire \mprj_adr_o_core[3] ;
+  wire \mprj_adr_o_core[4] ;
+  wire \mprj_adr_o_core[5] ;
+  wire \mprj_adr_o_core[6] ;
+  wire \mprj_adr_o_core[7] ;
+  wire \mprj_adr_o_core[8] ;
+  wire \mprj_adr_o_core[9] ;
+  wire \mprj_adr_o_user[0] ;
+  wire \mprj_adr_o_user[10] ;
+  wire \mprj_adr_o_user[11] ;
+  wire \mprj_adr_o_user[12] ;
+  wire \mprj_adr_o_user[13] ;
+  wire \mprj_adr_o_user[14] ;
+  wire \mprj_adr_o_user[15] ;
+  wire \mprj_adr_o_user[16] ;
+  wire \mprj_adr_o_user[17] ;
+  wire \mprj_adr_o_user[18] ;
+  wire \mprj_adr_o_user[19] ;
+  wire \mprj_adr_o_user[1] ;
+  wire \mprj_adr_o_user[20] ;
+  wire \mprj_adr_o_user[21] ;
+  wire \mprj_adr_o_user[22] ;
+  wire \mprj_adr_o_user[23] ;
+  wire \mprj_adr_o_user[24] ;
+  wire \mprj_adr_o_user[25] ;
+  wire \mprj_adr_o_user[26] ;
+  wire \mprj_adr_o_user[27] ;
+  wire \mprj_adr_o_user[28] ;
+  wire \mprj_adr_o_user[29] ;
+  wire \mprj_adr_o_user[2] ;
+  wire \mprj_adr_o_user[30] ;
+  wire \mprj_adr_o_user[31] ;
+  wire \mprj_adr_o_user[3] ;
+  wire \mprj_adr_o_user[4] ;
+  wire \mprj_adr_o_user[5] ;
+  wire \mprj_adr_o_user[6] ;
+  wire \mprj_adr_o_user[7] ;
+  wire \mprj_adr_o_user[8] ;
+  wire \mprj_adr_o_user[9] ;
+  wire mprj_clock;
+  wire mprj_clock2;
+  wire mprj_cyc_o_core;
+  wire mprj_cyc_o_user;
+  wire \mprj_dat_i_core[0] ;
+  wire \mprj_dat_i_core[10] ;
+  wire \mprj_dat_i_core[11] ;
+  wire \mprj_dat_i_core[12] ;
+  wire \mprj_dat_i_core[13] ;
+  wire \mprj_dat_i_core[14] ;
+  wire \mprj_dat_i_core[15] ;
+  wire \mprj_dat_i_core[16] ;
+  wire \mprj_dat_i_core[17] ;
+  wire \mprj_dat_i_core[18] ;
+  wire \mprj_dat_i_core[19] ;
+  wire \mprj_dat_i_core[1] ;
+  wire \mprj_dat_i_core[20] ;
+  wire \mprj_dat_i_core[21] ;
+  wire \mprj_dat_i_core[22] ;
+  wire \mprj_dat_i_core[23] ;
+  wire \mprj_dat_i_core[24] ;
+  wire \mprj_dat_i_core[25] ;
+  wire \mprj_dat_i_core[26] ;
+  wire \mprj_dat_i_core[27] ;
+  wire \mprj_dat_i_core[28] ;
+  wire \mprj_dat_i_core[29] ;
+  wire \mprj_dat_i_core[2] ;
+  wire \mprj_dat_i_core[30] ;
+  wire \mprj_dat_i_core[31] ;
+  wire \mprj_dat_i_core[3] ;
+  wire \mprj_dat_i_core[4] ;
+  wire \mprj_dat_i_core[5] ;
+  wire \mprj_dat_i_core[6] ;
+  wire \mprj_dat_i_core[7] ;
+  wire \mprj_dat_i_core[8] ;
+  wire \mprj_dat_i_core[9] ;
+  wire \mprj_dat_i_user[0] ;
+  wire \mprj_dat_i_user[10] ;
+  wire \mprj_dat_i_user[11] ;
+  wire \mprj_dat_i_user[12] ;
+  wire \mprj_dat_i_user[13] ;
+  wire \mprj_dat_i_user[14] ;
+  wire \mprj_dat_i_user[15] ;
+  wire \mprj_dat_i_user[16] ;
+  wire \mprj_dat_i_user[17] ;
+  wire \mprj_dat_i_user[18] ;
+  wire \mprj_dat_i_user[19] ;
+  wire \mprj_dat_i_user[1] ;
+  wire \mprj_dat_i_user[20] ;
+  wire \mprj_dat_i_user[21] ;
+  wire \mprj_dat_i_user[22] ;
+  wire \mprj_dat_i_user[23] ;
+  wire \mprj_dat_i_user[24] ;
+  wire \mprj_dat_i_user[25] ;
+  wire \mprj_dat_i_user[26] ;
+  wire \mprj_dat_i_user[27] ;
+  wire \mprj_dat_i_user[28] ;
+  wire \mprj_dat_i_user[29] ;
+  wire \mprj_dat_i_user[2] ;
+  wire \mprj_dat_i_user[30] ;
+  wire \mprj_dat_i_user[31] ;
+  wire \mprj_dat_i_user[3] ;
+  wire \mprj_dat_i_user[4] ;
+  wire \mprj_dat_i_user[5] ;
+  wire \mprj_dat_i_user[6] ;
+  wire \mprj_dat_i_user[7] ;
+  wire \mprj_dat_i_user[8] ;
+  wire \mprj_dat_i_user[9] ;
+  wire \mprj_dat_o_core[0] ;
+  wire \mprj_dat_o_core[10] ;
+  wire \mprj_dat_o_core[11] ;
+  wire \mprj_dat_o_core[12] ;
+  wire \mprj_dat_o_core[13] ;
+  wire \mprj_dat_o_core[14] ;
+  wire \mprj_dat_o_core[15] ;
+  wire \mprj_dat_o_core[16] ;
+  wire \mprj_dat_o_core[17] ;
+  wire \mprj_dat_o_core[18] ;
+  wire \mprj_dat_o_core[19] ;
+  wire \mprj_dat_o_core[1] ;
+  wire \mprj_dat_o_core[20] ;
+  wire \mprj_dat_o_core[21] ;
+  wire \mprj_dat_o_core[22] ;
+  wire \mprj_dat_o_core[23] ;
+  wire \mprj_dat_o_core[24] ;
+  wire \mprj_dat_o_core[25] ;
+  wire \mprj_dat_o_core[26] ;
+  wire \mprj_dat_o_core[27] ;
+  wire \mprj_dat_o_core[28] ;
+  wire \mprj_dat_o_core[29] ;
+  wire \mprj_dat_o_core[2] ;
+  wire \mprj_dat_o_core[30] ;
+  wire \mprj_dat_o_core[31] ;
+  wire \mprj_dat_o_core[3] ;
+  wire \mprj_dat_o_core[4] ;
+  wire \mprj_dat_o_core[5] ;
+  wire \mprj_dat_o_core[6] ;
+  wire \mprj_dat_o_core[7] ;
+  wire \mprj_dat_o_core[8] ;
+  wire \mprj_dat_o_core[9] ;
+  wire \mprj_dat_o_user[0] ;
+  wire \mprj_dat_o_user[10] ;
+  wire \mprj_dat_o_user[11] ;
+  wire \mprj_dat_o_user[12] ;
+  wire \mprj_dat_o_user[13] ;
+  wire \mprj_dat_o_user[14] ;
+  wire \mprj_dat_o_user[15] ;
+  wire \mprj_dat_o_user[16] ;
+  wire \mprj_dat_o_user[17] ;
+  wire \mprj_dat_o_user[18] ;
+  wire \mprj_dat_o_user[19] ;
+  wire \mprj_dat_o_user[1] ;
+  wire \mprj_dat_o_user[20] ;
+  wire \mprj_dat_o_user[21] ;
+  wire \mprj_dat_o_user[22] ;
+  wire \mprj_dat_o_user[23] ;
+  wire \mprj_dat_o_user[24] ;
+  wire \mprj_dat_o_user[25] ;
+  wire \mprj_dat_o_user[26] ;
+  wire \mprj_dat_o_user[27] ;
+  wire \mprj_dat_o_user[28] ;
+  wire \mprj_dat_o_user[29] ;
+  wire \mprj_dat_o_user[2] ;
+  wire \mprj_dat_o_user[30] ;
+  wire \mprj_dat_o_user[31] ;
+  wire \mprj_dat_o_user[3] ;
+  wire \mprj_dat_o_user[4] ;
+  wire \mprj_dat_o_user[5] ;
+  wire \mprj_dat_o_user[6] ;
+  wire \mprj_dat_o_user[7] ;
+  wire \mprj_dat_o_user[8] ;
+  wire \mprj_dat_o_user[9] ;
+  wire mprj_iena_wb;
+  inout [37:0] mprj_io;
+  wire \mprj_io_analog_en[0] ;
+  wire \mprj_io_analog_en[10] ;
+  wire \mprj_io_analog_en[11] ;
+  wire \mprj_io_analog_en[12] ;
+  wire \mprj_io_analog_en[13] ;
+  wire \mprj_io_analog_en[14] ;
+  wire \mprj_io_analog_en[15] ;
+  wire \mprj_io_analog_en[16] ;
+  wire \mprj_io_analog_en[17] ;
+  wire \mprj_io_analog_en[18] ;
+  wire \mprj_io_analog_en[19] ;
+  wire \mprj_io_analog_en[1] ;
+  wire \mprj_io_analog_en[20] ;
+  wire \mprj_io_analog_en[21] ;
+  wire \mprj_io_analog_en[22] ;
+  wire \mprj_io_analog_en[23] ;
+  wire \mprj_io_analog_en[24] ;
+  wire \mprj_io_analog_en[25] ;
+  wire \mprj_io_analog_en[26] ;
+  wire \mprj_io_analog_en[27] ;
+  wire \mprj_io_analog_en[28] ;
+  wire \mprj_io_analog_en[29] ;
+  wire \mprj_io_analog_en[2] ;
+  wire \mprj_io_analog_en[30] ;
+  wire \mprj_io_analog_en[31] ;
+  wire \mprj_io_analog_en[32] ;
+  wire \mprj_io_analog_en[33] ;
+  wire \mprj_io_analog_en[34] ;
+  wire \mprj_io_analog_en[35] ;
+  wire \mprj_io_analog_en[36] ;
+  wire \mprj_io_analog_en[37] ;
+  wire \mprj_io_analog_en[3] ;
+  wire \mprj_io_analog_en[4] ;
+  wire \mprj_io_analog_en[5] ;
+  wire \mprj_io_analog_en[6] ;
+  wire \mprj_io_analog_en[7] ;
+  wire \mprj_io_analog_en[8] ;
+  wire \mprj_io_analog_en[9] ;
+  wire \mprj_io_analog_pol[0] ;
+  wire \mprj_io_analog_pol[10] ;
+  wire \mprj_io_analog_pol[11] ;
+  wire \mprj_io_analog_pol[12] ;
+  wire \mprj_io_analog_pol[13] ;
+  wire \mprj_io_analog_pol[14] ;
+  wire \mprj_io_analog_pol[15] ;
+  wire \mprj_io_analog_pol[16] ;
+  wire \mprj_io_analog_pol[17] ;
+  wire \mprj_io_analog_pol[18] ;
+  wire \mprj_io_analog_pol[19] ;
+  wire \mprj_io_analog_pol[1] ;
+  wire \mprj_io_analog_pol[20] ;
+  wire \mprj_io_analog_pol[21] ;
+  wire \mprj_io_analog_pol[22] ;
+  wire \mprj_io_analog_pol[23] ;
+  wire \mprj_io_analog_pol[24] ;
+  wire \mprj_io_analog_pol[25] ;
+  wire \mprj_io_analog_pol[26] ;
+  wire \mprj_io_analog_pol[27] ;
+  wire \mprj_io_analog_pol[28] ;
+  wire \mprj_io_analog_pol[29] ;
+  wire \mprj_io_analog_pol[2] ;
+  wire \mprj_io_analog_pol[30] ;
+  wire \mprj_io_analog_pol[31] ;
+  wire \mprj_io_analog_pol[32] ;
+  wire \mprj_io_analog_pol[33] ;
+  wire \mprj_io_analog_pol[34] ;
+  wire \mprj_io_analog_pol[35] ;
+  wire \mprj_io_analog_pol[36] ;
+  wire \mprj_io_analog_pol[37] ;
+  wire \mprj_io_analog_pol[3] ;
+  wire \mprj_io_analog_pol[4] ;
+  wire \mprj_io_analog_pol[5] ;
+  wire \mprj_io_analog_pol[6] ;
+  wire \mprj_io_analog_pol[7] ;
+  wire \mprj_io_analog_pol[8] ;
+  wire \mprj_io_analog_pol[9] ;
+  wire \mprj_io_analog_sel[0] ;
+  wire \mprj_io_analog_sel[10] ;
+  wire \mprj_io_analog_sel[11] ;
+  wire \mprj_io_analog_sel[12] ;
+  wire \mprj_io_analog_sel[13] ;
+  wire \mprj_io_analog_sel[14] ;
+  wire \mprj_io_analog_sel[15] ;
+  wire \mprj_io_analog_sel[16] ;
+  wire \mprj_io_analog_sel[17] ;
+  wire \mprj_io_analog_sel[18] ;
+  wire \mprj_io_analog_sel[19] ;
+  wire \mprj_io_analog_sel[1] ;
+  wire \mprj_io_analog_sel[20] ;
+  wire \mprj_io_analog_sel[21] ;
+  wire \mprj_io_analog_sel[22] ;
+  wire \mprj_io_analog_sel[23] ;
+  wire \mprj_io_analog_sel[24] ;
+  wire \mprj_io_analog_sel[25] ;
+  wire \mprj_io_analog_sel[26] ;
+  wire \mprj_io_analog_sel[27] ;
+  wire \mprj_io_analog_sel[28] ;
+  wire \mprj_io_analog_sel[29] ;
+  wire \mprj_io_analog_sel[2] ;
+  wire \mprj_io_analog_sel[30] ;
+  wire \mprj_io_analog_sel[31] ;
+  wire \mprj_io_analog_sel[32] ;
+  wire \mprj_io_analog_sel[33] ;
+  wire \mprj_io_analog_sel[34] ;
+  wire \mprj_io_analog_sel[35] ;
+  wire \mprj_io_analog_sel[36] ;
+  wire \mprj_io_analog_sel[37] ;
+  wire \mprj_io_analog_sel[3] ;
+  wire \mprj_io_analog_sel[4] ;
+  wire \mprj_io_analog_sel[5] ;
+  wire \mprj_io_analog_sel[6] ;
+  wire \mprj_io_analog_sel[7] ;
+  wire \mprj_io_analog_sel[8] ;
+  wire \mprj_io_analog_sel[9] ;
+  wire \mprj_io_dm[0] ;
+  wire \mprj_io_dm[100] ;
+  wire \mprj_io_dm[101] ;
+  wire \mprj_io_dm[102] ;
+  wire \mprj_io_dm[103] ;
+  wire \mprj_io_dm[104] ;
+  wire \mprj_io_dm[105] ;
+  wire \mprj_io_dm[106] ;
+  wire \mprj_io_dm[107] ;
+  wire \mprj_io_dm[108] ;
+  wire \mprj_io_dm[109] ;
+  wire \mprj_io_dm[10] ;
+  wire \mprj_io_dm[110] ;
+  wire \mprj_io_dm[111] ;
+  wire \mprj_io_dm[112] ;
+  wire \mprj_io_dm[113] ;
+  wire \mprj_io_dm[11] ;
+  wire \mprj_io_dm[12] ;
+  wire \mprj_io_dm[13] ;
+  wire \mprj_io_dm[14] ;
+  wire \mprj_io_dm[15] ;
+  wire \mprj_io_dm[16] ;
+  wire \mprj_io_dm[17] ;
+  wire \mprj_io_dm[18] ;
+  wire \mprj_io_dm[19] ;
+  wire \mprj_io_dm[1] ;
+  wire \mprj_io_dm[20] ;
+  wire \mprj_io_dm[21] ;
+  wire \mprj_io_dm[22] ;
+  wire \mprj_io_dm[23] ;
+  wire \mprj_io_dm[24] ;
+  wire \mprj_io_dm[25] ;
+  wire \mprj_io_dm[26] ;
+  wire \mprj_io_dm[27] ;
+  wire \mprj_io_dm[28] ;
+  wire \mprj_io_dm[29] ;
+  wire \mprj_io_dm[2] ;
+  wire \mprj_io_dm[30] ;
+  wire \mprj_io_dm[31] ;
+  wire \mprj_io_dm[32] ;
+  wire \mprj_io_dm[33] ;
+  wire \mprj_io_dm[34] ;
+  wire \mprj_io_dm[35] ;
+  wire \mprj_io_dm[36] ;
+  wire \mprj_io_dm[37] ;
+  wire \mprj_io_dm[38] ;
+  wire \mprj_io_dm[39] ;
+  wire \mprj_io_dm[3] ;
+  wire \mprj_io_dm[40] ;
+  wire \mprj_io_dm[41] ;
+  wire \mprj_io_dm[42] ;
+  wire \mprj_io_dm[43] ;
+  wire \mprj_io_dm[44] ;
+  wire \mprj_io_dm[45] ;
+  wire \mprj_io_dm[46] ;
+  wire \mprj_io_dm[47] ;
+  wire \mprj_io_dm[48] ;
+  wire \mprj_io_dm[49] ;
+  wire \mprj_io_dm[4] ;
+  wire \mprj_io_dm[50] ;
+  wire \mprj_io_dm[51] ;
+  wire \mprj_io_dm[52] ;
+  wire \mprj_io_dm[53] ;
+  wire \mprj_io_dm[54] ;
+  wire \mprj_io_dm[55] ;
+  wire \mprj_io_dm[56] ;
+  wire \mprj_io_dm[57] ;
+  wire \mprj_io_dm[58] ;
+  wire \mprj_io_dm[59] ;
+  wire \mprj_io_dm[5] ;
+  wire \mprj_io_dm[60] ;
+  wire \mprj_io_dm[61] ;
+  wire \mprj_io_dm[62] ;
+  wire \mprj_io_dm[63] ;
+  wire \mprj_io_dm[64] ;
+  wire \mprj_io_dm[65] ;
+  wire \mprj_io_dm[66] ;
+  wire \mprj_io_dm[67] ;
+  wire \mprj_io_dm[68] ;
+  wire \mprj_io_dm[69] ;
+  wire \mprj_io_dm[6] ;
+  wire \mprj_io_dm[70] ;
+  wire \mprj_io_dm[71] ;
+  wire \mprj_io_dm[72] ;
+  wire \mprj_io_dm[73] ;
+  wire \mprj_io_dm[74] ;
+  wire \mprj_io_dm[75] ;
+  wire \mprj_io_dm[76] ;
+  wire \mprj_io_dm[77] ;
+  wire \mprj_io_dm[78] ;
+  wire \mprj_io_dm[79] ;
+  wire \mprj_io_dm[7] ;
+  wire \mprj_io_dm[80] ;
+  wire \mprj_io_dm[81] ;
+  wire \mprj_io_dm[82] ;
+  wire \mprj_io_dm[83] ;
+  wire \mprj_io_dm[84] ;
+  wire \mprj_io_dm[85] ;
+  wire \mprj_io_dm[86] ;
+  wire \mprj_io_dm[87] ;
+  wire \mprj_io_dm[88] ;
+  wire \mprj_io_dm[89] ;
+  wire \mprj_io_dm[8] ;
+  wire \mprj_io_dm[90] ;
+  wire \mprj_io_dm[91] ;
+  wire \mprj_io_dm[92] ;
+  wire \mprj_io_dm[93] ;
+  wire \mprj_io_dm[94] ;
+  wire \mprj_io_dm[95] ;
+  wire \mprj_io_dm[96] ;
+  wire \mprj_io_dm[97] ;
+  wire \mprj_io_dm[98] ;
+  wire \mprj_io_dm[99] ;
+  wire \mprj_io_dm[9] ;
+  wire \mprj_io_holdover[0] ;
+  wire \mprj_io_holdover[10] ;
+  wire \mprj_io_holdover[11] ;
+  wire \mprj_io_holdover[12] ;
+  wire \mprj_io_holdover[13] ;
+  wire \mprj_io_holdover[14] ;
+  wire \mprj_io_holdover[15] ;
+  wire \mprj_io_holdover[16] ;
+  wire \mprj_io_holdover[17] ;
+  wire \mprj_io_holdover[18] ;
+  wire \mprj_io_holdover[19] ;
+  wire \mprj_io_holdover[1] ;
+  wire \mprj_io_holdover[20] ;
+  wire \mprj_io_holdover[21] ;
+  wire \mprj_io_holdover[22] ;
+  wire \mprj_io_holdover[23] ;
+  wire \mprj_io_holdover[24] ;
+  wire \mprj_io_holdover[25] ;
+  wire \mprj_io_holdover[26] ;
+  wire \mprj_io_holdover[27] ;
+  wire \mprj_io_holdover[28] ;
+  wire \mprj_io_holdover[29] ;
+  wire \mprj_io_holdover[2] ;
+  wire \mprj_io_holdover[30] ;
+  wire \mprj_io_holdover[31] ;
+  wire \mprj_io_holdover[32] ;
+  wire \mprj_io_holdover[33] ;
+  wire \mprj_io_holdover[34] ;
+  wire \mprj_io_holdover[35] ;
+  wire \mprj_io_holdover[36] ;
+  wire \mprj_io_holdover[37] ;
+  wire \mprj_io_holdover[3] ;
+  wire \mprj_io_holdover[4] ;
+  wire \mprj_io_holdover[5] ;
+  wire \mprj_io_holdover[6] ;
+  wire \mprj_io_holdover[7] ;
+  wire \mprj_io_holdover[8] ;
+  wire \mprj_io_holdover[9] ;
+  wire \mprj_io_ib_mode_sel[0] ;
+  wire \mprj_io_ib_mode_sel[10] ;
+  wire \mprj_io_ib_mode_sel[11] ;
+  wire \mprj_io_ib_mode_sel[12] ;
+  wire \mprj_io_ib_mode_sel[13] ;
+  wire \mprj_io_ib_mode_sel[14] ;
+  wire \mprj_io_ib_mode_sel[15] ;
+  wire \mprj_io_ib_mode_sel[16] ;
+  wire \mprj_io_ib_mode_sel[17] ;
+  wire \mprj_io_ib_mode_sel[18] ;
+  wire \mprj_io_ib_mode_sel[19] ;
+  wire \mprj_io_ib_mode_sel[1] ;
+  wire \mprj_io_ib_mode_sel[20] ;
+  wire \mprj_io_ib_mode_sel[21] ;
+  wire \mprj_io_ib_mode_sel[22] ;
+  wire \mprj_io_ib_mode_sel[23] ;
+  wire \mprj_io_ib_mode_sel[24] ;
+  wire \mprj_io_ib_mode_sel[25] ;
+  wire \mprj_io_ib_mode_sel[26] ;
+  wire \mprj_io_ib_mode_sel[27] ;
+  wire \mprj_io_ib_mode_sel[28] ;
+  wire \mprj_io_ib_mode_sel[29] ;
+  wire \mprj_io_ib_mode_sel[2] ;
+  wire \mprj_io_ib_mode_sel[30] ;
+  wire \mprj_io_ib_mode_sel[31] ;
+  wire \mprj_io_ib_mode_sel[32] ;
+  wire \mprj_io_ib_mode_sel[33] ;
+  wire \mprj_io_ib_mode_sel[34] ;
+  wire \mprj_io_ib_mode_sel[35] ;
+  wire \mprj_io_ib_mode_sel[36] ;
+  wire \mprj_io_ib_mode_sel[37] ;
+  wire \mprj_io_ib_mode_sel[3] ;
+  wire \mprj_io_ib_mode_sel[4] ;
+  wire \mprj_io_ib_mode_sel[5] ;
+  wire \mprj_io_ib_mode_sel[6] ;
+  wire \mprj_io_ib_mode_sel[7] ;
+  wire \mprj_io_ib_mode_sel[8] ;
+  wire \mprj_io_ib_mode_sel[9] ;
+  wire \mprj_io_in[0] ;
+  wire \mprj_io_in[10] ;
+  wire \mprj_io_in[11] ;
+  wire \mprj_io_in[12] ;
+  wire \mprj_io_in[13] ;
+  wire \mprj_io_in[14] ;
+  wire \mprj_io_in[15] ;
+  wire \mprj_io_in[16] ;
+  wire \mprj_io_in[17] ;
+  wire \mprj_io_in[18] ;
+  wire \mprj_io_in[19] ;
+  wire \mprj_io_in[1] ;
+  wire \mprj_io_in[20] ;
+  wire \mprj_io_in[21] ;
+  wire \mprj_io_in[22] ;
+  wire \mprj_io_in[23] ;
+  wire \mprj_io_in[24] ;
+  wire \mprj_io_in[25] ;
+  wire \mprj_io_in[26] ;
+  wire \mprj_io_in[27] ;
+  wire \mprj_io_in[28] ;
+  wire \mprj_io_in[29] ;
+  wire \mprj_io_in[2] ;
+  wire \mprj_io_in[30] ;
+  wire \mprj_io_in[31] ;
+  wire \mprj_io_in[32] ;
+  wire \mprj_io_in[33] ;
+  wire \mprj_io_in[34] ;
+  wire \mprj_io_in[35] ;
+  wire \mprj_io_in[36] ;
+  wire \mprj_io_in[37] ;
+  wire \mprj_io_in[3] ;
+  wire \mprj_io_in[4] ;
+  wire \mprj_io_in[5] ;
+  wire \mprj_io_in[6] ;
+  wire \mprj_io_in[7] ;
+  wire \mprj_io_in[8] ;
+  wire \mprj_io_in[9] ;
+  wire \mprj_io_inp_dis[0] ;
+  wire \mprj_io_inp_dis[10] ;
+  wire \mprj_io_inp_dis[11] ;
+  wire \mprj_io_inp_dis[12] ;
+  wire \mprj_io_inp_dis[13] ;
+  wire \mprj_io_inp_dis[14] ;
+  wire \mprj_io_inp_dis[15] ;
+  wire \mprj_io_inp_dis[16] ;
+  wire \mprj_io_inp_dis[17] ;
+  wire \mprj_io_inp_dis[18] ;
+  wire \mprj_io_inp_dis[19] ;
+  wire \mprj_io_inp_dis[1] ;
+  wire \mprj_io_inp_dis[20] ;
+  wire \mprj_io_inp_dis[21] ;
+  wire \mprj_io_inp_dis[22] ;
+  wire \mprj_io_inp_dis[23] ;
+  wire \mprj_io_inp_dis[24] ;
+  wire \mprj_io_inp_dis[25] ;
+  wire \mprj_io_inp_dis[26] ;
+  wire \mprj_io_inp_dis[27] ;
+  wire \mprj_io_inp_dis[28] ;
+  wire \mprj_io_inp_dis[29] ;
+  wire \mprj_io_inp_dis[2] ;
+  wire \mprj_io_inp_dis[30] ;
+  wire \mprj_io_inp_dis[31] ;
+  wire \mprj_io_inp_dis[32] ;
+  wire \mprj_io_inp_dis[33] ;
+  wire \mprj_io_inp_dis[34] ;
+  wire \mprj_io_inp_dis[35] ;
+  wire \mprj_io_inp_dis[36] ;
+  wire \mprj_io_inp_dis[37] ;
+  wire \mprj_io_inp_dis[3] ;
+  wire \mprj_io_inp_dis[4] ;
+  wire \mprj_io_inp_dis[5] ;
+  wire \mprj_io_inp_dis[6] ;
+  wire \mprj_io_inp_dis[7] ;
+  wire \mprj_io_inp_dis[8] ;
+  wire \mprj_io_inp_dis[9] ;
+  wire mprj_io_loader_clock;
+  wire mprj_io_loader_clock_buf;
+  wire mprj_io_loader_data_1;
+  wire mprj_io_loader_data_2;
+  wire mprj_io_loader_data_2_buf;
+  wire mprj_io_loader_resetn;
+  wire mprj_io_loader_resetn_buf;
+  wire mprj_io_loader_strobe;
+  wire mprj_io_loader_strobe_buf;
+  wire \mprj_io_oeb[0] ;
+  wire \mprj_io_oeb[10] ;
+  wire \mprj_io_oeb[11] ;
+  wire \mprj_io_oeb[12] ;
+  wire \mprj_io_oeb[13] ;
+  wire \mprj_io_oeb[14] ;
+  wire \mprj_io_oeb[15] ;
+  wire \mprj_io_oeb[16] ;
+  wire \mprj_io_oeb[17] ;
+  wire \mprj_io_oeb[18] ;
+  wire \mprj_io_oeb[19] ;
+  wire \mprj_io_oeb[1] ;
+  wire \mprj_io_oeb[20] ;
+  wire \mprj_io_oeb[21] ;
+  wire \mprj_io_oeb[22] ;
+  wire \mprj_io_oeb[23] ;
+  wire \mprj_io_oeb[24] ;
+  wire \mprj_io_oeb[25] ;
+  wire \mprj_io_oeb[26] ;
+  wire \mprj_io_oeb[27] ;
+  wire \mprj_io_oeb[28] ;
+  wire \mprj_io_oeb[29] ;
+  wire \mprj_io_oeb[2] ;
+  wire \mprj_io_oeb[30] ;
+  wire \mprj_io_oeb[31] ;
+  wire \mprj_io_oeb[32] ;
+  wire \mprj_io_oeb[33] ;
+  wire \mprj_io_oeb[34] ;
+  wire \mprj_io_oeb[35] ;
+  wire \mprj_io_oeb[36] ;
+  wire \mprj_io_oeb[37] ;
+  wire \mprj_io_oeb[3] ;
+  wire \mprj_io_oeb[4] ;
+  wire \mprj_io_oeb[5] ;
+  wire \mprj_io_oeb[6] ;
+  wire \mprj_io_oeb[7] ;
+  wire \mprj_io_oeb[8] ;
+  wire \mprj_io_oeb[9] ;
+  wire \mprj_io_one[0] ;
+  wire \mprj_io_one[10] ;
+  wire \mprj_io_one[11] ;
+  wire \mprj_io_one[12] ;
+  wire \mprj_io_one[13] ;
+  wire \mprj_io_one[14] ;
+  wire \mprj_io_one[15] ;
+  wire \mprj_io_one[16] ;
+  wire \mprj_io_one[17] ;
+  wire \mprj_io_one[18] ;
+  wire \mprj_io_one[19] ;
+  wire \mprj_io_one[1] ;
+  wire \mprj_io_one[20] ;
+  wire \mprj_io_one[21] ;
+  wire \mprj_io_one[22] ;
+  wire \mprj_io_one[23] ;
+  wire \mprj_io_one[24] ;
+  wire \mprj_io_one[25] ;
+  wire \mprj_io_one[26] ;
+  wire \mprj_io_one[27] ;
+  wire \mprj_io_one[28] ;
+  wire \mprj_io_one[29] ;
+  wire \mprj_io_one[2] ;
+  wire \mprj_io_one[30] ;
+  wire \mprj_io_one[31] ;
+  wire \mprj_io_one[32] ;
+  wire \mprj_io_one[33] ;
+  wire \mprj_io_one[34] ;
+  wire \mprj_io_one[35] ;
+  wire \mprj_io_one[36] ;
+  wire \mprj_io_one[37] ;
+  wire \mprj_io_one[3] ;
+  wire \mprj_io_one[4] ;
+  wire \mprj_io_one[5] ;
+  wire \mprj_io_one[6] ;
+  wire \mprj_io_one[7] ;
+  wire \mprj_io_one[8] ;
+  wire \mprj_io_one[9] ;
+  wire \mprj_io_out[0] ;
+  wire \mprj_io_out[10] ;
+  wire \mprj_io_out[11] ;
+  wire \mprj_io_out[12] ;
+  wire \mprj_io_out[13] ;
+  wire \mprj_io_out[14] ;
+  wire \mprj_io_out[15] ;
+  wire \mprj_io_out[16] ;
+  wire \mprj_io_out[17] ;
+  wire \mprj_io_out[18] ;
+  wire \mprj_io_out[19] ;
+  wire \mprj_io_out[1] ;
+  wire \mprj_io_out[20] ;
+  wire \mprj_io_out[21] ;
+  wire \mprj_io_out[22] ;
+  wire \mprj_io_out[23] ;
+  wire \mprj_io_out[24] ;
+  wire \mprj_io_out[25] ;
+  wire \mprj_io_out[26] ;
+  wire \mprj_io_out[27] ;
+  wire \mprj_io_out[28] ;
+  wire \mprj_io_out[29] ;
+  wire \mprj_io_out[2] ;
+  wire \mprj_io_out[30] ;
+  wire \mprj_io_out[31] ;
+  wire \mprj_io_out[32] ;
+  wire \mprj_io_out[33] ;
+  wire \mprj_io_out[34] ;
+  wire \mprj_io_out[35] ;
+  wire \mprj_io_out[36] ;
+  wire \mprj_io_out[37] ;
+  wire \mprj_io_out[3] ;
+  wire \mprj_io_out[4] ;
+  wire \mprj_io_out[5] ;
+  wire \mprj_io_out[6] ;
+  wire \mprj_io_out[7] ;
+  wire \mprj_io_out[8] ;
+  wire \mprj_io_out[9] ;
+  wire \mprj_io_slow_sel[0] ;
+  wire \mprj_io_slow_sel[10] ;
+  wire \mprj_io_slow_sel[11] ;
+  wire \mprj_io_slow_sel[12] ;
+  wire \mprj_io_slow_sel[13] ;
+  wire \mprj_io_slow_sel[14] ;
+  wire \mprj_io_slow_sel[15] ;
+  wire \mprj_io_slow_sel[16] ;
+  wire \mprj_io_slow_sel[17] ;
+  wire \mprj_io_slow_sel[18] ;
+  wire \mprj_io_slow_sel[19] ;
+  wire \mprj_io_slow_sel[1] ;
+  wire \mprj_io_slow_sel[20] ;
+  wire \mprj_io_slow_sel[21] ;
+  wire \mprj_io_slow_sel[22] ;
+  wire \mprj_io_slow_sel[23] ;
+  wire \mprj_io_slow_sel[24] ;
+  wire \mprj_io_slow_sel[25] ;
+  wire \mprj_io_slow_sel[26] ;
+  wire \mprj_io_slow_sel[27] ;
+  wire \mprj_io_slow_sel[28] ;
+  wire \mprj_io_slow_sel[29] ;
+  wire \mprj_io_slow_sel[2] ;
+  wire \mprj_io_slow_sel[30] ;
+  wire \mprj_io_slow_sel[31] ;
+  wire \mprj_io_slow_sel[32] ;
+  wire \mprj_io_slow_sel[33] ;
+  wire \mprj_io_slow_sel[34] ;
+  wire \mprj_io_slow_sel[35] ;
+  wire \mprj_io_slow_sel[36] ;
+  wire \mprj_io_slow_sel[37] ;
+  wire \mprj_io_slow_sel[3] ;
+  wire \mprj_io_slow_sel[4] ;
+  wire \mprj_io_slow_sel[5] ;
+  wire \mprj_io_slow_sel[6] ;
+  wire \mprj_io_slow_sel[7] ;
+  wire \mprj_io_slow_sel[8] ;
+  wire \mprj_io_slow_sel[9] ;
+  wire \mprj_io_vtrip_sel[0] ;
+  wire \mprj_io_vtrip_sel[10] ;
+  wire \mprj_io_vtrip_sel[11] ;
+  wire \mprj_io_vtrip_sel[12] ;
+  wire \mprj_io_vtrip_sel[13] ;
+  wire \mprj_io_vtrip_sel[14] ;
+  wire \mprj_io_vtrip_sel[15] ;
+  wire \mprj_io_vtrip_sel[16] ;
+  wire \mprj_io_vtrip_sel[17] ;
+  wire \mprj_io_vtrip_sel[18] ;
+  wire \mprj_io_vtrip_sel[19] ;
+  wire \mprj_io_vtrip_sel[1] ;
+  wire \mprj_io_vtrip_sel[20] ;
+  wire \mprj_io_vtrip_sel[21] ;
+  wire \mprj_io_vtrip_sel[22] ;
+  wire \mprj_io_vtrip_sel[23] ;
+  wire \mprj_io_vtrip_sel[24] ;
+  wire \mprj_io_vtrip_sel[25] ;
+  wire \mprj_io_vtrip_sel[26] ;
+  wire \mprj_io_vtrip_sel[27] ;
+  wire \mprj_io_vtrip_sel[28] ;
+  wire \mprj_io_vtrip_sel[29] ;
+  wire \mprj_io_vtrip_sel[2] ;
+  wire \mprj_io_vtrip_sel[30] ;
+  wire \mprj_io_vtrip_sel[31] ;
+  wire \mprj_io_vtrip_sel[32] ;
+  wire \mprj_io_vtrip_sel[33] ;
+  wire \mprj_io_vtrip_sel[34] ;
+  wire \mprj_io_vtrip_sel[35] ;
+  wire \mprj_io_vtrip_sel[36] ;
+  wire \mprj_io_vtrip_sel[37] ;
+  wire \mprj_io_vtrip_sel[3] ;
+  wire \mprj_io_vtrip_sel[4] ;
+  wire \mprj_io_vtrip_sel[5] ;
+  wire \mprj_io_vtrip_sel[6] ;
+  wire \mprj_io_vtrip_sel[7] ;
+  wire \mprj_io_vtrip_sel[8] ;
+  wire \mprj_io_vtrip_sel[9] ;
+  wire mprj_reset;
+  wire \mprj_sel_o_core[0] ;
+  wire \mprj_sel_o_core[1] ;
+  wire \mprj_sel_o_core[2] ;
+  wire \mprj_sel_o_core[3] ;
+  wire \mprj_sel_o_user[0] ;
+  wire \mprj_sel_o_user[1] ;
+  wire \mprj_sel_o_user[2] ;
+  wire \mprj_sel_o_user[3] ;
+  wire mprj_stb_o_core;
+  wire mprj_stb_o_user;
+  wire mprj_vcc_pwrgood;
+  wire mprj_vdd_pwrgood;
+  wire mprj_we_o_core;
+  wire mprj_we_o_user;
+  wire pll_clk;
+  wire pll_clk90;
+  wire por_l;
+  wire por_l_buf;
+  wire porb_h;
+  wire porb_h_buf;
+  wire porb_h_in_nc;
+  wire porb_h_out_nc;
+  wire porb_l;
+  wire \pwr_ctrl_nc[0] ;
+  wire \pwr_ctrl_nc[1] ;
+  wire \pwr_ctrl_nc[2] ;
+  wire \pwr_ctrl_nc[3] ;
+  wire qspi_enabled;
+  input resetb;
+  wire resetn_passthru;
+  wire rstb_h;
+  wire rstb_l;
+  wire rstb_l_buf;
+  wire ser_rx;
+  wire ser_tx;
+  wire \spare_xfq_nc[0] ;
+  wire \spare_xfq_nc[1] ;
+  wire \spare_xfq_nc[2] ;
+  wire \spare_xfq_nc[3] ;
+  wire \spare_xfq_nc[4] ;
+  wire \spare_xfq_nc[5] ;
+  wire \spare_xfq_nc[6] ;
+  wire \spare_xfq_nc[7] ;
+  wire \spare_xfqn_nc[0] ;
+  wire \spare_xfqn_nc[1] ;
+  wire \spare_xfqn_nc[2] ;
+  wire \spare_xfqn_nc[3] ;
+  wire \spare_xfqn_nc[4] ;
+  wire \spare_xfqn_nc[5] ;
+  wire \spare_xfqn_nc[6] ;
+  wire \spare_xfqn_nc[7] ;
+  wire \spare_xi_nc[0] ;
+  wire \spare_xi_nc[10] ;
+  wire \spare_xi_nc[11] ;
+  wire \spare_xi_nc[12] ;
+  wire \spare_xi_nc[13] ;
+  wire \spare_xi_nc[14] ;
+  wire \spare_xi_nc[15] ;
+  wire \spare_xi_nc[1] ;
+  wire \spare_xi_nc[2] ;
+  wire \spare_xi_nc[3] ;
+  wire \spare_xi_nc[4] ;
+  wire \spare_xi_nc[5] ;
+  wire \spare_xi_nc[6] ;
+  wire \spare_xi_nc[7] ;
+  wire \spare_xi_nc[8] ;
+  wire \spare_xi_nc[9] ;
+  wire \spare_xib_nc[0] ;
+  wire \spare_xib_nc[1] ;
+  wire \spare_xib_nc[2] ;
+  wire \spare_xib_nc[3] ;
+  wire \spare_xmx_nc[0] ;
+  wire \spare_xmx_nc[1] ;
+  wire \spare_xmx_nc[2] ;
+  wire \spare_xmx_nc[3] ;
+  wire \spare_xmx_nc[4] ;
+  wire \spare_xmx_nc[5] ;
+  wire \spare_xmx_nc[6] ;
+  wire \spare_xmx_nc[7] ;
+  wire \spare_xna_nc[0] ;
+  wire \spare_xna_nc[1] ;
+  wire \spare_xna_nc[2] ;
+  wire \spare_xna_nc[3] ;
+  wire \spare_xna_nc[4] ;
+  wire \spare_xna_nc[5] ;
+  wire \spare_xna_nc[6] ;
+  wire \spare_xna_nc[7] ;
+  wire \spare_xno_nc[0] ;
+  wire \spare_xno_nc[1] ;
+  wire \spare_xno_nc[2] ;
+  wire \spare_xno_nc[3] ;
+  wire \spare_xno_nc[4] ;
+  wire \spare_xno_nc[5] ;
+  wire \spare_xno_nc[6] ;
+  wire \spare_xno_nc[7] ;
+  wire \spare_xz_nc[0] ;
+  wire \spare_xz_nc[100] ;
+  wire \spare_xz_nc[101] ;
+  wire \spare_xz_nc[102] ;
+  wire \spare_xz_nc[103] ;
+  wire \spare_xz_nc[104] ;
+  wire \spare_xz_nc[105] ;
+  wire \spare_xz_nc[106] ;
+  wire \spare_xz_nc[107] ;
+  wire \spare_xz_nc[10] ;
+  wire \spare_xz_nc[11] ;
+  wire \spare_xz_nc[12] ;
+  wire \spare_xz_nc[13] ;
+  wire \spare_xz_nc[14] ;
+  wire \spare_xz_nc[15] ;
+  wire \spare_xz_nc[16] ;
+  wire \spare_xz_nc[17] ;
+  wire \spare_xz_nc[18] ;
+  wire \spare_xz_nc[19] ;
+  wire \spare_xz_nc[1] ;
+  wire \spare_xz_nc[20] ;
+  wire \spare_xz_nc[21] ;
+  wire \spare_xz_nc[22] ;
+  wire \spare_xz_nc[23] ;
+  wire \spare_xz_nc[24] ;
+  wire \spare_xz_nc[25] ;
+  wire \spare_xz_nc[26] ;
+  wire \spare_xz_nc[27] ;
+  wire \spare_xz_nc[28] ;
+  wire \spare_xz_nc[29] ;
+  wire \spare_xz_nc[2] ;
+  wire \spare_xz_nc[30] ;
+  wire \spare_xz_nc[31] ;
+  wire \spare_xz_nc[32] ;
+  wire \spare_xz_nc[33] ;
+  wire \spare_xz_nc[34] ;
+  wire \spare_xz_nc[35] ;
+  wire \spare_xz_nc[36] ;
+  wire \spare_xz_nc[37] ;
+  wire \spare_xz_nc[38] ;
+  wire \spare_xz_nc[39] ;
+  wire \spare_xz_nc[3] ;
+  wire \spare_xz_nc[40] ;
+  wire \spare_xz_nc[41] ;
+  wire \spare_xz_nc[42] ;
+  wire \spare_xz_nc[43] ;
+  wire \spare_xz_nc[44] ;
+  wire \spare_xz_nc[45] ;
+  wire \spare_xz_nc[46] ;
+  wire \spare_xz_nc[47] ;
+  wire \spare_xz_nc[48] ;
+  wire \spare_xz_nc[49] ;
+  wire \spare_xz_nc[4] ;
+  wire \spare_xz_nc[50] ;
+  wire \spare_xz_nc[51] ;
+  wire \spare_xz_nc[52] ;
+  wire \spare_xz_nc[53] ;
+  wire \spare_xz_nc[54] ;
+  wire \spare_xz_nc[55] ;
+  wire \spare_xz_nc[56] ;
+  wire \spare_xz_nc[57] ;
+  wire \spare_xz_nc[58] ;
+  wire \spare_xz_nc[59] ;
+  wire \spare_xz_nc[5] ;
+  wire \spare_xz_nc[60] ;
+  wire \spare_xz_nc[61] ;
+  wire \spare_xz_nc[62] ;
+  wire \spare_xz_nc[63] ;
+  wire \spare_xz_nc[64] ;
+  wire \spare_xz_nc[65] ;
+  wire \spare_xz_nc[66] ;
+  wire \spare_xz_nc[67] ;
+  wire \spare_xz_nc[68] ;
+  wire \spare_xz_nc[69] ;
+  wire \spare_xz_nc[6] ;
+  wire \spare_xz_nc[70] ;
+  wire \spare_xz_nc[71] ;
+  wire \spare_xz_nc[72] ;
+  wire \spare_xz_nc[73] ;
+  wire \spare_xz_nc[74] ;
+  wire \spare_xz_nc[75] ;
+  wire \spare_xz_nc[76] ;
+  wire \spare_xz_nc[77] ;
+  wire \spare_xz_nc[78] ;
+  wire \spare_xz_nc[79] ;
+  wire \spare_xz_nc[7] ;
+  wire \spare_xz_nc[80] ;
+  wire \spare_xz_nc[81] ;
+  wire \spare_xz_nc[82] ;
+  wire \spare_xz_nc[83] ;
+  wire \spare_xz_nc[84] ;
+  wire \spare_xz_nc[85] ;
+  wire \spare_xz_nc[86] ;
+  wire \spare_xz_nc[87] ;
+  wire \spare_xz_nc[88] ;
+  wire \spare_xz_nc[89] ;
+  wire \spare_xz_nc[8] ;
+  wire \spare_xz_nc[90] ;
+  wire \spare_xz_nc[91] ;
+  wire \spare_xz_nc[92] ;
+  wire \spare_xz_nc[93] ;
+  wire \spare_xz_nc[94] ;
+  wire \spare_xz_nc[95] ;
+  wire \spare_xz_nc[96] ;
+  wire \spare_xz_nc[97] ;
+  wire \spare_xz_nc[98] ;
+  wire \spare_xz_nc[99] ;
+  wire \spare_xz_nc[9] ;
+  wire spi_csb;
+  wire spi_enabled;
+  wire \spi_pll90_sel[0] ;
+  wire \spi_pll90_sel[1] ;
+  wire \spi_pll90_sel[2] ;
+  wire spi_pll_dco_ena;
+  wire \spi_pll_div[0] ;
+  wire \spi_pll_div[1] ;
+  wire \spi_pll_div[2] ;
+  wire \spi_pll_div[3] ;
+  wire \spi_pll_div[4] ;
+  wire spi_pll_ena;
+  wire \spi_pll_sel[0] ;
+  wire \spi_pll_sel[1] ;
+  wire \spi_pll_sel[2] ;
+  wire \spi_pll_trim[0] ;
+  wire \spi_pll_trim[10] ;
+  wire \spi_pll_trim[11] ;
+  wire \spi_pll_trim[12] ;
+  wire \spi_pll_trim[13] ;
+  wire \spi_pll_trim[14] ;
+  wire \spi_pll_trim[15] ;
+  wire \spi_pll_trim[16] ;
+  wire \spi_pll_trim[17] ;
+  wire \spi_pll_trim[18] ;
+  wire \spi_pll_trim[19] ;
+  wire \spi_pll_trim[1] ;
+  wire \spi_pll_trim[20] ;
+  wire \spi_pll_trim[21] ;
+  wire \spi_pll_trim[22] ;
+  wire \spi_pll_trim[23] ;
+  wire \spi_pll_trim[24] ;
+  wire \spi_pll_trim[25] ;
+  wire \spi_pll_trim[2] ;
+  wire \spi_pll_trim[3] ;
+  wire \spi_pll_trim[4] ;
+  wire \spi_pll_trim[5] ;
+  wire \spi_pll_trim[6] ;
+  wire \spi_pll_trim[7] ;
+  wire \spi_pll_trim[8] ;
+  wire \spi_pll_trim[9] ;
+  wire spi_sck;
+  wire spi_sdi;
+  wire spi_sdo;
+  wire spi_sdoenb;
+  wire trap;
+  wire uart_enabled;
+  wire \user_analog_io[0] ;
+  wire \user_analog_io[10] ;
+  wire \user_analog_io[11] ;
+  wire \user_analog_io[12] ;
+  wire \user_analog_io[13] ;
+  wire \user_analog_io[14] ;
+  wire \user_analog_io[15] ;
+  wire \user_analog_io[16] ;
+  wire \user_analog_io[17] ;
+  wire \user_analog_io[18] ;
+  wire \user_analog_io[19] ;
+  wire \user_analog_io[1] ;
+  wire \user_analog_io[20] ;
+  wire \user_analog_io[21] ;
+  wire \user_analog_io[22] ;
+  wire \user_analog_io[23] ;
+  wire \user_analog_io[24] ;
+  wire \user_analog_io[25] ;
+  wire \user_analog_io[26] ;
+  wire \user_analog_io[27] ;
+  wire \user_analog_io[28] ;
+  wire \user_analog_io[2] ;
+  wire \user_analog_io[3] ;
+  wire \user_analog_io[4] ;
+  wire \user_analog_io[5] ;
+  wire \user_analog_io[6] ;
+  wire \user_analog_io[7] ;
+  wire \user_analog_io[8] ;
+  wire \user_analog_io[9] ;
+  wire \user_io_in[0] ;
+  wire \user_io_in[10] ;
+  wire \user_io_in[11] ;
+  wire \user_io_in[12] ;
+  wire \user_io_in[13] ;
+  wire \user_io_in[14] ;
+  wire \user_io_in[15] ;
+  wire \user_io_in[16] ;
+  wire \user_io_in[17] ;
+  wire \user_io_in[18] ;
+  wire \user_io_in[19] ;
+  wire \user_io_in[1] ;
+  wire \user_io_in[20] ;
+  wire \user_io_in[21] ;
+  wire \user_io_in[22] ;
+  wire \user_io_in[23] ;
+  wire \user_io_in[24] ;
+  wire \user_io_in[25] ;
+  wire \user_io_in[26] ;
+  wire \user_io_in[27] ;
+  wire \user_io_in[28] ;
+  wire \user_io_in[29] ;
+  wire \user_io_in[2] ;
+  wire \user_io_in[30] ;
+  wire \user_io_in[31] ;
+  wire \user_io_in[32] ;
+  wire \user_io_in[33] ;
+  wire \user_io_in[34] ;
+  wire \user_io_in[35] ;
+  wire \user_io_in[36] ;
+  wire \user_io_in[37] ;
+  wire \user_io_in[3] ;
+  wire \user_io_in[4] ;
+  wire \user_io_in[5] ;
+  wire \user_io_in[6] ;
+  wire \user_io_in[7] ;
+  wire \user_io_in[8] ;
+  wire \user_io_in[9] ;
+  wire \user_io_oeb[0] ;
+  wire \user_io_oeb[10] ;
+  wire \user_io_oeb[11] ;
+  wire \user_io_oeb[12] ;
+  wire \user_io_oeb[13] ;
+  wire \user_io_oeb[14] ;
+  wire \user_io_oeb[15] ;
+  wire \user_io_oeb[16] ;
+  wire \user_io_oeb[17] ;
+  wire \user_io_oeb[18] ;
+  wire \user_io_oeb[19] ;
+  wire \user_io_oeb[1] ;
+  wire \user_io_oeb[20] ;
+  wire \user_io_oeb[21] ;
+  wire \user_io_oeb[22] ;
+  wire \user_io_oeb[23] ;
+  wire \user_io_oeb[24] ;
+  wire \user_io_oeb[25] ;
+  wire \user_io_oeb[26] ;
+  wire \user_io_oeb[27] ;
+  wire \user_io_oeb[28] ;
+  wire \user_io_oeb[29] ;
+  wire \user_io_oeb[2] ;
+  wire \user_io_oeb[30] ;
+  wire \user_io_oeb[31] ;
+  wire \user_io_oeb[32] ;
+  wire \user_io_oeb[33] ;
+  wire \user_io_oeb[34] ;
+  wire \user_io_oeb[35] ;
+  wire \user_io_oeb[36] ;
+  wire \user_io_oeb[37] ;
+  wire \user_io_oeb[3] ;
+  wire \user_io_oeb[4] ;
+  wire \user_io_oeb[5] ;
+  wire \user_io_oeb[6] ;
+  wire \user_io_oeb[7] ;
+  wire \user_io_oeb[8] ;
+  wire \user_io_oeb[9] ;
+  wire \user_io_out[0] ;
+  wire \user_io_out[10] ;
+  wire \user_io_out[11] ;
+  wire \user_io_out[12] ;
+  wire \user_io_out[13] ;
+  wire \user_io_out[14] ;
+  wire \user_io_out[15] ;
+  wire \user_io_out[16] ;
+  wire \user_io_out[17] ;
+  wire \user_io_out[18] ;
+  wire \user_io_out[19] ;
+  wire \user_io_out[1] ;
+  wire \user_io_out[20] ;
+  wire \user_io_out[21] ;
+  wire \user_io_out[22] ;
+  wire \user_io_out[23] ;
+  wire \user_io_out[24] ;
+  wire \user_io_out[25] ;
+  wire \user_io_out[26] ;
+  wire \user_io_out[27] ;
+  wire \user_io_out[28] ;
+  wire \user_io_out[29] ;
+  wire \user_io_out[2] ;
+  wire \user_io_out[30] ;
+  wire \user_io_out[31] ;
+  wire \user_io_out[32] ;
+  wire \user_io_out[33] ;
+  wire \user_io_out[34] ;
+  wire \user_io_out[35] ;
+  wire \user_io_out[36] ;
+  wire \user_io_out[37] ;
+  wire \user_io_out[3] ;
+  wire \user_io_out[4] ;
+  wire \user_io_out[5] ;
+  wire \user_io_out[6] ;
+  wire \user_io_out[7] ;
+  wire \user_io_out[8] ;
+  wire \user_io_out[9] ;
+  wire \user_irq[0] ;
+  wire \user_irq[1] ;
+  wire \user_irq[2] ;
+  wire \user_irq_core[0] ;
+  wire \user_irq_core[1] ;
+  wire \user_irq_core[2] ;
+  wire \user_irq_ena[0] ;
+  wire \user_irq_ena[1] ;
+  wire \user_irq_ena[2] ;
+  inout vccd;
+  inout vccd1;
+  wire vccd1_core;
+  inout vccd2;
+  wire vccd2_core;
+  wire vccd_core;
+  inout vdda;
+  inout vdda1;
+  inout vdda1_2;
+  wire vdda1_core;
+  inout vdda2;
+  wire vdda2_core;
+  wire vdda_core;
+  inout vddio;
+  inout vddio_2;
+  wire vddio_core;
+  inout vssa;
+  inout vssa1;
+  inout vssa1_2;
+  wire vssa1_core;
+  inout vssa2;
+  wire vssa2_core;
+  wire vssa_core;
+  inout vssd;
+  inout vssd1;
+  wire vssd1_core;
+  inout vssd2;
+  wire vssd2_core;
+  wire vssd_core;
+  inout vssio;
+  inout vssio_2;
+  wire vssio_core;
+  caravel_clocking clock_ctrl (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .core_clk(caravel_clk),
+    .ext_clk(clock_core_buf),
+    .ext_clk_sel(ext_clk_sel),
+    .ext_reset(ext_reset),
+    .pll_clk(pll_clk),
+    .pll_clk90(pll_clk90),
+    .resetb(rstb_l_buf),
+    .resetb_sync(caravel_rstn),
+    .sel({ \spi_pll_sel[2] , \spi_pll_sel[1] , \spi_pll_sel[0]  }),
+    .sel2({ \spi_pll90_sel[2] , \spi_pll90_sel[1] , \spi_pll90_sel[0]  }),
+    .user_clk(caravel_clk2)
+  );
+  buff_flash_clkrst flash_clkrst_buffers (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .in_n({ caravel_clk, caravel_rstn, flash_clk_frame, flash_csb_frame, flash_clk_oeb, flash_csb_oeb, flash_io0_oeb, flash_io1_oeb, flash_io0_ieb, flash_io1_ieb, flash_io0_do, flash_io1_do }),
+    .in_s({ clock_core, flash_io1_di, flash_io0_di }),
+    .out_n({ clock_core_buf, flash_io1_di_buf, flash_io0_di_buf }),
+    .out_s({ caravel_clk_buf, caravel_rstn_buf, flash_clk_frame_buf, flash_csb_frame_buf, flash_clk_oeb_buf, flash_csb_oeb_buf, flash_io0_oeb_buf, flash_io1_oeb_buf, flash_io0_ieb_buf, flash_io1_ieb_buf, flash_io0_do_buf, flash_io1_do_buf })
+  );
+  gpio_control_block \gpio_control_bidir_1[0]  (
+    .gpio_defaults({ \gpio_defaults[12] , \gpio_defaults[11] , \gpio_defaults[10] , \gpio_defaults[9] , \gpio_defaults[8] , \gpio_defaults[7] , \gpio_defaults[6] , \gpio_defaults[5] , \gpio_defaults[4] , \gpio_defaults[3] , \gpio_defaults[2] , \gpio_defaults[1] , \gpio_defaults[0]  }),
+    .mgmt_gpio_in(\mgmt_io_in[0] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[0] ),
+    .mgmt_gpio_out(\mgmt_io_out[0] ),
+    .one(\mprj_io_one[0] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[0] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[0] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[0] ),
+    .pad_gpio_dm({ \mprj_io_dm[2] , \mprj_io_dm[1] , \mprj_io_dm[0]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[0] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[0] ),
+    .pad_gpio_in(\mprj_io_in[0] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[0] ),
+    .pad_gpio_out(\mprj_io_out[0] ),
+    .pad_gpio_outenb(\mprj_io_oeb[0] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[0] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[0] ),
+    .resetn(\gpio_resetn_1_shifted[0] ),
+    .resetn_out(\gpio_resetn_1[0] ),
+    .serial_clock(\gpio_clock_1_shifted[0] ),
+    .serial_clock_out(\gpio_clock_1[0] ),
+    .serial_data_in(\gpio_serial_link_1_shifted[0] ),
+    .serial_data_out(\gpio_serial_link_1[0] ),
+    .serial_load(\gpio_load_1_shifted[0] ),
+    .serial_load_out(\gpio_load_1[0] ),
+    .user_gpio_in(\user_io_in[0] ),
+    .user_gpio_oeb(\user_io_oeb[0] ),
+    .user_gpio_out(\user_io_out[0] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_1[1]  (
+    .gpio_defaults({ \gpio_defaults[25] , \gpio_defaults[24] , \gpio_defaults[23] , \gpio_defaults[22] , \gpio_defaults[21] , \gpio_defaults[20] , \gpio_defaults[19] , \gpio_defaults[18] , \gpio_defaults[17] , \gpio_defaults[16] , \gpio_defaults[15] , \gpio_defaults[14] , \gpio_defaults[13]  }),
+    .mgmt_gpio_in(\mgmt_io_in[1] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[1] ),
+    .mgmt_gpio_out(\mgmt_io_out[1] ),
+    .one(\mprj_io_one[1] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[1] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[1] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[1] ),
+    .pad_gpio_dm({ \mprj_io_dm[5] , \mprj_io_dm[4] , \mprj_io_dm[3]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[1] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[1] ),
+    .pad_gpio_in(\mprj_io_in[1] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[1] ),
+    .pad_gpio_out(\mprj_io_out[1] ),
+    .pad_gpio_outenb(\mprj_io_oeb[1] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[1] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[1] ),
+    .resetn(\gpio_resetn_1[0] ),
+    .resetn_out(\gpio_resetn_1[1] ),
+    .serial_clock(\gpio_clock_1[0] ),
+    .serial_clock_out(\gpio_clock_1[1] ),
+    .serial_data_in(\gpio_serial_link_1[0] ),
+    .serial_data_out(\gpio_serial_link_1[1] ),
+    .serial_load(\gpio_load_1[0] ),
+    .serial_load_out(\gpio_load_1[1] ),
+    .user_gpio_in(\user_io_in[1] ),
+    .user_gpio_oeb(\user_io_oeb[1] ),
+    .user_gpio_out(\user_io_out[1] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_2[0]  (
+    .gpio_defaults({ \gpio_defaults[467] , \gpio_defaults[466] , \gpio_defaults[465] , \gpio_defaults[464] , \gpio_defaults[463] , \gpio_defaults[462] , \gpio_defaults[461] , \gpio_defaults[460] , \gpio_defaults[459] , \gpio_defaults[458] , \gpio_defaults[457] , \gpio_defaults[456] , \gpio_defaults[455]  }),
+    .mgmt_gpio_in(\mgmt_io_in[35] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[35] ),
+    .mgmt_gpio_out(\mgmt_io_out[35] ),
+    .one(\mprj_io_one[35] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[35] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[35] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[35] ),
+    .pad_gpio_dm({ \mprj_io_dm[107] , \mprj_io_dm[106] , \mprj_io_dm[105]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[35] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[35] ),
+    .pad_gpio_in(\mprj_io_in[35] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[35] ),
+    .pad_gpio_out(\mprj_io_out[35] ),
+    .pad_gpio_outenb(\mprj_io_oeb[35] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[35] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[35] ),
+    .resetn(\gpio_resetn_2[17] ),
+    .resetn_out(\gpio_resetn_2[16] ),
+    .serial_clock(\gpio_clock_2[17] ),
+    .serial_clock_out(\gpio_clock_2[16] ),
+    .serial_data_in(\gpio_serial_link_2[17] ),
+    .serial_data_out(\gpio_serial_link_2[16] ),
+    .serial_load(\gpio_load_2[17] ),
+    .serial_load_out(\gpio_load_2[16] ),
+    .user_gpio_in(\user_io_in[35] ),
+    .user_gpio_oeb(\user_io_oeb[35] ),
+    .user_gpio_out(\user_io_out[35] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_2[1]  (
+    .gpio_defaults({ \gpio_defaults[480] , \gpio_defaults[479] , \gpio_defaults[478] , \gpio_defaults[477] , \gpio_defaults[476] , \gpio_defaults[475] , \gpio_defaults[474] , \gpio_defaults[473] , \gpio_defaults[472] , \gpio_defaults[471] , \gpio_defaults[470] , \gpio_defaults[469] , \gpio_defaults[468]  }),
+    .mgmt_gpio_in(\mgmt_io_in[36] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[36] ),
+    .mgmt_gpio_out(\mgmt_io_out[36] ),
+    .one(\mprj_io_one[36] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[36] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[36] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[36] ),
+    .pad_gpio_dm({ \mprj_io_dm[110] , \mprj_io_dm[109] , \mprj_io_dm[108]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[36] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[36] ),
+    .pad_gpio_in(\mprj_io_in[36] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[36] ),
+    .pad_gpio_out(\mprj_io_out[36] ),
+    .pad_gpio_outenb(\mprj_io_oeb[36] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[36] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[36] ),
+    .resetn(\gpio_resetn_2[18] ),
+    .resetn_out(\gpio_resetn_2[17] ),
+    .serial_clock(\gpio_clock_2[18] ),
+    .serial_clock_out(\gpio_clock_2[17] ),
+    .serial_data_in(\gpio_serial_link_2[18] ),
+    .serial_data_out(\gpio_serial_link_2[17] ),
+    .serial_load(\gpio_load_2[18] ),
+    .serial_load_out(\gpio_load_2[17] ),
+    .user_gpio_in(\user_io_in[36] ),
+    .user_gpio_oeb(\user_io_oeb[36] ),
+    .user_gpio_out(\user_io_out[36] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_2[2]  (
+    .gpio_defaults({ \gpio_defaults[493] , \gpio_defaults[492] , \gpio_defaults[491] , \gpio_defaults[490] , \gpio_defaults[489] , \gpio_defaults[488] , \gpio_defaults[487] , \gpio_defaults[486] , \gpio_defaults[485] , \gpio_defaults[484] , \gpio_defaults[483] , \gpio_defaults[482] , \gpio_defaults[481]  }),
+    .mgmt_gpio_in(\mgmt_io_in[37] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[37] ),
+    .mgmt_gpio_out(\mgmt_io_out[37] ),
+    .one(\mprj_io_one[37] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[37] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[37] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[37] ),
+    .pad_gpio_dm({ \mprj_io_dm[113] , \mprj_io_dm[112] , \mprj_io_dm[111]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[37] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[37] ),
+    .pad_gpio_in(\mprj_io_in[37] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[37] ),
+    .pad_gpio_out(\mprj_io_out[37] ),
+    .pad_gpio_outenb(\mprj_io_oeb[37] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[37] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[37] ),
+    .resetn(\gpio_resetn_2_shifted[18] ),
+    .resetn_out(\gpio_resetn_2[18] ),
+    .serial_clock(\gpio_clock_2_shifted[18] ),
+    .serial_clock_out(\gpio_clock_2[18] ),
+    .serial_data_in(\gpio_serial_link_2_shifted[18] ),
+    .serial_data_out(\gpio_serial_link_2[18] ),
+    .serial_load(\gpio_load_2_shifted[18] ),
+    .serial_load_out(\gpio_load_2[18] ),
+    .user_gpio_in(\user_io_in[37] ),
+    .user_gpio_oeb(\user_io_oeb[37] ),
+    .user_gpio_out(\user_io_out[37] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[0]  (
+    .gpio_defaults({ \gpio_defaults[116] , \gpio_defaults[115] , \gpio_defaults[114] , \gpio_defaults[113] , \gpio_defaults[112] , \gpio_defaults[111] , \gpio_defaults[110] , \gpio_defaults[109] , \gpio_defaults[108] , \gpio_defaults[107] , \gpio_defaults[106] , \gpio_defaults[105] , \gpio_defaults[104]  }),
+    .mgmt_gpio_in(\mgmt_io_in[8] ),
+    .mgmt_gpio_oeb(\mprj_io_one[8] ),
+    .mgmt_gpio_out(\mgmt_io_out[8] ),
+    .one(\mprj_io_one[8] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[8] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[8] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[8] ),
+    .pad_gpio_dm({ \mprj_io_dm[26] , \mprj_io_dm[25] , \mprj_io_dm[24]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[8] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[8] ),
+    .pad_gpio_in(\mprj_io_in[8] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[8] ),
+    .pad_gpio_out(\mprj_io_out[8] ),
+    .pad_gpio_outenb(\mprj_io_oeb[8] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[8] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[8] ),
+    .resetn(\gpio_resetn_1[7] ),
+    .resetn_out(\gpio_resetn_1[8] ),
+    .serial_clock(\gpio_clock_1[7] ),
+    .serial_clock_out(\gpio_clock_1[8] ),
+    .serial_data_in(\gpio_serial_link_1[7] ),
+    .serial_data_out(\gpio_serial_link_1[8] ),
+    .serial_load(\gpio_load_1[7] ),
+    .serial_load_out(\gpio_load_1[8] ),
+    .user_gpio_in(\user_io_in[8] ),
+    .user_gpio_oeb(\user_io_oeb[8] ),
+    .user_gpio_out(\user_io_out[8] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[10]  (
+    .gpio_defaults({ \gpio_defaults[246] , \gpio_defaults[245] , \gpio_defaults[244] , \gpio_defaults[243] , \gpio_defaults[242] , \gpio_defaults[241] , \gpio_defaults[240] , \gpio_defaults[239] , \gpio_defaults[238] , \gpio_defaults[237] , \gpio_defaults[236] , \gpio_defaults[235] , \gpio_defaults[234]  }),
+    .mgmt_gpio_in(\mgmt_io_in[18] ),
+    .mgmt_gpio_oeb(\mprj_io_one[18] ),
+    .mgmt_gpio_out(\mgmt_io_out[18] ),
+    .one(\mprj_io_one[18] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[18] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[18] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[18] ),
+    .pad_gpio_dm({ \mprj_io_dm[56] , \mprj_io_dm[55] , \mprj_io_dm[54]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[18] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[18] ),
+    .pad_gpio_in(\mprj_io_in[18] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[18] ),
+    .pad_gpio_out(\mprj_io_out[18] ),
+    .pad_gpio_outenb(\mprj_io_oeb[18] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[18] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[18] ),
+    .resetn(\gpio_resetn_1[17] ),
+    .resetn_out(\gpio_resetn_1[18] ),
+    .serial_clock(\gpio_clock_1[17] ),
+    .serial_clock_out(\gpio_clock_1[18] ),
+    .serial_data_in(\gpio_serial_link_1[17] ),
+    .serial_data_out(\gpio_serial_link_1[18] ),
+    .serial_load(\gpio_load_1[17] ),
+    .serial_load_out(\gpio_load_1[18] ),
+    .user_gpio_in(\user_io_in[18] ),
+    .user_gpio_oeb(\user_io_oeb[18] ),
+    .user_gpio_out(\user_io_out[18] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[1]  (
+    .gpio_defaults({ \gpio_defaults[129] , \gpio_defaults[128] , \gpio_defaults[127] , \gpio_defaults[126] , \gpio_defaults[125] , \gpio_defaults[124] , \gpio_defaults[123] , \gpio_defaults[122] , \gpio_defaults[121] , \gpio_defaults[120] , \gpio_defaults[119] , \gpio_defaults[118] , \gpio_defaults[117]  }),
+    .mgmt_gpio_in(\mgmt_io_in[9] ),
+    .mgmt_gpio_oeb(\mprj_io_one[9] ),
+    .mgmt_gpio_out(\mgmt_io_out[9] ),
+    .one(\mprj_io_one[9] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[9] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[9] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[9] ),
+    .pad_gpio_dm({ \mprj_io_dm[29] , \mprj_io_dm[28] , \mprj_io_dm[27]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[9] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[9] ),
+    .pad_gpio_in(\mprj_io_in[9] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[9] ),
+    .pad_gpio_out(\mprj_io_out[9] ),
+    .pad_gpio_outenb(\mprj_io_oeb[9] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[9] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[9] ),
+    .resetn(\gpio_resetn_1[8] ),
+    .resetn_out(\gpio_resetn_1[9] ),
+    .serial_clock(\gpio_clock_1[8] ),
+    .serial_clock_out(\gpio_clock_1[9] ),
+    .serial_data_in(\gpio_serial_link_1[8] ),
+    .serial_data_out(\gpio_serial_link_1[9] ),
+    .serial_load(\gpio_load_1[8] ),
+    .serial_load_out(\gpio_load_1[9] ),
+    .user_gpio_in(\user_io_in[9] ),
+    .user_gpio_oeb(\user_io_oeb[9] ),
+    .user_gpio_out(\user_io_out[9] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[2]  (
+    .gpio_defaults({ \gpio_defaults[142] , \gpio_defaults[141] , \gpio_defaults[140] , \gpio_defaults[139] , \gpio_defaults[138] , \gpio_defaults[137] , \gpio_defaults[136] , \gpio_defaults[135] , \gpio_defaults[134] , \gpio_defaults[133] , \gpio_defaults[132] , \gpio_defaults[131] , \gpio_defaults[130]  }),
+    .mgmt_gpio_in(\mgmt_io_in[10] ),
+    .mgmt_gpio_oeb(\mprj_io_one[10] ),
+    .mgmt_gpio_out(\mgmt_io_out[10] ),
+    .one(\mprj_io_one[10] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[10] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[10] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[10] ),
+    .pad_gpio_dm({ \mprj_io_dm[32] , \mprj_io_dm[31] , \mprj_io_dm[30]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[10] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[10] ),
+    .pad_gpio_in(\mprj_io_in[10] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[10] ),
+    .pad_gpio_out(\mprj_io_out[10] ),
+    .pad_gpio_outenb(\mprj_io_oeb[10] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[10] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[10] ),
+    .resetn(\gpio_resetn_1[9] ),
+    .resetn_out(\gpio_resetn_1[10] ),
+    .serial_clock(\gpio_clock_1[9] ),
+    .serial_clock_out(\gpio_clock_1[10] ),
+    .serial_data_in(\gpio_serial_link_1[9] ),
+    .serial_data_out(\gpio_serial_link_1[10] ),
+    .serial_load(\gpio_load_1[9] ),
+    .serial_load_out(\gpio_load_1[10] ),
+    .user_gpio_in(\user_io_in[10] ),
+    .user_gpio_oeb(\user_io_oeb[10] ),
+    .user_gpio_out(\user_io_out[10] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[3]  (
+    .gpio_defaults({ \gpio_defaults[155] , \gpio_defaults[154] , \gpio_defaults[153] , \gpio_defaults[152] , \gpio_defaults[151] , \gpio_defaults[150] , \gpio_defaults[149] , \gpio_defaults[148] , \gpio_defaults[147] , \gpio_defaults[146] , \gpio_defaults[145] , \gpio_defaults[144] , \gpio_defaults[143]  }),
+    .mgmt_gpio_in(\mgmt_io_in[11] ),
+    .mgmt_gpio_oeb(\mprj_io_one[11] ),
+    .mgmt_gpio_out(\mgmt_io_out[11] ),
+    .one(\mprj_io_one[11] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[11] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[11] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[11] ),
+    .pad_gpio_dm({ \mprj_io_dm[35] , \mprj_io_dm[34] , \mprj_io_dm[33]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[11] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[11] ),
+    .pad_gpio_in(\mprj_io_in[11] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[11] ),
+    .pad_gpio_out(\mprj_io_out[11] ),
+    .pad_gpio_outenb(\mprj_io_oeb[11] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[11] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[11] ),
+    .resetn(\gpio_resetn_1[10] ),
+    .resetn_out(\gpio_resetn_1[11] ),
+    .serial_clock(\gpio_clock_1[10] ),
+    .serial_clock_out(\gpio_clock_1[11] ),
+    .serial_data_in(\gpio_serial_link_1[10] ),
+    .serial_data_out(\gpio_serial_link_1[11] ),
+    .serial_load(\gpio_load_1[10] ),
+    .serial_load_out(\gpio_load_1[11] ),
+    .user_gpio_in(\user_io_in[11] ),
+    .user_gpio_oeb(\user_io_oeb[11] ),
+    .user_gpio_out(\user_io_out[11] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[4]  (
+    .gpio_defaults({ \gpio_defaults[168] , \gpio_defaults[167] , \gpio_defaults[166] , \gpio_defaults[165] , \gpio_defaults[164] , \gpio_defaults[163] , \gpio_defaults[162] , \gpio_defaults[161] , \gpio_defaults[160] , \gpio_defaults[159] , \gpio_defaults[158] , \gpio_defaults[157] , \gpio_defaults[156]  }),
+    .mgmt_gpio_in(\mgmt_io_in[12] ),
+    .mgmt_gpio_oeb(\mprj_io_one[12] ),
+    .mgmt_gpio_out(\mgmt_io_out[12] ),
+    .one(\mprj_io_one[12] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[12] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[12] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[12] ),
+    .pad_gpio_dm({ \mprj_io_dm[38] , \mprj_io_dm[37] , \mprj_io_dm[36]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[12] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[12] ),
+    .pad_gpio_in(\mprj_io_in[12] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[12] ),
+    .pad_gpio_out(\mprj_io_out[12] ),
+    .pad_gpio_outenb(\mprj_io_oeb[12] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[12] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[12] ),
+    .resetn(\gpio_resetn_1[11] ),
+    .resetn_out(\gpio_resetn_1[12] ),
+    .serial_clock(\gpio_clock_1[11] ),
+    .serial_clock_out(\gpio_clock_1[12] ),
+    .serial_data_in(\gpio_serial_link_1[11] ),
+    .serial_data_out(\gpio_serial_link_1[12] ),
+    .serial_load(\gpio_load_1[11] ),
+    .serial_load_out(\gpio_load_1[12] ),
+    .user_gpio_in(\user_io_in[12] ),
+    .user_gpio_oeb(\user_io_oeb[12] ),
+    .user_gpio_out(\user_io_out[12] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[5]  (
+    .gpio_defaults({ \gpio_defaults[181] , \gpio_defaults[180] , \gpio_defaults[179] , \gpio_defaults[178] , \gpio_defaults[177] , \gpio_defaults[176] , \gpio_defaults[175] , \gpio_defaults[174] , \gpio_defaults[173] , \gpio_defaults[172] , \gpio_defaults[171] , \gpio_defaults[170] , \gpio_defaults[169]  }),
+    .mgmt_gpio_in(\mgmt_io_in[13] ),
+    .mgmt_gpio_oeb(\mprj_io_one[13] ),
+    .mgmt_gpio_out(\mgmt_io_out[13] ),
+    .one(\mprj_io_one[13] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[13] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[13] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[13] ),
+    .pad_gpio_dm({ \mprj_io_dm[41] , \mprj_io_dm[40] , \mprj_io_dm[39]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[13] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[13] ),
+    .pad_gpio_in(\mprj_io_in[13] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[13] ),
+    .pad_gpio_out(\mprj_io_out[13] ),
+    .pad_gpio_outenb(\mprj_io_oeb[13] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[13] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[13] ),
+    .resetn(\gpio_resetn_1[12] ),
+    .resetn_out(\gpio_resetn_1[13] ),
+    .serial_clock(\gpio_clock_1[12] ),
+    .serial_clock_out(\gpio_clock_1[13] ),
+    .serial_data_in(\gpio_serial_link_1[12] ),
+    .serial_data_out(\gpio_serial_link_1[13] ),
+    .serial_load(\gpio_load_1[12] ),
+    .serial_load_out(\gpio_load_1[13] ),
+    .user_gpio_in(\user_io_in[13] ),
+    .user_gpio_oeb(\user_io_oeb[13] ),
+    .user_gpio_out(\user_io_out[13] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[6]  (
+    .gpio_defaults({ \gpio_defaults[194] , \gpio_defaults[193] , \gpio_defaults[192] , \gpio_defaults[191] , \gpio_defaults[190] , \gpio_defaults[189] , \gpio_defaults[188] , \gpio_defaults[187] , \gpio_defaults[186] , \gpio_defaults[185] , \gpio_defaults[184] , \gpio_defaults[183] , \gpio_defaults[182]  }),
+    .mgmt_gpio_in(\mgmt_io_in[14] ),
+    .mgmt_gpio_oeb(\mprj_io_one[14] ),
+    .mgmt_gpio_out(\mgmt_io_out[14] ),
+    .one(\mprj_io_one[14] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[14] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[14] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[14] ),
+    .pad_gpio_dm({ \mprj_io_dm[44] , \mprj_io_dm[43] , \mprj_io_dm[42]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[14] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[14] ),
+    .pad_gpio_in(\mprj_io_in[14] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[14] ),
+    .pad_gpio_out(\mprj_io_out[14] ),
+    .pad_gpio_outenb(\mprj_io_oeb[14] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[14] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[14] ),
+    .resetn(\gpio_resetn_1[13] ),
+    .resetn_out(\gpio_resetn_1[14] ),
+    .serial_clock(\gpio_clock_1[13] ),
+    .serial_clock_out(\gpio_clock_1[14] ),
+    .serial_data_in(\gpio_serial_link_1[13] ),
+    .serial_data_out(\gpio_serial_link_1[14] ),
+    .serial_load(\gpio_load_1[13] ),
+    .serial_load_out(\gpio_load_1[14] ),
+    .user_gpio_in(\user_io_in[14] ),
+    .user_gpio_oeb(\user_io_oeb[14] ),
+    .user_gpio_out(\user_io_out[14] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[7]  (
+    .gpio_defaults({ \gpio_defaults[207] , \gpio_defaults[206] , \gpio_defaults[205] , \gpio_defaults[204] , \gpio_defaults[203] , \gpio_defaults[202] , \gpio_defaults[201] , \gpio_defaults[200] , \gpio_defaults[199] , \gpio_defaults[198] , \gpio_defaults[197] , \gpio_defaults[196] , \gpio_defaults[195]  }),
+    .mgmt_gpio_in(\mgmt_io_in[15] ),
+    .mgmt_gpio_oeb(\mprj_io_one[15] ),
+    .mgmt_gpio_out(\mgmt_io_out[15] ),
+    .one(\mprj_io_one[15] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[15] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[15] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[15] ),
+    .pad_gpio_dm({ \mprj_io_dm[47] , \mprj_io_dm[46] , \mprj_io_dm[45]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[15] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[15] ),
+    .pad_gpio_in(\mprj_io_in[15] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[15] ),
+    .pad_gpio_out(\mprj_io_out[15] ),
+    .pad_gpio_outenb(\mprj_io_oeb[15] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[15] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[15] ),
+    .resetn(\gpio_resetn_1[14] ),
+    .resetn_out(\gpio_resetn_1[15] ),
+    .serial_clock(\gpio_clock_1[14] ),
+    .serial_clock_out(\gpio_clock_1[15] ),
+    .serial_data_in(\gpio_serial_link_1[14] ),
+    .serial_data_out(\gpio_serial_link_1[15] ),
+    .serial_load(\gpio_load_1[14] ),
+    .serial_load_out(\gpio_load_1[15] ),
+    .user_gpio_in(\user_io_in[15] ),
+    .user_gpio_oeb(\user_io_oeb[15] ),
+    .user_gpio_out(\user_io_out[15] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[8]  (
+    .gpio_defaults({ \gpio_defaults[220] , \gpio_defaults[219] , \gpio_defaults[218] , \gpio_defaults[217] , \gpio_defaults[216] , \gpio_defaults[215] , \gpio_defaults[214] , \gpio_defaults[213] , \gpio_defaults[212] , \gpio_defaults[211] , \gpio_defaults[210] , \gpio_defaults[209] , \gpio_defaults[208]  }),
+    .mgmt_gpio_in(\mgmt_io_in[16] ),
+    .mgmt_gpio_oeb(\mprj_io_one[16] ),
+    .mgmt_gpio_out(\mgmt_io_out[16] ),
+    .one(\mprj_io_one[16] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[16] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[16] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[16] ),
+    .pad_gpio_dm({ \mprj_io_dm[50] , \mprj_io_dm[49] , \mprj_io_dm[48]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[16] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[16] ),
+    .pad_gpio_in(\mprj_io_in[16] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[16] ),
+    .pad_gpio_out(\mprj_io_out[16] ),
+    .pad_gpio_outenb(\mprj_io_oeb[16] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[16] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[16] ),
+    .resetn(\gpio_resetn_1[15] ),
+    .resetn_out(\gpio_resetn_1[16] ),
+    .serial_clock(\gpio_clock_1[15] ),
+    .serial_clock_out(\gpio_clock_1[16] ),
+    .serial_data_in(\gpio_serial_link_1[15] ),
+    .serial_data_out(\gpio_serial_link_1[16] ),
+    .serial_load(\gpio_load_1[15] ),
+    .serial_load_out(\gpio_load_1[16] ),
+    .user_gpio_in(\user_io_in[16] ),
+    .user_gpio_oeb(\user_io_oeb[16] ),
+    .user_gpio_out(\user_io_out[16] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[9]  (
+    .gpio_defaults({ \gpio_defaults[233] , \gpio_defaults[232] , \gpio_defaults[231] , \gpio_defaults[230] , \gpio_defaults[229] , \gpio_defaults[228] , \gpio_defaults[227] , \gpio_defaults[226] , \gpio_defaults[225] , \gpio_defaults[224] , \gpio_defaults[223] , \gpio_defaults[222] , \gpio_defaults[221]  }),
+    .mgmt_gpio_in(\mgmt_io_in[17] ),
+    .mgmt_gpio_oeb(\mprj_io_one[17] ),
+    .mgmt_gpio_out(\mgmt_io_out[17] ),
+    .one(\mprj_io_one[17] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[17] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[17] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[17] ),
+    .pad_gpio_dm({ \mprj_io_dm[53] , \mprj_io_dm[52] , \mprj_io_dm[51]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[17] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[17] ),
+    .pad_gpio_in(\mprj_io_in[17] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[17] ),
+    .pad_gpio_out(\mprj_io_out[17] ),
+    .pad_gpio_outenb(\mprj_io_oeb[17] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[17] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[17] ),
+    .resetn(\gpio_resetn_1[16] ),
+    .resetn_out(\gpio_resetn_1[17] ),
+    .serial_clock(\gpio_clock_1[16] ),
+    .serial_clock_out(\gpio_clock_1[17] ),
+    .serial_data_in(\gpio_serial_link_1[16] ),
+    .serial_data_out(\gpio_serial_link_1[17] ),
+    .serial_load(\gpio_load_1[16] ),
+    .serial_load_out(\gpio_load_1[17] ),
+    .user_gpio_in(\user_io_in[17] ),
+    .user_gpio_oeb(\user_io_oeb[17] ),
+    .user_gpio_out(\user_io_out[17] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[0]  (
+    .gpio_defaults({ \gpio_defaults[38] , \gpio_defaults[37] , \gpio_defaults[36] , \gpio_defaults[35] , \gpio_defaults[34] , \gpio_defaults[33] , \gpio_defaults[32] , \gpio_defaults[31] , \gpio_defaults[30] , \gpio_defaults[29] , \gpio_defaults[28] , \gpio_defaults[27] , \gpio_defaults[26]  }),
+    .mgmt_gpio_in(\mgmt_io_in[2] ),
+    .mgmt_gpio_oeb(\mprj_io_one[2] ),
+    .mgmt_gpio_out(\mgmt_io_out[2] ),
+    .one(\mprj_io_one[2] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[2] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[2] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[2] ),
+    .pad_gpio_dm({ \mprj_io_dm[8] , \mprj_io_dm[7] , \mprj_io_dm[6]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[2] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[2] ),
+    .pad_gpio_in(\mprj_io_in[2] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[2] ),
+    .pad_gpio_out(\mprj_io_out[2] ),
+    .pad_gpio_outenb(\mprj_io_oeb[2] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[2] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[2] ),
+    .resetn(\gpio_resetn_1[1] ),
+    .resetn_out(\gpio_resetn_1[2] ),
+    .serial_clock(\gpio_clock_1[1] ),
+    .serial_clock_out(\gpio_clock_1[2] ),
+    .serial_data_in(\gpio_serial_link_1[1] ),
+    .serial_data_out(\gpio_serial_link_1[2] ),
+    .serial_load(\gpio_load_1[1] ),
+    .serial_load_out(\gpio_load_1[2] ),
+    .user_gpio_in(\user_io_in[2] ),
+    .user_gpio_oeb(\user_io_oeb[2] ),
+    .user_gpio_out(\user_io_out[2] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[1]  (
+    .gpio_defaults({ \gpio_defaults[51] , \gpio_defaults[50] , \gpio_defaults[49] , \gpio_defaults[48] , \gpio_defaults[47] , \gpio_defaults[46] , \gpio_defaults[45] , \gpio_defaults[44] , \gpio_defaults[43] , \gpio_defaults[42] , \gpio_defaults[41] , \gpio_defaults[40] , \gpio_defaults[39]  }),
+    .mgmt_gpio_in(\mgmt_io_in[3] ),
+    .mgmt_gpio_oeb(\mprj_io_one[3] ),
+    .mgmt_gpio_out(\mgmt_io_out[3] ),
+    .one(\mprj_io_one[3] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[3] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[3] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[3] ),
+    .pad_gpio_dm({ \mprj_io_dm[11] , \mprj_io_dm[10] , \mprj_io_dm[9]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[3] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[3] ),
+    .pad_gpio_in(\mprj_io_in[3] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[3] ),
+    .pad_gpio_out(\mprj_io_out[3] ),
+    .pad_gpio_outenb(\mprj_io_oeb[3] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[3] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[3] ),
+    .resetn(\gpio_resetn_1[2] ),
+    .resetn_out(\gpio_resetn_1[3] ),
+    .serial_clock(\gpio_clock_1[2] ),
+    .serial_clock_out(\gpio_clock_1[3] ),
+    .serial_data_in(\gpio_serial_link_1[2] ),
+    .serial_data_out(\gpio_serial_link_1[3] ),
+    .serial_load(\gpio_load_1[2] ),
+    .serial_load_out(\gpio_load_1[3] ),
+    .user_gpio_in(\user_io_in[3] ),
+    .user_gpio_oeb(\user_io_oeb[3] ),
+    .user_gpio_out(\user_io_out[3] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[2]  (
+    .gpio_defaults({ \gpio_defaults[64] , \gpio_defaults[63] , \gpio_defaults[62] , \gpio_defaults[61] , \gpio_defaults[60] , \gpio_defaults[59] , \gpio_defaults[58] , \gpio_defaults[57] , \gpio_defaults[56] , \gpio_defaults[55] , \gpio_defaults[54] , \gpio_defaults[53] , \gpio_defaults[52]  }),
+    .mgmt_gpio_in(\mgmt_io_in[4] ),
+    .mgmt_gpio_oeb(\mprj_io_one[4] ),
+    .mgmt_gpio_out(\mgmt_io_out[4] ),
+    .one(\mprj_io_one[4] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[4] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[4] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[4] ),
+    .pad_gpio_dm({ \mprj_io_dm[14] , \mprj_io_dm[13] , \mprj_io_dm[12]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[4] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[4] ),
+    .pad_gpio_in(\mprj_io_in[4] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[4] ),
+    .pad_gpio_out(\mprj_io_out[4] ),
+    .pad_gpio_outenb(\mprj_io_oeb[4] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[4] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[4] ),
+    .resetn(\gpio_resetn_1[3] ),
+    .resetn_out(\gpio_resetn_1[4] ),
+    .serial_clock(\gpio_clock_1[3] ),
+    .serial_clock_out(\gpio_clock_1[4] ),
+    .serial_data_in(\gpio_serial_link_1[3] ),
+    .serial_data_out(\gpio_serial_link_1[4] ),
+    .serial_load(\gpio_load_1[3] ),
+    .serial_load_out(\gpio_load_1[4] ),
+    .user_gpio_in(\user_io_in[4] ),
+    .user_gpio_oeb(\user_io_oeb[4] ),
+    .user_gpio_out(\user_io_out[4] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[3]  (
+    .gpio_defaults({ \gpio_defaults[77] , \gpio_defaults[76] , \gpio_defaults[75] , \gpio_defaults[74] , \gpio_defaults[73] , \gpio_defaults[72] , \gpio_defaults[71] , \gpio_defaults[70] , \gpio_defaults[69] , \gpio_defaults[68] , \gpio_defaults[67] , \gpio_defaults[66] , \gpio_defaults[65]  }),
+    .mgmt_gpio_in(\mgmt_io_in[5] ),
+    .mgmt_gpio_oeb(\mprj_io_one[5] ),
+    .mgmt_gpio_out(\mgmt_io_out[5] ),
+    .one(\mprj_io_one[5] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[5] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[5] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[5] ),
+    .pad_gpio_dm({ \mprj_io_dm[17] , \mprj_io_dm[16] , \mprj_io_dm[15]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[5] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[5] ),
+    .pad_gpio_in(\mprj_io_in[5] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[5] ),
+    .pad_gpio_out(\mprj_io_out[5] ),
+    .pad_gpio_outenb(\mprj_io_oeb[5] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[5] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[5] ),
+    .resetn(\gpio_resetn_1[4] ),
+    .resetn_out(\gpio_resetn_1[5] ),
+    .serial_clock(\gpio_clock_1[4] ),
+    .serial_clock_out(\gpio_clock_1[5] ),
+    .serial_data_in(\gpio_serial_link_1[4] ),
+    .serial_data_out(\gpio_serial_link_1[5] ),
+    .serial_load(\gpio_load_1[4] ),
+    .serial_load_out(\gpio_load_1[5] ),
+    .user_gpio_in(\user_io_in[5] ),
+    .user_gpio_oeb(\user_io_oeb[5] ),
+    .user_gpio_out(\user_io_out[5] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[4]  (
+    .gpio_defaults({ \gpio_defaults[90] , \gpio_defaults[89] , \gpio_defaults[88] , \gpio_defaults[87] , \gpio_defaults[86] , \gpio_defaults[85] , \gpio_defaults[84] , \gpio_defaults[83] , \gpio_defaults[82] , \gpio_defaults[81] , \gpio_defaults[80] , \gpio_defaults[79] , \gpio_defaults[78]  }),
+    .mgmt_gpio_in(\mgmt_io_in[6] ),
+    .mgmt_gpio_oeb(\mprj_io_one[6] ),
+    .mgmt_gpio_out(\mgmt_io_out[6] ),
+    .one(\mprj_io_one[6] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[6] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[6] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[6] ),
+    .pad_gpio_dm({ \mprj_io_dm[20] , \mprj_io_dm[19] , \mprj_io_dm[18]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[6] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[6] ),
+    .pad_gpio_in(\mprj_io_in[6] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[6] ),
+    .pad_gpio_out(\mprj_io_out[6] ),
+    .pad_gpio_outenb(\mprj_io_oeb[6] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[6] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[6] ),
+    .resetn(\gpio_resetn_1[5] ),
+    .resetn_out(\gpio_resetn_1[6] ),
+    .serial_clock(\gpio_clock_1[5] ),
+    .serial_clock_out(\gpio_clock_1[6] ),
+    .serial_data_in(\gpio_serial_link_1[5] ),
+    .serial_data_out(\gpio_serial_link_1[6] ),
+    .serial_load(\gpio_load_1[5] ),
+    .serial_load_out(\gpio_load_1[6] ),
+    .user_gpio_in(\user_io_in[6] ),
+    .user_gpio_oeb(\user_io_oeb[6] ),
+    .user_gpio_out(\user_io_out[6] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[5]  (
+    .gpio_defaults({ \gpio_defaults[103] , \gpio_defaults[102] , \gpio_defaults[101] , \gpio_defaults[100] , \gpio_defaults[99] , \gpio_defaults[98] , \gpio_defaults[97] , \gpio_defaults[96] , \gpio_defaults[95] , \gpio_defaults[94] , \gpio_defaults[93] , \gpio_defaults[92] , \gpio_defaults[91]  }),
+    .mgmt_gpio_in(\mgmt_io_in[7] ),
+    .mgmt_gpio_oeb(\mprj_io_one[7] ),
+    .mgmt_gpio_out(\mgmt_io_out[7] ),
+    .one(\mprj_io_one[7] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[7] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[7] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[7] ),
+    .pad_gpio_dm({ \mprj_io_dm[23] , \mprj_io_dm[22] , \mprj_io_dm[21]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[7] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[7] ),
+    .pad_gpio_in(\mprj_io_in[7] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[7] ),
+    .pad_gpio_out(\mprj_io_out[7] ),
+    .pad_gpio_outenb(\mprj_io_oeb[7] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[7] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[7] ),
+    .resetn(\gpio_resetn_1[6] ),
+    .resetn_out(\gpio_resetn_1[7] ),
+    .serial_clock(\gpio_clock_1[6] ),
+    .serial_clock_out(\gpio_clock_1[7] ),
+    .serial_data_in(\gpio_serial_link_1[6] ),
+    .serial_data_out(\gpio_serial_link_1[7] ),
+    .serial_load(\gpio_load_1[6] ),
+    .serial_load_out(\gpio_load_1[7] ),
+    .user_gpio_in(\user_io_in[7] ),
+    .user_gpio_oeb(\user_io_oeb[7] ),
+    .user_gpio_out(\user_io_out[7] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[0]  (
+    .gpio_defaults({ \gpio_defaults[259] , \gpio_defaults[258] , \gpio_defaults[257] , \gpio_defaults[256] , \gpio_defaults[255] , \gpio_defaults[254] , \gpio_defaults[253] , \gpio_defaults[252] , \gpio_defaults[251] , \gpio_defaults[250] , \gpio_defaults[249] , \gpio_defaults[248] , \gpio_defaults[247]  }),
+    .mgmt_gpio_in(\mgmt_io_in[19] ),
+    .mgmt_gpio_oeb(\mprj_io_one[19] ),
+    .mgmt_gpio_out(\mgmt_io_out[19] ),
+    .one(\mprj_io_one[19] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[19] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[19] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[19] ),
+    .pad_gpio_dm({ \mprj_io_dm[59] , \mprj_io_dm[58] , \mprj_io_dm[57]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[19] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[19] ),
+    .pad_gpio_in(\mprj_io_in[19] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[19] ),
+    .pad_gpio_out(\mprj_io_out[19] ),
+    .pad_gpio_outenb(\mprj_io_oeb[19] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[19] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[19] ),
+    .resetn(\gpio_resetn_2[1] ),
+    .resetn_out(\gpio_resetn_2[0] ),
+    .serial_clock(\gpio_clock_2[1] ),
+    .serial_clock_out(\gpio_clock_2[0] ),
+    .serial_data_in(\gpio_serial_link_2[1] ),
+    .serial_data_out(\gpio_serial_link_2[0] ),
+    .serial_load(\gpio_load_2[1] ),
+    .serial_load_out(\gpio_load_2[0] ),
+    .user_gpio_in(\user_io_in[19] ),
+    .user_gpio_oeb(\user_io_oeb[19] ),
+    .user_gpio_out(\user_io_out[19] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[10]  (
+    .gpio_defaults({ \gpio_defaults[389] , \gpio_defaults[388] , \gpio_defaults[387] , \gpio_defaults[386] , \gpio_defaults[385] , \gpio_defaults[384] , \gpio_defaults[383] , \gpio_defaults[382] , \gpio_defaults[381] , \gpio_defaults[380] , \gpio_defaults[379] , \gpio_defaults[378] , \gpio_defaults[377]  }),
+    .mgmt_gpio_in(\mgmt_io_in[29] ),
+    .mgmt_gpio_oeb(\mprj_io_one[29] ),
+    .mgmt_gpio_out(\mgmt_io_out[29] ),
+    .one(\mprj_io_one[29] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[29] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[29] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[29] ),
+    .pad_gpio_dm({ \mprj_io_dm[89] , \mprj_io_dm[88] , \mprj_io_dm[87]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[29] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[29] ),
+    .pad_gpio_in(\mprj_io_in[29] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[29] ),
+    .pad_gpio_out(\mprj_io_out[29] ),
+    .pad_gpio_outenb(\mprj_io_oeb[29] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[29] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[29] ),
+    .resetn(\gpio_resetn_2[11] ),
+    .resetn_out(\gpio_resetn_2[10] ),
+    .serial_clock(\gpio_clock_2[11] ),
+    .serial_clock_out(\gpio_clock_2[10] ),
+    .serial_data_in(\gpio_serial_link_2[11] ),
+    .serial_data_out(\gpio_serial_link_2[10] ),
+    .serial_load(\gpio_load_2[11] ),
+    .serial_load_out(\gpio_load_2[10] ),
+    .user_gpio_in(\user_io_in[29] ),
+    .user_gpio_oeb(\user_io_oeb[29] ),
+    .user_gpio_out(\user_io_out[29] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[11]  (
+    .gpio_defaults({ \gpio_defaults[402] , \gpio_defaults[401] , \gpio_defaults[400] , \gpio_defaults[399] , \gpio_defaults[398] , \gpio_defaults[397] , \gpio_defaults[396] , \gpio_defaults[395] , \gpio_defaults[394] , \gpio_defaults[393] , \gpio_defaults[392] , \gpio_defaults[391] , \gpio_defaults[390]  }),
+    .mgmt_gpio_in(\mgmt_io_in[30] ),
+    .mgmt_gpio_oeb(\mprj_io_one[30] ),
+    .mgmt_gpio_out(\mgmt_io_out[30] ),
+    .one(\mprj_io_one[30] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[30] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[30] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[30] ),
+    .pad_gpio_dm({ \mprj_io_dm[92] , \mprj_io_dm[91] , \mprj_io_dm[90]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[30] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[30] ),
+    .pad_gpio_in(\mprj_io_in[30] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[30] ),
+    .pad_gpio_out(\mprj_io_out[30] ),
+    .pad_gpio_outenb(\mprj_io_oeb[30] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[30] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[30] ),
+    .resetn(\gpio_resetn_2[12] ),
+    .resetn_out(\gpio_resetn_2[11] ),
+    .serial_clock(\gpio_clock_2[12] ),
+    .serial_clock_out(\gpio_clock_2[11] ),
+    .serial_data_in(\gpio_serial_link_2[12] ),
+    .serial_data_out(\gpio_serial_link_2[11] ),
+    .serial_load(\gpio_load_2[12] ),
+    .serial_load_out(\gpio_load_2[11] ),
+    .user_gpio_in(\user_io_in[30] ),
+    .user_gpio_oeb(\user_io_oeb[30] ),
+    .user_gpio_out(\user_io_out[30] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[12]  (
+    .gpio_defaults({ \gpio_defaults[415] , \gpio_defaults[414] , \gpio_defaults[413] , \gpio_defaults[412] , \gpio_defaults[411] , \gpio_defaults[410] , \gpio_defaults[409] , \gpio_defaults[408] , \gpio_defaults[407] , \gpio_defaults[406] , \gpio_defaults[405] , \gpio_defaults[404] , \gpio_defaults[403]  }),
+    .mgmt_gpio_in(\mgmt_io_in[31] ),
+    .mgmt_gpio_oeb(\mprj_io_one[31] ),
+    .mgmt_gpio_out(\mgmt_io_out[31] ),
+    .one(\mprj_io_one[31] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[31] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[31] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[31] ),
+    .pad_gpio_dm({ \mprj_io_dm[95] , \mprj_io_dm[94] , \mprj_io_dm[93]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[31] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[31] ),
+    .pad_gpio_in(\mprj_io_in[31] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[31] ),
+    .pad_gpio_out(\mprj_io_out[31] ),
+    .pad_gpio_outenb(\mprj_io_oeb[31] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[31] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[31] ),
+    .resetn(\gpio_resetn_2[13] ),
+    .resetn_out(\gpio_resetn_2[12] ),
+    .serial_clock(\gpio_clock_2[13] ),
+    .serial_clock_out(\gpio_clock_2[12] ),
+    .serial_data_in(\gpio_serial_link_2[13] ),
+    .serial_data_out(\gpio_serial_link_2[12] ),
+    .serial_load(\gpio_load_2[13] ),
+    .serial_load_out(\gpio_load_2[12] ),
+    .user_gpio_in(\user_io_in[31] ),
+    .user_gpio_oeb(\user_io_oeb[31] ),
+    .user_gpio_out(\user_io_out[31] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[13]  (
+    .gpio_defaults({ \gpio_defaults[428] , \gpio_defaults[427] , \gpio_defaults[426] , \gpio_defaults[425] , \gpio_defaults[424] , \gpio_defaults[423] , \gpio_defaults[422] , \gpio_defaults[421] , \gpio_defaults[420] , \gpio_defaults[419] , \gpio_defaults[418] , \gpio_defaults[417] , \gpio_defaults[416]  }),
+    .mgmt_gpio_in(\mgmt_io_in[32] ),
+    .mgmt_gpio_oeb(\mprj_io_one[32] ),
+    .mgmt_gpio_out(\mgmt_io_out[32] ),
+    .one(\mprj_io_one[32] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[32] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[32] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[32] ),
+    .pad_gpio_dm({ \mprj_io_dm[98] , \mprj_io_dm[97] , \mprj_io_dm[96]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[32] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[32] ),
+    .pad_gpio_in(\mprj_io_in[32] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[32] ),
+    .pad_gpio_out(\mprj_io_out[32] ),
+    .pad_gpio_outenb(\mprj_io_oeb[32] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[32] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[32] ),
+    .resetn(\gpio_resetn_2[14] ),
+    .resetn_out(\gpio_resetn_2[13] ),
+    .serial_clock(\gpio_clock_2[14] ),
+    .serial_clock_out(\gpio_clock_2[13] ),
+    .serial_data_in(\gpio_serial_link_2[14] ),
+    .serial_data_out(\gpio_serial_link_2[13] ),
+    .serial_load(\gpio_load_2[14] ),
+    .serial_load_out(\gpio_load_2[13] ),
+    .user_gpio_in(\user_io_in[32] ),
+    .user_gpio_oeb(\user_io_oeb[32] ),
+    .user_gpio_out(\user_io_out[32] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[14]  (
+    .gpio_defaults({ \gpio_defaults[441] , \gpio_defaults[440] , \gpio_defaults[439] , \gpio_defaults[438] , \gpio_defaults[437] , \gpio_defaults[436] , \gpio_defaults[435] , \gpio_defaults[434] , \gpio_defaults[433] , \gpio_defaults[432] , \gpio_defaults[431] , \gpio_defaults[430] , \gpio_defaults[429]  }),
+    .mgmt_gpio_in(\mgmt_io_in[33] ),
+    .mgmt_gpio_oeb(\mprj_io_one[33] ),
+    .mgmt_gpio_out(\mgmt_io_out[33] ),
+    .one(\mprj_io_one[33] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[33] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[33] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[33] ),
+    .pad_gpio_dm({ \mprj_io_dm[101] , \mprj_io_dm[100] , \mprj_io_dm[99]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[33] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[33] ),
+    .pad_gpio_in(\mprj_io_in[33] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[33] ),
+    .pad_gpio_out(\mprj_io_out[33] ),
+    .pad_gpio_outenb(\mprj_io_oeb[33] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[33] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[33] ),
+    .resetn(\gpio_resetn_2[15] ),
+    .resetn_out(\gpio_resetn_2[14] ),
+    .serial_clock(\gpio_clock_2[15] ),
+    .serial_clock_out(\gpio_clock_2[14] ),
+    .serial_data_in(\gpio_serial_link_2[15] ),
+    .serial_data_out(\gpio_serial_link_2[14] ),
+    .serial_load(\gpio_load_2[15] ),
+    .serial_load_out(\gpio_load_2[14] ),
+    .user_gpio_in(\user_io_in[33] ),
+    .user_gpio_oeb(\user_io_oeb[33] ),
+    .user_gpio_out(\user_io_out[33] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[15]  (
+    .gpio_defaults({ \gpio_defaults[454] , \gpio_defaults[453] , \gpio_defaults[452] , \gpio_defaults[451] , \gpio_defaults[450] , \gpio_defaults[449] , \gpio_defaults[448] , \gpio_defaults[447] , \gpio_defaults[446] , \gpio_defaults[445] , \gpio_defaults[444] , \gpio_defaults[443] , \gpio_defaults[442]  }),
+    .mgmt_gpio_in(\mgmt_io_in[34] ),
+    .mgmt_gpio_oeb(\mprj_io_one[34] ),
+    .mgmt_gpio_out(\mgmt_io_out[34] ),
+    .one(\mprj_io_one[34] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[34] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[34] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[34] ),
+    .pad_gpio_dm({ \mprj_io_dm[104] , \mprj_io_dm[103] , \mprj_io_dm[102]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[34] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[34] ),
+    .pad_gpio_in(\mprj_io_in[34] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[34] ),
+    .pad_gpio_out(\mprj_io_out[34] ),
+    .pad_gpio_outenb(\mprj_io_oeb[34] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[34] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[34] ),
+    .resetn(\gpio_resetn_2[16] ),
+    .resetn_out(\gpio_resetn_2[15] ),
+    .serial_clock(\gpio_clock_2[16] ),
+    .serial_clock_out(\gpio_clock_2[15] ),
+    .serial_data_in(\gpio_serial_link_2[16] ),
+    .serial_data_out(\gpio_serial_link_2[15] ),
+    .serial_load(\gpio_load_2[16] ),
+    .serial_load_out(\gpio_load_2[15] ),
+    .user_gpio_in(\user_io_in[34] ),
+    .user_gpio_oeb(\user_io_oeb[34] ),
+    .user_gpio_out(\user_io_out[34] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[1]  (
+    .gpio_defaults({ \gpio_defaults[272] , \gpio_defaults[271] , \gpio_defaults[270] , \gpio_defaults[269] , \gpio_defaults[268] , \gpio_defaults[267] , \gpio_defaults[266] , \gpio_defaults[265] , \gpio_defaults[264] , \gpio_defaults[263] , \gpio_defaults[262] , \gpio_defaults[261] , \gpio_defaults[260]  }),
+    .mgmt_gpio_in(\mgmt_io_in[20] ),
+    .mgmt_gpio_oeb(\mprj_io_one[20] ),
+    .mgmt_gpio_out(\mgmt_io_out[20] ),
+    .one(\mprj_io_one[20] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[20] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[20] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[20] ),
+    .pad_gpio_dm({ \mprj_io_dm[62] , \mprj_io_dm[61] , \mprj_io_dm[60]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[20] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[20] ),
+    .pad_gpio_in(\mprj_io_in[20] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[20] ),
+    .pad_gpio_out(\mprj_io_out[20] ),
+    .pad_gpio_outenb(\mprj_io_oeb[20] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[20] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[20] ),
+    .resetn(\gpio_resetn_2[2] ),
+    .resetn_out(\gpio_resetn_2[1] ),
+    .serial_clock(\gpio_clock_2[2] ),
+    .serial_clock_out(\gpio_clock_2[1] ),
+    .serial_data_in(\gpio_serial_link_2[2] ),
+    .serial_data_out(\gpio_serial_link_2[1] ),
+    .serial_load(\gpio_load_2[2] ),
+    .serial_load_out(\gpio_load_2[1] ),
+    .user_gpio_in(\user_io_in[20] ),
+    .user_gpio_oeb(\user_io_oeb[20] ),
+    .user_gpio_out(\user_io_out[20] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[2]  (
+    .gpio_defaults({ \gpio_defaults[285] , \gpio_defaults[284] , \gpio_defaults[283] , \gpio_defaults[282] , \gpio_defaults[281] , \gpio_defaults[280] , \gpio_defaults[279] , \gpio_defaults[278] , \gpio_defaults[277] , \gpio_defaults[276] , \gpio_defaults[275] , \gpio_defaults[274] , \gpio_defaults[273]  }),
+    .mgmt_gpio_in(\mgmt_io_in[21] ),
+    .mgmt_gpio_oeb(\mprj_io_one[21] ),
+    .mgmt_gpio_out(\mgmt_io_out[21] ),
+    .one(\mprj_io_one[21] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[21] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[21] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[21] ),
+    .pad_gpio_dm({ \mprj_io_dm[65] , \mprj_io_dm[64] , \mprj_io_dm[63]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[21] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[21] ),
+    .pad_gpio_in(\mprj_io_in[21] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[21] ),
+    .pad_gpio_out(\mprj_io_out[21] ),
+    .pad_gpio_outenb(\mprj_io_oeb[21] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[21] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[21] ),
+    .resetn(\gpio_resetn_2[3] ),
+    .resetn_out(\gpio_resetn_2[2] ),
+    .serial_clock(\gpio_clock_2[3] ),
+    .serial_clock_out(\gpio_clock_2[2] ),
+    .serial_data_in(\gpio_serial_link_2[3] ),
+    .serial_data_out(\gpio_serial_link_2[2] ),
+    .serial_load(\gpio_load_2[3] ),
+    .serial_load_out(\gpio_load_2[2] ),
+    .user_gpio_in(\user_io_in[21] ),
+    .user_gpio_oeb(\user_io_oeb[21] ),
+    .user_gpio_out(\user_io_out[21] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[3]  (
+    .gpio_defaults({ \gpio_defaults[298] , \gpio_defaults[297] , \gpio_defaults[296] , \gpio_defaults[295] , \gpio_defaults[294] , \gpio_defaults[293] , \gpio_defaults[292] , \gpio_defaults[291] , \gpio_defaults[290] , \gpio_defaults[289] , \gpio_defaults[288] , \gpio_defaults[287] , \gpio_defaults[286]  }),
+    .mgmt_gpio_in(\mgmt_io_in[22] ),
+    .mgmt_gpio_oeb(\mprj_io_one[22] ),
+    .mgmt_gpio_out(\mgmt_io_out[22] ),
+    .one(\mprj_io_one[22] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[22] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[22] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[22] ),
+    .pad_gpio_dm({ \mprj_io_dm[68] , \mprj_io_dm[67] , \mprj_io_dm[66]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[22] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[22] ),
+    .pad_gpio_in(\mprj_io_in[22] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[22] ),
+    .pad_gpio_out(\mprj_io_out[22] ),
+    .pad_gpio_outenb(\mprj_io_oeb[22] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[22] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[22] ),
+    .resetn(\gpio_resetn_2[4] ),
+    .resetn_out(\gpio_resetn_2[3] ),
+    .serial_clock(\gpio_clock_2[4] ),
+    .serial_clock_out(\gpio_clock_2[3] ),
+    .serial_data_in(\gpio_serial_link_2[4] ),
+    .serial_data_out(\gpio_serial_link_2[3] ),
+    .serial_load(\gpio_load_2[4] ),
+    .serial_load_out(\gpio_load_2[3] ),
+    .user_gpio_in(\user_io_in[22] ),
+    .user_gpio_oeb(\user_io_oeb[22] ),
+    .user_gpio_out(\user_io_out[22] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[4]  (
+    .gpio_defaults({ \gpio_defaults[311] , \gpio_defaults[310] , \gpio_defaults[309] , \gpio_defaults[308] , \gpio_defaults[307] , \gpio_defaults[306] , \gpio_defaults[305] , \gpio_defaults[304] , \gpio_defaults[303] , \gpio_defaults[302] , \gpio_defaults[301] , \gpio_defaults[300] , \gpio_defaults[299]  }),
+    .mgmt_gpio_in(\mgmt_io_in[23] ),
+    .mgmt_gpio_oeb(\mprj_io_one[23] ),
+    .mgmt_gpio_out(\mgmt_io_out[23] ),
+    .one(\mprj_io_one[23] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[23] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[23] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[23] ),
+    .pad_gpio_dm({ \mprj_io_dm[71] , \mprj_io_dm[70] , \mprj_io_dm[69]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[23] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[23] ),
+    .pad_gpio_in(\mprj_io_in[23] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[23] ),
+    .pad_gpio_out(\mprj_io_out[23] ),
+    .pad_gpio_outenb(\mprj_io_oeb[23] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[23] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[23] ),
+    .resetn(\gpio_resetn_2[5] ),
+    .resetn_out(\gpio_resetn_2[4] ),
+    .serial_clock(\gpio_clock_2[5] ),
+    .serial_clock_out(\gpio_clock_2[4] ),
+    .serial_data_in(\gpio_serial_link_2[5] ),
+    .serial_data_out(\gpio_serial_link_2[4] ),
+    .serial_load(\gpio_load_2[5] ),
+    .serial_load_out(\gpio_load_2[4] ),
+    .user_gpio_in(\user_io_in[23] ),
+    .user_gpio_oeb(\user_io_oeb[23] ),
+    .user_gpio_out(\user_io_out[23] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[5]  (
+    .gpio_defaults({ \gpio_defaults[324] , \gpio_defaults[323] , \gpio_defaults[322] , \gpio_defaults[321] , \gpio_defaults[320] , \gpio_defaults[319] , \gpio_defaults[318] , \gpio_defaults[317] , \gpio_defaults[316] , \gpio_defaults[315] , \gpio_defaults[314] , \gpio_defaults[313] , \gpio_defaults[312]  }),
+    .mgmt_gpio_in(\mgmt_io_in[24] ),
+    .mgmt_gpio_oeb(\mprj_io_one[24] ),
+    .mgmt_gpio_out(\mgmt_io_out[24] ),
+    .one(\mprj_io_one[24] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[24] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[24] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[24] ),
+    .pad_gpio_dm({ \mprj_io_dm[74] , \mprj_io_dm[73] , \mprj_io_dm[72]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[24] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[24] ),
+    .pad_gpio_in(\mprj_io_in[24] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[24] ),
+    .pad_gpio_out(\mprj_io_out[24] ),
+    .pad_gpio_outenb(\mprj_io_oeb[24] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[24] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[24] ),
+    .resetn(\gpio_resetn_2[6] ),
+    .resetn_out(\gpio_resetn_2[5] ),
+    .serial_clock(\gpio_clock_2[6] ),
+    .serial_clock_out(\gpio_clock_2[5] ),
+    .serial_data_in(\gpio_serial_link_2[6] ),
+    .serial_data_out(\gpio_serial_link_2[5] ),
+    .serial_load(\gpio_load_2[6] ),
+    .serial_load_out(\gpio_load_2[5] ),
+    .user_gpio_in(\user_io_in[24] ),
+    .user_gpio_oeb(\user_io_oeb[24] ),
+    .user_gpio_out(\user_io_out[24] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[6]  (
+    .gpio_defaults({ \gpio_defaults[337] , \gpio_defaults[336] , \gpio_defaults[335] , \gpio_defaults[334] , \gpio_defaults[333] , \gpio_defaults[332] , \gpio_defaults[331] , \gpio_defaults[330] , \gpio_defaults[329] , \gpio_defaults[328] , \gpio_defaults[327] , \gpio_defaults[326] , \gpio_defaults[325]  }),
+    .mgmt_gpio_in(\mgmt_io_in[25] ),
+    .mgmt_gpio_oeb(\mprj_io_one[25] ),
+    .mgmt_gpio_out(\mgmt_io_out[25] ),
+    .one(\mprj_io_one[25] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[25] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[25] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[25] ),
+    .pad_gpio_dm({ \mprj_io_dm[77] , \mprj_io_dm[76] , \mprj_io_dm[75]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[25] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[25] ),
+    .pad_gpio_in(\mprj_io_in[25] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[25] ),
+    .pad_gpio_out(\mprj_io_out[25] ),
+    .pad_gpio_outenb(\mprj_io_oeb[25] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[25] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[25] ),
+    .resetn(\gpio_resetn_2[7] ),
+    .resetn_out(\gpio_resetn_2[6] ),
+    .serial_clock(\gpio_clock_2[7] ),
+    .serial_clock_out(\gpio_clock_2[6] ),
+    .serial_data_in(\gpio_serial_link_2[7] ),
+    .serial_data_out(\gpio_serial_link_2[6] ),
+    .serial_load(\gpio_load_2[7] ),
+    .serial_load_out(\gpio_load_2[6] ),
+    .user_gpio_in(\user_io_in[25] ),
+    .user_gpio_oeb(\user_io_oeb[25] ),
+    .user_gpio_out(\user_io_out[25] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[7]  (
+    .gpio_defaults({ \gpio_defaults[350] , \gpio_defaults[349] , \gpio_defaults[348] , \gpio_defaults[347] , \gpio_defaults[346] , \gpio_defaults[345] , \gpio_defaults[344] , \gpio_defaults[343] , \gpio_defaults[342] , \gpio_defaults[341] , \gpio_defaults[340] , \gpio_defaults[339] , \gpio_defaults[338]  }),
+    .mgmt_gpio_in(\mgmt_io_in[26] ),
+    .mgmt_gpio_oeb(\mprj_io_one[26] ),
+    .mgmt_gpio_out(\mgmt_io_out[26] ),
+    .one(\mprj_io_one[26] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[26] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[26] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[26] ),
+    .pad_gpio_dm({ \mprj_io_dm[80] , \mprj_io_dm[79] , \mprj_io_dm[78]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[26] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[26] ),
+    .pad_gpio_in(\mprj_io_in[26] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[26] ),
+    .pad_gpio_out(\mprj_io_out[26] ),
+    .pad_gpio_outenb(\mprj_io_oeb[26] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[26] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[26] ),
+    .resetn(\gpio_resetn_2[8] ),
+    .resetn_out(\gpio_resetn_2[7] ),
+    .serial_clock(\gpio_clock_2[8] ),
+    .serial_clock_out(\gpio_clock_2[7] ),
+    .serial_data_in(\gpio_serial_link_2[8] ),
+    .serial_data_out(\gpio_serial_link_2[7] ),
+    .serial_load(\gpio_load_2[8] ),
+    .serial_load_out(\gpio_load_2[7] ),
+    .user_gpio_in(\user_io_in[26] ),
+    .user_gpio_oeb(\user_io_oeb[26] ),
+    .user_gpio_out(\user_io_out[26] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[8]  (
+    .gpio_defaults({ \gpio_defaults[363] , \gpio_defaults[362] , \gpio_defaults[361] , \gpio_defaults[360] , \gpio_defaults[359] , \gpio_defaults[358] , \gpio_defaults[357] , \gpio_defaults[356] , \gpio_defaults[355] , \gpio_defaults[354] , \gpio_defaults[353] , \gpio_defaults[352] , \gpio_defaults[351]  }),
+    .mgmt_gpio_in(\mgmt_io_in[27] ),
+    .mgmt_gpio_oeb(\mprj_io_one[27] ),
+    .mgmt_gpio_out(\mgmt_io_out[27] ),
+    .one(\mprj_io_one[27] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[27] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[27] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[27] ),
+    .pad_gpio_dm({ \mprj_io_dm[83] , \mprj_io_dm[82] , \mprj_io_dm[81]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[27] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[27] ),
+    .pad_gpio_in(\mprj_io_in[27] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[27] ),
+    .pad_gpio_out(\mprj_io_out[27] ),
+    .pad_gpio_outenb(\mprj_io_oeb[27] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[27] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[27] ),
+    .resetn(\gpio_resetn_2[9] ),
+    .resetn_out(\gpio_resetn_2[8] ),
+    .serial_clock(\gpio_clock_2[9] ),
+    .serial_clock_out(\gpio_clock_2[8] ),
+    .serial_data_in(\gpio_serial_link_2[9] ),
+    .serial_data_out(\gpio_serial_link_2[8] ),
+    .serial_load(\gpio_load_2[9] ),
+    .serial_load_out(\gpio_load_2[8] ),
+    .user_gpio_in(\user_io_in[27] ),
+    .user_gpio_oeb(\user_io_oeb[27] ),
+    .user_gpio_out(\user_io_out[27] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[9]  (
+    .gpio_defaults({ \gpio_defaults[376] , \gpio_defaults[375] , \gpio_defaults[374] , \gpio_defaults[373] , \gpio_defaults[372] , \gpio_defaults[371] , \gpio_defaults[370] , \gpio_defaults[369] , \gpio_defaults[368] , \gpio_defaults[367] , \gpio_defaults[366] , \gpio_defaults[365] , \gpio_defaults[364]  }),
+    .mgmt_gpio_in(\mgmt_io_in[28] ),
+    .mgmt_gpio_oeb(\mprj_io_one[28] ),
+    .mgmt_gpio_out(\mgmt_io_out[28] ),
+    .one(\mprj_io_one[28] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[28] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[28] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[28] ),
+    .pad_gpio_dm({ \mprj_io_dm[86] , \mprj_io_dm[85] , \mprj_io_dm[84]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[28] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[28] ),
+    .pad_gpio_in(\mprj_io_in[28] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[28] ),
+    .pad_gpio_out(\mprj_io_out[28] ),
+    .pad_gpio_outenb(\mprj_io_oeb[28] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[28] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[28] ),
+    .resetn(\gpio_resetn_2[10] ),
+    .resetn_out(\gpio_resetn_2[9] ),
+    .serial_clock(\gpio_clock_2[10] ),
+    .serial_clock_out(\gpio_clock_2[9] ),
+    .serial_data_in(\gpio_serial_link_2[10] ),
+    .serial_data_out(\gpio_serial_link_2[9] ),
+    .serial_load(\gpio_load_2[10] ),
+    .serial_load_out(\gpio_load_2[9] ),
+    .user_gpio_in(\user_io_in[28] ),
+    .user_gpio_oeb(\user_io_oeb[28] ),
+    .user_gpio_out(\user_io_out[28] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_defaults_block_1803 gpio_defaults_block_0 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[12] , \gpio_defaults[11] , \gpio_defaults[10] , \gpio_defaults[9] , \gpio_defaults[8] , \gpio_defaults[7] , \gpio_defaults[6] , \gpio_defaults[5] , \gpio_defaults[4] , \gpio_defaults[3] , \gpio_defaults[2] , \gpio_defaults[1] , \gpio_defaults[0]  })
+  );
+  gpio_defaults_block_1803 gpio_defaults_block_1 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[25] , \gpio_defaults[24] , \gpio_defaults[23] , \gpio_defaults[22] , \gpio_defaults[21] , \gpio_defaults[20] , \gpio_defaults[19] , \gpio_defaults[18] , \gpio_defaults[17] , \gpio_defaults[16] , \gpio_defaults[15] , \gpio_defaults[14] , \gpio_defaults[13]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_10 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[142] , \gpio_defaults[141] , \gpio_defaults[140] , \gpio_defaults[139] , \gpio_defaults[138] , \gpio_defaults[137] , \gpio_defaults[136] , \gpio_defaults[135] , \gpio_defaults[134] , \gpio_defaults[133] , \gpio_defaults[132] , \gpio_defaults[131] , \gpio_defaults[130]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_11 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[155] , \gpio_defaults[154] , \gpio_defaults[153] , \gpio_defaults[152] , \gpio_defaults[151] , \gpio_defaults[150] , \gpio_defaults[149] , \gpio_defaults[148] , \gpio_defaults[147] , \gpio_defaults[146] , \gpio_defaults[145] , \gpio_defaults[144] , \gpio_defaults[143]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_12 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[168] , \gpio_defaults[167] , \gpio_defaults[166] , \gpio_defaults[165] , \gpio_defaults[164] , \gpio_defaults[163] , \gpio_defaults[162] , \gpio_defaults[161] , \gpio_defaults[160] , \gpio_defaults[159] , \gpio_defaults[158] , \gpio_defaults[157] , \gpio_defaults[156]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_13 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[181] , \gpio_defaults[180] , \gpio_defaults[179] , \gpio_defaults[178] , \gpio_defaults[177] , \gpio_defaults[176] , \gpio_defaults[175] , \gpio_defaults[174] , \gpio_defaults[173] , \gpio_defaults[172] , \gpio_defaults[171] , \gpio_defaults[170] , \gpio_defaults[169]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_14 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[194] , \gpio_defaults[193] , \gpio_defaults[192] , \gpio_defaults[191] , \gpio_defaults[190] , \gpio_defaults[189] , \gpio_defaults[188] , \gpio_defaults[187] , \gpio_defaults[186] , \gpio_defaults[185] , \gpio_defaults[184] , \gpio_defaults[183] , \gpio_defaults[182]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_15 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[207] , \gpio_defaults[206] , \gpio_defaults[205] , \gpio_defaults[204] , \gpio_defaults[203] , \gpio_defaults[202] , \gpio_defaults[201] , \gpio_defaults[200] , \gpio_defaults[199] , \gpio_defaults[198] , \gpio_defaults[197] , \gpio_defaults[196] , \gpio_defaults[195]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_16 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[220] , \gpio_defaults[219] , \gpio_defaults[218] , \gpio_defaults[217] , \gpio_defaults[216] , \gpio_defaults[215] , \gpio_defaults[214] , \gpio_defaults[213] , \gpio_defaults[212] , \gpio_defaults[211] , \gpio_defaults[210] , \gpio_defaults[209] , \gpio_defaults[208]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_17 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[233] , \gpio_defaults[232] , \gpio_defaults[231] , \gpio_defaults[230] , \gpio_defaults[229] , \gpio_defaults[228] , \gpio_defaults[227] , \gpio_defaults[226] , \gpio_defaults[225] , \gpio_defaults[224] , \gpio_defaults[223] , \gpio_defaults[222] , \gpio_defaults[221]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_18 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[246] , \gpio_defaults[245] , \gpio_defaults[244] , \gpio_defaults[243] , \gpio_defaults[242] , \gpio_defaults[241] , \gpio_defaults[240] , \gpio_defaults[239] , \gpio_defaults[238] , \gpio_defaults[237] , \gpio_defaults[236] , \gpio_defaults[235] , \gpio_defaults[234]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_19 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[259] , \gpio_defaults[258] , \gpio_defaults[257] , \gpio_defaults[256] , \gpio_defaults[255] , \gpio_defaults[254] , \gpio_defaults[253] , \gpio_defaults[252] , \gpio_defaults[251] , \gpio_defaults[250] , \gpio_defaults[249] , \gpio_defaults[248] , \gpio_defaults[247]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_2 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[38] , \gpio_defaults[37] , \gpio_defaults[36] , \gpio_defaults[35] , \gpio_defaults[34] , \gpio_defaults[33] , \gpio_defaults[32] , \gpio_defaults[31] , \gpio_defaults[30] , \gpio_defaults[29] , \gpio_defaults[28] , \gpio_defaults[27] , \gpio_defaults[26]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_20 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[272] , \gpio_defaults[271] , \gpio_defaults[270] , \gpio_defaults[269] , \gpio_defaults[268] , \gpio_defaults[267] , \gpio_defaults[266] , \gpio_defaults[265] , \gpio_defaults[264] , \gpio_defaults[263] , \gpio_defaults[262] , \gpio_defaults[261] , \gpio_defaults[260]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_21 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[285] , \gpio_defaults[284] , \gpio_defaults[283] , \gpio_defaults[282] , \gpio_defaults[281] , \gpio_defaults[280] , \gpio_defaults[279] , \gpio_defaults[278] , \gpio_defaults[277] , \gpio_defaults[276] , \gpio_defaults[275] , \gpio_defaults[274] , \gpio_defaults[273]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_22 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[298] , \gpio_defaults[297] , \gpio_defaults[296] , \gpio_defaults[295] , \gpio_defaults[294] , \gpio_defaults[293] , \gpio_defaults[292] , \gpio_defaults[291] , \gpio_defaults[290] , \gpio_defaults[289] , \gpio_defaults[288] , \gpio_defaults[287] , \gpio_defaults[286]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_23 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[311] , \gpio_defaults[310] , \gpio_defaults[309] , \gpio_defaults[308] , \gpio_defaults[307] , \gpio_defaults[306] , \gpio_defaults[305] , \gpio_defaults[304] , \gpio_defaults[303] , \gpio_defaults[302] , \gpio_defaults[301] , \gpio_defaults[300] , \gpio_defaults[299]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_24 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[324] , \gpio_defaults[323] , \gpio_defaults[322] , \gpio_defaults[321] , \gpio_defaults[320] , \gpio_defaults[319] , \gpio_defaults[318] , \gpio_defaults[317] , \gpio_defaults[316] , \gpio_defaults[315] , \gpio_defaults[314] , \gpio_defaults[313] , \gpio_defaults[312]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_25 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[337] , \gpio_defaults[336] , \gpio_defaults[335] , \gpio_defaults[334] , \gpio_defaults[333] , \gpio_defaults[332] , \gpio_defaults[331] , \gpio_defaults[330] , \gpio_defaults[329] , \gpio_defaults[328] , \gpio_defaults[327] , \gpio_defaults[326] , \gpio_defaults[325]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_26 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[350] , \gpio_defaults[349] , \gpio_defaults[348] , \gpio_defaults[347] , \gpio_defaults[346] , \gpio_defaults[345] , \gpio_defaults[344] , \gpio_defaults[343] , \gpio_defaults[342] , \gpio_defaults[341] , \gpio_defaults[340] , \gpio_defaults[339] , \gpio_defaults[338]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_27 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[363] , \gpio_defaults[362] , \gpio_defaults[361] , \gpio_defaults[360] , \gpio_defaults[359] , \gpio_defaults[358] , \gpio_defaults[357] , \gpio_defaults[356] , \gpio_defaults[355] , \gpio_defaults[354] , \gpio_defaults[353] , \gpio_defaults[352] , \gpio_defaults[351]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_28 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[376] , \gpio_defaults[375] , \gpio_defaults[374] , \gpio_defaults[373] , \gpio_defaults[372] , \gpio_defaults[371] , \gpio_defaults[370] , \gpio_defaults[369] , \gpio_defaults[368] , \gpio_defaults[367] , \gpio_defaults[366] , \gpio_defaults[365] , \gpio_defaults[364]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_29 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[389] , \gpio_defaults[388] , \gpio_defaults[387] , \gpio_defaults[386] , \gpio_defaults[385] , \gpio_defaults[384] , \gpio_defaults[383] , \gpio_defaults[382] , \gpio_defaults[381] , \gpio_defaults[380] , \gpio_defaults[379] , \gpio_defaults[378] , \gpio_defaults[377]  })
+  );
+  gpio_defaults_block_0801 gpio_defaults_block_3 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[51] , \gpio_defaults[50] , \gpio_defaults[49] , \gpio_defaults[48] , \gpio_defaults[47] , \gpio_defaults[46] , \gpio_defaults[45] , \gpio_defaults[44] , \gpio_defaults[43] , \gpio_defaults[42] , \gpio_defaults[41] , \gpio_defaults[40] , \gpio_defaults[39]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_30 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[402] , \gpio_defaults[401] , \gpio_defaults[400] , \gpio_defaults[399] , \gpio_defaults[398] , \gpio_defaults[397] , \gpio_defaults[396] , \gpio_defaults[395] , \gpio_defaults[394] , \gpio_defaults[393] , \gpio_defaults[392] , \gpio_defaults[391] , \gpio_defaults[390]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_31 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[415] , \gpio_defaults[414] , \gpio_defaults[413] , \gpio_defaults[412] , \gpio_defaults[411] , \gpio_defaults[410] , \gpio_defaults[409] , \gpio_defaults[408] , \gpio_defaults[407] , \gpio_defaults[406] , \gpio_defaults[405] , \gpio_defaults[404] , \gpio_defaults[403]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_32 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[428] , \gpio_defaults[427] , \gpio_defaults[426] , \gpio_defaults[425] , \gpio_defaults[424] , \gpio_defaults[423] , \gpio_defaults[422] , \gpio_defaults[421] , \gpio_defaults[420] , \gpio_defaults[419] , \gpio_defaults[418] , \gpio_defaults[417] , \gpio_defaults[416]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_33 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[441] , \gpio_defaults[440] , \gpio_defaults[439] , \gpio_defaults[438] , \gpio_defaults[437] , \gpio_defaults[436] , \gpio_defaults[435] , \gpio_defaults[434] , \gpio_defaults[433] , \gpio_defaults[432] , \gpio_defaults[431] , \gpio_defaults[430] , \gpio_defaults[429]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_34 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[454] , \gpio_defaults[453] , \gpio_defaults[452] , \gpio_defaults[451] , \gpio_defaults[450] , \gpio_defaults[449] , \gpio_defaults[448] , \gpio_defaults[447] , \gpio_defaults[446] , \gpio_defaults[445] , \gpio_defaults[444] , \gpio_defaults[443] , \gpio_defaults[442]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_35 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[467] , \gpio_defaults[466] , \gpio_defaults[465] , \gpio_defaults[464] , \gpio_defaults[463] , \gpio_defaults[462] , \gpio_defaults[461] , \gpio_defaults[460] , \gpio_defaults[459] , \gpio_defaults[458] , \gpio_defaults[457] , \gpio_defaults[456] , \gpio_defaults[455]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_36 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[480] , \gpio_defaults[479] , \gpio_defaults[478] , \gpio_defaults[477] , \gpio_defaults[476] , \gpio_defaults[475] , \gpio_defaults[474] , \gpio_defaults[473] , \gpio_defaults[472] , \gpio_defaults[471] , \gpio_defaults[470] , \gpio_defaults[469] , \gpio_defaults[468]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_37 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[493] , \gpio_defaults[492] , \gpio_defaults[491] , \gpio_defaults[490] , \gpio_defaults[489] , \gpio_defaults[488] , \gpio_defaults[487] , \gpio_defaults[486] , \gpio_defaults[485] , \gpio_defaults[484] , \gpio_defaults[483] , \gpio_defaults[482] , \gpio_defaults[481]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_4 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[64] , \gpio_defaults[63] , \gpio_defaults[62] , \gpio_defaults[61] , \gpio_defaults[60] , \gpio_defaults[59] , \gpio_defaults[58] , \gpio_defaults[57] , \gpio_defaults[56] , \gpio_defaults[55] , \gpio_defaults[54] , \gpio_defaults[53] , \gpio_defaults[52]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_5 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[77] , \gpio_defaults[76] , \gpio_defaults[75] , \gpio_defaults[74] , \gpio_defaults[73] , \gpio_defaults[72] , \gpio_defaults[71] , \gpio_defaults[70] , \gpio_defaults[69] , \gpio_defaults[68] , \gpio_defaults[67] , \gpio_defaults[66] , \gpio_defaults[65]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_6 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[90] , \gpio_defaults[89] , \gpio_defaults[88] , \gpio_defaults[87] , \gpio_defaults[86] , \gpio_defaults[85] , \gpio_defaults[84] , \gpio_defaults[83] , \gpio_defaults[82] , \gpio_defaults[81] , \gpio_defaults[80] , \gpio_defaults[79] , \gpio_defaults[78]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_7 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[103] , \gpio_defaults[102] , \gpio_defaults[101] , \gpio_defaults[100] , \gpio_defaults[99] , \gpio_defaults[98] , \gpio_defaults[97] , \gpio_defaults[96] , \gpio_defaults[95] , \gpio_defaults[94] , \gpio_defaults[93] , \gpio_defaults[92] , \gpio_defaults[91]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_8 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[116] , \gpio_defaults[115] , \gpio_defaults[114] , \gpio_defaults[113] , \gpio_defaults[112] , \gpio_defaults[111] , \gpio_defaults[110] , \gpio_defaults[109] , \gpio_defaults[108] , \gpio_defaults[107] , \gpio_defaults[106] , \gpio_defaults[105] , \gpio_defaults[104]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_9 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[129] , \gpio_defaults[128] , \gpio_defaults[127] , \gpio_defaults[126] , \gpio_defaults[125] , \gpio_defaults[124] , \gpio_defaults[123] , \gpio_defaults[122] , \gpio_defaults[121] , \gpio_defaults[120] , \gpio_defaults[119] , \gpio_defaults[118] , \gpio_defaults[117]  })
+  );
+  housekeeping housekeeping (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .debug_in(debug_in),
+    .debug_mode(debug_mode),
+    .debug_oeb(debug_oeb),
+    .debug_out(debug_out),
+    .irq({ \irq_spi[2] , \irq_spi[1] , \irq_spi[0]  }),
+    .mask_rev_in({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0]  }),
+    .mgmt_gpio_in({ \mgmt_io_in_hk[37] , \mgmt_io_in_hk[36] , \mgmt_io_in_hk[35] , \mgmt_io_in_hk[34] , \mgmt_io_in_hk[33] , \mgmt_io_in_hk[32] , \mgmt_io_in_hk[31] , \mgmt_io_in_hk[30] , \mgmt_io_in_hk[29] , \mgmt_io_in_hk[28] , \mgmt_io_in_hk[27] , \mgmt_io_in_hk[26] , \mgmt_io_in_hk[25] , \mgmt_io_in_hk[24] , \mgmt_io_in_hk[23] , \mgmt_io_in_hk[22] , \mgmt_io_in_hk[21] , \mgmt_io_in_hk[20] , \mgmt_io_in_hk[19] , \mgmt_io_in_hk[18] , \mgmt_io_in_hk[17] , \mgmt_io_in_hk[16] , \mgmt_io_in_hk[15] , \mgmt_io_in_hk[14] , \mgmt_io_in_hk[13] , \mgmt_io_in_hk[12] , \mgmt_io_in_hk[11] , \mgmt_io_in_hk[10] , \mgmt_io_in_hk[9] , \mgmt_io_in_hk[8] , \mgmt_io_in_hk[7] , \mgmt_io_in[6] , \mgmt_io_in[5] , \mgmt_io_in[4] , \mgmt_io_in[3] , \mgmt_io_in[2] , \mgmt_io_in[1] , \mgmt_io_in[0]  }),
+    .mgmt_gpio_oeb({ \mgmt_io_oeb_hk[37] , \mgmt_io_oeb_hk[36] , \mgmt_io_oeb_hk[35] , \mgmt_io_oeb[34] , \mgmt_io_oeb[33] , \mgmt_io_oeb[32] , \mgmt_io_oeb[31] , \mgmt_io_oeb[30] , \mgmt_io_oeb[29] , \mgmt_io_oeb[28] , \mgmt_io_oeb[27] , \mgmt_io_oeb[26] , \mgmt_io_oeb[25] , \mgmt_io_oeb[24] , \mgmt_io_oeb[23] , \mgmt_io_oeb[22] , \mgmt_io_oeb[21] , \mgmt_io_oeb[20] , \mgmt_io_oeb[19] , \mgmt_io_oeb[18] , \mgmt_io_oeb[17] , \mgmt_io_oeb[16] , \mgmt_io_oeb[15] , \mgmt_io_oeb[14] , \mgmt_io_oeb[13] , \mgmt_io_oeb[12] , \mgmt_io_oeb[11] , \mgmt_io_oeb[10] , \mgmt_io_oeb[9] , \mgmt_io_oeb[8] , \mgmt_io_oeb[7] , \mgmt_io_oeb[6] , \mgmt_io_oeb[5] , \mgmt_io_oeb[4] , \mgmt_io_oeb[3] , \mgmt_io_oeb[2] , \mgmt_io_oeb[1] , \mgmt_io_oeb[0]  }),
+    .mgmt_gpio_out({ \mgmt_io_out_hk[37] , \mgmt_io_out_hk[36] , \mgmt_io_out_hk[35] , \mgmt_io_out_hk[34] , \mgmt_io_out_hk[33] , \mgmt_io_out_hk[32] , \mgmt_io_out_hk[31] , \mgmt_io_out_hk[30] , \mgmt_io_out_hk[29] , \mgmt_io_out_hk[28] , \mgmt_io_out_hk[27] , \mgmt_io_out_hk[26] , \mgmt_io_out_hk[25] , \mgmt_io_out_hk[24] , \mgmt_io_out_hk[23] , \mgmt_io_out_hk[22] , \mgmt_io_out_hk[21] , \mgmt_io_out_hk[20] , \mgmt_io_out_hk[19] , \mgmt_io_out_hk[18] , \mgmt_io_out_hk[17] , \mgmt_io_out_hk[16] , \mgmt_io_out_hk[15] , \mgmt_io_out_hk[14] , \mgmt_io_out_hk[13] , \mgmt_io_out_hk[12] , \mgmt_io_out_hk[11] , \mgmt_io_out_hk[10] , \mgmt_io_out_hk[9] , \mgmt_io_out_hk[8] , \mgmt_io_out_hk[7] , \mgmt_io_out[6] , \mgmt_io_out[5] , \mgmt_io_out[4] , \mgmt_io_out[3] , \mgmt_io_out[2] , \mgmt_io_out[1] , \mgmt_io_out[0]  }),
+    .pad_flash_clk(flash_clk_frame),
+    .pad_flash_clk_oeb(flash_clk_oeb),
+    .pad_flash_csb(flash_csb_frame),
+    .pad_flash_csb_oeb(flash_csb_oeb),
+    .pad_flash_io0_di(flash_io0_di_buf),
+    .pad_flash_io0_do(flash_io0_do),
+    .pad_flash_io0_ieb(flash_io0_ieb),
+    .pad_flash_io0_oeb(flash_io0_oeb),
+    .pad_flash_io1_di(flash_io1_di_buf),
+    .pad_flash_io1_do(flash_io1_do),
+    .pad_flash_io1_ieb(flash_io1_ieb),
+    .pad_flash_io1_oeb(flash_io1_oeb),
+    .pll90_sel({ \spi_pll90_sel[2] , \spi_pll90_sel[1] , \spi_pll90_sel[0]  }),
+    .pll_bypass(ext_clk_sel),
+    .pll_dco_ena(spi_pll_dco_ena),
+    .pll_div({ \spi_pll_div[4] , \spi_pll_div[3] , \spi_pll_div[2] , \spi_pll_div[1] , \spi_pll_div[0]  }),
+    .pll_ena(spi_pll_ena),
+    .pll_sel({ \spi_pll_sel[2] , \spi_pll_sel[1] , \spi_pll_sel[0]  }),
+    .pll_trim({ \spi_pll_trim[25] , \spi_pll_trim[24] , \spi_pll_trim[23] , \spi_pll_trim[22] , \spi_pll_trim[21] , \spi_pll_trim[20] , \spi_pll_trim[19] , \spi_pll_trim[18] , \spi_pll_trim[17] , \spi_pll_trim[16] , \spi_pll_trim[15] , \spi_pll_trim[14] , \spi_pll_trim[13] , \spi_pll_trim[12] , \spi_pll_trim[11] , \spi_pll_trim[10] , \spi_pll_trim[9] , \spi_pll_trim[8] , \spi_pll_trim[7] , \spi_pll_trim[6] , \spi_pll_trim[5] , \spi_pll_trim[4] , \spi_pll_trim[3] , \spi_pll_trim[2] , \spi_pll_trim[1] , \spi_pll_trim[0]  }),
+    .porb(porb_l),
+    .pwr_ctrl_out({ \pwr_ctrl_nc[3] , \pwr_ctrl_nc[2] , \pwr_ctrl_nc[1] , \pwr_ctrl_nc[0]  }),
+    .qspi_enabled(qspi_enabled),
+    .reset(ext_reset),
+    .ser_rx(ser_rx),
+    .ser_tx(ser_tx),
+    .serial_clock(\gpio_clock_1_shifted[0] ),
+    .serial_data_1(\gpio_serial_link_1_shifted[0] ),
+    .serial_data_2(mprj_io_loader_data_2),
+    .serial_load(\gpio_load_1_shifted[0] ),
+    .serial_resetn(\gpio_resetn_1_shifted[0] ),
+    .spi_csb(spi_csb),
+    .spi_enabled(spi_enabled),
+    .spi_sck(spi_sck),
+    .spi_sdi(spi_sdi),
+    .spi_sdo(spi_sdo),
+    .spi_sdoenb(spi_sdoenb),
+    .spimemio_flash_clk(flash_clk_core),
+    .spimemio_flash_csb(flash_csb_core),
+    .spimemio_flash_io0_di(flash_io0_di_core),
+    .spimemio_flash_io0_do(flash_io0_do_core),
+    .spimemio_flash_io0_oeb(flash_io0_oeb_core),
+    .spimemio_flash_io1_di(flash_io1_di_core),
+    .spimemio_flash_io1_do(flash_io1_do_core),
+    .spimemio_flash_io1_oeb(flash_io1_oeb_core),
+    .spimemio_flash_io2_di(flash_io2_di_core),
+    .spimemio_flash_io2_do(flash_io2_do_core),
+    .spimemio_flash_io2_oeb(flash_io2_oeb_core),
+    .spimemio_flash_io3_di(flash_io3_di_core),
+    .spimemio_flash_io3_do(flash_io3_do_core),
+    .spimemio_flash_io3_oeb(flash_io3_oeb_core),
+    .trap(trap),
+    .uart_enabled(uart_enabled),
+    .user_clock(caravel_clk2),
+    .usr1_vcc_pwrgood(mprj_vcc_pwrgood),
+    .usr1_vdd_pwrgood(mprj_vdd_pwrgood),
+    .usr2_vcc_pwrgood(mprj2_vcc_pwrgood),
+    .usr2_vdd_pwrgood(mprj2_vdd_pwrgood),
+    .wb_ack_o(hk_ack_i),
+    .wb_adr_i({ \mprj_adr_o_core[31] , \mprj_adr_o_core[30] , \mprj_adr_o_core[29] , \mprj_adr_o_core[28] , \mprj_adr_o_core[27] , \mprj_adr_o_core[26] , \mprj_adr_o_core[25] , \mprj_adr_o_core[24] , \mprj_adr_o_core[23] , \mprj_adr_o_core[22] , \mprj_adr_o_core[21] , \mprj_adr_o_core[20] , \mprj_adr_o_core[19] , \mprj_adr_o_core[18] , \mprj_adr_o_core[17] , \mprj_adr_o_core[16] , \mprj_adr_o_core[15] , \mprj_adr_o_core[14] , \mprj_adr_o_core[13] , \mprj_adr_o_core[12] , \mprj_adr_o_core[11] , \mprj_adr_o_core[10] , \mprj_adr_o_core[9] , \mprj_adr_o_core[8] , \mprj_adr_o_core[7] , \mprj_adr_o_core[6] , \mprj_adr_o_core[5] , \mprj_adr_o_core[4] , \mprj_adr_o_core[3] , \mprj_adr_o_core[2] , \mprj_adr_o_core[1] , \mprj_adr_o_core[0]  }),
+    .wb_clk_i(caravel_clk),
+    .wb_cyc_i(hk_cyc_o),
+    .wb_dat_i({ \mprj_dat_o_core[31] , \mprj_dat_o_core[30] , \mprj_dat_o_core[29] , \mprj_dat_o_core[28] , \mprj_dat_o_core[27] , \mprj_dat_o_core[26] , \mprj_dat_o_core[25] , \mprj_dat_o_core[24] , \mprj_dat_o_core[23] , \mprj_dat_o_core[22] , \mprj_dat_o_core[21] , \mprj_dat_o_core[20] , \mprj_dat_o_core[19] , \mprj_dat_o_core[18] , \mprj_dat_o_core[17] , \mprj_dat_o_core[16] , \mprj_dat_o_core[15] , \mprj_dat_o_core[14] , \mprj_dat_o_core[13] , \mprj_dat_o_core[12] , \mprj_dat_o_core[11] , \mprj_dat_o_core[10] , \mprj_dat_o_core[9] , \mprj_dat_o_core[8] , \mprj_dat_o_core[7] , \mprj_dat_o_core[6] , \mprj_dat_o_core[5] , \mprj_dat_o_core[4] , \mprj_dat_o_core[3] , \mprj_dat_o_core[2] , \mprj_dat_o_core[1] , \mprj_dat_o_core[0]  }),
+    .wb_dat_o({ \hk_dat_i[31] , \hk_dat_i[30] , \hk_dat_i[29] , \hk_dat_i[28] , \hk_dat_i[27] , \hk_dat_i[26] , \hk_dat_i[25] , \hk_dat_i[24] , \hk_dat_i[23] , \hk_dat_i[22] , \hk_dat_i[21] , \hk_dat_i[20] , \hk_dat_i[19] , \hk_dat_i[18] , \hk_dat_i[17] , \hk_dat_i[16] , \hk_dat_i[15] , \hk_dat_i[14] , \hk_dat_i[13] , \hk_dat_i[12] , \hk_dat_i[11] , \hk_dat_i[10] , \hk_dat_i[9] , \hk_dat_i[8] , \hk_dat_i[7] , \hk_dat_i[6] , \hk_dat_i[5] , \hk_dat_i[4] , \hk_dat_i[3] , \hk_dat_i[2] , \hk_dat_i[1] , \hk_dat_i[0]  }),
+    .wb_rstn_i(caravel_rstn),
+    .wb_sel_i({ \mprj_sel_o_core[3] , \mprj_sel_o_core[2] , \mprj_sel_o_core[1] , \mprj_sel_o_core[0]  }),
+    .wb_stb_i(hk_stb_o),
+    .wb_we_i(mprj_we_o_core)
+  );
+  mgmt_protect mgmt_buffers (
+    .caravel_clk(clk_passthru),
+    .caravel_clk2(caravel_clk2),
+    .caravel_rstn(resetn_passthru),
+    .la_data_in_core({ \la_data_in_user[127] , \la_data_in_user[126] , \la_data_in_user[125] , \la_data_in_user[124] , \la_data_in_user[123] , \la_data_in_user[122] , \la_data_in_user[121] , \la_data_in_user[120] , \la_data_in_user[119] , \la_data_in_user[118] , \la_data_in_user[117] , \la_data_in_user[116] , \la_data_in_user[115] , \la_data_in_user[114] , \la_data_in_user[113] , \la_data_in_user[112] , \la_data_in_user[111] , \la_data_in_user[110] , \la_data_in_user[109] , \la_data_in_user[108] , \la_data_in_user[107] , \la_data_in_user[106] , \la_data_in_user[105] , \la_data_in_user[104] , \la_data_in_user[103] , \la_data_in_user[102] , \la_data_in_user[101] , \la_data_in_user[100] , \la_data_in_user[99] , \la_data_in_user[98] , \la_data_in_user[97] , \la_data_in_user[96] , \la_data_in_user[95] , \la_data_in_user[94] , \la_data_in_user[93] , \la_data_in_user[92] , \la_data_in_user[91] , \la_data_in_user[90] , \la_data_in_user[89] , \la_data_in_user[88] , \la_data_in_user[87] , \la_data_in_user[86] , \la_data_in_user[85] , \la_data_in_user[84] , \la_data_in_user[83] , \la_data_in_user[82] , \la_data_in_user[81] , \la_data_in_user[80] , \la_data_in_user[79] , \la_data_in_user[78] , \la_data_in_user[77] , \la_data_in_user[76] , \la_data_in_user[75] , \la_data_in_user[74] , \la_data_in_user[73] , \la_data_in_user[72] , \la_data_in_user[71] , \la_data_in_user[70] , \la_data_in_user[69] , \la_data_in_user[68] , \la_data_in_user[67] , \la_data_in_user[66] , \la_data_in_user[65] , \la_data_in_user[64] , \la_data_in_user[63] , \la_data_in_user[62] , \la_data_in_user[61] , \la_data_in_user[60] , \la_data_in_user[59] , \la_data_in_user[58] , \la_data_in_user[57] , \la_data_in_user[56] , \la_data_in_user[55] , \la_data_in_user[54] , \la_data_in_user[53] , \la_data_in_user[52] , \la_data_in_user[51] , \la_data_in_user[50] , \la_data_in_user[49] , \la_data_in_user[48] , \la_data_in_user[47] , \la_data_in_user[46] , \la_data_in_user[45] , \la_data_in_user[44] , \la_data_in_user[43] , \la_data_in_user[42] , \la_data_in_user[41] , \la_data_in_user[40] , \la_data_in_user[39] , \la_data_in_user[38] , \la_data_in_user[37] , \la_data_in_user[36] , \la_data_in_user[35] , \la_data_in_user[34] , \la_data_in_user[33] , \la_data_in_user[32] , \la_data_in_user[31] , \la_data_in_user[30] , \la_data_in_user[29] , \la_data_in_user[28] , \la_data_in_user[27] , \la_data_in_user[26] , \la_data_in_user[25] , \la_data_in_user[24] , \la_data_in_user[23] , \la_data_in_user[22] , \la_data_in_user[21] , \la_data_in_user[20] , \la_data_in_user[19] , \la_data_in_user[18] , \la_data_in_user[17] , \la_data_in_user[16] , \la_data_in_user[15] , \la_data_in_user[14] , \la_data_in_user[13] , \la_data_in_user[12] , \la_data_in_user[11] , \la_data_in_user[10] , \la_data_in_user[9] , \la_data_in_user[8] , \la_data_in_user[7] , \la_data_in_user[6] , \la_data_in_user[5] , \la_data_in_user[4] , \la_data_in_user[3] , \la_data_in_user[2] , \la_data_in_user[1] , \la_data_in_user[0]  }),
+    .la_data_in_mprj({ \la_data_in_mprj[127] , \la_data_in_mprj[126] , \la_data_in_mprj[125] , \la_data_in_mprj[124] , \la_data_in_mprj[123] , \la_data_in_mprj[122] , \la_data_in_mprj[121] , \la_data_in_mprj[120] , \la_data_in_mprj[119] , \la_data_in_mprj[118] , \la_data_in_mprj[117] , \la_data_in_mprj[116] , \la_data_in_mprj[115] , \la_data_in_mprj[114] , \la_data_in_mprj[113] , \la_data_in_mprj[112] , \la_data_in_mprj[111] , \la_data_in_mprj[110] , \la_data_in_mprj[109] , \la_data_in_mprj[108] , \la_data_in_mprj[107] , \la_data_in_mprj[106] , \la_data_in_mprj[105] , \la_data_in_mprj[104] , \la_data_in_mprj[103] , \la_data_in_mprj[102] , \la_data_in_mprj[101] , \la_data_in_mprj[100] , \la_data_in_mprj[99] , \la_data_in_mprj[98] , \la_data_in_mprj[97] , \la_data_in_mprj[96] , \la_data_in_mprj[95] , \la_data_in_mprj[94] , \la_data_in_mprj[93] , \la_data_in_mprj[92] , \la_data_in_mprj[91] , \la_data_in_mprj[90] , \la_data_in_mprj[89] , \la_data_in_mprj[88] , \la_data_in_mprj[87] , \la_data_in_mprj[86] , \la_data_in_mprj[85] , \la_data_in_mprj[84] , \la_data_in_mprj[83] , \la_data_in_mprj[82] , \la_data_in_mprj[81] , \la_data_in_mprj[80] , \la_data_in_mprj[79] , \la_data_in_mprj[78] , \la_data_in_mprj[77] , \la_data_in_mprj[76] , \la_data_in_mprj[75] , \la_data_in_mprj[74] , \la_data_in_mprj[73] , \la_data_in_mprj[72] , \la_data_in_mprj[71] , \la_data_in_mprj[70] , \la_data_in_mprj[69] , \la_data_in_mprj[68] , \la_data_in_mprj[67] , \la_data_in_mprj[66] , \la_data_in_mprj[65] , \la_data_in_mprj[64] , \la_data_in_mprj[63] , \la_data_in_mprj[62] , \la_data_in_mprj[61] , \la_data_in_mprj[60] , \la_data_in_mprj[59] , \la_data_in_mprj[58] , \la_data_in_mprj[57] , \la_data_in_mprj[56] , \la_data_in_mprj[55] , \la_data_in_mprj[54] , \la_data_in_mprj[53] , \la_data_in_mprj[52] , \la_data_in_mprj[51] , \la_data_in_mprj[50] , \la_data_in_mprj[49] , \la_data_in_mprj[48] , \la_data_in_mprj[47] , \la_data_in_mprj[46] , \la_data_in_mprj[45] , \la_data_in_mprj[44] , \la_data_in_mprj[43] , \la_data_in_mprj[42] , \la_data_in_mprj[41] , \la_data_in_mprj[40] , \la_data_in_mprj[39] , \la_data_in_mprj[38] , \la_data_in_mprj[37] , \la_data_in_mprj[36] , \la_data_in_mprj[35] , \la_data_in_mprj[34] , \la_data_in_mprj[33] , \la_data_in_mprj[32] , \la_data_in_mprj[31] , \la_data_in_mprj[30] , \la_data_in_mprj[29] , \la_data_in_mprj[28] , \la_data_in_mprj[27] , \la_data_in_mprj[26] , \la_data_in_mprj[25] , \la_data_in_mprj[24] , \la_data_in_mprj[23] , \la_data_in_mprj[22] , \la_data_in_mprj[21] , \la_data_in_mprj[20] , \la_data_in_mprj[19] , \la_data_in_mprj[18] , \la_data_in_mprj[17] , \la_data_in_mprj[16] , \la_data_in_mprj[15] , \la_data_in_mprj[14] , \la_data_in_mprj[13] , \la_data_in_mprj[12] , \la_data_in_mprj[11] , \la_data_in_mprj[10] , \la_data_in_mprj[9] , \la_data_in_mprj[8] , \la_data_in_mprj[7] , \la_data_in_mprj[6] , \la_data_in_mprj[5] , \la_data_in_mprj[4] , \la_data_in_mprj[3] , \la_data_in_mprj[2] , \la_data_in_mprj[1] , \la_data_in_mprj[0]  }),
+    .la_data_out_core({ \la_data_out_user[127] , \la_data_out_user[126] , \la_data_out_user[125] , \la_data_out_user[124] , \la_data_out_user[123] , \la_data_out_user[122] , \la_data_out_user[121] , \la_data_out_user[120] , \la_data_out_user[119] , \la_data_out_user[118] , \la_data_out_user[117] , \la_data_out_user[116] , \la_data_out_user[115] , \la_data_out_user[114] , \la_data_out_user[113] , \la_data_out_user[112] , \la_data_out_user[111] , \la_data_out_user[110] , \la_data_out_user[109] , \la_data_out_user[108] , \la_data_out_user[107] , \la_data_out_user[106] , \la_data_out_user[105] , \la_data_out_user[104] , \la_data_out_user[103] , \la_data_out_user[102] , \la_data_out_user[101] , \la_data_out_user[100] , \la_data_out_user[99] , \la_data_out_user[98] , \la_data_out_user[97] , \la_data_out_user[96] , \la_data_out_user[95] , \la_data_out_user[94] , \la_data_out_user[93] , \la_data_out_user[92] , \la_data_out_user[91] , \la_data_out_user[90] , \la_data_out_user[89] , \la_data_out_user[88] , \la_data_out_user[87] , \la_data_out_user[86] , \la_data_out_user[85] , \la_data_out_user[84] , \la_data_out_user[83] , \la_data_out_user[82] , \la_data_out_user[81] , \la_data_out_user[80] , \la_data_out_user[79] , \la_data_out_user[78] , \la_data_out_user[77] , \la_data_out_user[76] , \la_data_out_user[75] , \la_data_out_user[74] , \la_data_out_user[73] , \la_data_out_user[72] , \la_data_out_user[71] , \la_data_out_user[70] , \la_data_out_user[69] , \la_data_out_user[68] , \la_data_out_user[67] , \la_data_out_user[66] , \la_data_out_user[65] , \la_data_out_user[64] , \la_data_out_user[63] , \la_data_out_user[62] , \la_data_out_user[61] , \la_data_out_user[60] , \la_data_out_user[59] , \la_data_out_user[58] , \la_data_out_user[57] , \la_data_out_user[56] , \la_data_out_user[55] , \la_data_out_user[54] , \la_data_out_user[53] , \la_data_out_user[52] , \la_data_out_user[51] , \la_data_out_user[50] , \la_data_out_user[49] , \la_data_out_user[48] , \la_data_out_user[47] , \la_data_out_user[46] , \la_data_out_user[45] , \la_data_out_user[44] , \la_data_out_user[43] , \la_data_out_user[42] , \la_data_out_user[41] , \la_data_out_user[40] , \la_data_out_user[39] , \la_data_out_user[38] , \la_data_out_user[37] , \la_data_out_user[36] , \la_data_out_user[35] , \la_data_out_user[34] , \la_data_out_user[33] , \la_data_out_user[32] , \la_data_out_user[31] , \la_data_out_user[30] , \la_data_out_user[29] , \la_data_out_user[28] , \la_data_out_user[27] , \la_data_out_user[26] , \la_data_out_user[25] , \la_data_out_user[24] , \la_data_out_user[23] , \la_data_out_user[22] , \la_data_out_user[21] , \la_data_out_user[20] , \la_data_out_user[19] , \la_data_out_user[18] , \la_data_out_user[17] , \la_data_out_user[16] , \la_data_out_user[15] , \la_data_out_user[14] , \la_data_out_user[13] , \la_data_out_user[12] , \la_data_out_user[11] , \la_data_out_user[10] , \la_data_out_user[9] , \la_data_out_user[8] , \la_data_out_user[7] , \la_data_out_user[6] , \la_data_out_user[5] , \la_data_out_user[4] , \la_data_out_user[3] , \la_data_out_user[2] , \la_data_out_user[1] , \la_data_out_user[0]  }),
+    .la_data_out_mprj({ \la_data_out_mprj[127] , \la_data_out_mprj[126] , \la_data_out_mprj[125] , \la_data_out_mprj[124] , \la_data_out_mprj[123] , \la_data_out_mprj[122] , \la_data_out_mprj[121] , \la_data_out_mprj[120] , \la_data_out_mprj[119] , \la_data_out_mprj[118] , \la_data_out_mprj[117] , \la_data_out_mprj[116] , \la_data_out_mprj[115] , \la_data_out_mprj[114] , \la_data_out_mprj[113] , \la_data_out_mprj[112] , \la_data_out_mprj[111] , \la_data_out_mprj[110] , \la_data_out_mprj[109] , \la_data_out_mprj[108] , \la_data_out_mprj[107] , \la_data_out_mprj[106] , \la_data_out_mprj[105] , \la_data_out_mprj[104] , \la_data_out_mprj[103] , \la_data_out_mprj[102] , \la_data_out_mprj[101] , \la_data_out_mprj[100] , \la_data_out_mprj[99] , \la_data_out_mprj[98] , \la_data_out_mprj[97] , \la_data_out_mprj[96] , \la_data_out_mprj[95] , \la_data_out_mprj[94] , \la_data_out_mprj[93] , \la_data_out_mprj[92] , \la_data_out_mprj[91] , \la_data_out_mprj[90] , \la_data_out_mprj[89] , \la_data_out_mprj[88] , \la_data_out_mprj[87] , \la_data_out_mprj[86] , \la_data_out_mprj[85] , \la_data_out_mprj[84] , \la_data_out_mprj[83] , \la_data_out_mprj[82] , \la_data_out_mprj[81] , \la_data_out_mprj[80] , \la_data_out_mprj[79] , \la_data_out_mprj[78] , \la_data_out_mprj[77] , \la_data_out_mprj[76] , \la_data_out_mprj[75] , \la_data_out_mprj[74] , \la_data_out_mprj[73] , \la_data_out_mprj[72] , \la_data_out_mprj[71] , \la_data_out_mprj[70] , \la_data_out_mprj[69] , \la_data_out_mprj[68] , \la_data_out_mprj[67] , \la_data_out_mprj[66] , \la_data_out_mprj[65] , \la_data_out_mprj[64] , \la_data_out_mprj[63] , \la_data_out_mprj[62] , \la_data_out_mprj[61] , \la_data_out_mprj[60] , \la_data_out_mprj[59] , \la_data_out_mprj[58] , \la_data_out_mprj[57] , \la_data_out_mprj[56] , \la_data_out_mprj[55] , \la_data_out_mprj[54] , \la_data_out_mprj[53] , \la_data_out_mprj[52] , \la_data_out_mprj[51] , \la_data_out_mprj[50] , \la_data_out_mprj[49] , \la_data_out_mprj[48] , \la_data_out_mprj[47] , \la_data_out_mprj[46] , \la_data_out_mprj[45] , \la_data_out_mprj[44] , \la_data_out_mprj[43] , \la_data_out_mprj[42] , \la_data_out_mprj[41] , \la_data_out_mprj[40] , \la_data_out_mprj[39] , \la_data_out_mprj[38] , \la_data_out_mprj[37] , \la_data_out_mprj[36] , \la_data_out_mprj[35] , \la_data_out_mprj[34] , \la_data_out_mprj[33] , \la_data_out_mprj[32] , \la_data_out_mprj[31] , \la_data_out_mprj[30] , \la_data_out_mprj[29] , \la_data_out_mprj[28] , \la_data_out_mprj[27] , \la_data_out_mprj[26] , \la_data_out_mprj[25] , \la_data_out_mprj[24] , \la_data_out_mprj[23] , \la_data_out_mprj[22] , \la_data_out_mprj[21] , \la_data_out_mprj[20] , \la_data_out_mprj[19] , \la_data_out_mprj[18] , \la_data_out_mprj[17] , \la_data_out_mprj[16] , \la_data_out_mprj[15] , \la_data_out_mprj[14] , \la_data_out_mprj[13] , \la_data_out_mprj[12] , \la_data_out_mprj[11] , \la_data_out_mprj[10] , \la_data_out_mprj[9] , \la_data_out_mprj[8] , \la_data_out_mprj[7] , \la_data_out_mprj[6] , \la_data_out_mprj[5] , \la_data_out_mprj[4] , \la_data_out_mprj[3] , \la_data_out_mprj[2] , \la_data_out_mprj[1] , \la_data_out_mprj[0]  }),
+    .la_iena_mprj({ \la_iena_mprj[127] , \la_iena_mprj[126] , \la_iena_mprj[125] , \la_iena_mprj[124] , \la_iena_mprj[123] , \la_iena_mprj[122] , \la_iena_mprj[121] , \la_iena_mprj[120] , \la_iena_mprj[119] , \la_iena_mprj[118] , \la_iena_mprj[117] , \la_iena_mprj[116] , \la_iena_mprj[115] , \la_iena_mprj[114] , \la_iena_mprj[113] , \la_iena_mprj[112] , \la_iena_mprj[111] , \la_iena_mprj[110] , \la_iena_mprj[109] , \la_iena_mprj[108] , \la_iena_mprj[107] , \la_iena_mprj[106] , \la_iena_mprj[105] , \la_iena_mprj[104] , \la_iena_mprj[103] , \la_iena_mprj[102] , \la_iena_mprj[101] , \la_iena_mprj[100] , \la_iena_mprj[99] , \la_iena_mprj[98] , \la_iena_mprj[97] , \la_iena_mprj[96] , \la_iena_mprj[95] , \la_iena_mprj[94] , \la_iena_mprj[93] , \la_iena_mprj[92] , \la_iena_mprj[91] , \la_iena_mprj[90] , \la_iena_mprj[89] , \la_iena_mprj[88] , \la_iena_mprj[87] , \la_iena_mprj[86] , \la_iena_mprj[85] , \la_iena_mprj[84] , \la_iena_mprj[83] , \la_iena_mprj[82] , \la_iena_mprj[81] , \la_iena_mprj[80] , \la_iena_mprj[79] , \la_iena_mprj[78] , \la_iena_mprj[77] , \la_iena_mprj[76] , \la_iena_mprj[75] , \la_iena_mprj[74] , \la_iena_mprj[73] , \la_iena_mprj[72] , \la_iena_mprj[71] , \la_iena_mprj[70] , \la_iena_mprj[69] , \la_iena_mprj[68] , \la_iena_mprj[67] , \la_iena_mprj[66] , \la_iena_mprj[65] , \la_iena_mprj[64] , \la_iena_mprj[63] , \la_iena_mprj[62] , \la_iena_mprj[61] , \la_iena_mprj[60] , \la_iena_mprj[59] , \la_iena_mprj[58] , \la_iena_mprj[57] , \la_iena_mprj[56] , \la_iena_mprj[55] , \la_iena_mprj[54] , \la_iena_mprj[53] , \la_iena_mprj[52] , \la_iena_mprj[51] , \la_iena_mprj[50] , \la_iena_mprj[49] , \la_iena_mprj[48] , \la_iena_mprj[47] , \la_iena_mprj[46] , \la_iena_mprj[45] , \la_iena_mprj[44] , \la_iena_mprj[43] , \la_iena_mprj[42] , \la_iena_mprj[41] , \la_iena_mprj[40] , \la_iena_mprj[39] , \la_iena_mprj[38] , \la_iena_mprj[37] , \la_iena_mprj[36] , \la_iena_mprj[35] , \la_iena_mprj[34] , \la_iena_mprj[33] , \la_iena_mprj[32] , \la_iena_mprj[31] , \la_iena_mprj[30] , \la_iena_mprj[29] , \la_iena_mprj[28] , \la_iena_mprj[27] , \la_iena_mprj[26] , \la_iena_mprj[25] , \la_iena_mprj[24] , \la_iena_mprj[23] , \la_iena_mprj[22] , \la_iena_mprj[21] , \la_iena_mprj[20] , \la_iena_mprj[19] , \la_iena_mprj[18] , \la_iena_mprj[17] , \la_iena_mprj[16] , \la_iena_mprj[15] , \la_iena_mprj[14] , \la_iena_mprj[13] , \la_iena_mprj[12] , \la_iena_mprj[11] , \la_iena_mprj[10] , \la_iena_mprj[9] , \la_iena_mprj[8] , \la_iena_mprj[7] , \la_iena_mprj[6] , \la_iena_mprj[5] , \la_iena_mprj[4] , \la_iena_mprj[3] , \la_iena_mprj[2] , \la_iena_mprj[1] , \la_iena_mprj[0]  }),
+    .la_oenb_core({ \la_oenb_user[127] , \la_oenb_user[126] , \la_oenb_user[125] , \la_oenb_user[124] , \la_oenb_user[123] , \la_oenb_user[122] , \la_oenb_user[121] , \la_oenb_user[120] , \la_oenb_user[119] , \la_oenb_user[118] , \la_oenb_user[117] , \la_oenb_user[116] , \la_oenb_user[115] , \la_oenb_user[114] , \la_oenb_user[113] , \la_oenb_user[112] , \la_oenb_user[111] , \la_oenb_user[110] , \la_oenb_user[109] , \la_oenb_user[108] , \la_oenb_user[107] , \la_oenb_user[106] , \la_oenb_user[105] , \la_oenb_user[104] , \la_oenb_user[103] , \la_oenb_user[102] , \la_oenb_user[101] , \la_oenb_user[100] , \la_oenb_user[99] , \la_oenb_user[98] , \la_oenb_user[97] , \la_oenb_user[96] , \la_oenb_user[95] , \la_oenb_user[94] , \la_oenb_user[93] , \la_oenb_user[92] , \la_oenb_user[91] , \la_oenb_user[90] , \la_oenb_user[89] , \la_oenb_user[88] , \la_oenb_user[87] , \la_oenb_user[86] , \la_oenb_user[85] , \la_oenb_user[84] , \la_oenb_user[83] , \la_oenb_user[82] , \la_oenb_user[81] , \la_oenb_user[80] , \la_oenb_user[79] , \la_oenb_user[78] , \la_oenb_user[77] , \la_oenb_user[76] , \la_oenb_user[75] , \la_oenb_user[74] , \la_oenb_user[73] , \la_oenb_user[72] , \la_oenb_user[71] , \la_oenb_user[70] , \la_oenb_user[69] , \la_oenb_user[68] , \la_oenb_user[67] , \la_oenb_user[66] , \la_oenb_user[65] , \la_oenb_user[64] , \la_oenb_user[63] , \la_oenb_user[62] , \la_oenb_user[61] , \la_oenb_user[60] , \la_oenb_user[59] , \la_oenb_user[58] , \la_oenb_user[57] , \la_oenb_user[56] , \la_oenb_user[55] , \la_oenb_user[54] , \la_oenb_user[53] , \la_oenb_user[52] , \la_oenb_user[51] , \la_oenb_user[50] , \la_oenb_user[49] , \la_oenb_user[48] , \la_oenb_user[47] , \la_oenb_user[46] , \la_oenb_user[45] , \la_oenb_user[44] , \la_oenb_user[43] , \la_oenb_user[42] , \la_oenb_user[41] , \la_oenb_user[40] , \la_oenb_user[39] , \la_oenb_user[38] , \la_oenb_user[37] , \la_oenb_user[36] , \la_oenb_user[35] , \la_oenb_user[34] , \la_oenb_user[33] , \la_oenb_user[32] , \la_oenb_user[31] , \la_oenb_user[30] , \la_oenb_user[29] , \la_oenb_user[28] , \la_oenb_user[27] , \la_oenb_user[26] , \la_oenb_user[25] , \la_oenb_user[24] , \la_oenb_user[23] , \la_oenb_user[22] , \la_oenb_user[21] , \la_oenb_user[20] , \la_oenb_user[19] , \la_oenb_user[18] , \la_oenb_user[17] , \la_oenb_user[16] , \la_oenb_user[15] , \la_oenb_user[14] , \la_oenb_user[13] , \la_oenb_user[12] , \la_oenb_user[11] , \la_oenb_user[10] , \la_oenb_user[9] , \la_oenb_user[8] , \la_oenb_user[7] , \la_oenb_user[6] , \la_oenb_user[5] , \la_oenb_user[4] , \la_oenb_user[3] , \la_oenb_user[2] , \la_oenb_user[1] , \la_oenb_user[0]  }),
+    .la_oenb_mprj({ \la_oenb_mprj[127] , \la_oenb_mprj[126] , \la_oenb_mprj[125] , \la_oenb_mprj[124] , \la_oenb_mprj[123] , \la_oenb_mprj[122] , \la_oenb_mprj[121] , \la_oenb_mprj[120] , \la_oenb_mprj[119] , \la_oenb_mprj[118] , \la_oenb_mprj[117] , \la_oenb_mprj[116] , \la_oenb_mprj[115] , \la_oenb_mprj[114] , \la_oenb_mprj[113] , \la_oenb_mprj[112] , \la_oenb_mprj[111] , \la_oenb_mprj[110] , \la_oenb_mprj[109] , \la_oenb_mprj[108] , \la_oenb_mprj[107] , \la_oenb_mprj[106] , \la_oenb_mprj[105] , \la_oenb_mprj[104] , \la_oenb_mprj[103] , \la_oenb_mprj[102] , \la_oenb_mprj[101] , \la_oenb_mprj[100] , \la_oenb_mprj[99] , \la_oenb_mprj[98] , \la_oenb_mprj[97] , \la_oenb_mprj[96] , \la_oenb_mprj[95] , \la_oenb_mprj[94] , \la_oenb_mprj[93] , \la_oenb_mprj[92] , \la_oenb_mprj[91] , \la_oenb_mprj[90] , \la_oenb_mprj[89] , \la_oenb_mprj[88] , \la_oenb_mprj[87] , \la_oenb_mprj[86] , \la_oenb_mprj[85] , \la_oenb_mprj[84] , \la_oenb_mprj[83] , \la_oenb_mprj[82] , \la_oenb_mprj[81] , \la_oenb_mprj[80] , \la_oenb_mprj[79] , \la_oenb_mprj[78] , \la_oenb_mprj[77] , \la_oenb_mprj[76] , \la_oenb_mprj[75] , \la_oenb_mprj[74] , \la_oenb_mprj[73] , \la_oenb_mprj[72] , \la_oenb_mprj[71] , \la_oenb_mprj[70] , \la_oenb_mprj[69] , \la_oenb_mprj[68] , \la_oenb_mprj[67] , \la_oenb_mprj[66] , \la_oenb_mprj[65] , \la_oenb_mprj[64] , \la_oenb_mprj[63] , \la_oenb_mprj[62] , \la_oenb_mprj[61] , \la_oenb_mprj[60] , \la_oenb_mprj[59] , \la_oenb_mprj[58] , \la_oenb_mprj[57] , \la_oenb_mprj[56] , \la_oenb_mprj[55] , \la_oenb_mprj[54] , \la_oenb_mprj[53] , \la_oenb_mprj[52] , \la_oenb_mprj[51] , \la_oenb_mprj[50] , \la_oenb_mprj[49] , \la_oenb_mprj[48] , \la_oenb_mprj[47] , \la_oenb_mprj[46] , \la_oenb_mprj[45] , \la_oenb_mprj[44] , \la_oenb_mprj[43] , \la_oenb_mprj[42] , \la_oenb_mprj[41] , \la_oenb_mprj[40] , \la_oenb_mprj[39] , \la_oenb_mprj[38] , \la_oenb_mprj[37] , \la_oenb_mprj[36] , \la_oenb_mprj[35] , \la_oenb_mprj[34] , \la_oenb_mprj[33] , \la_oenb_mprj[32] , \la_oenb_mprj[31] , \la_oenb_mprj[30] , \la_oenb_mprj[29] , \la_oenb_mprj[28] , \la_oenb_mprj[27] , \la_oenb_mprj[26] , \la_oenb_mprj[25] , \la_oenb_mprj[24] , \la_oenb_mprj[23] , \la_oenb_mprj[22] , \la_oenb_mprj[21] , \la_oenb_mprj[20] , \la_oenb_mprj[19] , \la_oenb_mprj[18] , \la_oenb_mprj[17] , \la_oenb_mprj[16] , \la_oenb_mprj[15] , \la_oenb_mprj[14] , \la_oenb_mprj[13] , \la_oenb_mprj[12] , \la_oenb_mprj[11] , \la_oenb_mprj[10] , \la_oenb_mprj[9] , \la_oenb_mprj[8] , \la_oenb_mprj[7] , \la_oenb_mprj[6] , \la_oenb_mprj[5] , \la_oenb_mprj[4] , \la_oenb_mprj[3] , \la_oenb_mprj[2] , \la_oenb_mprj[1] , \la_oenb_mprj[0]  }),
+    .mprj_ack_i_core(mprj_ack_i_core),
+    .mprj_ack_i_user(mprj_ack_i_user),
+    .mprj_adr_o_core({ \mprj_adr_o_core[31] , \mprj_adr_o_core[30] , \mprj_adr_o_core[29] , \mprj_adr_o_core[28] , \mprj_adr_o_core[27] , \mprj_adr_o_core[26] , \mprj_adr_o_core[25] , \mprj_adr_o_core[24] , \mprj_adr_o_core[23] , \mprj_adr_o_core[22] , \mprj_adr_o_core[21] , \mprj_adr_o_core[20] , \mprj_adr_o_core[19] , \mprj_adr_o_core[18] , \mprj_adr_o_core[17] , \mprj_adr_o_core[16] , \mprj_adr_o_core[15] , \mprj_adr_o_core[14] , \mprj_adr_o_core[13] , \mprj_adr_o_core[12] , \mprj_adr_o_core[11] , \mprj_adr_o_core[10] , \mprj_adr_o_core[9] , \mprj_adr_o_core[8] , \mprj_adr_o_core[7] , \mprj_adr_o_core[6] , \mprj_adr_o_core[5] , \mprj_adr_o_core[4] , \mprj_adr_o_core[3] , \mprj_adr_o_core[2] , \mprj_adr_o_core[1] , \mprj_adr_o_core[0]  }),
+    .mprj_adr_o_user({ \mprj_adr_o_user[31] , \mprj_adr_o_user[30] , \mprj_adr_o_user[29] , \mprj_adr_o_user[28] , \mprj_adr_o_user[27] , \mprj_adr_o_user[26] , \mprj_adr_o_user[25] , \mprj_adr_o_user[24] , \mprj_adr_o_user[23] , \mprj_adr_o_user[22] , \mprj_adr_o_user[21] , \mprj_adr_o_user[20] , \mprj_adr_o_user[19] , \mprj_adr_o_user[18] , \mprj_adr_o_user[17] , \mprj_adr_o_user[16] , \mprj_adr_o_user[15] , \mprj_adr_o_user[14] , \mprj_adr_o_user[13] , \mprj_adr_o_user[12] , \mprj_adr_o_user[11] , \mprj_adr_o_user[10] , \mprj_adr_o_user[9] , \mprj_adr_o_user[8] , \mprj_adr_o_user[7] , \mprj_adr_o_user[6] , \mprj_adr_o_user[5] , \mprj_adr_o_user[4] , \mprj_adr_o_user[3] , \mprj_adr_o_user[2] , \mprj_adr_o_user[1] , \mprj_adr_o_user[0]  }),
+    .mprj_cyc_o_core(mprj_cyc_o_core),
+    .mprj_cyc_o_user(mprj_cyc_o_user),
+    .mprj_dat_i_core({ \mprj_dat_i_core[31] , \mprj_dat_i_core[30] , \mprj_dat_i_core[29] , \mprj_dat_i_core[28] , \mprj_dat_i_core[27] , \mprj_dat_i_core[26] , \mprj_dat_i_core[25] , \mprj_dat_i_core[24] , \mprj_dat_i_core[23] , \mprj_dat_i_core[22] , \mprj_dat_i_core[21] , \mprj_dat_i_core[20] , \mprj_dat_i_core[19] , \mprj_dat_i_core[18] , \mprj_dat_i_core[17] , \mprj_dat_i_core[16] , \mprj_dat_i_core[15] , \mprj_dat_i_core[14] , \mprj_dat_i_core[13] , \mprj_dat_i_core[12] , \mprj_dat_i_core[11] , \mprj_dat_i_core[10] , \mprj_dat_i_core[9] , \mprj_dat_i_core[8] , \mprj_dat_i_core[7] , \mprj_dat_i_core[6] , \mprj_dat_i_core[5] , \mprj_dat_i_core[4] , \mprj_dat_i_core[3] , \mprj_dat_i_core[2] , \mprj_dat_i_core[1] , \mprj_dat_i_core[0]  }),
+    .mprj_dat_i_user({ \mprj_dat_i_user[31] , \mprj_dat_i_user[30] , \mprj_dat_i_user[29] , \mprj_dat_i_user[28] , \mprj_dat_i_user[27] , \mprj_dat_i_user[26] , \mprj_dat_i_user[25] , \mprj_dat_i_user[24] , \mprj_dat_i_user[23] , \mprj_dat_i_user[22] , \mprj_dat_i_user[21] , \mprj_dat_i_user[20] , \mprj_dat_i_user[19] , \mprj_dat_i_user[18] , \mprj_dat_i_user[17] , \mprj_dat_i_user[16] , \mprj_dat_i_user[15] , \mprj_dat_i_user[14] , \mprj_dat_i_user[13] , \mprj_dat_i_user[12] , \mprj_dat_i_user[11] , \mprj_dat_i_user[10] , \mprj_dat_i_user[9] , \mprj_dat_i_user[8] , \mprj_dat_i_user[7] , \mprj_dat_i_user[6] , \mprj_dat_i_user[5] , \mprj_dat_i_user[4] , \mprj_dat_i_user[3] , \mprj_dat_i_user[2] , \mprj_dat_i_user[1] , \mprj_dat_i_user[0]  }),
+    .mprj_dat_o_core({ \mprj_dat_o_core[31] , \mprj_dat_o_core[30] , \mprj_dat_o_core[29] , \mprj_dat_o_core[28] , \mprj_dat_o_core[27] , \mprj_dat_o_core[26] , \mprj_dat_o_core[25] , \mprj_dat_o_core[24] , \mprj_dat_o_core[23] , \mprj_dat_o_core[22] , \mprj_dat_o_core[21] , \mprj_dat_o_core[20] , \mprj_dat_o_core[19] , \mprj_dat_o_core[18] , \mprj_dat_o_core[17] , \mprj_dat_o_core[16] , \mprj_dat_o_core[15] , \mprj_dat_o_core[14] , \mprj_dat_o_core[13] , \mprj_dat_o_core[12] , \mprj_dat_o_core[11] , \mprj_dat_o_core[10] , \mprj_dat_o_core[9] , \mprj_dat_o_core[8] , \mprj_dat_o_core[7] , \mprj_dat_o_core[6] , \mprj_dat_o_core[5] , \mprj_dat_o_core[4] , \mprj_dat_o_core[3] , \mprj_dat_o_core[2] , \mprj_dat_o_core[1] , \mprj_dat_o_core[0]  }),
+    .mprj_dat_o_user({ \mprj_dat_o_user[31] , \mprj_dat_o_user[30] , \mprj_dat_o_user[29] , \mprj_dat_o_user[28] , \mprj_dat_o_user[27] , \mprj_dat_o_user[26] , \mprj_dat_o_user[25] , \mprj_dat_o_user[24] , \mprj_dat_o_user[23] , \mprj_dat_o_user[22] , \mprj_dat_o_user[21] , \mprj_dat_o_user[20] , \mprj_dat_o_user[19] , \mprj_dat_o_user[18] , \mprj_dat_o_user[17] , \mprj_dat_o_user[16] , \mprj_dat_o_user[15] , \mprj_dat_o_user[14] , \mprj_dat_o_user[13] , \mprj_dat_o_user[12] , \mprj_dat_o_user[11] , \mprj_dat_o_user[10] , \mprj_dat_o_user[9] , \mprj_dat_o_user[8] , \mprj_dat_o_user[7] , \mprj_dat_o_user[6] , \mprj_dat_o_user[5] , \mprj_dat_o_user[4] , \mprj_dat_o_user[3] , \mprj_dat_o_user[2] , \mprj_dat_o_user[1] , \mprj_dat_o_user[0]  }),
+    .mprj_iena_wb(mprj_iena_wb),
+    .mprj_sel_o_core({ \mprj_sel_o_core[3] , \mprj_sel_o_core[2] , \mprj_sel_o_core[1] , \mprj_sel_o_core[0]  }),
+    .mprj_sel_o_user({ \mprj_sel_o_user[3] , \mprj_sel_o_user[2] , \mprj_sel_o_user[1] , \mprj_sel_o_user[0]  }),
+    .mprj_stb_o_core(mprj_stb_o_core),
+    .mprj_stb_o_user(mprj_stb_o_user),
+    .mprj_we_o_core(mprj_we_o_core),
+    .mprj_we_o_user(mprj_we_o_user),
+    .user1_vcc_powergood(mprj_vcc_pwrgood),
+    .user1_vdd_powergood(mprj_vdd_pwrgood),
+    .user2_vcc_powergood(mprj2_vcc_pwrgood),
+    .user2_vdd_powergood(mprj2_vdd_pwrgood),
+    .user_clock(mprj_clock),
+    .user_clock2(mprj_clock2),
+    .user_irq({ \user_irq[2] , \user_irq[1] , \user_irq[0]  }),
+    .user_irq_core({ \user_irq_core[2] , \user_irq_core[1] , \user_irq_core[0]  }),
+    .user_irq_ena({ \user_irq_ena[2] , \user_irq_ena[1] , \user_irq_ena[0]  }),
+    .user_reset(mprj_reset),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vccd2(vccd2_core),
+    .vdda1(vdda1_core),
+    .vdda2(vdda2_core),
+    .vssa1(vssa1_core),
+    .vssa2(vssa2_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .vssd2(vssd2_core)
+  );
+  user_project_wrapper mprj (
+    .analog_io({ \user_analog_io[28] , \user_analog_io[27] , \user_analog_io[26] , \user_analog_io[25] , \user_analog_io[24] , \user_analog_io[23] , \user_analog_io[22] , \user_analog_io[21] , \user_analog_io[20] , \user_analog_io[19] , \user_analog_io[18] , \user_analog_io[17] , \user_analog_io[16] , \user_analog_io[15] , \user_analog_io[14] , \user_analog_io[13] , \user_analog_io[12] , \user_analog_io[11] , \user_analog_io[10] , \user_analog_io[9] , \user_analog_io[8] , \user_analog_io[7] , \user_analog_io[6] , \user_analog_io[5] , \user_analog_io[4] , \user_analog_io[3] , \user_analog_io[2] , \user_analog_io[1] , \user_analog_io[0]  }),
+    .io_in({ \user_io_in[37] , \user_io_in[36] , \user_io_in[35] , \user_io_in[34] , \user_io_in[33] , \user_io_in[32] , \user_io_in[31] , \user_io_in[30] , \user_io_in[29] , \user_io_in[28] , \user_io_in[27] , \user_io_in[26] , \user_io_in[25] , \user_io_in[24] , \user_io_in[23] , \user_io_in[22] , \user_io_in[21] , \user_io_in[20] , \user_io_in[19] , \user_io_in[18] , \user_io_in[17] , \user_io_in[16] , \user_io_in[15] , \user_io_in[14] , \user_io_in[13] , \user_io_in[12] , \user_io_in[11] , \user_io_in[10] , \user_io_in[9] , \user_io_in[8] , \user_io_in[7] , \user_io_in[6] , \user_io_in[5] , \user_io_in[4] , \user_io_in[3] , \user_io_in[2] , \user_io_in[1] , \user_io_in[0]  }),
+    .io_oeb({ \user_io_oeb[37] , \user_io_oeb[36] , \user_io_oeb[35] , \user_io_oeb[34] , \user_io_oeb[33] , \user_io_oeb[32] , \user_io_oeb[31] , \user_io_oeb[30] , \user_io_oeb[29] , \user_io_oeb[28] , \user_io_oeb[27] , \user_io_oeb[26] , \user_io_oeb[25] , \user_io_oeb[24] , \user_io_oeb[23] , \user_io_oeb[22] , \user_io_oeb[21] , \user_io_oeb[20] , \user_io_oeb[19] , \user_io_oeb[18] , \user_io_oeb[17] , \user_io_oeb[16] , \user_io_oeb[15] , \user_io_oeb[14] , \user_io_oeb[13] , \user_io_oeb[12] , \user_io_oeb[11] , \user_io_oeb[10] , \user_io_oeb[9] , \user_io_oeb[8] , \user_io_oeb[7] , \user_io_oeb[6] , \user_io_oeb[5] , \user_io_oeb[4] , \user_io_oeb[3] , \user_io_oeb[2] , \user_io_oeb[1] , \user_io_oeb[0]  }),
+    .io_out({ \user_io_out[37] , \user_io_out[36] , \user_io_out[35] , \user_io_out[34] , \user_io_out[33] , \user_io_out[32] , \user_io_out[31] , \user_io_out[30] , \user_io_out[29] , \user_io_out[28] , \user_io_out[27] , \user_io_out[26] , \user_io_out[25] , \user_io_out[24] , \user_io_out[23] , \user_io_out[22] , \user_io_out[21] , \user_io_out[20] , \user_io_out[19] , \user_io_out[18] , \user_io_out[17] , \user_io_out[16] , \user_io_out[15] , \user_io_out[14] , \user_io_out[13] , \user_io_out[12] , \user_io_out[11] , \user_io_out[10] , \user_io_out[9] , \user_io_out[8] , \user_io_out[7] , \user_io_out[6] , \user_io_out[5] , \user_io_out[4] , \user_io_out[3] , \user_io_out[2] , \user_io_out[1] , \user_io_out[0]  }),
+    .la_data_in({ \la_data_in_user[127] , \la_data_in_user[126] , \la_data_in_user[125] , \la_data_in_user[124] , \la_data_in_user[123] , \la_data_in_user[122] , \la_data_in_user[121] , \la_data_in_user[120] , \la_data_in_user[119] , \la_data_in_user[118] , \la_data_in_user[117] , \la_data_in_user[116] , \la_data_in_user[115] , \la_data_in_user[114] , \la_data_in_user[113] , \la_data_in_user[112] , \la_data_in_user[111] , \la_data_in_user[110] , \la_data_in_user[109] , \la_data_in_user[108] , \la_data_in_user[107] , \la_data_in_user[106] , \la_data_in_user[105] , \la_data_in_user[104] , \la_data_in_user[103] , \la_data_in_user[102] , \la_data_in_user[101] , \la_data_in_user[100] , \la_data_in_user[99] , \la_data_in_user[98] , \la_data_in_user[97] , \la_data_in_user[96] , \la_data_in_user[95] , \la_data_in_user[94] , \la_data_in_user[93] , \la_data_in_user[92] , \la_data_in_user[91] , \la_data_in_user[90] , \la_data_in_user[89] , \la_data_in_user[88] , \la_data_in_user[87] , \la_data_in_user[86] , \la_data_in_user[85] , \la_data_in_user[84] , \la_data_in_user[83] , \la_data_in_user[82] , \la_data_in_user[81] , \la_data_in_user[80] , \la_data_in_user[79] , \la_data_in_user[78] , \la_data_in_user[77] , \la_data_in_user[76] , \la_data_in_user[75] , \la_data_in_user[74] , \la_data_in_user[73] , \la_data_in_user[72] , \la_data_in_user[71] , \la_data_in_user[70] , \la_data_in_user[69] , \la_data_in_user[68] , \la_data_in_user[67] , \la_data_in_user[66] , \la_data_in_user[65] , \la_data_in_user[64] , \la_data_in_user[63] , \la_data_in_user[62] , \la_data_in_user[61] , \la_data_in_user[60] , \la_data_in_user[59] , \la_data_in_user[58] , \la_data_in_user[57] , \la_data_in_user[56] , \la_data_in_user[55] , \la_data_in_user[54] , \la_data_in_user[53] , \la_data_in_user[52] , \la_data_in_user[51] , \la_data_in_user[50] , \la_data_in_user[49] , \la_data_in_user[48] , \la_data_in_user[47] , \la_data_in_user[46] , \la_data_in_user[45] , \la_data_in_user[44] , \la_data_in_user[43] , \la_data_in_user[42] , \la_data_in_user[41] , \la_data_in_user[40] , \la_data_in_user[39] , \la_data_in_user[38] , \la_data_in_user[37] , \la_data_in_user[36] , \la_data_in_user[35] , \la_data_in_user[34] , \la_data_in_user[33] , \la_data_in_user[32] , \la_data_in_user[31] , \la_data_in_user[30] , \la_data_in_user[29] , \la_data_in_user[28] , \la_data_in_user[27] , \la_data_in_user[26] , \la_data_in_user[25] , \la_data_in_user[24] , \la_data_in_user[23] , \la_data_in_user[22] , \la_data_in_user[21] , \la_data_in_user[20] , \la_data_in_user[19] , \la_data_in_user[18] , \la_data_in_user[17] , \la_data_in_user[16] , \la_data_in_user[15] , \la_data_in_user[14] , \la_data_in_user[13] , \la_data_in_user[12] , \la_data_in_user[11] , \la_data_in_user[10] , \la_data_in_user[9] , \la_data_in_user[8] , \la_data_in_user[7] , \la_data_in_user[6] , \la_data_in_user[5] , \la_data_in_user[4] , \la_data_in_user[3] , \la_data_in_user[2] , \la_data_in_user[1] , \la_data_in_user[0]  }),
+    .la_data_out({ \la_data_out_user[127] , \la_data_out_user[126] , \la_data_out_user[125] , \la_data_out_user[124] , \la_data_out_user[123] , \la_data_out_user[122] , \la_data_out_user[121] , \la_data_out_user[120] , \la_data_out_user[119] , \la_data_out_user[118] , \la_data_out_user[117] , \la_data_out_user[116] , \la_data_out_user[115] , \la_data_out_user[114] , \la_data_out_user[113] , \la_data_out_user[112] , \la_data_out_user[111] , \la_data_out_user[110] , \la_data_out_user[109] , \la_data_out_user[108] , \la_data_out_user[107] , \la_data_out_user[106] , \la_data_out_user[105] , \la_data_out_user[104] , \la_data_out_user[103] , \la_data_out_user[102] , \la_data_out_user[101] , \la_data_out_user[100] , \la_data_out_user[99] , \la_data_out_user[98] , \la_data_out_user[97] , \la_data_out_user[96] , \la_data_out_user[95] , \la_data_out_user[94] , \la_data_out_user[93] , \la_data_out_user[92] , \la_data_out_user[91] , \la_data_out_user[90] , \la_data_out_user[89] , \la_data_out_user[88] , \la_data_out_user[87] , \la_data_out_user[86] , \la_data_out_user[85] , \la_data_out_user[84] , \la_data_out_user[83] , \la_data_out_user[82] , \la_data_out_user[81] , \la_data_out_user[80] , \la_data_out_user[79] , \la_data_out_user[78] , \la_data_out_user[77] , \la_data_out_user[76] , \la_data_out_user[75] , \la_data_out_user[74] , \la_data_out_user[73] , \la_data_out_user[72] , \la_data_out_user[71] , \la_data_out_user[70] , \la_data_out_user[69] , \la_data_out_user[68] , \la_data_out_user[67] , \la_data_out_user[66] , \la_data_out_user[65] , \la_data_out_user[64] , \la_data_out_user[63] , \la_data_out_user[62] , \la_data_out_user[61] , \la_data_out_user[60] , \la_data_out_user[59] , \la_data_out_user[58] , \la_data_out_user[57] , \la_data_out_user[56] , \la_data_out_user[55] , \la_data_out_user[54] , \la_data_out_user[53] , \la_data_out_user[52] , \la_data_out_user[51] , \la_data_out_user[50] , \la_data_out_user[49] , \la_data_out_user[48] , \la_data_out_user[47] , \la_data_out_user[46] , \la_data_out_user[45] , \la_data_out_user[44] , \la_data_out_user[43] , \la_data_out_user[42] , \la_data_out_user[41] , \la_data_out_user[40] , \la_data_out_user[39] , \la_data_out_user[38] , \la_data_out_user[37] , \la_data_out_user[36] , \la_data_out_user[35] , \la_data_out_user[34] , \la_data_out_user[33] , \la_data_out_user[32] , \la_data_out_user[31] , \la_data_out_user[30] , \la_data_out_user[29] , \la_data_out_user[28] , \la_data_out_user[27] , \la_data_out_user[26] , \la_data_out_user[25] , \la_data_out_user[24] , \la_data_out_user[23] , \la_data_out_user[22] , \la_data_out_user[21] , \la_data_out_user[20] , \la_data_out_user[19] , \la_data_out_user[18] , \la_data_out_user[17] , \la_data_out_user[16] , \la_data_out_user[15] , \la_data_out_user[14] , \la_data_out_user[13] , \la_data_out_user[12] , \la_data_out_user[11] , \la_data_out_user[10] , \la_data_out_user[9] , \la_data_out_user[8] , \la_data_out_user[7] , \la_data_out_user[6] , \la_data_out_user[5] , \la_data_out_user[4] , \la_data_out_user[3] , \la_data_out_user[2] , \la_data_out_user[1] , \la_data_out_user[0]  }),
+    .la_oenb({ \la_oenb_user[127] , \la_oenb_user[126] , \la_oenb_user[125] , \la_oenb_user[124] , \la_oenb_user[123] , \la_oenb_user[122] , \la_oenb_user[121] , \la_oenb_user[120] , \la_oenb_user[119] , \la_oenb_user[118] , \la_oenb_user[117] , \la_oenb_user[116] , \la_oenb_user[115] , \la_oenb_user[114] , \la_oenb_user[113] , \la_oenb_user[112] , \la_oenb_user[111] , \la_oenb_user[110] , \la_oenb_user[109] , \la_oenb_user[108] , \la_oenb_user[107] , \la_oenb_user[106] , \la_oenb_user[105] , \la_oenb_user[104] , \la_oenb_user[103] , \la_oenb_user[102] , \la_oenb_user[101] , \la_oenb_user[100] , \la_oenb_user[99] , \la_oenb_user[98] , \la_oenb_user[97] , \la_oenb_user[96] , \la_oenb_user[95] , \la_oenb_user[94] , \la_oenb_user[93] , \la_oenb_user[92] , \la_oenb_user[91] , \la_oenb_user[90] , \la_oenb_user[89] , \la_oenb_user[88] , \la_oenb_user[87] , \la_oenb_user[86] , \la_oenb_user[85] , \la_oenb_user[84] , \la_oenb_user[83] , \la_oenb_user[82] , \la_oenb_user[81] , \la_oenb_user[80] , \la_oenb_user[79] , \la_oenb_user[78] , \la_oenb_user[77] , \la_oenb_user[76] , \la_oenb_user[75] , \la_oenb_user[74] , \la_oenb_user[73] , \la_oenb_user[72] , \la_oenb_user[71] , \la_oenb_user[70] , \la_oenb_user[69] , \la_oenb_user[68] , \la_oenb_user[67] , \la_oenb_user[66] , \la_oenb_user[65] , \la_oenb_user[64] , \la_oenb_user[63] , \la_oenb_user[62] , \la_oenb_user[61] , \la_oenb_user[60] , \la_oenb_user[59] , \la_oenb_user[58] , \la_oenb_user[57] , \la_oenb_user[56] , \la_oenb_user[55] , \la_oenb_user[54] , \la_oenb_user[53] , \la_oenb_user[52] , \la_oenb_user[51] , \la_oenb_user[50] , \la_oenb_user[49] , \la_oenb_user[48] , \la_oenb_user[47] , \la_oenb_user[46] , \la_oenb_user[45] , \la_oenb_user[44] , \la_oenb_user[43] , \la_oenb_user[42] , \la_oenb_user[41] , \la_oenb_user[40] , \la_oenb_user[39] , \la_oenb_user[38] , \la_oenb_user[37] , \la_oenb_user[36] , \la_oenb_user[35] , \la_oenb_user[34] , \la_oenb_user[33] , \la_oenb_user[32] , \la_oenb_user[31] , \la_oenb_user[30] , \la_oenb_user[29] , \la_oenb_user[28] , \la_oenb_user[27] , \la_oenb_user[26] , \la_oenb_user[25] , \la_oenb_user[24] , \la_oenb_user[23] , \la_oenb_user[22] , \la_oenb_user[21] , \la_oenb_user[20] , \la_oenb_user[19] , \la_oenb_user[18] , \la_oenb_user[17] , \la_oenb_user[16] , \la_oenb_user[15] , \la_oenb_user[14] , \la_oenb_user[13] , \la_oenb_user[12] , \la_oenb_user[11] , \la_oenb_user[10] , \la_oenb_user[9] , \la_oenb_user[8] , \la_oenb_user[7] , \la_oenb_user[6] , \la_oenb_user[5] , \la_oenb_user[4] , \la_oenb_user[3] , \la_oenb_user[2] , \la_oenb_user[1] , \la_oenb_user[0]  }),
+    .user_clock2(mprj_clock2),
+    .user_irq({ \user_irq_core[2] , \user_irq_core[1] , \user_irq_core[0]  }),
+    .vccd1(vccd1_core),
+    .vccd2(vccd2_core),
+    .vdda1(vdda1_core),
+    .vdda2(vdda2_core),
+    .vssa1(vssa1_core),
+    .vssa2(vssa2_core),
+    .vssd1(vssd1_core),
+    .vssd2(vssd2_core),
+    .wb_clk_i(mprj_clock),
+    .wb_rst_i(mprj_reset),
+    .wbs_ack_o(mprj_ack_i_user),
+    .wbs_adr_i({ \mprj_adr_o_user[31] , \mprj_adr_o_user[30] , \mprj_adr_o_user[29] , \mprj_adr_o_user[28] , \mprj_adr_o_user[27] , \mprj_adr_o_user[26] , \mprj_adr_o_user[25] , \mprj_adr_o_user[24] , \mprj_adr_o_user[23] , \mprj_adr_o_user[22] , \mprj_adr_o_user[21] , \mprj_adr_o_user[20] , \mprj_adr_o_user[19] , \mprj_adr_o_user[18] , \mprj_adr_o_user[17] , \mprj_adr_o_user[16] , \mprj_adr_o_user[15] , \mprj_adr_o_user[14] , \mprj_adr_o_user[13] , \mprj_adr_o_user[12] , \mprj_adr_o_user[11] , \mprj_adr_o_user[10] , \mprj_adr_o_user[9] , \mprj_adr_o_user[8] , \mprj_adr_o_user[7] , \mprj_adr_o_user[6] , \mprj_adr_o_user[5] , \mprj_adr_o_user[4] , \mprj_adr_o_user[3] , \mprj_adr_o_user[2] , \mprj_adr_o_user[1] , \mprj_adr_o_user[0]  }),
+    .wbs_cyc_i(mprj_cyc_o_user),
+    .wbs_dat_i({ \mprj_dat_o_user[31] , \mprj_dat_o_user[30] , \mprj_dat_o_user[29] , \mprj_dat_o_user[28] , \mprj_dat_o_user[27] , \mprj_dat_o_user[26] , \mprj_dat_o_user[25] , \mprj_dat_o_user[24] , \mprj_dat_o_user[23] , \mprj_dat_o_user[22] , \mprj_dat_o_user[21] , \mprj_dat_o_user[20] , \mprj_dat_o_user[19] , \mprj_dat_o_user[18] , \mprj_dat_o_user[17] , \mprj_dat_o_user[16] , \mprj_dat_o_user[15] , \mprj_dat_o_user[14] , \mprj_dat_o_user[13] , \mprj_dat_o_user[12] , \mprj_dat_o_user[11] , \mprj_dat_o_user[10] , \mprj_dat_o_user[9] , \mprj_dat_o_user[8] , \mprj_dat_o_user[7] , \mprj_dat_o_user[6] , \mprj_dat_o_user[5] , \mprj_dat_o_user[4] , \mprj_dat_o_user[3] , \mprj_dat_o_user[2] , \mprj_dat_o_user[1] , \mprj_dat_o_user[0]  }),
+    .wbs_dat_o({ \mprj_dat_i_user[31] , \mprj_dat_i_user[30] , \mprj_dat_i_user[29] , \mprj_dat_i_user[28] , \mprj_dat_i_user[27] , \mprj_dat_i_user[26] , \mprj_dat_i_user[25] , \mprj_dat_i_user[24] , \mprj_dat_i_user[23] , \mprj_dat_i_user[22] , \mprj_dat_i_user[21] , \mprj_dat_i_user[20] , \mprj_dat_i_user[19] , \mprj_dat_i_user[18] , \mprj_dat_i_user[17] , \mprj_dat_i_user[16] , \mprj_dat_i_user[15] , \mprj_dat_i_user[14] , \mprj_dat_i_user[13] , \mprj_dat_i_user[12] , \mprj_dat_i_user[11] , \mprj_dat_i_user[10] , \mprj_dat_i_user[9] , \mprj_dat_i_user[8] , \mprj_dat_i_user[7] , \mprj_dat_i_user[6] , \mprj_dat_i_user[5] , \mprj_dat_i_user[4] , \mprj_dat_i_user[3] , \mprj_dat_i_user[2] , \mprj_dat_i_user[1] , \mprj_dat_i_user[0]  }),
+    .wbs_sel_i({ \mprj_sel_o_user[3] , \mprj_sel_o_user[2] , \mprj_sel_o_user[1] , \mprj_sel_o_user[0]  }),
+    .wbs_stb_i(mprj_stb_o_user),
+    .wbs_we_i(mprj_we_o_user)
+  );
+  chip_io padframe (
+    .clock(clock),
+    .clock_core(clock_core),
+    .flash_clk(flash_clk),
+    .flash_clk_core(flash_clk_frame_buf),
+    .flash_clk_oeb_core(flash_clk_oeb_buf),
+    .flash_csb(flash_csb),
+    .flash_csb_core(flash_csb_frame_buf),
+    .flash_csb_oeb_core(flash_csb_oeb_buf),
+    .flash_io0(flash_io0),
+    .flash_io0_di_core(flash_io0_di),
+    .flash_io0_do_core(flash_io0_do_buf),
+    .flash_io0_ieb_core(flash_io0_ieb_buf),
+    .flash_io0_oeb_core(flash_io0_oeb_buf),
+    .flash_io1(flash_io1),
+    .flash_io1_di_core(flash_io1_di),
+    .flash_io1_do_core(flash_io1_do_buf),
+    .flash_io1_ieb_core(flash_io1_ieb_buf),
+    .flash_io1_oeb_core(flash_io1_oeb_buf),
+    .gpio(gpio),
+    .gpio_in_core(gpio_in_core),
+    .gpio_inenb_core(gpio_inenb_core),
+    .gpio_mode0_core(gpio_mode0_core),
+    .gpio_mode1_core(gpio_mode1_core),
+    .gpio_out_core(gpio_out_core),
+    .gpio_outenb_core(gpio_outenb_core),
+    .mprj_analog_io({ \user_analog_io[28] , \user_analog_io[27] , \user_analog_io[26] , \user_analog_io[25] , \user_analog_io[24] , \user_analog_io[23] , \user_analog_io[22] , \user_analog_io[21] , \user_analog_io[20] , \user_analog_io[19] , \user_analog_io[18] , \user_analog_io[17] , \user_analog_io[16] , \user_analog_io[15] , \user_analog_io[14] , \user_analog_io[13] , \user_analog_io[12] , \user_analog_io[11] , \user_analog_io[10] , \user_analog_io[9] , \user_analog_io[8] , \user_analog_io[7] , \user_analog_io[6] , \user_analog_io[5] , \user_analog_io[4] , \user_analog_io[3] , \user_analog_io[2] , \user_analog_io[1] , \user_analog_io[0]  }),
+    .mprj_io(mprj_io),
+    .mprj_io_analog_en({ \mprj_io_analog_en[37] , \mprj_io_analog_en[36] , \mprj_io_analog_en[35] , \mprj_io_analog_en[34] , \mprj_io_analog_en[33] , \mprj_io_analog_en[32] , \mprj_io_analog_en[31] , \mprj_io_analog_en[30] , \mprj_io_analog_en[29] , \mprj_io_analog_en[28] , \mprj_io_analog_en[27] , \mprj_io_analog_en[26] , \mprj_io_analog_en[25] , \mprj_io_analog_en[24] , \mprj_io_analog_en[23] , \mprj_io_analog_en[22] , \mprj_io_analog_en[21] , \mprj_io_analog_en[20] , \mprj_io_analog_en[19] , \mprj_io_analog_en[18] , \mprj_io_analog_en[17] , \mprj_io_analog_en[16] , \mprj_io_analog_en[15] , \mprj_io_analog_en[14] , \mprj_io_analog_en[13] , \mprj_io_analog_en[12] , \mprj_io_analog_en[11] , \mprj_io_analog_en[10] , \mprj_io_analog_en[9] , \mprj_io_analog_en[8] , \mprj_io_analog_en[7] , \mprj_io_analog_en[6] , \mprj_io_analog_en[5] , \mprj_io_analog_en[4] , \mprj_io_analog_en[3] , \mprj_io_analog_en[2] , \mprj_io_analog_en[1] , \mprj_io_analog_en[0]  }),
+    .mprj_io_analog_pol({ \mprj_io_analog_pol[37] , \mprj_io_analog_pol[36] , \mprj_io_analog_pol[35] , \mprj_io_analog_pol[34] , \mprj_io_analog_pol[33] , \mprj_io_analog_pol[32] , \mprj_io_analog_pol[31] , \mprj_io_analog_pol[30] , \mprj_io_analog_pol[29] , \mprj_io_analog_pol[28] , \mprj_io_analog_pol[27] , \mprj_io_analog_pol[26] , \mprj_io_analog_pol[25] , \mprj_io_analog_pol[24] , \mprj_io_analog_pol[23] , \mprj_io_analog_pol[22] , \mprj_io_analog_pol[21] , \mprj_io_analog_pol[20] , \mprj_io_analog_pol[19] , \mprj_io_analog_pol[18] , \mprj_io_analog_pol[17] , \mprj_io_analog_pol[16] , \mprj_io_analog_pol[15] , \mprj_io_analog_pol[14] , \mprj_io_analog_pol[13] , \mprj_io_analog_pol[12] , \mprj_io_analog_pol[11] , \mprj_io_analog_pol[10] , \mprj_io_analog_pol[9] , \mprj_io_analog_pol[8] , \mprj_io_analog_pol[7] , \mprj_io_analog_pol[6] , \mprj_io_analog_pol[5] , \mprj_io_analog_pol[4] , \mprj_io_analog_pol[3] , \mprj_io_analog_pol[2] , \mprj_io_analog_pol[1] , \mprj_io_analog_pol[0]  }),
+    .mprj_io_analog_sel({ \mprj_io_analog_sel[37] , \mprj_io_analog_sel[36] , \mprj_io_analog_sel[35] , \mprj_io_analog_sel[34] , \mprj_io_analog_sel[33] , \mprj_io_analog_sel[32] , \mprj_io_analog_sel[31] , \mprj_io_analog_sel[30] , \mprj_io_analog_sel[29] , \mprj_io_analog_sel[28] , \mprj_io_analog_sel[27] , \mprj_io_analog_sel[26] , \mprj_io_analog_sel[25] , \mprj_io_analog_sel[24] , \mprj_io_analog_sel[23] , \mprj_io_analog_sel[22] , \mprj_io_analog_sel[21] , \mprj_io_analog_sel[20] , \mprj_io_analog_sel[19] , \mprj_io_analog_sel[18] , \mprj_io_analog_sel[17] , \mprj_io_analog_sel[16] , \mprj_io_analog_sel[15] , \mprj_io_analog_sel[14] , \mprj_io_analog_sel[13] , \mprj_io_analog_sel[12] , \mprj_io_analog_sel[11] , \mprj_io_analog_sel[10] , \mprj_io_analog_sel[9] , \mprj_io_analog_sel[8] , \mprj_io_analog_sel[7] , \mprj_io_analog_sel[6] , \mprj_io_analog_sel[5] , \mprj_io_analog_sel[4] , \mprj_io_analog_sel[3] , \mprj_io_analog_sel[2] , \mprj_io_analog_sel[1] , \mprj_io_analog_sel[0]  }),
+    .mprj_io_dm({ \mprj_io_dm[113] , \mprj_io_dm[112] , \mprj_io_dm[111] , \mprj_io_dm[110] , \mprj_io_dm[109] , \mprj_io_dm[108] , \mprj_io_dm[107] , \mprj_io_dm[106] , \mprj_io_dm[105] , \mprj_io_dm[104] , \mprj_io_dm[103] , \mprj_io_dm[102] , \mprj_io_dm[101] , \mprj_io_dm[100] , \mprj_io_dm[99] , \mprj_io_dm[98] , \mprj_io_dm[97] , \mprj_io_dm[96] , \mprj_io_dm[95] , \mprj_io_dm[94] , \mprj_io_dm[93] , \mprj_io_dm[92] , \mprj_io_dm[91] , \mprj_io_dm[90] , \mprj_io_dm[89] , \mprj_io_dm[88] , \mprj_io_dm[87] , \mprj_io_dm[86] , \mprj_io_dm[85] , \mprj_io_dm[84] , \mprj_io_dm[83] , \mprj_io_dm[82] , \mprj_io_dm[81] , \mprj_io_dm[80] , \mprj_io_dm[79] , \mprj_io_dm[78] , \mprj_io_dm[77] , \mprj_io_dm[76] , \mprj_io_dm[75] , \mprj_io_dm[74] , \mprj_io_dm[73] , \mprj_io_dm[72] , \mprj_io_dm[71] , \mprj_io_dm[70] , \mprj_io_dm[69] , \mprj_io_dm[68] , \mprj_io_dm[67] , \mprj_io_dm[66] , \mprj_io_dm[65] , \mprj_io_dm[64] , \mprj_io_dm[63] , \mprj_io_dm[62] , \mprj_io_dm[61] , \mprj_io_dm[60] , \mprj_io_dm[59] , \mprj_io_dm[58] , \mprj_io_dm[57] , \mprj_io_dm[56] , \mprj_io_dm[55] , \mprj_io_dm[54] , \mprj_io_dm[53] , \mprj_io_dm[52] , \mprj_io_dm[51] , \mprj_io_dm[50] , \mprj_io_dm[49] , \mprj_io_dm[48] , \mprj_io_dm[47] , \mprj_io_dm[46] , \mprj_io_dm[45] , \mprj_io_dm[44] , \mprj_io_dm[43] , \mprj_io_dm[42] , \mprj_io_dm[41] , \mprj_io_dm[40] , \mprj_io_dm[39] , \mprj_io_dm[38] , \mprj_io_dm[37] , \mprj_io_dm[36] , \mprj_io_dm[35] , \mprj_io_dm[34] , \mprj_io_dm[33] , \mprj_io_dm[32] , \mprj_io_dm[31] , \mprj_io_dm[30] , \mprj_io_dm[29] , \mprj_io_dm[28] , \mprj_io_dm[27] , \mprj_io_dm[26] , \mprj_io_dm[25] , \mprj_io_dm[24] , \mprj_io_dm[23] , \mprj_io_dm[22] , \mprj_io_dm[21] , \mprj_io_dm[20] , \mprj_io_dm[19] , \mprj_io_dm[18] , \mprj_io_dm[17] , \mprj_io_dm[16] , \mprj_io_dm[15] , \mprj_io_dm[14] , \mprj_io_dm[13] , \mprj_io_dm[12] , \mprj_io_dm[11] , \mprj_io_dm[10] , \mprj_io_dm[9] , \mprj_io_dm[8] , \mprj_io_dm[7] , \mprj_io_dm[6] , \mprj_io_dm[5] , \mprj_io_dm[4] , \mprj_io_dm[3] , \mprj_io_dm[2] , \mprj_io_dm[1] , \mprj_io_dm[0]  }),
+    .mprj_io_holdover({ \mprj_io_holdover[37] , \mprj_io_holdover[36] , \mprj_io_holdover[35] , \mprj_io_holdover[34] , \mprj_io_holdover[33] , \mprj_io_holdover[32] , \mprj_io_holdover[31] , \mprj_io_holdover[30] , \mprj_io_holdover[29] , \mprj_io_holdover[28] , \mprj_io_holdover[27] , \mprj_io_holdover[26] , \mprj_io_holdover[25] , \mprj_io_holdover[24] , \mprj_io_holdover[23] , \mprj_io_holdover[22] , \mprj_io_holdover[21] , \mprj_io_holdover[20] , \mprj_io_holdover[19] , \mprj_io_holdover[18] , \mprj_io_holdover[17] , \mprj_io_holdover[16] , \mprj_io_holdover[15] , \mprj_io_holdover[14] , \mprj_io_holdover[13] , \mprj_io_holdover[12] , \mprj_io_holdover[11] , \mprj_io_holdover[10] , \mprj_io_holdover[9] , \mprj_io_holdover[8] , \mprj_io_holdover[7] , \mprj_io_holdover[6] , \mprj_io_holdover[5] , \mprj_io_holdover[4] , \mprj_io_holdover[3] , \mprj_io_holdover[2] , \mprj_io_holdover[1] , \mprj_io_holdover[0]  }),
+    .mprj_io_ib_mode_sel({ \mprj_io_ib_mode_sel[37] , \mprj_io_ib_mode_sel[36] , \mprj_io_ib_mode_sel[35] , \mprj_io_ib_mode_sel[34] , \mprj_io_ib_mode_sel[33] , \mprj_io_ib_mode_sel[32] , \mprj_io_ib_mode_sel[31] , \mprj_io_ib_mode_sel[30] , \mprj_io_ib_mode_sel[29] , \mprj_io_ib_mode_sel[28] , \mprj_io_ib_mode_sel[27] , \mprj_io_ib_mode_sel[26] , \mprj_io_ib_mode_sel[25] , \mprj_io_ib_mode_sel[24] , \mprj_io_ib_mode_sel[23] , \mprj_io_ib_mode_sel[22] , \mprj_io_ib_mode_sel[21] , \mprj_io_ib_mode_sel[20] , \mprj_io_ib_mode_sel[19] , \mprj_io_ib_mode_sel[18] , \mprj_io_ib_mode_sel[17] , \mprj_io_ib_mode_sel[16] , \mprj_io_ib_mode_sel[15] , \mprj_io_ib_mode_sel[14] , \mprj_io_ib_mode_sel[13] , \mprj_io_ib_mode_sel[12] , \mprj_io_ib_mode_sel[11] , \mprj_io_ib_mode_sel[10] , \mprj_io_ib_mode_sel[9] , \mprj_io_ib_mode_sel[8] , \mprj_io_ib_mode_sel[7] , \mprj_io_ib_mode_sel[6] , \mprj_io_ib_mode_sel[5] , \mprj_io_ib_mode_sel[4] , \mprj_io_ib_mode_sel[3] , \mprj_io_ib_mode_sel[2] , \mprj_io_ib_mode_sel[1] , \mprj_io_ib_mode_sel[0]  }),
+    .mprj_io_in({ \mprj_io_in[37] , \mprj_io_in[36] , \mprj_io_in[35] , \mprj_io_in[34] , \mprj_io_in[33] , \mprj_io_in[32] , \mprj_io_in[31] , \mprj_io_in[30] , \mprj_io_in[29] , \mprj_io_in[28] , \mprj_io_in[27] , \mprj_io_in[26] , \mprj_io_in[25] , \mprj_io_in[24] , \mprj_io_in[23] , \mprj_io_in[22] , \mprj_io_in[21] , \mprj_io_in[20] , \mprj_io_in[19] , \mprj_io_in[18] , \mprj_io_in[17] , \mprj_io_in[16] , \mprj_io_in[15] , \mprj_io_in[14] , \mprj_io_in[13] , \mprj_io_in[12] , \mprj_io_in[11] , \mprj_io_in[10] , \mprj_io_in[9] , \mprj_io_in[8] , \mprj_io_in[7] , \mprj_io_in[6] , \mprj_io_in[5] , \mprj_io_in[4] , \mprj_io_in[3] , \mprj_io_in[2] , \mprj_io_in[1] , \mprj_io_in[0]  }),
+    .mprj_io_inp_dis({ \mprj_io_inp_dis[37] , \mprj_io_inp_dis[36] , \mprj_io_inp_dis[35] , \mprj_io_inp_dis[34] , \mprj_io_inp_dis[33] , \mprj_io_inp_dis[32] , \mprj_io_inp_dis[31] , \mprj_io_inp_dis[30] , \mprj_io_inp_dis[29] , \mprj_io_inp_dis[28] , \mprj_io_inp_dis[27] , \mprj_io_inp_dis[26] , \mprj_io_inp_dis[25] , \mprj_io_inp_dis[24] , \mprj_io_inp_dis[23] , \mprj_io_inp_dis[22] , \mprj_io_inp_dis[21] , \mprj_io_inp_dis[20] , \mprj_io_inp_dis[19] , \mprj_io_inp_dis[18] , \mprj_io_inp_dis[17] , \mprj_io_inp_dis[16] , \mprj_io_inp_dis[15] , \mprj_io_inp_dis[14] , \mprj_io_inp_dis[13] , \mprj_io_inp_dis[12] , \mprj_io_inp_dis[11] , \mprj_io_inp_dis[10] , \mprj_io_inp_dis[9] , \mprj_io_inp_dis[8] , \mprj_io_inp_dis[7] , \mprj_io_inp_dis[6] , \mprj_io_inp_dis[5] , \mprj_io_inp_dis[4] , \mprj_io_inp_dis[3] , \mprj_io_inp_dis[2] , \mprj_io_inp_dis[1] , \mprj_io_inp_dis[0]  }),
+    .mprj_io_oeb({ \mprj_io_oeb[37] , \mprj_io_oeb[36] , \mprj_io_oeb[35] , \mprj_io_oeb[34] , \mprj_io_oeb[33] , \mprj_io_oeb[32] , \mprj_io_oeb[31] , \mprj_io_oeb[30] , \mprj_io_oeb[29] , \mprj_io_oeb[28] , \mprj_io_oeb[27] , \mprj_io_oeb[26] , \mprj_io_oeb[25] , \mprj_io_oeb[24] , \mprj_io_oeb[23] , \mprj_io_oeb[22] , \mprj_io_oeb[21] , \mprj_io_oeb[20] , \mprj_io_oeb[19] , \mprj_io_oeb[18] , \mprj_io_oeb[17] , \mprj_io_oeb[16] , \mprj_io_oeb[15] , \mprj_io_oeb[14] , \mprj_io_oeb[13] , \mprj_io_oeb[12] , \mprj_io_oeb[11] , \mprj_io_oeb[10] , \mprj_io_oeb[9] , \mprj_io_oeb[8] , \mprj_io_oeb[7] , \mprj_io_oeb[6] , \mprj_io_oeb[5] , \mprj_io_oeb[4] , \mprj_io_oeb[3] , \mprj_io_oeb[2] , \mprj_io_oeb[1] , \mprj_io_oeb[0]  }),
+    .mprj_io_one({ \mprj_io_one[37] , \mprj_io_one[36] , \mprj_io_one[35] , \mprj_io_one[34] , \mprj_io_one[33] , \mprj_io_one[32] , \mprj_io_one[31] , \mprj_io_one[30] , \mprj_io_one[29] , \mprj_io_one[28] , \mprj_io_one[27] , \mprj_io_one[26] , \mprj_io_one[25] , \mprj_io_one[24] , \mprj_io_one[23] , \mprj_io_one[22] , \mprj_io_one[21] , \mprj_io_one[20] , \mprj_io_one[19] , \mprj_io_one[18] , \mprj_io_one[17] , \mprj_io_one[16] , \mprj_io_one[15] , \mprj_io_one[14] , \mprj_io_one[13] , \mprj_io_one[12] , \mprj_io_one[11] , \mprj_io_one[10] , \mprj_io_one[9] , \mprj_io_one[8] , \mprj_io_one[7] , \mprj_io_one[6] , \mprj_io_one[5] , \mprj_io_one[4] , \mprj_io_one[3] , \mprj_io_one[2] , \mprj_io_one[1] , \mprj_io_one[0]  }),
+    .mprj_io_out({ \mprj_io_out[37] , \mprj_io_out[36] , \mprj_io_out[35] , \mprj_io_out[34] , \mprj_io_out[33] , \mprj_io_out[32] , \mprj_io_out[31] , \mprj_io_out[30] , \mprj_io_out[29] , \mprj_io_out[28] , \mprj_io_out[27] , \mprj_io_out[26] , \mprj_io_out[25] , \mprj_io_out[24] , \mprj_io_out[23] , \mprj_io_out[22] , \mprj_io_out[21] , \mprj_io_out[20] , \mprj_io_out[19] , \mprj_io_out[18] , \mprj_io_out[17] , \mprj_io_out[16] , \mprj_io_out[15] , \mprj_io_out[14] , \mprj_io_out[13] , \mprj_io_out[12] , \mprj_io_out[11] , \mprj_io_out[10] , \mprj_io_out[9] , \mprj_io_out[8] , \mprj_io_out[7] , \mprj_io_out[6] , \mprj_io_out[5] , \mprj_io_out[4] , \mprj_io_out[3] , \mprj_io_out[2] , \mprj_io_out[1] , \mprj_io_out[0]  }),
+    .mprj_io_slow_sel({ \mprj_io_slow_sel[37] , \mprj_io_slow_sel[36] , \mprj_io_slow_sel[35] , \mprj_io_slow_sel[34] , \mprj_io_slow_sel[33] , \mprj_io_slow_sel[32] , \mprj_io_slow_sel[31] , \mprj_io_slow_sel[30] , \mprj_io_slow_sel[29] , \mprj_io_slow_sel[28] , \mprj_io_slow_sel[27] , \mprj_io_slow_sel[26] , \mprj_io_slow_sel[25] , \mprj_io_slow_sel[24] , \mprj_io_slow_sel[23] , \mprj_io_slow_sel[22] , \mprj_io_slow_sel[21] , \mprj_io_slow_sel[20] , \mprj_io_slow_sel[19] , \mprj_io_slow_sel[18] , \mprj_io_slow_sel[17] , \mprj_io_slow_sel[16] , \mprj_io_slow_sel[15] , \mprj_io_slow_sel[14] , \mprj_io_slow_sel[13] , \mprj_io_slow_sel[12] , \mprj_io_slow_sel[11] , \mprj_io_slow_sel[10] , \mprj_io_slow_sel[9] , \mprj_io_slow_sel[8] , \mprj_io_slow_sel[7] , \mprj_io_slow_sel[6] , \mprj_io_slow_sel[5] , \mprj_io_slow_sel[4] , \mprj_io_slow_sel[3] , \mprj_io_slow_sel[2] , \mprj_io_slow_sel[1] , \mprj_io_slow_sel[0]  }),
+    .mprj_io_vtrip_sel({ \mprj_io_vtrip_sel[37] , \mprj_io_vtrip_sel[36] , \mprj_io_vtrip_sel[35] , \mprj_io_vtrip_sel[34] , \mprj_io_vtrip_sel[33] , \mprj_io_vtrip_sel[32] , \mprj_io_vtrip_sel[31] , \mprj_io_vtrip_sel[30] , \mprj_io_vtrip_sel[29] , \mprj_io_vtrip_sel[28] , \mprj_io_vtrip_sel[27] , \mprj_io_vtrip_sel[26] , \mprj_io_vtrip_sel[25] , \mprj_io_vtrip_sel[24] , \mprj_io_vtrip_sel[23] , \mprj_io_vtrip_sel[22] , \mprj_io_vtrip_sel[21] , \mprj_io_vtrip_sel[20] , \mprj_io_vtrip_sel[19] , \mprj_io_vtrip_sel[18] , \mprj_io_vtrip_sel[17] , \mprj_io_vtrip_sel[16] , \mprj_io_vtrip_sel[15] , \mprj_io_vtrip_sel[14] , \mprj_io_vtrip_sel[13] , \mprj_io_vtrip_sel[12] , \mprj_io_vtrip_sel[11] , \mprj_io_vtrip_sel[10] , \mprj_io_vtrip_sel[9] , \mprj_io_vtrip_sel[8] , \mprj_io_vtrip_sel[7] , \mprj_io_vtrip_sel[6] , \mprj_io_vtrip_sel[5] , \mprj_io_vtrip_sel[4] , \mprj_io_vtrip_sel[3] , \mprj_io_vtrip_sel[2] , \mprj_io_vtrip_sel[1] , \mprj_io_vtrip_sel[0]  }),
+    .por(por_l_buf),
+    .porb_h(porb_h),
+    .resetb(resetb),
+    .resetb_core_h(rstb_h),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vccd1_pad(vccd1),
+    .vccd2(vccd2_core),
+    .vccd2_pad(vccd2),
+    .vccd_pad(vccd),
+    .vdda(vdda_core),
+    .vdda1(vdda1_core),
+    .vdda1_pad(vdda1),
+    .vdda1_pad2(vdda1_2),
+    .vdda2(vdda2_core),
+    .vdda2_pad(vdda2),
+    .vdda_pad(vdda),
+    .vddio(vddio_core),
+    .vddio_pad(vddio),
+    .vddio_pad2(vddio_2),
+    .vssa(vssa_core),
+    .vssa1(vssa1_core),
+    .vssa1_pad(vssa1),
+    .vssa1_pad2(vssa1_2),
+    .vssa2(vssa2_core),
+    .vssa2_pad(vssa2),
+    .vssa_pad(vssa),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .vssd1_pad(vssd1),
+    .vssd2(vssd2_core),
+    .vssd2_pad(vssd2),
+    .vssd_pad(vssd),
+    .vssio(vssio_core),
+    .vssio_pad(vssio),
+    .vssio_pad2(vssio_2)
+  );
+  digital_pll pll (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .clockp({ pll_clk, pll_clk90 }),
+    .dco(spi_pll_dco_ena),
+    .div({ \spi_pll_div[4] , \spi_pll_div[3] , \spi_pll_div[2] , \spi_pll_div[1] , \spi_pll_div[0]  }),
+    .enable(spi_pll_ena),
+    .ext_trim({ \spi_pll_trim[25] , \spi_pll_trim[24] , \spi_pll_trim[23] , \spi_pll_trim[22] , \spi_pll_trim[21] , \spi_pll_trim[20] , \spi_pll_trim[19] , \spi_pll_trim[18] , \spi_pll_trim[17] , \spi_pll_trim[16] , \spi_pll_trim[15] , \spi_pll_trim[14] , \spi_pll_trim[13] , \spi_pll_trim[12] , \spi_pll_trim[11] , \spi_pll_trim[10] , \spi_pll_trim[9] , \spi_pll_trim[8] , \spi_pll_trim[7] , \spi_pll_trim[6] , \spi_pll_trim[5] , \spi_pll_trim[4] , \spi_pll_trim[3] , \spi_pll_trim[2] , \spi_pll_trim[1] , \spi_pll_trim[0]  }),
+    .osc(clock_core_buf),
+    .resetb(rstb_l_buf)
+  );
+  simple_por por (
+    .por_l(por_l),
+    .porb_h(porb_h),
+    .porb_l(porb_l),
+    .vdd1v8(vccd_core),
+    .vdd3v3(vddio_core),
+    .vss1v8(vssd_core),
+    .vss3v3(vssio_core)
+  );
+  xres_buf rstb_level (
+    .A(rstb_h),
+    .LVGND(vssd_core),
+    .LVPWR(vccd_core),
+    .VGND(vssio_core),
+    .VPWR(vddio_core),
+    .X(rstb_l)
+  );
+  gpio_signal_buffering sigbuf (
+    .mgmt_io_in_buf({ \mgmt_io_in_hk[37] , \mgmt_io_in_hk[36] , \mgmt_io_in_hk[35] , \mgmt_io_in_hk[34] , \mgmt_io_in_hk[33] , \mgmt_io_in_hk[32] , \mgmt_io_in_hk[31] , \mgmt_io_in_hk[30] , \mgmt_io_in_hk[29] , \mgmt_io_in_hk[28] , \mgmt_io_in_hk[27] , \mgmt_io_in_hk[26] , \mgmt_io_in_hk[25] , \mgmt_io_in_hk[24] , \mgmt_io_in_hk[23] , \mgmt_io_in_hk[22] , \mgmt_io_in_hk[21] , \mgmt_io_in_hk[20] , \mgmt_io_in_hk[19] , \mgmt_io_in_hk[18] , \mgmt_io_in_hk[17] , \mgmt_io_in_hk[16] , \mgmt_io_in_hk[15] , \mgmt_io_in_hk[14] , \mgmt_io_in_hk[13] , \mgmt_io_in_hk[12] , \mgmt_io_in_hk[11] , \mgmt_io_in_hk[10] , \mgmt_io_in_hk[9] , \mgmt_io_in_hk[8] , \mgmt_io_in_hk[7]  }),
+    .mgmt_io_in_unbuf({ \mgmt_io_in[37] , \mgmt_io_in[36] , \mgmt_io_in[35] , \mgmt_io_in[34] , \mgmt_io_in[33] , \mgmt_io_in[32] , \mgmt_io_in[31] , \mgmt_io_in[30] , \mgmt_io_in[29] , \mgmt_io_in[28] , \mgmt_io_in[27] , \mgmt_io_in[26] , \mgmt_io_in[25] , \mgmt_io_in[24] , \mgmt_io_in[23] , \mgmt_io_in[22] , \mgmt_io_in[21] , \mgmt_io_in[20] , \mgmt_io_in[19] , \mgmt_io_in[18] , \mgmt_io_in[17] , \mgmt_io_in[16] , \mgmt_io_in[15] , \mgmt_io_in[14] , \mgmt_io_in[13] , \mgmt_io_in[12] , \mgmt_io_in[11] , \mgmt_io_in[10] , \mgmt_io_in[9] , \mgmt_io_in[8] , \mgmt_io_in[7]  }),
+    .mgmt_io_oeb_buf({ \mgmt_io_oeb[37] , \mgmt_io_oeb[36] , \mgmt_io_oeb[35]  }),
+    .mgmt_io_oeb_unbuf({ \mgmt_io_oeb_hk[37] , \mgmt_io_oeb_hk[36] , \mgmt_io_oeb_hk[35]  }),
+    .mgmt_io_out_buf({ \mgmt_io_out[37] , \mgmt_io_out[36] , \mgmt_io_out[35] , \mgmt_io_out[34] , \mgmt_io_out[33] , \mgmt_io_out[32] , \mgmt_io_out[31] , \mgmt_io_out[30] , \mgmt_io_out[29] , \mgmt_io_out[28] , \mgmt_io_out[27] , \mgmt_io_out[26] , \mgmt_io_out[25] , \mgmt_io_out[24] , \mgmt_io_out[23] , \mgmt_io_out[22] , \mgmt_io_out[21] , \mgmt_io_out[20] , \mgmt_io_out[19] , \mgmt_io_out[18] , \mgmt_io_out[17] , \mgmt_io_out[16] , \mgmt_io_out[15] , \mgmt_io_out[14] , \mgmt_io_out[13] , \mgmt_io_out[12] , \mgmt_io_out[11] , \mgmt_io_out[10] , \mgmt_io_out[9] , \mgmt_io_out[8] , \mgmt_io_out[7]  }),
+    .mgmt_io_out_unbuf({ \mgmt_io_out_hk[37] , \mgmt_io_out_hk[36] , \mgmt_io_out_hk[35] , \mgmt_io_out_hk[34] , \mgmt_io_out_hk[33] , \mgmt_io_out_hk[32] , \mgmt_io_out_hk[31] , \mgmt_io_out_hk[30] , \mgmt_io_out_hk[29] , \mgmt_io_out_hk[28] , \mgmt_io_out_hk[27] , \mgmt_io_out_hk[26] , \mgmt_io_out_hk[25] , \mgmt_io_out_hk[24] , \mgmt_io_out_hk[23] , \mgmt_io_out_hk[22] , \mgmt_io_out_hk[21] , \mgmt_io_out_hk[20] , \mgmt_io_out_hk[19] , \mgmt_io_out_hk[18] , \mgmt_io_out_hk[17] , \mgmt_io_out_hk[16] , \mgmt_io_out_hk[15] , \mgmt_io_out_hk[14] , \mgmt_io_out_hk[13] , \mgmt_io_out_hk[12] , \mgmt_io_out_hk[11] , \mgmt_io_out_hk[10] , \mgmt_io_out_hk[9] , \mgmt_io_out_hk[8] , \mgmt_io_out_hk[7]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  mgmt_core_wrapper soc (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .clk_in(caravel_clk_buf),
+    .clk_out(clk_passthru),
+    .core_clk(caravel_clk_buf),
+    .core_rstn(caravel_rstn_buf),
+    .debug_in(debug_in),
+    .debug_mode(debug_mode),
+    .debug_oeb(debug_oeb),
+    .debug_out(debug_out),
+    .flash_clk(flash_clk_core),
+    .flash_csb(flash_csb_core),
+    .flash_io0_di(flash_io0_di_core),
+    .flash_io0_do(flash_io0_do_core),
+    .flash_io0_oeb(flash_io0_oeb_core),
+    .flash_io1_di(flash_io1_di_core),
+    .flash_io1_do(flash_io1_do_core),
+    .flash_io1_oeb(flash_io1_oeb_core),
+    .flash_io2_di(flash_io2_di_core),
+    .flash_io2_do(flash_io2_do_core),
+    .flash_io2_oeb(flash_io2_oeb_core),
+    .flash_io3_di(flash_io3_di_core),
+    .flash_io3_do(flash_io3_do_core),
+    .flash_io3_oeb(flash_io3_oeb_core),
+    .gpio_in_pad(gpio_in_core),
+    .gpio_inenb_pad(gpio_inenb_core),
+    .gpio_mode0_pad(gpio_mode0_core),
+    .gpio_mode1_pad(gpio_mode1_core),
+    .gpio_out_pad(gpio_out_core),
+    .gpio_outenb_pad(gpio_outenb_core),
+    .hk_ack_i(hk_ack_i),
+    .hk_cyc_o(hk_cyc_o),
+    .hk_dat_i({ \hk_dat_i[31] , \hk_dat_i[30] , \hk_dat_i[29] , \hk_dat_i[28] , \hk_dat_i[27] , \hk_dat_i[26] , \hk_dat_i[25] , \hk_dat_i[24] , \hk_dat_i[23] , \hk_dat_i[22] , \hk_dat_i[21] , \hk_dat_i[20] , \hk_dat_i[19] , \hk_dat_i[18] , \hk_dat_i[17] , \hk_dat_i[16] , \hk_dat_i[15] , \hk_dat_i[14] , \hk_dat_i[13] , \hk_dat_i[12] , \hk_dat_i[11] , \hk_dat_i[10] , \hk_dat_i[9] , \hk_dat_i[8] , \hk_dat_i[7] , \hk_dat_i[6] , \hk_dat_i[5] , \hk_dat_i[4] , \hk_dat_i[3] , \hk_dat_i[2] , \hk_dat_i[1] , \hk_dat_i[0]  }),
+    .hk_stb_o(hk_stb_o),
+    .irq({ \irq_spi[2] , \irq_spi[1] , \irq_spi[0] , \user_irq[2] , \user_irq[1] , \user_irq[0]  }),
+    .la_iena({ \la_iena_mprj[127] , \la_iena_mprj[126] , \la_iena_mprj[125] , \la_iena_mprj[124] , \la_iena_mprj[123] , \la_iena_mprj[122] , \la_iena_mprj[121] , \la_iena_mprj[120] , \la_iena_mprj[119] , \la_iena_mprj[118] , \la_iena_mprj[117] , \la_iena_mprj[116] , \la_iena_mprj[115] , \la_iena_mprj[114] , \la_iena_mprj[113] , \la_iena_mprj[112] , \la_iena_mprj[111] , \la_iena_mprj[110] , \la_iena_mprj[109] , \la_iena_mprj[108] , \la_iena_mprj[107] , \la_iena_mprj[106] , \la_iena_mprj[105] , \la_iena_mprj[104] , \la_iena_mprj[103] , \la_iena_mprj[102] , \la_iena_mprj[101] , \la_iena_mprj[100] , \la_iena_mprj[99] , \la_iena_mprj[98] , \la_iena_mprj[97] , \la_iena_mprj[96] , \la_iena_mprj[95] , \la_iena_mprj[94] , \la_iena_mprj[93] , \la_iena_mprj[92] , \la_iena_mprj[91] , \la_iena_mprj[90] , \la_iena_mprj[89] , \la_iena_mprj[88] , \la_iena_mprj[87] , \la_iena_mprj[86] , \la_iena_mprj[85] , \la_iena_mprj[84] , \la_iena_mprj[83] , \la_iena_mprj[82] , \la_iena_mprj[81] , \la_iena_mprj[80] , \la_iena_mprj[79] , \la_iena_mprj[78] , \la_iena_mprj[77] , \la_iena_mprj[76] , \la_iena_mprj[75] , \la_iena_mprj[74] , \la_iena_mprj[73] , \la_iena_mprj[72] , \la_iena_mprj[71] , \la_iena_mprj[70] , \la_iena_mprj[69] , \la_iena_mprj[68] , \la_iena_mprj[67] , \la_iena_mprj[66] , \la_iena_mprj[65] , \la_iena_mprj[64] , \la_iena_mprj[63] , \la_iena_mprj[62] , \la_iena_mprj[61] , \la_iena_mprj[60] , \la_iena_mprj[59] , \la_iena_mprj[58] , \la_iena_mprj[57] , \la_iena_mprj[56] , \la_iena_mprj[55] , \la_iena_mprj[54] , \la_iena_mprj[53] , \la_iena_mprj[52] , \la_iena_mprj[51] , \la_iena_mprj[50] , \la_iena_mprj[49] , \la_iena_mprj[48] , \la_iena_mprj[47] , \la_iena_mprj[46] , \la_iena_mprj[45] , \la_iena_mprj[44] , \la_iena_mprj[43] , \la_iena_mprj[42] , \la_iena_mprj[41] , \la_iena_mprj[40] , \la_iena_mprj[39] , \la_iena_mprj[38] , \la_iena_mprj[37] , \la_iena_mprj[36] , \la_iena_mprj[35] , \la_iena_mprj[34] , \la_iena_mprj[33] , \la_iena_mprj[32] , \la_iena_mprj[31] , \la_iena_mprj[30] , \la_iena_mprj[29] , \la_iena_mprj[28] , \la_iena_mprj[27] , \la_iena_mprj[26] , \la_iena_mprj[25] , \la_iena_mprj[24] , \la_iena_mprj[23] , \la_iena_mprj[22] , \la_iena_mprj[21] , \la_iena_mprj[20] , \la_iena_mprj[19] , \la_iena_mprj[18] , \la_iena_mprj[17] , \la_iena_mprj[16] , \la_iena_mprj[15] , \la_iena_mprj[14] , \la_iena_mprj[13] , \la_iena_mprj[12] , \la_iena_mprj[11] , \la_iena_mprj[10] , \la_iena_mprj[9] , \la_iena_mprj[8] , \la_iena_mprj[7] , \la_iena_mprj[6] , \la_iena_mprj[5] , \la_iena_mprj[4] , \la_iena_mprj[3] , \la_iena_mprj[2] , \la_iena_mprj[1] , \la_iena_mprj[0]  }),
+    .la_input({ \la_data_in_mprj[127] , \la_data_in_mprj[126] , \la_data_in_mprj[125] , \la_data_in_mprj[124] , \la_data_in_mprj[123] , \la_data_in_mprj[122] , \la_data_in_mprj[121] , \la_data_in_mprj[120] , \la_data_in_mprj[119] , \la_data_in_mprj[118] , \la_data_in_mprj[117] , \la_data_in_mprj[116] , \la_data_in_mprj[115] , \la_data_in_mprj[114] , \la_data_in_mprj[113] , \la_data_in_mprj[112] , \la_data_in_mprj[111] , \la_data_in_mprj[110] , \la_data_in_mprj[109] , \la_data_in_mprj[108] , \la_data_in_mprj[107] , \la_data_in_mprj[106] , \la_data_in_mprj[105] , \la_data_in_mprj[104] , \la_data_in_mprj[103] , \la_data_in_mprj[102] , \la_data_in_mprj[101] , \la_data_in_mprj[100] , \la_data_in_mprj[99] , \la_data_in_mprj[98] , \la_data_in_mprj[97] , \la_data_in_mprj[96] , \la_data_in_mprj[95] , \la_data_in_mprj[94] , \la_data_in_mprj[93] , \la_data_in_mprj[92] , \la_data_in_mprj[91] , \la_data_in_mprj[90] , \la_data_in_mprj[89] , \la_data_in_mprj[88] , \la_data_in_mprj[87] , \la_data_in_mprj[86] , \la_data_in_mprj[85] , \la_data_in_mprj[84] , \la_data_in_mprj[83] , \la_data_in_mprj[82] , \la_data_in_mprj[81] , \la_data_in_mprj[80] , \la_data_in_mprj[79] , \la_data_in_mprj[78] , \la_data_in_mprj[77] , \la_data_in_mprj[76] , \la_data_in_mprj[75] , \la_data_in_mprj[74] , \la_data_in_mprj[73] , \la_data_in_mprj[72] , \la_data_in_mprj[71] , \la_data_in_mprj[70] , \la_data_in_mprj[69] , \la_data_in_mprj[68] , \la_data_in_mprj[67] , \la_data_in_mprj[66] , \la_data_in_mprj[65] , \la_data_in_mprj[64] , \la_data_in_mprj[63] , \la_data_in_mprj[62] , \la_data_in_mprj[61] , \la_data_in_mprj[60] , \la_data_in_mprj[59] , \la_data_in_mprj[58] , \la_data_in_mprj[57] , \la_data_in_mprj[56] , \la_data_in_mprj[55] , \la_data_in_mprj[54] , \la_data_in_mprj[53] , \la_data_in_mprj[52] , \la_data_in_mprj[51] , \la_data_in_mprj[50] , \la_data_in_mprj[49] , \la_data_in_mprj[48] , \la_data_in_mprj[47] , \la_data_in_mprj[46] , \la_data_in_mprj[45] , \la_data_in_mprj[44] , \la_data_in_mprj[43] , \la_data_in_mprj[42] , \la_data_in_mprj[41] , \la_data_in_mprj[40] , \la_data_in_mprj[39] , \la_data_in_mprj[38] , \la_data_in_mprj[37] , \la_data_in_mprj[36] , \la_data_in_mprj[35] , \la_data_in_mprj[34] , \la_data_in_mprj[33] , \la_data_in_mprj[32] , \la_data_in_mprj[31] , \la_data_in_mprj[30] , \la_data_in_mprj[29] , \la_data_in_mprj[28] , \la_data_in_mprj[27] , \la_data_in_mprj[26] , \la_data_in_mprj[25] , \la_data_in_mprj[24] , \la_data_in_mprj[23] , \la_data_in_mprj[22] , \la_data_in_mprj[21] , \la_data_in_mprj[20] , \la_data_in_mprj[19] , \la_data_in_mprj[18] , \la_data_in_mprj[17] , \la_data_in_mprj[16] , \la_data_in_mprj[15] , \la_data_in_mprj[14] , \la_data_in_mprj[13] , \la_data_in_mprj[12] , \la_data_in_mprj[11] , \la_data_in_mprj[10] , \la_data_in_mprj[9] , \la_data_in_mprj[8] , \la_data_in_mprj[7] , \la_data_in_mprj[6] , \la_data_in_mprj[5] , \la_data_in_mprj[4] , \la_data_in_mprj[3] , \la_data_in_mprj[2] , \la_data_in_mprj[1] , \la_data_in_mprj[0]  }),
+    .la_oenb({ \la_oenb_mprj[127] , \la_oenb_mprj[126] , \la_oenb_mprj[125] , \la_oenb_mprj[124] , \la_oenb_mprj[123] , \la_oenb_mprj[122] , \la_oenb_mprj[121] , \la_oenb_mprj[120] , \la_oenb_mprj[119] , \la_oenb_mprj[118] , \la_oenb_mprj[117] , \la_oenb_mprj[116] , \la_oenb_mprj[115] , \la_oenb_mprj[114] , \la_oenb_mprj[113] , \la_oenb_mprj[112] , \la_oenb_mprj[111] , \la_oenb_mprj[110] , \la_oenb_mprj[109] , \la_oenb_mprj[108] , \la_oenb_mprj[107] , \la_oenb_mprj[106] , \la_oenb_mprj[105] , \la_oenb_mprj[104] , \la_oenb_mprj[103] , \la_oenb_mprj[102] , \la_oenb_mprj[101] , \la_oenb_mprj[100] , \la_oenb_mprj[99] , \la_oenb_mprj[98] , \la_oenb_mprj[97] , \la_oenb_mprj[96] , \la_oenb_mprj[95] , \la_oenb_mprj[94] , \la_oenb_mprj[93] , \la_oenb_mprj[92] , \la_oenb_mprj[91] , \la_oenb_mprj[90] , \la_oenb_mprj[89] , \la_oenb_mprj[88] , \la_oenb_mprj[87] , \la_oenb_mprj[86] , \la_oenb_mprj[85] , \la_oenb_mprj[84] , \la_oenb_mprj[83] , \la_oenb_mprj[82] , \la_oenb_mprj[81] , \la_oenb_mprj[80] , \la_oenb_mprj[79] , \la_oenb_mprj[78] , \la_oenb_mprj[77] , \la_oenb_mprj[76] , \la_oenb_mprj[75] , \la_oenb_mprj[74] , \la_oenb_mprj[73] , \la_oenb_mprj[72] , \la_oenb_mprj[71] , \la_oenb_mprj[70] , \la_oenb_mprj[69] , \la_oenb_mprj[68] , \la_oenb_mprj[67] , \la_oenb_mprj[66] , \la_oenb_mprj[65] , \la_oenb_mprj[64] , \la_oenb_mprj[63] , \la_oenb_mprj[62] , \la_oenb_mprj[61] , \la_oenb_mprj[60] , \la_oenb_mprj[59] , \la_oenb_mprj[58] , \la_oenb_mprj[57] , \la_oenb_mprj[56] , \la_oenb_mprj[55] , \la_oenb_mprj[54] , \la_oenb_mprj[53] , \la_oenb_mprj[52] , \la_oenb_mprj[51] , \la_oenb_mprj[50] , \la_oenb_mprj[49] , \la_oenb_mprj[48] , \la_oenb_mprj[47] , \la_oenb_mprj[46] , \la_oenb_mprj[45] , \la_oenb_mprj[44] , \la_oenb_mprj[43] , \la_oenb_mprj[42] , \la_oenb_mprj[41] , \la_oenb_mprj[40] , \la_oenb_mprj[39] , \la_oenb_mprj[38] , \la_oenb_mprj[37] , \la_oenb_mprj[36] , \la_oenb_mprj[35] , \la_oenb_mprj[34] , \la_oenb_mprj[33] , \la_oenb_mprj[32] , \la_oenb_mprj[31] , \la_oenb_mprj[30] , \la_oenb_mprj[29] , \la_oenb_mprj[28] , \la_oenb_mprj[27] , \la_oenb_mprj[26] , \la_oenb_mprj[25] , \la_oenb_mprj[24] , \la_oenb_mprj[23] , \la_oenb_mprj[22] , \la_oenb_mprj[21] , \la_oenb_mprj[20] , \la_oenb_mprj[19] , \la_oenb_mprj[18] , \la_oenb_mprj[17] , \la_oenb_mprj[16] , \la_oenb_mprj[15] , \la_oenb_mprj[14] , \la_oenb_mprj[13] , \la_oenb_mprj[12] , \la_oenb_mprj[11] , \la_oenb_mprj[10] , \la_oenb_mprj[9] , \la_oenb_mprj[8] , \la_oenb_mprj[7] , \la_oenb_mprj[6] , \la_oenb_mprj[5] , \la_oenb_mprj[4] , \la_oenb_mprj[3] , \la_oenb_mprj[2] , \la_oenb_mprj[1] , \la_oenb_mprj[0]  }),
+    .la_output({ \la_data_out_mprj[127] , \la_data_out_mprj[126] , \la_data_out_mprj[125] , \la_data_out_mprj[124] , \la_data_out_mprj[123] , \la_data_out_mprj[122] , \la_data_out_mprj[121] , \la_data_out_mprj[120] , \la_data_out_mprj[119] , \la_data_out_mprj[118] , \la_data_out_mprj[117] , \la_data_out_mprj[116] , \la_data_out_mprj[115] , \la_data_out_mprj[114] , \la_data_out_mprj[113] , \la_data_out_mprj[112] , \la_data_out_mprj[111] , \la_data_out_mprj[110] , \la_data_out_mprj[109] , \la_data_out_mprj[108] , \la_data_out_mprj[107] , \la_data_out_mprj[106] , \la_data_out_mprj[105] , \la_data_out_mprj[104] , \la_data_out_mprj[103] , \la_data_out_mprj[102] , \la_data_out_mprj[101] , \la_data_out_mprj[100] , \la_data_out_mprj[99] , \la_data_out_mprj[98] , \la_data_out_mprj[97] , \la_data_out_mprj[96] , \la_data_out_mprj[95] , \la_data_out_mprj[94] , \la_data_out_mprj[93] , \la_data_out_mprj[92] , \la_data_out_mprj[91] , \la_data_out_mprj[90] , \la_data_out_mprj[89] , \la_data_out_mprj[88] , \la_data_out_mprj[87] , \la_data_out_mprj[86] , \la_data_out_mprj[85] , \la_data_out_mprj[84] , \la_data_out_mprj[83] , \la_data_out_mprj[82] , \la_data_out_mprj[81] , \la_data_out_mprj[80] , \la_data_out_mprj[79] , \la_data_out_mprj[78] , \la_data_out_mprj[77] , \la_data_out_mprj[76] , \la_data_out_mprj[75] , \la_data_out_mprj[74] , \la_data_out_mprj[73] , \la_data_out_mprj[72] , \la_data_out_mprj[71] , \la_data_out_mprj[70] , \la_data_out_mprj[69] , \la_data_out_mprj[68] , \la_data_out_mprj[67] , \la_data_out_mprj[66] , \la_data_out_mprj[65] , \la_data_out_mprj[64] , \la_data_out_mprj[63] , \la_data_out_mprj[62] , \la_data_out_mprj[61] , \la_data_out_mprj[60] , \la_data_out_mprj[59] , \la_data_out_mprj[58] , \la_data_out_mprj[57] , \la_data_out_mprj[56] , \la_data_out_mprj[55] , \la_data_out_mprj[54] , \la_data_out_mprj[53] , \la_data_out_mprj[52] , \la_data_out_mprj[51] , \la_data_out_mprj[50] , \la_data_out_mprj[49] , \la_data_out_mprj[48] , \la_data_out_mprj[47] , \la_data_out_mprj[46] , \la_data_out_mprj[45] , \la_data_out_mprj[44] , \la_data_out_mprj[43] , \la_data_out_mprj[42] , \la_data_out_mprj[41] , \la_data_out_mprj[40] , \la_data_out_mprj[39] , \la_data_out_mprj[38] , \la_data_out_mprj[37] , \la_data_out_mprj[36] , \la_data_out_mprj[35] , \la_data_out_mprj[34] , \la_data_out_mprj[33] , \la_data_out_mprj[32] , \la_data_out_mprj[31] , \la_data_out_mprj[30] , \la_data_out_mprj[29] , \la_data_out_mprj[28] , \la_data_out_mprj[27] , \la_data_out_mprj[26] , \la_data_out_mprj[25] , \la_data_out_mprj[24] , \la_data_out_mprj[23] , \la_data_out_mprj[22] , \la_data_out_mprj[21] , \la_data_out_mprj[20] , \la_data_out_mprj[19] , \la_data_out_mprj[18] , \la_data_out_mprj[17] , \la_data_out_mprj[16] , \la_data_out_mprj[15] , \la_data_out_mprj[14] , \la_data_out_mprj[13] , \la_data_out_mprj[12] , \la_data_out_mprj[11] , \la_data_out_mprj[10] , \la_data_out_mprj[9] , \la_data_out_mprj[8] , \la_data_out_mprj[7] , \la_data_out_mprj[6] , \la_data_out_mprj[5] , \la_data_out_mprj[4] , \la_data_out_mprj[3] , \la_data_out_mprj[2] , \la_data_out_mprj[1] , \la_data_out_mprj[0]  }),
+    .mprj_ack_i(mprj_ack_i_core),
+    .mprj_adr_o({ \mprj_adr_o_core[31] , \mprj_adr_o_core[30] , \mprj_adr_o_core[29] , \mprj_adr_o_core[28] , \mprj_adr_o_core[27] , \mprj_adr_o_core[26] , \mprj_adr_o_core[25] , \mprj_adr_o_core[24] , \mprj_adr_o_core[23] , \mprj_adr_o_core[22] , \mprj_adr_o_core[21] , \mprj_adr_o_core[20] , \mprj_adr_o_core[19] , \mprj_adr_o_core[18] , \mprj_adr_o_core[17] , \mprj_adr_o_core[16] , \mprj_adr_o_core[15] , \mprj_adr_o_core[14] , \mprj_adr_o_core[13] , \mprj_adr_o_core[12] , \mprj_adr_o_core[11] , \mprj_adr_o_core[10] , \mprj_adr_o_core[9] , \mprj_adr_o_core[8] , \mprj_adr_o_core[7] , \mprj_adr_o_core[6] , \mprj_adr_o_core[5] , \mprj_adr_o_core[4] , \mprj_adr_o_core[3] , \mprj_adr_o_core[2] , \mprj_adr_o_core[1] , \mprj_adr_o_core[0]  }),
+    .mprj_cyc_o(mprj_cyc_o_core),
+    .mprj_dat_i({ \mprj_dat_i_core[31] , \mprj_dat_i_core[30] , \mprj_dat_i_core[29] , \mprj_dat_i_core[28] , \mprj_dat_i_core[27] , \mprj_dat_i_core[26] , \mprj_dat_i_core[25] , \mprj_dat_i_core[24] , \mprj_dat_i_core[23] , \mprj_dat_i_core[22] , \mprj_dat_i_core[21] , \mprj_dat_i_core[20] , \mprj_dat_i_core[19] , \mprj_dat_i_core[18] , \mprj_dat_i_core[17] , \mprj_dat_i_core[16] , \mprj_dat_i_core[15] , \mprj_dat_i_core[14] , \mprj_dat_i_core[13] , \mprj_dat_i_core[12] , \mprj_dat_i_core[11] , \mprj_dat_i_core[10] , \mprj_dat_i_core[9] , \mprj_dat_i_core[8] , \mprj_dat_i_core[7] , \mprj_dat_i_core[6] , \mprj_dat_i_core[5] , \mprj_dat_i_core[4] , \mprj_dat_i_core[3] , \mprj_dat_i_core[2] , \mprj_dat_i_core[1] , \mprj_dat_i_core[0]  }),
+    .mprj_dat_o({ \mprj_dat_o_core[31] , \mprj_dat_o_core[30] , \mprj_dat_o_core[29] , \mprj_dat_o_core[28] , \mprj_dat_o_core[27] , \mprj_dat_o_core[26] , \mprj_dat_o_core[25] , \mprj_dat_o_core[24] , \mprj_dat_o_core[23] , \mprj_dat_o_core[22] , \mprj_dat_o_core[21] , \mprj_dat_o_core[20] , \mprj_dat_o_core[19] , \mprj_dat_o_core[18] , \mprj_dat_o_core[17] , \mprj_dat_o_core[16] , \mprj_dat_o_core[15] , \mprj_dat_o_core[14] , \mprj_dat_o_core[13] , \mprj_dat_o_core[12] , \mprj_dat_o_core[11] , \mprj_dat_o_core[10] , \mprj_dat_o_core[9] , \mprj_dat_o_core[8] , \mprj_dat_o_core[7] , \mprj_dat_o_core[6] , \mprj_dat_o_core[5] , \mprj_dat_o_core[4] , \mprj_dat_o_core[3] , \mprj_dat_o_core[2] , \mprj_dat_o_core[1] , \mprj_dat_o_core[0]  }),
+    .mprj_sel_o({ \mprj_sel_o_core[3] , \mprj_sel_o_core[2] , \mprj_sel_o_core[1] , \mprj_sel_o_core[0]  }),
+    .mprj_stb_o(mprj_stb_o_core),
+    .mprj_wb_iena(mprj_iena_wb),
+    .mprj_we_o(mprj_we_o_core),
+    .por_l_in(por_l),
+    .por_l_out(por_l_buf),
+    .porb_h_in(por_l),
+    .porb_h_out(porb_h_out_nc),
+    .qspi_enabled(qspi_enabled),
+    .resetn_in(caravel_rstn_buf),
+    .resetn_out(resetn_passthru),
+    .rstb_l_in(rstb_l),
+    .rstb_l_out(rstb_l_buf),
+    .ser_rx(ser_rx),
+    .ser_tx(ser_tx),
+    .serial_clock_in(\gpio_clock_1_shifted[0] ),
+    .serial_clock_out(\gpio_clock_2_shifted[18] ),
+    .serial_data_2_in(mprj_io_loader_data_2),
+    .serial_data_2_out(\gpio_serial_link_2_shifted[18] ),
+    .serial_load_in(\gpio_load_1_shifted[0] ),
+    .serial_load_out(\gpio_load_2_shifted[18] ),
+    .serial_resetn_in(\gpio_resetn_1_shifted[0] ),
+    .serial_resetn_out(\gpio_resetn_2_shifted[18] ),
+    .spi_csb(spi_csb),
+    .spi_enabled(spi_enabled),
+    .spi_sck(spi_sck),
+    .spi_sdi(spi_sdi),
+    .spi_sdo(spi_sdo),
+    .spi_sdoenb(spi_sdoenb),
+    .trap(trap),
+    .uart_enabled(uart_enabled),
+    .user_irq_ena({ \user_irq_ena[2] , \user_irq_ena[1] , \user_irq_ena[0]  })
+  );
+  spare_logic_block \spare_logic[0]  (
+    .spare_xfq({ \spare_xfq_nc[1] , \spare_xfq_nc[0]  }),
+    .spare_xfqn({ \spare_xfqn_nc[1] , \spare_xfqn_nc[0]  }),
+    .spare_xi({ \spare_xi_nc[3] , \spare_xi_nc[2] , \spare_xi_nc[1] , \spare_xi_nc[0]  }),
+    .spare_xib(\spare_xib_nc[0] ),
+    .spare_xmx({ \spare_xmx_nc[1] , \spare_xmx_nc[0]  }),
+    .spare_xna({ \spare_xna_nc[1] , \spare_xna_nc[0]  }),
+    .spare_xno({ \spare_xno_nc[1] , \spare_xno_nc[0]  }),
+    .spare_xz({ \spare_xz_nc[26] , \spare_xz_nc[25] , \spare_xz_nc[24] , \spare_xz_nc[23] , \spare_xz_nc[22] , \spare_xz_nc[21] , \spare_xz_nc[20] , \spare_xz_nc[19] , \spare_xz_nc[18] , \spare_xz_nc[17] , \spare_xz_nc[16] , \spare_xz_nc[15] , \spare_xz_nc[14] , \spare_xz_nc[13] , \spare_xz_nc[12] , \spare_xz_nc[11] , \spare_xz_nc[10] , \spare_xz_nc[9] , \spare_xz_nc[8] , \spare_xz_nc[7] , \spare_xz_nc[6] , \spare_xz_nc[5] , \spare_xz_nc[4] , \spare_xz_nc[3] , \spare_xz_nc[2] , \spare_xz_nc[1] , \spare_xz_nc[0]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  spare_logic_block \spare_logic[1]  (
+    .spare_xfq({ \spare_xfq_nc[3] , \spare_xfq_nc[2]  }),
+    .spare_xfqn({ \spare_xfqn_nc[3] , \spare_xfqn_nc[2]  }),
+    .spare_xi({ \spare_xi_nc[7] , \spare_xi_nc[6] , \spare_xi_nc[5] , \spare_xi_nc[4]  }),
+    .spare_xib(\spare_xib_nc[1] ),
+    .spare_xmx({ \spare_xmx_nc[3] , \spare_xmx_nc[2]  }),
+    .spare_xna({ \spare_xna_nc[3] , \spare_xna_nc[2]  }),
+    .spare_xno({ \spare_xno_nc[3] , \spare_xno_nc[2]  }),
+    .spare_xz({ \spare_xz_nc[53] , \spare_xz_nc[52] , \spare_xz_nc[51] , \spare_xz_nc[50] , \spare_xz_nc[49] , \spare_xz_nc[48] , \spare_xz_nc[47] , \spare_xz_nc[46] , \spare_xz_nc[45] , \spare_xz_nc[44] , \spare_xz_nc[43] , \spare_xz_nc[42] , \spare_xz_nc[41] , \spare_xz_nc[40] , \spare_xz_nc[39] , \spare_xz_nc[38] , \spare_xz_nc[37] , \spare_xz_nc[36] , \spare_xz_nc[35] , \spare_xz_nc[34] , \spare_xz_nc[33] , \spare_xz_nc[32] , \spare_xz_nc[31] , \spare_xz_nc[30] , \spare_xz_nc[29] , \spare_xz_nc[28] , \spare_xz_nc[27]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  spare_logic_block \spare_logic[2]  (
+    .spare_xfq({ \spare_xfq_nc[5] , \spare_xfq_nc[4]  }),
+    .spare_xfqn({ \spare_xfqn_nc[5] , \spare_xfqn_nc[4]  }),
+    .spare_xi({ \spare_xi_nc[11] , \spare_xi_nc[10] , \spare_xi_nc[9] , \spare_xi_nc[8]  }),
+    .spare_xib(\spare_xib_nc[2] ),
+    .spare_xmx({ \spare_xmx_nc[5] , \spare_xmx_nc[4]  }),
+    .spare_xna({ \spare_xna_nc[5] , \spare_xna_nc[4]  }),
+    .spare_xno({ \spare_xno_nc[5] , \spare_xno_nc[4]  }),
+    .spare_xz({ \spare_xz_nc[80] , \spare_xz_nc[79] , \spare_xz_nc[78] , \spare_xz_nc[77] , \spare_xz_nc[76] , \spare_xz_nc[75] , \spare_xz_nc[74] , \spare_xz_nc[73] , \spare_xz_nc[72] , \spare_xz_nc[71] , \spare_xz_nc[70] , \spare_xz_nc[69] , \spare_xz_nc[68] , \spare_xz_nc[67] , \spare_xz_nc[66] , \spare_xz_nc[65] , \spare_xz_nc[64] , \spare_xz_nc[63] , \spare_xz_nc[62] , \spare_xz_nc[61] , \spare_xz_nc[60] , \spare_xz_nc[59] , \spare_xz_nc[58] , \spare_xz_nc[57] , \spare_xz_nc[56] , \spare_xz_nc[55] , \spare_xz_nc[54]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  spare_logic_block \spare_logic[3]  (
+    .spare_xfq({ \spare_xfq_nc[7] , \spare_xfq_nc[6]  }),
+    .spare_xfqn({ \spare_xfqn_nc[7] , \spare_xfqn_nc[6]  }),
+    .spare_xi({ \spare_xi_nc[15] , \spare_xi_nc[14] , \spare_xi_nc[13] , \spare_xi_nc[12]  }),
+    .spare_xib(\spare_xib_nc[3] ),
+    .spare_xmx({ \spare_xmx_nc[7] , \spare_xmx_nc[6]  }),
+    .spare_xna({ \spare_xna_nc[7] , \spare_xna_nc[6]  }),
+    .spare_xno({ \spare_xno_nc[7] , \spare_xno_nc[6]  }),
+    .spare_xz({ \spare_xz_nc[107] , \spare_xz_nc[106] , \spare_xz_nc[105] , \spare_xz_nc[104] , \spare_xz_nc[103] , \spare_xz_nc[102] , \spare_xz_nc[101] , \spare_xz_nc[100] , \spare_xz_nc[99] , \spare_xz_nc[98] , \spare_xz_nc[97] , \spare_xz_nc[96] , \spare_xz_nc[95] , \spare_xz_nc[94] , \spare_xz_nc[93] , \spare_xz_nc[92] , \spare_xz_nc[91] , \spare_xz_nc[90] , \spare_xz_nc[89] , \spare_xz_nc[88] , \spare_xz_nc[87] , \spare_xz_nc[86] , \spare_xz_nc[85] , \spare_xz_nc[84] , \spare_xz_nc[83] , \spare_xz_nc[82] , \spare_xz_nc[81]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  user_id_programming user_id_value (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .mask_rev({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0]  })
+  );
+  assign \gpio_serial_link_1_shifted[18]  = \gpio_serial_link_1[17] ;
+  assign \gpio_serial_link_1_shifted[17]  = \gpio_serial_link_1[16] ;
+  assign \gpio_serial_link_1_shifted[16]  = \gpio_serial_link_1[15] ;
+  assign \gpio_serial_link_1_shifted[15]  = \gpio_serial_link_1[14] ;
+  assign \gpio_serial_link_1_shifted[14]  = \gpio_serial_link_1[13] ;
+  assign \gpio_serial_link_1_shifted[13]  = \gpio_serial_link_1[12] ;
+  assign \gpio_serial_link_1_shifted[12]  = \gpio_serial_link_1[11] ;
+  assign \gpio_serial_link_1_shifted[11]  = \gpio_serial_link_1[10] ;
+  assign \gpio_serial_link_1_shifted[10]  = \gpio_serial_link_1[9] ;
+  assign \gpio_serial_link_1_shifted[9]  = \gpio_serial_link_1[8] ;
+  assign \gpio_serial_link_1_shifted[8]  = \gpio_serial_link_1[7] ;
+  assign \gpio_serial_link_1_shifted[7]  = \gpio_serial_link_1[6] ;
+  assign \gpio_serial_link_1_shifted[6]  = \gpio_serial_link_1[5] ;
+  assign \gpio_serial_link_1_shifted[5]  = \gpio_serial_link_1[4] ;
+  assign \gpio_serial_link_1_shifted[4]  = \gpio_serial_link_1[3] ;
+  assign \gpio_serial_link_1_shifted[3]  = \gpio_serial_link_1[2] ;
+  assign \gpio_serial_link_1_shifted[2]  = \gpio_serial_link_1[1] ;
+  assign \gpio_serial_link_1_shifted[1]  = \gpio_serial_link_1[0] ;
+  assign \gpio_load_2_shifted[17]  = \gpio_load_2[18] ;
+  assign \gpio_load_2_shifted[16]  = \gpio_load_2[17] ;
+  assign \gpio_load_2_shifted[15]  = \gpio_load_2[16] ;
+  assign \gpio_load_2_shifted[14]  = \gpio_load_2[15] ;
+  assign \gpio_load_2_shifted[13]  = \gpio_load_2[14] ;
+  assign \gpio_load_2_shifted[12]  = \gpio_load_2[13] ;
+  assign \gpio_load_2_shifted[11]  = \gpio_load_2[12] ;
+  assign \gpio_load_2_shifted[10]  = \gpio_load_2[11] ;
+  assign \gpio_load_2_shifted[9]  = \gpio_load_2[10] ;
+  assign \gpio_load_2_shifted[8]  = \gpio_load_2[9] ;
+  assign \gpio_load_2_shifted[7]  = \gpio_load_2[8] ;
+  assign \gpio_load_2_shifted[6]  = \gpio_load_2[7] ;
+  assign \gpio_load_2_shifted[5]  = \gpio_load_2[6] ;
+  assign \gpio_load_2_shifted[4]  = \gpio_load_2[5] ;
+  assign \gpio_load_2_shifted[3]  = \gpio_load_2[4] ;
+  assign \gpio_load_2_shifted[2]  = \gpio_load_2[3] ;
+  assign \gpio_load_2_shifted[1]  = \gpio_load_2[2] ;
+  assign \gpio_load_2_shifted[0]  = \gpio_load_2[1] ;
+  assign \gpio_clock_1_shifted[18]  = \gpio_clock_1[17] ;
+  assign \gpio_clock_1_shifted[17]  = \gpio_clock_1[16] ;
+  assign \gpio_clock_1_shifted[16]  = \gpio_clock_1[15] ;
+  assign \gpio_clock_1_shifted[15]  = \gpio_clock_1[14] ;
+  assign \gpio_clock_1_shifted[14]  = \gpio_clock_1[13] ;
+  assign \gpio_clock_1_shifted[13]  = \gpio_clock_1[12] ;
+  assign \gpio_clock_1_shifted[12]  = \gpio_clock_1[11] ;
+  assign \gpio_clock_1_shifted[11]  = \gpio_clock_1[10] ;
+  assign \gpio_clock_1_shifted[10]  = \gpio_clock_1[9] ;
+  assign \gpio_clock_1_shifted[9]  = \gpio_clock_1[8] ;
+  assign \gpio_clock_1_shifted[8]  = \gpio_clock_1[7] ;
+  assign \gpio_clock_1_shifted[7]  = \gpio_clock_1[6] ;
+  assign \gpio_clock_1_shifted[6]  = \gpio_clock_1[5] ;
+  assign \gpio_clock_1_shifted[5]  = \gpio_clock_1[4] ;
+  assign \gpio_clock_1_shifted[4]  = \gpio_clock_1[3] ;
+  assign \gpio_clock_1_shifted[3]  = \gpio_clock_1[2] ;
+  assign \gpio_clock_1_shifted[2]  = \gpio_clock_1[1] ;
+  assign \gpio_clock_1_shifted[1]  = \gpio_clock_1[0] ;
+  assign \gpio_resetn_1_shifted[18]  = \gpio_resetn_1[17] ;
+  assign \gpio_resetn_1_shifted[17]  = \gpio_resetn_1[16] ;
+  assign \gpio_resetn_1_shifted[16]  = \gpio_resetn_1[15] ;
+  assign \gpio_resetn_1_shifted[15]  = \gpio_resetn_1[14] ;
+  assign \gpio_resetn_1_shifted[14]  = \gpio_resetn_1[13] ;
+  assign \gpio_resetn_1_shifted[13]  = \gpio_resetn_1[12] ;
+  assign \gpio_resetn_1_shifted[12]  = \gpio_resetn_1[11] ;
+  assign \gpio_resetn_1_shifted[11]  = \gpio_resetn_1[10] ;
+  assign \gpio_resetn_1_shifted[10]  = \gpio_resetn_1[9] ;
+  assign \gpio_resetn_1_shifted[9]  = \gpio_resetn_1[8] ;
+  assign \gpio_resetn_1_shifted[8]  = \gpio_resetn_1[7] ;
+  assign \gpio_resetn_1_shifted[7]  = \gpio_resetn_1[6] ;
+  assign \gpio_resetn_1_shifted[6]  = \gpio_resetn_1[5] ;
+  assign \gpio_resetn_1_shifted[5]  = \gpio_resetn_1[4] ;
+  assign \gpio_resetn_1_shifted[4]  = \gpio_resetn_1[3] ;
+  assign \gpio_resetn_1_shifted[3]  = \gpio_resetn_1[2] ;
+  assign \gpio_resetn_1_shifted[2]  = \gpio_resetn_1[1] ;
+  assign \gpio_resetn_1_shifted[1]  = \gpio_resetn_1[0] ;
+  assign \gpio_clock_2_shifted[17]  = \gpio_clock_2[18] ;
+  assign \gpio_clock_2_shifted[16]  = \gpio_clock_2[17] ;
+  assign \gpio_clock_2_shifted[15]  = \gpio_clock_2[16] ;
+  assign \gpio_clock_2_shifted[14]  = \gpio_clock_2[15] ;
+  assign \gpio_clock_2_shifted[13]  = \gpio_clock_2[14] ;
+  assign \gpio_clock_2_shifted[12]  = \gpio_clock_2[13] ;
+  assign \gpio_clock_2_shifted[11]  = \gpio_clock_2[12] ;
+  assign \gpio_clock_2_shifted[10]  = \gpio_clock_2[11] ;
+  assign \gpio_clock_2_shifted[9]  = \gpio_clock_2[10] ;
+  assign \gpio_clock_2_shifted[8]  = \gpio_clock_2[9] ;
+  assign \gpio_clock_2_shifted[7]  = \gpio_clock_2[8] ;
+  assign \gpio_clock_2_shifted[6]  = \gpio_clock_2[7] ;
+  assign \gpio_clock_2_shifted[5]  = \gpio_clock_2[6] ;
+  assign \gpio_clock_2_shifted[4]  = \gpio_clock_2[5] ;
+  assign \gpio_clock_2_shifted[3]  = \gpio_clock_2[4] ;
+  assign \gpio_clock_2_shifted[2]  = \gpio_clock_2[3] ;
+  assign \gpio_clock_2_shifted[1]  = \gpio_clock_2[2] ;
+  assign \gpio_clock_2_shifted[0]  = \gpio_clock_2[1] ;
+  assign \gpio_load_1_shifted[18]  = \gpio_load_1[17] ;
+  assign \gpio_load_1_shifted[17]  = \gpio_load_1[16] ;
+  assign \gpio_load_1_shifted[16]  = \gpio_load_1[15] ;
+  assign \gpio_load_1_shifted[15]  = \gpio_load_1[14] ;
+  assign \gpio_load_1_shifted[14]  = \gpio_load_1[13] ;
+  assign \gpio_load_1_shifted[13]  = \gpio_load_1[12] ;
+  assign \gpio_load_1_shifted[12]  = \gpio_load_1[11] ;
+  assign \gpio_load_1_shifted[11]  = \gpio_load_1[10] ;
+  assign \gpio_load_1_shifted[10]  = \gpio_load_1[9] ;
+  assign \gpio_load_1_shifted[9]  = \gpio_load_1[8] ;
+  assign \gpio_load_1_shifted[8]  = \gpio_load_1[7] ;
+  assign \gpio_load_1_shifted[7]  = \gpio_load_1[6] ;
+  assign \gpio_load_1_shifted[6]  = \gpio_load_1[5] ;
+  assign \gpio_load_1_shifted[5]  = \gpio_load_1[4] ;
+  assign \gpio_load_1_shifted[4]  = \gpio_load_1[3] ;
+  assign \gpio_load_1_shifted[3]  = \gpio_load_1[2] ;
+  assign \gpio_load_1_shifted[2]  = \gpio_load_1[1] ;
+  assign \gpio_load_1_shifted[1]  = \gpio_load_1[0] ;
+  assign \gpio_serial_link_2_shifted[17]  = \gpio_serial_link_2[18] ;
+  assign \gpio_serial_link_2_shifted[16]  = \gpio_serial_link_2[17] ;
+  assign \gpio_serial_link_2_shifted[15]  = \gpio_serial_link_2[16] ;
+  assign \gpio_serial_link_2_shifted[14]  = \gpio_serial_link_2[15] ;
+  assign \gpio_serial_link_2_shifted[13]  = \gpio_serial_link_2[14] ;
+  assign \gpio_serial_link_2_shifted[12]  = \gpio_serial_link_2[13] ;
+  assign \gpio_serial_link_2_shifted[11]  = \gpio_serial_link_2[12] ;
+  assign \gpio_serial_link_2_shifted[10]  = \gpio_serial_link_2[11] ;
+  assign \gpio_serial_link_2_shifted[9]  = \gpio_serial_link_2[10] ;
+  assign \gpio_serial_link_2_shifted[8]  = \gpio_serial_link_2[9] ;
+  assign \gpio_serial_link_2_shifted[7]  = \gpio_serial_link_2[8] ;
+  assign \gpio_serial_link_2_shifted[6]  = \gpio_serial_link_2[7] ;
+  assign \gpio_serial_link_2_shifted[5]  = \gpio_serial_link_2[6] ;
+  assign \gpio_serial_link_2_shifted[4]  = \gpio_serial_link_2[5] ;
+  assign \gpio_serial_link_2_shifted[3]  = \gpio_serial_link_2[4] ;
+  assign \gpio_serial_link_2_shifted[2]  = \gpio_serial_link_2[3] ;
+  assign \gpio_serial_link_2_shifted[1]  = \gpio_serial_link_2[2] ;
+  assign \gpio_serial_link_2_shifted[0]  = \gpio_serial_link_2[1] ;
+  assign \gpio_resetn_2_shifted[17]  = \gpio_resetn_2[18] ;
+  assign \gpio_resetn_2_shifted[16]  = \gpio_resetn_2[17] ;
+  assign \gpio_resetn_2_shifted[15]  = \gpio_resetn_2[16] ;
+  assign \gpio_resetn_2_shifted[14]  = \gpio_resetn_2[15] ;
+  assign \gpio_resetn_2_shifted[13]  = \gpio_resetn_2[14] ;
+  assign \gpio_resetn_2_shifted[12]  = \gpio_resetn_2[13] ;
+  assign \gpio_resetn_2_shifted[11]  = \gpio_resetn_2[12] ;
+  assign \gpio_resetn_2_shifted[10]  = \gpio_resetn_2[11] ;
+  assign \gpio_resetn_2_shifted[9]  = \gpio_resetn_2[10] ;
+  assign \gpio_resetn_2_shifted[8]  = \gpio_resetn_2[9] ;
+  assign \gpio_resetn_2_shifted[7]  = \gpio_resetn_2[8] ;
+  assign \gpio_resetn_2_shifted[6]  = \gpio_resetn_2[7] ;
+  assign \gpio_resetn_2_shifted[5]  = \gpio_resetn_2[6] ;
+  assign \gpio_resetn_2_shifted[4]  = \gpio_resetn_2[5] ;
+  assign \gpio_resetn_2_shifted[3]  = \gpio_resetn_2[4] ;
+  assign \gpio_resetn_2_shifted[2]  = \gpio_resetn_2[3] ;
+  assign \gpio_resetn_2_shifted[1]  = \gpio_resetn_2[2] ;
+  assign \gpio_resetn_2_shifted[0]  = \gpio_resetn_2[1] ;
+  assign \mgmt_io_in_hk[6]  = \mgmt_io_in[6] ;
+  assign \mgmt_io_in_hk[5]  = \mgmt_io_in[5] ;
+  assign \mgmt_io_in_hk[4]  = \mgmt_io_in[4] ;
+  assign \mgmt_io_in_hk[3]  = \mgmt_io_in[3] ;
+  assign \mgmt_io_in_hk[2]  = \mgmt_io_in[2] ;
+  assign \mgmt_io_in_hk[1]  = \mgmt_io_in[1] ;
+  assign \mgmt_io_in_hk[0]  = \mgmt_io_in[0] ;
+  assign \mgmt_io_out_hk[6]  = \mgmt_io_out[6] ;
+  assign \mgmt_io_out_hk[5]  = \mgmt_io_out[5] ;
+  assign \mgmt_io_out_hk[4]  = \mgmt_io_out[4] ;
+  assign \mgmt_io_out_hk[3]  = \mgmt_io_out[3] ;
+  assign \mgmt_io_out_hk[2]  = \mgmt_io_out[2] ;
+  assign \mgmt_io_out_hk[1]  = \mgmt_io_out[1] ;
+  assign \mgmt_io_out_hk[0]  = \mgmt_io_out[0] ;
+  assign \mgmt_io_oeb_hk[34]  = \mgmt_io_oeb[34] ;
+  assign \mgmt_io_oeb_hk[33]  = \mgmt_io_oeb[33] ;
+  assign \mgmt_io_oeb_hk[32]  = \mgmt_io_oeb[32] ;
+  assign \mgmt_io_oeb_hk[31]  = \mgmt_io_oeb[31] ;
+  assign \mgmt_io_oeb_hk[30]  = \mgmt_io_oeb[30] ;
+  assign \mgmt_io_oeb_hk[29]  = \mgmt_io_oeb[29] ;
+  assign \mgmt_io_oeb_hk[28]  = \mgmt_io_oeb[28] ;
+  assign \mgmt_io_oeb_hk[27]  = \mgmt_io_oeb[27] ;
+  assign \mgmt_io_oeb_hk[26]  = \mgmt_io_oeb[26] ;
+  assign \mgmt_io_oeb_hk[25]  = \mgmt_io_oeb[25] ;
+  assign \mgmt_io_oeb_hk[24]  = \mgmt_io_oeb[24] ;
+  assign \mgmt_io_oeb_hk[23]  = \mgmt_io_oeb[23] ;
+  assign \mgmt_io_oeb_hk[22]  = \mgmt_io_oeb[22] ;
+  assign \mgmt_io_oeb_hk[21]  = \mgmt_io_oeb[21] ;
+  assign \mgmt_io_oeb_hk[20]  = \mgmt_io_oeb[20] ;
+  assign \mgmt_io_oeb_hk[19]  = \mgmt_io_oeb[19] ;
+  assign \mgmt_io_oeb_hk[18]  = \mgmt_io_oeb[18] ;
+  assign \mgmt_io_oeb_hk[17]  = \mgmt_io_oeb[17] ;
+  assign \mgmt_io_oeb_hk[16]  = \mgmt_io_oeb[16] ;
+  assign \mgmt_io_oeb_hk[15]  = \mgmt_io_oeb[15] ;
+  assign \mgmt_io_oeb_hk[14]  = \mgmt_io_oeb[14] ;
+  assign \mgmt_io_oeb_hk[13]  = \mgmt_io_oeb[13] ;
+  assign \mgmt_io_oeb_hk[12]  = \mgmt_io_oeb[12] ;
+  assign \mgmt_io_oeb_hk[11]  = \mgmt_io_oeb[11] ;
+  assign \mgmt_io_oeb_hk[10]  = \mgmt_io_oeb[10] ;
+  assign \mgmt_io_oeb_hk[9]  = \mgmt_io_oeb[9] ;
+  assign \mgmt_io_oeb_hk[8]  = \mgmt_io_oeb[8] ;
+  assign \mgmt_io_oeb_hk[7]  = \mgmt_io_oeb[7] ;
+  assign \mgmt_io_oeb_hk[6]  = \mgmt_io_oeb[6] ;
+  assign \mgmt_io_oeb_hk[5]  = \mgmt_io_oeb[5] ;
+  assign \mgmt_io_oeb_hk[4]  = \mgmt_io_oeb[4] ;
+  assign \mgmt_io_oeb_hk[3]  = \mgmt_io_oeb[3] ;
+  assign \mgmt_io_oeb_hk[2]  = \mgmt_io_oeb[2] ;
+  assign \mgmt_io_oeb_hk[1]  = \mgmt_io_oeb[1] ;
+  assign \mgmt_io_oeb_hk[0]  = \mgmt_io_oeb[0] ;
+  assign mprj_io_loader_data_2_buf = \gpio_serial_link_2_shifted[18] ;
+  assign mprj_io_loader_resetn_buf = \gpio_resetn_2_shifted[18] ;
+  assign mprj_io_loader_strobe_buf = \gpio_load_2_shifted[18] ;
+  assign mprj_io_loader_clock_buf = \gpio_clock_2_shifted[18] ;
+  assign mprj_io_loader_data_1 = \gpio_serial_link_1_shifted[0] ;
+  assign mprj_io_loader_strobe = \gpio_load_1_shifted[0] ;
+  assign mprj_io_loader_clock = \gpio_clock_1_shifted[0] ;
+  assign mprj_io_loader_resetn = \gpio_resetn_1_shifted[0] ;
+endmodule

tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v

diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v
new file mode 100644
index 0000000..33fbfde
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_0403 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_high[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_high[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_low[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_low[12] ;
+endmodule

tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v

diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v
new file mode 100644
index 0000000..379ba1c
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_0801 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_low[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_low[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_high[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_low[12] ;
+endmodule

tapeout/outputs/verilog/gl/gpio_defaults_block_1801.v

diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_1801.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_1801.v
new file mode 100644
index 0000000..d29d576
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_1801.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_1801 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_low[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_low[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_high[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_high[12] ;
+endmodule

tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v

diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v
new file mode 100644
index 0000000..13ad29a
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_1803 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_high[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_low[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_high[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_high[12] ;
+endmodule

tapeout/outputs/verilog/gl/user_id_programming.v

diff --git a/tapeout/outputs/verilog/gl/user_id_programming.v b/tapeout/outputs/verilog/gl/user_id_programming.v
new file mode 100644
index 0000000..d4f4e1d
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/user_id_programming.v
@@ -0,0 +1,786 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+/* Generated by Yosys 0.9+3621 (git sha1 84e9fa7, gcc 8.3.1 -fPIC -Os) */
+
+module user_id_programming(VPWR, VGND, mask_rev);
+  input VGND;
+  input VPWR;
+  output [31:0] mask_rev;
+  wire \user_proj_id_high[0] ;
+  wire \user_proj_id_high[10] ;
+  wire \user_proj_id_high[11] ;
+  wire \user_proj_id_low[12] ;
+  wire \user_proj_id_high[13] ;
+  wire \user_proj_id_high[14] ;
+  wire \user_proj_id_high[15] ;
+  wire \user_proj_id_low[16] ;
+  wire \user_proj_id_low[17] ;
+  wire \user_proj_id_high[18] ;
+  wire \user_proj_id_low[19] ;
+  wire \user_proj_id_high[1] ;
+  wire \user_proj_id_low[20] ;
+  wire \user_proj_id_high[21] ;
+  wire \user_proj_id_high[22] ;
+  wire \user_proj_id_high[23] ;
+  wire \user_proj_id_low[24] ;
+  wire \user_proj_id_low[25] ;
+  wire \user_proj_id_high[26] ;
+  wire \user_proj_id_low[27] ;
+  wire \user_proj_id_low[28] ;
+  wire \user_proj_id_high[29] ;
+  wire \user_proj_id_high[2] ;
+  wire \user_proj_id_low[30] ;
+  wire \user_proj_id_low[31] ;
+  wire \user_proj_id_high[3] ;
+  wire \user_proj_id_high[4] ;
+  wire \user_proj_id_high[5] ;
+  wire \user_proj_id_high[6] ;
+  wire \user_proj_id_high[7] ;
+  wire \user_proj_id_high[8] ;
+  wire \user_proj_id_high[9] ;
+  sky130_fd_sc_hd__decap_3 FILLER_0_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_0_21 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_0_29 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_0_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_0_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_0_39 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_0_47 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_0_7 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_1_12 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_1_20 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_1_24 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_1_33 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_1_45 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_1_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_2_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_2_27 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_2_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_2_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_2_44 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_3_18 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_3_30 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_3_42 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_3_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_4_10 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_4_14 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_4_18 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_4_26 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_4_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_4_30 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_4_35 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_4_41 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_4_46 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_5_11 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_5_23 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_5_31 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_5_40 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_5_49 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_5_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_6_12 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_6_20 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_6_24 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_6_28 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_6_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_6_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_6_36 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_6_40 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_6_48 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_7_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_7_27 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_7_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_7_36 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_7_42 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_7_46 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_8_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_8_27 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_8_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_8_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_8_44 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_0 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_1 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_10 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_11 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_12 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_13 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_14 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_16 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_17 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_18 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_19 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_2 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_20 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_21 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_22 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_4 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_5 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_7 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_8 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_9 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[0]  (
+    .HI(\user_proj_id_high[0] ),
+    .LO(mask_rev[0]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[10]  (
+    .HI(\user_proj_id_high[10] ),
+    .LO(mask_rev[10]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[11]  (
+    .HI(\user_proj_id_high[11] ),
+    .LO(mask_rev[11]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[12]  (
+    .LO(\user_proj_id_low[12] ),
+    .HI(mask_rev[12]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[13]  (
+    .HI(\user_proj_id_high[13] ),
+    .LO(mask_rev[13]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[14]  (
+    .HI(\user_proj_id_high[14] ),
+    .LO(mask_rev[14]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[15]  (
+    .HI(\user_proj_id_high[15] ),
+    .LO(mask_rev[15]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[16]  (
+    .LO(\user_proj_id_low[16] ),
+    .HI(mask_rev[16]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[17]  (
+    .LO(\user_proj_id_low[17] ),
+    .HI(mask_rev[17]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[18]  (
+    .HI(\user_proj_id_high[18] ),
+    .LO(mask_rev[18]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[19]  (
+    .LO(\user_proj_id_low[19] ),
+    .HI(mask_rev[19]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[1]  (
+    .HI(\user_proj_id_high[1] ),
+    .LO(mask_rev[1]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[20]  (
+    .LO(\user_proj_id_low[20] ),
+    .HI(mask_rev[20]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[21]  (
+    .HI(\user_proj_id_high[21] ),
+    .LO(mask_rev[21]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[22]  (
+    .HI(\user_proj_id_high[22] ),
+    .LO(mask_rev[22]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[23]  (
+    .HI(\user_proj_id_high[23] ),
+    .LO(mask_rev[23]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[24]  (
+    .LO(\user_proj_id_low[24] ),
+    .HI(mask_rev[24]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[25]  (
+    .LO(\user_proj_id_low[25] ),
+    .HI(mask_rev[25]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[26]  (
+    .HI(\user_proj_id_high[26] ),
+    .LO(mask_rev[26]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[27]  (
+    .LO(\user_proj_id_low[27] ),
+    .HI(mask_rev[27]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[28]  (
+    .LO(\user_proj_id_low[28] ),
+    .HI(mask_rev[28]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[29]  (
+    .HI(\user_proj_id_high[29] ),
+    .LO(mask_rev[29]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[2]  (
+    .HI(\user_proj_id_high[2] ),
+    .LO(mask_rev[2]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[30]  (
+    .LO(\user_proj_id_low[30] ),
+    .HI(mask_rev[30]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[31]  (
+    .LO(\user_proj_id_low[31] ),
+    .HI(mask_rev[31]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[3]  (
+    .HI(\user_proj_id_high[3] ),
+    .LO(mask_rev[3]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[4]  (
+    .HI(\user_proj_id_high[4] ),
+    .LO(mask_rev[4]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[5]  (
+    .HI(\user_proj_id_high[5] ),
+    .LO(mask_rev[5]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[6]  (
+    .HI(\user_proj_id_high[6] ),
+    .LO(mask_rev[6]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[7]  (
+    .HI(\user_proj_id_high[7] ),
+    .LO(mask_rev[7]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[8]  (
+    .HI(\user_proj_id_high[8] ),
+    .LO(mask_rev[8]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[9]  (
+    .HI(\user_proj_id_high[9] ),
+    .LO(mask_rev[9]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+endmodule

tapeout/outputs/verilog/rtl/caravel.v

diff --git a/tapeout/outputs/verilog/rtl/caravel.v b/tapeout/outputs/verilog/rtl/caravel.v
new file mode 100644
index 0000000..d1135dd
--- /dev/null
+++ b/tapeout/outputs/verilog/rtl/caravel.v
@@ -0,0 +1,1635 @@
+ `ifdef SIM
+ `default_nettype wire
+ `endif
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+/*--------------------------------------------------------------*/
+/* caravel, a project harness for the Google/SkyWater sky130	*/
+/* fabrication process and open source PDK			*/
+/*                                                          	*/
+/* Copyright 2020 efabless, Inc.                            	*/
+/* Written by Tim Edwards, December 2019                    	*/
+/* and Mohamed Shalan, August 2020			    	*/
+/* This file is open source hardware released under the     	*/
+/* Apache 2.0 license.  See file LICENSE.                   	*/
+/*								*/
+/* Updated 10/15/2021:  Revised using the housekeeping module	*/
+/* from housekeeping.v (refactoring a number of functions from	*/
+/* the management SoC).						*/
+/*                                                          	*/
+/*--------------------------------------------------------------*/
+
+module caravel (
+
+    // All top-level I/O are package-facing pins
+
+    inout vddio,	// Common 3.3V padframe/ESD power
+    inout vddio_2,	// Common 3.3V padframe/ESD power
+    inout vssio,	// Common padframe/ESD ground
+    inout vssio_2,	// Common padframe/ESD ground
+    inout vdda,		// Management 3.3V power
+    inout vssa,		// Common analog ground
+    inout vccd,		// Management/Common 1.8V power
+    inout vssd,		// Common digital ground
+    inout vdda1,	// User area 1 3.3V power
+    inout vdda1_2,	// User area 1 3.3V power
+    inout vdda2,	// User area 2 3.3V power
+    inout vssa1,	// User area 1 analog ground
+    inout vssa1_2,	// User area 1 analog ground
+    inout vssa2,	// User area 2 analog ground
+    inout vccd1,	// User area 1 1.8V power
+    inout vccd2,	// User area 2 1.8V power
+    inout vssd1,	// User area 1 digital ground
+    inout vssd2,	// User area 2 digital ground
+
+    inout gpio,		// Used for external LDO control
+    inout [`MPRJ_IO_PADS-1:0] mprj_io,
+    input clock,    	// CMOS core clock input, not a crystal
+    input resetb,	// Reset input (sense inverted)
+
+    // Note that only two flash data pins are dedicated to the
+    // management SoC wrapper.  The management SoC exports the
+    // quad SPI mode status to make use of the top two mprj_io
+    // pins for io2 and io3.
+
+    output flash_csb,
+    output flash_clk,
+    output flash_io0,
+    output flash_io1
+);
+
+    //------------------------------------------------------------
+    // This value is uniquely defined for each user project.
+    //------------------------------------------------------------
+    parameter USER_PROJECT_ID = 32'h0008d8db;
+
+    /*
+     *--------------------------------------------------------------------
+     *
+     * These pins are overlaid on mprj_io space.  They have the function
+     * below when the management processor is in reset, or in the default
+     * configuration.  They are assigned to uses in the user space by the
+     * configuration program running off of the SPI flash.  Note that even
+     * when the user has taken control of these pins, they can be restored
+     * to the original use by setting the resetb pin low.  The SPI pins and
+     * UART pins can be connected directly to an FTDI chip as long as the
+     * FTDI chip sets these lines to high impedence (input function) at
+     * all times except when holding the chip in reset.
+     *
+     * JTAG       = mprj_io[0]		(inout)
+     * SDO 	  = mprj_io[1]		(output)
+     * SDI 	  = mprj_io[2]		(input)
+     * CSB 	  = mprj_io[3]		(input)
+     * SCK	  = mprj_io[4]		(input)
+     * ser_rx     = mprj_io[5]		(input)
+     * ser_tx     = mprj_io[6]		(output)
+     * irq 	  = mprj_io[7]		(input)
+     *
+     * spi_sck    = mprj_io[32]		(output)
+     * spi_csb    = mprj_io[33]		(output)
+     * spi_sdi    = mprj_io[34]		(input)
+     * spi_sdo    = mprj_io[35]		(output)
+     * flash_io2  = mprj_io[36]		(inout) 
+     * flash_io3  = mprj_io[37]		(inout) 
+     *
+     * These pins are reserved for any project that wants to incorporate
+     * its own processor and flash controller.  While a user project can
+     * technically use any available I/O pins for the purpose, these
+     * four pins connect to a pass-through mode from the SPI slave (pins
+     * 1-4 above) so that any SPI flash connected to these specific pins
+     * can be accessed through the SPI slave even when the processor is in
+     * reset.
+     *
+     * user_flash_csb = mprj_io[8]
+     * user_flash_sck = mprj_io[9]
+     * user_flash_io0 = mprj_io[10]
+     * user_flash_io1 = mprj_io[11]
+     *
+     *--------------------------------------------------------------------
+     */
+
+    // One-bit GPIO dedicated to management SoC (outside of user control)
+    wire gpio_out_core;
+    wire gpio_in_core;
+    wire gpio_mode0_core;
+    wire gpio_mode1_core;
+    wire gpio_outenb_core;
+    wire gpio_inenb_core;
+
+    // User Project Control (pad-facing)
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_inp_dis;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_oeb;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_ib_mode_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_vtrip_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_slow_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_holdover;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_en;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_pol;
+    wire [`MPRJ_IO_PADS*3-1:0] mprj_io_dm;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_in;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_out;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_one;
+
+    // User Project Control (user-facing)
+    wire [`MPRJ_IO_PADS-1:0] user_io_oeb;
+    wire [`MPRJ_IO_PADS-1:0] user_io_in;
+    wire [`MPRJ_IO_PADS-1:0] user_io_out;
+    wire [`MPRJ_IO_PADS-10:0] user_analog_io;
+
+    /* Padframe control signals */
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_serial_link_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_serial_link_2;
+    wire mprj_io_loader_resetn;
+    wire mprj_io_loader_clock;
+    wire mprj_io_loader_strobe;
+    wire mprj_io_loader_data_1;		/* user1 side serial loader */
+    wire mprj_io_loader_data_2;		/* user2 side serial loader */
+
+    // User Project Control management I/O
+    // There are two types of GPIO connections:
+    // (1) Full Bidirectional: Management connects to in, out, and oeb
+    //     Uses:  JTAG and SDO
+    // (2) Selectable bidirectional:  Management connects to in and out,
+    //	   which are tied together.  oeb is grounded (oeb from the
+    //	   configuration is used)
+
+    // SDI 	 = mprj_io[2]		(input)
+    // CSB 	 = mprj_io[3]		(input)
+    // SCK	 = mprj_io[4]		(input)
+    // ser_rx    = mprj_io[5]		(input)
+    // ser_tx    = mprj_io[6]		(output)
+    // irq 	 = mprj_io[7]		(input)
+
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_in;	/* two- and three-pin data in	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_out;	/* two- and three-pin data out	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_oeb;	/* output enable, used only by	*/
+						/* the three-pin interfaces	*/
+    wire [`MPRJ_PWR_PADS-1:0] pwr_ctrl_nc;	/* no-connects */
+
+    /* Buffers are placed between housekeeping and gpio_control_block		*/
+    /* instances to mitigate timing issues on very long (> 1.5mm) wires.	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_in_hk;	/* mgmt_io_in at housekeeping	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_out_hk;	/* mgmt_io_out at housekeeping	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_oeb_hk;	/* mgmt_io_oeb at housekeeping	*/
+    
+    wire clock_core;
+
+    // Power-on-reset signal.  The reset pad generates the sense-inverted
+    // reset at 3.3V.  The 1.8V signal and the inverted 1.8V signal are
+    // derived.
+
+    wire porb_h;
+    wire porb_l;
+    wire por_l;
+
+    wire rstb_h;
+    wire rstb_l;
+
+    // Flash SPI communication (management SoC to housekeeping)
+    wire flash_clk_core,     flash_csb_core;
+    wire flash_clk_oeb_core, flash_csb_oeb_core;
+    wire flash_io0_oeb_core, flash_io1_oeb_core;
+    wire flash_io2_oeb_core, flash_io3_oeb_core;
+    wire flash_io0_ieb_core, flash_io1_ieb_core;
+    wire flash_io2_ieb_core, flash_io3_ieb_core;
+    wire flash_io0_do_core,  flash_io1_do_core;
+    wire flash_io2_do_core,  flash_io3_do_core;
+    wire flash_io0_di_core,  flash_io1_di_core;
+    wire flash_io2_di_core,  flash_io3_di_core;
+
+    // Flash SPI communication (
+    wire flash_clk_frame;
+    wire flash_csb_frame;
+    wire flash_clk_oeb, flash_csb_oeb;
+    wire flash_clk_ieb, flash_csb_ieb;
+    wire flash_io0_oeb, flash_io1_oeb;
+    wire flash_io0_ieb, flash_io1_ieb;
+    wire flash_io0_do,  flash_io1_do;
+    wire flash_io0_di,  flash_io1_di;
+
+	// Flash buffered signals
+    wire flash_clk_frame_buf;
+    wire flash_csb_frame_buf;
+    wire flash_clk_ieb_buf, flash_csb_ieb_buf;
+    wire flash_io0_oeb_buf, flash_io1_oeb_buf;
+    wire flash_io0_ieb_buf, flash_io1_ieb_buf;
+    wire flash_io0_do_buf,  flash_io1_do_buf;
+    wire flash_io0_di_buf,  flash_io1_di_buf;
+	
+	// Clock and reset buffered signals
+	wire caravel_clk_buf;
+	wire caravel_rstn_buf;
+	wire clock_core_buf;
+
+	// SoC pass through buffered signals
+	wire mprj_io_loader_clock_buf;
+	wire mprj_io_loader_strobe_buf;
+	wire mprj_io_loader_resetn_buf;
+	wire mprj_io_loader_data_2_buf;
+	wire rstb_l_buf;
+	wire por_l_buf;
+	wire porb_h_buf;
+	
+
+    // SoC core
+    wire caravel_clk;
+    wire caravel_clk2;
+    wire caravel_rstn;
+	
+	// top-level buffers
+	buff_flash_clkrst flash_clkrst_buffers (
+	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+	`endif
+	.in_n({
+		caravel_clk,
+		caravel_rstn,
+		flash_clk_frame, 
+		flash_csb_frame, 
+		flash_clk_oeb, 
+		flash_csb_oeb, 
+		flash_io0_oeb, 
+		flash_io1_oeb,
+		flash_io0_ieb, 
+		flash_io1_ieb,
+		flash_io0_do,  
+		flash_io1_do }), 
+	.in_s({
+		clock_core,
+		flash_io1_di, 
+		flash_io0_di }),
+	.out_s({ 
+		caravel_clk_buf,
+		caravel_rstn_buf,
+		flash_clk_frame_buf, 
+		flash_csb_frame_buf, 
+		flash_clk_oeb_buf, 
+		flash_csb_oeb_buf, 
+		flash_io0_oeb_buf, 
+		flash_io1_oeb_buf,
+		flash_io0_ieb_buf, 
+		flash_io1_ieb_buf,
+		flash_io0_do_buf,  
+		flash_io1_do_buf }), 
+	.out_n({
+		clock_core_buf,
+		flash_io1_di_buf, 
+		flash_io0_di_buf })
+	);
+
+	`ifdef NO_TOP_LEVEL_BUFFERING
+		assign mgmt_io_in_hk = mgmt_io_in;
+		assign mgmt_io_out = mgmt_io_out_hk;
+		assign mgmt_io_oeb = mgmt_io_oeb_hk;
+	`else
+
+		/* NOTE: The first 7 GPIO are unbuffered, and all
+		 * OEB lines except the last three are unbuffered
+		 * (most of these end up being no-connects from
+		 * housekeeping).
+		 */
+		assign mgmt_io_in_hk[6:0] = mgmt_io_in[6:0];
+		assign mgmt_io_out[6:0] = mgmt_io_out_hk[6:0];
+		assign mgmt_io_oeb[34:0] = mgmt_io_oeb_hk[34:0];
+
+		gpio_signal_buffering sigbuf (
+		`ifdef USE_POWER_PINS
+			.vccd(vccd_core),
+			.vssd(vssd_core),
+		`endif
+		.mgmt_io_in_unbuf(mgmt_io_in[37:7]),
+		.mgmt_io_out_unbuf(mgmt_io_out_hk[37:7]),
+		.mgmt_io_oeb_unbuf(mgmt_io_oeb_hk[37:35]),
+		.mgmt_io_in_buf(mgmt_io_in_hk[37:7]),
+		.mgmt_io_out_buf(mgmt_io_out[37:7]),
+		.mgmt_io_oeb_buf(mgmt_io_oeb[37:35])
+		);
+	`endif
+
+	chip_io padframe(
+	`ifndef TOP_ROUTING
+		// Package Pins
+		.vddio_pad	(vddio),		// Common padframe/ESD supply
+		.vddio_pad2	(vddio_2),
+		.vssio_pad	(vssio),		// Common padframe/ESD ground
+		.vssio_pad2	(vssio_2),
+		.vccd_pad	(vccd),			// Common 1.8V supply
+		.vssd_pad	(vssd),			// Common digital ground
+		.vdda_pad	(vdda),			// Management analog 3.3V supply
+		.vssa_pad	(vssa),			// Management analog ground
+		.vdda1_pad	(vdda1),		// User area 1 3.3V supply
+		.vdda1_pad2	(vdda1_2),		
+		.vdda2_pad	(vdda2),		// User area 2 3.3V supply
+		.vssa1_pad	(vssa1),		// User area 1 analog ground
+		.vssa1_pad2	(vssa1_2),
+		.vssa2_pad	(vssa2),		// User area 2 analog ground
+		.vccd1_pad	(vccd1),		// User area 1 1.8V supply
+		.vccd2_pad	(vccd2),		// User area 2 1.8V supply
+		.vssd1_pad	(vssd1),		// User area 1 digital ground
+		.vssd2_pad	(vssd2),		// User area 2 digital ground
+        .vddio	(vddio_core),
+        .vssio	(vssio_core),
+        .vdda	(vdda_core),
+        .vssa	(vssa_core),
+        .vccd	(vccd_core),
+        .vssd	(vssd_core),
+        .vdda1	(vdda1_core),
+        .vdda2	(vdda2_core),
+        .vssa1	(vssa1_core),
+        .vssa2	(vssa2_core),
+        .vccd1	(vccd1_core),
+        .vccd2	(vccd2_core),
+        .vssd1	(vssd1_core),
+        .vssd2	(vssd2_core),
+	`endif
+	// Core Side Pins
+	.gpio(gpio),
+	.mprj_io(mprj_io),
+	.clock(clock),
+	.resetb(resetb),
+	.flash_csb(flash_csb),
+	.flash_clk(flash_clk),
+	.flash_io0(flash_io0),
+	.flash_io1(flash_io1),
+	// SoC Core Interface
+	.porb_h(porb_h),
+	.por(por_l_buf),
+	.resetb_core_h(rstb_h),
+	.clock_core(clock_core),
+	.gpio_out_core(gpio_out_core),
+	.gpio_in_core(gpio_in_core),
+	.gpio_mode0_core(gpio_mode0_core),
+	.gpio_mode1_core(gpio_mode1_core),
+	.gpio_outenb_core(gpio_outenb_core),
+	.gpio_inenb_core(gpio_inenb_core),
+	.flash_csb_core(flash_csb_frame_buf),
+	.flash_clk_core(flash_clk_frame_buf),
+	.flash_csb_oeb_core(flash_csb_oeb_buf),
+	.flash_clk_oeb_core(flash_clk_oeb_buf),
+	.flash_io0_oeb_core(flash_io0_oeb_buf),
+	.flash_io1_oeb_core(flash_io1_oeb_buf),
+	.flash_io0_ieb_core(flash_io0_ieb_buf),
+	.flash_io1_ieb_core(flash_io1_ieb_buf),
+	.flash_io0_do_core(flash_io0_do_buf),
+	.flash_io1_do_core(flash_io1_do_buf),
+	.flash_io0_di_core(flash_io0_di),
+	.flash_io1_di_core(flash_io1_di),
+	.mprj_io_one(mprj_io_one),
+	.mprj_io_in(mprj_io_in),
+	.mprj_io_out(mprj_io_out),
+	.mprj_io_oeb(mprj_io_oeb),
+	.mprj_io_inp_dis(mprj_io_inp_dis),
+	.mprj_io_ib_mode_sel(mprj_io_ib_mode_sel),
+	.mprj_io_vtrip_sel(mprj_io_vtrip_sel),
+	.mprj_io_slow_sel(mprj_io_slow_sel),
+	.mprj_io_holdover(mprj_io_holdover),
+	.mprj_io_analog_en(mprj_io_analog_en),
+	.mprj_io_analog_sel(mprj_io_analog_sel),
+	.mprj_io_analog_pol(mprj_io_analog_pol),
+	.mprj_io_dm(mprj_io_dm),
+	.mprj_analog_io(user_analog_io)
+    );
+
+
+    // Logic analyzer signals
+    wire [127:0] la_data_in_user;  // From CPU to MPRJ
+    wire [127:0] la_data_in_mprj;  // From MPRJ to CPU
+    wire [127:0] la_data_out_mprj; // From CPU to MPRJ
+    wire [127:0] la_data_out_user; // From MPRJ to CPU
+    wire [127:0] la_oenb_user;     // From CPU to MPRJ
+    wire [127:0] la_oenb_mprj;     // From CPU to MPRJ
+    wire [127:0] la_iena_mprj;     // From CPU only
+
+    wire [2:0]   user_irq;	  // From MRPJ to CPU
+    wire [2:0]   user_irq_core;
+    wire [2:0]   user_irq_ena;
+    wire [2:0]	 irq_spi;	  // From SPI and external pins
+
+    // Exported Wishbone Bus (processor facing)
+    wire mprj_iena_wb;
+    wire mprj_cyc_o_core;
+    wire mprj_stb_o_core;
+    wire mprj_we_o_core;
+    wire [3:0] mprj_sel_o_core;
+    wire [31:0] mprj_adr_o_core;
+    wire [31:0] mprj_dat_o_core;
+    wire mprj_ack_i_core;
+    wire [31:0] mprj_dat_i_core;
+
+    wire [31:0] hk_dat_i;
+    wire hk_ack_i;
+    wire hk_stb_o;
+    wire hk_cyc_o;
+
+    // Exported Wishbone Bus (user area facing)
+    wire 	mprj_cyc_o_user;
+    wire 	mprj_stb_o_user;
+    wire 	mprj_we_o_user;
+    wire [3:0]  mprj_sel_o_user;
+    wire [31:0] mprj_adr_o_user;
+    wire [31:0] mprj_dat_o_user;
+    wire [31:0] mprj_dat_i_user;
+    wire	mprj_ack_i_user;
+
+    // Mask revision
+    wire [31:0] mask_rev;
+
+    wire 	mprj_clock;
+    wire 	mprj_clock2;
+    wire 	mprj_reset;
+
+    // Power monitoring 
+    wire	mprj_vcc_pwrgood;
+    wire	mprj2_vcc_pwrgood;
+    wire	mprj_vdd_pwrgood;
+    wire	mprj2_vdd_pwrgood;
+
+`ifdef USE_SRAM_RO_INTERFACE
+    // SRAM read-only access from housekeeping
+    wire 	hkspi_sram_clk;
+    wire 	hkspi_sram_csb;
+    wire [7:0]	hkspi_sram_addr;
+    wire [31:0]	hkspi_sram_data;
+`endif
+
+    // Management processor (wrapper).  Any management core
+    // implementation must match this pinout.
+
+    // Pass thru clock and reset
+    wire 	clk_passthru;
+    wire 	resetn_passthru;
+
+	// NC passthru signal porb_h 
+	wire porb_h_in_nc;
+	wire porb_h_out_nc;
+
+    mgmt_core_wrapper soc (
+	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+	`endif
+
+	// SoC pass through buffered signals
+	.serial_clock_in(mprj_io_loader_clock),
+	.serial_clock_out(mprj_io_loader_clock_buf),
+	.serial_load_in(mprj_io_loader_strobe),
+	.serial_load_out(mprj_io_loader_strobe_buf),
+	.serial_resetn_in(mprj_io_loader_resetn),
+	.serial_resetn_out(mprj_io_loader_resetn_buf),
+	.serial_data_2_in(mprj_io_loader_data_2),
+	.serial_data_2_out(mprj_io_loader_data_2_buf),
+	.rstb_l_in(rstb_l),
+	.rstb_l_out(rstb_l_buf),
+	.porb_h_in(porb_h_in_nc),
+	.porb_h_out(porb_h_out_nc),
+	.por_l_in(por_l),
+	.por_l_out(por_l_buf),
+
+	// Clock and reset
+	.core_clk(caravel_clk_buf),
+	.core_rstn(caravel_rstn_buf),
+
+    // Pass thru Clock and reset
+	.clk_in(caravel_clk_buf),
+	.resetn_in(caravel_rstn_buf),
+	.clk_out(clk_passthru),
+	.resetn_out(resetn_passthru),
+
+	// GPIO (1 pin)
+	.gpio_out_pad(gpio_out_core),
+	.gpio_in_pad(gpio_in_core),
+	.gpio_mode0_pad(gpio_mode0_core),
+	.gpio_mode1_pad(gpio_mode1_core),
+	.gpio_outenb_pad(gpio_outenb_core),
+	.gpio_inenb_pad(gpio_inenb_core),
+
+	// Primary SPI flash controller
+	.flash_csb(flash_csb_core),
+	.flash_clk(flash_clk_core),
+	.flash_io0_oeb(flash_io0_oeb_core),
+	.flash_io0_di(flash_io0_di_core),
+	.flash_io0_do(flash_io0_do_core),
+	.flash_io1_oeb(flash_io1_oeb_core),
+	.flash_io1_di(flash_io1_di_core),
+	.flash_io1_do(flash_io1_do_core),
+	.flash_io2_oeb(flash_io2_oeb_core),
+	.flash_io2_di(flash_io2_di_core),
+	.flash_io2_do(flash_io2_do_core),
+	.flash_io3_oeb(flash_io3_oeb_core),
+	.flash_io3_di(flash_io3_di_core),
+	.flash_io3_do(flash_io3_do_core),
+
+	// Exported Wishbone Bus
+	.mprj_wb_iena(mprj_iena_wb),
+	.mprj_cyc_o(mprj_cyc_o_core),
+	.mprj_stb_o(mprj_stb_o_core),
+	.mprj_we_o(mprj_we_o_core),
+	.mprj_sel_o(mprj_sel_o_core),
+	.mprj_adr_o(mprj_adr_o_core),
+	.mprj_dat_o(mprj_dat_o_core),
+	.mprj_ack_i(mprj_ack_i_core),
+	.mprj_dat_i(mprj_dat_i_core),
+
+	.hk_stb_o(hk_stb_o),
+	.hk_cyc_o(hk_cyc_o),
+	.hk_dat_i(hk_dat_i),
+	.hk_ack_i(hk_ack_i),
+
+	// IRQ
+	.irq({irq_spi, user_irq}),
+	.user_irq_ena(user_irq_ena),
+
+	// Module status (these may or may not be implemented)
+	.qspi_enabled(qspi_enabled),
+	.uart_enabled(uart_enabled),
+	.spi_enabled(spi_enabled),
+	.debug_mode(debug_mode),
+
+	// Module I/O (these may or may not be implemented)
+	// UART
+	.ser_tx(ser_tx),
+	.ser_rx(ser_rx),
+	// SPI master
+	.spi_sdi(spi_sdi),
+	.spi_csb(spi_csb),
+	.spi_sck(spi_sck),
+	.spi_sdo(spi_sdo),
+	.spi_sdoenb(spi_sdoenb),
+	// Debug
+	.debug_in(debug_in),
+	.debug_out(debug_out),
+	.debug_oeb(debug_oeb),
+	// Logic analyzer
+	.la_input(la_data_in_mprj),
+	.la_output(la_data_out_mprj),
+	.la_oenb(la_oenb_mprj),
+	.la_iena(la_iena_mprj),
+
+`ifdef USE_SRAM_RO_INTERFACE
+	// SRAM Read-only access from housekeeping
+	.sram_ro_clk(hkspi_sram_clk),
+	.sram_ro_csb(hkspi_sram_csb),
+	.sram_ro_addr(hkspi_sram_addr),
+	.sram_ro_data(hkspi_sram_data),
+`endif
+
+	// Trap status
+	.trap(trap)
+    );
+
+    /* Clock and reset to user space are passed through a tristate	*/
+    /* buffer like the above, but since they are intended to be		*/
+    /* always active, connect the enable to the logic-1 output from	*/
+    /* the vccd1 domain.						*/
+
+    mgmt_protect mgmt_buffers (
+	`ifdef USE_POWER_PINS
+ 	    .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+	    .vccd2(vccd2_core),
+	    .vssd2(vssd2_core),
+	    .vdda1(vdda1_core),
+	    .vssa1(vssa1_core),
+	    .vdda2(vdda2_core),
+	    .vssa2(vssa2_core),
+	`endif
+	.caravel_clk(clk_passthru),
+	.caravel_clk2(caravel_clk2),
+	.caravel_rstn(resetn_passthru),
+	.mprj_iena_wb(mprj_iena_wb),
+	.mprj_cyc_o_core(mprj_cyc_o_core),
+	.mprj_stb_o_core(mprj_stb_o_core),
+	.mprj_we_o_core(mprj_we_o_core),
+	.mprj_sel_o_core(mprj_sel_o_core),
+	.mprj_adr_o_core(mprj_adr_o_core),
+	.mprj_dat_o_core(mprj_dat_o_core),
+	.mprj_ack_i_core(mprj_ack_i_core),
+	.mprj_dat_i_core(mprj_dat_i_core),
+	.user_irq_core(user_irq_core),
+	.user_irq_ena(user_irq_ena),
+	.la_data_out_core(la_data_out_user),
+	.la_data_out_mprj(la_data_out_mprj),
+	.la_data_in_core(la_data_in_user),
+	.la_data_in_mprj(la_data_in_mprj),
+	.la_oenb_mprj(la_oenb_mprj),
+	.la_oenb_core(la_oenb_user),
+	.la_iena_mprj(la_iena_mprj),
+
+	.user_clock(mprj_clock),
+	.user_clock2(mprj_clock2),
+	.user_reset(mprj_reset),
+	.mprj_cyc_o_user(mprj_cyc_o_user),
+	.mprj_stb_o_user(mprj_stb_o_user),
+	.mprj_we_o_user(mprj_we_o_user),
+	.mprj_sel_o_user(mprj_sel_o_user),
+	.mprj_adr_o_user(mprj_adr_o_user),
+	.mprj_dat_o_user(mprj_dat_o_user),
+	.mprj_dat_i_user(mprj_dat_i_user),
+	.mprj_ack_i_user(mprj_ack_i_user),
+	.user_irq(user_irq),
+	.user1_vcc_powergood(mprj_vcc_pwrgood),
+	.user2_vcc_powergood(mprj2_vcc_pwrgood),
+	.user1_vdd_powergood(mprj_vdd_pwrgood),
+	.user2_vdd_powergood(mprj2_vdd_pwrgood)
+    );
+
+    /*--------------------------------------------------*/
+    /* Wrapper module around the user project 		*/
+    /*--------------------------------------------------*/
+
+    user_project_wrapper mprj ( 
+        `ifdef USE_POWER_PINS
+	    .vdda1(vdda1_core),		// User area 1 3.3V power
+	    .vdda2(vdda2_core),		// User area 2 3.3V power
+	    .vssa1(vssa1_core),		// User area 1 analog ground
+	    .vssa2(vssa2_core),		// User area 2 analog ground
+	    .vccd1(vccd1_core),		// User area 1 1.8V power
+	    .vccd2(vccd2_core),		// User area 2 1.8V power
+	    .vssd1(vssd1_core),		// User area 1 digital ground
+	    .vssd2(vssd2_core),		// User area 2 digital ground
+    	`endif
+
+    	.wb_clk_i(mprj_clock),
+    	.wb_rst_i(mprj_reset),
+
+	// Management SoC Wishbone bus (exported)
+	.wbs_cyc_i(mprj_cyc_o_user),
+	.wbs_stb_i(mprj_stb_o_user),
+	.wbs_we_i(mprj_we_o_user),
+	.wbs_sel_i(mprj_sel_o_user),
+	.wbs_adr_i(mprj_adr_o_user),
+	.wbs_dat_i(mprj_dat_o_user),
+	.wbs_ack_o(mprj_ack_i_user),
+	.wbs_dat_o(mprj_dat_i_user),
+
+	// GPIO pad 3-pin interface (plus analog)
+	.io_in (user_io_in),
+    	.io_out(user_io_out),
+    	.io_oeb(user_io_oeb),
+	.analog_io(user_analog_io),
+
+	// Logic analyzer
+	.la_data_in(la_data_in_user),
+	.la_data_out(la_data_out_user),
+	.la_oenb(la_oenb_user),
+
+	// Independent clock
+	.user_clock2(mprj_clock2),
+
+	// IRQ
+	.user_irq(user_irq_core)
+    );
+
+    /*------------------------------------------*/
+    /* End user project instantiation		*/
+    /*------------------------------------------*/
+
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_serial_link_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_serial_link_2_shifted;
+
+    assign gpio_serial_link_1_shifted = {gpio_serial_link_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_data_1};
+    // Note that serial_link_2 is backwards compared to serial_link_1, so it
+    // shifts in the other direction.
+    assign gpio_serial_link_2_shifted = {mprj_io_loader_data_2_buf,
+					 gpio_serial_link_2[`MPRJ_IO_PADS_2-1:1]};
+
+    // Propagating clock and reset to mitigate timing and fanout issues
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_clock_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_clock_2;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_resetn_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_resetn_2;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_load_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_load_2;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_clock_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_clock_2_shifted;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_resetn_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_resetn_2_shifted;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_load_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_load_2_shifted;
+
+    assign gpio_clock_1_shifted = {gpio_clock_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_clock};
+    assign gpio_clock_2_shifted = {mprj_io_loader_clock_buf,
+					gpio_clock_2[`MPRJ_IO_PADS_2-1:1]};
+    assign gpio_resetn_1_shifted = {gpio_resetn_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_resetn};
+    assign gpio_resetn_2_shifted = {mprj_io_loader_resetn_buf,
+					gpio_resetn_2[`MPRJ_IO_PADS_2-1:1]};
+    assign gpio_load_1_shifted = {gpio_load_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_strobe};
+    assign gpio_load_2_shifted = {mprj_io_loader_strobe_buf,
+					gpio_load_2[`MPRJ_IO_PADS_2-1:1]};
+
+    wire [2:0] spi_pll_sel;
+    wire [2:0] spi_pll90_sel;
+    wire [4:0] spi_pll_div;
+    wire [25:0] spi_pll_trim;
+
+    // Clocking control
+
+    caravel_clocking clock_ctrl (
+    `ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+    `endif
+        .ext_clk_sel(ext_clk_sel),
+        .ext_clk(clock_core_buf),
+        .pll_clk(pll_clk),
+        .pll_clk90(pll_clk90),
+        .resetb(rstb_l_buf),
+        .sel(spi_pll_sel),
+        .sel2(spi_pll90_sel),
+        .ext_reset(ext_reset),  // From housekeeping SPI
+        .core_clk(caravel_clk),
+        .user_clk(caravel_clk2),
+        .resetb_sync(caravel_rstn)
+    );
+
+    // DCO/Digital Locked Loop
+
+    digital_pll pll (
+    `ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+    `endif
+        .resetb(rstb_l_buf),
+        .enable(spi_pll_ena),
+        .osc(clock_core_buf),
+        .clockp({pll_clk, pll_clk90}),
+        .div(spi_pll_div),
+        .dco(spi_pll_dco_ena),
+        .ext_trim(spi_pll_trim)
+    );
+
+    // Housekeeping interface
+
+    housekeeping housekeeping (
+    `ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+    `endif
+
+        .wb_clk_i(caravel_clk),
+        .wb_rstn_i(caravel_rstn),
+
+        .wb_adr_i(mprj_adr_o_core),
+        .wb_dat_i(mprj_dat_o_core),
+        .wb_sel_i(mprj_sel_o_core),
+        .wb_we_i(mprj_we_o_core),
+        .wb_cyc_i(hk_cyc_o),
+        .wb_stb_i(hk_stb_o),
+        .wb_ack_o(hk_ack_i),
+        .wb_dat_o(hk_dat_i),
+
+        .porb(porb_l),
+
+        .pll_ena(spi_pll_ena),
+        .pll_dco_ena(spi_pll_dco_ena),
+        .pll_div(spi_pll_div),
+        .pll_sel(spi_pll_sel),
+        .pll90_sel(spi_pll90_sel),
+        .pll_trim(spi_pll_trim),
+        .pll_bypass(ext_clk_sel),
+
+	.qspi_enabled(qspi_enabled),
+	.uart_enabled(uart_enabled),
+	.spi_enabled(spi_enabled),
+	.debug_mode(debug_mode),
+
+	.ser_tx(ser_tx),
+	.ser_rx(ser_rx),
+
+	.spi_sdi(spi_sdi),
+	.spi_csb(spi_csb),
+	.spi_sck(spi_sck),
+	.spi_sdo(spi_sdo),
+	.spi_sdoenb(spi_sdoenb),
+
+	.debug_in(debug_in),
+	.debug_out(debug_out),
+	.debug_oeb(debug_oeb),
+
+        .irq(irq_spi),
+        .reset(ext_reset),
+
+        .serial_clock(mprj_io_loader_clock),
+        .serial_load(mprj_io_loader_strobe),
+        .serial_resetn(mprj_io_loader_resetn),
+        .serial_data_1(mprj_io_loader_data_1),
+        .serial_data_2(mprj_io_loader_data_2),
+
+	.mgmt_gpio_in(mgmt_io_in_hk),
+	.mgmt_gpio_out(mgmt_io_out_hk),
+	.mgmt_gpio_oeb(mgmt_io_oeb_hk),
+
+	.pwr_ctrl_out(pwr_ctrl_nc),	/* Not used in this version */
+
+        .trap(trap),
+
+	.user_clock(caravel_clk2),
+
+        .mask_rev_in(mask_rev),
+
+	.spimemio_flash_csb(flash_csb_core),
+	.spimemio_flash_clk(flash_clk_core),
+	.spimemio_flash_io0_oeb(flash_io0_oeb_core),
+	.spimemio_flash_io1_oeb(flash_io1_oeb_core),
+	.spimemio_flash_io2_oeb(flash_io2_oeb_core),
+	.spimemio_flash_io3_oeb(flash_io3_oeb_core),
+	.spimemio_flash_io0_do(flash_io0_do_core),
+	.spimemio_flash_io1_do(flash_io1_do_core),
+	.spimemio_flash_io2_do(flash_io2_do_core),
+	.spimemio_flash_io3_do(flash_io3_do_core),
+	.spimemio_flash_io0_di(flash_io0_di_core),
+	.spimemio_flash_io1_di(flash_io1_di_core),
+	.spimemio_flash_io2_di(flash_io2_di_core),
+	.spimemio_flash_io3_di(flash_io3_di_core),
+
+	.pad_flash_csb(flash_csb_frame),
+	.pad_flash_csb_oeb(flash_csb_oeb),
+	.pad_flash_clk(flash_clk_frame),
+	.pad_flash_clk_oeb(flash_clk_oeb),
+	.pad_flash_io0_oeb(flash_io0_oeb),
+	.pad_flash_io1_oeb(flash_io1_oeb),
+	.pad_flash_io0_ieb(flash_io0_ieb),
+	.pad_flash_io1_ieb(flash_io1_ieb),
+	.pad_flash_io0_do(flash_io0_do),
+	.pad_flash_io1_do(flash_io1_do),
+	.pad_flash_io0_di(flash_io0_di_buf),
+	.pad_flash_io1_di(flash_io1_di_buf),
+
+`ifdef USE_SRAM_RO_INTERFACE
+	.sram_ro_clk(hkspi_sram_clk),
+	.sram_ro_csb(hkspi_sram_csb),
+	.sram_ro_addr(hkspi_sram_addr),
+	.sram_ro_data(hkspi_sram_data),
+`endif
+
+	.usr1_vcc_pwrgood(mprj_vcc_pwrgood),
+	.usr2_vcc_pwrgood(mprj2_vcc_pwrgood),
+	.usr1_vdd_pwrgood(mprj_vdd_pwrgood),
+	.usr2_vdd_pwrgood(mprj2_vdd_pwrgood)
+    );
+
+    /* GPIO defaults (via programmed) */
+    wire [`MPRJ_IO_PADS*13-1:0] gpio_defaults;
+
+    /* Fixed defaults for the first 5 GPIO pins */
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h1803)
+    ) gpio_defaults_block_0 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[12:0])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h1803)
+    ) gpio_defaults_block_1 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[25:13])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h0403)
+    ) gpio_defaults_block_2 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[38:26])
+    );
+
+    // CSB pin is set as an internal pull-up
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h0801)
+    ) gpio_defaults_block_3 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[51:39])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h0403)
+    ) gpio_defaults_block_4 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[64:52])
+    );
+
+    /* Via-programmable defaults for the rest of the GPIO pins */
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_5_INIT)
+    ) gpio_defaults_block_5 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[77:65])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_6_INIT)
+    ) gpio_defaults_block_6 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[90:78])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_7_INIT)
+    ) gpio_defaults_block_7 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[103:91])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_8_INIT)
+    ) gpio_defaults_block_8 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[116:104])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_9_INIT)
+    ) gpio_defaults_block_9 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[129:117])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_10_INIT)
+    ) gpio_defaults_block_10 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[142:130])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_11_INIT)
+    ) gpio_defaults_block_11 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[155:143])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_12_INIT)
+    ) gpio_defaults_block_12 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[168:156])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_13_INIT)
+    ) gpio_defaults_block_13 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[181:169])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_14_INIT)
+    ) gpio_defaults_block_14 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[194:182])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_15_INIT)
+    ) gpio_defaults_block_15 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[207:195])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_16_INIT)
+    ) gpio_defaults_block_16 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[220:208])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_17_INIT)
+    ) gpio_defaults_block_17 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[233:221])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_18_INIT)
+    ) gpio_defaults_block_18 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[246:234])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_19_INIT)
+    ) gpio_defaults_block_19 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[259:247])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_20_INIT)
+    ) gpio_defaults_block_20 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[272:260])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_21_INIT)
+    ) gpio_defaults_block_21 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[285:273])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_22_INIT)
+    ) gpio_defaults_block_22 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[298:286])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_23_INIT)
+    ) gpio_defaults_block_23 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[311:299])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_24_INIT)
+    ) gpio_defaults_block_24 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[324:312])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_25_INIT)
+    ) gpio_defaults_block_25 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[337:325])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_26_INIT)
+    ) gpio_defaults_block_26 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[350:338])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_27_INIT)
+    ) gpio_defaults_block_27 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[363:351])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_28_INIT)
+    ) gpio_defaults_block_28 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[376:364])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_29_INIT)
+    ) gpio_defaults_block_29 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[389:377])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_30_INIT)
+    ) gpio_defaults_block_30 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[402:390])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_31_INIT)
+    ) gpio_defaults_block_31 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[415:403])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_32_INIT)
+    ) gpio_defaults_block_32 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[428:416])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_33_INIT)
+    ) gpio_defaults_block_33 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[441:429])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_34_INIT)
+    ) gpio_defaults_block_34 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[454:442])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_35_INIT)
+    ) gpio_defaults_block_35 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[467:455])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_36_INIT)
+    ) gpio_defaults_block_36 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[480:468])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_37_INIT)
+    ) gpio_defaults_block_37 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[493:481])
+    );
+
+    // Each control block sits next to an I/O pad in the user area.
+    // It gets input through a serial chain from the previous control
+    // block and passes it to the next control block.  Due to the nature
+    // of the shift register, bits are presented in reverse, as the first
+    // bit in ends up as the last bit of the last I/O pad control block.
+
+    // There are two types of block;  the first two and the last two
+    // are configured to be full bidirectional under control of the
+    // management Soc (JTAG and SDO for the first two;  flash_io2 and
+    // flash_io3 for the last two).  The rest are configured to be default
+    // (input).  Note that the first two and last two are the ones closest
+    // to the management SoC on either side, which minimizes the wire length
+    // of the extra signals those pads need.
+
+    /* First two GPIOs (JTAG and SDO) */
+
+    gpio_control_block gpio_control_bidir_1 [1:0] (
+    	`ifdef USE_POWER_PINS
+	    .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[25:0]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_1_shifted[1:0]),
+    	.serial_clock(gpio_clock_1_shifted[1:0]),
+    	.serial_load(gpio_load_1_shifted[1:0]),
+
+    	.resetn_out(gpio_resetn_1[1:0]),
+    	.serial_clock_out(gpio_clock_1[1:0]),
+    	.serial_load_out(gpio_load_1[1:0]),
+
+    	.mgmt_gpio_in(mgmt_io_in[1:0]),
+	.mgmt_gpio_out(mgmt_io_out[1:0]),
+	.mgmt_gpio_oeb(mgmt_io_oeb[1:0]),
+
+        .one(mprj_io_one[1:0]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_1_shifted[1:0]),
+    	.serial_data_out(gpio_serial_link_1[1:0]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[1:0]),
+    	.user_gpio_oeb(user_io_oeb[1:0]),
+    	.user_gpio_in(user_io_in[1:0]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[1:0]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[1:0]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[1:0]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[1:0]),
+    	.pad_gpio_holdover(mprj_io_holdover[1:0]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[1:0]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[1:0]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[1:0]),
+    	.pad_gpio_dm(mprj_io_dm[5:0]),
+    	.pad_gpio_outenb(mprj_io_oeb[1:0]),
+    	.pad_gpio_out(mprj_io_out[1:0]),
+    	.pad_gpio_in(mprj_io_in[1:0])
+    );
+
+    /* Section 1 GPIOs (GPIO 2 to 7) that start up under management control */
+
+    gpio_control_block gpio_control_in_1a [5:0] (
+        `ifdef USE_POWER_PINS
+            .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[103:26]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_1_shifted[7:2]),
+    	.serial_clock(gpio_clock_1_shifted[7:2]),
+    	.serial_load(gpio_load_1_shifted[7:2]),
+
+    	.resetn_out(gpio_resetn_1[7:2]),
+    	.serial_clock_out(gpio_clock_1[7:2]),
+    	.serial_load_out(gpio_load_1[7:2]),
+
+	.mgmt_gpio_in(mgmt_io_in[7:2]),
+	.mgmt_gpio_out(mgmt_io_out[7:2]),
+	.mgmt_gpio_oeb(mprj_io_one[7:2]),
+
+        .one(mprj_io_one[7:2]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_1_shifted[7:2]),
+    	.serial_data_out(gpio_serial_link_1[7:2]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[7:2]),
+    	.user_gpio_oeb(user_io_oeb[7:2]),
+    	.user_gpio_in(user_io_in[7:2]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[7:2]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[7:2]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[7:2]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[7:2]),
+    	.pad_gpio_holdover(mprj_io_holdover[7:2]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[7:2]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[7:2]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[7:2]),
+    	.pad_gpio_dm(mprj_io_dm[23:6]),
+    	.pad_gpio_outenb(mprj_io_oeb[7:2]),
+    	.pad_gpio_out(mprj_io_out[7:2]),
+    	.pad_gpio_in(mprj_io_in[7:2])
+    );
+
+    /* Section 1 GPIOs (GPIO 8 to 18) */
+
+    gpio_control_block gpio_control_in_1 [`MPRJ_IO_PADS_1-9:0] (
+        `ifdef USE_POWER_PINS
+            .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS_1*13-1):104]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_clock(gpio_clock_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_load(gpio_load_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+
+    	.resetn_out(gpio_resetn_1[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_clock_out(gpio_clock_1[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_load_out(gpio_load_1[(`MPRJ_IO_PADS_1-1):8]),
+
+	.mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS_1-1):8]),
+	.mgmt_gpio_out(mgmt_io_out[(`MPRJ_IO_PADS_1-1):8]),
+	.mgmt_gpio_oeb(mprj_io_one[(`MPRJ_IO_PADS_1-1):8]),
+  
+        .one(mprj_io_one[(`MPRJ_IO_PADS_1-1):8]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_data_out(gpio_serial_link_1[(`MPRJ_IO_PADS_1-1):8]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[(`MPRJ_IO_PADS_1-1):8]),
+    	.user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS_1-1):8]),
+    	.user_gpio_in(user_io_in[(`MPRJ_IO_PADS_1-1):8]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS_1*3-1):24]),
+    	.pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS_1-1):8])
+    );
+
+    /* Last three GPIOs (spi_sdo, flash_io2, and flash_io3) */
+
+    gpio_control_block gpio_control_bidir_2 [2:0] (
+    	`ifdef USE_POWER_PINS
+	    .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS*13-1):(`MPRJ_IO_PADS*13-39)]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_clock(gpio_clock_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_load(gpio_load_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+
+    	.resetn_out(gpio_resetn_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_clock_out(gpio_clock_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_load_out(gpio_load_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+
+    	.mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+	.mgmt_gpio_out(mgmt_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+	.mgmt_gpio_oeb(mgmt_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+
+        .one(mprj_io_one[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_data_out(gpio_serial_link_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.user_gpio_in(user_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS*3-1):(`MPRJ_IO_PADS*3-9)]),
+    	.pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)])
+    );
+
+    /* Section 2 GPIOs (GPIO 19 to 34) */
+
+    gpio_control_block gpio_control_in_2 [`MPRJ_IO_PADS_2-4:0] (
+    	`ifdef USE_POWER_PINS
+            .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS*13-40):(`MPRJ_IO_PADS_1*13)]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_clock(gpio_clock_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_load(gpio_load_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+
+    	.resetn_out(gpio_resetn_2[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_clock_out(gpio_clock_2[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_load_out(gpio_load_2[(`MPRJ_IO_PADS_2-4):0]),
+
+	.mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+	.mgmt_gpio_out(mgmt_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+	.mgmt_gpio_oeb(mprj_io_one[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+
+
+        .one(mprj_io_one[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_data_out(gpio_serial_link_2[(`MPRJ_IO_PADS_2-4):0]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.user_gpio_in(user_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS*3-10):(`MPRJ_IO_PADS_1*3)]),
+    	.pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)])
+    );
+
+    user_id_programming #(
+	.USER_PROJECT_ID(USER_PROJECT_ID)
+    ) user_id_value (
+	`ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+	`endif
+	.mask_rev(mask_rev)
+    );
+
+    // Power-on-reset circuit
+    simple_por por (
+	`ifdef USE_POWER_PINS
+		.vdd3v3(vddio_core),
+		.vdd1v8(vccd_core),
+		.vss3v3(vssio_core),
+		.vss1v8(vssd_core),
+	`endif
+		.porb_h(porb_h),
+		.porb_l(porb_l),
+		.por_l(por_l)
+    );
+
+    // XRES (chip input pin reset) reset level converter
+    xres_buf rstb_level (
+	`ifdef USE_POWER_PINS
+		.VPWR(vddio_core),
+		.LVPWR(vccd_core),
+		.LVGND(vssd_core),
+		.VGND(vssio_core),
+	`endif
+		.A(rstb_h),
+		.X(rstb_l)
+    );
+
+    /* Spare logic for metal mask fixes */
+    // `define NUM_SPARE_BLOCKS (`MPRJ_IO_PADS+4)
+    `define NUM_SPARE_BLOCKS 4
+
+    wire [(27*`NUM_SPARE_BLOCKS)-1:0] spare_xz_nc;
+    wire [(4*`NUM_SPARE_BLOCKS)-1:0] spare_xi_nc;
+    wire [(1*`NUM_SPARE_BLOCKS)-1:0] spare_xib_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xna_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xno_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xmx_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xfq_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xfqn_nc;
+
+    // Four spare logic blocks above the processor and one per GPIO
+    // control block.
+    spare_logic_block spare_logic [`NUM_SPARE_BLOCKS-1:0] (
+	`ifdef USE_POWER_PINS
+		.vccd(vccd_core),
+		.vssd(vssd_core),
+	`endif
+		.spare_xz(spare_xz_nc),
+		.spare_xi(spare_xi_nc),
+		.spare_xib(spare_xib_nc),
+		.spare_xna(spare_xna_nc),
+		.spare_xno(spare_xno_nc),
+		.spare_xmx(spare_xmx_nc),
+		.spare_xfq(spare_xfq_nc),
+		.spare_xfqn(spare_xfqn_nc)
+    );
+
+    `ifdef TOP_ROUTING
+    caravel_power_routing caravel_power_routing();
+    copyright_block copyright_block();
+    caravel_logo caravel_logo();
+    caravel_motto caravel_motto();
+    open_source open_source();
+    user_id_textblock user_id_textblock();
+    `endif
+
+endmodule
+// `default_nettype wire