blob: ec8a101397129a9b3940e8147a81e08de8da0e50 [file] [log] [blame]
v {xschem version=2.9.8 file_version=1.2
* Copyright 2021 Stefan Frederik Schippers
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
}
G {type=subcircuit
format="@name @pinlist @VCCPIN @VSSPIN @symname W_N=@W_N L_N=@L_N W_P=@W_P L_P=@L_P m=@m"
template="name=x1 m=1
+ W_N=1 L_N=0.15 W_P=2 L_P=0.15
+ VCCPIN=VCC VSSPIN=VSS"
extra="VCCPIN VSSPIN"
}
V {}
S {}
E {}
L 4 -40 0 -27.5 0 {}
L 4 -27.5 -20 -27.5 20 {}
L 4 -27.5 -20 16.25 0 {}
L 4 -27.5 20 16.25 0 {}
L 4 23.75 0 40 -0 {}
B 5 37.5 -2.5 42.5 2.5 {name=y dir=out verilog_type=wire}
B 5 -42.5 -2.5 -37.5 2.5 {name=a dir=in}
A 4 20 0 3.75 360 360 {}
T {n:@W_N / @L_N} -35 35 2 1 0.2 0.2 {}
T {p:@W_P / @L_P} -35 -22.5 2 1 0.2 0.2 {}
T {@name} -26.25 -5 0 0 0.2 0.2 {}
T {m=@m} -10 -37.5 2 1 0.25 0.2 {}
T {@symname} -5 40 0 0 0.2 0.2 {layer=13 hcenter=true}