blob: 7b7d4fb018f3a3bf85eb0fb1b667885c1cf04408 [file] [log] [blame]
Project Chip ID is: 578741
Setting Project Chip ID to: 0008d4b5
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!