blob: a94b2d542a8d9c7c02906fbe1328d2108d04330b [file] [log] [blame]
Project Chip ID is: 586020
Setting Project Chip ID to: 0008f124
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!