new file: signoff/user_proj_example/metrics.csv
new file: signoff/user_project_wrapper/metrics.csv
diff --git a/signoff/user_proj_example/metrics.csv b/signoff/user_proj_example/metrics.csv
new file mode 100644
index 0000000..0afd123
--- /dev/null
+++ b/signoff/user_proj_example/metrics.csv
@@ -0,0 +1,2 @@
+design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
+/opt/caravel_mpw8/openlane/user_proj_example,macro_10,22_12_28_20_16,flow completed,0h2m18s0ms,0h1m10s0ms,9728.395061728395,0.09,4377.777777777778,2.94,546.33,394,0,0,0,0,0,0,0,-1,0,-1,-1,10649,1918,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,6790346.0,0.0,3.13,2.4,0.37,0.0,-1,181,956,46,821,0,0,0,182,6,0,18,18,7,16,9,14,21,47,9,204,1508,0,1712,80146.8672,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10,AREA 0,10,45,1,153.6,153.18,0.7,0.3,sky130_fd_sc_hd,4
diff --git a/signoff/user_project_wrapper/metrics.csv b/signoff/user_project_wrapper/metrics.csv
new file mode 100644
index 0000000..9f33fb1
--- /dev/null
+++ b/signoff/user_project_wrapper/metrics.csv
@@ -0,0 +1,2 @@
+design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
+/opt/caravel_mpw8/openlane/user_project_wrapper,user_project_wrapper,22_12_28_20_48,flow completed,0h13m37s0ms,0h4m37s0ms,-2.0,-1,-1,-1,886.83,8,0,0,0,0,0,0,0,-1,0,-1,-1,4353365,23705,0.0,-1,-1,0.0,0.0,0.0,-1,-1,0.0,0.0,-1,0.0,6.52,14.42,4.59,11.23,-1,29,957,29,957,0,0,0,8,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,10173980.1536,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10,AREA 0,10,50,1,180,180,0.55,0.3,sky130_fd_sc_hd,0
