blob: ffec9621eab6a00efd8d8c8feeb53ce0e2f96123 [file] [log] [blame]
Project Chip ID is: 560418
Setting Project Chip ID to: 00088d22
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!