| ############################################################################### |
| # Created by write_sdc |
| # Wed Dec 21 00:44:19 2022 |
| ############################################################################### |
| current_design decrypt_aes128 |
| ############################################################################### |
| # Timing Constraints |
| ############################################################################### |
| create_clock -name clk -period 100.0000 [get_ports {clk}] |
| set_clock_transition 0.1500 [get_clocks {clk}] |
| set_clock_uncertainty 0.2500 clk |
| set_propagated_clock [get_clocks {clk}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {decReset}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[0]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[100]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[101]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[102]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[103]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[104]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[105]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[106]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[107]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[108]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[109]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[10]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[110]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[111]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[112]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[113]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[114]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[115]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[116]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[117]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[118]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[119]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[11]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[120]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[121]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[122]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[123]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[124]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[125]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[126]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[127]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[12]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[13]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[14]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[15]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[16]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[17]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[18]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[19]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[1]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[20]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[21]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[22]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[23]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[24]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[25]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[26]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[27]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[28]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[29]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[2]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[30]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[31]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[32]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[33]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[34]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[35]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[36]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[37]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[38]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[39]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[3]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[40]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[41]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[42]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[43]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[44]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[45]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[46]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[47]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[48]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[49]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[4]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[50]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[51]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[52]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[53]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[54]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[55]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[56]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[57]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[58]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[59]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[5]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[60]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[61]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[62]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[63]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[64]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[65]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[66]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[67]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[68]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[69]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[6]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[70]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[71]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[72]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[73]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[74]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[75]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[76]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[77]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[78]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[79]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[7]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[80]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[81]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[82]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[83]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[84]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[85]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[86]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[87]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[88]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[89]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[8]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[90]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[91]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[92]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[93]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[94]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[95]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[96]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[97]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[98]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[99]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {in[9]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[0]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[100]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[101]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[102]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[103]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[104]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[105]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[106]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[107]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[108]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[109]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[10]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[110]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[111]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[112]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[113]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[114]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[115]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[116]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[117]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[118]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[119]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[11]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[120]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[121]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[122]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[123]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[124]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[125]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[126]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[127]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[12]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[13]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[14]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[15]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[16]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[17]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[18]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[19]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[1]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[20]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[21]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[22]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[23]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[24]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[25]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[26]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[27]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[28]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[29]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[2]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[30]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[31]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[32]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[33]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[34]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[35]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[36]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[37]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[38]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[39]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[3]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[40]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[41]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[42]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[43]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[44]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[45]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[46]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[47]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[48]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[49]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[4]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[50]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[51]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[52]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[53]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[54]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[55]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[56]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[57]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[58]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[59]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[5]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[60]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[61]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[62]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[63]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[64]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[65]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[66]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[67]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[68]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[69]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[6]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[70]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[71]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[72]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[73]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[74]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[75]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[76]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[77]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[78]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[79]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[7]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[80]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[81]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[82]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[83]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[84]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[85]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[86]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[87]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[88]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[89]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[8]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[90]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[91]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[92]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[93]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[94]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[95]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[96]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[97]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[98]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[99]}] |
| set_input_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {key[9]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[0]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[100]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[101]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[102]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[103]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[104]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[105]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[106]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[107]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[108]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[109]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[10]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[110]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[111]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[112]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[113]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[114]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[115]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[116]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[117]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[118]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[119]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[11]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[120]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[121]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[122]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[123]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[124]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[125]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[126]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[127]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[12]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[13]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[14]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[15]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[16]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[17]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[18]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[19]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[1]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[20]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[21]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[22]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[23]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[24]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[25]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[26]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[27]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[28]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[29]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[2]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[30]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[31]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[32]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[33]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[34]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[35]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[36]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[37]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[38]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[39]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[3]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[40]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[41]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[42]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[43]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[44]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[45]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[46]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[47]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[48]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[49]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[4]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[50]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[51]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[52]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[53]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[54]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[55]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[56]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[57]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[58]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[59]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[5]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[60]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[61]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[62]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[63]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[64]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[65]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[66]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[67]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[68]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[69]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[6]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[70]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[71]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[72]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[73]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[74]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[75]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[76]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[77]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[78]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[79]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[7]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[80]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[81]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[82]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[83]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[84]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[85]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[86]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[87]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[88]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[89]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[8]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[90]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[91]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[92]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[93]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[94]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[95]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[96]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[97]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[98]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[99]}] |
| set_output_delay 20.0000 -clock [get_clocks {clk}] -add_delay [get_ports {out[9]}] |
| ############################################################################### |
| # Environment |
| ############################################################################### |
| set_load -pin_load 0.0334 [get_ports {out[127]}] |
| set_load -pin_load 0.0334 [get_ports {out[126]}] |
| set_load -pin_load 0.0334 [get_ports {out[125]}] |
| set_load -pin_load 0.0334 [get_ports {out[124]}] |
| set_load -pin_load 0.0334 [get_ports {out[123]}] |
| set_load -pin_load 0.0334 [get_ports {out[122]}] |
| set_load -pin_load 0.0334 [get_ports {out[121]}] |
| set_load -pin_load 0.0334 [get_ports {out[120]}] |
| set_load -pin_load 0.0334 [get_ports {out[119]}] |
| set_load -pin_load 0.0334 [get_ports {out[118]}] |
| set_load -pin_load 0.0334 [get_ports {out[117]}] |
| set_load -pin_load 0.0334 [get_ports {out[116]}] |
| set_load -pin_load 0.0334 [get_ports {out[115]}] |
| set_load -pin_load 0.0334 [get_ports {out[114]}] |
| set_load -pin_load 0.0334 [get_ports {out[113]}] |
| set_load -pin_load 0.0334 [get_ports {out[112]}] |
| set_load -pin_load 0.0334 [get_ports {out[111]}] |
| set_load -pin_load 0.0334 [get_ports {out[110]}] |
| set_load -pin_load 0.0334 [get_ports {out[109]}] |
| set_load -pin_load 0.0334 [get_ports {out[108]}] |
| set_load -pin_load 0.0334 [get_ports {out[107]}] |
| set_load -pin_load 0.0334 [get_ports {out[106]}] |
| set_load -pin_load 0.0334 [get_ports {out[105]}] |
| set_load -pin_load 0.0334 [get_ports {out[104]}] |
| set_load -pin_load 0.0334 [get_ports {out[103]}] |
| set_load -pin_load 0.0334 [get_ports {out[102]}] |
| set_load -pin_load 0.0334 [get_ports {out[101]}] |
| set_load -pin_load 0.0334 [get_ports {out[100]}] |
| set_load -pin_load 0.0334 [get_ports {out[99]}] |
| set_load -pin_load 0.0334 [get_ports {out[98]}] |
| set_load -pin_load 0.0334 [get_ports {out[97]}] |
| set_load -pin_load 0.0334 [get_ports {out[96]}] |
| set_load -pin_load 0.0334 [get_ports {out[95]}] |
| set_load -pin_load 0.0334 [get_ports {out[94]}] |
| set_load -pin_load 0.0334 [get_ports {out[93]}] |
| set_load -pin_load 0.0334 [get_ports {out[92]}] |
| set_load -pin_load 0.0334 [get_ports {out[91]}] |
| set_load -pin_load 0.0334 [get_ports {out[90]}] |
| set_load -pin_load 0.0334 [get_ports {out[89]}] |
| set_load -pin_load 0.0334 [get_ports {out[88]}] |
| set_load -pin_load 0.0334 [get_ports {out[87]}] |
| set_load -pin_load 0.0334 [get_ports {out[86]}] |
| set_load -pin_load 0.0334 [get_ports {out[85]}] |
| set_load -pin_load 0.0334 [get_ports {out[84]}] |
| set_load -pin_load 0.0334 [get_ports {out[83]}] |
| set_load -pin_load 0.0334 [get_ports {out[82]}] |
| set_load -pin_load 0.0334 [get_ports {out[81]}] |
| set_load -pin_load 0.0334 [get_ports {out[80]}] |
| set_load -pin_load 0.0334 [get_ports {out[79]}] |
| set_load -pin_load 0.0334 [get_ports {out[78]}] |
| set_load -pin_load 0.0334 [get_ports {out[77]}] |
| set_load -pin_load 0.0334 [get_ports {out[76]}] |
| set_load -pin_load 0.0334 [get_ports {out[75]}] |
| set_load -pin_load 0.0334 [get_ports {out[74]}] |
| set_load -pin_load 0.0334 [get_ports {out[73]}] |
| set_load -pin_load 0.0334 [get_ports {out[72]}] |
| set_load -pin_load 0.0334 [get_ports {out[71]}] |
| set_load -pin_load 0.0334 [get_ports {out[70]}] |
| set_load -pin_load 0.0334 [get_ports {out[69]}] |
| set_load -pin_load 0.0334 [get_ports {out[68]}] |
| set_load -pin_load 0.0334 [get_ports {out[67]}] |
| set_load -pin_load 0.0334 [get_ports {out[66]}] |
| set_load -pin_load 0.0334 [get_ports {out[65]}] |
| set_load -pin_load 0.0334 [get_ports {out[64]}] |
| set_load -pin_load 0.0334 [get_ports {out[63]}] |
| set_load -pin_load 0.0334 [get_ports {out[62]}] |
| set_load -pin_load 0.0334 [get_ports {out[61]}] |
| set_load -pin_load 0.0334 [get_ports {out[60]}] |
| set_load -pin_load 0.0334 [get_ports {out[59]}] |
| set_load -pin_load 0.0334 [get_ports {out[58]}] |
| set_load -pin_load 0.0334 [get_ports {out[57]}] |
| set_load -pin_load 0.0334 [get_ports {out[56]}] |
| set_load -pin_load 0.0334 [get_ports {out[55]}] |
| set_load -pin_load 0.0334 [get_ports {out[54]}] |
| set_load -pin_load 0.0334 [get_ports {out[53]}] |
| set_load -pin_load 0.0334 [get_ports {out[52]}] |
| set_load -pin_load 0.0334 [get_ports {out[51]}] |
| set_load -pin_load 0.0334 [get_ports {out[50]}] |
| set_load -pin_load 0.0334 [get_ports {out[49]}] |
| set_load -pin_load 0.0334 [get_ports {out[48]}] |
| set_load -pin_load 0.0334 [get_ports {out[47]}] |
| set_load -pin_load 0.0334 [get_ports {out[46]}] |
| set_load -pin_load 0.0334 [get_ports {out[45]}] |
| set_load -pin_load 0.0334 [get_ports {out[44]}] |
| set_load -pin_load 0.0334 [get_ports {out[43]}] |
| set_load -pin_load 0.0334 [get_ports {out[42]}] |
| set_load -pin_load 0.0334 [get_ports {out[41]}] |
| set_load -pin_load 0.0334 [get_ports {out[40]}] |
| set_load -pin_load 0.0334 [get_ports {out[39]}] |
| set_load -pin_load 0.0334 [get_ports {out[38]}] |
| set_load -pin_load 0.0334 [get_ports {out[37]}] |
| set_load -pin_load 0.0334 [get_ports {out[36]}] |
| set_load -pin_load 0.0334 [get_ports {out[35]}] |
| set_load -pin_load 0.0334 [get_ports {out[34]}] |
| set_load -pin_load 0.0334 [get_ports {out[33]}] |
| set_load -pin_load 0.0334 [get_ports {out[32]}] |
| set_load -pin_load 0.0334 [get_ports {out[31]}] |
| set_load -pin_load 0.0334 [get_ports {out[30]}] |
| set_load -pin_load 0.0334 [get_ports {out[29]}] |
| set_load -pin_load 0.0334 [get_ports {out[28]}] |
| set_load -pin_load 0.0334 [get_ports {out[27]}] |
| set_load -pin_load 0.0334 [get_ports {out[26]}] |
| set_load -pin_load 0.0334 [get_ports {out[25]}] |
| set_load -pin_load 0.0334 [get_ports {out[24]}] |
| set_load -pin_load 0.0334 [get_ports {out[23]}] |
| set_load -pin_load 0.0334 [get_ports {out[22]}] |
| set_load -pin_load 0.0334 [get_ports {out[21]}] |
| set_load -pin_load 0.0334 [get_ports {out[20]}] |
| set_load -pin_load 0.0334 [get_ports {out[19]}] |
| set_load -pin_load 0.0334 [get_ports {out[18]}] |
| set_load -pin_load 0.0334 [get_ports {out[17]}] |
| set_load -pin_load 0.0334 [get_ports {out[16]}] |
| set_load -pin_load 0.0334 [get_ports {out[15]}] |
| set_load -pin_load 0.0334 [get_ports {out[14]}] |
| set_load -pin_load 0.0334 [get_ports {out[13]}] |
| set_load -pin_load 0.0334 [get_ports {out[12]}] |
| set_load -pin_load 0.0334 [get_ports {out[11]}] |
| set_load -pin_load 0.0334 [get_ports {out[10]}] |
| set_load -pin_load 0.0334 [get_ports {out[9]}] |
| set_load -pin_load 0.0334 [get_ports {out[8]}] |
| set_load -pin_load 0.0334 [get_ports {out[7]}] |
| set_load -pin_load 0.0334 [get_ports {out[6]}] |
| set_load -pin_load 0.0334 [get_ports {out[5]}] |
| set_load -pin_load 0.0334 [get_ports {out[4]}] |
| set_load -pin_load 0.0334 [get_ports {out[3]}] |
| set_load -pin_load 0.0334 [get_ports {out[2]}] |
| set_load -pin_load 0.0334 [get_ports {out[1]}] |
| set_load -pin_load 0.0334 [get_ports {out[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {clk}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {decReset}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[127]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[126]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[125]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[124]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[123]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[122]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[121]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[120]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[119]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[118]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[117]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[116]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[115]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[114]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[113]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[112]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[111]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[110]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[109]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[108]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[107]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[106]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[105]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[104]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[103]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[102]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[101]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[100]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[99]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[98]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[97]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[96]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[95]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[94]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[93]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[92]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[91]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[90]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[89]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[88]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[87]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[86]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[85]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[84]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[83]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[82]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[81]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[80]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[79]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[78]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[77]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[76]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[75]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[74]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[73]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[72]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[71]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[70]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[69]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[68]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[67]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[66]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[65]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[64]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[63]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[62]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[61]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[60]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[59]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[58]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[57]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[56]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[55]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[54]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[53]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[52]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[51]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[50]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[49]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[48]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[47]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[46]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[45]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[44]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[43]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[42]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[41]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[40]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[39]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[38]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[37]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[36]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[35]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[34]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[33]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[32]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {in[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[127]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[126]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[125]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[124]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[123]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[122]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[121]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[120]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[119]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[118]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[117]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[116]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[115]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[114]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[113]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[112]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[111]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[110]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[109]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[108]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[107]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[106]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[105]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[104]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[103]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[102]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[101]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[100]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[99]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[98]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[97]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[96]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[95]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[94]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[93]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[92]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[91]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[90]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[89]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[88]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[87]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[86]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[85]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[84]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[83]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[82]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[81]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[80]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[79]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[78]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[77]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[76]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[75]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[74]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[73]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[72]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[71]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[70]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[69]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[68]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[67]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[66]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[65]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[64]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[63]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[62]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[61]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[60]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[59]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[58]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[57]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[56]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[55]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[54]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[53]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[52]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[51]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[50]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[49]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[48]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[47]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[46]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[45]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[44]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[43]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[42]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[41]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[40]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[39]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[38]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[37]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[36]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[35]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[34]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[33]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[32]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {key[0]}] |
| set_timing_derate -early 0.9500 |
| set_timing_derate -late 1.0500 |
| ############################################################################### |
| # Design Rules |
| ############################################################################### |
| set_max_fanout 10.0000 [current_design] |
