blob: 8c5bfb4fd0919b6c1cee27418af08275601ce71b [file] [log] [blame]
Project Chip ID is: 568808
Setting Project Chip ID to: 0008ade8
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!