blob: 4db00db246c2a064cce6864c87f19a9b40bc03ba [file] [log] [blame]
# name must be valid verilog module name set in scan_wrapper.v
project_urls = [
'https://github.com/mattvenn/wokwi-verilog-gds-test',
'https://github.com/mattvenn/animation_tinytapeout_demo',
'https://github.com/mattvenn/wokwi_inverters',
'https://github.com/wokwi/tiny-tapeout-test-simple',
'https://github.com/omerk/tinytapeout-demo1',
]