| v {xschem version=3.1.0 file_version=1.2 } |
| G {} |
| K {} |
| V {} |
| S {} |
| E {} |
| N 2460 -1200 2500 -1200 { |
| lab=col0} |
| N 2460 -1200 2460 -1110 { |
| lab=col0} |
| N 2420 -1240 2420 -1110 { |
| lab=col2} |
| N 2400 -1260 2400 -1110 { |
| lab=col3} |
| N 2380 -1280 2380 -1110 { |
| lab=col4} |
| N 2260 -1400 2260 -1110 { |
| lab=col10} |
| N 2240 -1420 2240 -1110 { |
| lab=col11} |
| N 2220 -1440 2220 -1110 { |
| lab=col12} |
| N 2200 -1460 2200 -1110 { |
| lab=col13} |
| N 2180 -1480 2180 -1110 { |
| lab=col14} |
| N 2440 -1220 2500 -1220 { |
| lab=col1} |
| N 2360 -1300 2360 -1110 { |
| lab=col5} |
| N 2340 -1320 2340 -1110 { |
| lab=col6} |
| N 2320 -1340 2320 -1110 { |
| lab=col7} |
| N 2300 -1360 2300 -1110 { |
| lab=col8} |
| N 2280 -1380 2280 -1110 { |
| lab=col9} |
| N 2160 -1500 2160 -1110 { |
| lab=col15} |
| N 2420 -1240 2500 -1240 { |
| lab=col2} |
| N 2400 -1260 2500 -1260 { |
| lab=col3} |
| N 2380 -1280 2500 -1280 { |
| lab=col4} |
| N 2360 -1300 2500 -1300 { |
| lab=col5} |
| N 2340 -1320 2500 -1320 { |
| lab=col6} |
| N 2320 -1340 2500 -1340 { |
| lab=col7} |
| N 2300 -1360 2500 -1360 { |
| lab=col8} |
| N 2280 -1380 2500 -1380 { |
| lab=col9} |
| N 2260 -1400 2500 -1400 { |
| lab=col10} |
| N 2240 -1420 2500 -1420 { |
| lab=col11} |
| N 2220 -1440 2500 -1440 { |
| lab=col12} |
| N 2200 -1460 2500 -1460 { |
| lab=col13} |
| N 2180 -1480 2500 -1480 { |
| lab=col14} |
| N 2160 -1500 2500 -1500 { |
| lab=col15} |
| N 2440 -1220 2440 -1110 { |
| lab=col1} |
| N 2000 -1520 2500 -1520 { |
| lab=vssd1} |
| N 2510 -610 2510 -510 { |
| lab=vdda1} |
| N 2530 -610 2530 -510 { |
| lab=vccd1} |
| N 2550 -610 2550 -510 { |
| lab=vssd1} |
| N 2490 -610 2490 -510 { |
| lab=Vcminus} |
| N 2470 -610 2470 -510 { |
| lab=Vcplus} |
| N 2450 -610 2450 -510 { |
| lab=Vref} |
| N 2130 -610 2130 -510 { |
| lab=col0} |
| N 2150 -610 2150 -510 { |
| lab=col1} |
| N 2170 -610 2170 -510 { |
| lab=col2} |
| N 2190 -610 2190 -510 { |
| lab=col3} |
| N 2210 -610 2210 -510 { |
| lab=col4} |
| N 2230 -610 2230 -510 { |
| lab=col5} |
| N 2250 -610 2250 -510 { |
| lab=col6} |
| N 2270 -610 2270 -510 { |
| lab=col7} |
| N 2290 -610 2290 -510 { |
| lab=col8} |
| N 2310 -610 2310 -510 { |
| lab=col9} |
| N 2330 -610 2330 -510 { |
| lab=col10} |
| N 2350 -610 2350 -510 { |
| lab=col11} |
| N 2370 -610 2370 -510 { |
| lab=col12} |
| N 2390 -610 2390 -510 { |
| lab=col13} |
| N 2410 -610 2410 -510 { |
| lab=col14} |
| N 2430 -610 2430 -510 { |
| lab=col15} |
| N 2000 -2160 2500 -2160 { |
| lab=WL_out15} |
| N 2000 -2140 2500 -2140 { |
| lab=row15} |
| N 2000 -2120 2500 -2120 { |
| lab=WL_out14} |
| N 2000 -2100 2500 -2100 { |
| lab=row14} |
| N 2000 -2080 2500 -2080 { |
| lab=WL_out13} |
| N 2000 -2060 2500 -2060 { |
| lab=row13} |
| N 2000 -2040 2500 -2040 { |
| lab=WL_out12} |
| N 2000 -2020 2500 -2020 { |
| lab=row12} |
| N 2000 -2000 2500 -2000 { |
| lab=WL_out11} |
| N 2000 -1980 2500 -1980 { |
| lab=row11} |
| N 2000 -1960 2500 -1960 { |
| lab=WL_out10} |
| N 2000 -1940 2500 -1940 { |
| lab=row10} |
| N 2000 -1920 2500 -1920 { |
| lab=WL_out9} |
| N 2000 -1900 2500 -1900 { |
| lab=row9} |
| N 2000 -1880 2500 -1880 { |
| lab=WL_out8} |
| N 2000 -1860 2500 -1860 { |
| lab=row8} |
| N 2000 -1840 2500 -1840 { |
| lab=WL_out7} |
| N 2000 -1820 2500 -1820 { |
| lab=row7} |
| N 2000 -1800 2500 -1800 { |
| lab=WL_out6} |
| N 2000 -1780 2500 -1780 { |
| lab=row6} |
| N 2000 -1760 2500 -1760 { |
| lab=WL_out5} |
| N 2000 -1740 2500 -1740 { |
| lab=row5} |
| N 2000 -1720 2500 -1720 { |
| lab=WL_out4} |
| N 2000 -1700 2500 -1700 { |
| lab=row4} |
| N 2000 -1680 2500 -1680 { |
| lab=WL_out3} |
| N 2000 -1660 2500 -1660 { |
| lab=row3} |
| N 2000 -1640 2500 -1640 { |
| lab=WL_out2} |
| N 2000 -1620 2500 -1620 { |
| lab=row2} |
| N 2000 -1600 2500 -1600 { |
| lab=WL_out1} |
| N 2000 -1580 2500 -1580 { |
| lab=row1} |
| N 2000 -1560 2500 -1560 { |
| lab=WL_out0} |
| N 2000 -1540 2500 -1540 { |
| lab=row0} |
| N 1390 -2050 1490 -2050 { |
| lab=vccd1} |
| N 1390 -1950 1490 -1950 { |
| lab=vdda1} |
| N 1390 -2030 1490 -2030 { |
| lab=Vref} |
| N 1390 -2010 1490 -2010 { |
| lab=Vrminus} |
| N 1390 -1990 1490 -1990 { |
| lab=Vrplus} |
| N 1390 -1970 1490 -1970 { |
| lab=vssd1} |
| N 1390 -2070 1490 -2070 { |
| lab=Vsample} |
| N 990 -2290 1090 -2290 { |
| lab=SAMPLE_3.3} |
| N 990 -2310 1090 -2310 { |
| lab=SAMPLEb_3.3} |
| N 990 -2330 1090 -2330 { |
| lab=WR_3.3} |
| N 990 -2350 1090 -2350 { |
| lab=Vgpr} |
| N 990 -2370 1090 -2370 { |
| lab=Vgnr} |
| N 1390 -2270 1490 -2270 { |
| lab=row9} |
| N 1390 -2310 1490 -2310 { |
| lab=row11} |
| N 1390 -2330 1490 -2330 { |
| lab=row12} |
| N 1390 -2250 1490 -2250 { |
| lab=row8} |
| N 1390 -2230 1490 -2230 { |
| lab=row7} |
| N 1390 -2210 1490 -2210 { |
| lab=row6} |
| N 1390 -2290 1490 -2290 { |
| lab=row10} |
| N 1390 -2190 1490 -2190 { |
| lab=row5} |
| N 1390 -2170 1490 -2170 { |
| lab=row4} |
| N 1390 -2150 1490 -2150 { |
| lab=row3} |
| N 1390 -2130 1490 -2130 { |
| lab=row2} |
| N 1390 -2110 1490 -2110 { |
| lab=row1} |
| N 1390 -2090 1490 -2090 { |
| lab=row0} |
| N 1390 -2370 1490 -2370 { |
| lab=row14} |
| N 1390 -2390 1490 -2390 { |
| lab=row15} |
| N 1390 -2350 1490 -2350 { |
| lab=row13} |
| N 1030 -1630 1090 -1630 { |
| lab=A0r} |
| N 1030 -1650 1090 -1650 { |
| lab=B0r} |
| N 1030 -1670 1090 -1670 { |
| lab=A1r} |
| N 1030 -1690 1090 -1690 { |
| lab=B1r} |
| N 1030 -1710 1090 -1710 { |
| lab=A2r} |
| N 1030 -1730 1090 -1730 { |
| lab=B2r} |
| N 1030 -1750 1090 -1750 { |
| lab=A3r} |
| N 1030 -1770 1090 -1770 { |
| lab=B3r} |
| N 1030 -1790 1090 -1790 { |
| lab=A4r} |
| N 1030 -1810 1090 -1810 { |
| lab=B4r} |
| N 1030 -1830 1090 -1830 { |
| lab=A5r} |
| N 1030 -1850 1090 -1850 { |
| lab=B5r} |
| N 1030 -1870 1090 -1870 { |
| lab=A6r} |
| N 1030 -1890 1090 -1890 { |
| lab=B6r} |
| N 1030 -1910 1090 -1910 { |
| lab=A7r} |
| N 1030 -1930 1090 -1930 { |
| lab=B7r} |
| N 1030 -1950 1090 -1950 { |
| lab=A8r} |
| N 1030 -1970 1090 -1970 { |
| lab=B8r} |
| N 1030 -1990 1090 -1990 { |
| lab=A9r} |
| N 1030 -2010 1090 -2010 { |
| lab=B9r} |
| N 1030 -2030 1090 -2030 { |
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| N 1030 -2050 1090 -2050 { |
| lab=B10r} |
| N 1030 -2070 1090 -2070 { |
| lab=A11r} |
| N 1030 -2090 1090 -2090 { |
| lab=B11r} |
| N 1030 -2110 1090 -2110 { |
| lab=A12r} |
| N 1030 -2130 1090 -2130 { |
| lab=B12r} |
| N 1030 -2150 1090 -2150 { |
| lab=A13r} |
| N 1030 -2170 1090 -2170 { |
| lab=B13r} |
| N 1030 -2190 1090 -2190 { |
| lab=A14r} |
| N 1030 -2210 1090 -2210 { |
| lab=B14r} |
| N 1030 -2230 1090 -2230 { |
| lab=A15r} |
| N 1700 -1810 1800 -1810 { |
| lab=Vsample} |
| N 1700 -1790 1800 -1790 { |
| lab=vssd1} |
| N 990 -2270 1090 -2270 { |
| lab=WRb_3.3} |
| N 1030 -2250 1090 -2250 { |
| lab=B15r} |
| N 990 -2390 1090 -2390 { |
| lab=SEL} |
| N 2130 -210 2130 -150 { |
| lab=A0c} |
| N 2150 -210 2150 -150 { |
| lab=B0c} |
| N 2170 -210 2170 -150 { |
| lab=A1c} |
| N 2190 -210 2190 -150 { |
| lab=B1c} |
| N 2210 -210 2210 -150 { |
| lab=A2c} |
| N 2230 -210 2230 -150 { |
| lab=B2c} |
| N 2250 -210 2250 -150 { |
| lab=A3c} |
| N 2270 -210 2270 -150 { |
| lab=B3c} |
| N 2290 -210 2290 -150 { |
| lab=A4c} |
| N 2310 -210 2310 -150 { |
| lab=B4c} |
| N 2330 -210 2330 -150 { |
| lab=A5c} |
| N 2350 -210 2350 -150 { |
| lab=B5c} |
| N 2370 -210 2370 -150 { |
| lab=A6c} |
| N 2390 -210 2390 -150 { |
| lab=B6c} |
| N 2410 -210 2410 -150 { |
| lab=A7c} |
| N 2430 -210 2430 -150 { |
| lab=B7c} |
| N 2450 -210 2450 -150 { |
| lab=A8c} |
| N 2470 -210 2470 -150 { |
| lab=B8c} |
| N 2490 -210 2490 -150 { |
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| N 2510 -210 2510 -150 { |
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| N 2530 -210 2530 -150 { |
| lab=A10c} |
| N 2550 -210 2550 -150 { |
| lab=B10c} |
| N 2570 -210 2570 -150 { |
| lab=A11c} |
| N 2590 -210 2590 -150 { |
| lab=B11c} |
| N 2610 -210 2610 -150 { |
| lab=A12c} |
| N 2630 -210 2630 -150 { |
| lab=B12c} |
| N 2650 -210 2650 -150 { |
| lab=A13c} |
| N 2670 -210 2670 -150 { |
| lab=B13c} |
| N 2690 -210 2690 -150 { |
| lab=A14c} |
| N 2710 -210 2710 -150 { |
| lab=B14c} |
| N 2730 -210 2730 -150 { |
| lab=A15c} |
| N 2750 -210 2750 -150 { |
| lab=B15c} |
| N 2770 -210 2770 -150 { |
| lab=SEL} |
| N 1390 -1500 1490 -1500 { |
| lab=vccd1} |
| N 1390 -1520 1490 -1520 { |
| lab=vdda1} |
| N 1390 -1480 1490 -1480 { |
| lab=vssd1} |
| N 1030 -1200 1090 -1200 { |
| lab=SEL} |
| N 1030 -1220 1090 -1220 { |
| lab=WL0} |
| N 1030 -1240 1090 -1240 { |
| lab=WL1} |
| N 1030 -1260 1090 -1260 { |
| lab=WL2} |
| N 1030 -1280 1090 -1280 { |
| lab=WL3} |
| N 1030 -1300 1090 -1300 { |
| lab=WL4} |
| N 1030 -1320 1090 -1320 { |
| lab=WL5} |
| N 1030 -1340 1090 -1340 { |
| lab=WL6} |
| N 1030 -1360 1090 -1360 { |
| lab=WL7} |
| N 1030 -1380 1090 -1380 { |
| lab=WL8} |
| N 1030 -1400 1090 -1400 { |
| lab=WL9} |
| N 1030 -1420 1090 -1420 { |
| lab=WL10} |
| N 1030 -1440 1090 -1440 { |
| lab=WL11} |
| N 1030 -1460 1090 -1460 { |
| lab=WL12} |
| N 1030 -1480 1090 -1480 { |
| lab=WL13} |
| N 1030 -1500 1090 -1500 { |
| lab=WL14} |
| N 1030 -1520 1090 -1520 { |
| lab=WL15} |
| N 1390 -1440 1490 -1440 { |
| lab=WL_out14} |
| N 1390 -1460 1490 -1460 { |
| lab=WL_out15} |
| N 1390 -1420 1490 -1420 { |
| lab=WL_out13} |
| N 1390 -1400 1490 -1400 { |
| lab=WL_out12} |
| N 1390 -1360 1490 -1360 { |
| lab=WL_out10} |
| N 1390 -1380 1490 -1380 { |
| lab=WL_out11} |
| N 1390 -1340 1490 -1340 { |
| lab=WL_out9} |
| N 1390 -1320 1490 -1320 { |
| lab=WL_out8} |
| N 1390 -1280 1490 -1280 { |
| lab=WL_out6} |
| N 1390 -1300 1490 -1300 { |
| lab=WL_out7} |
| N 1390 -1260 1490 -1260 { |
| lab=WL_out5} |
| N 1390 -1240 1490 -1240 { |
| lab=WL_out4} |
| N 1390 -1200 1490 -1200 { |
| lab=WL_out2} |
| N 1390 -1220 1490 -1220 { |
| lab=WL_out3} |
| N 1390 -1180 1490 -1180 { |
| lab=WL_out1} |
| N 1390 -1160 1490 -1160 { |
| lab=WL_out0} |
| N 310 -2360 410 -2360 { |
| lab=WR} |
| N 310 -2190 410 -2190 { |
| lab=SAMPLE} |
| N 310 -2340 410 -2340 { |
| lab=SEL} |
| N 310 -2170 410 -2170 { |
| lab=SEL} |
| N 400 -2530 510 -2530 { |
| lab=row_sel} |
| N 400 -2490 510 -2490 { |
| lab=col_sel} |
| N 630 -2510 750 -2510 { |
| lab=SEL} |
| N 1340 -850 1430 -850 { |
| lab=phi1} |
| N 1340 -830 1430 -830 { |
| lab=phi1b} |
| N 1340 -810 1430 -810 { |
| lab=Vsample} |
| N 1340 -790 1430 -790 { |
| lab=Vref_comp} |
| N 1730 -850 1790 -850 { |
| lab=vccd1} |
| N 1730 -830 1790 -830 { |
| lab=vssd1} |
| N 1730 -810 1790 -810 { |
| lab=#net1} |
| N 760 -830 810 -830 { |
| lab=RISC_CLK} |
| N 890 -830 970 -830 { |
| lab=phi1b} |
| N 1050 -830 1120 -830 { |
| lab=phi1} |
| N 2250 -810 2330 -810 { |
| lab=vssd1} |
| N 2250 -790 2320 -790 { |
| lab=latch_high} |
| N 1790 -810 1950 -810 { |
| lab=#net1} |
| N 2250 -830 2330 -830 { |
| lab=vccd1} |
| C {devices/iopin.sym} 2510 -610 3 0 {name=p1 lab=vdda1} |
| C {devices/iopin.sym} 2550 -610 1 1 {name=p2 lab=vssd1} |
| C {devices/ipin.sym} 2450 -610 1 0 {name=p5 lab=Vref} |
| C {devices/ipin.sym} 2470 -610 1 0 {name=p6 lab=Vcplus} |
| C {devices/ipin.sym} 2490 -610 1 0 {name=p7 lab=Vcminus} |
| C {devices/lab_pin.sym} 2130 -610 1 0 {name=l1 sig_type=std_logic lab=col0} |
| C {1T1R_16x16.sym} 2650 -1680 0 1 {name=x1} |
| C {devices/lab_pin.sym} 2460 -1110 1 1 {name=l17 sig_type=std_logic lab=col0} |
| C {devices/lab_pin.sym} 2440 -1110 3 0 {name=l18 sig_type=std_logic lab=col1} |
| C {devices/lab_pin.sym} 2420 -1110 1 1 {name=l19 sig_type=std_logic lab=col2} |
| C {devices/lab_pin.sym} 2400 -1110 3 0 {name=l20 sig_type=std_logic lab=col3} |
| C {devices/lab_pin.sym} 2380 -1110 1 1 {name=l21 sig_type=std_logic lab=col4} |
| C {devices/lab_pin.sym} 2360 -1110 1 1 {name=l22 sig_type=std_logic lab=col5} |
| C {devices/lab_pin.sym} 2340 -1110 1 1 {name=l23 sig_type=std_logic lab=col6} |
| C {devices/lab_pin.sym} 2320 -1110 1 1 {name=l24 sig_type=std_logic lab=col7} |
| C {devices/lab_pin.sym} 2300 -1110 1 1 {name=l25 sig_type=std_logic lab=col8} |
| C {devices/lab_pin.sym} 2280 -1110 1 1 {name=l26 sig_type=std_logic lab=col9} |
| C {devices/lab_pin.sym} 2260 -1110 1 1 {name=l27 sig_type=std_logic lab=col10} |
| C {devices/lab_pin.sym} 2240 -1110 1 1 {name=l28 sig_type=std_logic lab=col11} |
| C {devices/lab_pin.sym} 2220 -1110 1 1 {name=l29 sig_type=std_logic lab=col12} |
| C {devices/lab_pin.sym} 2200 -1110 1 1 {name=l30 sig_type=std_logic lab=col13} |
| C {devices/lab_pin.sym} 2180 -1110 1 1 {name=l31 sig_type=std_logic lab=col14} |
| C {devices/lab_pin.sym} 2160 -1110 1 1 {name=l32 sig_type=std_logic lab=col15} |
| C {col_drivers_1x16.sym} 2450 -360 3 0 {name=x133} |
| C {devices/iopin.sym} 2530 -610 3 0 {name=p3 lab=vccd1} |
| C {devices/lab_pin.sym} 2150 -610 1 0 {name=l34 sig_type=std_logic lab=col1} |
| C {devices/lab_pin.sym} 2170 -610 1 0 {name=l35 sig_type=std_logic lab=col2} |
| C {devices/lab_pin.sym} 2190 -610 1 0 {name=l36 sig_type=std_logic lab=col3} |
| C {devices/lab_pin.sym} 2210 -610 1 0 {name=l37 sig_type=std_logic lab=col4} |
| C {devices/lab_pin.sym} 2230 -610 1 0 {name=l38 sig_type=std_logic lab=col5} |
| C {devices/lab_pin.sym} 2250 -610 1 0 {name=l2 sig_type=std_logic lab=col6} |
| C {devices/lab_pin.sym} 2270 -610 1 0 {name=l3 sig_type=std_logic lab=col7} |
| C {devices/lab_pin.sym} 2290 -610 1 0 {name=l4 sig_type=std_logic lab=col8} |
| C {devices/lab_pin.sym} 2310 -610 1 0 {name=l5 sig_type=std_logic lab=col9} |
| C {devices/lab_pin.sym} 2330 -610 1 0 {name=l6 sig_type=std_logic lab=col10} |
| C {devices/lab_pin.sym} 2350 -610 1 0 {name=l7 sig_type=std_logic lab=col11} |
| C {devices/lab_pin.sym} 2370 -610 1 0 {name=l8 sig_type=std_logic lab=col12} |
| C {devices/lab_pin.sym} 2390 -610 1 0 {name=l9 sig_type=std_logic lab=col13} |
| C {devices/lab_pin.sym} 2410 -610 1 0 {name=l10 sig_type=std_logic lab=col14} |
| C {devices/lab_pin.sym} 2430 -610 1 0 {name=l11 sig_type=std_logic lab=col15} |
| C {row_drivers_16x1.sym} 1240 -2010 0 0 {name=x2} |
| C {devices/lab_pin.sym} 2000 -1540 2 1 {name=l247 sig_type=std_logic lab=row0} |
| C {devices/lab_pin.sym} 2000 -1580 2 1 {name=l248 sig_type=std_logic lab=row1} |
| C {devices/lab_pin.sym} 2000 -1620 2 1 {name=l249 sig_type=std_logic lab=row2} |
| C {devices/lab_pin.sym} 2000 -1660 2 1 {name=l250 sig_type=std_logic lab=row3} |
| C {devices/lab_pin.sym} 2000 -1700 2 1 {name=l251 sig_type=std_logic lab=row4} |
| C {devices/lab_pin.sym} 2000 -1740 2 1 {name=l252 sig_type=std_logic lab=row5} |
| C {devices/lab_pin.sym} 2000 -1780 2 1 {name=l253 sig_type=std_logic lab=row6} |
| C {devices/lab_pin.sym} 2000 -1820 2 1 {name=l254 sig_type=std_logic lab=row7} |
| C {devices/lab_pin.sym} 2000 -1860 2 1 {name=l255 sig_type=std_logic lab=row8} |
| C {devices/lab_pin.sym} 2000 -1900 2 1 {name=l256 sig_type=std_logic lab=row9} |
| C {devices/lab_pin.sym} 2000 -1940 2 1 {name=l257 sig_type=std_logic lab=row10} |
| C {devices/lab_pin.sym} 2000 -1980 2 1 {name=l258 sig_type=std_logic lab=row11} |
| C {devices/lab_pin.sym} 2000 -2020 2 1 {name=l259 sig_type=std_logic lab=row12} |
| C {devices/lab_pin.sym} 2000 -2060 2 1 {name=l260 sig_type=std_logic lab=row13} |
| C {devices/lab_pin.sym} 2000 -2100 2 1 {name=l261 sig_type=std_logic lab=row14} |
| C {devices/lab_pin.sym} 2000 -2140 2 1 {name=l262 sig_type=std_logic lab=row15} |
| C {devices/ipin.sym} 1490 -1990 2 0 {name=p11 lab=Vrplus} |
| C {devices/ipin.sym} 1490 -2010 2 0 {name=p17 lab=Vrminus} |
| C {devices/lab_pin.sym} 1490 -1970 2 0 {name=l13 sig_type=std_logic lab=vssd1} |
| C {devices/lab_pin.sym} 1490 -2050 2 0 {name=l14 sig_type=std_logic lab=vccd1} |
| C {devices/lab_pin.sym} 1490 -1950 2 0 {name=l15 sig_type=std_logic lab=vdda1} |
| C {devices/lab_pin.sym} 1490 -2030 2 0 {name=l16 sig_type=std_logic lab=Vref} |
| C {devices/ipin.sym} 990 -2350 0 0 {name=p21 lab=Vgpr} |
| C {devices/lab_pin.sym} 1490 -2090 2 0 {name=l39 sig_type=std_logic lab=row0} |
| C {devices/lab_pin.sym} 1490 -2110 2 0 {name=l40 sig_type=std_logic lab=row1} |
| C {devices/lab_pin.sym} 1490 -2130 2 0 {name=l41 sig_type=std_logic lab=row2} |
| C {devices/lab_pin.sym} 1490 -2150 2 0 {name=l42 sig_type=std_logic lab=row3} |
| C {devices/lab_pin.sym} 1490 -2170 2 0 {name=l43 sig_type=std_logic lab=row4} |
| C {devices/lab_pin.sym} 1490 -2190 2 0 {name=l44 sig_type=std_logic lab=row5} |
| C {devices/lab_pin.sym} 1490 -2210 2 0 {name=l45 sig_type=std_logic lab=row6} |
| C {devices/lab_pin.sym} 1490 -2230 2 0 {name=l46 sig_type=std_logic lab=row7} |
| C {devices/lab_pin.sym} 1490 -2250 2 0 {name=l47 sig_type=std_logic lab=row8} |
| C {devices/lab_pin.sym} 1490 -2270 2 0 {name=l48 sig_type=std_logic lab=row9} |
| C {devices/lab_pin.sym} 1490 -2290 2 0 {name=l49 sig_type=std_logic lab=row10} |
| C {devices/lab_pin.sym} 1490 -2310 2 0 {name=l50 sig_type=std_logic lab=row11} |
| C {devices/lab_pin.sym} 1490 -2330 2 0 {name=l51 sig_type=std_logic lab=row12} |
| C {devices/lab_pin.sym} 1490 -2350 2 0 {name=l52 sig_type=std_logic lab=row13} |
| C {devices/lab_pin.sym} 1490 -2370 2 0 {name=l53 sig_type=std_logic lab=row14} |
| C {devices/lab_pin.sym} 1490 -2390 2 0 {name=l54 sig_type=std_logic lab=row15} |
| C {devices/ipin.sym} 1030 -1630 2 1 {name=p22 sig_type=std_logic lab=A0r} |
| C {devices/ipin.sym} 1030 -1670 2 1 {name=p23 sig_type=std_logic lab=A1r} |
| C {devices/ipin.sym} 1030 -1710 2 1 {name=p24 sig_type=std_logic lab=A2r} |
| C {devices/ipin.sym} 1030 -1750 2 1 {name=p25 sig_type=std_logic lab=A3r} |
| C {devices/ipin.sym} 1030 -1790 2 1 {name=p26 sig_type=std_logic lab=A4r} |
| C {devices/ipin.sym} 1030 -1830 2 1 {name=p27 sig_type=std_logic lab=A5r} |
| C {devices/ipin.sym} 1030 -1870 2 1 {name=p28 sig_type=std_logic lab=A6r} |
| C {devices/ipin.sym} 1030 -1910 2 1 {name=p29 sig_type=std_logic lab=A7r} |
| C {devices/ipin.sym} 1030 -1950 2 1 {name=p30 sig_type=std_logic lab=A8r} |
| C {devices/ipin.sym} 1030 -1990 2 1 {name=p31 sig_type=std_logic lab=A9r} |
| C {devices/ipin.sym} 1030 -2030 2 1 {name=p32 sig_type=std_logic lab=A10r} |
| C {devices/ipin.sym} 1030 -2070 2 1 {name=p33 sig_type=std_logic lab=A11r} |
| C {devices/ipin.sym} 1030 -2110 2 1 {name=p34 sig_type=std_logic lab=A12r} |
| C {devices/ipin.sym} 1030 -2150 2 1 {name=p35 sig_type=std_logic lab=A13r} |
| C {devices/ipin.sym} 1030 -2190 2 1 {name=p36 sig_type=std_logic lab=A14r} |
| C {devices/ipin.sym} 1030 -2230 2 1 {name=p37 sig_type=std_logic lab=A15r} |
| C {devices/ipin.sym} 1030 -1650 2 1 {name=p38 sig_type=std_logic lab=B0r} |
| C {devices/ipin.sym} 1030 -1690 2 1 {name=p59 sig_type=std_logic lab=B1r} |
| C {devices/ipin.sym} 1030 -1730 2 1 {name=p66 sig_type=std_logic lab=B2r} |
| C {devices/ipin.sym} 1030 -1770 2 1 {name=p67 sig_type=std_logic lab=B3r} |
| C {devices/ipin.sym} 1030 -1810 2 1 {name=p68 sig_type=std_logic lab=B4r} |
| C {devices/ipin.sym} 1030 -1850 2 1 {name=p69 sig_type=std_logic lab=B5r} |
| C {devices/ipin.sym} 1030 -1890 2 1 {name=p70 sig_type=std_logic lab=B6r} |
| C {devices/ipin.sym} 1030 -1930 2 1 {name=p71 sig_type=std_logic lab=B7r} |
| C {devices/ipin.sym} 1030 -1970 2 1 {name=p72 sig_type=std_logic lab=B8r} |
| C {devices/ipin.sym} 1030 -2050 2 1 {name=p73 sig_type=std_logic lab=B10r} |
| C {devices/ipin.sym} 1030 -2090 2 1 {name=p74 sig_type=std_logic lab=B11r} |
| C {devices/ipin.sym} 1030 -2130 2 1 {name=p75 sig_type=std_logic lab=B12r} |
| C {devices/ipin.sym} 1030 -2170 2 1 {name=p76 sig_type=std_logic lab=B13r} |
| C {devices/ipin.sym} 1030 -2210 2 1 {name=p77 sig_type=std_logic lab=B14r} |
| C {devices/ipin.sym} 1030 -2250 2 1 {name=p19 sig_type=std_logic lab=B15r} |
| C {devices/ipin.sym} 1030 -2010 2 1 {name=p79 sig_type=std_logic lab=B9r} |
| C {mimcap_stacked_57x50.sym} 1550 -1800 0 0 {name=x3} |
| C {devices/lab_pin.sym} 1490 -2070 2 0 {name=l55 sig_type=std_logic lab=Vsample} |
| C {devices/lab_pin.sym} 1800 -1810 2 0 {name=l56 sig_type=std_logic lab=Vsample} |
| C {devices/lab_pin.sym} 1800 -1790 2 0 {name=l57 sig_type=std_logic lab=vssd1} |
| C {devices/ipin.sym} 990 -2370 0 0 {name=p8 lab=Vgnr} |
| C {devices/ipin.sym} 2130 -150 1 1 {name=p80 sig_type=std_logic lab=A0c} |
| C {devices/ipin.sym} 2170 -150 1 1 {name=p81 sig_type=std_logic lab=A1c} |
| C {devices/ipin.sym} 2210 -150 1 1 {name=p82 sig_type=std_logic lab=A2c} |
| C {devices/ipin.sym} 2250 -150 1 1 {name=p83 sig_type=std_logic lab=A3c} |
| C {devices/ipin.sym} 2290 -150 1 1 {name=p84 sig_type=std_logic lab=A4c} |
| C {devices/ipin.sym} 2330 -150 1 1 {name=p85 sig_type=std_logic lab=A5c} |
| C {devices/ipin.sym} 2370 -150 1 1 {name=p86 sig_type=std_logic lab=A6c} |
| C {devices/ipin.sym} 2410 -150 1 1 {name=p87 sig_type=std_logic lab=A7c} |
| C {devices/ipin.sym} 2450 -150 1 1 {name=p88 sig_type=std_logic lab=A8c} |
| C {devices/ipin.sym} 2490 -150 1 1 {name=p89 sig_type=std_logic lab=A9c} |
| C {devices/ipin.sym} 2530 -150 1 1 {name=p90 sig_type=std_logic lab=A10c} |
| C {devices/ipin.sym} 2570 -150 1 1 {name=p91 sig_type=std_logic lab=A11c} |
| C {devices/ipin.sym} 2610 -150 1 1 {name=p92 sig_type=std_logic lab=A12c} |
| C {devices/ipin.sym} 2650 -150 1 1 {name=p93 sig_type=std_logic lab=A13c} |
| C {devices/ipin.sym} 2690 -150 1 1 {name=p94 sig_type=std_logic lab=A14c} |
| C {devices/ipin.sym} 2730 -150 1 1 {name=p95 sig_type=std_logic lab=A15c} |
| C {devices/ipin.sym} 2150 -150 1 1 {name=p96 sig_type=std_logic lab=B0c} |
| C {devices/ipin.sym} 2190 -150 1 1 {name=p97 sig_type=std_logic lab=B1c} |
| C {devices/ipin.sym} 2230 -150 1 1 {name=p98 sig_type=std_logic lab=B2c} |
| C {devices/ipin.sym} 2270 -150 1 1 {name=p99 sig_type=std_logic lab=B3c} |
| C {devices/ipin.sym} 2310 -150 1 1 {name=p100 sig_type=std_logic lab=B4c} |
| C {devices/ipin.sym} 2350 -150 1 1 {name=p101 sig_type=std_logic lab=B5c} |
| C {devices/ipin.sym} 2390 -150 1 1 {name=p102 sig_type=std_logic lab=B6c} |
| C {devices/ipin.sym} 2430 -150 1 1 {name=p103 sig_type=std_logic lab=B7c} |
| C {devices/ipin.sym} 2470 -150 1 1 {name=p104 sig_type=std_logic lab=B8c} |
| C {devices/ipin.sym} 2550 -150 1 1 {name=p105 sig_type=std_logic lab=B10c} |
| C {devices/ipin.sym} 2590 -150 1 1 {name=p106 sig_type=std_logic lab=B11c} |
| C {devices/ipin.sym} 2630 -150 1 1 {name=p107 sig_type=std_logic lab=B12c} |
| C {devices/ipin.sym} 2670 -150 1 1 {name=p108 sig_type=std_logic lab=B13c} |
| C {devices/ipin.sym} 2710 -150 1 1 {name=p109 sig_type=std_logic lab=B14c} |
| C {devices/ipin.sym} 2750 -150 1 1 {name=p110 sig_type=std_logic lab=B15c} |
| C {devices/ipin.sym} 2510 -150 1 1 {name=p111 sig_type=std_logic lab=B9c} |
| C {devices/lab_pin.sym} 2770 -150 3 0 {name=l58 sig_type=std_logic lab=SEL} |
| C {WL_drivers_16x1.sym} 1240 -1340 0 0 {name=x4} |
| C {devices/lab_pin.sym} 1490 -1480 2 0 {name=l75 sig_type=std_logic lab=vssd1} |
| C {devices/lab_pin.sym} 1490 -1500 2 0 {name=l76 sig_type=std_logic lab=vccd1} |
| C {devices/lab_pin.sym} 1490 -1520 2 0 {name=l77 sig_type=std_logic lab=vdda1} |
| C {devices/ipin.sym} 1030 -1220 2 1 {name=p4 sig_type=std_logic lab=WL0} |
| C {devices/lab_pin.sym} 1030 -1200 0 0 {name=l78 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 1490 -1460 0 1 {name=l79 sig_type=std_logic lab=WL_out15} |
| C {devices/lab_pin.sym} 2000 -2160 2 1 {name=l59 sig_type=std_logic lab=WL_out15} |
| C {devices/lab_pin.sym} 2000 -2120 2 1 {name=l60 sig_type=std_logic lab=WL_out14} |
| C {devices/lab_pin.sym} 2000 -2080 2 1 {name=l61 sig_type=std_logic lab=WL_out13} |
| C {devices/lab_pin.sym} 2000 -2040 2 1 {name=l62 sig_type=std_logic lab=WL_out12} |
| C {devices/lab_pin.sym} 2000 -2000 2 1 {name=l63 sig_type=std_logic lab=WL_out11} |
| C {devices/lab_pin.sym} 2000 -1960 2 1 {name=l64 sig_type=std_logic lab=WL_out10} |
| C {devices/lab_pin.sym} 2000 -1920 2 1 {name=l65 sig_type=std_logic lab=WL_out9} |
| C {devices/lab_pin.sym} 2000 -1880 2 1 {name=l66 sig_type=std_logic lab=WL_out8} |
| C {devices/lab_pin.sym} 2000 -1840 2 1 {name=l67 sig_type=std_logic lab=WL_out7} |
| C {devices/lab_pin.sym} 2000 -1800 2 1 {name=l68 sig_type=std_logic lab=WL_out6} |
| C {devices/lab_pin.sym} 2000 -1760 2 1 {name=l69 sig_type=std_logic lab=WL_out5} |
| C {devices/lab_pin.sym} 2000 -1720 2 1 {name=l70 sig_type=std_logic lab=WL_out4} |
| C {devices/lab_pin.sym} 2000 -1680 2 1 {name=l71 sig_type=std_logic lab=WL_out3} |
| C {devices/lab_pin.sym} 2000 -1640 2 1 {name=l72 sig_type=std_logic lab=WL_out2} |
| C {devices/lab_pin.sym} 2000 -1600 2 1 {name=l73 sig_type=std_logic lab=WL_out1} |
| C {devices/lab_pin.sym} 2000 -1560 2 1 {name=l74 sig_type=std_logic lab=WL_out0} |
| C {devices/ipin.sym} 1030 -1240 2 1 {name=p12 sig_type=std_logic lab=WL1} |
| C {devices/ipin.sym} 1030 -1260 2 1 {name=p13 sig_type=std_logic lab=WL2} |
| C {devices/ipin.sym} 1030 -1280 2 1 {name=p14 sig_type=std_logic lab=WL3} |
| C {devices/ipin.sym} 1030 -1300 2 1 {name=p15 sig_type=std_logic lab=WL4} |
| C {devices/ipin.sym} 1030 -1320 2 1 {name=p16 sig_type=std_logic lab=WL5} |
| C {devices/ipin.sym} 1030 -1340 2 1 {name=p39 sig_type=std_logic lab=WL6} |
| C {devices/ipin.sym} 1030 -1360 2 1 {name=p40 sig_type=std_logic lab=WL7} |
| C {devices/ipin.sym} 1030 -1380 2 1 {name=p41 sig_type=std_logic lab=WL8} |
| C {devices/ipin.sym} 1030 -1400 2 1 {name=p42 sig_type=std_logic lab=WL9} |
| C {devices/ipin.sym} 1030 -1420 2 1 {name=p43 sig_type=std_logic lab=WL10} |
| C {devices/ipin.sym} 1030 -1440 2 1 {name=p44 sig_type=std_logic lab=WL11} |
| C {devices/ipin.sym} 1030 -1460 2 1 {name=p45 sig_type=std_logic lab=WL12} |
| C {devices/ipin.sym} 1030 -1480 2 1 {name=p46 sig_type=std_logic lab=WL13} |
| C {devices/ipin.sym} 1030 -1500 2 1 {name=p47 sig_type=std_logic lab=WL14} |
| C {devices/ipin.sym} 1030 -1520 2 1 {name=p48 sig_type=std_logic lab=WL15} |
| C {devices/lab_pin.sym} 1490 -1440 0 1 {name=l80 sig_type=std_logic lab=WL_out14} |
| C {devices/lab_pin.sym} 1490 -1420 0 1 {name=l81 sig_type=std_logic lab=WL_out13} |
| C {devices/lab_pin.sym} 1490 -1400 0 1 {name=l82 sig_type=std_logic lab=WL_out12} |
| C {devices/lab_pin.sym} 1490 -1380 0 1 {name=l83 sig_type=std_logic lab=WL_out11} |
| C {devices/lab_pin.sym} 1490 -1360 0 1 {name=l84 sig_type=std_logic lab=WL_out10} |
| C {devices/lab_pin.sym} 1490 -1340 0 1 {name=l85 sig_type=std_logic lab=WL_out9} |
| C {devices/lab_pin.sym} 1490 -1320 0 1 {name=l86 sig_type=std_logic lab=WL_out8} |
| C {devices/lab_pin.sym} 1490 -1300 0 1 {name=l87 sig_type=std_logic lab=WL_out7} |
| C {devices/lab_pin.sym} 1490 -1280 0 1 {name=l88 sig_type=std_logic lab=WL_out6} |
| C {devices/lab_pin.sym} 1490 -1260 0 1 {name=l89 sig_type=std_logic lab=WL_out5} |
| C {devices/lab_pin.sym} 1490 -1240 0 1 {name=l90 sig_type=std_logic lab=WL_out4} |
| C {devices/lab_pin.sym} 1490 -1220 0 1 {name=l91 sig_type=std_logic lab=WL_out3} |
| C {devices/lab_pin.sym} 1490 -1200 0 1 {name=l92 sig_type=std_logic lab=WL_out2} |
| C {devices/lab_pin.sym} 1490 -1180 0 1 {name=l93 sig_type=std_logic lab=WL_out1} |
| C {devices/lab_pin.sym} 1490 -1160 0 1 {name=l94 sig_type=std_logic lab=WL_out0} |
| C {and_level_up_shifter_x4.sym} 560 -2320 0 0 {name=x5} |
| C {and_level_up_shifter_x4.sym} 560 -2150 0 0 {name=x6} |
| C {devices/ipin.sym} 310 -2360 0 0 {name=p49 lab=WR} |
| C {devices/ipin.sym} 310 -2190 0 0 {name=p50 lab=SAMPLE} |
| C {devices/lab_pin.sym} 310 -2340 0 0 {name=l95 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 310 -2170 0 0 {name=l96 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 710 -2320 2 0 {name=l97 sig_type=std_logic lab=vssd1} |
| C {devices/lab_pin.sym} 710 -2360 2 0 {name=l98 sig_type=std_logic lab=vdda1} |
| C {devices/lab_pin.sym} 710 -2340 2 0 {name=l99 sig_type=std_logic lab=vccd1} |
| C {devices/lab_pin.sym} 710 -2300 0 1 {name=l100 sig_type=std_logic lab=WRb_3.3} |
| C {devices/lab_pin.sym} 710 -2280 0 1 {name=l101 sig_type=std_logic lab=WR_3.3} |
| C {devices/lab_pin.sym} 990 -2330 0 0 {name=l102 sig_type=std_logic lab=WR_3.3} |
| C {devices/lab_pin.sym} 990 -2270 0 0 {name=l103 sig_type=std_logic lab=WRb_3.3} |
| C {devices/lab_pin.sym} 710 -2150 2 0 {name=l104 sig_type=std_logic lab=vssd1} |
| C {devices/lab_pin.sym} 710 -2190 2 0 {name=l105 sig_type=std_logic lab=vdda1} |
| C {devices/lab_pin.sym} 710 -2170 2 0 {name=l106 sig_type=std_logic lab=vccd1} |
| C {devices/lab_pin.sym} 710 -2130 0 1 {name=l107 sig_type=std_logic lab=SAMPLEb_3.3} |
| C {devices/lab_pin.sym} 710 -2110 0 1 {name=l108 sig_type=std_logic lab=SAMPLE_3.3} |
| C {devices/lab_pin.sym} 990 -2310 0 0 {name=l109 sig_type=std_logic lab=SAMPLEb_3.3} |
| C {devices/lab_pin.sym} 990 -2290 0 0 {name=l110 sig_type=std_logic lab=SAMPLE_3.3} |
| C {devices/ipin.sym} 400 -2530 0 0 {name=p9 lab=row_sel} |
| C {devices/ipin.sym} 400 -2490 0 0 {name=p10 lab=col_sel} |
| C {devices/lab_pin.sym} 750 -2510 0 1 {name=l113 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 990 -2390 0 0 {name=l114 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 1340 -850 0 0 {name=l115 sig_type=std_logic lab=phi1} |
| C {devices/lab_pin.sym} 1340 -830 0 0 {name=l116 sig_type=std_logic lab=phi1b} |
| C {devices/lab_pin.sym} 1790 -830 2 0 {name=l117 sig_type=std_logic lab=vssd1} |
| C {devices/lab_pin.sym} 1790 -850 2 0 {name=l118 sig_type=std_logic lab=vccd1} |
| C {devices/ipin.sym} 1345 -790 2 1 {name=p18 lab=Vref_comp} |
| C {devices/opin.sym} 2315 -790 2 1 {name=p58 lab=latch_high} |
| C {devices/lab_pin.sym} 1340 -810 2 1 {name=l123 sig_type=std_logic lab=Vsample} |
| C {devices/ipin.sym} 765 -830 2 1 {name=p20 lab=RISC_CLK} |
| C {comparator.sym} 1580 -820 0 0 {name=x9} |
| C {devices/noconn.sym} 1730 -790 0 1 {name=l127} |
| C {inv_2.sym} 850 -830 0 0 {name=x10 VGND=vssd1 VNB=vssd1 VPB=vccd1 VPWR=vccd1 prefix=sky130_fd_sc_hd__ } |
| C {inv_2.sym} 1010 -830 0 0 {name=x11 VGND=vssd1 VNB=vssd1 VPB=vccd1 VPWR=vccd1 prefix=sky130_fd_sc_hd__ } |
| C {devices/code.sym} 310 -970 0 0 {name=TT_MODELS |
| only_toplevel=true |
| format="tcleval( @value )" |
| value=".lib $::SKYWATER_MODELS/sky130.lib.spice tt |
| .include $::SKYWATER_STDCELLS/sky130_fd_sc_hd.spice |
| " |
| spice_ignore=false} |
| C {devices/lab_pin.sym} 930 -830 1 1 {name=l128 sig_type=std_logic lab=phi1b} |
| C {devices/lab_pin.sym} 1120 -830 0 1 {name=l129 sig_type=std_logic lab=phi1} |
| C {and2_4.sym} 570 -2510 0 0 {name=x8[13:0] VGND=vssd1 VNB=vssd1 VPB=vccd1 VPWR=vccd1 prefix=sky130_fd_sc_hd__ } |
| C {comp_out_sel.sym} 2100 -810 0 0 {name=x7} |
| C {devices/lab_pin.sym} 2330 -830 0 1 {name=l112 sig_type=std_logic lab=vccd1} |
| C {devices/lab_pin.sym} 1950 -830 0 0 {name=l121 sig_type=std_logic lab=row_sel} |
| C {devices/lab_pin.sym} 2330 -810 2 0 {name=l111 sig_type=std_logic lab=vssd1} |
| C {devices/lab_pin.sym} 2000 -1520 2 1 {name=l57 sig_type=std_logic lab=vssd1} |
