commit | 35dd03419a0256582cebc5f30b65d524f61872ea | [log] [tgz] |
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author | andylithia <thelithcore@gmail.com> | Mon Dec 26 01:15:13 2022 -0500 |
committer | andylithia <thelithcore@gmail.com> | Mon Dec 26 01:27:27 2022 -0500 |
tree | 8dba1191e307d571bbafc44182e03f21e5ae04df | |
parent | 44977e4e60d18f033fa887f7e5a736e6383ee7d1 [diff] |
intg
:exclamation: Important Note |
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Ahem! Testing? Testing? Everything seems to be in order...
Todo:
Cell A: TW Amplifier + SET + Integrated Amplifier
Cell B: TW Amplifier + SET
[x] Configuration Register
[ ] Digital lines wiring
[ ] TWG top wiring
[x] cell A top wiring
[ ] cell B
[ ] Opamp (400µA) DUTs
[ ] Opamp (200µA, Gain Boosted) DUTs
[ ] High Isolation 2-1 MUX DUTs
[ ] Standalone SET DUTs
[ ]