Google Git
Sign in
foss-eda-tools/third_party/shuttle/sky130/mpw-008/slot-006/638342d77f65c84234edeaedae64b5633663c3ff/./verilog/rtl
tree: bb3a0b759a032a453dcd25cde85affe9ea64bd54
  1. fpga/
  2. usb_cdc
  3. verilog-uart
  4. 0001-usb_cdc-fix-make-targets.patch
  5. defines.v
  6. uprj_netlists.v
  7. usb2uart.v
  8. user_defines.v
  9. user_proj_example.v
  10. user_project_wrapper.v