add tag repo to ci action on dispatch
1 file changed
tree: da382c2031e59edb703557b540c4a9b20b771853
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. signoff/
  10. spi/
  11. verilog/
  12. .gitignore
  13. .gitmodules
  15. Makefile

MPW shuttle


Full speed USB2 to 115200 bauds UART module for TTL logic at 3V3. It requires 48MHz clock from user_clock2.

See verilog/rtl/fpga folder for FPGA tests.

mkdir -p dependencies
export OPENLANE_ROOT=$(pwd)/dependencies/openlane_src
export PDK_ROOT=$(pwd)/dependencies/pdks
export PDK=sky130A
make setup

make user_proj_example
klayout -l dependencies/pdks/sky130A/ gds/user_proj_example.gds

make user_project_wrapper
klayout -l dependencies/pdks/sky130A/ gds/user_project_wrapper.gds

make verify
make SIM=GL verify
#make extract-parasitics
make create-spef-mapping
#make caravel-sta
rm -rf ~/mpw_precheck/
make precheck
make run-precheck
#make compress


  • MPW-8 Shuttle projects (project 1758)
  • USB IP taken from ulixxe
  • UART IP taken from alexforencich
  • Harness Harness specification
  • OpenLane OpenLane documentation
  • Board Test board
  • PLL PLL registers calculator
  • QSG Quick start guide
  • README A sample project documentation