Google Git
Sign in
foss-eda-tools / third_party / shuttle / sky130 / mpw-008 / slot-006 / 28f3f99e18bf001c254bcf184abb4d3b438497eb / . / verilog / rtl
tree: 57d2bc9b3b4fe10d146cb3c7691e2200470241df [path history] [tgz]
  1. fpga/
  2. usb_cdc
  3. verilog-uart
  4. 0001-fix-make-targets.patch
  5. defines.v
  6. uprj_netlists.v
  7. user_defines.v
  8. user_proj_example.v
  9. user_project_wrapper.v