| #! /usr/local/bin/vvp |
| :ivl_version "12.0 (devel)" "(s20150603-1556-g542da1166)"; |
| :ivl_delay_selection "TYPICAL"; |
| :vpi_time_precision + 0; |
| :vpi_module "/usr/local/lib/ivl/system.vpi"; |
| :vpi_module "/usr/local/lib/ivl/vhdl_sys.vpi"; |
| :vpi_module "/usr/local/lib/ivl/vhdl_textio.vpi"; |
| :vpi_module "/usr/local/lib/ivl/v2005_math.vpi"; |
| :vpi_module "/usr/local/lib/ivl/va_math.vpi"; |
| :vpi_module "/usr/local/lib/ivl/v2009.vpi"; |
| S_0x5570afab39a0 .scope package, "$unit" "$unit" 2 1; |
| .timescale 0 0; |
| S_0x5570afab5920 .scope module, "ctech_buf" "ctech_buf" 3 74; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| o0x7f116f7cb018 .functor BUFZ 1, C4<z>; HiZ drive |
| L_0x5570afad0180 .functor BUFZ 1, o0x7f116f7cb018, C4<0>, C4<0>, C4<0>; |
| v0x5570afb20990_0 .net "A", 0 0, o0x7f116f7cb018; 0 drivers |
| v0x5570afb20a30_0 .net "X", 0 0, L_0x5570afad0180; 1 drivers |
| S_0x5570afab5ca0 .scope module, "ctech_clk_buf" "ctech_clk_buf" 3 86; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| o0x7f116f7cb0d8 .functor BUFZ 1, C4<z>; HiZ drive |
| L_0x5570afb51eb0 .functor BUFZ 1, o0x7f116f7cb0d8, C4<0>, C4<0>, C4<0>; |
| v0x5570afb1ced0_0 .net "A", 0 0, o0x7f116f7cb0d8; 0 drivers |
| v0x5570afb1cf70_0 .net "X", 0 0, L_0x5570afb51eb0; 1 drivers |
| S_0x5570afab63a0 .scope module, "ctech_clk_gate" "ctech_clk_gate" 3 122; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "GATE"; |
| .port_info 1 /INPUT 1 "CLK"; |
| .port_info 2 /OUTPUT 1 "GCLK"; |
| o0x7f116f7cb198 .functor BUFZ 1, C4<z>; HiZ drive |
| o0x7f116f7cb1c8 .functor BUFZ 1, C4<z>; HiZ drive |
| L_0x5570afb51f80 .functor AND 1, o0x7f116f7cb198, o0x7f116f7cb1c8, C4<1>, C4<1>; |
| v0x5570afabff50_0 .net "CLK", 0 0, o0x7f116f7cb198; 0 drivers |
| v0x5570af9b33a0_0 .net "GATE", 0 0, o0x7f116f7cb1c8; 0 drivers |
| v0x5570af9b3460_0 .net "GCLK", 0 0, L_0x5570afb51f80; 1 drivers |
| S_0x5570afab3620 .scope module, "ctech_delay_buf" "ctech_delay_buf" 3 98; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| o0x7f116f7cb2b8 .functor BUFZ 1, C4<z>; HiZ drive |
| L_0x5570afb52080 .functor BUFZ 1, o0x7f116f7cb2b8, C4<0>, C4<0>, C4<0>; |
| v0x5570af9b3580_0 .net "A", 0 0, o0x7f116f7cb2b8; 0 drivers |
| v0x5570afb29d80_0 .net "X", 0 0, L_0x5570afb52080; 1 drivers |
| S_0x5570afab6020 .scope module, "fpu_wrapper" "fpu_wrapper" 4 39; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "mclk"; |
| .port_info 1 /INPUT 1 "rst_n"; |
| .port_info 2 /INPUT 4 "cfg_cska"; |
| .port_info 3 /INPUT 1 "wbd_clk_int"; |
| .port_info 4 /OUTPUT 1 "wbd_clk_out"; |
| .port_info 5 /INPUT 1 "dmem_req"; |
| .port_info 6 /INPUT 1 "dmem_cmd"; |
| .port_info 7 /INPUT 2 "dmem_width"; |
| .port_info 8 /INPUT 5 "dmem_addr"; |
| .port_info 9 /INPUT 32 "dmem_wdata"; |
| .port_info 10 /OUTPUT 1 "dmem_req_ack"; |
| .port_info 11 /OUTPUT 32 "dmem_rdata"; |
| .port_info 12 /OUTPUT 2 "dmem_resp"; |
| P_0x5570afaae460 .param/l "WB_WIDTH" 0 4 39, +C4<00000000000000000000000000100000>; |
| L_0x5570afb69190 .functor BUFT 4, v0x5570afb4ef20_0, C4<0000>, C4<0000>, C4<0000>; |
| o0x7f116f7d1018 .functor BUFZ 4, C4<zzzz>; HiZ drive |
| v0x5570afb4ee80_0 .net "cfg_cska", 3 0, o0x7f116f7d1018; 0 drivers |
| v0x5570afb4ef20_0 .var "cfg_fpu_cmd", 3 0; |
| v0x5570afb4efc0_0 .net "cfg_fpu_din1", 31 0, L_0x5570afb67d50; 1 drivers |
| v0x5570afb4f060_0 .net "cfg_fpu_din2", 31 0, L_0x5570afb67fd0; 1 drivers |
| v0x5570afb4f100_0 .net "cfg_fpu_val", 0 0, L_0x5570afb578c0; 1 drivers |
| o0x7f116f7cec18 .functor BUFZ 5, C4<zzzzz>; HiZ drive |
| v0x5570afb4f240_0 .net "dmem_addr", 4 0, o0x7f116f7cec18; 0 drivers |
| o0x7f116f7cec78 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb4f2e0_0 .net "dmem_cmd", 0 0, o0x7f116f7cec78; 0 drivers |
| v0x5570afb4f380_0 .net "dmem_rdata", 31 0, v0x5570afb3fbe0_0; 1 drivers |
| o0x7f116f7cecd8 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb4f420_0 .net "dmem_req", 0 0, o0x7f116f7cecd8; 0 drivers |
| v0x5570afb4f4c0_0 .net "dmem_req_ack", 0 0, v0x5570afb3fd80_0; 1 drivers |
| v0x5570afb4f560_0 .net "dmem_resp", 1 0, v0x5570afb3fe40_0; 1 drivers |
| o0x7f116f7ced68 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive |
| v0x5570afb4f600_0 .net "dmem_wdata", 31 0, o0x7f116f7ced68; 0 drivers |
| o0x7f116f7ced98 .functor BUFZ 2, C4<zz>; HiZ drive |
| v0x5570afb4f6a0_0 .net "dmem_width", 1 0, o0x7f116f7ced98; 0 drivers |
| v0x5570afb4f740_0 .net "fpu_done", 0 0, L_0x5570afb6ad00; 1 drivers |
| v0x5570afb4f7e0_0 .net "fpu_result", 31 0, L_0x5570afb6be10; 1 drivers |
| o0x7f116f7cb4f8 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb4f880_0 .net "mclk", 0 0, o0x7f116f7cb4f8; 0 drivers |
| o0x7f116f7cb3a8 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb4fb30_0 .net "rst_n", 0 0, o0x7f116f7cb3a8; 0 drivers |
| v0x5570afb4fc20_0 .net "rst_ss_n", 0 0, L_0x5570afb6a800; 1 drivers |
| o0x7f116f7cf368 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb4fcc0_0 .net "wbd_clk_int", 0 0, o0x7f116f7cf368; 0 drivers |
| v0x5570afb4fdb0_0 .net "wbd_clk_out", 0 0, L_0x5570afb55560; 1 drivers |
| S_0x5570afaaf280 .scope module, "u_app_rst" "reset_sync" 4 92, 5 66 0, S_0x5570afab6020; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "scan_mode"; |
| .port_info 1 /INPUT 1 "dclk"; |
| .port_info 2 /INPUT 1 "arst_n"; |
| .port_info 3 /OUTPUT 1 "srst_n"; |
| P_0x5570afb29ea0 .param/l "WIDTH" 0 5 73, +C4<00000000000000000000000000000001>; |
| v0x5570afb2a5a0_0 .net "arst_n", 0 0, o0x7f116f7cb3a8; alias, 0 drivers |
| v0x5570afb2a660_0 .net "dclk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb2a700_0 .var "in_data_2s", 0 0; |
| v0x5570afb2a800_0 .var "in_data_s", 0 0; |
| L_0x7f116f782018 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb2a8a0_0 .net "scan_mode", 0 0, L_0x7f116f782018; 1 drivers |
| v0x5570afb2a990_0 .net "srst_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| E_0x5570afb29f70/0 .event negedge, v0x5570afb2a260_0; |
| E_0x5570afb29f70/1 .event posedge, v0x5570afb2a660_0; |
| E_0x5570afb29f70 .event/or E_0x5570afb29f70/0, E_0x5570afb29f70/1; |
| S_0x5570afab40a0 .scope module, "u_buf" "ctech_mux2x1" 5 99, 3 2 0, S_0x5570afaaf280; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb2a060 .param/l "WB" 0 3 2, +C4<00000000000000000000000000000001>; |
| L_0x5570afb6a800 .functor BUFT 1, v0x5570afb2a700_0, C4<0>, C4<0>, C4<0>; |
| v0x5570afb2a160_0 .net "A0", 0 0, v0x5570afb2a700_0; 1 drivers |
| v0x5570afb2a260_0 .net "A1", 0 0, o0x7f116f7cb3a8; alias, 0 drivers |
| v0x5570afb2a340_0 .net "S", 0 0, L_0x7f116f782018; alias, 1 drivers |
| v0x5570afb2a410_0 .net "X", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| S_0x5570afab4420 .scope module, "u_fpu_core" "fpu_sp_top" 4 129, 6 62 0, S_0x5570afab6020; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk"; |
| .port_info 1 /INPUT 1 "rst_n"; |
| .port_info 2 /INPUT 4 "cmd"; |
| .port_info 3 /INPUT 32 "din1"; |
| .port_info 4 /INPUT 32 "din2"; |
| .port_info 5 /INPUT 1 "dval"; |
| .port_info 6 /OUTPUT 32 "result"; |
| .port_info 7 /OUTPUT 1 "rdy"; |
| P_0x5570afb2ab20 .param/l "CMD_FPU_DP_ADD" 0 7 6, C4<1001>; |
| P_0x5570afb2ab60 .param/l "CMD_FPU_DP_DIV" 0 7 8, C4<1011>; |
| P_0x5570afb2aba0 .param/l "CMD_FPU_DP_MUL" 0 7 7, C4<1010>; |
| P_0x5570afb2abe0 .param/l "CMD_FPU_SP_ADD" 0 7 1, C4<0001>; |
| P_0x5570afb2ac20 .param/l "CMD_FPU_SP_DIV" 0 7 3, C4<0011>; |
| P_0x5570afb2ac60 .param/l "CMD_FPU_SP_F2I" 0 7 4, C4<0100>; |
| P_0x5570afb2aca0 .param/l "CMD_FPU_SP_I2F" 0 7 5, C4<0101>; |
| P_0x5570afb2ace0 .param/l "CMD_FPU_SP_MUL" 0 7 2, C4<0010>; |
| L_0x5570afb69360 .functor AND 1, L_0x5570afb578c0, L_0x5570afb69290, C4<1>, C4<1>; |
| L_0x5570afb695e0 .functor AND 1, L_0x5570afb578c0, L_0x5570afb694b0, C4<1>, C4<1>; |
| L_0x5570afb697e0 .functor AND 1, L_0x5570afb578c0, L_0x5570afb696f0, C4<1>, C4<1>; |
| L_0x5570afb69a10 .functor AND 1, L_0x5570afb578c0, L_0x5570afb698f0, C4<1>, C4<1>; |
| L_0x5570afb69c40 .functor AND 1, L_0x5570afb578c0, L_0x5570afb69b50, C4<1>, C4<1>; |
| L_0x7f116f7822e8 .functor BUFT 1, C4<0001>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb338b0_0 .net/2u *"_ivl_0", 3 0, L_0x7f116f7822e8; 1 drivers |
| L_0x7f116f782378 .functor BUFT 1, C4<0011>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb339b0_0 .net/2u *"_ivl_12", 3 0, L_0x7f116f782378; 1 drivers |
| v0x5570afb33a90_0 .net *"_ivl_14", 0 0, L_0x5570afb696f0; 1 drivers |
| L_0x7f116f7823c0 .functor BUFT 1, C4<0100>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb33b30_0 .net/2u *"_ivl_18", 3 0, L_0x7f116f7823c0; 1 drivers |
| v0x5570afb33c10_0 .net *"_ivl_2", 0 0, L_0x5570afb69290; 1 drivers |
| v0x5570afb33cd0_0 .net *"_ivl_20", 0 0, L_0x5570afb698f0; 1 drivers |
| L_0x7f116f782408 .functor BUFT 1, C4<0101>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb33d90_0 .net/2u *"_ivl_24", 3 0, L_0x7f116f782408; 1 drivers |
| v0x5570afb33e70_0 .net *"_ivl_26", 0 0, L_0x5570afb69b50; 1 drivers |
| L_0x7f116f782450 .functor BUFT 1, C4<0001>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb33f30_0 .net/2u *"_ivl_30", 3 0, L_0x7f116f782450; 1 drivers |
| v0x5570afb34010_0 .net *"_ivl_32", 0 0, L_0x5570afb69e60; 1 drivers |
| L_0x7f116f782498 .functor BUFT 1, C4<0010>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb340d0_0 .net/2u *"_ivl_34", 3 0, L_0x7f116f782498; 1 drivers |
| v0x5570afb341b0_0 .net *"_ivl_36", 0 0, L_0x5570afb6a1b0; 1 drivers |
| L_0x7f116f7824e0 .functor BUFT 1, C4<0011>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb34270_0 .net/2u *"_ivl_38", 3 0, L_0x7f116f7824e0; 1 drivers |
| v0x5570afb34350_0 .net *"_ivl_40", 0 0, L_0x5570afb6a2a0; 1 drivers |
| L_0x7f116f782528 .functor BUFT 1, C4<0100>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb34410_0 .net/2u *"_ivl_42", 3 0, L_0x7f116f782528; 1 drivers |
| v0x5570afb344f0_0 .net *"_ivl_44", 0 0, L_0x5570afb6a3e0; 1 drivers |
| L_0x7f116f782570 .functor BUFT 1, C4<0101>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb345b0_0 .net/2u *"_ivl_46", 3 0, L_0x7f116f782570; 1 drivers |
| v0x5570afb347a0_0 .net *"_ivl_48", 0 0, L_0x5570afb6a4d0; 1 drivers |
| L_0x7f116f7825b8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb34860_0 .net/2u *"_ivl_50", 0 0, L_0x7f116f7825b8; 1 drivers |
| v0x5570afb34940_0 .net *"_ivl_52", 0 0, L_0x5570afb6a620; 1 drivers |
| v0x5570afb34a20_0 .net *"_ivl_54", 0 0, L_0x5570afb6a760; 1 drivers |
| v0x5570afb34b00_0 .net *"_ivl_56", 0 0, L_0x5570afb6a960; 1 drivers |
| v0x5570afb34be0_0 .net *"_ivl_58", 0 0, L_0x5570afb6aaf0; 1 drivers |
| L_0x7f116f782330 .functor BUFT 1, C4<0010>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb34cc0_0 .net/2u *"_ivl_6", 3 0, L_0x7f116f782330; 1 drivers |
| L_0x7f116f782600 .functor BUFT 1, C4<0001>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb34da0_0 .net/2u *"_ivl_62", 3 0, L_0x7f116f782600; 1 drivers |
| v0x5570afb34e80_0 .net *"_ivl_64", 0 0, L_0x5570afb6ae40; 1 drivers |
| L_0x7f116f782648 .functor BUFT 1, C4<0010>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb34f40_0 .net/2u *"_ivl_66", 3 0, L_0x7f116f782648; 1 drivers |
| v0x5570afb35020_0 .net *"_ivl_68", 0 0, L_0x5570afb6afc0; 1 drivers |
| L_0x7f116f782690 .functor BUFT 1, C4<0011>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb350e0_0 .net/2u *"_ivl_70", 3 0, L_0x7f116f782690; 1 drivers |
| v0x5570afb351c0_0 .net *"_ivl_72", 0 0, L_0x5570afb6b0b0; 1 drivers |
| L_0x7f116f7826d8 .functor BUFT 1, C4<0100>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb35280_0 .net/2u *"_ivl_74", 3 0, L_0x7f116f7826d8; 1 drivers |
| v0x5570afb35360_0 .net *"_ivl_76", 0 0, L_0x5570afb6b240; 1 drivers |
| L_0x7f116f782720 .functor BUFT 1, C4<0101>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb35420_0 .net/2u *"_ivl_78", 3 0, L_0x7f116f782720; 1 drivers |
| v0x5570afb35710_0 .net *"_ivl_8", 0 0, L_0x5570afb694b0; 1 drivers |
| v0x5570afb357d0_0 .net *"_ivl_80", 0 0, L_0x5570afb6b540; 1 drivers |
| L_0x7f116f782768 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb35890_0 .net/2u *"_ivl_82", 31 0, L_0x7f116f782768; 1 drivers |
| v0x5570afb35970_0 .net *"_ivl_84", 31 0, L_0x5570afb6b1a0; 1 drivers |
| v0x5570afb35a50_0 .net *"_ivl_86", 31 0, L_0x5570afb6b7d0; 1 drivers |
| v0x5570afb35b30_0 .net *"_ivl_88", 31 0, L_0x5570afb6ba20; 1 drivers |
| v0x5570afb35c10_0 .net *"_ivl_90", 31 0, L_0x5570afb6bbb0; 1 drivers |
| v0x5570afb35cf0_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb35d90_0 .net "cmd", 3 0, v0x5570afb4ef20_0; 1 drivers |
| v0x5570afb35e70_0 .net "din1", 31 0, L_0x5570afb67d50; alias, 1 drivers |
| v0x5570afb35f30_0 .net "din2", 31 0, L_0x5570afb67fd0; alias, 1 drivers |
| v0x5570afb35ff0_0 .net "dval", 0 0, L_0x5570afb578c0; alias, 1 drivers |
| v0x5570afb360b0_0 .net "rdy", 0 0, L_0x5570afb6ad00; alias, 1 drivers |
| v0x5570afb36170_0 .net "result", 31 0, L_0x5570afb6be10; alias, 1 drivers |
| v0x5570afb36250_0 .net "rst_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb362f0_0 .net "sp_add_dval", 0 0, L_0x5570afb69360; 1 drivers |
| v0x5570afb36390_0 .net "sp_add_rdy", 0 0, v0x5570afb2c6e0_0; 1 drivers |
| v0x5570afb36430_0 .net "sp_add_result", 31 0, v0x5570afb2c7a0_0; 1 drivers |
| v0x5570afb364d0_0 .net "sp_div_dval", 0 0, L_0x5570afb697e0; 1 drivers |
| v0x5570afb36570_0 .net "sp_div_rdy", 0 0, v0x5570afb2eac0_0; 1 drivers |
| v0x5570afb36640_0 .net "sp_div_result", 31 0, v0x5570afb2ec60_0; 1 drivers |
| v0x5570afb36710_0 .net "sp_f2i_dval", 0 0, L_0x5570afb69a10; 1 drivers |
| v0x5570afb367e0_0 .net "sp_f2i_rdy", 0 0, v0x5570afb2ff90_0; 1 drivers |
| v0x5570afb368b0_0 .net "sp_f2i_result", 31 0, v0x5570afb30050_0; 1 drivers |
| v0x5570afb36980_0 .net "sp_i2f_dval", 0 0, L_0x5570afb69c40; 1 drivers |
| v0x5570afb36a50_0 .net "sp_i2f_rdy", 0 0, v0x5570afb30c00_0; 1 drivers |
| v0x5570afb36b20_0 .net "sp_i2f_result", 31 0, v0x5570afb30cc0_0; 1 drivers |
| v0x5570afb36bf0_0 .net "sp_mul_dval", 0 0, L_0x5570afb695e0; 1 drivers |
| v0x5570afb36cc0_0 .net "sp_mul_rdy", 0 0, v0x5570afb32e80_0; 1 drivers |
| v0x5570afb36d90_0 .net "sp_mul_result", 31 0, v0x5570afb32f40_0; 1 drivers |
| L_0x5570afb69290 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f7822e8; |
| L_0x5570afb694b0 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782330; |
| L_0x5570afb696f0 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782378; |
| L_0x5570afb698f0 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f7823c0; |
| L_0x5570afb69b50 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782408; |
| L_0x5570afb69e60 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782450; |
| L_0x5570afb6a1b0 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782498; |
| L_0x5570afb6a2a0 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f7824e0; |
| L_0x5570afb6a3e0 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782528; |
| L_0x5570afb6a4d0 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782570; |
| L_0x5570afb6a620 .functor MUXZ 1, L_0x7f116f7825b8, v0x5570afb30c00_0, L_0x5570afb6a4d0, C4<>; |
| L_0x5570afb6a760 .functor MUXZ 1, L_0x5570afb6a620, v0x5570afb2ff90_0, L_0x5570afb6a3e0, C4<>; |
| L_0x5570afb6a960 .functor MUXZ 1, L_0x5570afb6a760, v0x5570afb2eac0_0, L_0x5570afb6a2a0, C4<>; |
| L_0x5570afb6aaf0 .functor MUXZ 1, L_0x5570afb6a960, v0x5570afb32e80_0, L_0x5570afb6a1b0, C4<>; |
| L_0x5570afb6ad00 .functor MUXZ 1, L_0x5570afb6aaf0, v0x5570afb2c6e0_0, L_0x5570afb69e60, C4<>; |
| L_0x5570afb6ae40 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782600; |
| L_0x5570afb6afc0 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782648; |
| L_0x5570afb6b0b0 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782690; |
| L_0x5570afb6b240 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f7826d8; |
| L_0x5570afb6b540 .cmp/eq 4, v0x5570afb4ef20_0, L_0x7f116f782720; |
| L_0x5570afb6b1a0 .functor MUXZ 32, L_0x7f116f782768, v0x5570afb30cc0_0, L_0x5570afb6b540, C4<>; |
| L_0x5570afb6b7d0 .functor MUXZ 32, L_0x5570afb6b1a0, v0x5570afb30050_0, L_0x5570afb6b240, C4<>; |
| L_0x5570afb6ba20 .functor MUXZ 32, L_0x5570afb6b7d0, v0x5570afb2ec60_0, L_0x5570afb6b0b0, C4<>; |
| L_0x5570afb6bbb0 .functor MUXZ 32, L_0x5570afb6ba20, v0x5570afb32f40_0, L_0x5570afb6afc0, C4<>; |
| L_0x5570afb6be10 .functor MUXZ 32, L_0x5570afb6bbb0, v0x5570afb2c7a0_0, L_0x5570afb6ae40, C4<>; |
| S_0x5570afab47a0 .scope module, "u_sp_add" "fpu_sp_add" 6 127, 8 41 0, S_0x5570afab4420; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk"; |
| .port_info 1 /INPUT 1 "rst_n"; |
| .port_info 2 /INPUT 32 "din1"; |
| .port_info 3 /INPUT 32 "din2"; |
| .port_info 4 /INPUT 1 "dval"; |
| .port_info 5 /OUTPUT 32 "result"; |
| .port_info 6 /OUTPUT 1 "rdy"; |
| P_0x5570afb2b220 .param/l "ADD_0" 0 8 58, C4<0100>; |
| P_0x5570afb2b260 .param/l "ADD_1" 0 8 59, C4<0101>; |
| P_0x5570afb2b2a0 .param/l "ALIGN" 0 8 57, C4<0011>; |
| P_0x5570afb2b2e0 .param/l "NORMALISE_1" 0 8 60, C4<0110>; |
| P_0x5570afb2b320 .param/l "NORMALISE_2" 0 8 61, C4<0111>; |
| P_0x5570afb2b360 .param/l "OUT_RDY" 0 8 64, C4<1010>; |
| P_0x5570afb2b3a0 .param/l "PACK" 0 8 63, C4<1001>; |
| P_0x5570afb2b3e0 .param/l "ROUND" 0 8 62, C4<1000>; |
| P_0x5570afb2b420 .param/l "SPECIAL_CASES" 0 8 56, C4<0010>; |
| P_0x5570afb2b460 .param/l "UNPACK" 0 8 55, C4<0001>; |
| P_0x5570afb2b4a0 .param/l "WAIT_REQ" 0 8 54, C4<0000>; |
| v0x5570afb2bb30_0 .var "a", 31 0; |
| v0x5570afb2bc30_0 .var "a_e", 9 0; |
| v0x5570afb2bd10_0 .var "a_m", 26 0; |
| v0x5570afb2bdd0_0 .var "a_s", 0 0; |
| v0x5570afb2be90_0 .var "b", 31 0; |
| v0x5570afb2bfc0_0 .var "b_e", 9 0; |
| v0x5570afb2c0a0_0 .var "b_m", 26 0; |
| v0x5570afb2c180_0 .var "b_s", 0 0; |
| v0x5570afb2c240_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb2c2e0_0 .net "din1", 31 0, L_0x5570afb67d50; alias, 1 drivers |
| v0x5570afb2c3a0_0 .net "din2", 31 0, L_0x5570afb67fd0; alias, 1 drivers |
| v0x5570afb2c480_0 .net "dval", 0 0, L_0x5570afb69360; alias, 1 drivers |
| v0x5570afb2c540_0 .var "guard", 0 0; |
| v0x5570afb2c600_0 .var "pre_sum", 27 0; |
| v0x5570afb2c6e0_0 .var "rdy", 0 0; |
| v0x5570afb2c7a0_0 .var "result", 31 0; |
| v0x5570afb2c880_0 .var "round_bit", 0 0; |
| v0x5570afb2ca50_0 .net "rst_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb2caf0_0 .var "state", 3 0; |
| v0x5570afb2cbd0_0 .var "sticky", 0 0; |
| v0x5570afb2cc90_0 .var "z", 31 0; |
| v0x5570afb2cd70_0 .var "z_e", 9 0; |
| v0x5570afb2ce50_0 .var "z_m", 23 0; |
| v0x5570afb2cf30_0 .var "z_s", 0 0; |
| E_0x5570afb2bad0/0 .event negedge, v0x5570afb2a410_0; |
| E_0x5570afb2bad0/1 .event posedge, v0x5570afb2a660_0; |
| E_0x5570afb2bad0 .event/or E_0x5570afb2bad0/0, E_0x5570afb2bad0/1; |
| S_0x5570afab4b20 .scope module, "u_sp_div" "fpu_sp_div" 6 149, 9 39 0, S_0x5570afab4420; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk"; |
| .port_info 1 /INPUT 1 "rst_n"; |
| .port_info 2 /INPUT 32 "din1"; |
| .port_info 3 /INPUT 32 "din2"; |
| .port_info 4 /INPUT 1 "dval"; |
| .port_info 5 /OUTPUT 32 "result"; |
| .port_info 6 /OUTPUT 1 "rdy"; |
| P_0x5570afb2d180 .param/l "DIVIDE_0" 0 9 56, C4<0101>; |
| P_0x5570afb2d1c0 .param/l "DIVIDE_1" 0 9 57, C4<0110>; |
| P_0x5570afb2d200 .param/l "DIVIDE_2" 0 9 58, C4<0111>; |
| P_0x5570afb2d240 .param/l "DIVIDE_3" 0 9 59, C4<1000>; |
| P_0x5570afb2d280 .param/l "NORMALISE_1" 0 9 60, C4<1001>; |
| P_0x5570afb2d2c0 .param/l "NORMALISE_2" 0 9 61, C4<1010>; |
| P_0x5570afb2d300 .param/l "NORMALISE_A" 0 9 54, C4<0011>; |
| P_0x5570afb2d340 .param/l "NORMALISE_B" 0 9 55, C4<0100>; |
| P_0x5570afb2d380 .param/l "OUT_RDY" 0 9 64, C4<1101>; |
| P_0x5570afb2d3c0 .param/l "PACK" 0 9 63, C4<1100>; |
| P_0x5570afb2d400 .param/l "ROUND" 0 9 62, C4<1011>; |
| P_0x5570afb2d440 .param/l "SPECIAL_CASES" 0 9 53, C4<0010>; |
| P_0x5570afb2d480 .param/l "UNPACK" 0 9 52, C4<0001>; |
| P_0x5570afb2d4c0 .param/l "WAIT_REQ" 0 9 51, C4<0000>; |
| v0x5570afb2dbe0_0 .var "a", 31 0; |
| v0x5570afb2dcc0_0 .var "a_e", 9 0; |
| v0x5570afb2dda0_0 .var "a_m", 23 0; |
| v0x5570afb2de60_0 .var "a_s", 0 0; |
| v0x5570afb2df20_0 .var "b", 31 0; |
| v0x5570afb2e050_0 .var "b_e", 9 0; |
| v0x5570afb2e130_0 .var "b_m", 23 0; |
| v0x5570afb2e210_0 .var "b_s", 0 0; |
| v0x5570afb2e2d0_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb2e370_0 .var "count", 5 0; |
| v0x5570afb2e450_0 .net "din1", 31 0, L_0x5570afb67d50; alias, 1 drivers |
| v0x5570afb2e510_0 .net "din2", 31 0, L_0x5570afb67fd0; alias, 1 drivers |
| v0x5570afb2e5b0_0 .var "dividend", 50 0; |
| v0x5570afb2e670_0 .var "divisor", 50 0; |
| v0x5570afb2e750_0 .net "dval", 0 0, L_0x5570afb697e0; alias, 1 drivers |
| v0x5570afb2e810_0 .var "guard", 0 0; |
| v0x5570afb2e8d0_0 .var "quotient", 50 0; |
| v0x5570afb2eac0_0 .var "rdy", 0 0; |
| v0x5570afb2eb80_0 .var "remainder", 50 0; |
| v0x5570afb2ec60_0 .var "result", 31 0; |
| v0x5570afb2ed40_0 .var "round_bit", 0 0; |
| v0x5570afb2ee00_0 .net "rst_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb2eea0_0 .var "state", 3 0; |
| v0x5570afb2ef80_0 .var "sticky", 0 0; |
| v0x5570afb2f040_0 .var "z", 31 0; |
| v0x5570afb2f120_0 .var "z_e", 9 0; |
| v0x5570afb2f200_0 .var "z_m", 23 0; |
| v0x5570afb2f2e0_0 .var "z_s", 0 0; |
| S_0x5570afab4ea0 .scope module, "u_sp_f2i" "fpu_sp_f2i" 6 160, 10 39 0, S_0x5570afab4420; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk"; |
| .port_info 1 /INPUT 1 "rst_n"; |
| .port_info 2 /INPUT 32 "din"; |
| .port_info 3 /INPUT 1 "dval"; |
| .port_info 4 /OUTPUT 32 "result"; |
| .port_info 5 /OUTPUT 1 "rdy"; |
| P_0x5570afb2f540 .param/l "CONVERT" 0 10 53, C4<011>; |
| P_0x5570afb2f580 .param/l "OUT_RDY" 0 10 54, C4<100>; |
| P_0x5570afb2f5c0 .param/l "SPECIAL_CASES" 0 10 51, C4<001>; |
| P_0x5570afb2f600 .param/l "UNPACK" 0 10 52, C4<010>; |
| P_0x5570afb2f640 .param/l "WAIT_REQ" 0 10 50, C4<000>; |
| v0x5570afb2f960_0 .var "a", 31 0; |
| v0x5570afb2fa40_0 .var "a_e", 8 0; |
| v0x5570afb2fb20_0 .var "a_m", 31 0; |
| v0x5570afb2fc10_0 .var "a_s", 0 0; |
| v0x5570afb2fcd0_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb2fdc0_0 .net "din", 31 0, L_0x5570afb67d50; alias, 1 drivers |
| v0x5570afb2fed0_0 .net "dval", 0 0, L_0x5570afb69a10; alias, 1 drivers |
| v0x5570afb2ff90_0 .var "rdy", 0 0; |
| v0x5570afb30050_0 .var "result", 31 0; |
| v0x5570afb30130_0 .net "rst_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb301d0_0 .var "state", 2 0; |
| v0x5570afb302b0_0 .var "z", 31 0; |
| S_0x5570afab5220 .scope module, "u_sp_i2f" "fpu_sp_i2f" 6 169, 11 39 0, S_0x5570afab4420; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk"; |
| .port_info 1 /INPUT 1 "rst_n"; |
| .port_info 2 /INPUT 32 "din"; |
| .port_info 3 /INPUT 1 "dval"; |
| .port_info 4 /OUTPUT 32 "result"; |
| .port_info 5 /OUTPUT 1 "rdy"; |
| P_0x5570af9511e0 .param/l "CONVERT_0" 0 11 51, C4<001>; |
| P_0x5570af951220 .param/l "CONVERT_1" 0 11 52, C4<010>; |
| P_0x5570af951260 .param/l "CONVERT_2" 0 11 53, C4<011>; |
| P_0x5570af9512a0 .param/l "OUT_RDY" 0 11 56, C4<110>; |
| P_0x5570af9512e0 .param/l "PACK" 0 11 55, C4<101>; |
| P_0x5570af951320 .param/l "ROUND" 0 11 54, C4<100>; |
| P_0x5570af951360 .param/l "WAIT_REQ" 0 11 50, C4<000>; |
| v0x5570afb30860_0 .var "a", 31 0; |
| v0x5570afb30940_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb30a00_0 .net "din", 31 0, L_0x5570afb67d50; alias, 1 drivers |
| v0x5570afb30aa0_0 .net "dval", 0 0, L_0x5570afb69c40; alias, 1 drivers |
| v0x5570afb30b40_0 .var "guard", 0 0; |
| v0x5570afb30c00_0 .var "rdy", 0 0; |
| v0x5570afb30cc0_0 .var "result", 31 0; |
| v0x5570afb30da0_0 .var "round_bit", 0 0; |
| v0x5570afb30e60_0 .net "rst_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb30f00_0 .var "state", 2 0; |
| v0x5570afb30fe0_0 .var "sticky", 0 0; |
| v0x5570afb310a0_0 .var "value", 31 0; |
| v0x5570afb31180_0 .var "z", 31 0; |
| v0x5570afb31260_0 .var "z_e", 7 0; |
| v0x5570afb31340_0 .var "z_m", 23 0; |
| v0x5570afb31420_0 .var "z_r", 7 0; |
| v0x5570afb31500_0 .var "z_s", 0 0; |
| S_0x5570afb317d0 .scope module, "u_sp_mul" "fpu_sp_mul" 6 138, 12 39 0, S_0x5570afab4420; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk"; |
| .port_info 1 /INPUT 1 "rst_n"; |
| .port_info 2 /INPUT 32 "din1"; |
| .port_info 3 /INPUT 32 "din2"; |
| .port_info 4 /INPUT 1 "dval"; |
| .port_info 5 /OUTPUT 32 "result"; |
| .port_info 6 /OUTPUT 1 "rdy"; |
| P_0x5570afb31960 .param/l "MULTIPLY_0" 0 12 60, C4<0101>; |
| P_0x5570afb319a0 .param/l "MULTIPLY_1" 0 12 61, C4<0110>; |
| P_0x5570afb319e0 .param/l "NORMALISE_1" 0 12 62, C4<0111>; |
| P_0x5570afb31a20 .param/l "NORMALISE_2" 0 12 63, C4<1000>; |
| P_0x5570afb31a60 .param/l "NORMALISE_A" 0 12 58, C4<0011>; |
| P_0x5570afb31aa0 .param/l "NORMALISE_B" 0 12 59, C4<0100>; |
| P_0x5570afb31ae0 .param/l "OUT_RDY" 0 12 66, C4<1011>; |
| P_0x5570afb31b20 .param/l "PACK" 0 12 65, C4<1010>; |
| P_0x5570afb31b60 .param/l "ROUND" 0 12 64, C4<1001>; |
| P_0x5570afb31ba0 .param/l "SPECIAL_CASES" 0 12 57, C4<0010>; |
| P_0x5570afb31be0 .param/l "UNPACK" 0 12 56, C4<0001>; |
| P_0x5570afb31c20 .param/l "WAIT_REQ" 0 12 55, C4<0000>; |
| v0x5570afb32280_0 .var "a", 31 0; |
| v0x5570afb32360_0 .var "a_e", 9 0; |
| v0x5570afb32440_0 .var "a_m", 23 0; |
| v0x5570afb32500_0 .var "a_s", 0 0; |
| v0x5570afb325c0_0 .var "b", 31 0; |
| v0x5570afb326f0_0 .var "b_e", 9 0; |
| v0x5570afb327d0_0 .var "b_m", 23 0; |
| v0x5570afb328b0_0 .var "b_s", 0 0; |
| v0x5570afb32970_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb32a10_0 .net "din1", 31 0, L_0x5570afb67d50; alias, 1 drivers |
| v0x5570afb32b60_0 .net "din2", 31 0, L_0x5570afb67fd0; alias, 1 drivers |
| v0x5570afb32c20_0 .net "dval", 0 0, L_0x5570afb695e0; alias, 1 drivers |
| v0x5570afb32ce0_0 .var "guard", 0 0; |
| v0x5570afb32da0_0 .var "product", 47 0; |
| v0x5570afb32e80_0 .var "rdy", 0 0; |
| v0x5570afb32f40_0 .var "result", 31 0; |
| v0x5570afb33020_0 .var "round_bit", 0 0; |
| v0x5570afb331f0_0 .net "rst_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb33290_0 .var "state", 3 0; |
| v0x5570afb33370_0 .var "sticky", 0 0; |
| v0x5570afb33430_0 .var "z", 31 0; |
| v0x5570afb33510_0 .var "z_e", 9 0; |
| v0x5570afb335f0_0 .var "z_m", 23 0; |
| v0x5570afb336d0_0 .var "z_s", 0 0; |
| S_0x5570afb36e60 .scope module, "u_reg" "fpu_reg" 4 103, 13 37 0, S_0x5570afab6020; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "mclk"; |
| .port_info 1 /INPUT 1 "rst_n"; |
| .port_info 2 /INPUT 1 "dmem_req"; |
| .port_info 3 /INPUT 1 "dmem_cmd"; |
| .port_info 4 /INPUT 2 "dmem_width"; |
| .port_info 5 /INPUT 5 "dmem_addr"; |
| .port_info 6 /INPUT 32 "dmem_wdata"; |
| .port_info 7 /OUTPUT 1 "dmem_req_ack"; |
| .port_info 8 /OUTPUT 32 "dmem_rdata"; |
| .port_info 9 /OUTPUT 2 "dmem_resp"; |
| .port_info 10 /OUTPUT 1 "cfg_fpu_val"; |
| .port_info 11 /INPUT 1 "fpu_done"; |
| .port_info 12 /INPUT 4 "cfg_fpu_cmd"; |
| .port_info 13 /OUTPUT 32 "cfg_fpu_din1"; |
| .port_info 14 /OUTPUT 32 "cfg_fpu_din2"; |
| .port_info 15 /INPUT 32 "fpu_result"; |
| L_0x5570afb56000 .functor AND 1, v0x5570afb40c30_0, v0x5570afb415d0_0, C4<1>, C4<1>; |
| L_0x5570afb56110 .functor AND 1, L_0x5570afb56000, L_0x5570afb56070, C4<1>, C4<1>; |
| L_0x5570afb56180 .functor AND 1, v0x5570afb40c30_0, v0x5570afb415d0_0, C4<1>, C4<1>; |
| L_0x5570afb56330 .functor AND 1, L_0x5570afb56180, L_0x5570afb561f0, C4<1>, C4<1>; |
| L_0x5570afb56490 .functor AND 1, v0x5570afb40c30_0, v0x5570afb415d0_0, C4<1>, C4<1>; |
| L_0x5570afb565f0 .functor AND 1, L_0x5570afb56490, L_0x5570afb56500, C4<1>, C4<1>; |
| L_0x5570afb56790 .functor AND 1, v0x5570afb40c30_0, v0x5570afb415d0_0, C4<1>, C4<1>; |
| L_0x5570afb56a50 .functor AND 1, L_0x5570afb56790, L_0x5570afb56920, C4<1>, C4<1>; |
| L_0x5570afb56b60 .functor AND 1, v0x5570afb40c30_0, v0x5570afb40cf0_0, C4<1>, C4<1>; |
| L_0x5570afb56cc0 .functor AND 1, L_0x5570afb56b60, L_0x5570afb56bd0, C4<1>, C4<1>; |
| L_0x5570afb56e30 .functor AND 1, v0x5570afb40c30_0, v0x5570afb40cf0_0, C4<1>, C4<1>; |
| L_0x5570afb56fd0 .functor AND 1, L_0x5570afb56e30, L_0x5570afb56ea0, C4<1>, C4<1>; |
| L_0x5570afb57150 .functor AND 1, v0x5570afb40c30_0, v0x5570afb40cf0_0, C4<1>, C4<1>; |
| L_0x5570afb572b0 .functor AND 1, L_0x5570afb57150, L_0x5570afb571c0, C4<1>, C4<1>; |
| L_0x5570afb570e0 .functor AND 1, v0x5570afb40c30_0, v0x5570afb40cf0_0, C4<1>, C4<1>; |
| L_0x5570afb576d0 .functor AND 1, L_0x5570afb570e0, L_0x5570afb574d0, C4<1>, C4<1>; |
| L_0x5570afb578c0 .functor AND 1, v0x5570afb38cf0_0, L_0x5570afb57820, C4<1>, C4<1>; |
| L_0x5570afb579d0 .functor BUFZ 1, v0x5570afb38cf0_0, C4<0>, C4<0>, C4<0>; |
| RS_0x7f116f7ce138 .resolv tri, L_0x5570afb687b0, L_0x5570afb69190; |
| L_0x5570afb67c90 .functor BUFZ 4, RS_0x7f116f7ce138, C4<0000>, C4<0000>, C4<0000>; |
| L_0x5570afb67d50 .functor BUFZ 32, v0x5570afb3ca00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; |
| L_0x5570afb67fd0 .functor BUFZ 32, v0x5570afb3d350_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; |
| L_0x5570afb68090 .functor BUFZ 32, L_0x5570afb6be10, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; |
| L_0x5570afb68a10 .functor AND 1, L_0x5570afb56110, L_0x5570afb68940, C4<1>, C4<1>; |
| L_0x5570afb68ba0 .functor AND 1, L_0x5570afb56110, L_0x5570afb68cb0, C4<1>, C4<1>; |
| v0x5570afb3d6a0_0 .net *"_ivl_0", 0 0, L_0x5570afb56000; 1 drivers |
| L_0x7f116f7820a8 .functor BUFT 1, C4<001>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb3d7a0_0 .net/2u *"_ivl_10", 2 0, L_0x7f116f7820a8; 1 drivers |
| v0x5570afb3d880_0 .net *"_ivl_12", 0 0, L_0x5570afb561f0; 1 drivers |
| v0x5570afb3d950_0 .net *"_ivl_16", 0 0, L_0x5570afb56490; 1 drivers |
| L_0x7f116f7820f0 .functor BUFT 1, C4<010>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb3da30_0 .net/2u *"_ivl_18", 2 0, L_0x7f116f7820f0; 1 drivers |
| L_0x7f116f782060 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb3db60_0 .net/2u *"_ivl_2", 2 0, L_0x7f116f782060; 1 drivers |
| v0x5570afb3dc40_0 .net *"_ivl_20", 0 0, L_0x5570afb56500; 1 drivers |
| v0x5570afb3dd00_0 .net *"_ivl_24", 0 0, L_0x5570afb56790; 1 drivers |
| L_0x7f116f782138 .functor BUFT 1, C4<011>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb3dde0_0 .net/2u *"_ivl_26", 2 0, L_0x7f116f782138; 1 drivers |
| v0x5570afb3dec0_0 .net *"_ivl_28", 0 0, L_0x5570afb56920; 1 drivers |
| v0x5570afb3df80_0 .net *"_ivl_32", 0 0, L_0x5570afb56b60; 1 drivers |
| L_0x7f116f782180 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb3e060_0 .net/2u *"_ivl_34", 2 0, L_0x7f116f782180; 1 drivers |
| v0x5570afb3e140_0 .net *"_ivl_36", 0 0, L_0x5570afb56bd0; 1 drivers |
| v0x5570afb3e200_0 .net *"_ivl_4", 0 0, L_0x5570afb56070; 1 drivers |
| v0x5570afb3e2c0_0 .net *"_ivl_40", 0 0, L_0x5570afb56e30; 1 drivers |
| L_0x7f116f7821c8 .functor BUFT 1, C4<001>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb3e3a0_0 .net/2u *"_ivl_42", 2 0, L_0x7f116f7821c8; 1 drivers |
| v0x5570afb3e480_0 .net *"_ivl_44", 0 0, L_0x5570afb56ea0; 1 drivers |
| v0x5570afb3e650_0 .net *"_ivl_48", 0 0, L_0x5570afb57150; 1 drivers |
| L_0x7f116f782210 .functor BUFT 1, C4<010>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb3e730_0 .net/2u *"_ivl_50", 2 0, L_0x7f116f782210; 1 drivers |
| v0x5570afb3e810_0 .net *"_ivl_52", 0 0, L_0x5570afb571c0; 1 drivers |
| v0x5570afb3e8d0_0 .net *"_ivl_56", 0 0, L_0x5570afb570e0; 1 drivers |
| L_0x7f116f782258 .functor BUFT 1, C4<011>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb3e9b0_0 .net/2u *"_ivl_58", 2 0, L_0x7f116f782258; 1 drivers |
| v0x5570afb3ea90_0 .net *"_ivl_60", 0 0, L_0x5570afb574d0; 1 drivers |
| v0x5570afb3eb50_0 .net *"_ivl_65", 0 0, L_0x5570afb57820; 1 drivers |
| v0x5570afb3ec10_0 .net *"_ivl_71", 0 0, L_0x5570afb579d0; 1 drivers |
| L_0x7f116f7822a0 .functor BUFT 1, C4<000000000000000000000000000>, C4<0>, C4<0>, C4<0>; |
| v0x5570afb3ecf0_0 .net/2u *"_ivl_74", 26 0, L_0x7f116f7822a0; 1 drivers |
| v0x5570afb3edd0_0 .net *"_ivl_8", 0 0, L_0x5570afb56180; 1 drivers |
| v0x5570afb3eeb0_0 .net *"_ivl_80", 3 0, L_0x5570afb67c90; 1 drivers |
| v0x5570afb3ef90_0 .net *"_ivl_88", 0 0, L_0x5570afb68940; 1 drivers |
| v0x5570afb3f070_0 .net *"_ivl_89", 0 0, L_0x5570afb68a10; 1 drivers |
| v0x5570afb3f150_0 .net *"_ivl_96", 0 0, L_0x5570afb68cb0; 1 drivers |
| v0x5570afb3f230_0 .net *"_ivl_97", 0 0, L_0x5570afb68ba0; 1 drivers |
| v0x5570afb3f310_0 .net8 "cfg_fpu_cmd", 3 0, RS_0x7f116f7ce138; 2 drivers |
| v0x5570afb3f5e0_0 .net "cfg_fpu_din1", 31 0, L_0x5570afb67d50; alias, 1 drivers |
| v0x5570afb3f680_0 .net "cfg_fpu_din2", 31 0, L_0x5570afb67fd0; alias, 1 drivers |
| v0x5570afb3f740_0 .net "cfg_fpu_req", 0 0, v0x5570afb38cf0_0; 1 drivers |
| v0x5570afb3f810_0 .var "cfg_fpu_req_l", 0 0; |
| v0x5570afb3f8b0_0 .net "cfg_fpu_val", 0 0, L_0x5570afb578c0; alias, 1 drivers |
| v0x5570afb3f980_0 .net "dmem_addr", 4 0, o0x7f116f7cec18; alias, 0 drivers |
| v0x5570afb3fa40_0 .var "dmem_addr_l", 1 0; |
| v0x5570afb3fb20_0 .net "dmem_cmd", 0 0, o0x7f116f7cec78; alias, 0 drivers |
| v0x5570afb3fbe0_0 .var "dmem_rdata", 31 0; |
| v0x5570afb3fcc0_0 .net "dmem_req", 0 0, o0x7f116f7cecd8; alias, 0 drivers |
| v0x5570afb3fd80_0 .var "dmem_req_ack", 0 0; |
| v0x5570afb3fe40_0 .var "dmem_resp", 1 0; |
| v0x5570afb3ff20_0 .net "dmem_wdata", 31 0, o0x7f116f7ced68; alias, 0 drivers |
| v0x5570afb40000_0 .net "dmem_width", 1 0, o0x7f116f7ced98; alias, 0 drivers |
| v0x5570afb400e0_0 .var "dmem_width_l", 1 0; |
| v0x5570afb401c0_0 .net "fpu_done", 0 0, L_0x5570afb6ad00; alias, 1 drivers |
| v0x5570afb40260_0 .net "fpu_result", 31 0, L_0x5570afb6be10; alias, 1 drivers |
| v0x5570afb40320_0 .net "mclk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb403c0_0 .net "reg_0", 31 0, L_0x5570afb67af0; 1 drivers |
| v0x5570afb40480_0 .net "reg_1", 31 0, v0x5570afb3ca00_0; 1 drivers |
| v0x5570afb40570_0 .net "reg_2", 31 0, v0x5570afb3d350_0; 1 drivers |
| v0x5570afb40640_0 .net "reg_3", 31 0, L_0x5570afb68090; 1 drivers |
| v0x5570afb40700_0 .var "reg_out", 31 0; |
| v0x5570afb407e0_0 .net "rst_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb40a90_0 .var "sw_addr", 2 0; |
| v0x5570afb40b70_0 .var "sw_be", 3 0; |
| v0x5570afb40c30_0 .var "sw_cs", 0 0; |
| v0x5570afb40cf0_0 .var "sw_rd_en", 0 0; |
| v0x5570afb40db0_0 .net "sw_rd_en_0", 0 0, L_0x5570afb56cc0; 1 drivers |
| v0x5570afb40e70_0 .net "sw_rd_en_1", 0 0, L_0x5570afb56fd0; 1 drivers |
| v0x5570afb40f30_0 .net "sw_rd_en_2", 0 0, L_0x5570afb572b0; 1 drivers |
| v0x5570afb40ff0_0 .net "sw_rd_en_3", 0 0, L_0x5570afb576d0; 1 drivers |
| v0x5570afb414c0_0 .var "sw_reg_wdata", 31 0; |
| v0x5570afb415d0_0 .var "sw_wr_en", 0 0; |
| v0x5570afb41690_0 .net "sw_wr_en_0", 0 0, L_0x5570afb56110; 1 drivers |
| v0x5570afb41750_0 .net "sw_wr_en_1", 0 0, L_0x5570afb56330; 1 drivers |
| v0x5570afb417f0_0 .net "sw_wr_en_2", 0 0, L_0x5570afb565f0; 1 drivers |
| v0x5570afb41890_0 .net "sw_wr_en_3", 0 0, L_0x5570afb56a50; 1 drivers |
| E_0x5570afb2b9e0/0 .event anyedge, v0x5570afb40a90_0, v0x5570afb403c0_0, v0x5570afb3ca00_0, v0x5570afb3d350_0; |
| E_0x5570afb2b9e0/1 .event anyedge, v0x5570afb40640_0; |
| E_0x5570afb2b9e0 .event/or E_0x5570afb2b9e0/0, E_0x5570afb2b9e0/1; |
| L_0x5570afb56070 .cmp/eq 3, v0x5570afb40a90_0, L_0x7f116f782060; |
| L_0x5570afb561f0 .cmp/eq 3, v0x5570afb40a90_0, L_0x7f116f7820a8; |
| L_0x5570afb56500 .cmp/eq 3, v0x5570afb40a90_0, L_0x7f116f7820f0; |
| L_0x5570afb56920 .cmp/eq 3, v0x5570afb40a90_0, L_0x7f116f782138; |
| L_0x5570afb56bd0 .cmp/eq 3, v0x5570afb40a90_0, L_0x7f116f782180; |
| L_0x5570afb56ea0 .cmp/eq 3, v0x5570afb40a90_0, L_0x7f116f7821c8; |
| L_0x5570afb571c0 .cmp/eq 3, v0x5570afb40a90_0, L_0x7f116f782210; |
| L_0x5570afb574d0 .cmp/eq 3, v0x5570afb40a90_0, L_0x7f116f782258; |
| L_0x5570afb57820 .reduce/nor v0x5570afb3f810_0; |
| L_0x5570afb67af0 .concat8 [ 4 27 1 0], L_0x5570afb67c90, L_0x7f116f7822a0, L_0x5570afb579d0; |
| L_0x5570afb68940 .part v0x5570afb40b70_0, 0, 1; |
| L_0x5570afb68ab0 .concat [ 1 1 1 1], L_0x5570afb68a10, L_0x5570afb68a10, L_0x5570afb68a10, L_0x5570afb68a10; |
| L_0x5570afb68c10 .part v0x5570afb414c0_0, 0, 4; |
| L_0x5570afb68cb0 .part v0x5570afb40b70_0, 3, 1; |
| L_0x5570afb68f30 .concat [ 1 0 0 0], L_0x5570afb68ba0; |
| L_0x5570afb68fd0 .part v0x5570afb414c0_0, 31, 1; |
| S_0x5570afb371e0 .scope autofunction.vec4.s4, "conv_bsel" "conv_bsel" 13 85, 13 85 0, S_0x5570afb36e60; |
| .timescale 0 0; |
| v0x5570afb373c0_0 .var "bsel", 3 0; |
| ; Variable conv_bsel is vec4 return value of scope S_0x5570afb371e0 |
| v0x5570afb37580_0 .var "haddr", 1 0; |
| v0x5570afb37670_0 .var "hwidth", 1 0; |
| TD_fpu_wrapper.u_reg.conv_bsel ; |
| %pushi/vec4 15, 15, 4; |
| %store/vec4 v0x5570afb373c0_0, 0, 4; |
| %load/vec4 v0x5570afb37670_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 2; |
| %cmp/u; |
| %jmp/1 T_0.0, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 2; |
| %cmp/u; |
| %jmp/1 T_0.1, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 2; |
| %cmp/u; |
| %jmp/1 T_0.2, 6; |
| %jmp T_0.4; |
| T_0.0 ; |
| %load/vec4 v0x5570afb37580_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 2; |
| %cmp/u; |
| %jmp/1 T_0.5, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 2; |
| %cmp/u; |
| %jmp/1 T_0.6, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 2; |
| %cmp/u; |
| %jmp/1 T_0.7, 6; |
| %dup/vec4; |
| %pushi/vec4 3, 0, 2; |
| %cmp/u; |
| %jmp/1 T_0.8, 6; |
| %jmp T_0.9; |
| T_0.5 ; |
| %pushi/vec4 1, 0, 4; |
| %store/vec4 v0x5570afb373c0_0, 0, 4; |
| %jmp T_0.9; |
| T_0.6 ; |
| %pushi/vec4 2, 0, 4; |
| %store/vec4 v0x5570afb373c0_0, 0, 4; |
| %jmp T_0.9; |
| T_0.7 ; |
| %pushi/vec4 4, 0, 4; |
| %store/vec4 v0x5570afb373c0_0, 0, 4; |
| %jmp T_0.9; |
| T_0.8 ; |
| %pushi/vec4 8, 0, 4; |
| %store/vec4 v0x5570afb373c0_0, 0, 4; |
| %jmp T_0.9; |
| T_0.9 ; |
| %pop/vec4 1; |
| %jmp T_0.4; |
| T_0.1 ; |
| %load/vec4 v0x5570afb37580_0; |
| %parti/s 1, 1, 2; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 1; |
| %cmp/u; |
| %jmp/1 T_0.10, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 1; |
| %cmp/u; |
| %jmp/1 T_0.11, 6; |
| %jmp T_0.12; |
| T_0.10 ; |
| %pushi/vec4 3, 0, 4; |
| %store/vec4 v0x5570afb373c0_0, 0, 4; |
| %jmp T_0.12; |
| T_0.11 ; |
| %pushi/vec4 12, 0, 4; |
| %store/vec4 v0x5570afb373c0_0, 0, 4; |
| %jmp T_0.12; |
| T_0.12 ; |
| %pop/vec4 1; |
| %jmp T_0.4; |
| T_0.2 ; |
| %pushi/vec4 15, 0, 4; |
| %store/vec4 v0x5570afb373c0_0, 0, 4; |
| %jmp T_0.4; |
| T_0.4 ; |
| %pop/vec4 1; |
| %load/vec4 v0x5570afb373c0_0; |
| %ret/vec4 0, 0, 4; Assign to conv_bsel (store_vec4_to_lval) |
| %end; |
| S_0x5570afb37750 .scope autofunction.vec4.s32, "conv_rdata" "conv_rdata" 13 169, 13 169 0, S_0x5570afb36e60; |
| .timescale 0 0; |
| ; Variable conv_rdata is vec4 return value of scope S_0x5570afb37750 |
| v0x5570afb37a30_0 .var "haddr", 1 0; |
| v0x5570afb37b10_0 .var "hrdata", 31 0; |
| v0x5570afb37c00_0 .var "hwidth", 1 0; |
| v0x5570afb37ce0_0 .var "tmp", 31 0; |
| TD_fpu_wrapper.u_reg.conv_rdata ; |
| %pushi/vec4 4294967295, 4294967295, 32; |
| %store/vec4 v0x5570afb37ce0_0, 0, 32; |
| %load/vec4 v0x5570afb37c00_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 2; |
| %cmp/u; |
| %jmp/1 T_1.13, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 2; |
| %cmp/u; |
| %jmp/1 T_1.14, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 2; |
| %cmp/u; |
| %jmp/1 T_1.15, 6; |
| %jmp T_1.17; |
| T_1.13 ; |
| %load/vec4 v0x5570afb37a30_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 2; |
| %cmp/u; |
| %jmp/1 T_1.18, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 2; |
| %cmp/u; |
| %jmp/1 T_1.19, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 2; |
| %cmp/u; |
| %jmp/1 T_1.20, 6; |
| %dup/vec4; |
| %pushi/vec4 3, 0, 2; |
| %cmp/u; |
| %jmp/1 T_1.21, 6; |
| %jmp T_1.23; |
| T_1.18 ; |
| %load/vec4 v0x5570afb37b10_0; |
| %parti/s 8, 0, 2; |
| %ix/load 4, 0, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb37ce0_0, 4, 8; |
| %jmp T_1.23; |
| T_1.19 ; |
| %load/vec4 v0x5570afb37b10_0; |
| %parti/s 8, 8, 5; |
| %ix/load 4, 0, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb37ce0_0, 4, 8; |
| %jmp T_1.23; |
| T_1.20 ; |
| %load/vec4 v0x5570afb37b10_0; |
| %parti/s 8, 16, 6; |
| %ix/load 4, 0, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb37ce0_0, 4, 8; |
| %jmp T_1.23; |
| T_1.21 ; |
| %load/vec4 v0x5570afb37b10_0; |
| %parti/s 8, 24, 6; |
| %ix/load 4, 0, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb37ce0_0, 4, 8; |
| %jmp T_1.23; |
| T_1.23 ; |
| %pop/vec4 1; |
| %jmp T_1.17; |
| T_1.14 ; |
| %load/vec4 v0x5570afb37a30_0; |
| %parti/s 1, 1, 2; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 1; |
| %cmp/u; |
| %jmp/1 T_1.24, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 1; |
| %cmp/u; |
| %jmp/1 T_1.25, 6; |
| %jmp T_1.27; |
| T_1.24 ; |
| %load/vec4 v0x5570afb37b10_0; |
| %parti/s 16, 0, 2; |
| %ix/load 4, 0, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb37ce0_0, 4, 16; |
| %jmp T_1.27; |
| T_1.25 ; |
| %load/vec4 v0x5570afb37b10_0; |
| %parti/s 16, 16, 6; |
| %ix/load 4, 0, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb37ce0_0, 4, 16; |
| %jmp T_1.27; |
| T_1.27 ; |
| %pop/vec4 1; |
| %jmp T_1.17; |
| T_1.15 ; |
| %load/vec4 v0x5570afb37b10_0; |
| %store/vec4 v0x5570afb37ce0_0, 0, 32; |
| %jmp T_1.17; |
| T_1.17 ; |
| %pop/vec4 1; |
| %load/vec4 v0x5570afb37ce0_0; |
| %ret/vec4 0, 0, 32; Assign to conv_rdata (store_vec4_to_lval) |
| %end; |
| S_0x5570afb37e10 .scope autofunction.vec4.s32, "conv_wdata" "conv_wdata" 13 119, 13 119 0, S_0x5570afb36e60; |
| .timescale 0 0; |
| ; Variable conv_wdata is vec4 return value of scope S_0x5570afb37e10 |
| v0x5570afb380d0_0 .var "dmem_addr", 1 0; |
| v0x5570afb381b0_0 .var "dmem_wdata", 31 0; |
| v0x5570afb382a0_0 .var "dmem_width", 1 0; |
| v0x5570afb38380_0 .var "tmp", 31 0; |
| TD_fpu_wrapper.u_reg.conv_wdata ; |
| %pushi/vec4 4294967295, 4294967295, 32; |
| %store/vec4 v0x5570afb38380_0, 0, 32; |
| %load/vec4 v0x5570afb382a0_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 2; |
| %cmp/u; |
| %jmp/1 T_2.28, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 2; |
| %cmp/u; |
| %jmp/1 T_2.29, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 2; |
| %cmp/u; |
| %jmp/1 T_2.30, 6; |
| %jmp T_2.32; |
| T_2.28 ; |
| %load/vec4 v0x5570afb380d0_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 2; |
| %cmp/u; |
| %jmp/1 T_2.33, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 2; |
| %cmp/u; |
| %jmp/1 T_2.34, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 2; |
| %cmp/u; |
| %jmp/1 T_2.35, 6; |
| %dup/vec4; |
| %pushi/vec4 3, 0, 2; |
| %cmp/u; |
| %jmp/1 T_2.36, 6; |
| %jmp T_2.38; |
| T_2.33 ; |
| %load/vec4 v0x5570afb381b0_0; |
| %parti/s 8, 0, 2; |
| %ix/load 4, 0, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb38380_0, 4, 8; |
| %jmp T_2.38; |
| T_2.34 ; |
| %load/vec4 v0x5570afb381b0_0; |
| %parti/s 8, 0, 2; |
| %ix/load 4, 8, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb38380_0, 4, 8; |
| %jmp T_2.38; |
| T_2.35 ; |
| %load/vec4 v0x5570afb381b0_0; |
| %parti/s 8, 0, 2; |
| %ix/load 4, 16, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb38380_0, 4, 8; |
| %jmp T_2.38; |
| T_2.36 ; |
| %load/vec4 v0x5570afb381b0_0; |
| %parti/s 8, 0, 2; |
| %ix/load 4, 24, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb38380_0, 4, 8; |
| %jmp T_2.38; |
| T_2.38 ; |
| %pop/vec4 1; |
| %jmp T_2.32; |
| T_2.29 ; |
| %load/vec4 v0x5570afb380d0_0; |
| %parti/s 1, 1, 2; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 1; |
| %cmp/u; |
| %jmp/1 T_2.39, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 1; |
| %cmp/u; |
| %jmp/1 T_2.40, 6; |
| %jmp T_2.42; |
| T_2.39 ; |
| %load/vec4 v0x5570afb381b0_0; |
| %parti/s 16, 0, 2; |
| %ix/load 4, 0, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb38380_0, 4, 16; |
| %jmp T_2.42; |
| T_2.40 ; |
| %load/vec4 v0x5570afb381b0_0; |
| %parti/s 16, 0, 2; |
| %ix/load 4, 16, 0; |
| %flag_set/imm 4, 0; |
| %store/vec4 v0x5570afb38380_0, 4, 16; |
| %jmp T_2.42; |
| T_2.42 ; |
| %pop/vec4 1; |
| %jmp T_2.32; |
| T_2.30 ; |
| %load/vec4 v0x5570afb381b0_0; |
| %store/vec4 v0x5570afb38380_0, 0, 32; |
| %jmp T_2.32; |
| T_2.32 ; |
| %pop/vec4 1; |
| %load/vec4 v0x5570afb38380_0; |
| %ret/vec4 0, 0, 32; Assign to conv_wdata (store_vec4_to_lval) |
| %end; |
| S_0x5570afb384b0 .scope begin, "preg_out_Seq" "preg_out_Seq" 13 247, 13 247 0, S_0x5570afb36e60; |
| .timescale 0 0; |
| S_0x5570afb38690 .scope module, "u_reg0_31" "req_register" 13 310, 14 113 0, S_0x5570afb36e60; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk"; |
| .port_info 1 /INPUT 1 "reset_n"; |
| .port_info 2 /INPUT 1 "cpu_we"; |
| .port_info 3 /INPUT 1 "cpu_req"; |
| .port_info 4 /INPUT 1 "hware_ack"; |
| .port_info 5 /OUTPUT 1 "data_out"; |
| P_0x5570afb388c0 .param/l "RESET_DEFAULT" 0 14 128, +C4<00000000000000000000000000000000>; |
| v0x5570afb38ad0_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb38b90_0 .net "cpu_req", 0 0, L_0x5570afb68fd0; 1 drivers |
| v0x5570afb38c50_0 .net "cpu_we", 0 0, L_0x5570afb68f30; 1 drivers |
| v0x5570afb38cf0_0 .var "data_out", 0 0; |
| v0x5570afb38db0_0 .net "hware_ack", 0 0, L_0x5570afb6ad00; alias, 1 drivers |
| v0x5570afb38ea0_0 .net "reset_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| S_0x5570afb39020 .scope module, "u_reg0_3_0" "generic_register" 13 299, 14 207 0, S_0x5570afb36e60; |
| .timescale 0 0; |
| .port_info 0 /INPUT 4 "we"; |
| .port_info 1 /INPUT 4 "data_in"; |
| .port_info 2 /INPUT 1 "reset_n"; |
| .port_info 3 /INPUT 1 "clk"; |
| .port_info 4 /OUTPUT 4 "data_out"; |
| P_0x5570afb26110 .param/l "RESET_DEFAULT" 0 14 219, +C4<00000000000000000000000000000000>; |
| P_0x5570afb26150 .param/l "WD" 0 14 218, +C4<00000000000000000000000000000100>; |
| v0x5570afb3bfa0_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb3c060_0 .net "data_in", 3 0, L_0x5570afb68c10; 1 drivers |
| v0x5570afb3c140_0 .net8 "data_out", 3 0, RS_0x7f116f7ce138; alias, 2 drivers |
| v0x5570afb3c200_0 .net "reset_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb3c2a0_0 .net "we", 3 0, L_0x5570afb68ab0; 1 drivers |
| L_0x5570afb57a40 .part L_0x5570afb68ab0, 0, 1; |
| L_0x5570afb681c0 .part L_0x5570afb68c10, 0, 1; |
| L_0x5570afb68260 .part L_0x5570afb68ab0, 1, 1; |
| L_0x5570afb68350 .part L_0x5570afb68c10, 1, 1; |
| L_0x5570afb68470 .part L_0x5570afb68ab0, 2, 1; |
| L_0x5570afb68510 .part L_0x5570afb68c10, 2, 1; |
| L_0x5570afb685f0 .part L_0x5570afb68ab0, 3, 1; |
| L_0x5570afb68690 .part L_0x5570afb68c10, 3, 1; |
| L_0x5570afb687b0 .concat8 [ 1 1 1 1], v0x5570afb39c90_0, v0x5570afb3a730_0, v0x5570afb3b1e0_0, v0x5570afb3bc80_0; |
| S_0x5570afb393b0 .scope generate, "gen_bit_reg[0]" "gen_bit_reg[0]" 14 229, 14 229 0, S_0x5570afb39020; |
| .timescale 0 0; |
| P_0x5570afb395d0 .param/l "i" 1 14 229, +C4<00>; |
| S_0x5570afb396b0 .scope module, "u_bit_reg" "bit_register" 14 230, 14 68 0, S_0x5570afb393b0; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "we"; |
| .port_info 1 /INPUT 1 "clk"; |
| .port_info 2 /INPUT 1 "reset_n"; |
| .port_info 3 /INPUT 1 "data_in"; |
| .port_info 4 /OUTPUT 1 "data_out"; |
| P_0x5570afb39890 .param/l "RESET_DEFAULT" 0 14 82, C4<0>; |
| v0x5570afb39a20_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb39bd0_0 .net "data_in", 0 0, L_0x5570afb681c0; 1 drivers |
| v0x5570afb39c90_0 .var "data_out", 0 0; |
| v0x5570afb39d60_0 .net "reset_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb39e00_0 .net "we", 0 0, L_0x5570afb57a40; 1 drivers |
| S_0x5570afb39fb0 .scope generate, "gen_bit_reg[1]" "gen_bit_reg[1]" 14 229, 14 229 0, S_0x5570afb39020; |
| .timescale 0 0; |
| P_0x5570afb3a1d0 .param/l "i" 1 14 229, +C4<01>; |
| S_0x5570afb3a290 .scope module, "u_bit_reg" "bit_register" 14 230, 14 68 0, S_0x5570afb39fb0; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "we"; |
| .port_info 1 /INPUT 1 "clk"; |
| .port_info 2 /INPUT 1 "reset_n"; |
| .port_info 3 /INPUT 1 "data_in"; |
| .port_info 4 /OUTPUT 1 "data_out"; |
| P_0x5570afb3a470 .param/l "RESET_DEFAULT" 0 14 82, C4<0>; |
| v0x5570afb3a5d0_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb3a670_0 .net "data_in", 0 0, L_0x5570afb68350; 1 drivers |
| v0x5570afb3a730_0 .var "data_out", 0 0; |
| v0x5570afb3a800_0 .net "reset_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb3a8a0_0 .net "we", 0 0, L_0x5570afb68260; 1 drivers |
| S_0x5570afb3aa50 .scope generate, "gen_bit_reg[2]" "gen_bit_reg[2]" 14 229, 14 229 0, S_0x5570afb39020; |
| .timescale 0 0; |
| P_0x5570afb3ac50 .param/l "i" 1 14 229, +C4<010>; |
| S_0x5570afb3ad10 .scope module, "u_bit_reg" "bit_register" 14 230, 14 68 0, S_0x5570afb3aa50; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "we"; |
| .port_info 1 /INPUT 1 "clk"; |
| .port_info 2 /INPUT 1 "reset_n"; |
| .port_info 3 /INPUT 1 "data_in"; |
| .port_info 4 /OUTPUT 1 "data_out"; |
| P_0x5570afb3aef0 .param/l "RESET_DEFAULT" 0 14 82, C4<0>; |
| v0x5570afb3b080_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb3b120_0 .net "data_in", 0 0, L_0x5570afb68510; 1 drivers |
| v0x5570afb3b1e0_0 .var "data_out", 0 0; |
| v0x5570afb3b2b0_0 .net "reset_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb3b350_0 .net "we", 0 0, L_0x5570afb68470; 1 drivers |
| S_0x5570afb3b500 .scope generate, "gen_bit_reg[3]" "gen_bit_reg[3]" 14 229, 14 229 0, S_0x5570afb39020; |
| .timescale 0 0; |
| P_0x5570afb3b700 .param/l "i" 1 14 229, +C4<011>; |
| S_0x5570afb3b7e0 .scope module, "u_bit_reg" "bit_register" 14 230, 14 68 0, S_0x5570afb3b500; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "we"; |
| .port_info 1 /INPUT 1 "clk"; |
| .port_info 2 /INPUT 1 "reset_n"; |
| .port_info 3 /INPUT 1 "data_in"; |
| .port_info 4 /OUTPUT 1 "data_out"; |
| P_0x5570afb3b9c0 .param/l "RESET_DEFAULT" 0 14 82, C4<0>; |
| v0x5570afb3bb20_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb3bbc0_0 .net "data_in", 0 0, L_0x5570afb68690; 1 drivers |
| v0x5570afb3bc80_0 .var "data_out", 0 0; |
| v0x5570afb3bd50_0 .net "reset_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb3bdf0_0 .net "we", 0 0, L_0x5570afb685f0; 1 drivers |
| S_0x5570afb3c470 .scope module, "u_reg_1" "gen_32b_reg" 13 324, 14 332 0, S_0x5570afb36e60; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "cs"; |
| .port_info 1 /INPUT 4 "we"; |
| .port_info 2 /INPUT 32 "data_in"; |
| .port_info 3 /INPUT 1 "reset_n"; |
| .port_info 4 /INPUT 1 "clk"; |
| .port_info 5 /OUTPUT 32 "data_out"; |
| P_0x5570afb3c650 .param/l "RESET_DEFAULT" 0 14 344, C4<00000000000000000000000000000000>; |
| v0x5570afb3c790_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb3c850_0 .net "cs", 0 0, L_0x5570afb56330; alias, 1 drivers |
| v0x5570afb3c910_0 .net "data_in", 31 0, v0x5570afb414c0_0; 1 drivers |
| v0x5570afb3ca00_0 .var "data_out", 31 0; |
| v0x5570afb3cae0_0 .net "reset_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb3cbd0_0 .net "we", 3 0, v0x5570afb40b70_0; 1 drivers |
| S_0x5570afb3cdb0 .scope module, "u_reg_2" "gen_32b_reg" 13 337, 14 332 0, S_0x5570afb36e60; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "cs"; |
| .port_info 1 /INPUT 4 "we"; |
| .port_info 2 /INPUT 32 "data_in"; |
| .port_info 3 /INPUT 1 "reset_n"; |
| .port_info 4 /INPUT 1 "clk"; |
| .port_info 5 /OUTPUT 32 "data_out"; |
| P_0x5570afb3cf90 .param/l "RESET_DEFAULT" 0 14 344, C4<00000000000000000000000000000000>; |
| v0x5570afb3d0d0_0 .net "clk", 0 0, o0x7f116f7cb4f8; alias, 0 drivers |
| v0x5570afb3d190_0 .net "cs", 0 0, L_0x5570afb565f0; alias, 1 drivers |
| v0x5570afb3d250_0 .net "data_in", 31 0, v0x5570afb414c0_0; alias, 1 drivers |
| v0x5570afb3d350_0 .var "data_out", 31 0; |
| v0x5570afb3d410_0 .net "reset_n", 0 0, L_0x5570afb6a800; alias, 1 drivers |
| v0x5570afb3d500_0 .net "we", 3 0, v0x5570afb40b70_0; alias, 1 drivers |
| S_0x5570afb41b10 .scope module, "u_skew" "clk_skew_adjust" 4 78, 15 78 0, S_0x5570afab6020; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk_in"; |
| .port_info 1 /INPUT 4 "sel"; |
| .port_info 2 /OUTPUT 1 "clk_out"; |
| L_0x5570afb53220 .functor BUFZ 1, o0x7f116f7cf368, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53360 .functor BUFZ 1, L_0x5570afb52150, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb533f0 .functor BUFZ 1, L_0x5570afb521c0, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53480 .functor BUFZ 1, L_0x5570afb52270, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53540 .functor BUFZ 1, L_0x5570afb52320, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb535b0 .functor BUFZ 1, L_0x5570afb52460, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53680 .functor BUFZ 1, L_0x5570afb525a0, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53710 .functor BUFZ 1, L_0x5570afb526e0, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb537a0 .functor BUFZ 1, L_0x5570afb52820, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53830 .functor BUFZ 1, L_0x5570afb52960, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53920 .functor BUFZ 1, L_0x5570afb52aa0, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb539b0 .functor BUFZ 1, L_0x5570afb52be0, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53ab0 .functor BUFZ 1, L_0x5570afb52d20, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53b40 .functor BUFZ 1, L_0x5570afb52e60, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53a40 .functor BUFZ 1, L_0x5570afb52fa0, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb53cc0 .functor BUFZ 1, L_0x5570afb530e0, C4<0>, C4<0>, C4<0>; |
| L_0x5570afb55560 .functor BUFZ 1, L_0x5570afb55b50, C4<0>, C4<0>, C4<0>; |
| v0x5570afb4c6e0_0 .net "clk_d1", 0 0, L_0x5570afb52150; 1 drivers |
| v0x5570afb4c7f0_0 .net "clk_d10", 0 0, L_0x5570afb52aa0; 1 drivers |
| v0x5570afb4c900_0 .net "clk_d11", 0 0, L_0x5570afb52be0; 1 drivers |
| v0x5570afb4c9f0_0 .net "clk_d12", 0 0, L_0x5570afb52d20; 1 drivers |
| v0x5570afb4cae0_0 .net "clk_d13", 0 0, L_0x5570afb52e60; 1 drivers |
| v0x5570afb4cc20_0 .net "clk_d14", 0 0, L_0x5570afb52fa0; 1 drivers |
| v0x5570afb4cd10_0 .net "clk_d15", 0 0, L_0x5570afb530e0; 1 drivers |
| v0x5570afb4cdb0_0 .net "clk_d2", 0 0, L_0x5570afb521c0; 1 drivers |
| v0x5570afb4cea0_0 .net "clk_d3", 0 0, L_0x5570afb52270; 1 drivers |
| v0x5570afb4cf40_0 .net "clk_d4", 0 0, L_0x5570afb52320; 1 drivers |
| v0x5570afb4d030_0 .net "clk_d5", 0 0, L_0x5570afb52460; 1 drivers |
| v0x5570afb4d120_0 .net "clk_d6", 0 0, L_0x5570afb525a0; 1 drivers |
| v0x5570afb4d210_0 .net "clk_d7", 0 0, L_0x5570afb526e0; 1 drivers |
| v0x5570afb4d300_0 .net "clk_d8", 0 0, L_0x5570afb52820; 1 drivers |
| v0x5570afb4d3f0_0 .net "clk_d9", 0 0, L_0x5570afb52960; 1 drivers |
| v0x5570afb4d4e0_0 .net "clk_in", 0 0, o0x7f116f7cf368; alias, 0 drivers |
| v0x5570afb4d580_0 .net "clk_out", 0 0, L_0x5570afb55560; alias, 1 drivers |
| v0x5570afb4d620_0 .net "d00", 0 0, L_0x5570afb53e30; 1 drivers |
| v0x5570afb4d710_0 .net "d01", 0 0, L_0x5570afb54030; 1 drivers |
| v0x5570afb4d800_0 .net "d02", 0 0, L_0x5570afb541c0; 1 drivers |
| v0x5570afb4d8f0_0 .net "d03", 0 0, L_0x5570afb543e0; 1 drivers |
| v0x5570afb4d9e0_0 .net "d04", 0 0, L_0x5570afb54520; 1 drivers |
| v0x5570afb4dad0_0 .net "d05", 0 0, L_0x5570afb546b0; 1 drivers |
| v0x5570afb4dbc0_0 .net "d06", 0 0, L_0x5570afb54880; 1 drivers |
| v0x5570afb4dcb0_0 .net "d07", 0 0, L_0x5570afb54a10; 1 drivers |
| v0x5570afb4dda0_0 .net "d10", 0 0, L_0x5570afb54bf0; 1 drivers |
| v0x5570afb4de90_0 .net "d11", 0 0, L_0x5570afb54dc0; 1 drivers |
| v0x5570afb4df80_0 .net "d12", 0 0, L_0x5570afb55080; 1 drivers |
| v0x5570afb4e070_0 .net "d13", 0 0, L_0x5570afb552e0; 1 drivers |
| v0x5570afb4e160_0 .net "d20", 0 0, L_0x5570afb555d0; 1 drivers |
| v0x5570afb4e250_0 .net "d21", 0 0, L_0x5570afb55850; 1 drivers |
| v0x5570afb4e340_0 .net "d30", 0 0, L_0x5570afb55b50; 1 drivers |
| v0x5570afb4e3e0_0 .net "in0", 0 0, L_0x5570afb53220; 1 drivers |
| v0x5570afb4e480_0 .net "in1", 0 0, L_0x5570afb53360; 1 drivers |
| v0x5570afb4e520_0 .net "in10", 0 0, L_0x5570afb53920; 1 drivers |
| v0x5570afb4e5c0_0 .net "in11", 0 0, L_0x5570afb539b0; 1 drivers |
| v0x5570afb4e660_0 .net "in12", 0 0, L_0x5570afb53ab0; 1 drivers |
| v0x5570afb4e700_0 .net "in13", 0 0, L_0x5570afb53b40; 1 drivers |
| v0x5570afb4e7a0_0 .net "in14", 0 0, L_0x5570afb53a40; 1 drivers |
| v0x5570afb4e840_0 .net "in15", 0 0, L_0x5570afb53cc0; 1 drivers |
| v0x5570afb4e8e0_0 .net "in2", 0 0, L_0x5570afb533f0; 1 drivers |
| v0x5570afb4e980_0 .net "in3", 0 0, L_0x5570afb53480; 1 drivers |
| v0x5570afb4ea20_0 .net "in4", 0 0, L_0x5570afb53540; 1 drivers |
| v0x5570afb4eac0_0 .net "in5", 0 0, L_0x5570afb535b0; 1 drivers |
| v0x5570afb4eb60_0 .net "in6", 0 0, L_0x5570afb53680; 1 drivers |
| v0x5570afb4ec00_0 .net "in7", 0 0, L_0x5570afb53710; 1 drivers |
| v0x5570afb4eca0_0 .net "in8", 0 0, L_0x5570afb537a0; 1 drivers |
| v0x5570afb4ed40_0 .net "in9", 0 0, L_0x5570afb53830; 1 drivers |
| v0x5570afb4ede0_0 .net "sel", 3 0, o0x7f116f7d1018; alias, 0 drivers |
| L_0x5570afb53ef0 .part o0x7f116f7d1018, 0, 1; |
| L_0x5570afb540d0 .part o0x7f116f7d1018, 0, 1; |
| L_0x5570afb54260 .part o0x7f116f7d1018, 0, 1; |
| L_0x5570afb54480 .part o0x7f116f7d1018, 0, 1; |
| L_0x5570afb545c0 .part o0x7f116f7d1018, 0, 1; |
| L_0x5570afb54750 .part o0x7f116f7d1018, 0, 1; |
| L_0x5570afb54920 .part o0x7f116f7d1018, 0, 1; |
| L_0x5570afb54ab0 .part o0x7f116f7d1018, 0, 1; |
| L_0x5570afb54d20 .part o0x7f116f7d1018, 1, 1; |
| L_0x5570afb54f80 .part o0x7f116f7d1018, 1, 1; |
| L_0x5570afb55240 .part o0x7f116f7d1018, 1, 1; |
| L_0x5570afb554c0 .part o0x7f116f7d1018, 1, 1; |
| L_0x5570afb557b0 .part o0x7f116f7d1018, 2, 1; |
| L_0x5570afb55a30 .part o0x7f116f7d1018, 2, 1; |
| L_0x5570afb55d30 .part o0x7f116f7d1018, 3, 1; |
| S_0x5570afb41d60 .scope module, "clkbuf_1" "ctech_delay_clkbuf" 15 143, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52150 .functor BUFZ 1, o0x7f116f7cf368, C4<0>, C4<0>, C4<0>; |
| v0x5570afb41f80_0 .net "A", 0 0, o0x7f116f7cf368; alias, 0 drivers |
| v0x5570afb42060_0 .net "X", 0 0, L_0x5570afb52150; alias, 1 drivers |
| S_0x5570afb42180 .scope module, "clkbuf_10" "ctech_delay_clkbuf" 15 152, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52aa0 .functor BUFZ 1, L_0x5570afb52960, C4<0>, C4<0>, C4<0>; |
| v0x5570afb423a0_0 .net "A", 0 0, L_0x5570afb52960; alias, 1 drivers |
| v0x5570afb42480_0 .net "X", 0 0, L_0x5570afb52aa0; alias, 1 drivers |
| S_0x5570afb425a0 .scope module, "clkbuf_11" "ctech_delay_clkbuf" 15 153, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52be0 .functor BUFZ 1, L_0x5570afb52aa0, C4<0>, C4<0>, C4<0>; |
| v0x5570afb427f0_0 .net "A", 0 0, L_0x5570afb52aa0; alias, 1 drivers |
| v0x5570afb428c0_0 .net "X", 0 0, L_0x5570afb52be0; alias, 1 drivers |
| S_0x5570afb429c0 .scope module, "clkbuf_12" "ctech_delay_clkbuf" 15 154, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52d20 .functor BUFZ 1, L_0x5570afb52be0, C4<0>, C4<0>, C4<0>; |
| v0x5570afb42be0_0 .net "A", 0 0, L_0x5570afb52be0; alias, 1 drivers |
| v0x5570afb42cd0_0 .net "X", 0 0, L_0x5570afb52d20; alias, 1 drivers |
| S_0x5570afb42dd0 .scope module, "clkbuf_13" "ctech_delay_clkbuf" 15 155, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52e60 .functor BUFZ 1, L_0x5570afb52d20, C4<0>, C4<0>, C4<0>; |
| v0x5570afb43040_0 .net "A", 0 0, L_0x5570afb52d20; alias, 1 drivers |
| v0x5570afb43100_0 .net "X", 0 0, L_0x5570afb52e60; alias, 1 drivers |
| S_0x5570afb43200 .scope module, "clkbuf_14" "ctech_delay_clkbuf" 15 156, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52fa0 .functor BUFZ 1, L_0x5570afb52e60, C4<0>, C4<0>, C4<0>; |
| v0x5570afb43420_0 .net "A", 0 0, L_0x5570afb52e60; alias, 1 drivers |
| v0x5570afb43510_0 .net "X", 0 0, L_0x5570afb52fa0; alias, 1 drivers |
| S_0x5570afb43610 .scope module, "clkbuf_15" "ctech_delay_clkbuf" 15 157, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb530e0 .functor BUFZ 1, L_0x5570afb52fa0, C4<0>, C4<0>, C4<0>; |
| v0x5570afb43830_0 .net "A", 0 0, L_0x5570afb52fa0; alias, 1 drivers |
| v0x5570afb43920_0 .net "X", 0 0, L_0x5570afb530e0; alias, 1 drivers |
| S_0x5570afb43a20 .scope module, "clkbuf_2" "ctech_delay_clkbuf" 15 144, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb521c0 .functor BUFZ 1, L_0x5570afb52150, C4<0>, C4<0>, C4<0>; |
| v0x5570afb43c40_0 .net "A", 0 0, L_0x5570afb52150; alias, 1 drivers |
| v0x5570afb43d30_0 .net "X", 0 0, L_0x5570afb521c0; alias, 1 drivers |
| S_0x5570afb43e30 .scope module, "clkbuf_3" "ctech_delay_clkbuf" 15 145, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52270 .functor BUFZ 1, L_0x5570afb521c0, C4<0>, C4<0>, C4<0>; |
| v0x5570afb44050_0 .net "A", 0 0, L_0x5570afb521c0; alias, 1 drivers |
| v0x5570afb44140_0 .net "X", 0 0, L_0x5570afb52270; alias, 1 drivers |
| S_0x5570afb44240 .scope module, "clkbuf_4" "ctech_delay_clkbuf" 15 146, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52320 .functor BUFZ 1, L_0x5570afb52270, C4<0>, C4<0>, C4<0>; |
| v0x5570afb44410_0 .net "A", 0 0, L_0x5570afb52270; alias, 1 drivers |
| v0x5570afb44500_0 .net "X", 0 0, L_0x5570afb52320; alias, 1 drivers |
| S_0x5570afb44600 .scope module, "clkbuf_5" "ctech_delay_clkbuf" 15 147, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52460 .functor BUFZ 1, L_0x5570afb52320, C4<0>, C4<0>, C4<0>; |
| v0x5570afb44820_0 .net "A", 0 0, L_0x5570afb52320; alias, 1 drivers |
| v0x5570afb44910_0 .net "X", 0 0, L_0x5570afb52460; alias, 1 drivers |
| S_0x5570afb44a10 .scope module, "clkbuf_6" "ctech_delay_clkbuf" 15 148, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb525a0 .functor BUFZ 1, L_0x5570afb52460, C4<0>, C4<0>, C4<0>; |
| v0x5570afb44c30_0 .net "A", 0 0, L_0x5570afb52460; alias, 1 drivers |
| v0x5570afb44d20_0 .net "X", 0 0, L_0x5570afb525a0; alias, 1 drivers |
| S_0x5570afb44e20 .scope module, "clkbuf_7" "ctech_delay_clkbuf" 15 149, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb526e0 .functor BUFZ 1, L_0x5570afb525a0, C4<0>, C4<0>, C4<0>; |
| v0x5570afb45040_0 .net "A", 0 0, L_0x5570afb525a0; alias, 1 drivers |
| v0x5570afb45130_0 .net "X", 0 0, L_0x5570afb526e0; alias, 1 drivers |
| S_0x5570afb45230 .scope module, "clkbuf_8" "ctech_delay_clkbuf" 15 150, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52820 .functor BUFZ 1, L_0x5570afb526e0, C4<0>, C4<0>, C4<0>; |
| v0x5570afb45450_0 .net "A", 0 0, L_0x5570afb526e0; alias, 1 drivers |
| v0x5570afb45540_0 .net "X", 0 0, L_0x5570afb52820; alias, 1 drivers |
| S_0x5570afb45640 .scope module, "clkbuf_9" "ctech_delay_clkbuf" 15 151, 3 110 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A"; |
| .port_info 1 /OUTPUT 1 "X"; |
| L_0x5570afb52960 .functor BUFZ 1, L_0x5570afb52820, C4<0>, C4<0>, C4<0>; |
| v0x5570afb45860_0 .net "A", 0 0, L_0x5570afb52820; alias, 1 drivers |
| v0x5570afb45950_0 .net "X", 0 0, L_0x5570afb52960; alias, 1 drivers |
| S_0x5570afb45a40 .scope module, "u_mux_level_00" "ctech_mux2x1_2" 15 180, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb45c20 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb45db0_0 .net "A0", 0 0, L_0x5570afb53220; alias, 1 drivers |
| v0x5570afb45e90_0 .net "A1", 0 0, L_0x5570afb53360; alias, 1 drivers |
| v0x5570afb45f70_0 .net "S", 0 0, L_0x5570afb53ef0; 1 drivers |
| v0x5570afb46040_0 .net "X", 0 0, L_0x5570afb53e30; alias, 1 drivers |
| L_0x5570afb53e30 .functor MUXZ 1, L_0x5570afb53220, L_0x5570afb53360, L_0x5570afb53ef0, C4<>; |
| S_0x5570afb461d0 .scope module, "u_mux_level_01" "ctech_mux2x1_2" 15 181, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb463b0 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb46480_0 .net "A0", 0 0, L_0x5570afb533f0; alias, 1 drivers |
| v0x5570afb46580_0 .net "A1", 0 0, L_0x5570afb53480; alias, 1 drivers |
| v0x5570afb46660_0 .net "S", 0 0, L_0x5570afb540d0; 1 drivers |
| v0x5570afb46730_0 .net "X", 0 0, L_0x5570afb54030; alias, 1 drivers |
| L_0x5570afb54030 .functor MUXZ 1, L_0x5570afb533f0, L_0x5570afb53480, L_0x5570afb540d0, C4<>; |
| S_0x5570afb468c0 .scope module, "u_mux_level_02" "ctech_mux2x1_2" 15 182, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb46aa0 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb46b70_0 .net "A0", 0 0, L_0x5570afb53540; alias, 1 drivers |
| v0x5570afb46c70_0 .net "A1", 0 0, L_0x5570afb535b0; alias, 1 drivers |
| v0x5570afb46d50_0 .net "S", 0 0, L_0x5570afb54260; 1 drivers |
| v0x5570afb46e20_0 .net "X", 0 0, L_0x5570afb541c0; alias, 1 drivers |
| L_0x5570afb541c0 .functor MUXZ 1, L_0x5570afb53540, L_0x5570afb535b0, L_0x5570afb54260, C4<>; |
| S_0x5570afb46fb0 .scope module, "u_mux_level_03" "ctech_mux2x1_2" 15 183, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb47190 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb47260_0 .net "A0", 0 0, L_0x5570afb53680; alias, 1 drivers |
| v0x5570afb47360_0 .net "A1", 0 0, L_0x5570afb53710; alias, 1 drivers |
| v0x5570afb47440_0 .net "S", 0 0, L_0x5570afb54480; 1 drivers |
| v0x5570afb47510_0 .net "X", 0 0, L_0x5570afb543e0; alias, 1 drivers |
| L_0x5570afb543e0 .functor MUXZ 1, L_0x5570afb53680, L_0x5570afb53710, L_0x5570afb54480, C4<>; |
| S_0x5570afb476a0 .scope module, "u_mux_level_04" "ctech_mux2x1_2" 15 184, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb47880 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb479c0_0 .net "A0", 0 0, L_0x5570afb537a0; alias, 1 drivers |
| v0x5570afb47ac0_0 .net "A1", 0 0, L_0x5570afb53830; alias, 1 drivers |
| v0x5570afb47ba0_0 .net "S", 0 0, L_0x5570afb545c0; 1 drivers |
| v0x5570afb47c70_0 .net "X", 0 0, L_0x5570afb54520; alias, 1 drivers |
| L_0x5570afb54520 .functor MUXZ 1, L_0x5570afb537a0, L_0x5570afb53830, L_0x5570afb545c0, C4<>; |
| S_0x5570afb47e00 .scope module, "u_mux_level_05" "ctech_mux2x1_2" 15 185, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb47fe0 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb48120_0 .net "A0", 0 0, L_0x5570afb53920; alias, 1 drivers |
| v0x5570afb48220_0 .net "A1", 0 0, L_0x5570afb539b0; alias, 1 drivers |
| v0x5570afb48300_0 .net "S", 0 0, L_0x5570afb54750; 1 drivers |
| v0x5570afb483d0_0 .net "X", 0 0, L_0x5570afb546b0; alias, 1 drivers |
| L_0x5570afb546b0 .functor MUXZ 1, L_0x5570afb53920, L_0x5570afb539b0, L_0x5570afb54750, C4<>; |
| S_0x5570afb48560 .scope module, "u_mux_level_06" "ctech_mux2x1_2" 15 186, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb48740 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb48880_0 .net "A0", 0 0, L_0x5570afb53ab0; alias, 1 drivers |
| v0x5570afb48980_0 .net "A1", 0 0, L_0x5570afb53b40; alias, 1 drivers |
| v0x5570afb48a60_0 .net "S", 0 0, L_0x5570afb54920; 1 drivers |
| v0x5570afb48b30_0 .net "X", 0 0, L_0x5570afb54880; alias, 1 drivers |
| L_0x5570afb54880 .functor MUXZ 1, L_0x5570afb53ab0, L_0x5570afb53b40, L_0x5570afb54920, C4<>; |
| S_0x5570afb48cc0 .scope module, "u_mux_level_07" "ctech_mux2x1_2" 15 187, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb48ea0 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb48fe0_0 .net "A0", 0 0, L_0x5570afb53a40; alias, 1 drivers |
| v0x5570afb490e0_0 .net "A1", 0 0, L_0x5570afb53cc0; alias, 1 drivers |
| v0x5570afb491c0_0 .net "S", 0 0, L_0x5570afb54ab0; 1 drivers |
| v0x5570afb49290_0 .net "X", 0 0, L_0x5570afb54a10; alias, 1 drivers |
| L_0x5570afb54a10 .functor MUXZ 1, L_0x5570afb53a40, L_0x5570afb53cc0, L_0x5570afb54ab0, C4<>; |
| S_0x5570afb49420 .scope module, "u_mux_level_10" "ctech_mux2x1_2" 15 190, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb49600 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb49740_0 .net "A0", 0 0, L_0x5570afb53e30; alias, 1 drivers |
| v0x5570afb49850_0 .net "A1", 0 0, L_0x5570afb54030; alias, 1 drivers |
| v0x5570afb49920_0 .net "S", 0 0, L_0x5570afb54d20; 1 drivers |
| v0x5570afb499f0_0 .net "X", 0 0, L_0x5570afb54bf0; alias, 1 drivers |
| L_0x5570afb54bf0 .functor MUXZ 1, L_0x5570afb53e30, L_0x5570afb54030, L_0x5570afb54d20, C4<>; |
| S_0x5570afb49b60 .scope module, "u_mux_level_11" "ctech_mux2x1_2" 15 191, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb49d40 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb49e80_0 .net "A0", 0 0, L_0x5570afb541c0; alias, 1 drivers |
| v0x5570afb49f90_0 .net "A1", 0 0, L_0x5570afb543e0; alias, 1 drivers |
| v0x5570afb4a060_0 .net "S", 0 0, L_0x5570afb54f80; 1 drivers |
| v0x5570afb4a130_0 .net "X", 0 0, L_0x5570afb54dc0; alias, 1 drivers |
| L_0x5570afb54dc0 .functor MUXZ 1, L_0x5570afb541c0, L_0x5570afb543e0, L_0x5570afb54f80, C4<>; |
| S_0x5570afb4a2a0 .scope module, "u_mux_level_12" "ctech_mux2x1_2" 15 192, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb4a480 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb4a5c0_0 .net "A0", 0 0, L_0x5570afb54520; alias, 1 drivers |
| v0x5570afb4a6d0_0 .net "A1", 0 0, L_0x5570afb546b0; alias, 1 drivers |
| v0x5570afb4a7a0_0 .net "S", 0 0, L_0x5570afb55240; 1 drivers |
| v0x5570afb4a870_0 .net "X", 0 0, L_0x5570afb55080; alias, 1 drivers |
| L_0x5570afb55080 .functor MUXZ 1, L_0x5570afb54520, L_0x5570afb546b0, L_0x5570afb55240, C4<>; |
| S_0x5570afb4a9e0 .scope module, "u_mux_level_13" "ctech_mux2x1_2" 15 193, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb4abc0 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb4ad00_0 .net "A0", 0 0, L_0x5570afb54880; alias, 1 drivers |
| v0x5570afb4ae10_0 .net "A1", 0 0, L_0x5570afb54a10; alias, 1 drivers |
| v0x5570afb4aee0_0 .net "S", 0 0, L_0x5570afb554c0; 1 drivers |
| v0x5570afb4afb0_0 .net "X", 0 0, L_0x5570afb552e0; alias, 1 drivers |
| L_0x5570afb552e0 .functor MUXZ 1, L_0x5570afb54880, L_0x5570afb54a10, L_0x5570afb554c0, C4<>; |
| S_0x5570afb4b120 .scope module, "u_mux_level_20" "ctech_mux2x1_2" 15 196, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb4b300 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb4b440_0 .net "A0", 0 0, L_0x5570afb54bf0; alias, 1 drivers |
| v0x5570afb4b550_0 .net "A1", 0 0, L_0x5570afb54dc0; alias, 1 drivers |
| v0x5570afb4b620_0 .net "S", 0 0, L_0x5570afb557b0; 1 drivers |
| v0x5570afb4b6f0_0 .net "X", 0 0, L_0x5570afb555d0; alias, 1 drivers |
| L_0x5570afb555d0 .functor MUXZ 1, L_0x5570afb54bf0, L_0x5570afb54dc0, L_0x5570afb557b0, C4<>; |
| S_0x5570afb4b860 .scope module, "u_mux_level_21" "ctech_mux2x1_2" 15 197, 3 26 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb4ba40 .param/l "WB" 0 3 26, +C4<00000000000000000000000000000001>; |
| v0x5570afb4bb80_0 .net "A0", 0 0, L_0x5570afb55080; alias, 1 drivers |
| v0x5570afb4bc90_0 .net "A1", 0 0, L_0x5570afb552e0; alias, 1 drivers |
| v0x5570afb4bd60_0 .net "S", 0 0, L_0x5570afb55a30; 1 drivers |
| v0x5570afb4be30_0 .net "X", 0 0, L_0x5570afb55850; alias, 1 drivers |
| L_0x5570afb55850 .functor MUXZ 1, L_0x5570afb55080, L_0x5570afb552e0, L_0x5570afb55a30, C4<>; |
| S_0x5570afb4bfa0 .scope module, "u_mux_level_30" "ctech_mux2x1_4" 15 200, 3 50 0, S_0x5570afb41b10; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "A0"; |
| .port_info 1 /INPUT 1 "A1"; |
| .port_info 2 /INPUT 1 "S"; |
| .port_info 3 /OUTPUT 1 "X"; |
| P_0x5570afb4c180 .param/l "WB" 0 3 50, +C4<00000000000000000000000000000001>; |
| v0x5570afb4c2c0_0 .net "A0", 0 0, L_0x5570afb555d0; alias, 1 drivers |
| v0x5570afb4c3d0_0 .net "A1", 0 0, L_0x5570afb55850; alias, 1 drivers |
| v0x5570afb4c4a0_0 .net "S", 0 0, L_0x5570afb55d30; 1 drivers |
| v0x5570afb4c570_0 .net "X", 0 0, L_0x5570afb55b50; alias, 1 drivers |
| L_0x5570afb55b50 .functor MUXZ 1, L_0x5570afb555d0, L_0x5570afb55850, L_0x5570afb55d30, C4<>; |
| S_0x5570afab3d20 .scope module, "gen_16b_reg" "gen_16b_reg" 14 293; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "cs"; |
| .port_info 1 /INPUT 2 "we"; |
| .port_info 2 /INPUT 16 "data_in"; |
| .port_info 3 /INPUT 1 "reset_n"; |
| .port_info 4 /INPUT 1 "clk"; |
| .port_info 5 /OUTPUT 16 "data_out"; |
| P_0x5570afad2ae0 .param/l "RESET_DEFAULT" 0 14 305, C4<0000000000000000>; |
| o0x7f116f7d1348 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb4ff00_0 .net "clk", 0 0, o0x7f116f7d1348; 0 drivers |
| o0x7f116f7d1378 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb4ffc0_0 .net "cs", 0 0, o0x7f116f7d1378; 0 drivers |
| o0x7f116f7d13a8 .functor BUFZ 16, C4<zzzzzzzzzzzzzzzz>; HiZ drive |
| v0x5570afb50080_0 .net "data_in", 15 0, o0x7f116f7d13a8; 0 drivers |
| v0x5570afb50140_0 .var "data_out", 15 0; |
| o0x7f116f7d1408 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb50220_0 .net "reset_n", 0 0, o0x7f116f7d1408; 0 drivers |
| o0x7f116f7d1438 .functor BUFZ 2, C4<zz>; HiZ drive |
| v0x5570afb50330_0 .net "we", 1 0, o0x7f116f7d1438; 0 drivers |
| E_0x5570afb4fec0/0 .event negedge, v0x5570afb50220_0; |
| E_0x5570afb4fec0/1 .event posedge, v0x5570afb4ff00_0; |
| E_0x5570afb4fec0 .event/or E_0x5570afb4fec0/0, E_0x5570afb4fec0/1; |
| S_0x5570afadf340 .scope module, "gen_32b_reg2" "gen_32b_reg2" 14 373; |
| .timescale 0 0; |
| .port_info 0 /INPUT 32 "rst_in"; |
| .port_info 1 /INPUT 1 "cs"; |
| .port_info 2 /INPUT 4 "we"; |
| .port_info 3 /INPUT 32 "data_in"; |
| .port_info 4 /INPUT 1 "reset_n"; |
| .port_info 5 /INPUT 1 "clk"; |
| .port_info 6 /OUTPUT 32 "data_out"; |
| o0x7f116f7d1588 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb50550_0 .net "clk", 0 0, o0x7f116f7d1588; 0 drivers |
| o0x7f116f7d15b8 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb50630_0 .net "cs", 0 0, o0x7f116f7d15b8; 0 drivers |
| o0x7f116f7d15e8 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive |
| v0x5570afb506f0_0 .net "data_in", 31 0, o0x7f116f7d15e8; 0 drivers |
| v0x5570afb507b0_0 .var "data_out", 31 0; |
| o0x7f116f7d1648 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb50890_0 .net "reset_n", 0 0, o0x7f116f7d1648; 0 drivers |
| o0x7f116f7d1678 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive |
| v0x5570afb509a0_0 .net "rst_in", 31 0, o0x7f116f7d1678; 0 drivers |
| o0x7f116f7d16a8 .functor BUFZ 4, C4<zzzz>; HiZ drive |
| v0x5570afb50a80_0 .net "we", 3 0, o0x7f116f7d16a8; 0 drivers |
| E_0x5570afb28d30 .event posedge, v0x5570afb50550_0; |
| S_0x5570afab55a0 .scope module, "generic_intr_stat_reg" "generic_intr_stat_reg" 14 247; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk"; |
| .port_info 1 /INPUT 1 "reset_n"; |
| .port_info 2 /INPUT 1 "reg_we"; |
| .port_info 3 /INPUT 1 "reg_din"; |
| .port_info 4 /INPUT 1 "hware_req"; |
| .port_info 5 /OUTPUT 1 "data_out"; |
| P_0x5570afabfff0 .param/l "RESET_DEFAULT" 0 14 260, +C4<00000000000000000000000000000000>; |
| P_0x5570afac0030 .param/l "WD" 0 14 259, +C4<00000000000000000000000000000001>; |
| o0x7f116f7d1828 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb51910_0 .net "clk", 0 0, o0x7f116f7d1828; 0 drivers |
| v0x5570afb519d0_0 .net "data_out", 0 0, v0x5570afb51580_0; 1 drivers |
| o0x7f116f7d18e8 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb51a70_0 .net "hware_req", 0 0, o0x7f116f7d18e8; 0 drivers |
| o0x7f116f7d1858 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb51b40_0 .net "reg_din", 0 0, o0x7f116f7d1858; 0 drivers |
| o0x7f116f7d1888 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb51c10_0 .net "reg_we", 0 0, o0x7f116f7d1888; 0 drivers |
| o0x7f116f7d1918 .functor BUFZ 1, C4<z>; HiZ drive |
| v0x5570afb51d00_0 .net "reset_n", 0 0, o0x7f116f7d1918; 0 drivers |
| S_0x5570afb50c80 .scope generate, "gen_bit_reg[0]" "gen_bit_reg[0]" 14 271, 14 271 0, S_0x5570afab55a0; |
| .timescale 0 0; |
| P_0x5570afb50ea0 .param/l "i" 1 14 271, +C4<00>; |
| S_0x5570afb50f80 .scope module, "u_bit_reg" "stat_register" 14 272, 14 162 0, S_0x5570afb50c80; |
| .timescale 0 0; |
| .port_info 0 /INPUT 1 "clk"; |
| .port_info 1 /INPUT 1 "reset_n"; |
| .port_info 2 /INPUT 1 "cpu_we"; |
| .port_info 3 /INPUT 1 "cpu_ack"; |
| .port_info 4 /INPUT 1 "hware_req"; |
| .port_info 5 /OUTPUT 1 "data_out"; |
| P_0x5570afb51160 .param/l "RESET_DEFAULT" 0 14 177, C4<0>; |
| v0x5570afb51340_0 .net "clk", 0 0, o0x7f116f7d1828; alias, 0 drivers |
| v0x5570afb51420_0 .net "cpu_ack", 0 0, o0x7f116f7d1858; alias, 0 drivers |
| v0x5570afb514e0_0 .net "cpu_we", 0 0, o0x7f116f7d1888; alias, 0 drivers |
| v0x5570afb51580_0 .var "data_out", 0 0; |
| v0x5570afb51640_0 .net "hware_req", 0 0, o0x7f116f7d18e8; alias, 0 drivers |
| v0x5570afb51750_0 .net "reset_n", 0 0, o0x7f116f7d1918; alias, 0 drivers |
| E_0x5570afb512e0/0 .event negedge, v0x5570afb51750_0; |
| E_0x5570afb512e0/1 .event posedge, v0x5570afb51340_0; |
| E_0x5570afb512e0 .event/or E_0x5570afb512e0/0, E_0x5570afb512e0/1; |
| .scope S_0x5570afaaf280; |
| T_3 ; |
| %wait E_0x5570afb29f70; |
| %load/vec4 v0x5570afb2a5a0_0; |
| %cmpi/e 0, 0, 1; |
| %jmp/0xz T_3.0, 4; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2a800_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2a700_0, 0; |
| %jmp T_3.1; |
| T_3.0 ; |
| %pushi/vec4 1, 0, 1; |
| %assign/vec4 v0x5570afb2a800_0, 0; |
| %load/vec4 v0x5570afb2a800_0; |
| %assign/vec4 v0x5570afb2a700_0, 0; |
| T_3.1 ; |
| %jmp T_3; |
| .thread T_3; |
| .scope S_0x5570afb396b0; |
| T_4 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb39d60_0; |
| %nor/r; |
| %flag_set/vec4 8; |
| %jmp/0xz T_4.0, 8; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb39c90_0, 0; |
| %jmp T_4.1; |
| T_4.0 ; |
| %load/vec4 v0x5570afb39e00_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_4.2, 8; |
| %load/vec4 v0x5570afb39bd0_0; |
| %assign/vec4 v0x5570afb39c90_0, 0; |
| T_4.2 ; |
| T_4.1 ; |
| %jmp T_4; |
| .thread T_4; |
| .scope S_0x5570afb3a290; |
| T_5 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb3a800_0; |
| %nor/r; |
| %flag_set/vec4 8; |
| %jmp/0xz T_5.0, 8; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb3a730_0, 0; |
| %jmp T_5.1; |
| T_5.0 ; |
| %load/vec4 v0x5570afb3a8a0_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_5.2, 8; |
| %load/vec4 v0x5570afb3a670_0; |
| %assign/vec4 v0x5570afb3a730_0, 0; |
| T_5.2 ; |
| T_5.1 ; |
| %jmp T_5; |
| .thread T_5; |
| .scope S_0x5570afb3ad10; |
| T_6 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb3b2b0_0; |
| %nor/r; |
| %flag_set/vec4 8; |
| %jmp/0xz T_6.0, 8; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb3b1e0_0, 0; |
| %jmp T_6.1; |
| T_6.0 ; |
| %load/vec4 v0x5570afb3b350_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_6.2, 8; |
| %load/vec4 v0x5570afb3b120_0; |
| %assign/vec4 v0x5570afb3b1e0_0, 0; |
| T_6.2 ; |
| T_6.1 ; |
| %jmp T_6; |
| .thread T_6; |
| .scope S_0x5570afb3b7e0; |
| T_7 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb3bd50_0; |
| %nor/r; |
| %flag_set/vec4 8; |
| %jmp/0xz T_7.0, 8; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb3bc80_0, 0; |
| %jmp T_7.1; |
| T_7.0 ; |
| %load/vec4 v0x5570afb3bdf0_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_7.2, 8; |
| %load/vec4 v0x5570afb3bbc0_0; |
| %assign/vec4 v0x5570afb3bc80_0, 0; |
| T_7.2 ; |
| T_7.1 ; |
| %jmp T_7; |
| .thread T_7; |
| .scope S_0x5570afb38690; |
| T_8 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb38ea0_0; |
| %nor/r; |
| %flag_set/vec4 8; |
| %jmp/0xz T_8.0, 8; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb38cf0_0, 0; |
| %jmp T_8.1; |
| T_8.0 ; |
| %load/vec4 v0x5570afb38c50_0; |
| %load/vec4 v0x5570afb38b90_0; |
| %and; |
| %flag_set/vec4 8; |
| %jmp/0xz T_8.2, 8; |
| %pushi/vec4 1, 0, 1; |
| %assign/vec4 v0x5570afb38cf0_0, 0; |
| %jmp T_8.3; |
| T_8.2 ; |
| %load/vec4 v0x5570afb38db0_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_8.4, 8; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb38cf0_0, 0; |
| T_8.4 ; |
| T_8.3 ; |
| T_8.1 ; |
| %jmp T_8; |
| .thread T_8; |
| .scope S_0x5570afb3c470; |
| T_9 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb3cae0_0; |
| %cmpi/e 0, 0, 1; |
| %jmp/0xz T_9.0, 4; |
| %pushi/vec4 0, 0, 32; |
| %assign/vec4 v0x5570afb3ca00_0, 0; |
| %jmp T_9.1; |
| T_9.0 ; |
| %load/vec4 v0x5570afb3c850_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_9.4, 9; |
| %load/vec4 v0x5570afb3cbd0_0; |
| %parti/s 1, 0, 2; |
| %and; |
| T_9.4; |
| %flag_set/vec4 8; |
| %jmp/0xz T_9.2, 8; |
| %load/vec4 v0x5570afb3c910_0; |
| %parti/s 8, 0, 2; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb3ca00_0, 4, 5; |
| T_9.2 ; |
| %load/vec4 v0x5570afb3c850_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_9.7, 9; |
| %load/vec4 v0x5570afb3cbd0_0; |
| %parti/s 1, 1, 2; |
| %and; |
| T_9.7; |
| %flag_set/vec4 8; |
| %jmp/0xz T_9.5, 8; |
| %load/vec4 v0x5570afb3c910_0; |
| %parti/s 8, 8, 5; |
| %ix/load 4, 8, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb3ca00_0, 4, 5; |
| T_9.5 ; |
| %load/vec4 v0x5570afb3c850_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_9.10, 9; |
| %load/vec4 v0x5570afb3cbd0_0; |
| %parti/s 1, 2, 3; |
| %and; |
| T_9.10; |
| %flag_set/vec4 8; |
| %jmp/0xz T_9.8, 8; |
| %load/vec4 v0x5570afb3c910_0; |
| %parti/s 8, 16, 6; |
| %ix/load 4, 16, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb3ca00_0, 4, 5; |
| T_9.8 ; |
| %load/vec4 v0x5570afb3c850_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_9.13, 9; |
| %load/vec4 v0x5570afb3cbd0_0; |
| %parti/s 1, 3, 3; |
| %and; |
| T_9.13; |
| %flag_set/vec4 8; |
| %jmp/0xz T_9.11, 8; |
| %load/vec4 v0x5570afb3c910_0; |
| %parti/s 8, 24, 6; |
| %ix/load 4, 24, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb3ca00_0, 4, 5; |
| T_9.11 ; |
| T_9.1 ; |
| %jmp T_9; |
| .thread T_9; |
| .scope S_0x5570afb3cdb0; |
| T_10 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb3d410_0; |
| %cmpi/e 0, 0, 1; |
| %jmp/0xz T_10.0, 4; |
| %pushi/vec4 0, 0, 32; |
| %assign/vec4 v0x5570afb3d350_0, 0; |
| %jmp T_10.1; |
| T_10.0 ; |
| %load/vec4 v0x5570afb3d190_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_10.4, 9; |
| %load/vec4 v0x5570afb3d500_0; |
| %parti/s 1, 0, 2; |
| %and; |
| T_10.4; |
| %flag_set/vec4 8; |
| %jmp/0xz T_10.2, 8; |
| %load/vec4 v0x5570afb3d250_0; |
| %parti/s 8, 0, 2; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb3d350_0, 4, 5; |
| T_10.2 ; |
| %load/vec4 v0x5570afb3d190_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_10.7, 9; |
| %load/vec4 v0x5570afb3d500_0; |
| %parti/s 1, 1, 2; |
| %and; |
| T_10.7; |
| %flag_set/vec4 8; |
| %jmp/0xz T_10.5, 8; |
| %load/vec4 v0x5570afb3d250_0; |
| %parti/s 8, 8, 5; |
| %ix/load 4, 8, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb3d350_0, 4, 5; |
| T_10.5 ; |
| %load/vec4 v0x5570afb3d190_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_10.10, 9; |
| %load/vec4 v0x5570afb3d500_0; |
| %parti/s 1, 2, 3; |
| %and; |
| T_10.10; |
| %flag_set/vec4 8; |
| %jmp/0xz T_10.8, 8; |
| %load/vec4 v0x5570afb3d250_0; |
| %parti/s 8, 16, 6; |
| %ix/load 4, 16, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb3d350_0, 4, 5; |
| T_10.8 ; |
| %load/vec4 v0x5570afb3d190_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_10.13, 9; |
| %load/vec4 v0x5570afb3d500_0; |
| %parti/s 1, 3, 3; |
| %and; |
| T_10.13; |
| %flag_set/vec4 8; |
| %jmp/0xz T_10.11, 8; |
| %load/vec4 v0x5570afb3d250_0; |
| %parti/s 8, 24, 6; |
| %ix/load 4, 24, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb3d350_0, 4, 5; |
| T_10.11 ; |
| T_10.1 ; |
| %jmp T_10; |
| .thread T_10; |
| .scope S_0x5570afb36e60; |
| T_11 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb407e0_0; |
| %inv; |
| %flag_set/vec4 8; |
| %jmp/0xz T_11.0, 8; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb40c30_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb3fd80_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb40cf0_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb415d0_0, 0; |
| %pushi/vec4 0, 0, 3; |
| %assign/vec4 v0x5570afb40a90_0, 0; |
| %pushi/vec4 0, 0, 4; |
| %assign/vec4 v0x5570afb40b70_0, 0; |
| %pushi/vec4 0, 0, 32; |
| %assign/vec4 v0x5570afb414c0_0, 0; |
| %pushi/vec4 0, 0, 2; |
| %assign/vec4 v0x5570afb3fa40_0, 0; |
| %pushi/vec4 0, 0, 2; |
| %assign/vec4 v0x5570afb400e0_0, 0; |
| %jmp T_11.1; |
| T_11.0 ; |
| %load/vec4 v0x5570afb3fcc0_0; |
| %flag_set/vec4 8; |
| %flag_get/vec4 8; |
| %jmp/0 T_11.2, 8; |
| %load/vec4 v0x5570afb3fd80_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_11.2; |
| %assign/vec4 v0x5570afb40c30_0, 0; |
| %load/vec4 v0x5570afb3fcc0_0; |
| %load/vec4 v0x5570afb3fd80_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| %assign/vec4 v0x5570afb3fd80_0, 0; |
| %load/vec4 v0x5570afb3fb20_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %assign/vec4 v0x5570afb40cf0_0, 0; |
| %load/vec4 v0x5570afb3fb20_0; |
| %pad/u 32; |
| %pushi/vec4 1, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %assign/vec4 v0x5570afb415d0_0, 0; |
| %load/vec4 v0x5570afb3f980_0; |
| %parti/s 3, 2, 3; |
| %assign/vec4 v0x5570afb40a90_0, 0; |
| %load/vec4 v0x5570afb3f980_0; |
| %parti/s 2, 0, 2; |
| %assign/vec4 v0x5570afb3fa40_0, 0; |
| %load/vec4 v0x5570afb40000_0; |
| %assign/vec4 v0x5570afb400e0_0, 0; |
| %alloc S_0x5570afb371e0; |
| %load/vec4 v0x5570afb40000_0; |
| %load/vec4 v0x5570afb3f980_0; |
| %parti/s 2, 0, 2; |
| %store/vec4 v0x5570afb37580_0, 0, 2; |
| %store/vec4 v0x5570afb37670_0, 0, 2; |
| %callf/vec4 TD_fpu_wrapper.u_reg.conv_bsel, S_0x5570afb371e0; |
| %free S_0x5570afb371e0; |
| %assign/vec4 v0x5570afb40b70_0, 0; |
| %alloc S_0x5570afb37e10; |
| %load/vec4 v0x5570afb40000_0; |
| %load/vec4 v0x5570afb3f980_0; |
| %parti/s 2, 0, 2; |
| %load/vec4 v0x5570afb3ff20_0; |
| %store/vec4 v0x5570afb381b0_0, 0, 32; |
| %store/vec4 v0x5570afb380d0_0, 0, 2; |
| %store/vec4 v0x5570afb382a0_0, 0, 2; |
| %callf/vec4 TD_fpu_wrapper.u_reg.conv_wdata, S_0x5570afb37e10; |
| %free S_0x5570afb37e10; |
| %assign/vec4 v0x5570afb414c0_0, 0; |
| T_11.1 ; |
| %jmp T_11; |
| .thread T_11; |
| .scope S_0x5570afb36e60; |
| T_12 ; |
| %wait E_0x5570afb2bad0; |
| %fork t_1, S_0x5570afb384b0; |
| %jmp t_0; |
| .scope S_0x5570afb384b0; |
| t_1 ; |
| %load/vec4 v0x5570afb407e0_0; |
| %cmpi/e 0, 0, 1; |
| %jmp/0xz T_12.0, 4; |
| %pushi/vec4 0, 0, 2; |
| %assign/vec4 v0x5570afb3fe40_0, 0; |
| %pushi/vec4 0, 0, 32; |
| %assign/vec4 v0x5570afb3fbe0_0, 0; |
| %jmp T_12.1; |
| T_12.0 ; |
| %load/vec4 v0x5570afb40c30_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_12.4, 9; |
| %load/vec4 v0x5570afb40cf0_0; |
| %and; |
| T_12.4; |
| %flag_set/vec4 8; |
| %jmp/0xz T_12.2, 8; |
| %alloc S_0x5570afb37750; |
| %load/vec4 v0x5570afb400e0_0; |
| %load/vec4 v0x5570afb3fa40_0; |
| %load/vec4 v0x5570afb40700_0; |
| %store/vec4 v0x5570afb37b10_0, 0, 32; |
| %store/vec4 v0x5570afb37a30_0, 0, 2; |
| %store/vec4 v0x5570afb37c00_0, 0, 2; |
| %callf/vec4 TD_fpu_wrapper.u_reg.conv_rdata, S_0x5570afb37750; |
| %free S_0x5570afb37750; |
| %assign/vec4 v0x5570afb3fbe0_0, 0; |
| %pushi/vec4 1, 0, 2; |
| %assign/vec4 v0x5570afb3fe40_0, 0; |
| %jmp T_12.3; |
| T_12.2 ; |
| %load/vec4 v0x5570afb40c30_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_12.7, 9; |
| %load/vec4 v0x5570afb415d0_0; |
| %and; |
| T_12.7; |
| %flag_set/vec4 8; |
| %jmp/0xz T_12.5, 8; |
| %pushi/vec4 1, 0, 2; |
| %assign/vec4 v0x5570afb3fe40_0, 0; |
| %jmp T_12.6; |
| T_12.5 ; |
| %pushi/vec4 0, 0, 2; |
| %assign/vec4 v0x5570afb3fe40_0, 0; |
| T_12.6 ; |
| T_12.3 ; |
| T_12.1 ; |
| %end; |
| .scope S_0x5570afb36e60; |
| t_0 %join; |
| %jmp T_12; |
| .thread T_12; |
| .scope S_0x5570afb36e60; |
| T_13 ; |
| Ewait_0 .event/or E_0x5570afb2b9e0, E_0x0; |
| %wait Ewait_0; |
| %pushi/vec4 0, 0, 32; |
| %store/vec4 v0x5570afb40700_0, 0, 32; |
| %load/vec4 v0x5570afb40a90_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 3; |
| %cmp/u; |
| %jmp/1 T_13.0, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 3; |
| %cmp/u; |
| %jmp/1 T_13.1, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 3; |
| %cmp/u; |
| %jmp/1 T_13.2, 6; |
| %dup/vec4; |
| %pushi/vec4 3, 0, 3; |
| %cmp/u; |
| %jmp/1 T_13.3, 6; |
| %pushi/vec4 0, 0, 32; |
| %store/vec4 v0x5570afb40700_0, 0, 32; |
| %jmp T_13.5; |
| T_13.0 ; |
| %load/vec4 v0x5570afb403c0_0; |
| %store/vec4 v0x5570afb40700_0, 0, 32; |
| %jmp T_13.5; |
| T_13.1 ; |
| %load/vec4 v0x5570afb40480_0; |
| %store/vec4 v0x5570afb40700_0, 0, 32; |
| %jmp T_13.5; |
| T_13.2 ; |
| %load/vec4 v0x5570afb40570_0; |
| %store/vec4 v0x5570afb40700_0, 0, 32; |
| %jmp T_13.5; |
| T_13.3 ; |
| %load/vec4 v0x5570afb40640_0; |
| %store/vec4 v0x5570afb40700_0, 0, 32; |
| %jmp T_13.5; |
| T_13.5 ; |
| %pop/vec4 1; |
| %jmp T_13; |
| .thread T_13, $push; |
| .scope S_0x5570afb36e60; |
| T_14 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb407e0_0; |
| %cmpi/e 0, 0, 1; |
| %jmp/0xz T_14.0, 4; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb3f810_0, 0; |
| %jmp T_14.1; |
| T_14.0 ; |
| %load/vec4 v0x5570afb3f740_0; |
| %assign/vec4 v0x5570afb3f810_0, 0; |
| T_14.1 ; |
| %jmp T_14; |
| .thread T_14; |
| .scope S_0x5570afab47a0; |
| T_15 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb2ca50_0; |
| %pad/u 32; |
| %cmpi/e 0, 0, 32; |
| %jmp/0xz T_15.0, 4; |
| %pushi/vec4 0, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2c6e0_0, 0; |
| %jmp T_15.1; |
| T_15.0 ; |
| %load/vec4 v0x5570afb2caf0_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.2, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.3, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.4, 6; |
| %dup/vec4; |
| %pushi/vec4 3, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.5, 6; |
| %dup/vec4; |
| %pushi/vec4 4, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.6, 6; |
| %dup/vec4; |
| %pushi/vec4 5, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.7, 6; |
| %dup/vec4; |
| %pushi/vec4 6, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.8, 6; |
| %dup/vec4; |
| %pushi/vec4 7, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.9, 6; |
| %dup/vec4; |
| %pushi/vec4 8, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.10, 6; |
| %dup/vec4; |
| %pushi/vec4 9, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.11, 6; |
| %dup/vec4; |
| %pushi/vec4 10, 0, 4; |
| %cmp/u; |
| %jmp/1 T_15.12, 6; |
| %jmp T_15.13; |
| T_15.2 ; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2c6e0_0, 0; |
| %load/vec4 v0x5570afb2c480_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.14, 8; |
| %load/vec4 v0x5570afb2c2e0_0; |
| %assign/vec4 v0x5570afb2bb30_0, 0; |
| %load/vec4 v0x5570afb2c3a0_0; |
| %assign/vec4 v0x5570afb2be90_0, 0; |
| %pushi/vec4 1, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| T_15.14 ; |
| %jmp T_15.13; |
| T_15.3 ; |
| %load/vec4 v0x5570afb2bb30_0; |
| %parti/s 23, 0, 2; |
| %concati/vec4 0, 0, 3; |
| %pad/u 27; |
| %assign/vec4 v0x5570afb2bd10_0, 0; |
| %load/vec4 v0x5570afb2be90_0; |
| %parti/s 23, 0, 2; |
| %concati/vec4 0, 0, 3; |
| %pad/u 27; |
| %assign/vec4 v0x5570afb2c0a0_0, 0; |
| %load/vec4 v0x5570afb2bb30_0; |
| %parti/s 8, 23, 6; |
| %pad/u 10; |
| %subi 127, 0, 10; |
| %assign/vec4 v0x5570afb2bc30_0, 0; |
| %load/vec4 v0x5570afb2be90_0; |
| %parti/s 8, 23, 6; |
| %pad/u 10; |
| %subi 127, 0, 10; |
| %assign/vec4 v0x5570afb2bfc0_0, 0; |
| %load/vec4 v0x5570afb2bb30_0; |
| %parti/s 1, 31, 6; |
| %assign/vec4 v0x5570afb2bdd0_0, 0; |
| %load/vec4 v0x5570afb2be90_0; |
| %parti/s 1, 31, 6; |
| %assign/vec4 v0x5570afb2c180_0, 0; |
| %pushi/vec4 2, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.13; |
| T_15.4 ; |
| %load/vec4 v0x5570afb2bc30_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.19, 4; |
| %load/vec4 v0x5570afb2bd10_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %and; |
| T_15.19; |
| %flag_set/vec4 8; |
| %jmp/1 T_15.18, 8; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.20, 4; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %and; |
| T_15.20; |
| %flag_set/vec4 9; |
| %flag_or 8, 9; |
| T_15.18; |
| %jmp/0xz T_15.16, 8; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 22, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 0, 0, 22; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 10, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.17; |
| T_15.16 ; |
| %load/vec4 v0x5570afb2bc30_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %jmp/0xz T_15.21, 4; |
| %load/vec4 v0x5570afb2bdd0_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.25, 4; |
| %load/vec4 v0x5570afb2bdd0_0; |
| %load/vec4 v0x5570afb2c180_0; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %and; |
| T_15.25; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.23, 8; |
| %load/vec4 v0x5570afb2c180_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 22, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 0, 0, 22; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| T_15.23 ; |
| %pushi/vec4 10, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.22; |
| T_15.21 ; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %jmp/0xz T_15.26, 4; |
| %load/vec4 v0x5570afb2c180_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 10, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.27; |
| T_15.26 ; |
| %load/vec4 v0x5570afb2bc30_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.31, 4; |
| %load/vec4 v0x5570afb2bd10_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_15.31; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_15.30, 9; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.32, 4; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_15.32; |
| %and; |
| T_15.30; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.28, 8; |
| %load/vec4 v0x5570afb2bdd0_0; |
| %load/vec4 v0x5570afb2c180_0; |
| %and; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %parti/s 8, 0, 2; |
| %addi 127, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %parti/s 24, 3, 3; |
| %pad/u 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 10, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.29; |
| T_15.28 ; |
| %load/vec4 v0x5570afb2bc30_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.35, 4; |
| %load/vec4 v0x5570afb2bd10_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_15.35; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.33, 8; |
| %load/vec4 v0x5570afb2c180_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %parti/s 8, 0, 2; |
| %addi 127, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %parti/s 24, 3, 3; |
| %pad/u 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 10, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.34; |
| T_15.33 ; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.38, 4; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_15.38; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.36, 8; |
| %load/vec4 v0x5570afb2bdd0_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2bc30_0; |
| %parti/s 8, 0, 2; |
| %addi 127, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2bd10_0; |
| %parti/s 24, 3, 3; |
| %pad/u 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 10, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.37; |
| T_15.36 ; |
| %load/vec4 v0x5570afb2bc30_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %jmp/0xz T_15.39, 4; |
| %pushi/vec4 898, 0, 10; |
| %assign/vec4 v0x5570afb2bc30_0, 0; |
| %jmp T_15.40; |
| T_15.39 ; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 26, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2bd10_0, 4, 5; |
| T_15.40 ; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %jmp/0xz T_15.41, 4; |
| %pushi/vec4 898, 0, 10; |
| %assign/vec4 v0x5570afb2bfc0_0, 0; |
| %jmp T_15.42; |
| T_15.41 ; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 26, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2c0a0_0, 4, 5; |
| T_15.42 ; |
| %pushi/vec4 3, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| T_15.37 ; |
| T_15.34 ; |
| T_15.29 ; |
| T_15.27 ; |
| T_15.22 ; |
| T_15.17 ; |
| %jmp T_15.13; |
| T_15.5 ; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %load/vec4 v0x5570afb2bc30_0; |
| %cmp/s; |
| %jmp/0xz T_15.43, 5; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb2bfc0_0, 0; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftr 4; |
| %assign/vec4 v0x5570afb2c0a0_0, 0; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %parti/s 1, 0, 2; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %parti/s 1, 1, 2; |
| %or; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2c0a0_0, 4, 5; |
| %jmp T_15.44; |
| T_15.43 ; |
| %load/vec4 v0x5570afb2bc30_0; |
| %load/vec4 v0x5570afb2bfc0_0; |
| %cmp/s; |
| %jmp/0xz T_15.45, 5; |
| %load/vec4 v0x5570afb2bc30_0; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb2bc30_0, 0; |
| %load/vec4 v0x5570afb2bd10_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftr 4; |
| %assign/vec4 v0x5570afb2bd10_0, 0; |
| %load/vec4 v0x5570afb2bd10_0; |
| %parti/s 1, 0, 2; |
| %load/vec4 v0x5570afb2bd10_0; |
| %parti/s 1, 1, 2; |
| %or; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2bd10_0, 4, 5; |
| %jmp T_15.46; |
| T_15.45 ; |
| %pushi/vec4 4, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| T_15.46 ; |
| T_15.44 ; |
| %jmp T_15.13; |
| T_15.6 ; |
| %load/vec4 v0x5570afb2bc30_0; |
| %assign/vec4 v0x5570afb2cd70_0, 0; |
| %load/vec4 v0x5570afb2bdd0_0; |
| %load/vec4 v0x5570afb2c180_0; |
| %cmp/e; |
| %jmp/0xz T_15.47, 4; |
| %load/vec4 v0x5570afb2bd10_0; |
| %pad/u 28; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %pad/u 28; |
| %add; |
| %assign/vec4 v0x5570afb2c600_0, 0; |
| %load/vec4 v0x5570afb2bdd0_0; |
| %assign/vec4 v0x5570afb2cf30_0, 0; |
| %jmp T_15.48; |
| T_15.47 ; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %load/vec4 v0x5570afb2bd10_0; |
| %cmp/u; |
| %flag_or 5, 4; |
| %jmp/0xz T_15.49, 5; |
| %load/vec4 v0x5570afb2bd10_0; |
| %pad/u 28; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %pad/u 28; |
| %sub; |
| %assign/vec4 v0x5570afb2c600_0, 0; |
| %load/vec4 v0x5570afb2bdd0_0; |
| %assign/vec4 v0x5570afb2cf30_0, 0; |
| %jmp T_15.50; |
| T_15.49 ; |
| %load/vec4 v0x5570afb2c0a0_0; |
| %pad/u 28; |
| %load/vec4 v0x5570afb2bd10_0; |
| %pad/u 28; |
| %sub; |
| %assign/vec4 v0x5570afb2c600_0, 0; |
| %load/vec4 v0x5570afb2c180_0; |
| %assign/vec4 v0x5570afb2cf30_0, 0; |
| T_15.50 ; |
| T_15.48 ; |
| %pushi/vec4 5, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.13; |
| T_15.7 ; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 1, 27, 6; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.51, 8; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 24, 4, 4; |
| %assign/vec4 v0x5570afb2ce50_0, 0; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 1, 3, 3; |
| %assign/vec4 v0x5570afb2c540_0, 0; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 1, 2, 3; |
| %assign/vec4 v0x5570afb2c880_0, 0; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 1, 1, 2; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 1, 0, 2; |
| %or; |
| %assign/vec4 v0x5570afb2cbd0_0, 0; |
| %load/vec4 v0x5570afb2cd70_0; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb2cd70_0, 0; |
| %jmp T_15.52; |
| T_15.51 ; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 24, 3, 3; |
| %assign/vec4 v0x5570afb2ce50_0, 0; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 1, 2, 3; |
| %assign/vec4 v0x5570afb2c540_0, 0; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 1, 1, 2; |
| %assign/vec4 v0x5570afb2c880_0, 0; |
| %load/vec4 v0x5570afb2c600_0; |
| %parti/s 1, 0, 2; |
| %assign/vec4 v0x5570afb2cbd0_0, 0; |
| T_15.52 ; |
| %pushi/vec4 6, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.13; |
| T_15.8 ; |
| %load/vec4 v0x5570afb2ce50_0; |
| %parti/s 1, 23, 6; |
| %pad/u 32; |
| %cmpi/e 0, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.55, 4; |
| %pushi/vec4 4294967170, 0, 32; |
| %load/vec4 v0x5570afb2cd70_0; |
| %pad/s 32; |
| %cmp/s; |
| %flag_get/vec4 5; |
| %and; |
| T_15.55; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.53, 8; |
| %load/vec4 v0x5570afb2cd70_0; |
| %subi 1, 0, 10; |
| %assign/vec4 v0x5570afb2cd70_0, 0; |
| %load/vec4 v0x5570afb2ce50_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb2ce50_0, 0; |
| %load/vec4 v0x5570afb2c540_0; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2ce50_0, 4, 5; |
| %load/vec4 v0x5570afb2c880_0; |
| %assign/vec4 v0x5570afb2c540_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2c880_0, 0; |
| %jmp T_15.54; |
| T_15.53 ; |
| %pushi/vec4 7, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| T_15.54 ; |
| %jmp T_15.13; |
| T_15.9 ; |
| %load/vec4 v0x5570afb2cd70_0; |
| %pad/s 32; |
| %cmpi/s 4294967170, 0, 32; |
| %jmp/0xz T_15.56, 5; |
| %load/vec4 v0x5570afb2cd70_0; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb2cd70_0, 0; |
| %load/vec4 v0x5570afb2ce50_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftr 4; |
| %assign/vec4 v0x5570afb2ce50_0, 0; |
| %load/vec4 v0x5570afb2ce50_0; |
| %parti/s 1, 0, 2; |
| %assign/vec4 v0x5570afb2c540_0, 0; |
| %load/vec4 v0x5570afb2c540_0; |
| %assign/vec4 v0x5570afb2c880_0, 0; |
| %load/vec4 v0x5570afb2cbd0_0; |
| %load/vec4 v0x5570afb2c880_0; |
| %or; |
| %assign/vec4 v0x5570afb2cbd0_0, 0; |
| %jmp T_15.57; |
| T_15.56 ; |
| %pushi/vec4 8, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| T_15.57 ; |
| %jmp T_15.13; |
| T_15.10 ; |
| %load/vec4 v0x5570afb2c540_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_15.60, 9; |
| %load/vec4 v0x5570afb2c880_0; |
| %load/vec4 v0x5570afb2cbd0_0; |
| %or; |
| %load/vec4 v0x5570afb2ce50_0; |
| %parti/s 1, 0, 2; |
| %or; |
| %and; |
| T_15.60; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.58, 8; |
| %load/vec4 v0x5570afb2ce50_0; |
| %addi 1, 0, 24; |
| %assign/vec4 v0x5570afb2ce50_0, 0; |
| %load/vec4 v0x5570afb2ce50_0; |
| %cmpi/e 16777215, 0, 24; |
| %jmp/0xz T_15.61, 4; |
| %load/vec4 v0x5570afb2cd70_0; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb2cd70_0, 0; |
| T_15.61 ; |
| T_15.58 ; |
| %pushi/vec4 9, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.13; |
| T_15.11 ; |
| %load/vec4 v0x5570afb2ce50_0; |
| %parti/s 23, 0, 2; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2cd70_0; |
| %parti/s 8, 0, 2; |
| %addi 127, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2cf30_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2cd70_0; |
| %pad/s 32; |
| %cmpi/e 4294967170, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.65, 4; |
| %load/vec4 v0x5570afb2ce50_0; |
| %parti/s 1, 23, 6; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_15.65; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.63, 8; |
| %pushi/vec4 0, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| T_15.63 ; |
| %load/vec4 v0x5570afb2cd70_0; |
| %pad/s 32; |
| %cmpi/e 4294967170, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_15.68, 4; |
| %load/vec4 v0x5570afb2ce50_0; |
| %pushi/vec4 0, 0, 24; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_15.68; |
| %flag_set/vec4 8; |
| %jmp/0xz T_15.66, 8; |
| %pushi/vec4 0, 0, 1; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| T_15.66 ; |
| %load/vec4 v0x5570afb2cd70_0; |
| %pad/s 32; |
| %cmpi/s 127, 0, 32; |
| %flag_or 5, 4; GT is !LE |
| %flag_inv 5; |
| %jmp/0xz T_15.69, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| %load/vec4 v0x5570afb2cf30_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2cc90_0, 4, 5; |
| T_15.69 ; |
| %pushi/vec4 10, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.13; |
| T_15.12 ; |
| %pushi/vec4 1, 0, 1; |
| %assign/vec4 v0x5570afb2c6e0_0, 0; |
| %load/vec4 v0x5570afb2cc90_0; |
| %assign/vec4 v0x5570afb2c7a0_0, 0; |
| %pushi/vec4 0, 0, 4; |
| %assign/vec4 v0x5570afb2caf0_0, 0; |
| %jmp T_15.13; |
| T_15.13 ; |
| %pop/vec4 1; |
| T_15.1 ; |
| %jmp T_15; |
| .thread T_15; |
| .scope S_0x5570afb317d0; |
| T_16 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb331f0_0; |
| %pad/u 32; |
| %cmpi/e 0, 0, 32; |
| %jmp/0xz T_16.0, 4; |
| %pushi/vec4 0, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb32e80_0, 0; |
| %jmp T_16.1; |
| T_16.0 ; |
| %load/vec4 v0x5570afb33290_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.2, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.3, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.4, 6; |
| %dup/vec4; |
| %pushi/vec4 3, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.5, 6; |
| %dup/vec4; |
| %pushi/vec4 4, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.6, 6; |
| %dup/vec4; |
| %pushi/vec4 5, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.7, 6; |
| %dup/vec4; |
| %pushi/vec4 6, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.8, 6; |
| %dup/vec4; |
| %pushi/vec4 7, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.9, 6; |
| %dup/vec4; |
| %pushi/vec4 8, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.10, 6; |
| %dup/vec4; |
| %pushi/vec4 9, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.11, 6; |
| %dup/vec4; |
| %pushi/vec4 10, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.12, 6; |
| %dup/vec4; |
| %pushi/vec4 11, 0, 4; |
| %cmp/u; |
| %jmp/1 T_16.13, 6; |
| %jmp T_16.14; |
| T_16.2 ; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb32e80_0, 0; |
| %load/vec4 v0x5570afb32c20_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_16.15, 8; |
| %load/vec4 v0x5570afb32a10_0; |
| %assign/vec4 v0x5570afb32280_0, 0; |
| %load/vec4 v0x5570afb32b60_0; |
| %assign/vec4 v0x5570afb325c0_0, 0; |
| %pushi/vec4 1, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| T_16.15 ; |
| %jmp T_16.14; |
| T_16.3 ; |
| %load/vec4 v0x5570afb32280_0; |
| %parti/s 23, 0, 2; |
| %pad/u 24; |
| %assign/vec4 v0x5570afb32440_0, 0; |
| %load/vec4 v0x5570afb325c0_0; |
| %parti/s 23, 0, 2; |
| %pad/u 24; |
| %assign/vec4 v0x5570afb327d0_0, 0; |
| %load/vec4 v0x5570afb32280_0; |
| %parti/s 8, 23, 6; |
| %pad/u 10; |
| %subi 127, 0, 10; |
| %assign/vec4 v0x5570afb32360_0, 0; |
| %load/vec4 v0x5570afb325c0_0; |
| %parti/s 8, 23, 6; |
| %pad/u 10; |
| %subi 127, 0, 10; |
| %assign/vec4 v0x5570afb326f0_0, 0; |
| %load/vec4 v0x5570afb32280_0; |
| %parti/s 1, 31, 6; |
| %assign/vec4 v0x5570afb32500_0, 0; |
| %load/vec4 v0x5570afb325c0_0; |
| %parti/s 1, 31, 6; |
| %assign/vec4 v0x5570afb328b0_0, 0; |
| %pushi/vec4 2, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.14; |
| T_16.4 ; |
| %load/vec4 v0x5570afb32360_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_16.20, 4; |
| %load/vec4 v0x5570afb32440_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %and; |
| T_16.20; |
| %flag_set/vec4 8; |
| %jmp/1 T_16.19, 8; |
| %load/vec4 v0x5570afb326f0_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_16.21, 4; |
| %load/vec4 v0x5570afb327d0_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %and; |
| T_16.21; |
| %flag_set/vec4 9; |
| %flag_or 8, 9; |
| T_16.19; |
| %jmp/0xz T_16.17, 8; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 22, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 0, 0, 22; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 11, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.18; |
| T_16.17 ; |
| %load/vec4 v0x5570afb32360_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %jmp/0xz T_16.22, 4; |
| %load/vec4 v0x5570afb32500_0; |
| %load/vec4 v0x5570afb328b0_0; |
| %xor; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %load/vec4 v0x5570afb326f0_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_16.26, 4; |
| %load/vec4 v0x5570afb327d0_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_16.26; |
| %flag_set/vec4 8; |
| %jmp/0xz T_16.24, 8; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 22, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 0, 0, 22; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| T_16.24 ; |
| %pushi/vec4 11, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.23; |
| T_16.22 ; |
| %load/vec4 v0x5570afb326f0_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %jmp/0xz T_16.27, 4; |
| %load/vec4 v0x5570afb32500_0; |
| %load/vec4 v0x5570afb328b0_0; |
| %xor; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %load/vec4 v0x5570afb32360_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_16.31, 4; |
| %load/vec4 v0x5570afb32440_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_16.31; |
| %flag_set/vec4 8; |
| %jmp/0xz T_16.29, 8; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 22, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 0, 0, 22; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| T_16.29 ; |
| %pushi/vec4 11, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.28; |
| T_16.27 ; |
| %load/vec4 v0x5570afb32360_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_16.34, 4; |
| %load/vec4 v0x5570afb32440_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_16.34; |
| %flag_set/vec4 8; |
| %jmp/0xz T_16.32, 8; |
| %load/vec4 v0x5570afb32500_0; |
| %load/vec4 v0x5570afb328b0_0; |
| %xor; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 0, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 11, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.33; |
| T_16.32 ; |
| %load/vec4 v0x5570afb326f0_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_16.37, 4; |
| %load/vec4 v0x5570afb327d0_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_16.37; |
| %flag_set/vec4 8; |
| %jmp/0xz T_16.35, 8; |
| %load/vec4 v0x5570afb32500_0; |
| %load/vec4 v0x5570afb328b0_0; |
| %xor; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 0, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 11, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.36; |
| T_16.35 ; |
| %load/vec4 v0x5570afb32360_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %jmp/0xz T_16.38, 4; |
| %pushi/vec4 898, 0, 10; |
| %assign/vec4 v0x5570afb32360_0, 0; |
| %jmp T_16.39; |
| T_16.38 ; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb32440_0, 4, 5; |
| T_16.39 ; |
| %load/vec4 v0x5570afb326f0_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %jmp/0xz T_16.40, 4; |
| %pushi/vec4 898, 0, 10; |
| %assign/vec4 v0x5570afb326f0_0, 0; |
| %jmp T_16.41; |
| T_16.40 ; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb327d0_0, 4, 5; |
| T_16.41 ; |
| %pushi/vec4 3, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| T_16.36 ; |
| T_16.33 ; |
| T_16.28 ; |
| T_16.23 ; |
| T_16.18 ; |
| %jmp T_16.14; |
| T_16.5 ; |
| %load/vec4 v0x5570afb32440_0; |
| %parti/s 1, 23, 6; |
| %flag_set/vec4 8; |
| %jmp/0xz T_16.42, 8; |
| %pushi/vec4 4, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.43; |
| T_16.42 ; |
| %load/vec4 v0x5570afb32440_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb32440_0, 0; |
| %load/vec4 v0x5570afb32360_0; |
| %subi 1, 0, 10; |
| %assign/vec4 v0x5570afb32360_0, 0; |
| T_16.43 ; |
| %jmp T_16.14; |
| T_16.6 ; |
| %load/vec4 v0x5570afb327d0_0; |
| %parti/s 1, 23, 6; |
| %flag_set/vec4 8; |
| %jmp/0xz T_16.44, 8; |
| %pushi/vec4 5, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.45; |
| T_16.44 ; |
| %load/vec4 v0x5570afb327d0_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb327d0_0, 0; |
| %load/vec4 v0x5570afb326f0_0; |
| %subi 1, 0, 10; |
| %assign/vec4 v0x5570afb326f0_0, 0; |
| T_16.45 ; |
| %jmp T_16.14; |
| T_16.7 ; |
| %load/vec4 v0x5570afb32500_0; |
| %load/vec4 v0x5570afb328b0_0; |
| %xor; |
| %assign/vec4 v0x5570afb336d0_0, 0; |
| %load/vec4 v0x5570afb32360_0; |
| %load/vec4 v0x5570afb326f0_0; |
| %add; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb33510_0, 0; |
| %load/vec4 v0x5570afb32440_0; |
| %pad/u 48; |
| %load/vec4 v0x5570afb327d0_0; |
| %pad/u 48; |
| %mul; |
| %assign/vec4 v0x5570afb32da0_0, 0; |
| %pushi/vec4 6, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.14; |
| T_16.8 ; |
| %load/vec4 v0x5570afb32da0_0; |
| %parti/s 24, 24, 6; |
| %assign/vec4 v0x5570afb335f0_0, 0; |
| %load/vec4 v0x5570afb32da0_0; |
| %parti/s 1, 23, 6; |
| %assign/vec4 v0x5570afb32ce0_0, 0; |
| %load/vec4 v0x5570afb32da0_0; |
| %parti/s 1, 22, 6; |
| %assign/vec4 v0x5570afb33020_0, 0; |
| %load/vec4 v0x5570afb32da0_0; |
| %parti/s 22, 0, 2; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %assign/vec4 v0x5570afb33370_0, 0; |
| %pushi/vec4 7, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.14; |
| T_16.9 ; |
| %load/vec4 v0x5570afb335f0_0; |
| %parti/s 1, 23, 6; |
| %pad/u 32; |
| %cmpi/e 0, 0, 32; |
| %jmp/0xz T_16.46, 4; |
| %load/vec4 v0x5570afb33510_0; |
| %subi 1, 0, 10; |
| %assign/vec4 v0x5570afb33510_0, 0; |
| %load/vec4 v0x5570afb335f0_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb335f0_0, 0; |
| %load/vec4 v0x5570afb32ce0_0; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb335f0_0, 4, 5; |
| %load/vec4 v0x5570afb33020_0; |
| %assign/vec4 v0x5570afb32ce0_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb33020_0, 0; |
| %jmp T_16.47; |
| T_16.46 ; |
| %pushi/vec4 8, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| T_16.47 ; |
| %jmp T_16.14; |
| T_16.10 ; |
| %load/vec4 v0x5570afb33510_0; |
| %pad/s 32; |
| %cmpi/s 4294967170, 0, 32; |
| %jmp/0xz T_16.48, 5; |
| %load/vec4 v0x5570afb33510_0; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb33510_0, 0; |
| %load/vec4 v0x5570afb335f0_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftr 4; |
| %assign/vec4 v0x5570afb335f0_0, 0; |
| %load/vec4 v0x5570afb335f0_0; |
| %parti/s 1, 0, 2; |
| %assign/vec4 v0x5570afb32ce0_0, 0; |
| %load/vec4 v0x5570afb32ce0_0; |
| %assign/vec4 v0x5570afb33020_0, 0; |
| %load/vec4 v0x5570afb33370_0; |
| %load/vec4 v0x5570afb33020_0; |
| %or; |
| %assign/vec4 v0x5570afb33370_0, 0; |
| %jmp T_16.49; |
| T_16.48 ; |
| %pushi/vec4 9, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| T_16.49 ; |
| %jmp T_16.14; |
| T_16.11 ; |
| %load/vec4 v0x5570afb32ce0_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_16.52, 9; |
| %load/vec4 v0x5570afb33020_0; |
| %load/vec4 v0x5570afb33370_0; |
| %or; |
| %load/vec4 v0x5570afb335f0_0; |
| %parti/s 1, 0, 2; |
| %or; |
| %and; |
| T_16.52; |
| %flag_set/vec4 8; |
| %jmp/0xz T_16.50, 8; |
| %load/vec4 v0x5570afb335f0_0; |
| %addi 1, 0, 24; |
| %assign/vec4 v0x5570afb335f0_0, 0; |
| %load/vec4 v0x5570afb335f0_0; |
| %cmpi/e 16777215, 0, 24; |
| %jmp/0xz T_16.53, 4; |
| %load/vec4 v0x5570afb33510_0; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb33510_0, 0; |
| T_16.53 ; |
| T_16.50 ; |
| %pushi/vec4 10, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.14; |
| T_16.12 ; |
| %load/vec4 v0x5570afb335f0_0; |
| %parti/s 23, 0, 2; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %load/vec4 v0x5570afb33510_0; |
| %parti/s 8, 0, 2; |
| %addi 127, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %load/vec4 v0x5570afb336d0_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %load/vec4 v0x5570afb33510_0; |
| %pad/s 32; |
| %cmpi/e 4294967170, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_16.57, 4; |
| %load/vec4 v0x5570afb335f0_0; |
| %parti/s 1, 23, 6; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_16.57; |
| %flag_set/vec4 8; |
| %jmp/0xz T_16.55, 8; |
| %pushi/vec4 0, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| T_16.55 ; |
| %load/vec4 v0x5570afb33510_0; |
| %pad/s 32; |
| %cmpi/s 127, 0, 32; |
| %flag_or 5, 4; GT is !LE |
| %flag_inv 5; |
| %jmp/0xz T_16.58, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| %load/vec4 v0x5570afb336d0_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb33430_0, 4, 5; |
| T_16.58 ; |
| %pushi/vec4 11, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.14; |
| T_16.13 ; |
| %pushi/vec4 1, 0, 1; |
| %assign/vec4 v0x5570afb32e80_0, 0; |
| %load/vec4 v0x5570afb33430_0; |
| %assign/vec4 v0x5570afb32f40_0, 0; |
| %pushi/vec4 0, 0, 4; |
| %assign/vec4 v0x5570afb33290_0, 0; |
| %jmp T_16.14; |
| T_16.14 ; |
| %pop/vec4 1; |
| T_16.1 ; |
| %jmp T_16; |
| .thread T_16; |
| .scope S_0x5570afab4b20; |
| T_17 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb2ee00_0; |
| %pad/u 32; |
| %cmpi/e 0, 0, 32; |
| %jmp/0xz T_17.0, 4; |
| %pushi/vec4 0, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2eac0_0, 0; |
| %jmp T_17.1; |
| T_17.0 ; |
| %load/vec4 v0x5570afb2eea0_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.2, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.3, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.4, 6; |
| %dup/vec4; |
| %pushi/vec4 3, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.5, 6; |
| %dup/vec4; |
| %pushi/vec4 4, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.6, 6; |
| %dup/vec4; |
| %pushi/vec4 5, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.7, 6; |
| %dup/vec4; |
| %pushi/vec4 6, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.8, 6; |
| %dup/vec4; |
| %pushi/vec4 7, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.9, 6; |
| %dup/vec4; |
| %pushi/vec4 8, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.10, 6; |
| %dup/vec4; |
| %pushi/vec4 9, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.11, 6; |
| %dup/vec4; |
| %pushi/vec4 10, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.12, 6; |
| %dup/vec4; |
| %pushi/vec4 11, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.13, 6; |
| %dup/vec4; |
| %pushi/vec4 12, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.14, 6; |
| %dup/vec4; |
| %pushi/vec4 13, 0, 4; |
| %cmp/u; |
| %jmp/1 T_17.15, 6; |
| %jmp T_17.16; |
| T_17.2 ; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2eac0_0, 0; |
| %load/vec4 v0x5570afb2e750_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.17, 8; |
| %load/vec4 v0x5570afb2e450_0; |
| %assign/vec4 v0x5570afb2dbe0_0, 0; |
| %load/vec4 v0x5570afb2e510_0; |
| %assign/vec4 v0x5570afb2df20_0, 0; |
| %pushi/vec4 1, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| T_17.17 ; |
| %jmp T_17.16; |
| T_17.3 ; |
| %load/vec4 v0x5570afb2dbe0_0; |
| %parti/s 23, 0, 2; |
| %pad/u 24; |
| %assign/vec4 v0x5570afb2dda0_0, 0; |
| %load/vec4 v0x5570afb2df20_0; |
| %parti/s 23, 0, 2; |
| %pad/u 24; |
| %assign/vec4 v0x5570afb2e130_0, 0; |
| %load/vec4 v0x5570afb2dbe0_0; |
| %parti/s 8, 23, 6; |
| %pad/u 10; |
| %subi 127, 0, 10; |
| %assign/vec4 v0x5570afb2dcc0_0, 0; |
| %load/vec4 v0x5570afb2df20_0; |
| %parti/s 8, 23, 6; |
| %pad/u 10; |
| %subi 127, 0, 10; |
| %assign/vec4 v0x5570afb2e050_0, 0; |
| %load/vec4 v0x5570afb2dbe0_0; |
| %parti/s 1, 31, 6; |
| %assign/vec4 v0x5570afb2de60_0, 0; |
| %load/vec4 v0x5570afb2df20_0; |
| %parti/s 1, 31, 6; |
| %assign/vec4 v0x5570afb2e210_0, 0; |
| %pushi/vec4 2, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.16; |
| T_17.4 ; |
| %load/vec4 v0x5570afb2dcc0_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_17.22, 4; |
| %load/vec4 v0x5570afb2dda0_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %and; |
| T_17.22; |
| %flag_set/vec4 8; |
| %jmp/1 T_17.21, 8; |
| %load/vec4 v0x5570afb2e050_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_17.23, 4; |
| %load/vec4 v0x5570afb2e130_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %and; |
| T_17.23; |
| %flag_set/vec4 9; |
| %flag_or 8, 9; |
| T_17.21; |
| %jmp/0xz T_17.19, 8; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 22, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 22; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 13, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.20; |
| T_17.19 ; |
| %load/vec4 v0x5570afb2dcc0_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_17.26, 4; |
| %load/vec4 v0x5570afb2e050_0; |
| %pad/u 32; |
| %pushi/vec4 128, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_17.26; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.24, 8; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 22, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 22; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 13, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.25; |
| T_17.24 ; |
| %load/vec4 v0x5570afb2dcc0_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %jmp/0xz T_17.27, 4; |
| %load/vec4 v0x5570afb2de60_0; |
| %load/vec4 v0x5570afb2e210_0; |
| %xor; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 13, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %load/vec4 v0x5570afb2e050_0; |
| %pad/u 32; |
| %pushi/vec4 4294967169, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_17.31, 9; |
| %load/vec4 v0x5570afb2e130_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_17.31; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.29, 8; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 22, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 22; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 13, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| T_17.29 ; |
| %jmp T_17.28; |
| T_17.27 ; |
| %load/vec4 v0x5570afb2e050_0; |
| %pad/u 32; |
| %cmpi/e 128, 0, 32; |
| %jmp/0xz T_17.32, 4; |
| %load/vec4 v0x5570afb2de60_0; |
| %load/vec4 v0x5570afb2e210_0; |
| %xor; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 13, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.33; |
| T_17.32 ; |
| %load/vec4 v0x5570afb2dcc0_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_17.36, 4; |
| %load/vec4 v0x5570afb2dda0_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_17.36; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.34, 8; |
| %load/vec4 v0x5570afb2de60_0; |
| %load/vec4 v0x5570afb2e210_0; |
| %xor; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 13, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %load/vec4 v0x5570afb2e050_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_17.39, 4; |
| %load/vec4 v0x5570afb2e130_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_17.39; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.37, 8; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 22, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 22; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 13, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| T_17.37 ; |
| %jmp T_17.35; |
| T_17.34 ; |
| %load/vec4 v0x5570afb2e050_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_17.42, 4; |
| %load/vec4 v0x5570afb2e130_0; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_17.42; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.40, 8; |
| %load/vec4 v0x5570afb2de60_0; |
| %load/vec4 v0x5570afb2e210_0; |
| %xor; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 13, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.41; |
| T_17.40 ; |
| %load/vec4 v0x5570afb2dcc0_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %jmp/0xz T_17.43, 4; |
| %pushi/vec4 898, 0, 10; |
| %assign/vec4 v0x5570afb2dcc0_0, 0; |
| %jmp T_17.44; |
| T_17.43 ; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2dda0_0, 4, 5; |
| T_17.44 ; |
| %load/vec4 v0x5570afb2e050_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %jmp/0xz T_17.45, 4; |
| %pushi/vec4 898, 0, 10; |
| %assign/vec4 v0x5570afb2e050_0, 0; |
| %jmp T_17.46; |
| T_17.45 ; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2e130_0, 4, 5; |
| T_17.46 ; |
| %pushi/vec4 3, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| T_17.41 ; |
| T_17.35 ; |
| T_17.33 ; |
| T_17.28 ; |
| T_17.25 ; |
| T_17.20 ; |
| %jmp T_17.16; |
| T_17.5 ; |
| %load/vec4 v0x5570afb2dda0_0; |
| %parti/s 1, 23, 6; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.47, 8; |
| %pushi/vec4 4, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.48; |
| T_17.47 ; |
| %load/vec4 v0x5570afb2dda0_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb2dda0_0, 0; |
| %load/vec4 v0x5570afb2dcc0_0; |
| %subi 1, 0, 10; |
| %assign/vec4 v0x5570afb2dcc0_0, 0; |
| T_17.48 ; |
| %jmp T_17.16; |
| T_17.6 ; |
| %load/vec4 v0x5570afb2e130_0; |
| %parti/s 1, 23, 6; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.49, 8; |
| %pushi/vec4 5, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.50; |
| T_17.49 ; |
| %load/vec4 v0x5570afb2e130_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb2e130_0, 0; |
| %load/vec4 v0x5570afb2e050_0; |
| %subi 1, 0, 10; |
| %assign/vec4 v0x5570afb2e050_0, 0; |
| T_17.50 ; |
| %jmp T_17.16; |
| T_17.7 ; |
| %load/vec4 v0x5570afb2de60_0; |
| %load/vec4 v0x5570afb2e210_0; |
| %xor; |
| %assign/vec4 v0x5570afb2f2e0_0, 0; |
| %load/vec4 v0x5570afb2dcc0_0; |
| %load/vec4 v0x5570afb2e050_0; |
| %sub; |
| %assign/vec4 v0x5570afb2f120_0, 0; |
| %pushi/vec4 0, 0, 51; |
| %assign/vec4 v0x5570afb2e8d0_0, 0; |
| %pushi/vec4 0, 0, 51; |
| %assign/vec4 v0x5570afb2eb80_0, 0; |
| %pushi/vec4 0, 0, 6; |
| %assign/vec4 v0x5570afb2e370_0, 0; |
| %load/vec4 v0x5570afb2dda0_0; |
| %pad/u 51; |
| %ix/load 4, 27, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb2e5b0_0, 0; |
| %load/vec4 v0x5570afb2e130_0; |
| %pad/u 51; |
| %assign/vec4 v0x5570afb2e670_0, 0; |
| %pushi/vec4 6, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.16; |
| T_17.8 ; |
| %load/vec4 v0x5570afb2e8d0_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb2e8d0_0, 0; |
| %load/vec4 v0x5570afb2eb80_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb2eb80_0, 0; |
| %load/vec4 v0x5570afb2e5b0_0; |
| %parti/s 1, 50, 7; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2eb80_0, 4, 5; |
| %load/vec4 v0x5570afb2e5b0_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb2e5b0_0, 0; |
| %pushi/vec4 7, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.16; |
| T_17.9 ; |
| %load/vec4 v0x5570afb2e670_0; |
| %load/vec4 v0x5570afb2eb80_0; |
| %cmp/u; |
| %flag_or 5, 4; |
| %jmp/0xz T_17.51, 5; |
| %pushi/vec4 1, 0, 1; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2e8d0_0, 4, 5; |
| %load/vec4 v0x5570afb2eb80_0; |
| %load/vec4 v0x5570afb2e670_0; |
| %sub; |
| %assign/vec4 v0x5570afb2eb80_0, 0; |
| T_17.51 ; |
| %load/vec4 v0x5570afb2e370_0; |
| %pad/u 32; |
| %cmpi/e 49, 0, 32; |
| %jmp/0xz T_17.53, 4; |
| %pushi/vec4 8, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.54; |
| T_17.53 ; |
| %load/vec4 v0x5570afb2e370_0; |
| %addi 1, 0, 6; |
| %assign/vec4 v0x5570afb2e370_0, 0; |
| %pushi/vec4 6, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| T_17.54 ; |
| %jmp T_17.16; |
| T_17.10 ; |
| %load/vec4 v0x5570afb2e8d0_0; |
| %parti/s 24, 3, 3; |
| %assign/vec4 v0x5570afb2f200_0, 0; |
| %load/vec4 v0x5570afb2e8d0_0; |
| %parti/s 1, 2, 3; |
| %assign/vec4 v0x5570afb2e810_0, 0; |
| %load/vec4 v0x5570afb2e8d0_0; |
| %parti/s 1, 1, 2; |
| %assign/vec4 v0x5570afb2ed40_0, 0; |
| %load/vec4 v0x5570afb2e8d0_0; |
| %parti/s 1, 0, 2; |
| %load/vec4 v0x5570afb2eb80_0; |
| %pushi/vec4 0, 0, 51; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %or; |
| %assign/vec4 v0x5570afb2ef80_0, 0; |
| %pushi/vec4 9, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.16; |
| T_17.11 ; |
| %load/vec4 v0x5570afb2f200_0; |
| %parti/s 1, 23, 6; |
| %pad/u 32; |
| %cmpi/e 0, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_17.57, 4; |
| %pushi/vec4 4294967170, 0, 32; |
| %load/vec4 v0x5570afb2f120_0; |
| %pad/s 32; |
| %cmp/s; |
| %flag_get/vec4 5; |
| %and; |
| T_17.57; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.55, 8; |
| %load/vec4 v0x5570afb2f120_0; |
| %subi 1, 0, 10; |
| %assign/vec4 v0x5570afb2f120_0, 0; |
| %load/vec4 v0x5570afb2f200_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb2f200_0, 0; |
| %load/vec4 v0x5570afb2e810_0; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f200_0, 4, 5; |
| %load/vec4 v0x5570afb2ed40_0; |
| %assign/vec4 v0x5570afb2e810_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2ed40_0, 0; |
| %jmp T_17.56; |
| T_17.55 ; |
| %pushi/vec4 10, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| T_17.56 ; |
| %jmp T_17.16; |
| T_17.12 ; |
| %load/vec4 v0x5570afb2f120_0; |
| %pad/s 32; |
| %cmpi/s 4294967170, 0, 32; |
| %jmp/0xz T_17.58, 5; |
| %load/vec4 v0x5570afb2f120_0; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb2f120_0, 0; |
| %load/vec4 v0x5570afb2f200_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftr 4; |
| %assign/vec4 v0x5570afb2f200_0, 0; |
| %load/vec4 v0x5570afb2f200_0; |
| %parti/s 1, 0, 2; |
| %assign/vec4 v0x5570afb2e810_0, 0; |
| %load/vec4 v0x5570afb2e810_0; |
| %assign/vec4 v0x5570afb2ed40_0, 0; |
| %load/vec4 v0x5570afb2ef80_0; |
| %load/vec4 v0x5570afb2ed40_0; |
| %or; |
| %assign/vec4 v0x5570afb2ef80_0, 0; |
| %jmp T_17.59; |
| T_17.58 ; |
| %pushi/vec4 11, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| T_17.59 ; |
| %jmp T_17.16; |
| T_17.13 ; |
| %load/vec4 v0x5570afb2e810_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_17.62, 9; |
| %load/vec4 v0x5570afb2ed40_0; |
| %load/vec4 v0x5570afb2ef80_0; |
| %or; |
| %load/vec4 v0x5570afb2f200_0; |
| %parti/s 1, 0, 2; |
| %or; |
| %and; |
| T_17.62; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.60, 8; |
| %load/vec4 v0x5570afb2f200_0; |
| %addi 1, 0, 24; |
| %assign/vec4 v0x5570afb2f200_0, 0; |
| %load/vec4 v0x5570afb2f200_0; |
| %cmpi/e 16777215, 0, 24; |
| %jmp/0xz T_17.63, 4; |
| %load/vec4 v0x5570afb2f120_0; |
| %addi 1, 0, 10; |
| %assign/vec4 v0x5570afb2f120_0, 0; |
| T_17.63 ; |
| T_17.60 ; |
| %pushi/vec4 12, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.16; |
| T_17.14 ; |
| %load/vec4 v0x5570afb2f200_0; |
| %parti/s 23, 0, 2; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %load/vec4 v0x5570afb2f120_0; |
| %parti/s 8, 0, 2; |
| %addi 127, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %load/vec4 v0x5570afb2f2e0_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %load/vec4 v0x5570afb2f120_0; |
| %pad/s 32; |
| %cmpi/e 4294967170, 0, 32; |
| %flag_get/vec4 4; |
| %jmp/0 T_17.67, 4; |
| %load/vec4 v0x5570afb2f200_0; |
| %parti/s 1, 23, 6; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/e; |
| %flag_get/vec4 4; |
| %and; |
| T_17.67; |
| %flag_set/vec4 8; |
| %jmp/0xz T_17.65, 8; |
| %pushi/vec4 0, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| T_17.65 ; |
| %load/vec4 v0x5570afb2f120_0; |
| %pad/s 32; |
| %cmpi/s 127, 0, 32; |
| %flag_or 5, 4; GT is !LE |
| %flag_inv 5; |
| %jmp/0xz T_17.68, 5; |
| %pushi/vec4 0, 0, 23; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %pushi/vec4 255, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| %load/vec4 v0x5570afb2f2e0_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2f040_0, 4, 5; |
| T_17.68 ; |
| %pushi/vec4 13, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.16; |
| T_17.15 ; |
| %pushi/vec4 1, 0, 1; |
| %assign/vec4 v0x5570afb2eac0_0, 0; |
| %load/vec4 v0x5570afb2f040_0; |
| %assign/vec4 v0x5570afb2ec60_0, 0; |
| %pushi/vec4 0, 0, 4; |
| %assign/vec4 v0x5570afb2eea0_0, 0; |
| %jmp T_17.16; |
| T_17.16 ; |
| %pop/vec4 1; |
| T_17.1 ; |
| %jmp T_17; |
| .thread T_17; |
| .scope S_0x5570afab4ea0; |
| T_18 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb30130_0; |
| %pad/u 32; |
| %cmpi/e 0, 0, 32; |
| %jmp/0xz T_18.0, 4; |
| %pushi/vec4 0, 0, 3; |
| %assign/vec4 v0x5570afb301d0_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2ff90_0, 0; |
| %jmp T_18.1; |
| T_18.0 ; |
| %load/vec4 v0x5570afb301d0_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 3; |
| %cmp/u; |
| %jmp/1 T_18.2, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 3; |
| %cmp/u; |
| %jmp/1 T_18.3, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 3; |
| %cmp/u; |
| %jmp/1 T_18.4, 6; |
| %dup/vec4; |
| %pushi/vec4 3, 0, 3; |
| %cmp/u; |
| %jmp/1 T_18.5, 6; |
| %dup/vec4; |
| %pushi/vec4 4, 0, 3; |
| %cmp/u; |
| %jmp/1 T_18.6, 6; |
| %jmp T_18.7; |
| T_18.2 ; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb2ff90_0, 0; |
| %load/vec4 v0x5570afb2fed0_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_18.8, 8; |
| %load/vec4 v0x5570afb2fdc0_0; |
| %assign/vec4 v0x5570afb2f960_0, 0; |
| %pushi/vec4 2, 0, 3; |
| %assign/vec4 v0x5570afb301d0_0, 0; |
| T_18.8 ; |
| %jmp T_18.7; |
| T_18.3 ; |
| %pushi/vec4 1, 0, 1; |
| %load/vec4 v0x5570afb2f960_0; |
| %parti/s 23, 0, 2; |
| %concat/vec4; draw_concat_vec4 |
| %ix/load 4, 8, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2fb20_0, 4, 5; |
| %pushi/vec4 0, 0, 8; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb2fb20_0, 4, 5; |
| %load/vec4 v0x5570afb2f960_0; |
| %parti/s 8, 23, 6; |
| %pad/u 9; |
| %subi 127, 0, 9; |
| %assign/vec4 v0x5570afb2fa40_0, 0; |
| %load/vec4 v0x5570afb2f960_0; |
| %parti/s 1, 31, 6; |
| %assign/vec4 v0x5570afb2fc10_0, 0; |
| %pushi/vec4 1, 0, 3; |
| %assign/vec4 v0x5570afb301d0_0, 0; |
| %jmp T_18.7; |
| T_18.4 ; |
| %load/vec4 v0x5570afb2fa40_0; |
| %pad/s 32; |
| %cmpi/e 4294967169, 0, 32; |
| %jmp/0xz T_18.10, 4; |
| %pushi/vec4 0, 0, 32; |
| %assign/vec4 v0x5570afb302b0_0, 0; |
| %pushi/vec4 4, 0, 3; |
| %assign/vec4 v0x5570afb301d0_0, 0; |
| %jmp T_18.11; |
| T_18.10 ; |
| %load/vec4 v0x5570afb2fa40_0; |
| %pad/s 32; |
| %cmpi/s 31, 0, 32; |
| %flag_or 5, 4; GT is !LE |
| %flag_inv 5; |
| %jmp/0xz T_18.12, 5; |
| %pushi/vec4 2147483648, 0, 32; |
| %assign/vec4 v0x5570afb302b0_0, 0; |
| %pushi/vec4 4, 0, 3; |
| %assign/vec4 v0x5570afb301d0_0, 0; |
| %jmp T_18.13; |
| T_18.12 ; |
| %pushi/vec4 3, 0, 3; |
| %assign/vec4 v0x5570afb301d0_0, 0; |
| T_18.13 ; |
| T_18.11 ; |
| %jmp T_18.7; |
| T_18.5 ; |
| %load/vec4 v0x5570afb2fa40_0; |
| %pad/s 32; |
| %cmpi/s 31, 0, 32; |
| %flag_get/vec4 5; |
| %jmp/0 T_18.16, 5; |
| %load/vec4 v0x5570afb2fb20_0; |
| %pushi/vec4 0, 0, 32; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %and; |
| T_18.16; |
| %flag_set/vec4 8; |
| %jmp/0xz T_18.14, 8; |
| %load/vec4 v0x5570afb2fa40_0; |
| %addi 1, 0, 9; |
| %assign/vec4 v0x5570afb2fa40_0, 0; |
| %load/vec4 v0x5570afb2fb20_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftr 4; |
| %assign/vec4 v0x5570afb2fb20_0, 0; |
| %jmp T_18.15; |
| T_18.14 ; |
| %load/vec4 v0x5570afb2fb20_0; |
| %parti/s 1, 31, 6; |
| %flag_set/vec4 8; |
| %jmp/0xz T_18.17, 8; |
| %pushi/vec4 2147483648, 0, 32; |
| %assign/vec4 v0x5570afb302b0_0, 0; |
| %jmp T_18.18; |
| T_18.17 ; |
| %load/vec4 v0x5570afb2fc10_0; |
| %flag_set/vec4 8; |
| %jmp/0 T_18.19, 8; |
| %load/vec4 v0x5570afb2fb20_0; |
| %inv; |
| %pushi/vec4 1, 0, 32; |
| %add; |
| %jmp/1 T_18.20, 8; |
| T_18.19 ; End of true expr. |
| %load/vec4 v0x5570afb2fb20_0; |
| %jmp/0 T_18.20, 8; |
| ; End of false expr. |
| %blend; |
| T_18.20; |
| %assign/vec4 v0x5570afb302b0_0, 0; |
| T_18.18 ; |
| %pushi/vec4 4, 0, 3; |
| %assign/vec4 v0x5570afb301d0_0, 0; |
| T_18.15 ; |
| %jmp T_18.7; |
| T_18.6 ; |
| %pushi/vec4 1, 0, 1; |
| %assign/vec4 v0x5570afb2ff90_0, 0; |
| %load/vec4 v0x5570afb302b0_0; |
| %assign/vec4 v0x5570afb30050_0, 0; |
| %pushi/vec4 0, 0, 3; |
| %assign/vec4 v0x5570afb301d0_0, 0; |
| %jmp T_18.7; |
| T_18.7 ; |
| %pop/vec4 1; |
| T_18.1 ; |
| %jmp T_18; |
| .thread T_18; |
| .scope S_0x5570afab5220; |
| T_19 ; |
| %wait E_0x5570afb2bad0; |
| %load/vec4 v0x5570afb30e60_0; |
| %pad/u 32; |
| %cmpi/e 0, 0, 32; |
| %jmp/0xz T_19.0, 4; |
| %pushi/vec4 0, 0, 3; |
| %assign/vec4 v0x5570afb30f00_0, 0; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb30c00_0, 0; |
| %jmp T_19.1; |
| T_19.0 ; |
| %load/vec4 v0x5570afb30f00_0; |
| %dup/vec4; |
| %pushi/vec4 0, 0, 3; |
| %cmp/u; |
| %jmp/1 T_19.2, 6; |
| %dup/vec4; |
| %pushi/vec4 1, 0, 3; |
| %cmp/u; |
| %jmp/1 T_19.3, 6; |
| %dup/vec4; |
| %pushi/vec4 2, 0, 3; |
| %cmp/u; |
| %jmp/1 T_19.4, 6; |
| %dup/vec4; |
| %pushi/vec4 3, 0, 3; |
| %cmp/u; |
| %jmp/1 T_19.5, 6; |
| %dup/vec4; |
| %pushi/vec4 4, 0, 3; |
| %cmp/u; |
| %jmp/1 T_19.6, 6; |
| %dup/vec4; |
| %pushi/vec4 5, 0, 3; |
| %cmp/u; |
| %jmp/1 T_19.7, 6; |
| %dup/vec4; |
| %pushi/vec4 6, 0, 3; |
| %cmp/u; |
| %jmp/1 T_19.8, 6; |
| %jmp T_19.9; |
| T_19.2 ; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb30c00_0, 0; |
| %load/vec4 v0x5570afb30aa0_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_19.10, 8; |
| %load/vec4 v0x5570afb30a00_0; |
| %assign/vec4 v0x5570afb30860_0, 0; |
| %pushi/vec4 1, 0, 3; |
| %assign/vec4 v0x5570afb30f00_0, 0; |
| T_19.10 ; |
| %jmp T_19.9; |
| T_19.3 ; |
| %load/vec4 v0x5570afb30860_0; |
| %cmpi/e 0, 0, 32; |
| %jmp/0xz T_19.12, 4; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb31500_0, 0; |
| %pushi/vec4 0, 0, 24; |
| %assign/vec4 v0x5570afb31340_0, 0; |
| %pushi/vec4 129, 0, 8; |
| %assign/vec4 v0x5570afb31260_0, 0; |
| %pushi/vec4 5, 0, 3; |
| %assign/vec4 v0x5570afb30f00_0, 0; |
| %jmp T_19.13; |
| T_19.12 ; |
| %load/vec4 v0x5570afb30860_0; |
| %parti/s 1, 31, 6; |
| %flag_set/vec4 8; |
| %jmp/0 T_19.14, 8; |
| %load/vec4 v0x5570afb30860_0; |
| %inv; |
| %pushi/vec4 1, 0, 32; |
| %add; |
| %jmp/1 T_19.15, 8; |
| T_19.14 ; End of true expr. |
| %load/vec4 v0x5570afb30860_0; |
| %jmp/0 T_19.15, 8; |
| ; End of false expr. |
| %blend; |
| T_19.15; |
| %assign/vec4 v0x5570afb310a0_0, 0; |
| %load/vec4 v0x5570afb30860_0; |
| %parti/s 1, 31, 6; |
| %assign/vec4 v0x5570afb31500_0, 0; |
| %pushi/vec4 2, 0, 3; |
| %assign/vec4 v0x5570afb30f00_0, 0; |
| T_19.13 ; |
| %jmp T_19.9; |
| T_19.4 ; |
| %pushi/vec4 31, 0, 8; |
| %assign/vec4 v0x5570afb31260_0, 0; |
| %load/vec4 v0x5570afb310a0_0; |
| %parti/s 24, 8, 5; |
| %assign/vec4 v0x5570afb31340_0, 0; |
| %load/vec4 v0x5570afb310a0_0; |
| %parti/s 8, 0, 2; |
| %assign/vec4 v0x5570afb31420_0, 0; |
| %pushi/vec4 3, 0, 3; |
| %assign/vec4 v0x5570afb30f00_0, 0; |
| %jmp T_19.9; |
| T_19.5 ; |
| %load/vec4 v0x5570afb31340_0; |
| %parti/s 1, 23, 6; |
| %nor/r; |
| %flag_set/vec4 8; |
| %jmp/0xz T_19.16, 8; |
| %load/vec4 v0x5570afb31260_0; |
| %subi 1, 0, 8; |
| %assign/vec4 v0x5570afb31260_0, 0; |
| %load/vec4 v0x5570afb31340_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb31340_0, 0; |
| %load/vec4 v0x5570afb31420_0; |
| %parti/s 1, 7, 4; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb31340_0, 4, 5; |
| %load/vec4 v0x5570afb31420_0; |
| %ix/load 4, 1, 0; |
| %flag_set/imm 4, 0; |
| %shiftl 4; |
| %assign/vec4 v0x5570afb31420_0, 0; |
| %jmp T_19.17; |
| T_19.16 ; |
| %load/vec4 v0x5570afb31420_0; |
| %parti/s 1, 7, 4; |
| %assign/vec4 v0x5570afb30b40_0, 0; |
| %load/vec4 v0x5570afb31420_0; |
| %parti/s 1, 6, 4; |
| %assign/vec4 v0x5570afb30da0_0, 0; |
| %load/vec4 v0x5570afb31420_0; |
| %parti/s 6, 0, 2; |
| %pad/u 32; |
| %pushi/vec4 0, 0, 32; |
| %cmp/ne; |
| %flag_get/vec4 4; |
| %assign/vec4 v0x5570afb30fe0_0, 0; |
| %pushi/vec4 4, 0, 3; |
| %assign/vec4 v0x5570afb30f00_0, 0; |
| T_19.17 ; |
| %jmp T_19.9; |
| T_19.6 ; |
| %load/vec4 v0x5570afb30b40_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_19.20, 9; |
| %load/vec4 v0x5570afb30da0_0; |
| %flag_set/vec4 9; |
| %jmp/1 T_19.22, 9; |
| %load/vec4 v0x5570afb30fe0_0; |
| %flag_set/vec4 10; |
| %flag_or 9, 10; |
| T_19.22; |
| %flag_get/vec4 9; |
| %jmp/1 T_19.21, 9; |
| %load/vec4 v0x5570afb31340_0; |
| %parti/s 1, 0, 2; |
| %or; |
| T_19.21; |
| %and; |
| T_19.20; |
| %flag_set/vec4 8; |
| %jmp/0xz T_19.18, 8; |
| %load/vec4 v0x5570afb31340_0; |
| %addi 1, 0, 24; |
| %assign/vec4 v0x5570afb31340_0, 0; |
| %load/vec4 v0x5570afb31340_0; |
| %cmpi/e 16777215, 0, 24; |
| %jmp/0xz T_19.23, 4; |
| %load/vec4 v0x5570afb31260_0; |
| %addi 1, 0, 8; |
| %assign/vec4 v0x5570afb31260_0, 0; |
| T_19.23 ; |
| T_19.18 ; |
| %pushi/vec4 5, 0, 3; |
| %assign/vec4 v0x5570afb30f00_0, 0; |
| %jmp T_19.9; |
| T_19.7 ; |
| %load/vec4 v0x5570afb31340_0; |
| %parti/s 23, 0, 2; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb31180_0, 4, 5; |
| %load/vec4 v0x5570afb31260_0; |
| %addi 127, 0, 8; |
| %ix/load 4, 23, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb31180_0, 4, 5; |
| %load/vec4 v0x5570afb31500_0; |
| %ix/load 4, 31, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb31180_0, 4, 5; |
| %pushi/vec4 6, 0, 3; |
| %assign/vec4 v0x5570afb30f00_0, 0; |
| %jmp T_19.9; |
| T_19.8 ; |
| %pushi/vec4 1, 0, 1; |
| %assign/vec4 v0x5570afb30c00_0, 0; |
| %load/vec4 v0x5570afb31180_0; |
| %assign/vec4 v0x5570afb30cc0_0, 0; |
| %pushi/vec4 0, 0, 3; |
| %assign/vec4 v0x5570afb30f00_0, 0; |
| %jmp T_19.9; |
| T_19.9 ; |
| %pop/vec4 1; |
| T_19.1 ; |
| %jmp T_19; |
| .thread T_19; |
| .scope S_0x5570afab3d20; |
| T_20 ; |
| %wait E_0x5570afb4fec0; |
| %load/vec4 v0x5570afb50220_0; |
| %cmpi/e 0, 0, 1; |
| %jmp/0xz T_20.0, 4; |
| %pushi/vec4 0, 0, 16; |
| %assign/vec4 v0x5570afb50140_0, 0; |
| %jmp T_20.1; |
| T_20.0 ; |
| %load/vec4 v0x5570afb4ffc0_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_20.4, 9; |
| %load/vec4 v0x5570afb50330_0; |
| %parti/s 1, 0, 2; |
| %and; |
| T_20.4; |
| %flag_set/vec4 8; |
| %jmp/0xz T_20.2, 8; |
| %load/vec4 v0x5570afb50080_0; |
| %parti/s 8, 0, 2; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb50140_0, 4, 5; |
| T_20.2 ; |
| %load/vec4 v0x5570afb4ffc0_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_20.7, 9; |
| %load/vec4 v0x5570afb50330_0; |
| %parti/s 1, 1, 2; |
| %and; |
| T_20.7; |
| %flag_set/vec4 8; |
| %jmp/0xz T_20.5, 8; |
| %load/vec4 v0x5570afb50080_0; |
| %parti/s 8, 8, 5; |
| %ix/load 4, 8, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb50140_0, 4, 5; |
| T_20.5 ; |
| T_20.1 ; |
| %jmp T_20; |
| .thread T_20; |
| .scope S_0x5570afadf340; |
| T_21 ; |
| %wait E_0x5570afb28d30; |
| %load/vec4 v0x5570afb50890_0; |
| %cmpi/e 0, 0, 1; |
| %jmp/0xz T_21.0, 4; |
| %load/vec4 v0x5570afb509a0_0; |
| %assign/vec4 v0x5570afb507b0_0, 0; |
| %jmp T_21.1; |
| T_21.0 ; |
| %load/vec4 v0x5570afb50630_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_21.4, 9; |
| %load/vec4 v0x5570afb50a80_0; |
| %parti/s 1, 0, 2; |
| %and; |
| T_21.4; |
| %flag_set/vec4 8; |
| %jmp/0xz T_21.2, 8; |
| %load/vec4 v0x5570afb506f0_0; |
| %parti/s 8, 0, 2; |
| %ix/load 4, 0, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb507b0_0, 4, 5; |
| T_21.2 ; |
| %load/vec4 v0x5570afb50630_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_21.7, 9; |
| %load/vec4 v0x5570afb50a80_0; |
| %parti/s 1, 1, 2; |
| %and; |
| T_21.7; |
| %flag_set/vec4 8; |
| %jmp/0xz T_21.5, 8; |
| %load/vec4 v0x5570afb506f0_0; |
| %parti/s 8, 8, 5; |
| %ix/load 4, 8, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb507b0_0, 4, 5; |
| T_21.5 ; |
| %load/vec4 v0x5570afb50630_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_21.10, 9; |
| %load/vec4 v0x5570afb50a80_0; |
| %parti/s 1, 2, 3; |
| %and; |
| T_21.10; |
| %flag_set/vec4 8; |
| %jmp/0xz T_21.8, 8; |
| %load/vec4 v0x5570afb506f0_0; |
| %parti/s 8, 16, 6; |
| %ix/load 4, 16, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb507b0_0, 4, 5; |
| T_21.8 ; |
| %load/vec4 v0x5570afb50630_0; |
| %flag_set/vec4 9; |
| %flag_get/vec4 9; |
| %jmp/0 T_21.13, 9; |
| %load/vec4 v0x5570afb50a80_0; |
| %parti/s 1, 3, 3; |
| %and; |
| T_21.13; |
| %flag_set/vec4 8; |
| %jmp/0xz T_21.11, 8; |
| %load/vec4 v0x5570afb506f0_0; |
| %parti/s 8, 24, 6; |
| %ix/load 4, 24, 0; |
| %ix/load 5, 0, 0; |
| %flag_set/imm 4, 0; |
| %assign/vec4/off/d v0x5570afb507b0_0, 4, 5; |
| T_21.11 ; |
| T_21.1 ; |
| %jmp T_21; |
| .thread T_21; |
| .scope S_0x5570afb50f80; |
| T_22 ; |
| %wait E_0x5570afb512e0; |
| %load/vec4 v0x5570afb51750_0; |
| %nor/r; |
| %flag_set/vec4 8; |
| %jmp/0xz T_22.0, 8; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb51580_0, 0; |
| %jmp T_22.1; |
| T_22.0 ; |
| %load/vec4 v0x5570afb51640_0; |
| %flag_set/vec4 8; |
| %jmp/0xz T_22.2, 8; |
| %pushi/vec4 1, 0, 1; |
| %assign/vec4 v0x5570afb51580_0, 0; |
| %jmp T_22.3; |
| T_22.2 ; |
| %load/vec4 v0x5570afb514e0_0; |
| %load/vec4 v0x5570afb51420_0; |
| %and; |
| %flag_set/vec4 8; |
| %jmp/0xz T_22.4, 8; |
| %pushi/vec4 0, 0, 1; |
| %assign/vec4 v0x5570afb51580_0, 0; |
| T_22.4 ; |
| T_22.3 ; |
| T_22.1 ; |
| %jmp T_22; |
| .thread T_22; |
| # The file index is used to find the file name in the following table. |
| :file_names 16; |
| "N/A"; |
| "<interactive>"; |
| "-"; |
| "../../lib/ctech_cells.sv"; |
| "fpu_wrapper.sv"; |
| "../../lib/reset_sync.sv"; |
| "../../fpu/verilog/rtl/fpu_sp_top.sv"; |
| "../../fpu/verilog/rtl//fpu_parms.v"; |
| "../../fpu/verilog/rtl/fpu_sp_add.sv"; |
| "../../fpu/verilog/rtl/fpu_sp_div.sv"; |
| "../../fpu/verilog/rtl/fpu_sp_f2i.sv"; |
| "../../fpu/verilog/rtl/fpu_sp_i2f.sv"; |
| "../../fpu/verilog/rtl/fpu_sp_mul.sv"; |
| "fpu_reg.sv"; |
| "../../lib/registers.v"; |
| "../../lib/clk_skew_adjust.gv"; |
