verilog: use correct path for wb_pio rtl

These files still referred to `user_proj_example`.

Signed-off-by: Sean Cross <sean@xobs.io>
2 files changed
tree: abd8f97d33a08e9470a5853586ff2f472d2d5293
  1. .github/
  2. def/
  3. docs/
  4. lef/
  5. mag/
  6. maglef/
  7. openlane/
  8. signoff/
  9. spi/
  10. verilog/
  11. .gitignore
  12. .gitmodules
  13. activate-caravel.sh
  14. LICENSE
  15. Makefile
  16. README.md
README.md

PIO on GF180 (with Caravel)

License UPRJ_CI Caravel Build

A project designed to demonstrate Raspberry Pi PIO on GF180 using the Caravel harness.

Refer to README for a quickstart of how to use caravel_user_project

Refer to README for this sample project documentation.

Building the Project

You will need a Linux environment with Docker. Once you have that, you can set things up:

mkdir -p deps
export OPENLANE_ROOT=$(pwd)/deps/openlane_src # you need to export this whenever you start a new shell
export PDK_ROOT=$(pwd)/deps/pdks # you need to export this whenever you start a new shell
export PDK=gf180mcuC # you can also use sky130B

These steps are included in activate-caravel.sh, which you can just source.

Next, do a one-time setup of the project.

make setup

Next, perform the synthesis, which will take anywhere between 30 minutes and 3 hours:

make wb_pio

When it's done, the resulting files will be in openlane/wb_pio/runs/$CURRENT_DATE_TIME/results/final/.

Running the testbench

You can run the testbench using iverilog, which will generate a .vcd file:

make verify-wb_pio_test-rtl

You can then inspect the .vcd file by using a tool such as gtkwave to view verilog/dv/wb_pio_test/RTL-wb_pio_test.vcd