| commit | ef9aa6c7157053a069be6c7b4a6c54b2042282f9 | [log] [tgz] |
|---|---|---|
| author | Ian Zhang <ianzhang1986@gmail.com> | Sun Aug 28 09:05:13 2022 -0700 |
| committer | GitHub <noreply@github.com> | Sun Aug 28 09:05:13 2022 -0700 |
| tree | 95f67289299d839d7e54aefd5bd9fd07ec3d054f | |
| parent | b9b38f09fb86da62163158ba69f0ec01aa27032a [diff] |
External input ctrl (#6) * Add end to end read out logic and testing Fix verilog inference errors Attempt to add state control Signed-off-by: ianboyanzhang Fix errors reported by yosys * Fix openlane layout config (#5)