blob: 2ea3e07a7cfa7b9de508602b3decc547a8e93c4a [file] [log] [blame]
Project Chip ID is: 508852
Setting Project Chip ID to: 0007c3b4
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!