| v {xschem version=3.0.0 file_version=1.2 } |
| G {} |
| K {} |
| V {} |
| S {} |
| E {} |
| B 5 997.5 -682.5 1002.5 -677.5 {name=IN1 |
| dir=in} |
| N 1670 -510 1670 -450 { |
| lab=GND} |
| N 1600 -510 1600 -450 { |
| lab=GND} |
| N 1480 -680 1480 -660 { |
| lab=VDD} |
| N 1430 -760 1510 -760 { |
| lab=#net1} |
| N 1510 -760 1510 -680 { |
| lab=#net1} |
| N 1430 -770 1530 -770 { |
| lab=#net2} |
| N 1530 -770 1530 -680 { |
| lab=#net2} |
| N 1430 -780 1560 -780 { |
| lab=#net3} |
| N 1560 -780 1560 -680 { |
| lab=#net3} |
| N 1430 -790 1580 -790 { |
| lab=#net4} |
| N 1580 -790 1580 -680 { |
| lab=#net4} |
| N 1430 -800 1610 -800 { |
| lab=#net5} |
| N 1610 -800 1610 -680 { |
| lab=#net5} |
| N 1430 -810 1630 -810 { |
| lab=#net6} |
| N 1630 -810 1630 -680 { |
| lab=#net6} |
| N 1430 -820 1660 -820 { |
| lab=#net7} |
| N 1660 -820 1660 -680 { |
| lab=#net7} |
| N 1430 -830 1680 -830 { |
| lab=#net8} |
| N 1680 -830 1680 -680 { |
| lab=#net8} |
| N 1530 -510 1530 -470 { |
| lab=VBIASN1} |
| N 1510 -850 1510 -760 { |
| lab=#net1} |
| N 1510 -880 1750 -880 { |
| lab=#net1} |
| N 1510 -880 1510 -850 { |
| lab=#net1} |
| N 1530 -900 1530 -770 { |
| lab=#net2} |
| N 1530 -900 1750 -900 { |
| lab=#net2} |
| N 1560 -930 1560 -780 { |
| lab=#net3} |
| N 1560 -930 1750 -930 { |
| lab=#net3} |
| N 1580 -950 1580 -790 { |
| lab=#net4} |
| N 1580 -950 1750 -950 { |
| lab=#net4} |
| N 1610 -980 1610 -800 { |
| lab=#net5} |
| N 1610 -980 1750 -980 { |
| lab=#net5} |
| N 1630 -1000 1750 -1000 { |
| lab=#net6} |
| N 1630 -1000 1630 -810 { |
| lab=#net6} |
| N 1660 -1030 1660 -820 { |
| lab=#net7} |
| N 1660 -1030 1750 -1030 { |
| lab=#net7} |
| N 1680 -1050 1750 -1050 { |
| lab=#net8} |
| N 1680 -1050 1680 -830 { |
| lab=#net8} |
| N 1980 -810 1980 -750 { |
| lab=GND} |
| N 1910 -810 1910 -750 { |
| lab=GND} |
| N 2070 -930 2140 -930 { |
| lab=#net9} |
| N 2070 -910 2140 -910 { |
| lab=#net10} |
| N 2070 -890 2140 -890 { |
| lab=#net11} |
| N 1880 -1150 1880 -1120 { |
| lab=VDD} |
| N 2590 -990 2590 -410 { |
| lab=VBIASN1} |
| N 1530 -470 1530 -410 { |
| lab=VBIASN1} |
| N 2350 -890 2350 -830 { |
| lab=GND} |
| N 2440 -890 2440 -830 { |
| lab=GND} |
| N 2070 -990 2250 -990 { |
| lab=#net12} |
| N 2070 -1020 2250 -1020 { |
| lab=#net13} |
| N 2320 -1140 2320 -1110 { |
| lab=#net14} |
| N 2380 -1170 2380 -1150 { |
| lab=REF} |
| N 2440 -1140 2440 -1110 { |
| lab=VDD} |
| N 2380 -1150 2380 -1110 { |
| lab=REF} |
| N 2200 -950 2250 -950 { |
| lab=VCTRL} |
| N 1790 -810 1790 -410 { |
| lab=VBIASN1} |
| N 1530 -410 1790 -410 { |
| lab=VBIASN1} |
| N 750 -1400 990 -1400 { |
| lab=CTRL1} |
| N 760 -1380 990 -1380 { |
| lab=CTRL2} |
| N 760 -1360 990 -1360 { |
| lab=CTRL3} |
| N 760 -1340 990 -1340 { |
| lab=CTRL4} |
| N 760 -1320 990 -1320 { |
| lab=CTRL5} |
| N 960 -530 990 -530 { |
| lab=CTRL5} |
| N 940 -550 990 -550 { |
| lab=CTRL4} |
| N 920 -570 990 -570 { |
| lab=CTRL3} |
| N 900 -590 990 -590 { |
| lab=CTRL2} |
| N 880 -610 990 -610 { |
| lab=CTRL1} |
| N 960 -640 990 -640 { |
| lab=CTRL5} |
| N 940 -660 990 -660 { |
| lab=CTRL4} |
| N 920 -680 990 -680 { |
| lab=CTRL3} |
| N 900 -700 990 -700 { |
| lab=CTRL2} |
| N 880 -720 990 -720 { |
| lab=CTRL1} |
| N 960 -750 990 -750 { |
| lab=CTRL5} |
| N 940 -770 990 -770 { |
| lab=CTRL4} |
| N 920 -790 990 -790 { |
| lab=CTRL3} |
| N 900 -810 990 -810 { |
| lab=CTRL2} |
| N 880 -830 990 -830 { |
| lab=CTRL1} |
| N 960 -860 990 -860 { |
| lab=CTRL5} |
| N 940 -880 990 -880 { |
| lab=CTRL4} |
| N 920 -900 990 -900 { |
| lab=CTRL3} |
| N 900 -920 990 -920 { |
| lab=CTRL2} |
| N 880 -940 990 -940 { |
| lab=CTRL1} |
| N 960 -990 990 -990 { |
| lab=CTRL5} |
| N 940 -1010 990 -1010 { |
| lab=CTRL4} |
| N 920 -1030 990 -1030 { |
| lab=CTRL3} |
| N 900 -1050 990 -1050 { |
| lab=CTRL2} |
| N 880 -1070 990 -1070 { |
| lab=CTRL1} |
| N 960 -1100 990 -1100 { |
| lab=CTRL5} |
| N 940 -1120 990 -1120 { |
| lab=CTRL4} |
| N 920 -1140 990 -1140 { |
| lab=CTRL3} |
| N 900 -1160 990 -1160 { |
| lab=CTRL2} |
| N 880 -1180 990 -1180 { |
| lab=CTRL1} |
| N 960 -1210 990 -1210 { |
| lab=CTRL5} |
| N 940 -1230 990 -1230 { |
| lab=CTRL4} |
| N 920 -1250 990 -1250 { |
| lab=CTRL3} |
| N 900 -1270 990 -1270 { |
| lab=CTRL2} |
| N 880 -1290 990 -1290 { |
| lab=CTRL1} |
| N 960 -1320 960 -530 { |
| lab=CTRL5} |
| N 940 -1340 940 -550 { |
| lab=CTRL4} |
| N 920 -1360 920 -570 { |
| lab=CTRL3} |
| N 900 -1380 900 -590 { |
| lab=CTRL2} |
| N 880 -1400 880 -600 { |
| lab=CTRL1} |
| N 1050 -1400 1050 -1390 { |
| lab=#net7} |
| N 1050 -1400 1160 -1400 { |
| lab=#net7} |
| N 1050 -1320 1120 -1320 { |
| lab=GND} |
| N 1050 -1290 1050 -1280 { |
| lab=#net8} |
| N 1050 -1290 1160 -1290 { |
| lab=#net8} |
| N 1050 -1210 1120 -1210 { |
| lab=GND} |
| N 1050 -1180 1050 -1170 { |
| lab=#net5} |
| N 1050 -1180 1160 -1180 { |
| lab=#net5} |
| N 1050 -1100 1120 -1100 { |
| lab=GND} |
| N 1050 -1070 1050 -1060 { |
| lab=#net6} |
| N 1050 -1070 1160 -1070 { |
| lab=#net6} |
| N 1050 -990 1120 -990 { |
| lab=GND} |
| N 1050 -940 1050 -930 { |
| lab=#net3} |
| N 1050 -940 1160 -940 { |
| lab=#net3} |
| N 1050 -860 1120 -860 { |
| lab=GND} |
| N 1050 -830 1050 -820 { |
| lab=#net4} |
| N 1050 -830 1160 -830 { |
| lab=#net4} |
| N 1050 -750 1120 -750 { |
| lab=GND} |
| N 1050 -720 1050 -710 { |
| lab=#net1} |
| N 1050 -720 1160 -720 { |
| lab=#net1} |
| N 1050 -640 1120 -640 { |
| lab=GND} |
| N 1050 -610 1050 -600 { |
| lab=#net2} |
| N 1050 -610 1160 -610 { |
| lab=#net2} |
| N 1050 -530 1120 -530 { |
| lab=GND} |
| N 1120 -1320 1120 -530 { |
| lab=GND} |
| N 1790 -410 2590 -410 { |
| lab=VBIASN1} |
| N 2140 -930 2160 -930 { |
| lab=#net9} |
| N 2160 -930 2160 -720 { |
| lab=#net9} |
| N 2120 -640 2120 -410 { |
| lab=VBIASN1} |
| N 2160 -720 2170 -720 { |
| lab=#net9} |
| N 2140 -680 2170 -680 { |
| lab=#net11} |
| N 2120 -640 2170 -640 { |
| lab=VBIASN1} |
| N 2270 -630 2270 -610 { |
| lab=GND} |
| N 2240 -620 2240 -600 { |
| lab=GND} |
| N 2210 -790 2210 -770 { |
| lab=VDD} |
| N 2310 -720 2360 -720 { |
| lab=OUT0} |
| N 2310 -690 2350 -690 { |
| lab=OUT180} |
| N 2140 -890 2140 -680 { |
| lab=#net11} |
| N 2070 -870 2120 -870 { |
| lab=#net15} |
| N 1160 -720 1430 -760 { |
| lab=#net1} |
| N 1160 -610 1430 -770 { |
| lab=#net2} |
| N 1160 -940 1430 -780 { |
| lab=#net3} |
| N 1160 -830 1430 -790 { |
| lab=#net4} |
| N 1160 -1400 1430 -820 { |
| lab=#net7} |
| N 1160 -1290 1430 -830 { |
| lab=#net8} |
| N 1160 -1180 1430 -800 { |
| lab=#net5} |
| N 1160 -1070 1430 -810 { |
| lab=#net6} |
| N 2290 -1330 2290 -1300 { |
| lab=VDD} |
| N 2240 -1270 2290 -1270 { |
| lab=VDD} |
| N 2240 -1320 2240 -1270 { |
| lab=VDD} |
| N 2240 -1320 2290 -1320 { |
| lab=VDD} |
| N 2290 -1240 2290 -1220 { |
| lab=REF} |
| N 2290 -1220 2330 -1220 { |
| lab=REF} |
| N 2330 -1270 2330 -1220 { |
| lab=REF} |
| N 2330 -1220 2380 -1220 { |
| lab=REF} |
| N 2380 -1220 2380 -1170 { |
| lab=REF} |
| N 2380 -1220 2450 -1220 { |
| lab=REF} |
| N 2190 -970 2200 -970 { |
| lab=VCTRL} |
| N 2200 -970 2200 -950 { |
| lab=VCTRL} |
| N 1880 -1190 1880 -1150 { |
| lab=VDD} |
| C {core_osc.sym} 1460 -540 0 0 {name=X1} |
| C {devices/lab_pin.sym} 1480 -680 0 0 {name=l7 sig_type=std_logic lab=VDD |
| } |
| C {buffer_amp_vop.sym} 1750 -840 0 0 {name=X3} |
| C {devices/lab_pin.sym} 1880 -1150 0 0 {name=l19 sig_type=std_logic lab=VDD |
| } |
| C {bias_calc.sym} 2260 -910 0 0 {} |
| C {devices/lab_pin.sym} 2320 -1140 0 0 {name=l22 sig_type=std_logic lab=VDD |
| } |
| C {devices/lab_pin.sym} 2380 -1170 0 0 {name=l23 sig_type=std_logic lab=REF} |
| C {devices/lab_pin.sym} 2440 -1140 0 0 {name=l25 sig_type=std_logic lab=VDD |
| } |
| C {devices/lab_pin.sym} 2200 -950 0 0 {name=l1 sig_type=std_logic lab=VCTRL |
| } |
| C {devices/lab_pin.sym} 1970 -410 0 0 {name=l37 sig_type=std_logic lab=VBIASN1 |
| } |
| C {cap_bank.sym} 980 -530 0 0 {name=X4} |
| C {cap_bank.sym} 980 -640 0 0 {name=X5} |
| C {cap_bank.sym} 980 -750 0 0 {name=X6} |
| C {cap_bank.sym} 980 -860 0 0 {name=X7} |
| C {cap_bank.sym} 980 -990 0 0 {name=X8} |
| C {cap_bank.sym} 980 -1100 0 0 {name=X9} |
| C {cap_bank.sym} 980 -1210 0 0 {name=X10} |
| C {cap_bank.sym} 980 -1320 0 0 {name=X11} |
| C {devices/ipin.sym} 1120 -530 2 0 {name=p6 lab=GND} |
| C {output_buffer.sym} 2200 -700 0 0 {name=X2} |
| C {devices/lab_pin.sym} 2210 -790 0 0 {name=l39 sig_type=std_logic lab=VDD |
| } |
| C {devices/lab_pin.sym} 2290 -1330 0 0 {name=l141 sig_type=std_logic lab=VDD |
| } |
| C {sky130_fd_pr/pfet_01v8_lvt.sym} 2310 -1270 0 1 {name=M35 |
| L=0.35 |
| W=3 |
| nf=3 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8_lvt |
| spiceprefix=X |
| } |
| C {devices/ipin.sym} 750 -1400 0 0 {name=p5 lab=CTRL1} |
| C {devices/ipin.sym} 760 -1380 0 0 {name=p1 lab=CTRL2} |
| C {devices/ipin.sym} 760 -1360 0 0 {name=p2 lab=CTRL3} |
| C {devices/ipin.sym} 760 -1340 0 0 {name=p3 lab=CTRL4} |
| C {devices/ipin.sym} 760 -1320 0 0 {name=p4 lab=CTRL5} |
| C {devices/ipin.sym} 2190 -970 0 0 {name=p7 lab=VCTRL} |
| C {devices/ipin.sym} 2450 -1220 0 1 {name=p8 lab=REF} |
| C {devices/ipin.sym} 1880 -1190 0 0 {name=p9 lab=VDD} |
| C {devices/noconn.sym} 2140 -910 0 0 {name=l2} |
| C {devices/noconn.sym} 2120 -870 0 0 {name=l3} |
| C {devices/lab_pin.sym} 1100 -530 0 0 {name=l4 sig_type=std_logic lab=GND |
| } |
| C {devices/lab_pin.sym} 1600 -460 0 0 {name=l5 sig_type=std_logic lab=GND |
| } |
| C {devices/lab_pin.sym} 1670 -460 0 0 {name=l6 sig_type=std_logic lab=GND |
| } |
| C {devices/lab_pin.sym} 1910 -770 0 0 {name=l8 sig_type=std_logic lab=GND |
| } |
| C {devices/lab_pin.sym} 1980 -770 0 0 {name=l9 sig_type=std_logic lab=GND |
| } |
| C {devices/lab_pin.sym} 2240 -600 0 0 {name=l10 sig_type=std_logic lab=GND |
| } |
| C {devices/lab_pin.sym} 2270 -610 0 0 {name=l11 sig_type=std_logic lab=GND |
| } |
| C {devices/lab_pin.sym} 2350 -850 0 0 {name=l12 sig_type=std_logic lab=GND |
| } |
| C {devices/lab_pin.sym} 2440 -850 0 0 {name=l13 sig_type=std_logic lab=GND |
| } |
| C {devices/opin.sym} 2360 -720 0 0 {name=p10 lab=OUT0} |
| C {devices/opin.sym} 2350 -690 0 0 {name=p11 lab=OUT180} |
