Rift2Go_2300: This is a real Rift2Core CPU now, I remove L2-cache, and implement the L1-ICache L1-Dcache with Flip-flop.

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Branches

  1. c5baffa final gds oasis by Jeff DiCorpo · 1 year, 10 months ago main
  2. f0c8a86 submit for Rift2310 by Ruige · 1 year, 11 months ago
  3. 5ec6d70 signoff design files by Ruige · 1 year, 11 months ago
  4. 3f2d7c3 Update Makefile by Jeff DiCorpo · 1 year, 11 months ago
  5. cfb7c9a Merge pull request #200 from efabless/jeffdi-patch-1 by Jeff DiCorpo · 1 year, 11 months ago

Rift2Core

Rift2310

This is a simple version of Rift2Core. Commit: b95a1555aeb79d975e8b273d412f0e6df42d0322 (Almost...)


  • dhrystone-500: 0.038084
  • coremark: 0.111437

The configuration is as followed:

class Rift2310 extends Config((site, here, up) => {
  case RiftParamsKey => RiftSetting(
    hasL2  = true,
    hasDebugger = true,
    hasPreFetch = false,
    hasuBTB = false,
    ftChn = 4,
    rnChn = 1,
    opChn = 1,
    wbChn = 1,
    cm_chn = 1,
    pmpNum = 0,
    regNum = 34,
    hpmNum  = 0,
    l1BeatBits = 64,
    memBeatBits = 64,
    tlbEntry = 2,
    l1DW = 128,
    ifetchParameters = IFParameters(
      uBTB_entry = 4,
      btb_cl = 4,
      bim_cl = 8,
      ras_dp = 4,
    ),
    icacheParameters = IcacheParameters(
      bk = 1,
      cb = 1,
      cl = 2,
    ),
    dcacheParameters = DcacheParameters(
      bk = 1,
      cb = 1,
      cl = 2,
      sbEntry = 2,
      stEntry = 2,
    ),
    dptEntry = 2,
    fpuNum = 0,
    mulNum = 1,
    isMinArea = true,
    isLowPower = false,
  )
})