blob: b1e784ce8c37cef0df6c0228a972e865d615bcef [file] [log] [blame]
Project Chip ID is: 522244
Setting Project Chip ID to: 0007f804
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!