| * SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130B |
| |
| .subckt dram_cell storage WWL WBL RWL RBL VSUBS |
| X0 RWL storage RBL VSUBS sky130_fd_pr__nfet_01v8 ad=3e+11p pd=2.6e+06u as=3.5e+11p ps=2.7e+06u w=1e+06u l=150000u |
| X1 storage WWL WBL VSUBS sky130_fd_pr__nfet_01v8 ad=3.5e+11p pd=2.7e+06u as=3e+11p ps=2.6e+06u w=1e+06u l=150000u |
| .ends |
| |
| .subckt dram_array dram_cell_1/WWL dram_cell_0/WBL dram_cell_1/RWL dram_cell_0/RBL |
| + dram_cell_1/WBL dram_cell_1/RBL VSUBS dram_cell_0/RWL |
| Xdram_cell_0 dram_cell_0/storage dram_cell_1/WWL dram_cell_0/WBL dram_cell_0/RWL dram_cell_0/RBL |
| + VSUBS dram_cell |
| Xdram_cell_1 dram_cell_1/storage dram_cell_1/WWL dram_cell_1/WBL dram_cell_1/RWL dram_cell_1/RBL |
| + VSUBS dram_cell |
| .ends |
| |
| .subckt x4bit_dram dram_array_0/dram_cell_1/RBL dram_array_1/dram_cell_0/RWL dram_array_1/dram_cell_1/WWL |
| + dram_array_1/dram_cell_0/WBL dram_array_1/dram_cell_1/RWL dram_array_0/dram_cell_0/WBL |
| + dram_array_1/dram_cell_0/RBL dram_array_1/dram_cell_1/WBL dram_array_0/dram_cell_0/RBL |
| + dram_array_0/dram_cell_1/WBL dram_array_1/dram_cell_1/RBL VSUBS |
| Xdram_array_0 dram_array_1/dram_cell_1/WWL dram_array_0/dram_cell_0/WBL dram_array_1/dram_cell_0/RWL |
| + dram_array_0/dram_cell_0/RBL dram_array_0/dram_cell_1/WBL dram_array_0/dram_cell_1/RBL |
| + VSUBS dram_array_1/dram_cell_0/RWL dram_array |
| Xdram_array_1 dram_array_1/dram_cell_1/WWL dram_array_1/dram_cell_0/WBL dram_array_1/dram_cell_1/RWL |
| + dram_array_1/dram_cell_0/RBL dram_array_1/dram_cell_1/WBL dram_array_1/dram_cell_1/RBL |
| + VSUBS dram_array_1/dram_cell_0/RWL dram_array |
| .ends |
| |
| .subckt x8bit_dram 4bit_dram_1/dram_array_1/dram_cell_1/RWL 4bit_dram_1/dram_array_0/dram_cell_0/WBL |
| + 4bit_dram_0/dram_array_1/dram_cell_0/WBL 4bit_dram_1/dram_array_1/dram_cell_0/RBL |
| + 4bit_dram_1/dram_array_1/dram_cell_1/WBL 4bit_dram_0/dram_array_0/dram_cell_0/WBL |
| + 4bit_dram_1/dram_array_0/dram_cell_0/RBL 4bit_dram_0/dram_array_1/dram_cell_0/RBL |
| + 4bit_dram_1/dram_array_0/dram_cell_1/WBL 4bit_dram_0/dram_array_1/dram_cell_1/WBL |
| + 4bit_dram_1/dram_array_1/dram_cell_1/RBL 4bit_dram_0/dram_array_0/dram_cell_0/RBL |
| + 4bit_dram_0/dram_array_0/dram_cell_1/WBL 4bit_dram_0/dram_array_1/dram_cell_1/RBL |
| + 4bit_dram_1/dram_array_0/dram_cell_1/RBL 4bit_dram_1/dram_array_1/dram_cell_1/WWL |
| + 4bit_dram_0/dram_array_0/dram_cell_1/RBL 4bit_dram_1/dram_array_1/dram_cell_0/WBL |
| + VSUBS |
| X4bit_dram_1 4bit_dram_1/dram_array_0/dram_cell_1/RBL 4bit_dram_1/dram_array_1/dram_cell_1/RWL |
| + 4bit_dram_1/dram_array_1/dram_cell_1/WWL 4bit_dram_1/dram_array_1/dram_cell_0/WBL |
| + 4bit_dram_1/dram_array_1/dram_cell_1/RWL 4bit_dram_1/dram_array_0/dram_cell_0/WBL |
| + 4bit_dram_1/dram_array_1/dram_cell_0/RBL 4bit_dram_1/dram_array_1/dram_cell_1/WBL |
| + 4bit_dram_1/dram_array_0/dram_cell_0/RBL 4bit_dram_1/dram_array_0/dram_cell_1/WBL |
| + 4bit_dram_1/dram_array_1/dram_cell_1/RBL VSUBS x4bit_dram |
| X4bit_dram_0 4bit_dram_0/dram_array_0/dram_cell_1/RBL 4bit_dram_1/dram_array_1/dram_cell_1/RWL |
| + 4bit_dram_1/dram_array_1/dram_cell_1/WWL 4bit_dram_0/dram_array_1/dram_cell_0/WBL |
| + 4bit_dram_1/dram_array_1/dram_cell_1/RWL 4bit_dram_0/dram_array_0/dram_cell_0/WBL |
| + 4bit_dram_0/dram_array_1/dram_cell_0/RBL 4bit_dram_0/dram_array_1/dram_cell_1/WBL |
| + 4bit_dram_0/dram_array_0/dram_cell_0/RBL 4bit_dram_0/dram_array_0/dram_cell_1/WBL |
| + 4bit_dram_0/dram_array_1/dram_cell_1/RBL VSUBS x4bit_dram |
| .ends |
| |
| .subckt adc V_IN BIAS2 BIAS1 V_RAMP GRAY_INx1x GRAY_INx0x OUTx0x GRAY_INx2x GRAY_INx3x |
| + OUTx3x GRAY_INx4x GRAY_INx5x OUTx5x GRAY_INx6x GRAY_INx7x OUTx7x READ OUTx1x OUTx6x |
| + VDD GND OUTx4x OUTx2x |
| X8bit_dram_0 READ GRAY_INx4x GRAY_INx2x OUTx6x GRAY_INx7x GRAY_INx0x OUTx4x OUTx2x |
| + GRAY_INx5x GRAY_INx3x OUTx7x OUTx0x GRAY_INx1x OUTx3x OUTx5x 8bit_dram_0/4bit_dram_1/dram_array_1/dram_cell_1/WWL |
| + OUTx1x GRAY_INx6x GND x8bit_dram |
| X0 VDD a_1000_n1450# a_1000_n1450# VDD sky130_fd_pr__pfet_01v8_lvt ad=1.45e+12p pd=1.09e+07u as=3.5e+11p ps=2.7e+06u w=1e+06u l=1e+06u |
| X1 8bit_dram_0/4bit_dram_1/dram_array_1/dram_cell_1/WWL a_1870_n1400# GND GND sky130_fd_pr__nfet_01v8 ad=4e+11p pd=2.8e+06u as=2.5e+07p ps=5000u w=1e+06u l=150000u |
| X2 a_1720_n1450# V_RAMP a_1100_n1450# GND sky130_fd_pr__nfet_01v8_lvt ad=3.5e+11p pd=2.7e+06u as=8.8e+11p ps=7.1e+06u w=1e+06u l=150000u |
| X3 a_1870_n1400# a_1720_n1450# VDD VDD sky130_fd_pr__pfet_01v8_lvt ad=3.5e+11p pd=2.7e+06u as=0p ps=0u w=1e+06u l=450000u |
| X4 a_1100_n1450# V_IN a_1000_n1450# GND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=3.5e+11p ps=2.7e+06u w=1e+06u l=150000u |
| X5 8bit_dram_0/4bit_dram_1/dram_array_1/dram_cell_1/WWL a_1870_n1400# VDD VDD sky130_fd_pr__pfet_01v8 ad=3.5e+11p pd=2.7e+06u as=0p ps=0u w=1e+06u l=200000u |
| X6 a_1100_n1450# BIAS1 GND GND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=1e+06u |
| X7 a_1870_n1400# BIAS2 GND GND sky130_fd_pr__nfet_01v8_lvt ad=3.5e+11p pd=2.7e+06u as=0p ps=0u w=1e+06u l=1e+06u |
| X8 a_1720_n1450# a_1000_n1450# VDD VDD sky130_fd_pr__pfet_01v8_lvt ad=3.5e+11p pd=2.7e+06u as=0p ps=0u w=1e+06u l=1e+06u |
| C0 VDD GND 2.71fF |
| C1 8bit_dram_0/4bit_dram_1/dram_array_1/dram_cell_1/WWL GND 2.33fF |
| .ends |
| |
| .subckt bias_cell NB1 NB2 OUT_IB AMP_IB SF_IB BIAS1_OUT BIAS2_OUT ADC_ON BIAS1 BIAS2 |
| + SA_IREF_OUT SA_IREF VDD GND |
| X0 BIAS1 ADC_ON BIAS1_OUT GND sky130_fd_pr__nfet_01v8 ad=2.5e+12p pd=1.1e+07u as=5.9425e+12p ps=1.514e+07u w=5e+06u l=1e+06u |
| X1 NB1 NB1 GND GND sky130_fd_pr__nfet_01v8_lvt ad=3.5e+11p pd=2.7e+06u as=1.272e+13p ps=4.894e+07u w=1e+06u l=1.2e+06u |
| X2 BIAS2_OUT BIAS2_OUT GND GND sky130_fd_pr__nfet_01v8_lvt ad=5.9725e+12p pd=1.52e+07u as=0p ps=0u w=1e+06u l=1e+06u |
| X3 SA_IREF_OUT SA_IREF_OUT GND GND sky130_fd_pr__nfet_01v8 ad=5.9905e+12p pd=1.53e+07u as=0p ps=0u w=500000u l=1e+06u |
| X4 NB2 NB2 GND GND sky130_fd_pr__nfet_01v8_lvt ad=3.5e+11p pd=2.7e+06u as=0p ps=0u w=1e+06u l=1.2e+06u |
| X5 BIAS2 ADC_ON BIAS2_OUT GND sky130_fd_pr__nfet_01v8 ad=2.5e+12p pd=1.1e+07u as=0p ps=0u w=5e+06u l=1e+06u |
| X6 AMP_IB AMP_IB GND GND sky130_fd_pr__nfet_01v8_lvt ad=5.6e+12p pd=1.74e+07u as=0p ps=0u w=8e+06u l=2e+06u |
| X7 OUT_IB OUT_IB GND GND sky130_fd_pr__nfet_01v8_lvt ad=5.6e+12p pd=1.74e+07u as=0p ps=0u w=8e+06u l=2e+06u |
| X8 SA_IREF ADC_ON SA_IREF_OUT GND sky130_fd_pr__nfet_01v8 ad=2.5e+12p pd=1.1e+07u as=0p ps=0u w=5e+06u l=1e+06u |
| X9 BIAS1_OUT BIAS1_OUT GND GND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=1e+06u |
| X10 SF_IB SF_IB VDD VDD sky130_fd_pr__pfet_01v8_lvt ad=5.5e+11p pd=3.1e+06u as=4.5e+11p ps=2.9e+06u w=1e+06u l=1e+06u |
| C0 SA_IREF_OUT GND 2.47fF |
| C1 BIAS1_OUT GND 2.00fF |
| C2 AMP_IB GND 4.02fF |
| C3 OUT_IB GND 4.01fF |
| C4 BIAS2_OUT GND 2.10fF |
| C5 ADC_ON GND 2.19fF |
| C6 VDD GND 3.12fF |
| .ends |
| |
| .subckt sens_amp V_IN SA_IREF OUT REF VDD GND |
| X0 GN GN VDD VDD sky130_fd_pr__pfet_01v8_lvt ad=3.5e+11p pd=2.7e+06u as=1.8e+12p ps=1.22e+07u w=1e+06u l=500000u |
| X1 net1 V_IN net2 GND sky130_fd_pr__nfet_01v8_lvt ad=1.4e+12p pd=8.7e+06u as=1.775e+12p ps=1.05e+07u w=4e+06u l=150000u |
| X2 net2 REF GN GND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=1.45e+12p ps=9.1e+06u w=4e+06u l=150000u |
| X3 net1 GN VDD VDD sky130_fd_pr__pfet_01v8_lvt ad=3.5e+11p pd=2.7e+06u as=0p ps=0u w=1e+06u l=500000u |
| X4 net2 SA_IREF GND GND sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=6e+11p ps=4.7e+06u w=500000u l=1e+06u |
| X5 OUT net1 VDD VDD sky130_fd_pr__pfet_01v8_lvt ad=1.05e+12p pd=6.7e+06u as=0p ps=0u w=3e+06u l=350000u |
| X6 OUT net1 GND GND sky130_fd_pr__nfet_01v8_lvt ad=3.5e+11p pd=2.7e+06u as=0p ps=0u w=1e+06u l=150000u |
| C0 VDD GND 2.64fF |
| .ends |
| |
| .subckt 8bit_sens INx1x INx0x INx2x INx3x INx4x INx5x INx6x INx7x OUTx7x OUTx6x OUTx5x |
| + OUTx4x OUTx3x OUTx2x OUTx1x OUTx0x SA_IREF VREF VDD GND |
| Xsens_amp_2 INx5x SA_IREF OUTx5x VREF VDD GND sens_amp |
| Xsens_amp_3 INx4x SA_IREF OUTx4x VREF VDD GND sens_amp |
| Xsens_amp_4 INx3x SA_IREF OUTx3x VREF VDD GND sens_amp |
| Xsens_amp_5 INx2x SA_IREF OUTx2x VREF VDD GND sens_amp |
| Xsens_amp_6 INx1x SA_IREF OUTx1x VREF VDD GND sens_amp |
| Xsens_amp_7 INx0x SA_IREF OUTx0x VREF VDD GND sens_amp |
| Xsens_amp_0 INx7x SA_IREF OUTx7x VREF VDD GND sens_amp |
| Xsens_amp_1 INx6x SA_IREF OUTx6x VREF VDD GND sens_amp |
| C0 VDD GND 16.99fF |
| C1 SA_IREF GND 6.02fF |
| .ends |
| |
| .subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11] |
| + gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16] |
| + gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5] |
| + gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10] |
| + gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16] |
| + gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5] |
| + gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10] |
| + io_analog[1] io_analog[2] io_analog[3] io_analog[7] io_analog[8] io_analog[9] io_analog[4] |
| + io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0] |
| + io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13] |
| + io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21] |
| + io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5] |
| + io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12] |
| + io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18] |
| + io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23] |
| + io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4] |
| + io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10] |
| + io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18] |
| + io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25] |
| + io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8] |
| + io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15] |
| + io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22] |
| + io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5] |
| + io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101] |
| + la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106] |
| + la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111] |
| + la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116] |
| + la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121] |
| + la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126] |
| + la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16] |
| + la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21] |
| + la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27] |
| + la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32] |
| + la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38] |
| + la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43] |
| + la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49] |
| + la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54] |
| + la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5] |
| + la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65] |
| + la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70] |
| + la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76] |
| + la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81] |
| + la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87] |
| + la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92] |
| + la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98] |
| + la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102] |
| + la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107] |
| + la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111] |
| + la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116] |
| + la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120] |
| + la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125] |
| + la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14] |
| + la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19] |
| + la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24] |
| + la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29] |
| + la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34] |
| + la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39] |
| + la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44] |
| + la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49] |
| + la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54] |
| + la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59] |
| + la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64] |
| + la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69] |
| + la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74] |
| + la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79] |
| + la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84] |
| + la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89] |
| + la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94] |
| + la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99] |
| + la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104] |
| + la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110] |
| + la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117] |
| + la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123] |
| + la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14] |
| + la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20] |
| + la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27] |
| + la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33] |
| + la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3] |
| + la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46] |
| + la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52] |
| + la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59] |
| + la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65] |
| + la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71] |
| + la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78] |
| + la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84] |
| + la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90] |
| + la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97] |
| + la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2] |
| + vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0] |
| + wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15] |
| + wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20] |
| + wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26] |
| + wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31] |
| + wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9] |
| + wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14] |
| + wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1] |
| + wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25] |
| + wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30] |
| + wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8] |
| + wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13] |
| + wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19] |
| + wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24] |
| + wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2] |
| + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] |
| + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] |
| + wbs_stb_i wbs_we_i |
| Xadc_0 adc_0/V_IN adc_0/BIAS2 adc_0/BIAS1 io_analog[2] la_data_in[121] la_data_in[120] |
| + adc_0/OUTx0x la_data_in[122] la_data_in[123] adc_0/OUTx3x la_data_in[124] la_data_in[125] |
| + adc_0/OUTx5x la_data_in[126] la_data_in[127] adc_0/OUTx7x adc_0/READ adc_0/OUTx1x |
| + adc_0/OUTx6x vccd1 vssa2 adc_0/OUTx4x adc_0/OUTx2x adc |
| Xbias_cell_0 io_analog[9] io_analog[8] io_analog[7] io_analog[6] io_analog[10] adc_0/BIAS1 |
| + adc_0/BIAS2 gpio_analog[7] io_analog[4] io_analog[5] 8bit_sens_0/SA_IREF io_analog[3] |
| + vccd2 vssa2 bias_cell |
| X8bit_sens_0 adc_0/OUTx1x adc_0/OUTx0x adc_0/OUTx2x adc_0/OUTx3x adc_0/OUTx4x adc_0/OUTx5x |
| + adc_0/OUTx6x adc_0/OUTx7x la_data_out[1] la_data_out[2] la_data_out[3] la_data_out[4] |
| + la_data_out[5] la_data_out[6] la_data_out[7] la_data_out[8] 8bit_sens_0/SA_IREF |
| + 8bit_sens_0/VREF vccd1 vssa2 8bit_sens |
| C0 io_analog[8] io_analog[7] 3.50fF |
| C1 io_analog[10] vccd2 13.80fF |
| C2 io_analog[2] adc_0/BIAS1 2.53fF |
| C3 vccd1 la_data_in[124] 2.16fF |
| C4 io_analog[2] vccd2 10.71fF |
| C5 la_data_in[120] vccd1 75.78fF |
| C6 la_data_out[3] la_data_out[2] 23.11fF |
| C7 la_data_out[2] la_data_out[1] 27.41fF |
| C8 la_data_out[5] la_data_out[4] 41.43fF |
| C9 vccd1 io_analog[2] 2.22fF |
| C10 gpio_analog[7] 8bit_sens_0/SA_IREF 4.47fF |
| C11 la_data_out[4] la_data_out[3] 43.18fF |
| C12 la_data_in[121] la_data_in[122] 49.58fF |
| C13 8bit_sens_0/SA_IREF adc_0/BIAS1 9.04fF |
| C14 la_data_in[127] la_data_in[126] 27.40fF |
| C15 la_data_out[6] la_data_out[7] 38.74fF |
| C16 io_analog[4] io_analog[3] 14.51fF |
| C17 la_data_in[125] la_data_in[126] 41.93fF |
| C18 io_analog[6] io_analog[5] 5.39fF |
| C19 la_data_in[123] la_data_in[122] 32.99fF |
| C20 io_analog[6] vccd2 12.76fF |
| C21 io_analog[7] io_analog[6] 2.42fF |
| C22 io_analog[4] io_analog[5] 15.91fF |
| C23 io_analog[5] vccd2 2.11fF |
| C24 vccd1 la_data_in[121] 4.93fF |
| C25 la_data_out[6] la_data_out[5] 40.26fF |
| C26 io_analog[7] vccd2 10.12fF |
| C27 vccd1 la_data_in[126] 2.17fF |
| C28 vccd1 la_data_in[122] 2.54fF |
| C29 vccd1 la_data_in[127] 2.11fF |
| C30 la_data_in[120] la_data_in[121] 86.33fF |
| C31 vccd1 la_data_in[123] 2.14fF |
| C32 la_data_in[125] vccd1 2.10fF |
| C33 la_data_in[123] la_data_in[124] 30.97fF |
| C34 adc_0/BIAS2 adc_0/BIAS1 30.56fF |
| C35 la_data_in[125] la_data_in[124] 40.36fF |
| C36 la_data_out[7] la_data_out[8] 37.02fF |
| C37 vssa1 vssa2 23.98fF |
| C38 vssd1 vssa2 11.99fF |
| C39 vssd2 vssa2 13.63fF |
| C40 vdda1 vssa2 23.98fF |
| C41 vdda2 vssa2 11.99fF |
| C42 io_analog[0] vssa2 6.28fF |
| C43 io_analog[1] vssa2 6.28fF |
| C44 io_clamp_high[0] vssa2 2.62fF |
| C45 io_clamp_low[0] vssa2 2.62fF |
| C46 io_clamp_high[1] vssa2 2.62fF |
| C47 io_clamp_low[1] vssa2 2.62fF |
| C48 io_clamp_high[2] vssa2 2.62fF |
| C49 io_clamp_low[2] vssa2 2.62fF |
| C50 io_analog[10] vssa2 41.15fF |
| C51 la_data_out[2] vssa2 47.84fF |
| C52 la_data_out[1] vssa2 74.10fF |
| C53 la_data_out[8] vssa2 88.64fF |
| C54 vccd1 vssa2 2024.86fF |
| C55 8bit_sens_0/SA_IREF vssa2 180.51fF |
| C56 8bit_sens_0/VREF vssa2 2.04fF |
| C57 la_data_out[7] vssa2 64.51fF |
| C58 la_data_out[6] vssa2 62.06fF |
| C59 la_data_out[5] vssa2 60.58fF |
| C60 la_data_out[4] vssa2 55.08fF |
| C61 la_data_out[3] vssa2 52.51fF |
| C62 io_analog[8] vssa2 42.36fF |
| C63 io_analog[9] vssa2 22.08fF |
| C64 io_analog[6] vssa2 133.71fF |
| C65 io_analog[7] vssa2 83.89fF |
| C66 gpio_analog[7] vssa2 131.88fF |
| C67 io_analog[3] vssa2 189.27fF |
| C68 io_analog[4] vssa2 158.11fF |
| C69 io_analog[5] vssa2 114.32fF |
| C70 vccd2 vssa2 322.78fF |
| C71 adc_0/BIAS2 vssa2 158.27fF |
| C72 adc_0/BIAS1 vssa2 141.75fF |
| C73 io_analog[2] vssa2 984.46fF |
| C74 la_data_in[123] vssa2 281.79fF |
| C75 la_data_in[122] vssa2 263.34fF |
| C76 la_data_in[121] vssa2 237.68fF |
| C77 la_data_in[120] vssa2 218.66fF |
| C78 la_data_in[127] vssa2 318.43fF |
| C79 la_data_in[126] vssa2 291.01fF |
| C80 la_data_in[125] vssa2 274.61fF |
| C81 la_data_in[124] vssa2 279.97fF |
| .ends |
| |