| timestamp 1662167647 |
| version 8.3 |
| tech sky130B |
| style ngspice() |
| scale 1000 1 500000 |
| resistclasses 4400000 2200000 950000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12800 125 125 47 47 29 5 |
| use 4bit_dram 4bit_dram_1 1 0 860 0 1 -110 |
| use 4bit_dram 4bit_dram_0 1 0 -10 0 1 -110 |
| node "li_1660_290#" 67 97.1038 1660 290 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8320 496 0 0 0 0 0 0 0 0 0 0 0 0 |
| node "li_790_290#" 67 97.1038 790 290 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8320 496 0 0 0 0 0 0 0 0 0 0 0 0 |
| substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 |
| cap "li_790_290#" "li_1660_290#" 6.18182 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 2.10429 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 37.394 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 3.51195 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 2.57013 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -0.0412621 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 2.16956 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.410131 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 3.76366 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.14214 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 6.73702 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 1.1927 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" -1.01799 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.272103 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.462736 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 9.09574 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" -2.78045 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.0388327 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 6.4929 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" -0.170606 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 2.78073 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 11.4954 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 1.15146 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.624513 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 1.58714 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.08201 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.703733 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.872503 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.77891 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 1.39922 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.654306 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 2.62703 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 2.19546 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.07074 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 2.88615 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 1.58081 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 1.79143 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.895458 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.599686 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.76406 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 3.4477 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 2.43142 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 104.946 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 3.74794 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" -5.63264 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 9.2665 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.770791 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" -11.5862 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -2.2775 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.51272 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 2.07761 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 1.44414 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.18288 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 1.83359 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 8.08195 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.678465 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.418966 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 247.143 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.276897 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 7.67453 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 2.91088 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 12.4077 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" -0.175542 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.428145 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 1.15146 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.105583 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 4.75042 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" -0.466881 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 4.27688 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.19162 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 3.8719 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.79143 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 1.61703 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.103147 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 3.43754 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 15.9638 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.49211 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 4.65225 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 2.69454 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" -1.29851 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 2.15371 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -1.79613 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 1.30807 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.488613 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.6507 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.105148 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.0533245 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 5.86929 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 3.71485 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 5.14492 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.12492 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.3453 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" -0.160626 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" -0.0312673 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.270571 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 1.44363 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.0249404 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" -5.25471 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 4.04019 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.291453 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 0.952641 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.819409 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 2.74082 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 5.83133 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 2.63089 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.938398 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 50.0893 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 2.2779 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 2.79197 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.935436 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 3.57988 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 3.12656 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 1.67971 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 1.58055 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.300223 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.8116 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 3.04528 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 1.01248 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 2.78549 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.196152 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" -0.0750067 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 15.1047 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.19352 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.10363 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 4.48836 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.7076 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.796488 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.940947 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 62.5425 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 1.40336 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -0.520149 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 5.04076 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 1.89443 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 2.02273 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 1.01576 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 0.939589 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.10264 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" -0.346486 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" -2.88419 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 1.65711 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.666265 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" -1.48826 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 1.00506 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 1.29475 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.402441 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 2.00754 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.00647 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.556618 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 3.20098 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 83.8215 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.31055 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 5.144 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 5.60201 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" -0.0670397 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 3.78703 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 1.56292 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 3.33668 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 1.36119 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 0.209878 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.0805 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 4.03177 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.0556588 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" -1.56405 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 5.59072 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 6.33367 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.0822097 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 0.661855 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" -0.446088 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 4.01725 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 4.78253 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 1.22354 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.11844 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 3.09544 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 2.49974 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 2.49068 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 18.988 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 2.92916 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.39057 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.831003 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 2.41701 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.3204 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.212935 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 1.82711 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" -0.0540698 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 2.41954 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 2.37715 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.880825 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 3.50198 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 1.42982 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.309103 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.439437 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 3.8719 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 2.92916 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" -1.82431e-05 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 2.84373 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" -0.1572 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" -1.23651 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" -1.82431e-05 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.02571 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 4.10545 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 1.8321 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.0251167 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 4.26572 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 3.36578 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" -0.137974 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.639264 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.734378 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.229625 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 2.18939 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.0732133 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" -2.48533 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 3.98393 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 0.954346 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.110142 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.0652651 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.4727 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 3.15382 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 0.0507256 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.84521 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.185055 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.0472348 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.792606 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 0.0804447 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.200361 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 1.16762 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.46946 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.3542 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.168525 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 1.52892 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.233012 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.062169 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.0208523 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.0198963 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" -0.0859045 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.0562754 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.00237866 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.314005 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 7.00481 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 1.48464 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.950407 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.4816 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.0250806 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.29481 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.75502 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.50073 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.11243 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 1.03566 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 0.279345 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.0153 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.178753 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.313359 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.00881938 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.153685 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.0320946 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" -0.0877782 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.0659876 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.644521 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.0868822 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.227874 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.28567 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 0.957468 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.137953 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.0537236 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.295921 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.443827 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.0997144 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.102897 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.528576 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.0876837 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 0.201977 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 10.329 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.89993 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.22514 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 5.7162 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 3.5878 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.292951 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 2.72846 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.21503 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.363898 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.0731444 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.566051 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.157422 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.486705 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 2.18502 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 1.23181 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.0177814 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.709403 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_0/storage" -0.0412621 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.45639 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.445293 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.09681 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.0965689 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.743024 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.446647 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.0587642 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 0.04892 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.189959 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" -0.030388 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.667912 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.165241 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 0.0718539 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.660722 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.556388 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.270803 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.401477 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.560458 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.10881 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 0.158886 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.536694 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.652168 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 1.64913 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.246331 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 3.39722 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.326642 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.165964 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.48726 |
| merge "4bit_dram_0/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" -157.777 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4500 -270 0 0 0 0 0 0 |
| merge "4bit_dram_0/VSUBS" "4bit_dram_1/VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 |
| merge "4bit_dram_1/VSUBS" "VSUBS" |
| merge "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/RWL" -340.266 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -7644 -704 0 0 0 0 -2700 -210 0 0 0 0 0 0 |
| merge "4bit_dram_0/dram_array_1/dram_cell_0/RWL" "li_790_290#" |
| merge "li_790_290#" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" |
| merge "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/RWL" |
| merge "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "li_1660_290#" |
