| timestamp 1661550438 |
| version 8.3 |
| tech sky130A |
| style ngspice() |
| scale 1000 1 500000 |
| resistclasses 4400000 2200000 950000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12800 125 125 47 47 29 5 |
| use 4bit_dram 4bit_dram_1 1 0 860 0 1 -110 |
| use 4bit_dram 4bit_dram_0 1 0 -10 0 1 -110 |
| substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 2.89851 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 0.803711 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.333547 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 7.57563 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 0.209878 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 3.71174 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 4.48722 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 1.07166 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 1.09554 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.0955318 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 2.76475 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 30.9557 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 2.6834 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 6.17545 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 4.07593 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" -1.25812 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 2.28918 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 2.61297 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" -1.39349 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 0.825621 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 3.06536 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 1.07546 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 4.7284 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 4.08371 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 1.75506 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 3.8125 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 5.54572 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.101438 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 2.80855 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.0607368 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 1.54476 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 1.23338 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.103566 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.151823 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.0441461 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 3.59225 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" -0.0978192 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 2.5994 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 1.42081 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" -12.1707 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.641058 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.90662 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" -0.466109 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 2.72471 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.0190013 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.0819215 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 1.5322 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.155192 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 251.308 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.909326 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 3.35588 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 4.03168 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 105.311 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 0.488843 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 14.1625 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" -6.00967 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 21.5127 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.0804 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 0.8215 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 1.09384 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 2.39202 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -0.512975 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.176441 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.223429 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 3.43013 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.654306 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 1.20402 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 4.46221 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 5.86363 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 2.39202 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.177936 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 2.60269 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.30845 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 1.10897 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" -1.52827 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" -2.86671 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.328237 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.654248 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.354115 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 1.02459 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 1.33766 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 1.91353 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" -1.17109 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" -0.03435 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 3.21821 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 2.30479 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 0.941222 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.12384 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.298272 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.120975 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" -0.0726454 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 6.26697 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" -2.89537 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.607854 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 2.56269 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 2.47594 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 12.9085 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.580765 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.697858 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 4.40435 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 1.9024 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 1.57485 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 1.6083 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 4.43108 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.0229878 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 3.07069 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.114996 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.410433 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 1.76491 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 4.31226 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 0.613408 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 49.6575 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" -0.309305 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 3.10845 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -2.2365 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" -0.172232 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 1.80067 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.04105 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 2.62708 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 4.41905 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.59114 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 184.471 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 2.27947 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.55868 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" -5.82943 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.653389 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 0.999486 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 1.94408 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 0.394805 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.0801278 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 1.42081 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 105.022 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.8669 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 1.5216 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 9.58695 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" -0.192665 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 2.68122 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 3.40685 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 1.48621 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 2.51775 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.13077 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.56893 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" -4.04804 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 4.40749 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 2.22063 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.0272603 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.212935 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 5.79522 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.00027 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.112636 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 3.90423 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 4.48722 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" -0.346486 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 5.13324 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.485301 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" -0.482165 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.193725 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" -3.89343 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" -0.064733 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.250611 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 6.61989 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.530757 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 0.395278 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 5.33402 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" -1.77261 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 1.9369 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.470448 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 1.21183 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 9.2934 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.935436 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 1.24495 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.302968 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 0.960067 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.0486437 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 4.01944 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 4.43738 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 3.51205 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 2.85407 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.444361 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.23299 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 2.46507 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.462736 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" -2.9109 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 1.7929 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 6.15104 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.985373 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.258327 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" -0.288709 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 1.8363 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -2.2775 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 7.30921 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.158158 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 5.46699 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 1.78418 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 5.55908 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 1.16751 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 2.99416 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 3.20811 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 10.3428 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.183078 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.19352 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.722086 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.520027 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RWL" 1.04773 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" -0.198239 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.58865 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.300223 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 27.7018 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/RWL" 0.275028 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.116506 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 5.09584 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.20112 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 3.59295 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.0251167 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.742432 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.885166 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 1.01825 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.29397 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 2.05323 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" -2.77169 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.289684 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.735152 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 37.7503 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.480872 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 3.75444 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 4.8848 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 2.03031 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 1.18288 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 1.21998 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 2.53491 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.000390292 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.26197 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 2.23354 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 1.46977 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 3.26346 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.57134 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 3.20811 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/RWL" 1.5251 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.34913 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.81448 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.0902094 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.0950518 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.508336 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.218514 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.598045 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.0327816 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 1.60306 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.0258081 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.11998 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.171871 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.704602 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.0523153 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.429183 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.0390531 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 0.332026 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.703442 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 2.91016 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 2.07041 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 1.3827 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.0697109 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.0228014 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.115827 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 3.72288 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.00881938 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.45302 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.140034 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.401133 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.0177814 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.61773 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.0965689 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 1.83786 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.149594 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.227874 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.14913 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.349117 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.639 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RWL" 4.26183 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 1.90827 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.59699 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.283833 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.815027 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.0317069 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.690414 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 1.62264 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.233012 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.490708 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.00912784 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.588258 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.528576 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/RWL" 0.105833 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.503929 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.361722 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.80576 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.0202247 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 3.76327 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.183604 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.4727 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.3235 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.21301 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.12056 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.15389 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.155051 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.10725 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.0517136 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.129602 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 1.16476 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 1.63419 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.179694 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.0933806 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.585241 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 1.29848 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.218637 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 1.10735 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.174588 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.165451 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 3.28073 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 3.54512 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.72114 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RWL" 0.652078 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.314458 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.295355 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 0.780871 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.572346 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.206233 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.25375 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.0473861 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 0.0228552 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.0160582 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.00251592 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.312932 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.98099 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 2.43079 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.0121175 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.0736721 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.237356 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 0.310254 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.25534 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.0443811 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.0678374 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.0774366 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.0716178 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.1331 |
| merge "4bit_dram_0/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" -163.631 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4500 -270 0 0 0 0 0 0 |
| merge "4bit_dram_0/VSUBS" "4bit_dram_1/VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 |
| merge "4bit_dram_1/VSUBS" "VSUBS" |
| merge "4bit_dram_0/dram_array_1/dram_cell_0/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/RWL" -134.136 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -2700 -210 0 0 0 0 0 0 |
