| timestamp 1662015318 |
| version 8.3 |
| tech sky130A |
| style ngspice() |
| scale 1000 1 500000 |
| resistclasses 4400000 2200000 950000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12800 125 125 47 47 29 5 |
| use 4bit_dram 4bit_dram_1 1 0 860 0 1 -110 |
| use 4bit_dram 4bit_dram_0 1 0 -10 0 1 -110 |
| node "li_1660_290#" 67 97.1038 1660 290 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8320 496 0 0 0 0 0 0 0 0 0 0 0 0 |
| node "li_790_290#" 67 97.1038 790 290 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8320 496 0 0 0 0 0 0 0 0 0 0 0 0 |
| substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 |
| cap "li_1660_290#" "li_790_290#" 7.01687 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.5607 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 8.73281 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 1.07546 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.402441 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 5.04274 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" -5.81861 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 0.935436 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.409786 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 4.39475 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.0607368 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.652514 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 21.5068 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 2.62265 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 1.47699 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.18288 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.884256 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.94345 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 0.908276 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.103566 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 98.8209 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 3.2069 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 2.79749 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" -1.38838 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.820249 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" -1.17422 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.26701 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" -0.03435 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 1.46229 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" -2.76923 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.48519 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 1.41847 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.07072 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 4.43232 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.484552 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 7.54757 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" -2.10949e-05 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.999532 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 7.29885 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.654306 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 2.01937 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.19352 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 0.831003 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 2.63249 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 1.57205 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.469974 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 36.7251 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" -0.0726454 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 3.95117 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" -0.485673 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.328308 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" -12.1528 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" -2.10949e-05 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 4.72814 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 2.32208 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 3.2091 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 1.23055 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.959037 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.298272 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 3.07056 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 4.45574 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 1.75506 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 1.94814 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 1.02207 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 2.26468 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 1.83364 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 1.25005 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 4.83901 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 1.90435 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 251.289 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 6.38818 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 149.034 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.29281 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -2.2775 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 4.00186 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" -0.346486 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 2.53152 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 6.72548 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" -0.0978192 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 2.85272 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 2.38965 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 1.56467 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 9.58369 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.309103 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.112636 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 6.94642 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 1.20062 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 1.16604 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 2.74488 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 1.33524 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 5.12237 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.48833 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 2.21663 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 4.43108 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 3.2069 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 3.79611 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 1.52803 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.0801278 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 1.24343 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 19.6136 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.519325 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" -0.466436 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" -0.064733 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.58879 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" -0.192665 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 2.72041 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" -0.314248 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.731891 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 3.5852 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 0.741045 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.865663 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.0818242 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 2.59804 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 2.275 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 2.55007 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 3.40133 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 3.58789 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 2.59364 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 5.53788 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -0.542673 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 3.90423 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.09237 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 3.32255 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 5.53686 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 12.8843 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 4.39999 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 19.1179 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.30008 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.652819 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.605828 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.58698 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 49.6344 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.249964 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.353753 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -0.0474576 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 10.3257 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 1.10557 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 3.10488 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.12238 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 4.76276 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 1.41847 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 2.04323 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 1.7619 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.30252 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.120843 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.212935 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 2.44604 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 2.93316 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.258327 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" -0.288709 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 3.37173 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_0/RBL" 3.4942 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 1.90336 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 1.93413 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.462736 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 4.30267 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" -0.172232 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 4.3927 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" -0.198239 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 2.98716 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 0.612705 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" -2.2365 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.60638 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 8.34032 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 2.21629 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 6.6096 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 105.29 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.0251167 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 3.25813 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.530239 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 0.803223 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.0391 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 4.48246 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 6.13964 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 0.720657 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/WBL" 2.3025 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 5.85725 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.289682 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 1.79973 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 4.0685 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 1.09446 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 1.53736 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 4.48246 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 0.981267 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 2.38965 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" -6.01565 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.0486437 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.92897 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" -2.11215 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 2.67416 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.114996 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" -1.52827 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_0/WBL" 0.130522 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 1.01507 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_1/storage" 2.89023 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.696241 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" -1.80153 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 3.21821 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.300223 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_1/RBL" 1.9024 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.641058 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" -2.90893 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.21791 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 6.17545 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.116528 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_0/storage" 0.209878 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/WBL" 2.51775 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_1/RBL" 3.40879 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 4.01124 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" -1.26102 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_0/dram_cell_0/WBL" 15.8904 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_1/storage" 0.0272603 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 4.88457 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 1.122 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.227874 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.597274 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 3.76292 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.00881938 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 3.542 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.334184 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 0.31028 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.507811 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.380138 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.115827 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.34799 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.0678374 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.720581 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.174643 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.263617 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 1.15252 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.165451 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.6377 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.183632 |
| cap "4bit_dram_0/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.185055 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 0.0950518 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.105071 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 1.16371 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.149594 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.00252344 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.13976 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.0697179 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.61995 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.616113 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.10527 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 0.313002 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.815027 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.317829 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 0.0517136 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.205806 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.0774366 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.402326 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 9.53541 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.801556 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.25399 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.0736721 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.81207 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 0.4727 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 14.1593 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.191669 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 1.72455 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 1.32226 |
| cap "4bit_dram_1/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.04892 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" -0.033384 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" -0.0877871 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.218637 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.0258081 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.0965689 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 1.83786 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.29533 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 1.98077 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.584545 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 0.295355 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" -0.0859045 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_0/storage" -0.0474576 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.584263 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 1.9054 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 1.63136 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.693785 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.0350553 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.738359 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.400851 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.0228014 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_0/dram_cell_1/WBL" 0.0789877 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 0.80471 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.528576 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/WBL" 3.71607 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_0/dram_cell_0/RBL" 1.13144 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.253592 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.0716178 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/storage" 1.60034 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.566085 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.0177814 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.571362 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.314545 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/storage" 2.42426 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.0537236 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 1.59399 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WWL" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.21301 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/WBL" 0.689487 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.503547 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/storage" 0.120012 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_0/RBL" 0.218086 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" 0.45302 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 6.10858 |
| cap "4bit_dram_0/dram_array_0/dram_cell_0/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.185931 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/WBL" "4bit_dram_0/dram_array_1/dram_cell_1/RBL" 2.90534 |
| cap "4bit_dram_1/dram_array_0/dram_cell_1/storage" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.0507256 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/storage" "4bit_dram_0/dram_array_1/dram_cell_0/WBL" 0.0933806 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.361326 |
| cap "4bit_dram_0/dram_array_1/dram_cell_0/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 1.02532 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_0/dram_cell_0/storage" 0.233012 |
| cap "4bit_dram_1/dram_array_1/dram_cell_1/RBL" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 1.38158 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" 0.124096 |
| cap "4bit_dram_1/dram_array_1/dram_cell_0/storage" "4bit_dram_0/dram_array_1/dram_cell_0/RBL" 0.332111 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_1/RBL" 0.587584 |
| cap "4bit_dram_0/dram_array_0/dram_cell_1/RBL" "4bit_dram_1/dram_array_1/dram_cell_0/storage" 0.0317069 |
| merge "4bit_dram_0/dram_array_1/dram_cell_1/WWL" "4bit_dram_1/dram_array_1/dram_cell_1/WWL" -164.461 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4500 -270 0 0 0 0 0 0 |
| merge "4bit_dram_0/VSUBS" "4bit_dram_1/VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 |
| merge "4bit_dram_1/VSUBS" "VSUBS" |
| merge "4bit_dram_0/dram_array_1/dram_cell_1/RWL" "4bit_dram_0/dram_array_1/dram_cell_0/RWL" -346.422 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -7644 -704 0 0 0 0 -2700 -210 0 0 0 0 0 0 |
| merge "4bit_dram_0/dram_array_1/dram_cell_0/RWL" "li_790_290#" |
| merge "li_790_290#" "4bit_dram_1/dram_array_1/dram_cell_1/RWL" |
| merge "4bit_dram_1/dram_array_1/dram_cell_1/RWL" "4bit_dram_1/dram_array_1/dram_cell_0/RWL" |
| merge "4bit_dram_1/dram_array_1/dram_cell_0/RWL" "li_1660_290#" |
