Commiting work done as of friday, so far everything is configured and ready to go, just need to harden FSM, wrapper, and then run precheck, NOTE the GDS has not been copied over nor has the lef files
diff --git a/gds/user_proj_example.gds b/gds/user_proj_example.gds
index 8b542fd..d973302 100644
--- a/gds/user_proj_example.gds
+++ b/gds/user_proj_example.gds
Binary files differ
diff --git a/gds/user_project_wrapper.gds b/gds/user_project_wrapper.gds
index 0bcc1f7..a1e7ccf 100644
--- a/gds/user_project_wrapper.gds
+++ b/gds/user_project_wrapper.gds
Binary files differ
diff --git a/mag/user_proj_example.mag b/mag/user_proj_example.mag
index 69ccd18..f9ae5e1 100644
--- a/mag/user_proj_example.mag
+++ b/mag/user_proj_example.mag
@@ -1,7 +1,7 @@
magic
tech sky130B
magscale 1 2
-timestamp 1657064812
+timestamp 1662747017
<< viali >>
rect 4077 117249 4111 117283
rect 5089 117249 5123 117283
@@ -138615,7 +138615,7 @@
rect 173400 2144 173416 2208
rect 173480 2144 173488 2208
rect 173168 2128 173488 2144
-use sky130_fd_sc_hd__diode_2 ANTENNA__341__A1 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__diode_2 ANTENNA__341__A1 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 104604 0 1 4352
box -38 -48 222 592
@@ -141427,7 +141427,7 @@
timestamp 1649977179
transform -1 0 29072 0 1 25024
box -38 -48 222 592
-use sky130_ef_sc_hd__decap_12 FILLER_0_3 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_ef_sc_hd__decap_12 FILLER_0_3 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 1380 0 1 2176
box -38 -48 1142 592
@@ -141435,7 +141435,7 @@
timestamp 1649977179
transform 1 0 2484 0 1 2176
box -38 -48 1142 592
-use sky130_fd_sc_hd__fill_1 FILLER_0_27 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__fill_1 FILLER_0_27 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 3588 0 1 2176
box -38 -48 130 592
@@ -141447,7 +141447,7 @@
timestamp 1649977179
transform 1 0 4876 0 1 2176
box -38 -48 1142 592
-use sky130_fd_sc_hd__decap_3 FILLER_0_53 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__decap_3 FILLER_0_53 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 5980 0 1 2176
box -38 -48 314 592
@@ -141515,7 +141515,7 @@
timestamp 1649977179
transform 1 0 19228 0 1 2176
box -38 -48 1142 592
-use sky130_fd_sc_hd__decap_8 FILLER_0_209 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__decap_8 FILLER_0_209 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 20332 0 1 2176
box -38 -48 774 592
@@ -141523,7 +141523,7 @@
timestamp 1649977179
transform 1 0 21068 0 1 2176
box -38 -48 130 592
-use sky130_fd_sc_hd__decap_4 FILLER_0_220 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__decap_4 FILLER_0_220 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 21344 0 1 2176
box -38 -48 406 592
@@ -141563,7 +141563,7 @@
timestamp 1649977179
transform 1 0 27600 0 1 2176
box -38 -48 406 592
-use sky130_fd_sc_hd__decap_6 FILLER_0_302 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__decap_6 FILLER_0_302 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 28888 0 1 2176
box -38 -48 590 592
@@ -141795,7 +141795,7 @@
timestamp 1649977179
transform 1 0 65136 0 1 2176
box -38 -48 406 592
-use sky130_fd_sc_hd__fill_2 FILLER_0_701 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__fill_2 FILLER_0_701 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 65596 0 1 2176
box -38 -48 222 592
@@ -319051,7 +319051,7 @@
timestamp 1649977179
transform -1 0 178848 0 -1 117504
box -38 -48 314 592
-use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_424 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_424 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 3680 0 1 2176
box -38 -48 130 592
@@ -348155,51 +348155,51 @@
timestamp 1649977179
transform 1 0 176272 0 -1 117504
box -38 -48 130 592
-use sky130_fd_sc_hd__and2b_1 _340_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and2b_1 _340_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 105708 0 -1 4352
box -38 -48 590 592
-use sky130_fd_sc_hd__a21oi_4 _341_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a21oi_4 _341_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 106168 0 1 4352
box -38 -48 1234 592
-use sky130_fd_sc_hd__clkbuf_4 _342_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__clkbuf_4 _342_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 104972 0 -1 17408
box -38 -48 590 592
-use sky130_fd_sc_hd__inv_12 _343_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__inv_12 _343_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 108468 0 -1 22848
box -38 -48 1234 592
-use sky130_fd_sc_hd__mux2_2 _344_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__mux2_2 _344_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 21896 0 1 4352
box -38 -48 866 592
-use sky130_fd_sc_hd__buf_1 _345_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__buf_1 _345_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 21804 0 -1 5440
box -38 -48 314 592
-use sky130_fd_sc_hd__nand2_4 _346_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__nand2_4 _346_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 23920 0 1 4352
box -38 -48 866 592
-use sky130_fd_sc_hd__nor2_2 _347_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__nor2_2 _347_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 23736 0 -1 7616
box -38 -48 498 592
-use sky130_fd_sc_hd__buf_4 _348_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__buf_4 _348_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 64860 0 -1 9792
box -38 -48 590 592
-use sky130_fd_sc_hd__nand2_8 _349_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__nand2_8 _349_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 101660 0 1 13056
box -38 -48 1510 592
-use sky130_fd_sc_hd__buf_2 _350_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__buf_2 _350_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 16100 0 1 11968
box -38 -48 406 592
-use sky130_fd_sc_hd__clkinv_2 _351_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__clkinv_2 _351_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 13524 0 -1 6528
box -38 -48 406 592
@@ -348207,23 +348207,23 @@
timestamp 1649977179
transform -1 0 105708 0 -1 20672
box -38 -48 590 592
-use sky130_fd_sc_hd__inv_2 _353_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__inv_2 _353_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 27140 0 1 9792
box -38 -48 314 592
-use sky130_fd_sc_hd__clkbuf_2 _354_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__clkbuf_2 _354_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 46000 0 -1 10880
box -38 -48 406 592
-use sky130_fd_sc_hd__dlymetal6s2s_1 _355_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__dlymetal6s2s_1 _355_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 43424 0 -1 8704
box -38 -48 958 592
-use sky130_fd_sc_hd__nand2_1 _356_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__nand2_1 _356_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 42688 0 1 9792
box -38 -48 314 592
-use sky130_fd_sc_hd__and2_4 _357_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and2_4 _357_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 24380 0 1 4352
box -38 -48 682 592
@@ -348235,7 +348235,7 @@
timestamp 1649977179
transform -1 0 84364 0 -1 10880
box -38 -48 406 592
-use sky130_fd_sc_hd__a41o_1 _360_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a41o_1 _360_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 79304 0 -1 9792
box -38 -48 774 592
@@ -348251,7 +348251,7 @@
timestamp 1649977179
transform 1 0 86848 0 1 9792
box -38 -48 774 592
-use sky130_fd_sc_hd__and3_1 _364_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and3_1 _364_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 86664 0 1 8704
box -38 -48 498 592
@@ -348271,19 +348271,19 @@
timestamp 1649977179
transform 1 0 79304 0 1 4352
box -38 -48 774 592
-use sky130_fd_sc_hd__and4_1 _369_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and4_1 _369_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 74152 0 -1 6528
box -38 -48 682 592
-use sky130_fd_sc_hd__and4b_2 _370_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and4b_2 _370_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 72036 0 -1 9792
box -38 -48 866 592
-use sky130_fd_sc_hd__a21o_2 _371_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a21o_2 _371_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 42596 0 1 10880
box -38 -48 682 592
-use sky130_fd_sc_hd__and3_2 _372_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and3_2 _372_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 43148 0 1 8704
box -38 -48 590 592
@@ -348291,19 +348291,19 @@
timestamp 1649977179
transform -1 0 86756 0 -1 10880
box -38 -48 406 592
-use sky130_fd_sc_hd__and3b_2 _374_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and3b_2 _374_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 78016 0 -1 9792
box -38 -48 774 592
-use sky130_fd_sc_hd__a221o_1 _375_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a221o_1 _375_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 27508 0 1 9792
box -38 -48 774 592
-use sky130_fd_sc_hd__and2_1 _376_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and2_1 _376_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 29256 0 -1 21760
box -38 -48 498 592
-use sky130_fd_sc_hd__clkbuf_1 _377_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__clkbuf_1 _377_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 28428 0 1 22848
box -38 -48 314 592
@@ -348323,7 +348323,7 @@
timestamp 1649977179
transform 1 0 7912 0 1 15232
box -38 -48 314 592
-use sky130_fd_sc_hd__or2_1 _382_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__or2_1 _382_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 7912 0 1 16320
box -38 -48 498 592
@@ -348347,7 +348347,7 @@
timestamp 1649977179
transform 1 0 49220 0 -1 6528
box -38 -48 958 592
-use sky130_fd_sc_hd__a32o_2 _388_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a32o_2 _388_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 48208 0 1 4352
box -38 -48 866 592
@@ -348359,15 +348359,15 @@
timestamp 1649977179
transform -1 0 23828 0 1 18496
box -38 -48 406 592
-use sky130_fd_sc_hd__o21a_1 _391_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__o21a_1 _391_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 8924 0 1 17408
box -38 -48 590 592
-use sky130_fd_sc_hd__nand3_1 _392_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__nand3_1 _392_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 7820 0 1 14144
box -38 -48 406 592
-use sky130_fd_sc_hd__a21o_1 _393_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a21o_1 _393_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 8464 0 -1 15232
box -38 -48 590 592
@@ -348399,7 +348399,7 @@
timestamp 1649977179
transform -1 0 15180 0 -1 18496
box -38 -48 314 592
-use sky130_fd_sc_hd__a31o_1 _401_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a31o_1 _401_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 10488 0 1 15232
box -38 -48 682 592
@@ -348423,11 +348423,11 @@
timestamp 1649977179
transform 1 0 21528 0 1 19584
box -38 -48 958 592
-use sky130_fd_sc_hd__o21ai_1 _407_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__o21ai_1 _407_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 19688 0 1 18496
box -38 -48 406 592
-use sky130_fd_sc_hd__a21oi_1 _408_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a21oi_1 _408_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 19596 0 -1 19584
box -38 -48 406 592
@@ -348483,7 +348483,7 @@
timestamp 1649977179
transform 1 0 25484 0 1 17408
box -38 -48 406 592
-use sky130_fd_sc_hd__or3b_4 _422_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__or3b_4 _422_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 81420 0 -1 11968
box -38 -48 866 592
@@ -348491,11 +348491,11 @@
timestamp 1649977179
transform 1 0 29532 0 1 7616
box -38 -48 314 592
-use sky130_fd_sc_hd__o211a_1 _424_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__o211a_1 _424_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 29532 0 1 17408
box -38 -48 774 592
-use sky130_fd_sc_hd__nor2_1 _425_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__nor2_1 _425_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 27784 0 1 25024
box -38 -48 314 592
@@ -348523,7 +348523,7 @@
timestamp 1649977179
transform -1 0 61364 0 1 6528
box -38 -48 958 592
-use sky130_fd_sc_hd__a32o_1 _432_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a32o_1 _432_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 57868 0 1 5440
box -38 -48 774 592
@@ -348543,7 +348543,7 @@
timestamp 1649977179
transform -1 0 44068 0 -1 11968
box -38 -48 590 592
-use sky130_fd_sc_hd__xnor2_1 _437_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__xnor2_1 _437_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 39652 0 -1 17408
box -38 -48 682 592
@@ -348619,7 +348619,7 @@
timestamp 1649977179
transform 1 0 46092 0 -1 19584
box -38 -48 406 592
-use sky130_fd_sc_hd__or3b_2 _456_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__or3b_2 _456_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 85192 0 -1 13056
box -38 -48 682 592
@@ -348791,7 +348791,7 @@
timestamp 1649977179
transform 1 0 46552 0 -1 9792
box -38 -48 314 592
-use sky130_fd_sc_hd__a21o_4 _499_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__a21o_4 _499_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 48852 0 1 10880
box -38 -48 1142 592
@@ -348799,7 +348799,7 @@
timestamp 1649977179
transform 1 0 81328 0 1 18496
box -38 -48 406 592
-use sky130_fd_sc_hd__o32a_1 _501_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__o32a_1 _501_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 82800 0 1 17408
box -38 -48 774 592
@@ -349047,7 +349047,7 @@
timestamp 1649977179
transform 1 0 97336 0 -1 10880
box -38 -48 314 592
-use sky130_fd_sc_hd__and3_4 _563_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and3_4 _563_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 45080 0 -1 9792
box -38 -48 866 592
@@ -349067,7 +349067,7 @@
timestamp 1649977179
transform -1 0 102120 0 1 28288
box -38 -48 498 592
-use sky130_fd_sc_hd__and4_2 _568_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and4_2 _568_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 100464 0 1 28288
box -38 -48 774 592
@@ -349119,7 +349119,7 @@
timestamp 1649977179
transform -1 0 96508 0 -1 17408
box -38 -48 682 592
-use sky130_fd_sc_hd__and3b_1 _581_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__and3b_1 _581_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 95956 0 1 11968
box -38 -48 682 592
@@ -349215,7 +349215,7 @@
timestamp 1649977179
transform -1 0 108928 0 1 11968
box -38 -48 590 592
-use sky130_fd_sc_hd__nand4_1 _605_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__nand4_1 _605_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 108008 0 1 16320
box -38 -48 498 592
@@ -349243,7 +349243,7 @@
timestamp 1649977179
transform -1 0 110952 0 1 22848
box -38 -48 314 592
-use sky130_fd_sc_hd__mux2_1 _612_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__mux2_1 _612_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 7636 0 1 10880
box -38 -48 866 592
@@ -349523,15 +349523,15 @@
timestamp 1649977179
transform 1 0 63572 0 -1 11968
box -38 -48 314 592
-use sky130_fd_sc_hd__dfxtp_1 _682_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__dfxtp_1 _682_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 14260 0 -1 6528
box -38 -48 1510 592
-use sky130_fd_sc_hd__dfxtp_2 _683_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__dfxtp_2 _683_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 28704 0 -1 25024
box -38 -48 1602 592
-use sky130_fd_sc_hd__dfxtp_4 _684_ dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__dfxtp_4 _684_ dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 6716 0 1 19584
box -38 -48 1786 592
@@ -350055,11 +350055,11 @@
timestamp 1649977179
transform -1 0 76912 0 1 10880
box -38 -48 314 592
-use sky130_fd_sc_hd__clkbuf_16 clkbuf_0_counter.clk dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__clkbuf_16 clkbuf_0_counter.clk dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 61732 0 1 18496
box -38 -48 1878 592
-use sky130_fd_sc_hd__clkbuf_8 clkbuf_1_0_0_counter.clk dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__clkbuf_8 clkbuf_1_0_0_counter.clk dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 47196 0 1 18496
box -38 -48 1050 592
@@ -351135,7 +351135,7 @@
timestamp 1649977179
transform -1 0 106812 0 -1 115328
box -38 -48 406 592
-use sky130_fd_sc_hd__buf_6 repeater254 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__buf_6 repeater254 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform 1 0 108376 0 1 22848
box -38 -48 866 592
@@ -351199,7 +351199,7 @@
timestamp 1649977179
transform -1 0 30360 0 1 25024
box -38 -48 866 592
-use sky130_fd_sc_hd__conb_1 user_proj_example_270 dep/pdk/sky130B/libs.ref/sky130_fd_sc_hd/mag
+use sky130_fd_sc_hd__conb_1 user_proj_example_270 dependencies/pdks/sky130B/libs.ref/sky130_fd_sc_hd/mag
timestamp 1649977179
transform -1 0 177100 0 -1 117504
box -38 -48 314 592
diff --git a/mag/user_project_wrapper.mag b/mag/user_project_wrapper.mag
index 45c638d..0da2b37 100644
--- a/mag/user_project_wrapper.mag
+++ b/mag/user_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech sky130B
magscale 1 2
-timestamp 1657065155
+timestamp 1662748239
<< metal1 >>
rect 71774 702992 71780 703044
rect 71832 703032 71838 703044
diff --git a/maglef/user_proj_example.mag b/maglef/user_proj_example.mag
index 55535af..f0f8e12 100644
--- a/maglef/user_proj_example.mag
+++ b/maglef/user_proj_example.mag
@@ -1,7 +1,7 @@
magic
tech sky130B
magscale 1 2
-timestamp 1657064826
+timestamp 1662747075
<< nwell >>
rect 1066 116677 178886 117243
rect 1066 115589 178886 116155
@@ -2588,7 +2588,7 @@
string LEFclass BLOCK
string LEFview TRUE
string GDS_END 7763560
-string GDS_FILE /home/kareem_farid/cup_5-7-22/openlane/user_proj_example/runs/user_proj_example/results/signoff/user_proj_example.magic.gds
+string GDS_FILE /ECE_TOOLS/BeMOSC_Projects/MPW7/mpw7-digital-chaotic-trng/openlane/user_proj_example/runs/22_09_09_18_02/results/signoff/user_proj_example.magic.gds
string GDS_START 391678
<< end >>
diff --git a/maglef/user_project_wrapper.mag b/maglef/user_project_wrapper.mag
index c4f8a63..7961eb4 100644
--- a/maglef/user_project_wrapper.mag
+++ b/maglef/user_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech sky130B
magscale 1 2
-timestamp 1657065162
+timestamp 1662748266
<< obsli1 >>
rect 236104 340159 413848 455521
<< obsm1 >>
@@ -3791,7 +3791,7 @@
string LEFclass BLOCK
string LEFview TRUE
string GDS_END 9575458
-string GDS_FILE /home/kareem_farid/cup_5-7-22/openlane/user_project_wrapper/runs/user_project_wrapper/results/signoff/user_project_wrapper.magic.gds
+string GDS_FILE /ECE_TOOLS/BeMOSC_Projects/MPW7/mpw7-digital-chaotic-trng/openlane/user_project_wrapper/runs/22_09_09_18_21/results/signoff/user_project_wrapper.magic.gds
string GDS_START 7763614
<< end >>
diff --git a/openlane/user_proj_example/config.tcl b/openlane/user_proj_example/config.tcl
deleted file mode 100644
index 216cba6..0000000
--- a/openlane/user_proj_example/config.tcl
+++ /dev/null
@@ -1,54 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-# SPDX-License-Identifier: Apache-2.0
-
-set ::env(PDK) $::env(PDK)
-set ::env(STD_CELL_LIBRARY) "sky130_fd_sc_hd"
-
-set script_dir [file dirname [file normalize [info script]]]
-
-set ::env(DESIGN_NAME) user_proj_example
-
-set ::env(VERILOG_FILES) "\
- $::env(CARAVEL_ROOT)/verilog/rtl/defines.v \
- $script_dir/../../verilog/rtl/user_proj_example.v"
-
-set ::env(DESIGN_IS_CORE) 0
-
-set ::env(CLOCK_PORT) "wb_clk_i"
-set ::env(CLOCK_NET) "counter.clk"
-set ::env(CLOCK_PERIOD) "10"
-
-set ::env(FP_SIZING) absolute
-set ::env(DIE_AREA) "0 0 900 600"
-
-set ::env(FP_PIN_ORDER_CFG) $script_dir/pin_order.cfg
-
-set ::env(PL_BASIC_PLACEMENT) 0
-set ::env(PL_TARGET_DENSITY) 0.05
-
-# Maximum layer used for routing is metal 4.
-# This is because this macro will be inserted in a top level (user_project_wrapper)
-# where the PDN is planned on metal 5. So, to avoid having shorts between routes
-# in this macro and the top level metal 5 stripes, we have to restrict routes to metal4.
-#
-set ::env(RT_MAX_LAYER) {met4}
-
-# You can draw more power domains if you need to
-set ::env(VDD_NETS) [list {vccd1}]
-set ::env(GND_NETS) [list {vssd1}]
-
-set ::env(DIODE_INSERTION_STRATEGY) 4
-# If you're going to use multiple power domains, then disable cvc run.
-set ::env(RUN_CVC) 1
diff --git a/openlane/user_proj_example/pin_order.cfg b/openlane/user_proj_example/pin_order.cfg
deleted file mode 100644
index 2fda806..0000000
--- a/openlane/user_proj_example/pin_order.cfg
+++ /dev/null
@@ -1,10 +0,0 @@
-#BUS_SORT
-
-#S
-wb_.*
-wbs_.*
-la_.*
-irq.*
-
-#N
-io_.*
diff --git a/openlane/user_project_wrapper/config.tcl b/openlane/user_project_wrapper/config.tcl
index 2b03104..cd2967a 100644
--- a/openlane/user_project_wrapper/config.tcl
+++ b/openlane/user_project_wrapper/config.tcl
@@ -39,14 +39,14 @@
## Clock configurations
set ::env(CLOCK_PORT) "user_clock2"
-set ::env(CLOCK_NET) "mprj.clk"
+set ::env(CLOCK_NET) "FSM1.user_clock2"
set ::env(CLOCK_PERIOD) "10"
## Internal Macros
### Macro PDN Connections
set ::env(FP_PDN_MACRO_HOOKS) "\
- mprj vccd1 vssd1 vccd1 vssd1"
+ FSM1 vccd1 vssd1 vccd1 vssd1"
### Macro Placement
set ::env(MACRO_PLACEMENT_CFG) $script_dir/macro.cfg
@@ -54,13 +54,13 @@
### Black-box verilog and views
set ::env(VERILOG_FILES_BLACKBOX) "\
$::env(CARAVEL_ROOT)/verilog/rtl/defines.v \
- $script_dir/../../verilog/rtl/user_proj_example.v"
+ $script_dir/../../verilog/rtl/FSM.v"
set ::env(EXTRA_LEFS) "\
- $script_dir/../../lef/user_proj_example.lef"
+ $script_dir/../../lef/FSM.lef"
set ::env(EXTRA_GDS_FILES) "\
- $script_dir/../../gds/user_proj_example.gds"
+ $script_dir/../../gds/FSM.gds"
# set ::env(GLB_RT_MAXLAYER) 5
set ::env(RT_MAX_LAYER) {met4}
diff --git a/openlane/user_project_wrapper/macro.cfg b/openlane/user_project_wrapper/macro.cfg
index a7365ab..5a286b1 100644
--- a/openlane/user_project_wrapper/macro.cfg
+++ b/openlane/user_project_wrapper/macro.cfg
@@ -1 +1 @@
-mprj 1175 1690 N
+FSM1 1175 1690 N
diff --git a/verilog/includes/includes.rtl.caravel_user_project b/verilog/includes/includes.rtl.caravel_user_project
index 31ab09b..167d081 100644
--- a/verilog/includes/includes.rtl.caravel_user_project
+++ b/verilog/includes/includes.rtl.caravel_user_project
@@ -1,5 +1,5 @@
# Caravel user project includes
-v $(USER_PROJECT_VERILOG)/rtl/user_project_wrapper.v
--v $(USER_PROJECT_VERILOG)/rtl/user_proj_example.v
+-v $(USER_PROJECT_VERILOG)/rtl/FSM.v
-
\ No newline at end of file
+
diff --git a/verilog/rtl/FSM.v b/verilog/rtl/FSM.v
new file mode 100644
index 0000000..63302c2
--- /dev/null
+++ b/verilog/rtl/FSM.v
@@ -0,0 +1,308 @@
+`timescale 1ns / 1ps
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype none
+/*
+ *-------------------------------------------------------------
+ *
+ * user_project_wrapper
+ *
+ * This wrapper enumerates all of the pins available to the
+ * user for the user project.
+ *
+ * An example user project is provided in this wrapper. The
+ * example should be removed and replaced with the actual
+ * user project.
+ *
+ *-------------------------------------------------------------
+ */
+
+module FSM #(
+ parameter BITS = 32
+) (
+`ifdef USE_POWER_PINS
+ inout vdda1, // User area 1 3.3V supply
+ inout vdda2, // User area 2 3.3V supply
+
+`endif
+ // Logic Analyzer Signals
+ input [127:0] la_data_in,
+ output [127:0] la_data_out,
+
+
+
+ // Independent clock (on independent integer divider)
+ input user_clock2,
+
+
+);
+
+/*--------------------------------------*/
+/* User project is instantiated here */
+/*--------------------------------------*/
+
+
+TOP
+ #(32)//Module parametrization //
+ project( //
+ // Inputs //
+ user_clock2, //
+ la_data_in[32], //
+ la_data_in[31:0],
+ // Output
+ la_data_out[64:33], //
+ la_data_out[65]
+ );
+
+
+endmodule // user_project_wrapper
+
+
+
+
+module TOP
+ #(parameter BIT = 32)//Module parametrization //
+ ( //
+ // Inputs //
+ input clk, //
+ input reset, //
+ input [ BIT - 1 : 0 ] external_bus,
+ // Output
+ output [ BIT - 1 : 0 ] output_bus, //
+ output series_ready
+ );
+
+wire [BIT-1:0] x_tent,x_log,x,CL,CT,internal_bus,x_n;
+wire [2:0] en_mode;
+wire ldX,ldL,ldT,ldE;
+assign output_bus = x;
+controller
+ #(BIT)//Module parametrization //
+ control_block(
+ clk,
+ reset,
+ external_bus,
+ x_n,
+ ldE,
+ ldX,
+ ldL,
+ ldT,
+ internal_bus,
+ series_ready
+
+ );
+ld_parameter
+ #(BIT)//Module parametrization //
+ X(
+ clk,
+ ldX,
+ internal_bus,
+ x
+ ) ;
+ld_parameter
+ #(BIT)//Module parametrization //
+ C_L(
+ clk,
+ ldL,
+ internal_bus,
+ CL
+ ) ;
+ld_parameter
+ #(BIT)//Module parametrization //
+ C_T(
+ clk,
+ ldT,
+ internal_bus,
+ CT
+ ) ;
+ld_parameter
+ #(3)//Module parametrization //
+ mode(
+ clk,
+ ldE,
+ internal_bus[2:0],
+ en_mode
+ ) ;
+map
+ #(BIT)//Module parametrization //
+ a(
+ x,
+ CL,
+ CT,
+
+ x_tent,
+ x_log
+ ) ;
+ //
+decoder
+ #(BIT)//Module parametrization //
+ b( //
+ // Inputs //
+ x_tent, //
+ x_log, //
+ en_mode,
+ // Output
+ x_n //
+ );
+endmodule
+module decoder
+ #(parameter BIT = 64)//Module parametrization //
+ ( //
+ // Inputs //
+ input [ BIT - 1 : 0 ] x_tent, //
+ input [ BIT - 1 : 0 ] x_log, //
+ input [ 2 : 0 ] en_mode,
+ // Output
+ output [ BIT - 1 : 0 ] x_n //
+ );
+wire [BIT -1 :0] flipped,unflipped,NLCS,FPCS,to_flip;
+wire [ 2*BIT - 4 : 0 ] FPCS_temp;
+wire [BIT -1 :0] double_map,single_map;
+
+
+
+assign to_flip = (~en_mode[0]) ? (x_tent):(x_log);
+assign unflipped = (~en_mode[1]) ? (x_tent):(x_log);
+
+assign flipped= {~|to_flip[BIT-1:0],~to_flip[BIT-2:0]+1'b1};
+assign FPCS_temp= flipped*unflipped;
+assign NLCS= x_tent+x_log;
+assign FPCS =FPCS_temp[ 2*BIT - 4 : BIT - 3 ];
+
+assign double_map = (~en_mode[1] | en_mode[0]) ? (FPCS):(NLCS);
+assign single_map = (en_mode[1] ^ en_mode[0]) ? (flipped):(unflipped);
+assign x_n = (~en_mode[2] ) ? (double_map):(single_map);
+
+
+
+endmodule
+module ld_parameter
+ #(parameter BIT = 64)//Module parametrization //
+ (
+ input clk,
+ input ld,
+ input [BIT-1:0] internal_bus,
+ output reg [BIT -1:0] para_meter
+ );
+
+always @(posedge clk)
+ begin
+ if (ld) para_meter <= internal_bus;
+ end
+endmodule
+module map
+ #(parameter BIT = 64)//Module parametrization //
+ ( //
+ // Inputs //
+ input [ BIT - 1 : 0 ] x, //
+ input [ BIT - 1 : 0 ] CL, //
+ input [ BIT - 1 : 0 ] CT,
+ //
+ // Outputs //
+ output [ BIT - 1 : 0 ] x_tent, //
+ output [ BIT - 1 : 0 ] x_log //
+ );
+wire [BIT -1 :0] one_minux_x, x_input;
+wire [ 2*BIT -3 : 0 ] tent; //
+wire [ 3*BIT -5 : 0 ] log;
+wire router;
+
+
+assign router = x[BIT-2]||x[BIT-1];
+
+assign one_minux_x= {~|x[BIT-1:0],~x[BIT-2:0]+1'b1};
+
+assign x_input = (router) ? (one_minux_x):(x);
+
+
+assign tent = x_input* CT;
+assign log = x*one_minux_x * CL;
+
+assign x_tent = tent[ 2*BIT - 3 : BIT - 2 ];
+assign x_log = log [ 3*BIT - 5 : 2*BIT - 4 ];
+
+endmodule
+
+
+
+
+
+module controller
+ #(parameter BIT = 64)//Module parametrization //
+ (
+ input CLK,
+ input reset,
+ input [BIT-1:0]external_bus,
+ input [BIT-1:0] x_n,
+ output reg ldE,
+ output reg ldX,
+ output reg ldL,
+ output reg ldT,
+ output [BIT-1:0] internal_bus,
+ output series_ready
+
+ );
+reg [2:0] state;
+localparam S0=3'b000,S1=3'b001,S2=3'b010,S3=3'b011,S4=3'b100,S5=3'b101,S6=3'b110,S7=3'b111;
+reg [12:0] counter=0;
+reg bus_mode=1;
+
+
+wire control_signal,repeate_signal;
+assign control_signal=&external_bus[BIT-1:BIT-3];
+assign repeate_signal=(&counter);
+assign internal_bus=(bus_mode)?(external_bus): (x_n);
+assign series_ready = ldX;
+
+always @(posedge CLK )
+ begin
+ case (state)
+ S0: if (control_signal) state <=S1;
+ S1: state<=S2;
+ S2: state<=S3;
+ S3: state<=S4;
+ S4: begin state<=S5; counter<=0; end
+ S5:begin
+ counter<=counter+1;
+ if (reset) state <= S7;
+ else if (control_signal) state <= S6;
+ end
+ S6: if (control_signal) state <= S5;
+ S7: state<=S0;
+ default :state <=S0;
+ endcase
+ end
+always @(state or counter)
+ begin
+ case (state)
+ S0: begin ldE = 0; ldX = 0; ldL = 0; ldT = 0; bus_mode =1 ;end
+ S1: begin ldE = 1; ldX = 0; ldL = 0; ldT = 0; bus_mode =1 ;end
+ S2: begin ldE = 0; ldX = 1; ldL = 0; ldT = 0; bus_mode =1 ;end
+ S3: begin ldE = 0; ldX = 0; ldL = 1; ldT = 0; bus_mode =1 ;end
+ S4: begin ldE = 0; ldX = 0; ldL = 0; ldT = 1; bus_mode =1 ;end
+ S5: begin
+ if (counter==13'b1111111111111) begin
+ ldX=1;
+ end else begin ldX=0; end
+ bus_mode = 0 ;ldE = 0; ldL = 0; ldT = 0;
+ end
+ S6: begin ldE = 0; ldX = 0; ldL = 0; ldT = 0; bus_mode = 0 ; end
+ S7: begin ldE = 1; ldX = 1; ldL = 1; ldT = 1; bus_mode = 1 ; end
+ endcase
+ end
+
+endmodule
+`default_nettype wire
diff --git a/verilog/rtl/user_proj_example.v b/verilog/rtl/user_proj_example.v
deleted file mode 100644
index 26081e9..0000000
--- a/verilog/rtl/user_proj_example.v
+++ /dev/null
@@ -1,165 +0,0 @@
-// SPDX-FileCopyrightText: 2020 Efabless Corporation
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-// http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-// SPDX-License-Identifier: Apache-2.0
-
-`default_nettype none
-/*
- *-------------------------------------------------------------
- *
- * user_proj_example
- *
- * This is an example of a (trivially simple) user project,
- * showing how the user project can connect to the logic
- * analyzer, the wishbone bus, and the I/O pads.
- *
- * This project generates an integer count, which is output
- * on the user area GPIO pads (digital output only). The
- * wishbone connection allows the project to be controlled
- * (start and stop) from the management SoC program.
- *
- * See the testbenches in directory "mprj_counter" for the
- * example programs that drive this user project. The three
- * testbenches are "io_ports", "la_test1", and "la_test2".
- *
- *-------------------------------------------------------------
- */
-
-module user_proj_example #(
- parameter BITS = 32
-)(
-`ifdef USE_POWER_PINS
- inout vccd1, // User area 1 1.8V supply
- inout vssd1, // User area 1 digital ground
-`endif
-
- // Wishbone Slave ports (WB MI A)
- input wb_clk_i,
- input wb_rst_i,
- input wbs_stb_i,
- input wbs_cyc_i,
- input wbs_we_i,
- input [3:0] wbs_sel_i,
- input [31:0] wbs_dat_i,
- input [31:0] wbs_adr_i,
- output wbs_ack_o,
- output [31:0] wbs_dat_o,
-
- // Logic Analyzer Signals
- input [127:0] la_data_in,
- output [127:0] la_data_out,
- input [127:0] la_oenb,
-
- // IOs
- input [`MPRJ_IO_PADS-1:0] io_in,
- output [`MPRJ_IO_PADS-1:0] io_out,
- output [`MPRJ_IO_PADS-1:0] io_oeb,
-
- // IRQ
- output [2:0] irq
-);
- wire clk;
- wire rst;
-
- wire [`MPRJ_IO_PADS-1:0] io_in;
- wire [`MPRJ_IO_PADS-1:0] io_out;
- wire [`MPRJ_IO_PADS-1:0] io_oeb;
-
- wire [31:0] rdata;
- wire [31:0] wdata;
- wire [BITS-1:0] count;
-
- wire valid;
- wire [3:0] wstrb;
- wire [31:0] la_write;
-
- // WB MI A
- assign valid = wbs_cyc_i && wbs_stb_i;
- assign wstrb = wbs_sel_i & {4{wbs_we_i}};
- assign wbs_dat_o = rdata;
- assign wdata = wbs_dat_i;
-
- // IO
- assign io_out = count;
- assign io_oeb = {(`MPRJ_IO_PADS-1){rst}};
-
- // IRQ
- assign irq = 3'b000; // Unused
-
- // LA
- assign la_data_out = {{(127-BITS){1'b0}}, count};
- // Assuming LA probes [63:32] are for controlling the count register
- assign la_write = ~la_oenb[63:32] & ~{BITS{valid}};
- // Assuming LA probes [65:64] are for controlling the count clk & reset
- assign clk = (~la_oenb[64]) ? la_data_in[64]: wb_clk_i;
- assign rst = (~la_oenb[65]) ? la_data_in[65]: wb_rst_i;
-
- counter #(
- .BITS(BITS)
- ) counter(
- .clk(clk),
- .reset(rst),
- .ready(wbs_ack_o),
- .valid(valid),
- .rdata(rdata),
- .wdata(wbs_dat_i),
- .wstrb(wstrb),
- .la_write(la_write),
- .la_input(la_data_in[63:32]),
- .count(count)
- );
-
-endmodule
-
-module counter #(
- parameter BITS = 32
-)(
- input clk,
- input reset,
- input valid,
- input [3:0] wstrb,
- input [BITS-1:0] wdata,
- input [BITS-1:0] la_write,
- input [BITS-1:0] la_input,
- output ready,
- output [BITS-1:0] rdata,
- output [BITS-1:0] count
-);
- reg ready;
- reg [BITS-1:0] count;
- reg [BITS-1:0] rdata;
-
- always @(posedge clk) begin
- if (reset) begin
- count <= 0;
- ready <= 0;
- end else begin
- ready <= 1'b0;
- if (~|la_write) begin
- count <= count + 1;
- end
- if (valid && !ready) begin
- ready <= 1'b1;
- rdata <= count;
- if (wstrb[0]) count[7:0] <= wdata[7:0];
- if (wstrb[1]) count[15:8] <= wdata[15:8];
- if (wstrb[2]) count[23:16] <= wdata[23:16];
- if (wstrb[3]) count[31:24] <= wdata[31:24];
- end else if (|la_write) begin
- count <= la_write & la_input;
- end
- end
- end
-
-endmodule
-`default_nettype wire
diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_project_wrapper.v
index 5ee1cee..740328d 100644
--- a/verilog/rtl/user_project_wrapper.v
+++ b/verilog/rtl/user_project_wrapper.v
@@ -82,40 +82,21 @@
/* User project is instantiated here */
/*--------------------------------------*/
-user_proj_example mprj (
+FSM FSM1(
`ifdef USE_POWER_PINS
.vccd1(vccd1), // User area 1 1.8V power
.vssd1(vssd1), // User area 1 digital ground
`endif
- .wb_clk_i(wb_clk_i),
- .wb_rst_i(wb_rst_i),
-
- // MGMT SoC Wishbone Slave
-
- .wbs_cyc_i(wbs_cyc_i),
- .wbs_stb_i(wbs_stb_i),
- .wbs_we_i(wbs_we_i),
- .wbs_sel_i(wbs_sel_i),
- .wbs_adr_i(wbs_adr_i),
- .wbs_dat_i(wbs_dat_i),
- .wbs_ack_o(wbs_ack_o),
- .wbs_dat_o(wbs_dat_o),
// Logic Analyzer
.la_data_in(la_data_in),
.la_data_out(la_data_out),
- .la_oenb (la_oenb),
- // IO Pads
- .io_in (io_in),
- .io_out(io_out),
- .io_oeb(io_oeb),
-
- // IRQ
- .irq(user_irq)
+ // user defined clock
+ .user_clock2(user_clock2)
);
endmodule // user_project_wrapper
