commit | 1bde9a7ba4dc8761c5fea48d7b536378144ffa5b | [log] [tgz] |
---|---|---|
author | Jeff DiCorpo <jeffdi@efabless.com> | Sat Dec 17 12:14:12 2022 -0800 |
committer | Jeff DiCorpo <jeffdi@efabless.com> | Sat Dec 17 12:14:12 2022 -0800 |
tree | 05e89eca2b481de42d3c6d349db2276ea219aa5b | |
parent | 91c8baca611de812f1a5e7981f8a6238eecd5b11 [diff] |
final gds oasis
This project contains array of various sizes of 1T1R devices and a 1T1R 256x256 ReRAM module for device performance characterization, e.g. I-V, transient, R-ratio, and variations, and ReRAM simulation model verification. The goal is to design a low power ReRAM controller optimized for write/read latency, endurance, and power consumption based on the actual measurement results of sky130 ReRAM devices.
Refer to README for this sample project documentation. ~