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2
3 <!---
4 # SPDX-FileCopyrightText: 2020 Efabless Corporation
5 #
6 # Licensed under the Apache License, Version 2.0 (the "License");
7 # you may not use this file except in compliance with the License.
8 # You may obtain a copy of the License at
9 #
10 # http://www.apache.org/licenses/LICENSE-2.0
11 #
12 # Unless required by applicable law or agreed to in writing, software
13 # distributed under the License is distributed on an "AS IS" BASIS,
14 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 # See the License for the specific language governing permissions and
16 # limitations under the License.
17 #
18 # SPDX-License-Identifier: Apache-2.0
19 -->
20
21Caravel User Project
22====================
23
manarabdelatyd0e7afb2021-04-22 00:21:13 +020024|License| |User CI| |Caravel Build|
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -070025
26Table of contents
27=================
28
29- `Overview <#overview>`__
manarabdelatyd0e7afb2021-04-22 00:21:13 +020030- `Install Caravel <#install-caravel>`__
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -070031- `Caravel Integration <#caravel-integration>`__
32
33 - `Repo Integration <#repo-integration>`__
34 - `Verilog Integration <#verilog-integration>`__
Manar4ec8cba2021-10-04 10:26:10 -050035 - `Layout Integration <#layout-integration>`__
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -070036
37- `Running Full Chip Simulation <#running-full-chip-simulation>`__
Manar4ec8cba2021-10-04 10:26:10 -050038- `User Project Wrapper Requirements <#user-project-wrapper-requirements>`__
39- `Hardening the User Project using
40 Openlane <#hardening-the-user-project-using-openlane>`__
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -070041- `Checklist for Open-MPW
42 Submission <#checklist-for-open-mpw-submission>`__
43
44Overview
45========
46
47This repo contains a sample user project that utilizes the
48`caravel <https://github.com/efabless/caravel.git>`__ chip user space.
49The user project is a simple counter that showcases how to make use of
50`caravel's <https://github.com/efabless/caravel.git>`__ user space
51utilities like IO pads, logic analyzer probes, and wishbone port. The
52repo also demonstrates the recommended structure for the open-mpw
53shuttle projects.
54
manarabdelatyd8dd0102021-04-30 08:40:52 +020055Prerequisites
56=============
57
58- Docker
59
manarabdelatyd0e7afb2021-04-22 00:21:13 +020060Install Caravel
61===============
62
63To setup caravel, run the following:
64
65.. code:: bash
66
matt venn77f39732021-05-04 13:31:13 +020067 # If unset, CARAVEL_ROOT will be set to $(pwd)/caravel
manarabdelatyd0e7afb2021-04-22 00:21:13 +020068 # If you want to install caravel at a different location, run "export CARAVEL_ROOT=<caravel-path>"
matt venn77f39732021-05-04 13:31:13 +020069 export CARAVEL_ROOT=$(pwd)/caravel
70
manarabdelatyd0e7afb2021-04-22 00:21:13 +020071 # Disable submodule installation if needed by, run "export SUBMODULE=0"
Mohamed Kassem9ae1f072021-04-23 12:19:31 -070072
manarabdelaty0218c0f2021-04-29 18:31:49 +020073 git clone https://github.com/efabless/caravel_user_project.git
Mohamed Kassem9ae1f072021-04-23 12:19:31 -070074 cd caravel_user_project
manarabdelatyd0e7afb2021-04-22 00:21:13 +020075 make install
76
77To update the installed caravel to the latest, run:
78
79.. code:: bash
80
81 make update_caravel
82
83To remove caravel, run
84
85.. code:: bash
86
87 make uninstall
88
89By default
90`caravel-lite <https://github.com/efabless/caravel-lite.git>`__ is
91installed. To install the full version of caravel, run this prior to
92calling make install.
93
94.. code:: bash
95
96 export CARAVEL_LITE=0
97
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -070098Caravel Integration
99===================
100
101Repo Integration
102----------------
103
104Caravel files are kept separate from the user project by having caravel
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200105as submodule. The submodule commit should point to the latest of
Manar4ec8cba2021-10-04 10:26:10 -0500106caravel/caravel-lite master/main branch. The following files should have a symbolic
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200107link to `caravel's <https://github.com/efabless/caravel.git>`__
108corresponding files:
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700109
manarabdelaty0c03d602021-09-20 11:42:16 +0200110- `Openlane Makefile <../../openlane/Makefile>`__: This provides an easier
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200111 way for running openlane to harden your macros. Refer to `Hardening
112 the User Project Macro using
113 Openlane <#hardening-the-user-project-macro-using-openlane>`__. Also,
114 the makefile retains the openlane summary reports under the signoff
115 directory.
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700116
manarabdelaty0c03d602021-09-20 11:42:16 +0200117- `Pin order <../../openlane/user_project_wrapper/pin_order.cfg>`__ file for
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700118 the user wrapper: The hardened user project wrapper macro must have
119 the same pin order specified in caravel's repo. Failing to adhere to
120 the same order will fail the gds integration of the macro with
121 caravel's back-end.
122
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200123The symbolic links are automatically set when you run ``make install``.
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700124
125Verilog Integration
126-------------------
127
128You need to create a wrapper around your macro that adheres to the
129template at
Manarf088db12021-09-20 12:13:04 +0200130`user\_project\_wrapper <https://github.com/efabless/caravel/blob/master/verilog/rtl/__user_project_wrapper.v>`__.
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700131The wrapper top module must be named ``user_project_wrapper`` and must
Manarf088db12021-09-20 12:13:04 +0200132have the same input and output ports as the golden wrapper `template <https://github.com/efabless/caravel/blob/master/verilog/rtl/__user_project_wrapper.v>`__. The wrapper gives access to the
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700133user space utilities provided by caravel like IO ports, logic analyzer
134probes, and wishbone bus connection to the management SoC.
135
136For this sample project, the user macro makes use of:
137
138- The IO ports for displaying the count register values on the IO pads.
139
140- The LA probes for supplying an optional reset and clock signals and
141 for setting an initial value for the count register.
142
matt venn4acd8b72021-04-27 11:34:42 +0200143- The wishbone port for reading/writing the count value through the
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700144 management SoC.
145
manarabdelatyfbd955f2021-09-20 11:59:53 +0200146Refer to `user\_project\_wrapper <../../verilog/rtl/user_project_wrapper.v>`__
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700147for more information.
148
149.. raw:: html
150
151 <p align="center">
152 <img src="./_static/counter_32.png" width="50%" height="50%">
153 </p>
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200154
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700155.. raw:: html
156
157 </p>
158
Manar4ec8cba2021-10-04 10:26:10 -0500159
160Layout Integration
161-------------------
162
163The caravel layout is pre-designed with an empty golden wrapper in the user space. You only need to provide us with a valid ``user_project_wrapper`` GDS file. And, as part of the tapeout process, your hardened ``user_project_wrapper`` will be inserted into a vanilla caravel layout to get the final layout shipped for fabrication.
164
165.. raw:: html
166
167 <p align="center">
168 <img src="./_static/layout.png" width="80%" height="80%">
169 </p>
170
171To make sure that this integration process goes smoothly without having any DRC or LVS issues, your hardened ``user_project_wrapper`` must adhere to a number of requirements listed at `User Project Wrapper Requirements <#user-project-wrapper-requirements>`__ .
172
173
manarabdelatyd8dd0102021-04-30 08:40:52 +0200174Building the PDK
175================
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700176
manarabdelatyd8dd0102021-04-30 08:40:52 +0200177You have two options for building the pdk:
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200178
manarabdelatyd8dd0102021-04-30 08:40:52 +0200179- Build the pdk natively.
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200180
manarabdelatyd8dd0102021-04-30 08:40:52 +0200181Make sure you have `Magic VLSI Layout Tool <http://opencircuitdesign.com/magic/index.html>`__ installed on your machine before building the pdk.
Manar4ec8cba2021-10-04 10:26:10 -0500182The pdk build is tested with magic version ``8.3.209``.
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200183
184.. code:: bash
185
186 # set PDK_ROOT to the path you wish to use for the pdk
187 export PDK_ROOT=<pdk-installation-path>
188
189 # you can optionally specify skywater-pdk and open-pdks commit used
190 # by setting and exporting SKYWATER_COMMIT and OPEN_PDKS_COMMIT
191 # if you do not set them, they default to the last verfied commits tested for this project
192
193 make pdk
194
manarabdelatyd8dd0102021-04-30 08:40:52 +0200195- Build the pdk using openlane's docker image which has magic installed.
196
197.. code:: bash
198
199 # set PDK_ROOT to the path you wish to use for the pdk
200 export PDK_ROOT=<pdk-installation-path>
201
202 # you can optionally specify skywater-pdk and open-pdks commit used
203 # by setting and exporting SKYWATER_COMMIT and OPEN_PDKS_COMMIT
204 # if you do not set them, they default to the last verfied commits tested for this project
205
206 make pdk-nonnative
207
208Running Full Chip Simulation
209============================
210
211First, you will need to install the simulation environment, by
212
213.. code:: bash
214
215 make simenv
216
217This will pull a docker image with the needed tools installed.
218
Manar4ec8cba2021-10-04 10:26:10 -0500219Then, run the RTL simulation by
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200220
221.. code:: bash
222
223 export PDK_ROOT=<pdk-installation-path>
224 export CARAVEL_ROOT=$(pwd)/caravel
225 # specify simulation mode: RTL/GL
226 export SIM=RTL
Manar4ec8cba2021-10-04 10:26:10 -0500227 # Run RTL simulation on IO ports testbench, make verify-io_ports
228 make verify-<testbench-name>
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200229
Manar4ec8cba2021-10-04 10:26:10 -0500230Once you have the physical implementation done and you have the gate-level netlists ready, it is crucial to run full gate-level simulations to make sure that your design works as intended after running the physical implementation.
231
232Run the gate-level simulation by:
233
234.. code:: bash
235
236 export PDK_ROOT=<pdk-installation-path>
237 export CARAVEL_ROOT=$(pwd)/caravel
238 # specify simulation mode: RTL/GL
239 export SIM=GL
240 # Run RTL simulation on IO ports testbench, make verify-io_ports
241 make verify-<testbench-name>
242
243
244This sample project comes with four example testbenches to test the IO port connection, wishbone interface, and logic analyzer. The test-benches are under the
245`verilog/dv <https://github.com/efabless/caravel_user_project/tree/main/verilog/dv>`__ directory. For more information on setting up the
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200246simulation environment and the available testbenches for this sample
Manarffaf9842021-04-30 22:55:37 +0200247project, refer to `README <https://github.com/efabless/caravel_user_project/blob/main/verilog/dv/README.md>`__.
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700248
Manar4ec8cba2021-10-04 10:26:10 -0500249
250User Project Wrapper Requirements
251=================================
252
253Your hardened ``user_project_wrapper`` must match the `golden user_project_wrapper <https://github.com/efabless/caravel/blob/master/gds/user_project_wrapper_empty.gds.gz>`__ in the following:
254
255- Area ``(2.920um x 3.520um)``
256- Top module name ``"user_project_wrapper"``
257- Pin Placement
258- Pin Sizes
259- Core Rings Width and Offset
260- PDN Vertical and Horizontal Straps Width
261
262
263.. raw:: html
264
265 <p align="center">
266 <img src="./_static/empty.png" width="40%" height="40%">
267 </p>
268
269
270These fixed configurations are specified `here <https://github.com/efabless/caravel/blob/master/openlane/user_project_wrapper_empty/fixed_wrapper_cfgs.tcl>`__ .
271
272However, you are allowed to change the following if you need to:
273
274- PDN Vertical and Horizontal Pitch & Offset
275
276.. raw:: html
277
278 <p align="center">
279 <img src="./_static/pitch.png" width="30%" height="30%">
280 </p>
281
282To make sure that you adhere to these requirements, we run an exclusive-or (XOR) check between your hardened ``user_project_wrapper`` GDS and the golden wrapper GDS after processing both layouts to include only the boundary (pins and core rings). This check is done as part of the `mpw-precheck <https://github.com/efabless/mpw_precheck>`__ tool.
283
284
285Hardening the User Project using OpenLane
286==========================================
287
288OpenLane Installation
289---------------------
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700290
manarabdelatyd8dd0102021-04-30 08:40:52 +0200291You will need to install openlane by running the following
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200292
293.. code:: bash
294
manarabdelaty0218c0f2021-04-29 18:31:49 +0200295 export OPENLANE_ROOT=<openlane-installation-path>
manarabdelatyfbd955f2021-09-20 11:59:53 +0200296
297 # you can optionally specify the openlane tag to use
298 # by running: export OPENLANE_TAG=<openlane-tag>
299 # if you do not set the tag, it defaults to the last verfied tag tested for this project
300
manarabdelaty0218c0f2021-04-29 18:31:49 +0200301 make openlane
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200302
manarabdelatyfbd955f2021-09-20 11:59:53 +0200303For detailed instructions on the openlane and the pdk installation refer
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200304to
Manar4ec8cba2021-10-04 10:26:10 -0500305`README <https://github.com/The-OpenROAD-Project/OpenLane#setting-up-openlane>`__.
306
307Hardening Options
308-----------------
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700309
manarabdelatyfbd955f2021-09-20 11:59:53 +0200310There are three options for hardening the user project macro using
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700311openlane:
312
Manar4ec8cba2021-10-04 10:26:10 -0500313+--------------------------------------------------------------+--------------------------------------------+--------------------------------------------+
314| Option 1 | Option 2 | Option 3 |
315+--------------------------------------------------------------+--------------------------------------------+--------------------------------------------+
316| Hardening the user macro(s) first, then inserting it in the | Flattening the user macro(s) with the | Placing multiple macros in the wrapper |
317| user project wrapper with no standard cells on the top level | user_project_wrapper | along with standard cells on the top level |
318+==============================================================+============================================+============================================+
319| |pic1| | |pic2| | |pic3| |
320| | | |
321+--------------------------------------------------------------+--------------------------------------------+--------------------------------------------+
322| ex: |link1| | | ex: |link2| |
323+--------------------------------------------------------------+--------------------------------------------+--------------------------------------------+
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700324
Manar4ec8cba2021-10-04 10:26:10 -0500325.. |link1| replace:: `caravel_user_project <https://github.com/efabless/caravel_user_project>`__
326
327.. |link2| replace:: `caravel_ibex <https://github.com/efabless/caravel_ibex>`__
328
329
330.. |pic1| image:: ./_static/option1.png
331 :width: 48%
332
333.. |pic2| image:: ./_static/option2.png
334 :width: 140%
335
336.. |pic3| image:: ./_static/option3.png
337 :width: 72%
338
339For more details on hardening macros using openlane, refer to `README <https://github.com/The-OpenROAD-Project/OpenLane/blob/master/docs/source/hardening_macros.md>`__.
340
341
342Running OpenLane
343-----------------
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700344
345For this sample project, we went for the first option where the user
346macro is hardened first, then it is inserted in the user project
manarabdelatyfbd955f2021-09-20 11:59:53 +0200347wrapper without having any standard cells on the top level.
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700348
349.. raw:: html
350
351 <p align="center">
Manar4ec8cba2021-10-04 10:26:10 -0500352 <img src="./_static/wrapper.png" width="30%" height="30%">
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700353 </p>
354
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200355.. raw:: html
356
357 </p>
Manar4ec8cba2021-10-04 10:26:10 -0500358
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700359To reproduce hardening this project, run the following:
360
361.. code:: bash
362
manarabdelaty0218c0f2021-04-29 18:31:49 +0200363 # Run openlane to harden user_proj_example
364 make user_proj_example
365 # Run openlane to harden user_project_wrapper
366 make user_project_wrapper
367
368
Manar4ec8cba2021-10-04 10:26:10 -0500369For more information on the openlane flow, check `README <https://github.com/The-OpenROAD-Project/OpenLane#readme>`__.
370
Manarf088db12021-09-20 12:13:04 +0200371Running MPW Precheck Locally
manarabdelaty0218c0f2021-04-29 18:31:49 +0200372=================================
373
Manar4ec8cba2021-10-04 10:26:10 -0500374You can install the `mpw-precheck <https://github.com/efabless/mpw_precheck>`__ by running
manarabdelaty0218c0f2021-04-29 18:31:49 +0200375
376.. code:: bash
377
378 # By default, this install the precheck in your home directory
379 # To change the installtion path, run "export PRECHECK_ROOT=<precheck installation path>"
380 make precheck
381
382This will clone the precheck repo and pull the latest precheck docker image.
383
384
385Then, you can run the precheck by running
manarabdelatyd8dd0102021-04-30 08:40:52 +0200386Specify CARAVEL_ROOT before running any of the following,
manarabdelaty0218c0f2021-04-29 18:31:49 +0200387
388.. code:: bash
389
manarabdelatyd8dd0102021-04-30 08:40:52 +0200390 # export CARAVEL_ROOT=$(pwd)/caravel
391 export CARAVEL_ROOT=<path-to-caravel>
manarabdelaty0218c0f2021-04-29 18:31:49 +0200392 make run-precheck
393
394This will run all the precheck checks on your project and will produce the logs under the ``checks`` directory.
395
396
397Other Miscellaneous Targets
398============================
399
400The makefile provides a number of useful that targets that can run LVS, DRC, and XOR checks on your hardened design outside of openlane's flow.
401
Manarf088db12021-09-20 12:13:04 +0200402Run ``make help`` to display available targets.
manarabdelaty0218c0f2021-04-29 18:31:49 +0200403
404Specify CARAVEL_ROOT before running any of the following,
405
406.. code:: bash
manarabdelatyd8dd0102021-04-30 08:40:52 +0200407
408 # export CARAVEL_ROOT=$(pwd)/caravel
manarabdelaty0218c0f2021-04-29 18:31:49 +0200409 export CARAVEL_ROOT=<path-to-caravel>
410
manarabdelaty0c03d602021-09-20 11:42:16 +0200411Run lvs on the mag view,
manarabdelaty0218c0f2021-04-29 18:31:49 +0200412
413.. code:: bash
414
415 make lvs-<macro_name>
416
417Run lvs on the gds,
418
419.. code:: bash
420
421 make lvs-gds-<macro_name>
422
423Run lvs on the maglef,
424
425.. code:: bash
426
427 make lvs-maglef-<macro_name>
428
429Run drc using magic,
430
431.. code:: bash
432
433 make drc-<macro_name>
434
435Run antenna check using magic,
436
437.. code:: bash
438
439 make antenna-<macro_name>
440
441Run XOR check,
442
443.. code:: bash
444
445 make xor-wrapper
446
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700447
448Checklist for Open-MPW Submission
449=================================
450
Manarf088db12021-09-20 12:13:04 +0200451- ✔️ The project repo adheres to the same directory structure in this
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700452 repo.
Manarf088db12021-09-20 12:13:04 +0200453- ✔️ The project repo contain info.yaml at the project root.
454- ✔️ Top level macro is named ``user_project_wrapper``.
455- ✔️ Full Chip Simulation passes for RTL and GL (gate-level)
456- ✔️ The hardened Macros are LVS and DRC clean
Jeff DiCorpo9e950432021-10-24 10:09:39 -0700457- ✔️ The project contains a gate-level netlist for ``user_project_wrapper`` at verilog/gl/user_project_wrapper.v
Manarf088db12021-09-20 12:13:04 +0200458- ✔️ The hardened ``user_project_wrapper`` adheres to the same pin
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700459 order specified at
460 `pin\_order <https://github.com/efabless/caravel/blob/master/openlane/user_project_wrapper_empty/pin_order.cfg>`__
Manarf088db12021-09-20 12:13:04 +0200461- ✔️ The hardened ``user_project_wrapper`` adheres to the fixed wrapper configuration specified at `fixed_wrapper_cfgs <https://github.com/efabless/caravel/blob/master/openlane/user_project_wrapper_empty/fixed_wrapper_cfgs.tcl>`__
462- ✔️ XOR check passes with zero total difference.
463- ✔️ Openlane summary reports are retained under ./signoff/
464- ✔️ The design passes the `mpw-precheck <https://github.com/efabless/mpw_precheck>`__
Mohamed Kassem6f2fcd22021-04-19 10:14:19 -0700465
466.. |License| image:: https://img.shields.io/badge/License-Apache%202.0-blue.svg
467 :target: https://opensource.org/licenses/Apache-2.0
manarabdelatyd0e7afb2021-04-22 00:21:13 +0200468.. |User CI| image:: https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml/badge.svg
469 :target: https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml
470.. |Caravel Build| image:: https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml/badge.svg
Mohamed Kassem9ae1f072021-04-23 12:19:31 -0700471 :target: https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml