commit 2ff5593967dd70e20bd092bef25961f022948a3a
author Ali Imran <59641896+ALI11-2000@users.noreply.github.com> Sun Aug 14 21:16:24 2022 +0500
committer GitHub <noreply@github.com> Sun Aug 14 21:16:24 2022 +0500
tree d04c0af310db6af5f3f4c0d7b79376f4082eb643
parent d734788871910c4ca1c302c00f9b6ba8e2b678d9

SRAM Verilog Updated for Makerchip

verilog/rtl/sky130_sram_2kbyte_1rw1r_32x512_8.v

diff --git a/verilog/rtl/sky130_sram_2kbyte_1rw1r_32x512_8.v b/verilog/rtl/sky130_sram_2kbyte_1rw1r_32x512_8.v
index c959db0..78fd6bc 100644
--- a/verilog/rtl/sky130_sram_2kbyte_1rw1r_32x512_8.v
+++ b/verilog/rtl/sky130_sram_2kbyte_1rw1r_32x512_8.v
@@ -54,7 +54,6 @@
         wmask0_reg = wmask0;

         addr0_reg = addr0;

         din0_reg = din0;

-        #(T_HOLD) dout0 <= 32'bx;

         if ( !csb0_reg && web0_reg && VERBOSE ) 

           $display($time," Reading %m addr0=%b dout0=%b",addr0_reg,mem[addr0_reg]);

         if ( !csb0_reg && !web0_reg && VERBOSE )

@@ -72,7 +71,6 @@
         addr1_reg = addr1;

         if (!csb0 && !web0 && !csb1 && (addr0 == addr1))

              $display($time," WARNING: Writing and reading addr0=%b and addr1=%b simultaneously!",addr0,addr1);

-        #(T_HOLD) dout1 <= 32'bx;

         if ( !csb1_reg && VERBOSE ) 

           $display($time," Reading %m addr1=%b dout1=%b",addr1_reg,mem[addr1_reg]);

       end