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verilog
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includes
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includes.rtl.caravel_user_project
blob: 31ab09bb353fc0b5677a44beee6b8cdf6c51e6e7 [
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# Caravel user project includes
-
v $
(
USER_PROJECT_VERILOG
)/
rtl
/
user_project_wrapper
.
v
-
v $
(
USER_PROJECT_VERILOG
)/
rtl
/
user_proj_example
.
v
