blob: 64d9383e038748480712f729c493b750c6289d82 [file] [log] [blame]
Project Chip ID is: 500718
Setting Project Chip ID to: 0007a3ee
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!