| v {xschem version=3.0.0 file_version=1.2 } |
| G {} |
| K {} |
| V {} |
| S {} |
| E {} |
| N 740 -780 740 -500 { |
| lab=vdda1} |
| N 720 -800 720 -520 { |
| lab=vccd1} |
| N 760 -1500 760 -1210 { |
| lab=Vref} |
| N 720 -1090 720 -800 { |
| lab=vccd1} |
| N 740 -1070 740 -780 { |
| lab=vdda1} |
| N 640 -210 740 -210 { |
| lab=vdda1} |
| N 780 -1460 780 -1170 { |
| lab=Vrplus} |
| N 780 -1170 780 -880 { |
| lab=Vrplus} |
| N 800 -1480 800 -1190 { |
| lab=Vsample} |
| N 700 -250 700 -90 { |
| lab=VSUBS} |
| N 700 -820 700 -540 { |
| lab=VSUBS} |
| N 700 -1110 700 -820 { |
| lab=VSUBS} |
| N 640 -230 720 -230 { |
| lab=vccd1} |
| N 640 -250 700 -250 { |
| lab=VSUBS} |
| N 640 -500 740 -500 { |
| lab=vdda1} |
| N 640 -520 720 -520 { |
| lab=vccd1} |
| N 640 -540 700 -540 { |
| lab=VSUBS} |
| N 740 -210 740 -90 { |
| lab=vdda1} |
| N 720 -230 720 -90 { |
| lab=vccd1} |
| N 640 -330 800 -330 { |
| lab=Vsample} |
| N 640 -350 760 -350 { |
| lab=Vref} |
| N 640 -310 780 -310 { |
| lab=Vrplus} |
| N 640 -270 850 -270 { |
| lab=row0} |
| N 640 -620 800 -620 { |
| lab=Vsample} |
| N 640 -640 760 -640 { |
| lab=Vref} |
| N 640 -600 780 -600 { |
| lab=Vrplus} |
| N 640 -560 850 -560 { |
| lab=row1} |
| N 640 -780 740 -780 { |
| lab=vdda1} |
| N 640 -800 720 -800 { |
| lab=vccd1} |
| N 640 -820 700 -820 { |
| lab=VSUBS} |
| N 640 -900 800 -900 { |
| lab=Vsample} |
| N 640 -920 760 -920 { |
| lab=Vref} |
| N 640 -840 850 -840 { |
| lab=row2} |
| N 640 -1070 740 -1070 { |
| lab=vdda1} |
| N 640 -1090 720 -1090 { |
| lab=vccd1} |
| N 640 -1110 700 -1110 { |
| lab=VSUBS} |
| N 640 -1170 780 -1170 { |
| lab=Vrplus} |
| N 640 -1130 850 -1130 { |
| lab=row3} |
| N 640 -1360 740 -1360 { |
| lab=vdda1} |
| N 640 -1380 720 -1380 { |
| lab=vccd1} |
| N 640 -1400 700 -1400 { |
| lab=VSUBS} |
| N 640 -1480 800 -1480 { |
| lab=Vsample} |
| N 640 -1500 760 -1500 { |
| lab=Vref} |
| N 640 -1460 780 -1460 { |
| lab=Vrplus} |
| N 640 -1420 850 -1420 { |
| lab=row4} |
| N 800 -330 800 -90 { |
| lab=Vsample} |
| N 760 -350 760 -90 { |
| lab=Vref} |
| N 780 -310 780 -90 { |
| lab=Vrplus} |
| N 800 -620 800 -330 { |
| lab=Vsample} |
| N 760 -640 760 -350 { |
| lab=Vref} |
| N 780 -600 780 -310 { |
| lab=Vrplus} |
| N 740 -500 740 -210 { |
| lab=vdda1} |
| N 720 -520 720 -230 { |
| lab=vccd1} |
| N 700 -540 700 -250 { |
| lab=VSUBS} |
| N 800 -900 800 -620 { |
| lab=Vsample} |
| N 760 -920 760 -640 { |
| lab=Vref} |
| N 640 -880 780 -880 { |
| lab=Vrplus} |
| N 780 -880 780 -600 { |
| lab=Vrplus} |
| N 640 -1190 800 -1190 { |
| lab=Vsample} |
| N 800 -1190 800 -900 { |
| lab=Vsample} |
| N 640 -1210 760 -1210 { |
| lab=Vref} |
| N 640 -1650 740 -1650 { |
| lab=vdda1} |
| N 640 -1670 720 -1670 { |
| lab=vccd1} |
| N 640 -1690 700 -1690 { |
| lab=VSUBS} |
| N 640 -1770 800 -1770 { |
| lab=Vsample} |
| N 640 -1790 760 -1790 { |
| lab=Vref} |
| N 640 -1750 780 -1750 { |
| lab=Vrplus} |
| N 640 -1710 850 -1710 { |
| lab=row5} |
| N 640 -1930 740 -1930 { |
| lab=vdda1} |
| N 640 -1950 720 -1950 { |
| lab=vccd1} |
| N 640 -1970 700 -1970 { |
| lab=VSUBS} |
| N 640 -2050 800 -2050 { |
| lab=Vsample} |
| N 640 -2070 760 -2070 { |
| lab=Vref} |
| N 640 -1990 850 -1990 { |
| lab=row6} |
| N 640 -2220 740 -2220 { |
| lab=vdda1} |
| N 640 -2240 720 -2240 { |
| lab=vccd1} |
| N 640 -2260 700 -2260 { |
| lab=VSUBS} |
| N 640 -2320 780 -2320 { |
| lab=Vrplus} |
| N 640 -2280 850 -2280 { |
| lab=row7} |
| N 640 -2030 780 -2030 { |
| lab=Vrplus} |
| N 640 -2340 800 -2340 { |
| lab=Vsample} |
| N 640 -2360 760 -2360 { |
| lab=Vref} |
| N 740 -3080 740 -2800 { |
| lab=vdda1} |
| N 640 -2510 740 -2510 { |
| lab=vdda1} |
| N 640 -2530 720 -2530 { |
| lab=vccd1} |
| N 640 -2550 700 -2550 { |
| lab=VSUBS} |
| N 640 -2800 740 -2800 { |
| lab=vdda1} |
| N 640 -2820 720 -2820 { |
| lab=vccd1} |
| N 640 -2840 700 -2840 { |
| lab=VSUBS} |
| N 640 -2630 800 -2630 { |
| lab=Vsample} |
| N 640 -2650 760 -2650 { |
| lab=Vref} |
| N 640 -2610 780 -2610 { |
| lab=Vrplus} |
| N 640 -2570 850 -2570 { |
| lab=row8} |
| N 640 -2920 800 -2920 { |
| lab=Vsample} |
| N 640 -2940 760 -2940 { |
| lab=Vref} |
| N 640 -2900 780 -2900 { |
| lab=Vrplus} |
| N 640 -2860 850 -2860 { |
| lab=row9} |
| N 640 -3080 740 -3080 { |
| lab=vdda1} |
| N 640 -3100 720 -3100 { |
| lab=vccd1} |
| N 640 -3120 700 -3120 { |
| lab=VSUBS} |
| N 640 -3200 800 -3200 { |
| lab=Vsample} |
| N 640 -3220 760 -3220 { |
| lab=Vref} |
| N 640 -3140 850 -3140 { |
| lab=row10} |
| N 640 -3370 740 -3370 { |
| lab=vdda1} |
| N 640 -3390 720 -3390 { |
| lab=vccd1} |
| N 640 -3410 700 -3410 { |
| lab=VSUBS} |
| N 640 -3470 780 -3470 { |
| lab=Vrplus} |
| N 640 -3430 850 -3430 { |
| lab=row11} |
| N 640 -3660 740 -3660 { |
| lab=vdda1} |
| N 640 -3680 720 -3680 { |
| lab=vccd1} |
| N 640 -3700 700 -3700 { |
| lab=VSUBS} |
| N 640 -3780 800 -3780 { |
| lab=Vsample} |
| N 640 -3800 760 -3800 { |
| lab=Vref} |
| N 640 -3760 780 -3760 { |
| lab=Vrplus} |
| N 640 -3720 850 -3720 { |
| lab=row12} |
| N 640 -3180 780 -3180 { |
| lab=Vrplus} |
| N 640 -3490 800 -3490 { |
| lab=Vsample} |
| N 640 -3510 760 -3510 { |
| lab=Vref} |
| N 640 -3950 740 -3950 { |
| lab=vdda1} |
| N 640 -3970 720 -3970 { |
| lab=vccd1} |
| N 640 -3990 700 -3990 { |
| lab=VSUBS} |
| N 640 -4070 800 -4070 { |
| lab=Vsample} |
| N 640 -4090 760 -4090 { |
| lab=Vref} |
| N 640 -4050 780 -4050 { |
| lab=Vrplus} |
| N 640 -4010 850 -4010 { |
| lab=row13} |
| N 640 -4230 740 -4230 { |
| lab=vdda1} |
| N 640 -4250 720 -4250 { |
| lab=vccd1} |
| N 640 -4270 700 -4270 { |
| lab=VSUBS} |
| N 640 -4350 800 -4350 { |
| lab=Vsample} |
| N 640 -4370 760 -4370 { |
| lab=Vref} |
| N 640 -4290 850 -4290 { |
| lab=row14} |
| N 640 -4520 740 -4520 { |
| lab=vdda1} |
| N 640 -4540 720 -4540 { |
| lab=vccd1} |
| N 640 -4560 700 -4560 { |
| lab=VSUBS} |
| N 640 -4620 780 -4620 { |
| lab=Vrplus} |
| N 640 -4580 850 -4580 { |
| lab=row15} |
| N 640 -4330 780 -4330 { |
| lab=Vrplus} |
| N 640 -4640 800 -4640 { |
| lab=Vsample} |
| N 640 -4660 760 -4660 { |
| lab=Vref} |
| N 760 -1210 760 -920 { |
| lab=Vref} |
| N 740 -1360 740 -1070 { |
| lab=vdda1} |
| N 720 -1380 720 -1090 { |
| lab=vccd1} |
| N 700 -1400 700 -1110 { |
| lab=VSUBS} |
| N 800 -1770 800 -1480 { |
| lab=Vsample} |
| N 760 -1790 760 -1500 { |
| lab=Vref} |
| N 780 -1750 780 -1460 { |
| lab=Vrplus} |
| N 740 -1650 740 -1360 { |
| lab=vdda1} |
| N 720 -1670 720 -1380 { |
| lab=vccd1} |
| N 700 -1690 700 -1400 { |
| lab=VSUBS} |
| N 800 -2050 800 -1770 { |
| lab=Vsample} |
| N 760 -2070 760 -1790 { |
| lab=Vref} |
| N 740 -1930 740 -1650 { |
| lab=vdda1} |
| N 720 -1950 720 -1670 { |
| lab=vccd1} |
| N 700 -1970 700 -1690 { |
| lab=VSUBS} |
| N 780 -2320 780 -2030 { |
| lab=Vrplus} |
| N 780 -2030 780 -1750 { |
| lab=Vrplus} |
| N 800 -2340 800 -2050 { |
| lab=Vsample} |
| N 760 -2360 760 -2070 { |
| lab=Vref} |
| N 740 -2800 740 -2510 { |
| lab=vdda1} |
| N 740 -2220 740 -1930 { |
| lab=vdda1} |
| N 720 -2240 720 -1950 { |
| lab=vccd1} |
| N 700 -2260 700 -1970 { |
| lab=VSUBS} |
| N 740 -2510 740 -2220 { |
| lab=vdda1} |
| N 720 -2530 720 -2240 { |
| lab=vccd1} |
| N 700 -2550 700 -2260 { |
| lab=VSUBS} |
| N 800 -2630 800 -2340 { |
| lab=Vsample} |
| N 760 -2650 760 -2360 { |
| lab=Vref} |
| N 780 -2610 780 -2320 { |
| lab=Vrplus} |
| N 800 -2920 800 -2630 { |
| lab=Vsample} |
| N 760 -2940 760 -2650 { |
| lab=Vref} |
| N 780 -2900 780 -2610 { |
| lab=Vrplus} |
| N 720 -2820 720 -2530 { |
| lab=vccd1} |
| N 700 -2840 700 -2550 { |
| lab=VSUBS} |
| N 800 -3200 800 -2920 { |
| lab=Vsample} |
| N 760 -3220 760 -2940 { |
| lab=Vref} |
| N 720 -3100 720 -2820 { |
| lab=vccd1} |
| N 700 -3120 700 -2840 { |
| lab=VSUBS} |
| N 780 -3470 780 -3180 { |
| lab=Vrplus} |
| N 740 -3370 740 -3080 { |
| lab=vdda1} |
| N 720 -3390 720 -3100 { |
| lab=vccd1} |
| N 700 -3410 700 -3120 { |
| lab=VSUBS} |
| N 800 -3780 800 -3490 { |
| lab=Vsample} |
| N 760 -3800 760 -3510 { |
| lab=Vref} |
| N 780 -3760 780 -3470 { |
| lab=Vrplus} |
| N 780 -3180 780 -2900 { |
| lab=Vrplus} |
| N 800 -3490 800 -3200 { |
| lab=Vsample} |
| N 760 -3510 760 -3220 { |
| lab=Vref} |
| N 740 -3660 740 -3370 { |
| lab=vdda1} |
| N 720 -3680 720 -3390 { |
| lab=vccd1} |
| N 700 -3700 700 -3410 { |
| lab=VSUBS} |
| N 800 -4070 800 -3780 { |
| lab=Vsample} |
| N 760 -4090 760 -3800 { |
| lab=Vref} |
| N 780 -4050 780 -3760 { |
| lab=Vrplus} |
| N 740 -3950 740 -3660 { |
| lab=vdda1} |
| N 720 -3970 720 -3680 { |
| lab=vccd1} |
| N 700 -3990 700 -3700 { |
| lab=VSUBS} |
| N 800 -4350 800 -4070 { |
| lab=Vsample} |
| N 760 -4370 760 -4090 { |
| lab=Vref} |
| N 740 -4230 740 -3950 { |
| lab=vdda1} |
| N 720 -4250 720 -3970 { |
| lab=vccd1} |
| N 700 -4270 700 -3990 { |
| lab=VSUBS} |
| N 780 -4620 780 -4330 { |
| lab=Vrplus} |
| N 780 -4330 780 -4050 { |
| lab=Vrplus} |
| N 800 -4640 800 -4350 { |
| lab=Vsample} |
| N 760 -4660 760 -4370 { |
| lab=Vref} |
| N 280 -4520 340 -4520 { |
| lab=A15} |
| N 280 -4560 340 -4560 { |
| lab=B15} |
| N 280 -4230 340 -4230 { |
| lab=A14} |
| N 280 -4270 340 -4270 { |
| lab=B14} |
| N 280 -3950 340 -3950 { |
| lab=A13} |
| N 280 -3990 340 -3990 { |
| lab=B13} |
| N 280 -3660 340 -3660 { |
| lab=A12} |
| N 280 -3700 340 -3700 { |
| lab=B12} |
| N 280 -3370 340 -3370 { |
| lab=A11} |
| N 280 -3410 340 -3410 { |
| lab=B11} |
| N 280 -3080 340 -3080 { |
| lab=A10} |
| N 280 -3120 340 -3120 { |
| lab=B10} |
| N 280 -2800 340 -2800 { |
| lab=A9} |
| N 280 -2840 340 -2840 { |
| lab=B9} |
| N 280 -2510 340 -2510 { |
| lab=A8} |
| N 280 -2550 340 -2550 { |
| lab=B8} |
| N 280 -2220 340 -2220 { |
| lab=A7} |
| N 280 -2260 340 -2260 { |
| lab=B7} |
| N 280 -1930 340 -1930 { |
| lab=A6} |
| N 280 -1970 340 -1970 { |
| lab=B6} |
| N 280 -1650 340 -1650 { |
| lab=A5} |
| N 280 -1690 340 -1690 { |
| lab=B5} |
| N 280 -1360 340 -1360 { |
| lab=A4} |
| N 280 -1400 340 -1400 { |
| lab=B4} |
| N 280 -1070 340 -1070 { |
| lab=A3} |
| N 280 -1110 340 -1110 { |
| lab=B3} |
| N 280 -780 340 -780 { |
| lab=A2} |
| N 280 -820 340 -820 { |
| lab=B2} |
| N 280 -500 340 -500 { |
| lab=A1} |
| N 280 -540 340 -540 { |
| lab=B1} |
| N 280 -210 340 -210 { |
| lab=A0} |
| N 280 -250 340 -250 { |
| lab=B0} |
| N 640 -290 820 -290 { |
| lab=Vrminus} |
| N 820 -290 820 -90 { |
| lab=Vrminus} |
| N 700 -4560 700 -4270 { |
| lab=VSUBS} |
| N 720 -4540 720 -4250 { |
| lab=vccd1} |
| N 740 -4520 740 -4230 { |
| lab=vdda1} |
| N 640 -4600 820 -4600 { |
| lab=Vrminus} |
| N 820 -580 820 -290 { |
| lab=Vrminus} |
| N 640 -580 820 -580 { |
| lab=Vrminus} |
| N 820 -860 820 -580 { |
| lab=Vrminus} |
| N 640 -860 820 -860 { |
| lab=Vrminus} |
| N 640 -1150 820 -1150 { |
| lab=Vrminus} |
| N 820 -1150 820 -860 { |
| lab=Vrminus} |
| N 820 -1440 820 -1150 { |
| lab=Vrminus} |
| N 640 -1440 820 -1440 { |
| lab=Vrminus} |
| N 640 -1730 820 -1730 { |
| lab=Vrminus} |
| N 820 -1730 820 -1440 { |
| lab=Vrminus} |
| N 820 -2010 820 -1730 { |
| lab=Vrminus} |
| N 640 -2010 820 -2010 { |
| lab=Vrminus} |
| N 640 -2300 820 -2300 { |
| lab=Vrminus} |
| N 820 -2300 820 -2010 { |
| lab=Vrminus} |
| N 820 -2590 820 -2300 { |
| lab=Vrminus} |
| N 640 -2590 820 -2590 { |
| lab=Vrminus} |
| N 640 -2880 820 -2880 { |
| lab=Vrminus} |
| N 820 -2880 820 -2590 { |
| lab=Vrminus} |
| N 820 -3160 820 -2880 { |
| lab=Vrminus} |
| N 640 -3160 820 -3160 { |
| lab=Vrminus} |
| N 640 -3450 820 -3450 { |
| lab=Vrminus} |
| N 820 -3450 820 -3160 { |
| lab=Vrminus} |
| N 820 -3740 820 -3450 { |
| lab=Vrminus} |
| N 640 -3740 820 -3740 { |
| lab=Vrminus} |
| N 640 -4030 820 -4030 { |
| lab=Vrminus} |
| N 820 -4030 820 -3740 { |
| lab=Vrminus} |
| N 820 -4310 820 -4030 { |
| lab=Vrminus} |
| N 640 -4310 820 -4310 { |
| lab=Vrminus} |
| N 820 -4600 820 -4310 { |
| lab=Vrminus} |
| N 280 -230 340 -230 { |
| lab=SEL} |
| N 280 -270 340 -270 { |
| lab=Vgnr} |
| N 280 -290 340 -290 { |
| lab=Vgpr} |
| N 280 -310 340 -310 { |
| lab=WR} |
| N 280 -330 340 -330 { |
| lab=SAMPLE} |
| N 280 -350 340 -350 { |
| lab=SAMPLEb} |
| N 280 -370 340 -370 { |
| lab=WRb} |
| N 280 -520 340 -520 { |
| lab=SEL} |
| N 280 -560 340 -560 { |
| lab=Vgnr} |
| N 280 -580 340 -580 { |
| lab=Vgpr} |
| N 280 -600 340 -600 { |
| lab=WR} |
| N 280 -620 340 -620 { |
| lab=SAMPLE} |
| N 280 -640 340 -640 { |
| lab=SAMPLEb} |
| N 280 -660 340 -660 { |
| lab=WRb} |
| N 280 -800 340 -800 { |
| lab=SEL} |
| N 280 -840 340 -840 { |
| lab=Vgnr} |
| N 280 -860 340 -860 { |
| lab=Vgpr} |
| N 280 -880 340 -880 { |
| lab=WR} |
| N 280 -900 340 -900 { |
| lab=SAMPLE} |
| N 280 -920 340 -920 { |
| lab=SAMPLEb} |
| N 280 -940 340 -940 { |
| lab=WRb} |
| N 280 -1090 340 -1090 { |
| lab=SEL} |
| N 280 -1130 340 -1130 { |
| lab=Vgnr} |
| N 280 -1150 340 -1150 { |
| lab=Vgpr} |
| N 280 -1170 340 -1170 { |
| lab=WR} |
| N 280 -1190 340 -1190 { |
| lab=SAMPLE} |
| N 280 -1210 340 -1210 { |
| lab=SAMPLEb} |
| N 280 -1230 340 -1230 { |
| lab=WRb} |
| N 280 -1380 340 -1380 { |
| lab=SEL} |
| N 280 -1420 340 -1420 { |
| lab=Vgnr} |
| N 280 -1440 340 -1440 { |
| lab=Vgpr} |
| N 280 -1460 340 -1460 { |
| lab=WR} |
| N 280 -1480 340 -1480 { |
| lab=SAMPLE} |
| N 280 -1500 340 -1500 { |
| lab=SAMPLEb} |
| N 280 -1520 340 -1520 { |
| lab=WRb} |
| N 280 -1670 340 -1670 { |
| lab=SEL} |
| N 280 -1710 340 -1710 { |
| lab=Vgnr} |
| N 280 -1730 340 -1730 { |
| lab=Vgpr} |
| N 280 -1750 340 -1750 { |
| lab=WR} |
| N 280 -1770 340 -1770 { |
| lab=SAMPLE} |
| N 280 -1790 340 -1790 { |
| lab=SAMPLEb} |
| N 280 -1810 340 -1810 { |
| lab=WRb} |
| N 280 -1950 340 -1950 { |
| lab=SEL} |
| N 280 -1990 340 -1990 { |
| lab=Vgnr} |
| N 280 -2010 340 -2010 { |
| lab=Vgpr} |
| N 280 -2030 340 -2030 { |
| lab=WR} |
| N 280 -2050 340 -2050 { |
| lab=SAMPLE} |
| N 280 -2070 340 -2070 { |
| lab=SAMPLEb} |
| N 280 -2090 340 -2090 { |
| lab=WRb} |
| N 280 -2240 340 -2240 { |
| lab=SEL} |
| N 280 -2280 340 -2280 { |
| lab=Vgnr} |
| N 280 -2300 340 -2300 { |
| lab=Vgpr} |
| N 280 -2320 340 -2320 { |
| lab=WR} |
| N 280 -2340 340 -2340 { |
| lab=SAMPLE} |
| N 280 -2360 340 -2360 { |
| lab=SAMPLEb} |
| N 280 -2380 340 -2380 { |
| lab=WRb} |
| N 280 -2530 340 -2530 { |
| lab=SEL} |
| N 280 -2570 340 -2570 { |
| lab=Vgnr} |
| N 280 -2590 340 -2590 { |
| lab=Vgpr} |
| N 280 -2610 340 -2610 { |
| lab=WR} |
| N 280 -2630 340 -2630 { |
| lab=SAMPLE} |
| N 280 -2650 340 -2650 { |
| lab=SAMPLEb} |
| N 280 -2670 340 -2670 { |
| lab=WRb} |
| N 280 -2820 340 -2820 { |
| lab=SEL} |
| N 280 -2860 340 -2860 { |
| lab=Vgnr} |
| N 280 -2880 340 -2880 { |
| lab=Vgpr} |
| N 280 -2900 340 -2900 { |
| lab=WR} |
| N 280 -2920 340 -2920 { |
| lab=SAMPLE} |
| N 280 -2940 340 -2940 { |
| lab=SAMPLEb} |
| N 280 -2960 340 -2960 { |
| lab=WRb} |
| N 280 -3100 340 -3100 { |
| lab=SEL} |
| N 280 -3140 340 -3140 { |
| lab=Vgnr} |
| N 280 -3160 340 -3160 { |
| lab=Vgpr} |
| N 280 -3180 340 -3180 { |
| lab=WR} |
| N 280 -3200 340 -3200 { |
| lab=SAMPLE} |
| N 280 -3220 340 -3220 { |
| lab=SAMPLEb} |
| N 280 -3240 340 -3240 { |
| lab=WRb} |
| N 280 -3390 340 -3390 { |
| lab=SEL} |
| N 280 -3430 340 -3430 { |
| lab=Vgnr} |
| N 280 -3450 340 -3450 { |
| lab=Vgpr} |
| N 280 -3470 340 -3470 { |
| lab=WR} |
| N 280 -3490 340 -3490 { |
| lab=SAMPLE} |
| N 280 -3510 340 -3510 { |
| lab=SAMPLEb} |
| N 280 -3530 340 -3530 { |
| lab=WRb} |
| N 280 -3680 340 -3680 { |
| lab=SEL} |
| N 280 -3720 340 -3720 { |
| lab=Vgnr} |
| N 280 -3740 340 -3740 { |
| lab=Vgpr} |
| N 280 -3760 340 -3760 { |
| lab=WR} |
| N 280 -3780 340 -3780 { |
| lab=SAMPLE} |
| N 280 -3800 340 -3800 { |
| lab=SAMPLEb} |
| N 280 -3820 340 -3820 { |
| lab=WRb} |
| N 280 -3970 340 -3970 { |
| lab=SEL} |
| N 280 -4010 340 -4010 { |
| lab=Vgnr} |
| N 280 -4030 340 -4030 { |
| lab=Vgpr} |
| N 280 -4050 340 -4050 { |
| lab=WR} |
| N 280 -4070 340 -4070 { |
| lab=SAMPLE} |
| N 280 -4090 340 -4090 { |
| lab=SAMPLEb} |
| N 280 -4110 340 -4110 { |
| lab=WRb} |
| N 280 -4250 340 -4250 { |
| lab=SEL} |
| N 280 -4290 340 -4290 { |
| lab=Vgnr} |
| N 280 -4310 340 -4310 { |
| lab=Vgpr} |
| N 280 -4330 340 -4330 { |
| lab=WR} |
| N 280 -4350 340 -4350 { |
| lab=SAMPLE} |
| N 280 -4370 340 -4370 { |
| lab=SAMPLEb} |
| N 280 -4390 340 -4390 { |
| lab=WRb} |
| N 280 -4540 340 -4540 { |
| lab=SEL} |
| N 280 -4580 340 -4580 { |
| lab=Vgnr} |
| N 280 -4600 340 -4600 { |
| lab=Vgpr} |
| N 280 -4620 340 -4620 { |
| lab=WR} |
| N 280 -4640 340 -4640 { |
| lab=SAMPLE} |
| N 280 -4660 340 -4660 { |
| lab=SAMPLEb} |
| N 280 -4680 340 -4680 { |
| lab=WRb} |
| C {row_driver_big.sym} 490 -290 2 1 {name=x1} |
| C {row_driver_big.sym} 490 -580 2 1 {name=x2} |
| C {row_driver_big.sym} 490 -860 2 1 {name=x3} |
| C {row_driver_big.sym} 490 -1150 2 1 {name=x4} |
| C {row_driver_big.sym} 490 -1440 2 1 {name=x5} |
| C {row_driver_big.sym} 490 -1730 2 1 {name=x6} |
| C {row_driver_big.sym} 490 -2010 2 1 {name=x7} |
| C {row_driver_big.sym} 490 -2300 2 1 {name=x8} |
| C {row_driver_big.sym} 490 -2590 2 1 {name=x9} |
| C {row_driver_big.sym} 490 -2880 2 1 {name=x10} |
| C {row_driver_big.sym} 490 -3160 2 1 {name=x11} |
| C {row_driver_big.sym} 490 -3450 2 1 {name=x12} |
| C {row_driver_big.sym} 490 -3740 2 1 {name=x13} |
| C {row_driver_big.sym} 490 -4030 2 1 {name=x14} |
| C {row_driver_big.sym} 490 -4310 2 1 {name=x15} |
| C {row_driver_big.sym} 490 -4600 2 1 {name=x16} |
| C {devices/iopin.sym} 740 -90 3 1 {name=p1 lab=vdda1} |
| C {devices/iopin.sym} 700 -90 3 1 {name=p2 lab=VSUBS} |
| C {devices/iopin.sym} 760 -90 3 1 {name=p5 lab=Vref} |
| C {devices/iopin.sym} 780 -90 3 1 {name=p6 lab=Vrplus} |
| C {devices/iopin.sym} 820 -90 3 1 {name=p7 lab=Vrminus} |
| C {devices/iopin.sym} 720 -90 3 1 {name=p3 lab=vccd1} |
| C {devices/iopin.sym} 850 -270 2 1 {name=p4 lab=row0} |
| C {devices/ipin.sym} 280 -210 0 0 {name=p8 lab=A0} |
| C {devices/ipin.sym} 280 -250 0 0 {name=p9 lab=B0} |
| C {devices/iopin.sym} 850 -560 2 1 {name=p10 lab=row1} |
| C {devices/ipin.sym} 280 -500 0 0 {name=p11 lab=A1} |
| C {devices/ipin.sym} 280 -540 0 0 {name=p12 lab=B1} |
| C {devices/iopin.sym} 850 -840 2 1 {name=p13 lab=row2} |
| C {devices/ipin.sym} 280 -780 0 0 {name=p14 lab=A2} |
| C {devices/ipin.sym} 280 -820 0 0 {name=p15 lab=B2} |
| C {devices/iopin.sym} 850 -1130 2 1 {name=p16 lab=row3} |
| C {devices/iopin.sym} 850 -1420 2 1 {name=p17 lab=row4} |
| C {devices/ipin.sym} 280 -1070 0 0 {name=p18 lab=A3} |
| C {devices/ipin.sym} 280 -1110 0 0 {name=p19 lab=B3} |
| C {devices/ipin.sym} 280 -1360 0 0 {name=p20 lab=A4} |
| C {devices/ipin.sym} 280 -1400 0 0 {name=p21 lab=B4} |
| C {devices/iopin.sym} 850 -1710 2 1 {name=p22 lab=row5} |
| C {devices/ipin.sym} 280 -1650 0 0 {name=p23 lab=A5} |
| C {devices/ipin.sym} 280 -1690 0 0 {name=p24 lab=B5} |
| C {devices/iopin.sym} 850 -1990 2 1 {name=p25 lab=row6} |
| C {devices/ipin.sym} 280 -1930 0 0 {name=p26 lab=A6} |
| C {devices/ipin.sym} 280 -1970 0 0 {name=p27 lab=B6} |
| C {devices/iopin.sym} 850 -2280 2 1 {name=p28 lab=row7} |
| C {devices/ipin.sym} 280 -2220 0 0 {name=p29 lab=A7} |
| C {devices/ipin.sym} 280 -2260 0 0 {name=p30 lab=B7} |
| C {devices/iopin.sym} 850 -2570 2 1 {name=p31 lab=row8} |
| C {devices/ipin.sym} 280 -2510 0 0 {name=p32 lab=A8} |
| C {devices/ipin.sym} 280 -2550 0 0 {name=p33 lab=B8} |
| C {devices/iopin.sym} 850 -2860 2 1 {name=p34 lab=row9} |
| C {devices/ipin.sym} 280 -2800 0 0 {name=p35 lab=A9} |
| C {devices/ipin.sym} 280 -2840 0 0 {name=p36 lab=B9} |
| C {devices/iopin.sym} 850 -3140 2 1 {name=p37 lab=row10} |
| C {devices/ipin.sym} 280 -3080 0 0 {name=p38 lab=A10} |
| C {devices/ipin.sym} 280 -3120 0 0 {name=p39 lab=B10} |
| C {devices/iopin.sym} 850 -3430 2 1 {name=p40 lab=row11} |
| C {devices/iopin.sym} 850 -3720 2 1 {name=p41 lab=row12} |
| C {devices/ipin.sym} 280 -3370 0 0 {name=p42 lab=A11} |
| C {devices/ipin.sym} 280 -3410 0 0 {name=p43 lab=B11} |
| C {devices/ipin.sym} 280 -3660 0 0 {name=p44 lab=A12} |
| C {devices/ipin.sym} 280 -3700 0 0 {name=p45 lab=B12} |
| C {devices/iopin.sym} 850 -4010 2 1 {name=p46 lab=row13} |
| C {devices/ipin.sym} 280 -3950 0 0 {name=p47 lab=A13} |
| C {devices/ipin.sym} 280 -3990 0 0 {name=p48 lab=B13} |
| C {devices/iopin.sym} 850 -4290 2 1 {name=p49 lab=row14} |
| C {devices/ipin.sym} 280 -4230 0 0 {name=p50 lab=A14} |
| C {devices/ipin.sym} 280 -4270 0 0 {name=p51 lab=B14} |
| C {devices/iopin.sym} 850 -4580 2 1 {name=p52 lab=row15} |
| C {devices/ipin.sym} 280 -4520 0 0 {name=p53 lab=A15} |
| C {devices/ipin.sym} 280 -4560 0 0 {name=p54 lab=B15} |
| C {devices/iopin.sym} 800 -90 3 1 {name=p55 lab=Vsample} |
| C {devices/ipin.sym} 140 -4870 0 0 {name=p56 lab=Vgpr} |
| C {devices/ipin.sym} 140 -4900 0 0 {name=p57 lab=Vgnr} |
| C {devices/ipin.sym} 140 -4840 2 1 {name=p58 lab=WR} |
| C {devices/ipin.sym} 140 -4820 2 1 {name=p59 lab=SAMPLEb} |
| C {devices/ipin.sym} 140 -4780 0 0 {name=p60 lab=WRb} |
| C {devices/ipin.sym} 140 -4800 0 0 {name=p62 lab=SAMPLE} |
| C {devices/ipin.sym} 140 -4930 2 1 {name=p61 lab=SEL} |
| C {devices/lab_pin.sym} 280 -230 0 0 {name=l1 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -270 0 0 {name=l3 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -290 0 0 {name=l4 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -310 0 0 {name=l5 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -330 0 0 {name=l6 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -350 0 0 {name=l7 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -370 0 0 {name=l8 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -520 0 0 {name=l2 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -560 0 0 {name=l9 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -580 0 0 {name=l10 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -600 0 0 {name=l11 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -620 0 0 {name=l12 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -640 0 0 {name=l13 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -660 0 0 {name=l14 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -800 0 0 {name=l15 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -840 0 0 {name=l16 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -860 0 0 {name=l17 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -880 0 0 {name=l18 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -900 0 0 {name=l19 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -920 0 0 {name=l20 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -940 0 0 {name=l21 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -1090 0 0 {name=l22 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -1130 0 0 {name=l23 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -1150 0 0 {name=l24 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -1170 0 0 {name=l25 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -1190 0 0 {name=l26 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -1210 0 0 {name=l27 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -1230 0 0 {name=l28 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -1380 0 0 {name=l29 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -1420 0 0 {name=l30 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -1440 0 0 {name=l31 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -1460 0 0 {name=l32 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -1480 0 0 {name=l33 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -1500 0 0 {name=l34 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -1520 0 0 {name=l35 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -1670 0 0 {name=l36 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -1710 0 0 {name=l37 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -1730 0 0 {name=l38 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -1750 0 0 {name=l39 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -1770 0 0 {name=l40 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -1790 0 0 {name=l41 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -1810 0 0 {name=l42 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -1950 0 0 {name=l43 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -1990 0 0 {name=l44 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -2010 0 0 {name=l45 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -2030 0 0 {name=l46 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -2050 0 0 {name=l47 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -2070 0 0 {name=l48 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -2090 0 0 {name=l49 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -2240 0 0 {name=l50 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -2280 0 0 {name=l51 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -2300 0 0 {name=l52 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -2320 0 0 {name=l53 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -2340 0 0 {name=l54 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -2360 0 0 {name=l55 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -2380 0 0 {name=l56 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -2530 0 0 {name=l57 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -2570 0 0 {name=l58 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -2590 0 0 {name=l59 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -2610 0 0 {name=l60 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -2630 0 0 {name=l61 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -2650 0 0 {name=l62 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -2670 0 0 {name=l63 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -2820 0 0 {name=l64 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -2860 0 0 {name=l65 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -2880 0 0 {name=l66 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -2900 0 0 {name=l67 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -2920 0 0 {name=l68 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -2940 0 0 {name=l69 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -2960 0 0 {name=l70 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -3100 0 0 {name=l71 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -3140 0 0 {name=l72 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -3160 0 0 {name=l73 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -3180 0 0 {name=l74 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -3200 0 0 {name=l75 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -3220 0 0 {name=l76 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -3240 0 0 {name=l77 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -3390 0 0 {name=l78 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -3430 0 0 {name=l79 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -3450 0 0 {name=l80 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -3470 0 0 {name=l81 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -3490 0 0 {name=l82 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -3510 0 0 {name=l83 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -3530 0 0 {name=l84 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -3680 0 0 {name=l85 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -3720 0 0 {name=l86 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -3740 0 0 {name=l87 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -3760 0 0 {name=l88 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -3780 0 0 {name=l89 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -3800 0 0 {name=l90 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -3820 0 0 {name=l91 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -3970 0 0 {name=l92 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -4010 0 0 {name=l93 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -4030 0 0 {name=l94 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -4050 0 0 {name=l95 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -4070 0 0 {name=l96 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -4090 0 0 {name=l97 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -4110 0 0 {name=l98 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -4250 0 0 {name=l99 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -4290 0 0 {name=l100 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -4310 0 0 {name=l101 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -4330 0 0 {name=l102 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -4350 0 0 {name=l103 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -4370 0 0 {name=l104 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -4390 0 0 {name=l105 sig_type=std_logic lab=WRb} |
| C {devices/lab_pin.sym} 280 -4540 0 0 {name=l106 sig_type=std_logic lab=SEL} |
| C {devices/lab_pin.sym} 280 -4580 0 0 {name=l107 sig_type=std_logic lab=Vgnr} |
| C {devices/lab_pin.sym} 280 -4600 0 0 {name=l108 sig_type=std_logic lab=Vgpr} |
| C {devices/lab_pin.sym} 280 -4620 0 0 {name=l109 sig_type=std_logic lab=WR} |
| C {devices/lab_pin.sym} 280 -4640 0 0 {name=l110 sig_type=std_logic lab=SAMPLE} |
| C {devices/lab_pin.sym} 280 -4660 0 0 {name=l111 sig_type=std_logic lab=SAMPLEb} |
| C {devices/lab_pin.sym} 280 -4680 0 0 {name=l112 sig_type=std_logic lab=WRb} |