blob: 7b5728abd4c5c069e2e0621d959b61e96d9d59be [file] [log] [blame]
Project Chip ID is: 460526
Setting Project Chip ID to: 000706ee
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!