xschem/user_analog_project_wrapper.sym

v {xschem version=2.9.9 file_version=1.2 }
G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
}
V {}
S {}
E {}
L 4 -130 -190 130 -190 {}
L 4 -130 190 130 190 {}
L 4 -130 -190 -130 190 {}
L 4 130 -190 130 190 {}
L 4 -150 -180 -130 -180 {}
L 4 -150 -160 -130 -160 {}
L 4 -150 -140 -130 -140 {}
L 4 -150 -120 -130 -120 {}
L 4 -150 -100 -130 -100 {}
L 4 -150 -80 -130 -80 {}
L 4 -150 -60 -130 -60 {}
L 4 -150 -40 -130 -40 {}
L 4 130 -20 150 -20 {}
L 4 130 0 150 0 {}
L 4 -150 -20 -130 -20 {}
L 4 130 20 150 20 {}
L 4 -150 0 -130 0 {}
L 4 -150 20 -130 20 {}
L 4 -150 40 -130 40 {}
L 4 130 40 150 40 {}
L 4 130 60 150 60 {}
L 4 -150 60 -130 60 {}
L 4 130 180 150 180 {}
L 7 130 -180 150 -180 {}
L 7 130 -160 150 -160 {}
L 7 130 -140 150 -140 {}
L 7 130 -120 150 -120 {}
L 7 130 -100 150 -100 {}
L 7 130 -80 150 -80 {}
L 7 130 -60 150 -60 {}
L 7 130 -40 150 -40 {}
L 7 130 80 150 80 {}
L 7 130 100 150 100 {}
L 7 130 120 150 120 {}
L 7 130 140 150 140 {}
L 7 130 160 150 160 {}
B 5 147.5 -182.5 152.5 -177.5 {name=vdda1 dir=inout }
B 5 147.5 -162.5 152.5 -157.5 {name=vdda2 dir=inout }
B 5 147.5 -142.5 152.5 -137.5 {name=vssa1 dir=inout }
B 5 147.5 -122.5 152.5 -117.5 {name=vssa2 dir=inout }
B 5 147.5 -102.5 152.5 -97.5 {name=vccd1 dir=inout }
B 5 147.5 -82.5 152.5 -77.5 {name=vccd2 dir=inout }
B 5 147.5 -62.5 152.5 -57.5 {name=vssd1 dir=inout }
B 5 147.5 -42.5 152.5 -37.5 {name=vssd2 dir=inout }
B 5 -152.5 -182.5 -147.5 -177.5 {name=wb_clk_i dir=in }
B 5 -152.5 -162.5 -147.5 -157.5 {name=wb_rst_i dir=in }
B 5 -152.5 -142.5 -147.5 -137.5 {name=wbs_stb_i dir=in }
B 5 -152.5 -122.5 -147.5 -117.5 {name=wbs_cyc_i dir=in }
B 5 -152.5 -102.5 -147.5 -97.5 {name=wbs_we_i dir=in }
B 5 -152.5 -82.5 -147.5 -77.5 {name=wbs_sel_i[3:0] dir=in }
B 5 -152.5 -62.5 -147.5 -57.5 {name=wbs_dat_i[31:0] dir=in }
B 5 -152.5 -42.5 -147.5 -37.5 {name=wbs_adr_i[31:0] dir=in }
B 5 147.5 -22.5 152.5 -17.5 {name=wbs_ack_o dir=out }
B 5 147.5 -2.5 152.5 2.5 {name=wbs_dat_o[31:0] dir=out }
B 5 -152.5 -22.5 -147.5 -17.5 {name=la_data_in[127:0] dir=in }
B 5 147.5 17.5 152.5 22.5 {name=la_data_out[127:0] dir=out }
B 5 -152.5 -2.5 -147.5 2.5 {name=la_oenb[127:0] dir=in }
B 5 -152.5 17.5 -147.5 22.5 {name=io_in[26:0] dir=in }
B 5 -152.5 37.5 -147.5 42.5 {name=io_in_3v3[26:0] dir=in }
B 5 147.5 37.5 152.5 42.5 {name=io_out[26:0] dir=out }
B 5 147.5 57.5 152.5 62.5 {name=io_oeb[26:0] dir=out }
B 5 147.5 77.5 152.5 82.5 {name=gpio_analog[17:0] dir=inout }
B 5 147.5 97.5 152.5 102.5 {name=gpio_noesd[17:0] dir=inout }
B 5 147.5 117.5 152.5 122.5 {name=io_analog[10:0] dir=inout }
B 5 147.5 137.5 152.5 142.5 {name=io_clamp_high[2:0] dir=inout }
B 5 147.5 157.5 152.5 162.5 {name=io_clamp_low[2:0] dir=inout }
B 5 -152.5 57.5 -147.5 62.5 {name=user_clock2 dir=in }
B 5 147.5 177.5 152.5 182.5 {name=user_irq[2:0] dir=out }
T {@symname} -119.5 114 0 0 0.3 0.3 {}
T {@name} 135 -202 0 0 0.2 0.2 {}
T {vdda1} 125 -184 0 1 0.2 0.2 {}
T {vdda2} 125 -164 0 1 0.2 0.2 {}
T {vssa1} 125 -144 0 1 0.2 0.2 {}
T {vssa2} 125 -124 0 1 0.2 0.2 {}
T {vccd1} 125 -104 0 1 0.2 0.2 {}
T {vccd2} 125 -84 0 1 0.2 0.2 {}
T {vssd1} 125 -64 0 1 0.2 0.2 {}
T {vssd2} 125 -44 0 1 0.2 0.2 {}
T {wb_clk_i} -125 -184 0 0 0.2 0.2 {}
T {wb_rst_i} -125 -164 0 0 0.2 0.2 {}
T {wbs_stb_i} -125 -144 0 0 0.2 0.2 {}
T {wbs_cyc_i} -125 -124 0 0 0.2 0.2 {}
T {wbs_we_i} -125 -104 0 0 0.2 0.2 {}
T {wbs_sel_i[3:0]} -125 -84 0 0 0.2 0.2 {}
T {wbs_dat_i[31:0]} -125 -64 0 0 0.2 0.2 {}
T {wbs_adr_i[31:0]} -125 -44 0 0 0.2 0.2 {}
T {wbs_ack_o} 125 -24 0 1 0.2 0.2 {}
T {wbs_dat_o[31:0]} 125 -4 0 1 0.2 0.2 {}
T {la_data_in[127:0]} -125 -24 0 0 0.2 0.2 {}
T {la_data_out[127:0]} 125 16 0 1 0.2 0.2 {}
T {la_oenb[127:0]} -125 -4 0 0 0.2 0.2 {}
T {io_in[26:0]} -125 16 0 0 0.2 0.2 {}
T {io_in_3v3[26:0]} -125 36 0 0 0.2 0.2 {}
T {io_out[26:0]} 125 36 0 1 0.2 0.2 {}
T {io_oeb[26:0]} 125 56 0 1 0.2 0.2 {}
T {gpio_analog[17:0]} 125 76 0 1 0.2 0.2 {}
T {gpio_noesd[17:0]} 125 96 0 1 0.2 0.2 {}
T {io_analog[10:0]} 125 116 0 1 0.2 0.2 {}
T {io_clamp_high[2:0]} 125 136 0 1 0.2 0.2 {}
T {io_clamp_low[2:0]} 125 156 0 1 0.2 0.2 {}
T {user_clock2} -125 56 0 0 0.2 0.2 {}
T {user_irq[2:0]} 125 176 0 1 0.2 0.2 {}