Remove old timing scripts

scripts/timing-model.sdc

diff --git a/scripts/timing-model.sdc b/scripts/timing-model.sdc
deleted file mode 100644
index 273f89f..0000000
--- a/scripts/timing-model.sdc
+++ /dev/null
@@ -1,4 +0,0 @@
-current_design $::env(MACRO)
-
-create_clock -name $::env(CLOCK_PORT) -period 10.0000 [get_ports $::env(CLOCK_PORT)]
-set_propagated_clock [all_clocks]

scripts/timing-model.tcl

diff --git a/scripts/timing-model.tcl b/scripts/timing-model.tcl
deleted file mode 100644
index f0db7be..0000000
--- a/scripts/timing-model.tcl
+++ /dev/null
@@ -1,11 +0,0 @@
-read_liberty $::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib
-read_verilog verilog/gl/$::env(MACRO).v
-link_design $::env(MACRO)
-read_spef spef/$::env(MACRO).spef
-#read_sdc sdc/$::env(MACRO).sdc
-read_sdc scripts/timing-model.sdc
-set_propagated_clock [all_clocks]
-
-write_timing_model openlane/user_project_wrapper/$:::env(MACRO).lib
-
-exit