| commit | b80b343f27c7b07024cd9200dcc431b30610c2fd | [log] [tgz] |
|---|---|---|
| author | matt venn <matt@mattvenn.net> | Sun Aug 28 23:19:58 2022 +0200 |
| committer | matt venn <matt@mattvenn.net> | Sun Aug 28 23:19:58 2022 +0200 |
| tree | 62283eb5430a8303696e9b306f9390795185ff5e | |
| parent | c9687cbf215b0d7190b1bdae13326db7feea8322 [diff] |
add etpu
This ASIC was designed by members of the Zero to ASIC course.
This submission was configured and built by the multi project tools at commit cb6f259965e9415b4c6f6d56479070ee3aaf4006.
The configuration files are projects.yaml & local.yaml. See the CI for how the build works.
# clone all repos, and include support for shared OpenRAM ./multi_tool.py --clone-repos --clone-shared-repos --create-openlane-config --copy-gds --copy-project --openram # run all the tests ./multi_tool.py --test-all --force-delete # build user project wrapper submission cd $CARAVEL_ROOT; make user_project_wrapper # create docs ./multi_tool.py --generate-doc --annotate-image
