commit d9b650d23d82f506c8e5e5d44776968534a80381
author Matt Venn <matt@mattvenn.net> Fri Sep 02 18:02:02 2022 +0200
committer Matt Venn <matt@mattvenn.net> Fri Sep 02 18:02:02 2022 +0200
tree 669944095926ded2cdaa59bb7fc49783a05ecfd6
parent 5f6dc084fef25122cb76a991594d5deac3bb955c

set default to 498

verilog/rtl/scan_controller/scan_controller.v

diff --git a/verilog/rtl/scan_controller/scan_controller.v b/verilog/rtl/scan_controller/scan_controller.v
index a28820c..f2a1cfa 100644
--- a/verilog/rtl/scan_controller/scan_controller.v
+++ b/verilog/rtl/scan_controller/scan_controller.v
@@ -2,7 +2,7 @@
 `default_nettype none
 
 module scan_controller #(
-    parameter integer NUM_DESIGNS = 8,
+    parameter integer NUM_DESIGNS = 498,
     parameter integer NUM_IOS     = 8,
 
     // auto-set