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foss-eda-tools / third_party / shuttle / sky130 / mpw-007 / slot-001 / 6f20cc3c7dbf4feb056c8d6682e27cd9ae9e78fe / . / verilog / dv / scan_controller_la
tree: 03121783e74a481c1662f5b89fa3af694bad1d22 [path history] [tgz]
  1. Makefile
  2. README.md
  3. scan_controller.c
  4. scan_controller.hex
  5. scan_controller_la.gtkw
  6. scan_controller_tb.v
  7. test_scan_controller.py
verilog/dv/scan_controller_la/README.md

logic analyser test

run

./configure.py --update-caravel --limit 1

before starting test