tree: 544e12951df7b192f6981cc880cfa4fb84771d2a [path history] [tgz]
  1. docs/
  2. gds/
  3. mpw_precheck/
  4. netgen/
  5. openlane/
  6. precheck_results/
  7. signoff/
  8. tapeout/
  9. verilog/
  10. xschem/
  11. info.yaml
  13. Makefile

CMOS dynamic Comparator

This project is the implementation of a optimised strong arm latch using Skywater 130nm technology. The purpose of this project is to test the open source tools provided with the PDK and to go through all the steps of the analog design flow.

CMOS Comparator

The schematic of the comparator test bench was deisgned as follows : Comparator


We simulated the comparator with reference at the negative input and a pulse at the positive input. The output is a digital signal that triggers at every clock pulse depending on the input amplitude. Simulation