commit	9f883650b6c395b8e60404a940fd761951801a00	[log] [tgz]
author	Usman <usmanzain95@gmail.com>	Tue Jun 07 22:36:50 2022 +0500
committer	Usman <usmanzain95@gmail.com>	Tue Jun 07 22:36:50 2022 +0500
tree	ab515eb3c4d0485517e17d8ceaa7366f2cdc7444
parent	a59ccba4e5a2f61b13568c1b1ae9a0dc4c0ed468 [diff]

rtl updated

verilog/rtl/Top.v[Renamed from verilog/rtl/Caravel_Top.v - diff]
verilog/rtl/iccm_controller.v[Added - diff]
verilog/rtl/prog_uart_top.v[Added - diff]
verilog/rtl/programmer.v[Added - diff]
verilog/rtl/soc_now_caravel_top.v[diff]

5 files changed

tree: ab515eb3c4d0485517e17d8ceaa7366f2cdc7444

README.md

Soc Now

Soc NOW is a chisel based core. It has RV32I ISA support, 32 GPIO pins and UART to program the SoC.