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foss-eda-tools / third_party / shuttle / sky130 / mpw-006 / slot-032 / d4bd14c60b4469ad9e9b24cf36a8fb9933f925bd
commitd4bd14c60b4469ad9e9b24cf36a8fb9933f925bd[log] [tgz]
authorCharlie <charlie.david.smith@hotmail.co.uk>Mon May 16 23:06:41 2022 +0100
committerCharlie <charlie.david.smith@hotmail.co.uk>Mon May 16 23:06:41 2022 +0100
treea810cab79f862761d061e42fa85db4cbed75a41a
parent5d5650c45b9332537613b5a128967d0d6a6f6aac [diff]
parenta11292b5ad1ffdb085a7884807f9d9569dce13f5 [diff]
Merge remote-tracking branch 'template/main' into Development
tree: a810cab79f862761d061e42fa85db4cbed75a41a
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. sdc/
  10. sdf/
  11. signoff/
  12. spef/
  13. spi/
  14. verilog/
  15. .gitignore
  16. LICENSE
  17. Makefile
  18. README.md
README.md

ExperiarSoC

RISC-V SoC designed for the Efabless Open MPW Program.

Features

Block diagram of Experiar SoC

  • Dual RV32I cores
  • Per core SRAM
  • External flash controller
  • Larger shared block SRAM
  • VGA output using frame buffer in block SRAM
  • 4x UART ports + 1 internal to caravel
  • 2x SPI ports
  • 4x PWM counters with 4x seperate outputs
  • DMA for UART peripheral

Memory Map

Memory map for Experiar SoC

Macro Layout

Experiar SoC Macro Layout

ToDo

  • Flash controller
  • DMA
  • Block SRAM
  • VGA
  • Multi core controller
  • Test
  • Fix all of the errors

Reference work and inspiration

  • Riscduino: Used for inspiration and as a reference for using openlane. There are a number of similar aspects to this project, but all have been reimplemented rather than copied.
  • Openlane Documentation: Reference for a lot of configuration. The Variables and Hardening Macros pages have been particularity useful.
  • Caravel Documentation: Reference for caravel and configuration.
  • Zero to ASIC Course: Complete course on ASIC design. Also has useful references and terminology definitions.