rV1
diff --git a/README.md b/README.md
index 601a241..084b8bf 100644
--- a/README.md
+++ b/README.md
@@ -13,3 +13,4 @@
Refer to [README](docs/source/index.rst) for this sample project documentation.
+# receiver
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds
index aecd880..e7e7674 100644
--- a/gds/user_analog_project_wrapper.gds
+++ b/gds/user_analog_project_wrapper.gds
Binary files differ
diff --git a/mag/detV2.ext b/mag/detV2.ext
index 7595968..1be2e30 100644
--- a/mag/detV2.ext
+++ b/mag/detV2.ext
@@ -1,4 +1,4 @@
-timestamp 1647905536
+timestamp 1648041187
version 8.3
tech sky130A
style ngspice()
@@ -17,9 +17,9 @@
node "bot_cin" 4376 113372 -46000 -11880 ndif 0 0 0 0 0 0 0 0 630000 9280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 248880 6636 134620 3992 28640 964 312824408 80772 0 0 0 0 0 0
node "db" 7836 16773.5 -45852 -26620 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 156600 9960 0 0 8715904 30440 0 0 0 0 0 0 0 0 0 0 0 0
substrate "gnd" 0 0 -44380 -3006 m1 0 0 0 0 0 0 0 0 630000 9280 630000 9280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14807500 40148 14307200 28476 0 0 0 0 0 0 0 0 0 0
+cap "bot_cin" "db" 11.6617
cap "din" "bot_cin" 95616.7
cap "m2_n40996_n4008#" "do" 103090
-cap "db" "bot_cin" 11.6617
device csubckt sky130_fd_pr__cap_mim_m3_1 -43000 -23676 -42999 -23675 w=17400 l=17400 "None" "do" 14656 0 "m2_n40996_n4008#" 70 0
device csubckt sky130_fd_pr__cap_mim_m3_1 -64884 -23708 -64883 -23707 w=17400 l=17400 "None" "din" 14656 0 "bot_cin" 70 0
device msubckt sky130_fd_pr__nfet_01v8 -45860 -11880 -45859 -11879 l=30 w=4500 "gnd" "db" 60 0 "bot_cin" 4500 0 "gnd" 4500 0
diff --git a/mag/detV2.mag b/mag/detV2.mag
index 3c9d0e3..a6a5cea 100644
--- a/mag/detV2.mag
+++ b/mag/detV2.mag
@@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
-timestamp 1647905536
+timestamp 1648041187
<< pwell >>
rect -45690 -11880 -45550 -7380
<< nmos >>
diff --git a/mag/otaV5.ext b/mag/otaV5.ext
index 4576645..7c3083d 100644
--- a/mag/otaV5.ext
+++ b/mag/otaV5.ext
@@ -25,25 +25,25 @@
node "Ib" 2537 7734.7 7584 4396 li 0 0 0 0 0 0 0 0 0 0 100000 2200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1807400 6300 0 0 155060 4708 40000 800 40000 800 1711600 17516 0 0 0 0 0 0
node "Vp" 10161 31123.6 7978 4750 m1 0 0 0 0 6952344 10580 0 0 100000 2200 256000 5920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 874080 13628 3810636 21968 0 0 0 0 0 0 0 0 0 0
substrate "Vn" 0 0 7966 236 m1 0 0 0 0 0 0 0 0 64000 2080 16000 520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 706652 8816 1810268 11968 0 0 0 0 0 0 0 0 0 0
-cap "Vp" "a_8070_1014#" 8.8985
-cap "Ib" "Inn" 109.524
-cap "a_6890_1010#" "a_8070_1014#" 11.3789
-cap "Ib" "Inp" 79.1
+cap "a_6890_1010#" "Vp" 2.457
+cap "Inp" "Ib" 79.1
+cap "cltop" "Vout" 15919.1
cap "a_6890_1010#" "Inn" 218.838
-cap "Vp" "Inp" 168.013
-cap "Inn" "a_8070_1014#" 29.0112
-cap "a_6890_1010#" "Inp" 158.593
-cap "a_6890_750#" "Vout" 1068.46
-cap "Vout" "cltop" 15919.1
-cap "Vp" "Vout" 34.5591
+cap "a_6890_1010#" "a_8070_1014#" 11.3789
+cap "a_6890_1010#" "a_6890_750#" 444.221
+cap "Vp" "a_8070_1014#" 8.8985
cap "Vp" "a_6890_750#" 90.392
-cap "Inp" "Inn" 366.647
-cap "a_6890_750#" "a_6890_1010#" 444.221
+cap "a_6890_1010#" "Inp" 158.593
+cap "a_8070_1014#" "Inn" 29.0112
+cap "a_8070_1014#" "a_6890_750#" 73.9486
+cap "Inp" "Vp" 168.013
cap "Ib" "Vp" 268.304
-cap "a_6890_750#" "a_8070_1014#" 73.9486
-cap "Vout" "a_8070_1014#" 86.3323
-cap "Vp" "a_6890_1010#" 2.457
+cap "Vp" "Vout" 34.5591
+cap "Inp" "Inn" 366.647
+cap "Ib" "Inn" 109.524
cap "Vp" "a_7570_1796#" 11.9103
+cap "a_8070_1014#" "Vout" 86.3323
+cap "a_6890_750#" "Vout" 1068.46
device csubckt sky130_fd_pr__cap_mim_m3_1 10544 -994 10545 -993 w=6400 l=6400 "None" "cltop" 4000 0 "Vout" 4500 0
device msubckt sky130_fd_pr__nfet_01v8 8170 754 8171 755 l=800 w=160 "Vn" "a_8070_1014#" 1600 0 "Vout" 160 0 "Vn" 160 0
device msubckt sky130_fd_pr__nfet_01v8 6990 750 6991 751 l=800 w=160 "Vn" "a_6890_1010#" 1600 0 "a_6890_750#" 160 0 "Vn" 160 0
diff --git a/mag/user_analog_project_wrapper.ext b/mag/user_analog_project_wrapper.ext
index f9abab5..e171f58 100644
--- a/mag/user_analog_project_wrapper.ext
+++ b/mag/user_analog_project_wrapper.ext
@@ -1,11 +1,11 @@
-timestamp 1647907848
+timestamp 1648060736
version 8.3
tech sky130A
style ngspice()
scale 1000 1 500000
resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
-use otaV5 otaV5_0 1 0 120336 0 1 542756
-use detV2 detV2_0 1 0 488900 0 1 581290
+use otaV5 otaV5_0 1 0 194022 0 1 569416
+use detV2 detV2_0 1 0 492978 0 1 600834
port "io_analog[4]" 41 329294 702300 334294 704800 m5
port "io_analog[4]" 47 318994 702300 323994 704800 m5
port "io_analog[5]" 42 227594 702300 232594 704800 m5
@@ -168,19 +168,16 @@
port "gpio_analog[7]" 15 -800 511530 480 511642 m3
port "vdda1" 556 582340 540562 584800 545362 m3
port "vdda1" 557 582340 550562 584800 555362 m3
+port "vssa2" 566 0 559442 1660 564242 m3
+port "vssa2" 567 0 549442 1660 554242 m3
port "gpio_analog[6]" 14 583520 583562 584800 583674 m3
port "gpio_noesd[6]" 32 583520 584744 584800 584856 m3
port "io_in_3v3[13]" 87 583520 585926 584800 586038 m3
port "io_in[13]" 60 583520 587108 584800 587220 m3
port "io_out[13]" 141 583520 588290 584800 588402 m3
port "io_oeb[13]" 114 583520 589472 584800 589584 m3
-port "vccd1" 553 582340 629784 584800 634584 m3
-port "vccd1" 552 582340 639784 584800 644584 m3
port "io_analog[0]" 36 582300 677984 584800 682984 m3
-port "vssa2" 567 0 549442 1660 554242 m3
-port "vssa2" 566 0 559442 1660 564242 m3
port "io_analog[10]" 37 0 680242 1700 685242 m3
-port "vssa1" 562 520594 702340 525394 704800 m3
port "io_analog[2]" 39 465394 702300 470394 704800 m3
port "io_analog[3]" 40 413394 702300 418394 704800 m3
port "io_analog[4]" 41 329294 702300 334294 704800 m3
@@ -692,9 +689,12 @@
port "wb_rst_i" 573 1706 -800 1818 480 m2
port "wb_clk_i" 572 524 -800 636 480 m2
port "io_analog[9]" 46 16194 702300 21194 704800 m3
-port "vssa1" 563 510594 702340 515394 704800 m3
port "vccd2" 555 0 633842 1660 638642 m3
port "vccd2" 554 0 643842 1660 648642 m3
+port "vccd1" 553 582340 629784 584800 634584 m3
+port "vccd1" 552 582340 639784 584800 644584 m3
+port "vssa1" 563 510594 702340 515394 704800 m3
+port "vssa1" 562 520594 702340 525394 704800 m3
port "io_analog[1]" 38 566594 702300 571594 704800 m3
node "io_analog[4]" 0 2925 329294 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
node "io_analog[4]" 0 2925 318994 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
@@ -858,21 +858,17 @@
node "gpio_analog[7]" 1 613.728 -800 511530 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
node "vdda1" 0 6519 582340 540562 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
node "vdda1" 0 6519 582340 550562 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
+node "vssa2" 0 190973 0 549442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 120766964 206224 207066276 401276 0 0 0 0
node "gpio_analog[6]" 1 613.728 583520 583562 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
node "gpio_noesd[6]" 1 613.728 583520 584744 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
node "io_in_3v3[13]" 1 613.728 583520 585926 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
node "io_in[13]" 1 613.728 583520 587108 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
node "io_out[13]" 1 613.728 583520 588290 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
node "io_oeb[13]" 1 613.728 583520 589472 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
-node "vccd1" 0 6519 582340 629784 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
-node "vccd1" 0 6519 582340 639784 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
node "io_analog[0]" 0 6825 582300 677984 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0 0 0
-node "vssa2" 0 103365 0 549442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 30246204 48592 149007288 297400 0 0 0 0
-node "vssa2" 0 6519 0 559442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
-node "io_analog[10]" 0 172052 0 680242 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 147477392 283680 135390000 260380 0 0 0 0
-node "vssa1" 0 6523.04 520594 702340 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11816000 14528 0 0 0 0 0 0
-node "io_analog[2]" 0 161257 465394 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 125097164 127596 257663904 262080 0 0 0 0
-node "io_analog[3]" 0 154021 413394 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 89841940 92364 284980440 288992 0 0 0 0
+node "io_analog[10]" 0 218728 0 680242 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 310954704 611912 0 0 0 0 0 0
+node "io_analog[2]" 0 101570 465394 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40359008 65796 136737120 270996 0 0 0 0
+node "io_analog[3]" 0 94451 413394 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 34469688 49792 135723160 264436 0 0 0 0
node "io_analog[4]" 0 6825 329294 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0 0 0
node "io_clamp_high[0]" 0 3577 326794 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5500000 9400 0 0 0 0 0 0
node "io_clamp_low[0]" 0 3577 324294 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5500000 9400 0 0 0 0 0 0
@@ -885,8 +881,8 @@
node "io_clamp_high[2]" 0 3577 173394 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5500000 9400 0 0 0 0 0 0
node "io_clamp_low[2]" 0 3577 170894 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5500000 9400 0 0 0 0 0 0
node "io_analog[6]" 0 6825 165594 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0 0 0
-node "io_analog[7]" 0 127209 120194 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 182118164 354016 0 0 0 0 0 0
-node "io_analog[8]" 0 121981 68194 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 38140028 65156 139489616 390896 0 0 0 0
+node "io_analog[7]" 0 159757 120194 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 227895424 445796 0 0 0 0 0 0
+node "io_analog[8]" 1 154250 68194 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 24978024 34532 8968704 16160 258729508 514380 0 0
node "user_irq[2]" 1 631.648 583250 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "user_irq[1]" 1 631.648 582068 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "user_irq[0]" 1 631.648 580886 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
@@ -1381,51 +1377,51 @@
node "wbs_ack_o" 1 631.648 2888 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wb_rst_i" 1 631.648 1706 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
node "wb_clk_i" 1 631.648 524 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
-node "io_analog[9]" 0 216268 16194 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 218575612 447560 53300000 90600 0 0 0 0 0 0
-node "vssa1" 2 129662 510594 702340 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13962408 27964 4266408 8572 29739808 46720 8266408 16572 175090848 359188 0 0
-node "vccd2" 1 165809 0 633842 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 52802464 238348 2954080 7916 119195328 229292 0 0 0 0 0 0
-node "vccd2" 0 159776 0 643842 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 38062976 185460 2178976 6040 139801648 270072 0 0 0 0 0 0
-node "io_analog[1]" 92 294858 566594 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 30064260 34064 4958468 8952 4958468 8952 224070468 230564 375042088 379032 0 0 0 0
+node "io_analog[9]" 4 187386 16194 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3144500 20920 33649268 49108 291742816 575120 0 0 0 0
+node "vccd2" 0 233946 0 643842 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2872800 6792 2872800 6792 138190064 249148 245966588 492940 0 0 0 0
+node "vccd1" 5 311462 582340 639784 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6768804 30644 1699200 5324 130123540 233496 11185380 17652 397904204 796952 0 0
+node "vssa1" 1 144615 520594 702340 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14073160 24388 7466264 10932 71823052 101156 172938804 323564 0 0 0 0
+node "io_analog[1]" 80 175109 566594 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6666992 15228 4702064 8700 4702064 8700 41625032 62368 250773784 491468 0 0 0 0
substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "io_clamp_low[2]" "io_clamp_high[2]" 525
+cap "io_analog[6]" "io_analog[6]" 26250
cap "io_analog[6]" "io_analog[6]" 21250
-cap "io_analog[6]" "io_analog[6]" 26250
-cap "io_analog[4]" "io_analog[4]" 21250
-cap "io_analog[10]" "vccd2" 4080
-cap "io_analog[2]" "vssa1" 2239.68
-cap "io_analog[5]" "io_analog[5]" 21250
-cap "io_analog[5]" "io_analog[5]" 26250
-cap "io_analog[6]" "io_analog[6]" 26250
-cap "io_clamp_low[1]" "io_analog[5]" 525
-cap "io_analog[9]" "vccd2" 5378
-cap "io_analog[10]" "vccd2" 3240
-cap "io_analog[5]" "io_analog[5]" 21250
-cap "io_analog[8]" "io_analog[10]" 2228
-cap "io_analog[4]" "io_analog[4]" 21250
cap "io_analog[4]" "io_analog[4]" 26250
-cap "io_clamp_high[2]" "io_clamp_low[2]" 525
-cap "io_analog[4]" "io_analog[4]" 26250
-cap "io_analog[5]" "io_analog[5]" 26250
-cap "io_clamp_low[0]" "io_analog[4]" 525
-cap "io_analog[5]" "io_clamp_high[1]" 525
-cap "io_clamp_low[1]" "io_clamp_high[1]" 525
-cap "io_clamp_high[2]" "io_analog[6]" 525
cap "io_analog[4]" "io_clamp_high[0]" 525
-cap "io_analog[8]" "vccd2" 2251.64
-cap "io_analog[6]" "io_clamp_low[2]" 525
-cap "io_analog[9]" "vccd2" 3290
+cap "io_clamp_low[0]" "io_analog[4]" 525
+cap "io_analog[5]" "io_analog[5]" 21250
+cap "io_analog[4]" "io_analog[4]" 21250
cap "io_analog[6]" "io_analog[6]" 21250
-cap "io_analog[8]" "io_analog[9]" 892
+cap "io_analog[2]" "vccd1" 2994.94
+cap "io_analog[1]" "vccd1" 2994.94
+cap "io_analog[4]" "io_analog[4]" 26250
+cap "io_clamp_high[1]" "io_clamp_low[1]" 525
+cap "io_analog[5]" "io_analog[5]" 26250
+cap "io_clamp_high[1]" "io_analog[5]" 525
+cap "io_analog[4]" "io_analog[4]" 21250
cap "io_clamp_low[0]" "io_clamp_high[0]" 525
-merge "detV2_0/din" "io_analog[3]" -3312.85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -5538248 -11920 0 0 0 0
-merge "otaV5_0/Vp" "vssa1" -3034.75 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1064628 -11428 0 0 0 0 0 0 0 0 0 0
-merge "vssa1" "detV2_0/gnd"
-merge "detV2_0/gnd" "otaV5_0/Vn"
-merge "otaV5_0/Vn" "VSUBS"
-merge "VSUBS" "vccd2"
-merge "otaV5_0/cltop" "vssa2" -1155.17 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -779903 -5401 0 0 0 0
-merge "otaV5_0/Inn" "io_analog[8]" -2450.25 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1278298 -12402 0 0 0 0
-merge "otaV5_0/Inp" "io_analog[9]" -567.424 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 571144 -3952 0 0 0 0 0 0 0 0
-merge "otaV5_0/Ib" "io_analog[10]" -661.673 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -182910 -2960 0 0 0 0 0 0
-merge "otaV5_0/Vout" "io_analog[7]" -1715.66 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1239628 -6555 0 0 0 0 0 0
-merge "detV2_0/do" "io_analog[2]" -5245.62 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -9792718 -17768 0 0 0 0
-merge "detV2_0/db" "io_analog[1]" -684.621 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -193104 -1840 0 0 0 0 0 0 0 0 0 0 0 0
+cap "io_analog[5]" "io_analog[5]" 21250
+cap "vccd1" "io_analog[3]" 3000
+cap "io_analog[8]" "io_analog[10]" 1320
+cap "io_analog[6]" "io_clamp_high[2]" 525
+cap "io_analog[5]" "io_analog[5]" 26250
+cap "vccd1" "io_analog[7]" 1262.28
+cap "io_analog[5]" "io_clamp_low[1]" 525
+cap "io_clamp_low[2]" "io_analog[6]" 525
+cap "io_analog[2]" "vssa1" 3240
+cap "vssa1" "vccd1" 3000
+cap "io_analog[8]" "io_analog[9]" 3000
+cap "io_analog[6]" "io_analog[6]" 26250
+merge "detV2_0/din" "io_analog[3]" -760.336 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -708480 -3344 0 0 0 0
+merge "detV2_0/gnd" "vssa1" -8806.68 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -2641956 -12846 -1661400 -6254 -1661400 -6254 -1661400 -6254 0 0 0 0
+merge "vssa1" "otaV5_0/Vn"
+merge "otaV5_0/Vn" "vccd2"
+merge "vccd2" "VSUBS"
+merge "otaV5_0/cltop" "vssa2" -594.58 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -394000 -2788 0 0 0 0
+merge "otaV5_0/Vp" "vccd1" -150.743 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 46888 -884 0 0 0 0 0 0 0 0 0 0
+merge "otaV5_0/Inn" "io_analog[8]" -2327.2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -931506 -6124 -814506 -4278 0 0
+merge "otaV5_0/Inp" "io_analog[9]" -706.695 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -192600 -3048 0 0 0 0 0 0 0 0
+merge "otaV5_0/Ib" "io_analog[10]" -538.38 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -290585 -2201 0 0 0 0 0 0
+merge "otaV5_0/Vout" "io_analog[7]" -3756.75 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4425000 -11850 0 0 0 0 0 0
+merge "detV2_0/do" "io_analog[2]" -4407.28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -7580490 -15628 0 0 0 0
+merge "detV2_0/db" "io_analog[1]" -324.5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1180 0 0 0 0 0 0 0 0 0 0 0 0
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index 04b370b..e59a35a 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag
@@ -1,69 +1,63 @@
magic
tech sky130A
-timestamp 1647907848
+timestamp 1648060736
<< locali >>
-rect 221010 271221 222010 277497
-rect 221001 270997 222010 271221
-rect 221001 270883 222008 270997
-rect 221001 270289 221161 270883
-rect 221793 270289 222008 270883
-rect 221001 269990 222008 270289
+rect 223431 285475 223732 287107
+rect 223069 285291 224241 285475
+rect 223069 284635 223271 285291
+rect 224007 284635 224241 285291
+rect 223069 284472 224241 284635
<< viali >>
-rect 221161 270289 221793 270883
+rect 223271 284635 224007 285291
<< metal1 >>
-rect 63698 323206 64612 323298
-rect 63698 322799 63851 323206
-rect 64519 322799 64612 323206
-rect 63698 322702 64612 322799
-rect 53034 318178 54514 318278
-rect 53034 317852 53469 318178
-rect 54163 317852 54514 318178
-rect 53034 317779 54514 317852
-rect 54313 317433 54513 317779
-rect 54313 317337 54515 317433
-rect 54315 270268 54515 317337
-rect 64124 277847 64324 322702
-rect 220693 294574 222050 294722
-rect 220693 294092 220995 294574
-rect 221660 294092 222050 294574
-rect 220693 293936 222050 294092
-rect 221100 289088 221600 293936
-rect 221001 270883 222008 271221
-rect 221001 270289 221161 270883
-rect 221793 270289 222008 270883
-rect 54314 269972 64313 270268
-rect 221001 269990 222008 270289
+rect 222847 303312 224186 303600
+rect 222847 302511 223186 303312
+rect 223839 302511 224186 303312
+rect 222847 302206 224186 302511
+rect 223229 298842 223720 302206
+rect 100711 297935 101511 298042
+rect 100711 297613 100911 297935
+rect 101310 297613 101511 297935
+rect 100711 297511 101511 297613
+rect 100966 295991 101167 297511
+rect 100967 293682 101167 295991
+rect 100967 293601 101168 293682
+rect 100968 291182 101168 293601
+rect 223069 285291 224241 285475
+rect 223069 284635 223271 285291
+rect 224007 284635 224241 285291
+rect 223069 284472 224241 284635
+rect 100671 283630 101571 283768
+rect 100671 283137 100876 283630
+rect 101334 283137 101571 283630
+rect 100671 282970 101571 283137
<< via1 >>
-rect 63851 322799 64519 323206
-rect 53469 317852 54163 318178
-rect 220995 294092 221660 294574
-rect 221161 270289 221793 270883
+rect 223186 302511 223839 303312
+rect 100911 297613 101310 297935
+rect 223271 284635 224007 285291
+rect 100876 283137 101334 283630
<< metal2 >>
-rect 18242 343569 19242 343999
-rect 18242 342561 18477 343569
-rect 19014 342561 19242 343569
-rect 18242 341999 19242 342561
-rect 18558 282627 19058 341999
-rect 63698 323206 64612 323298
-rect 63698 322799 63851 323206
-rect 64519 322799 64612 323206
-rect 63698 322702 64612 322799
-rect 53034 318178 54514 318278
-rect 53034 317852 53469 318178
-rect 54163 317852 54514 318178
-rect 53034 317779 54514 317852
-rect 220693 294574 222050 294722
-rect 220693 294092 220995 294574
-rect 221660 294092 222050 294574
-rect 220693 293936 222050 294092
-rect 18558 282128 63565 282627
-rect 18558 282127 63568 282128
-rect 18558 282118 19058 282127
-rect 63468 277628 63568 282127
-rect 221001 270883 222008 271221
-rect 221001 270289 221161 270883
-rect 221793 270289 222008 270883
-rect 221001 269990 222008 270289
+rect 222847 303312 224186 303600
+rect 222847 302511 223186 303312
+rect 223839 302511 224186 303312
+rect 222847 302206 224186 302511
+rect 100711 297935 101511 298042
+rect 100711 297613 100911 297935
+rect 101310 297613 101511 297935
+rect 100711 297511 101511 297613
+rect 99959 295576 100534 295726
+rect 99959 295204 100058 295576
+rect 100432 295204 100534 295576
+rect 99959 295051 100534 295204
+rect 100311 291071 100411 295051
+rect 223069 285291 224241 285475
+rect 223069 284635 223271 285291
+rect 224007 284635 224241 285291
+rect 223069 284472 224241 284635
+rect 100671 283630 101571 283768
+rect 100671 283137 100876 283630
+rect 101334 283137 101571 283630
+rect 100671 282970 101571 283137
rect 262 -400 318 240
rect 853 -400 909 240
rect 1444 -400 1500 240
@@ -559,11 +553,11 @@
rect 291034 -400 291090 240
rect 291625 -400 291681 240
<< via2 >>
-rect 18477 342561 19014 343569
-rect 63851 322799 64519 323206
-rect 53469 317852 54163 318178
-rect 220995 294092 221660 294574
-rect 221161 270289 221793 270883
+rect 223186 302511 223839 303312
+rect 100911 297613 101310 297935
+rect 100058 295204 100432 295576
+rect 223271 284635 224007 285291
+rect 100876 283137 101334 283630
<< metal3 >>
rect 8097 351150 10597 352400
rect 34097 351150 36597 352400
@@ -584,118 +578,124 @@
rect 232697 351150 235197 352400
rect 255297 351170 257697 352400
rect 260297 351170 262697 352400
-rect 9022 343970 9522 351150
-rect 34978 348729 35478 351150
-rect 34978 347332 35483 348729
-rect 61017 348644 61517 351150
-rect 61017 348467 61518 348644
-rect 18242 343970 19242 343999
-rect 9022 343569 19242 343970
-rect 34983 343925 35483 347332
-rect 61018 345212 61518 348467
-rect 61017 344712 69667 345212
-rect 61018 344711 61518 344712
-rect 69163 344711 69667 344712
-rect 9022 343470 18477 343569
-rect -400 341432 850 342621
-rect 18242 342561 18477 343470
-rect 19014 342561 19242 343569
-rect 34982 343661 35483 343925
-rect 34982 343223 35482 343661
-rect 18242 341999 19242 342561
-rect 34981 341925 35482 343223
-rect 34981 341775 35481 341925
-rect 34981 341643 38086 341775
-rect 13329 341432 14329 341486
-rect -400 341020 14329 341432
-rect 34981 341341 35556 341643
-rect 37502 341341 38086 341643
-rect 34981 341223 38086 341341
-rect -400 340121 850 341020
-rect 13329 341018 14329 341020
-rect 13329 339949 13559 341018
-rect 14091 339949 14329 341018
-rect 13329 339386 14329 339949
-rect 69163 334562 69663 344711
-rect 69163 332072 69677 334562
-rect 207499 334019 208499 351150
-rect -400 323308 830 324321
-rect -400 323304 60623 323308
-rect -400 323298 63701 323304
-rect -400 323206 64612 323298
-rect -400 322808 63851 323206
-rect -400 321921 830 322808
-rect 60503 322799 63851 322808
-rect 64519 322799 64612 323206
-rect 60503 322798 64612 322799
-rect 63698 322702 64612 322798
-rect -400 318281 830 319321
-rect 52576 318281 54073 318284
-rect -400 318278 54073 318281
-rect -400 318178 54514 318278
-rect -400 317852 53469 318178
-rect 54163 317852 54514 318178
-rect -400 317785 54514 317852
-rect -400 317781 52710 317785
-rect -400 316921 830 317781
-rect 53034 317779 54514 317785
-rect -400 279721 830 282121
-rect 13265 279578 14265 279891
-rect 13265 278420 13408 279578
-rect 14105 278420 14265 279578
-rect 13265 278388 14265 278420
-rect 13264 277888 63264 278388
-rect -400 276153 830 277121
-rect -400 275581 6188 276153
-rect -400 274721 830 275581
-rect 5676 273191 6165 275581
-rect 69177 274562 69677 332072
-rect 207498 333570 208499 334019
-rect 207498 332497 207740 333570
-rect 208279 333491 208499 333570
-rect 208279 332497 208495 333491
-rect 207498 331810 208495 332497
-rect 233502 325002 234502 351150
-rect 256142 346720 256685 351170
-rect 260999 351168 261999 351170
+rect 9106 346620 9606 351150
+rect 35184 348436 35681 351150
+rect 34830 348177 36242 348436
+rect 34830 347442 35089 348177
+rect 35894 347442 36242 348177
+rect 34830 347182 36242 347442
+rect 8697 346313 10281 346620
+rect 8697 345332 8935 346313
+rect 9892 345332 10281 346313
+rect 8697 344957 10281 345332
+rect -400 341603 850 342621
+rect -400 341103 29506 341603
+rect -400 340121 850 341103
+rect 29006 339134 29506 341103
+rect 29006 338796 29508 339134
+rect -400 323370 830 324321
+rect -400 323359 24907 323370
+rect -400 322870 24917 323359
+rect -400 321921 830 322870
+rect -400 318272 830 319321
+rect 24417 318671 24917 322870
+rect 23846 318348 25232 318671
+rect 23846 318272 24148 318348
+rect -400 317772 24148 318272
+rect -400 316921 830 317772
+rect 23846 317399 24148 317772
+rect 24908 317399 25232 318348
+rect 23846 317030 25232 317399
+rect 29008 291635 29508 338796
+rect 61086 299157 61586 351150
+rect 207689 345109 208189 351150
+rect 207222 344753 208660 345109
+rect 207222 343773 207647 344753
+rect 208318 343773 208660 344753
+rect 207222 343390 208660 343773
+rect 233632 343971 234132 351150
+rect 256254 347381 256754 351170
+rect 255148 347112 257331 347381
+rect 261234 347112 261734 351170
rect 283297 351150 285797 352400
-rect 255927 346538 256927 346720
-rect 255927 345955 256123 346538
-rect 256695 345955 256927 346538
-rect 255927 345720 256927 345955
-rect 283996 334498 284996 351150
+rect 284280 348674 284780 351150
+rect 255148 347001 261738 347112
+rect 255148 346018 255597 347001
+rect 256822 346612 261738 347001
+rect 256822 346018 257331 346612
+rect 255148 345522 257331 346018
+rect 284280 345851 284782 348674
+rect 284282 344310 284782 345851
+rect 237075 344011 238444 344220
+rect 237075 343971 237400 344011
+rect 233632 343471 237400 343971
+rect 237075 343280 237400 343471
+rect 238164 343280 238444 344011
+rect 237075 343012 238444 343280
+rect 283433 343995 285385 344310
+rect 283433 343202 283984 343995
+rect 284892 343202 285385 343995
+rect 283433 342937 285385 343202
rect 291150 338992 292400 341492
-rect 249995 334350 284996 334498
-rect 249995 333656 250149 334350
-rect 250846 333656 284996 334350
-rect 249995 333498 284996 333656
-rect 233502 324652 234503 325002
-rect 233502 323711 233727 324652
-rect 233503 323284 233727 323711
-rect 234235 323284 234503 324652
-rect 233503 323002 234503 323284
-rect 291170 319892 292400 322292
-rect 291170 314892 292400 317292
+rect 270109 324723 271706 325033
+rect 270109 323858 270468 324723
+rect 271313 323858 271706 324723
+rect 270109 323548 271706 323858
+rect 270687 321307 271187 323548
+rect 291170 321307 292400 322292
+rect 270687 320807 292400 321307
+rect 270687 316324 271183 320807
+rect 291170 319892 292400 320807
+rect 291170 316324 292400 317292
+rect 270687 315824 292400 316324
+rect 270687 315817 271183 315824
+rect 291170 314892 292400 315824
+rect 222847 303312 224186 303600
+rect 222847 302511 223186 303312
+rect 223839 302511 224186 303312
+rect 222847 302206 224186 302511
+rect 61087 299015 61586 299157
+rect 61087 298515 106021 299015
+rect 61087 298513 61586 298515
+rect 100711 297935 101511 298042
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+rect 100711 297511 101511 297613
+rect 99959 295576 100534 295726
+rect 99959 295204 100058 295576
+rect 100432 295204 100534 295576
+rect 99959 295051 100534 295204
+rect 29007 291135 100108 291635
+rect 29008 291134 29508 291135
+rect 105521 287888 106021 298515
rect 291760 294736 292400 294792
-rect 220693 294574 222050 294722
-rect 220693 294092 220995 294574
-rect 221660 294092 222050 294574
rect 291760 294145 292400 294201
-rect 220693 293936 222050 294092
rect 291760 293554 292400 293610
rect 291760 292963 292400 293019
rect 291760 292372 292400 292428
rect 291760 291781 292400 291837
+rect 223069 285291 224241 285475
+rect 223069 284635 223271 285291
+rect 224007 284635 224241 285291
+rect 223069 284472 224241 284635
+rect 100671 283630 101571 283768
+rect 100671 283137 100876 283630
+rect 101334 283137 101571 283630
+rect 100671 282970 101571 283137
+rect -400 281147 830 282121
+rect -400 281125 20218 281147
+rect -400 280647 20225 281125
+rect -400 279721 830 280647
+rect -400 275994 830 277121
+rect 19725 276739 20225 280647
+rect 19071 276291 21006 276739
+rect 19071 275994 19526 276291
+rect -400 275494 19526 275994
+rect -400 274721 830 275494
+rect 19071 275348 19526 275494
+rect 20504 275348 21006 276291
+rect 19071 274922 21006 275348
rect 291170 275281 292400 277681
-rect 5675 273167 6165 273191
-rect 5675 273016 6164 273167
-rect 5675 272689 5753 273016
-rect 6042 272689 6164 273016
-rect 5675 272422 6164 272689
-rect 221001 270883 222008 271221
-rect 221001 270289 221161 270883
-rect 221793 270289 222008 270883
-rect 221001 269990 222008 270289
rect 291170 270281 292400 272681
rect -400 255765 240 255821
rect -400 255174 240 255230
@@ -846,16 +846,20 @@
rect -400 772 240 828
rect 291760 772 292400 828
<< via3 >>
-rect 35556 341341 37502 341643
-rect 13559 339949 14091 341018
-rect 13408 278420 14105 279578
-rect 207740 332497 208279 333570
-rect 256123 345955 256695 346538
-rect 250149 333656 250846 334350
-rect 233727 323284 234235 324652
-rect 220995 294092 221660 294574
-rect 5753 272689 6042 273016
-rect 221161 270289 221793 270883
+rect 35089 347442 35894 348177
+rect 8935 345332 9892 346313
+rect 24148 317399 24908 318348
+rect 207647 343773 208318 344753
+rect 255597 346018 256822 347001
+rect 237400 343280 238164 344011
+rect 283984 343202 284892 343995
+rect 270468 323858 271313 324723
+rect 223186 302511 223839 303312
+rect 100911 297613 101310 297935
+rect 100058 295204 100432 295576
+rect 223271 284635 224007 285291
+rect 100876 283137 101334 283630
+rect 19526 275348 20504 276291
<< metal4 >>
rect 82797 351150 85297 352400
rect 87947 351150 90447 352400
@@ -863,83 +867,114 @@
rect 113797 351150 116297 352400
rect 159497 351150 161997 352400
rect 164647 351150 167147 352400
-rect 255927 346538 256927 346720
-rect 255927 345955 256123 346538
-rect 256695 345955 256927 346538
-rect 255927 345720 256927 345955
-rect 34981 341643 62881 341775
-rect 13329 341018 14329 341486
-rect 34981 341341 35556 341643
-rect 37502 341341 62881 341643
-rect 34981 341319 62881 341341
-rect 34981 341275 62882 341319
-rect 34981 341223 38086 341275
-rect 13329 339949 13559 341018
-rect 14091 339949 14329 341018
-rect 13329 339386 14329 339949
-rect 13519 279891 14019 339386
-rect 13265 279578 14265 279891
-rect 13265 278420 13408 279578
-rect 14105 278420 14265 279578
-rect 13265 277891 14265 278420
-rect 5675 273016 6164 273191
-rect 5675 272974 5753 273016
-rect 5662 272689 5753 272974
-rect 6042 272689 6164 273016
-rect 5662 272422 6164 272689
-rect 5662 269521 6162 272422
-rect 62582 272207 62882 341275
-rect 249995 334350 250995 334502
-rect 207498 333570 208495 334019
-rect 207498 332497 207740 333570
-rect 208279 332497 208495 333570
-rect 207498 331989 208495 332497
-rect 249995 333656 250149 334350
-rect 250846 333656 250995 334350
-rect 207497 274119 208497 331989
-rect 233503 324652 234503 325002
-rect 233503 323284 233727 324652
-rect 234235 323994 234503 324652
-rect 234235 323284 234505 323994
-rect 233503 323002 234505 323284
-rect 220693 294574 222050 294722
-rect 220693 294092 220995 294574
-rect 221660 294092 222050 294574
-rect 220693 293936 222050 294092
-rect 233505 289994 234502 323002
-rect 249995 305139 250995 333656
-rect 249995 304502 250998 305139
-rect 207497 273991 208522 274119
-rect 213717 273991 214717 277991
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-rect 225002 273994 226002 277994
-rect 233505 273994 234505 289994
-rect 249998 278028 250998 304502
-rect 249998 275985 251009 278028
-rect 225002 272994 234505 273994
-rect 233004 272990 233508 272994
-rect 62582 272107 62984 272207
-rect 68988 272144 71036 272727
-rect 70537 272136 71036 272144
-rect 62582 272106 62882 272107
-rect 70537 269521 71037 272136
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-rect 250008 270998 251000 271028
-rect 230500 270997 251000 270998
-rect 221001 270883 251000 270997
-rect 221001 270289 221161 270883
-rect 221793 270289 251000 270883
-rect 221001 269998 251000 270289
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+rect 237874 285142 249540 285143
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+rect 223069 284472 224241 284635
+rect 20504 275495 106870 275989
+rect 20504 275348 21006 275495
+rect 19071 274922 21006 275348
<< via4 >>
-rect 256123 345955 256695 346538
-rect 220995 294092 221660 294574
+rect 35089 347442 35894 348177
+rect 100911 297613 101310 297935
+rect 99449 285377 99719 285769
+rect 270468 323858 271313 324723
<< metal5 >>
rect 82797 351150 85297 352400
rect 87947 351150 90447 352400
@@ -947,32 +982,48 @@
rect 113797 351150 116297 352400
rect 159497 351150 161997 352400
rect 164647 351150 167147 352400
-rect 255927 346538 256927 346720
-rect 255927 345955 256123 346538
-rect 256695 345955 256927 346538
-rect 255927 345720 256927 345955
-rect 256108 340302 256656 345720
-rect 221055 339849 256749 340302
-rect 221064 337710 221564 339849
-rect 256108 339846 256656 339849
-rect 221057 337350 221564 337710
-rect 221057 294722 221557 337350
-rect 220693 294574 222050 294722
-rect 220693 294092 220995 294574
-rect 221660 294092 222050 294574
-rect 220693 293936 222050 294092
+rect 34830 348177 36242 348436
+rect 34830 347442 35089 348177
+rect 35894 347870 36242 348177
+rect 44378 347870 44867 347873
+rect 35894 347442 44874 347870
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+rect 44375 331434 44889 333348
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+rect 270109 324723 271706 325033
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+rect 100885 298042 101348 324104
+rect 270109 323858 270468 324104
+rect 271313 323858 271706 324723
+rect 270109 323548 271706 323858
+rect 100711 297935 101511 298042
+rect 100711 297613 100911 297935
+rect 101310 297613 101511 297935
+rect 100711 297511 101511 297613
+rect 99264 285854 99930 285960
+rect 44389 285769 99930 285854
+rect 44389 285377 99449 285769
+rect 99719 285377 99930 285769
+rect 44389 285354 99930 285377
+rect 44389 285348 44889 285354
+rect 99264 285252 99930 285354
<< comment >>
rect -50 352000 292050 352050
rect -50 0 0 352000
rect 292000 0 292050 352000
rect -50 -50 292050 0
use detV2 *detV2_0
-timestamp 1647905536
-transform 1 0 244450 0 1 290645
+timestamp 1648041187
+transform 1 0 246489 0 1 300417
box -32487 -13471 -12750 -1482
use otaV5 *otaV5_0
timestamp 1647895533
-transform 1 0 60168 0 1 271378
+transform 1 0 97011 0 1 284708
box 2758 -1403 9010 6511
<< labels >>
flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0]
@@ -2131,10 +2182,6 @@
port 564 nsew signal bidirectional
flabel metal3 s 291170 68415 292400 70815 0 FreeSans 560 0 0 0 vssa1
port 565 nsew signal bidirectional
-flabel metal3 s 0 279721 830 282121 0 FreeSans 560 0 0 0 vssa2
-port 566 nsew signal bidirectional
-flabel metal3 s 0 274721 830 277121 0 FreeSans 560 0 0 0 vssa2
-port 567 nsew signal bidirectional
flabel metal3 s 291170 95715 292400 98115 0 FreeSans 560 0 0 0 vssd1
port 568 nsew signal bidirectional
flabel metal3 s 291170 90715 292400 93115 0 FreeSans 560 0 0 0 vssd1
@@ -2355,6 +2402,10 @@
port 676 nsew signal input
flabel metal2 s 3217 -400 3273 240 0 FreeSans 560 90 0 0 wbs_we_i
port 677 nsew signal input
+flabel metal3 s 0 274721 830 277121 0 FreeSans 560 0 0 0 vssa2
+port 567 nsew signal bidirectional
+flabel metal3 s 0 279721 830 282121 0 FreeSans 560 0 0 0 vssa2
+port 566 nsew signal bidirectional
<< properties >>
string FIXED_BBOX 0 0 292000 352000
<< end >>
diff --git a/mag/user_analog_project_wrapper.spice b/mag/user_analog_project_wrapper.spice
new file mode 100644
index 0000000..a4a9482
--- /dev/null
+++ b/mag/user_analog_project_wrapper.spice
@@ -0,0 +1,137 @@
+* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
+
+.subckt sky130_fd_pr__res_xhigh_po_0p35_HDW2JU a_n35_1860# a_n35_n2292# VSUBS
+X0 a_n35_n2292# a_n35_1860# VSUBS sky130_fd_pr__res_xhigh_po w=350000u l=1.86e+07u
+.ends
+
+.subckt detV2 din db do gnd
+XR bot_cin do gnd sky130_fd_pr__res_xhigh_po_0p35_HDW2JU
+X0 din bot_cin sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X1 do m2_n40996_n4008# sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X2 gnd db bot_cin gnd sky130_fd_pr__nfet_01v8 w=2.25e+07u l=150000u
+.ends
+
+.subckt otaV5 Inp Inn Vout Ib cltop Vp Vn
+X0 Vn a_6890_1010# a_6890_750# Vn sky130_fd_pr__nfet_01v8 w=800000u l=4e+06u
+X1 a_7570_1796# Inp a_6890_1010# Vp sky130_fd_pr__pfet_01v8 w=1.7e+06u l=2e+06u
+X2 Vn a_8070_1014# a_8070_1014# Vn sky130_fd_pr__nfet_01v8 w=800000u l=4e+06u
+X3 Vn a_6890_1010# a_6890_1010# Vn sky130_fd_pr__nfet_01v8 w=800000u l=4e+06u
+X4 Vp a_6890_750# Vout Vp sky130_fd_pr__pfet_01v8 w=1.4e+06u l=1e+06u
+X5 Vp Ib a_7570_1796# Vp sky130_fd_pr__pfet_01v8 w=5e+06u l=4e+06u
+X6 cltop Vout sky130_fd_pr__cap_mim_m3_1 l=3.2e+07u w=3.2e+07u
+X7 Vn a_8070_1014# Vout Vn sky130_fd_pr__nfet_01v8 w=800000u l=4e+06u
+X8 Vp a_6890_750# a_6890_750# Vp sky130_fd_pr__pfet_01v8 w=1.4e+06u l=1e+06u
+X9 a_8070_1014# Inn a_7570_1796# Vp sky130_fd_pr__pfet_01v8 w=1.7e+06u l=2e+06u
+X10 Vp Ib Ib Vp sky130_fd_pr__pfet_01v8 w=5e+06u l=4e+06u
+.ends
+
+.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
++ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
++ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
++ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
++ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
++ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
++ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
++ io_analog[1] io_analog[2] io_analog[3] io_analog[7] io_analog[8] io_analog[9] io_analog[4]
++ io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
++ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
++ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
++ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
++ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
++ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
++ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
++ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
++ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
++ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
++ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
++ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
++ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
++ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
++ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
++ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
++ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
++ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
++ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
++ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
++ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
++ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
++ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
++ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
++ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
++ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
++ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
++ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
++ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
++ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
++ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
++ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
++ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
++ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
++ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
++ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
++ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
++ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
++ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
++ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
++ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
++ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
++ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
++ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
++ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
++ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
++ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
++ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
++ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
++ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
++ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
++ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
++ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
++ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
++ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
++ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
++ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
++ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
++ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
++ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
++ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
++ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
++ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
++ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
++ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
++ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
++ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
++ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
++ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
++ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
++ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
++ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
++ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
++ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
++ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
++ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
++ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
++ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
++ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
++ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
++ vccd1 vccd2 vdda1 vdda2 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
++ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
++ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
++ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
++ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
++ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
++ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
++ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
++ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
++ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
++ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
++ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
++ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
++ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
++ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
++ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
++ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
++ wbs_stb_i wbs_we_i
+XdetV2_0 io_analog[3] io_analog[1] io_analog[2] vccd2 detV2
+XotaV5_0 io_analog[9] io_analog[8] io_analog[7] io_analog[10] vssa2 vccd1 vccd2 otaV5
+.ends
+
diff --git a/netgen/comp.out b/netgen/comp.out
index 33f1158..8ccbc2d 100644
--- a/netgen/comp.out
+++ b/netgen/comp.out
@@ -11,6 +11,29 @@
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes sky130_fd_pr__nfet_01v8 and sky130_fd_pr__nfet_01v8 are equivalent.
+Warning: Equate pins: cell sky130_fd_pr__cap_mim_m3_1 has no definition, treated as a black box.
+Warning: Equate pins: cell sky130_fd_pr__cap_mim_m3_1 has no definition, treated as a black box.
+
+Subcircuit pins:
+Circuit 1: sky130_fd_pr__cap_mim_m3_1 |Circuit 2: sky130_fd_pr__cap_mim_m3_1
+-------------------------------------------|-------------------------------------------
+1 |1
+2 |2
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes sky130_fd_pr__cap_mim_m3_1 and sky130_fd_pr__cap_mim_m3_1 are equivalent.
+Warning: Equate pins: cell sky130_fd_pr__res_xhigh_po has no definition, treated as a black box.
+Warning: Equate pins: cell sky130_fd_pr__res_xhigh_po has no definition, treated as a black box.
+
+Subcircuit pins:
+Circuit 1: sky130_fd_pr__res_xhigh_po |Circuit 2: sky130_fd_pr__res_xhigh_po
+-------------------------------------------|-------------------------------------------
+1 |1
+2 |2
+3 |3
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes sky130_fd_pr__res_xhigh_po and sky130_fd_pr__res_xhigh_po are equivalent.
Warning: Equate pins: cell sky130_fd_pr__pfet_01v8 has no definition, treated as a black box.
Warning: Equate pins: cell sky130_fd_pr__pfet_01v8 has no definition, treated as a black box.
@@ -24,23 +47,35 @@
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
Device classes sky130_fd_pr__pfet_01v8 and sky130_fd_pr__pfet_01v8 are equivalent.
-Warning: Equate pins: cell sky130_fd_pr__cap_mim_m3_1 has no definition, treated as a black box.
-Warning: Equate pins: cell sky130_fd_pr__cap_mim_m3_1 has no definition, treated as a black box.
-
-Subcircuit pins:
-Circuit 1: sky130_fd_pr__cap_mim_m3_1 |Circuit 2: sky130_fd_pr__cap_mim_m3_1
--------------------------------------------|-------------------------------------------
-1 |1
-2 |2
----------------------------------------------------------------------------------------
-Cell pin lists are equivalent.
-Device classes sky130_fd_pr__cap_mim_m3_1 and sky130_fd_pr__cap_mim_m3_1 are equivalent.
Subcircuit summary:
-Circuit 1: otaV5 |Circuit 2: OTA
+Circuit 1: detector |Circuit 2: detector
-------------------------------------------|-------------------------------------------
-sky130_fd_pr__nfet_01v8 (4) |sky130_fd_pr__nfet_01v8 (4)
+sky130_fd_pr__nfet_01v8 (1) |sky130_fd_pr__nfet_01v8 (1)
+sky130_fd_pr__cap_mim_m3_1 (2) |sky130_fd_pr__cap_mim_m3_1 (2)
+sky130_fd_pr__res_xhigh_po (1) |sky130_fd_pr__res_xhigh_po (1)
+Number of devices: 4 |Number of devices: 4
+Number of nets: 5 |Number of nets: 5
+---------------------------------------------------------------------------------------
+Circuits match uniquely.
+Netlists match uniquely.
+
+Subcircuit pins:
+Circuit 1: detector |Circuit 2: detector
+-------------------------------------------|-------------------------------------------
+do |do
+gnd |gnd
+dB |dB
+din |din
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes detector and detector are equivalent.
+
+Subcircuit summary:
+Circuit 1: OTA |Circuit 2: OTA
+-------------------------------------------|-------------------------------------------
sky130_fd_pr__pfet_01v8 (6) |sky130_fd_pr__pfet_01v8 (6)
+sky130_fd_pr__nfet_01v8 (4) |sky130_fd_pr__nfet_01v8 (4)
sky130_fd_pr__cap_mim_m3_1 (1) |sky130_fd_pr__cap_mim_m3_1 (1)
Number of devices: 11 |Number of devices: 11
Number of nets: 11 |Number of nets: 11
@@ -49,16 +84,2003 @@
Netlists match uniquely.
Subcircuit pins:
-Circuit 1: otaV5 |Circuit 2: OTA
+Circuit 1: OTA |Circuit 2: OTA
-------------------------------------------|-------------------------------------------
-Vp |Vp
-Inn |inn
-Inp |inp
-cltop |cltop
-Vout |vout
-Ib |ib
Vn |Vn
+inn |inn
+inp |inp
+cltop |cltop
+vout |vout
+ib |ib
+Vp |Vp
---------------------------------------------------------------------------------------
Cell pin lists are equivalent.
-Device classes otaV5 and OTA are equivalent.
+Device classes OTA and OTA are equivalent.
+
+Cell user_analog_project_wrapper disconnected node: vdda1
+Cell user_analog_project_wrapper disconnected node: vdda2
+Cell user_analog_project_wrapper disconnected node: vssd1
+Cell user_analog_project_wrapper disconnected node: vssd2
+Cell user_analog_project_wrapper disconnected node: wb_clk_i
+Cell user_analog_project_wrapper disconnected node: wb_rst_i
+Cell user_analog_project_wrapper disconnected node: wbs_stb_i
+Cell user_analog_project_wrapper disconnected node: wbs_cyc_i
+Cell user_analog_project_wrapper disconnected node: wbs_we_i
+Cell user_analog_project_wrapper disconnected node: wbs_sel_i[3]
+Cell user_analog_project_wrapper disconnected node: wbs_sel_i[2]
+Cell user_analog_project_wrapper disconnected node: wbs_sel_i[1]
+Cell user_analog_project_wrapper disconnected node: wbs_sel_i[0]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[31]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[30]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[29]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[28]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[27]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[26]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[25]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[24]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[23]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[22]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[21]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[20]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[19]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[18]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[17]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[16]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[15]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[14]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[13]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[12]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[11]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[10]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[9]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[8]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[7]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[6]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[5]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[4]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[3]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[2]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[1]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_i[0]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[31]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[30]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[29]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[28]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[27]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[26]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[25]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[24]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[23]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[22]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[21]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[20]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[19]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[18]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[17]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[16]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[15]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[14]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[13]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[12]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[11]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[10]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[9]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[8]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[7]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[6]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[5]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[4]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[3]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[2]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[1]
+Cell user_analog_project_wrapper disconnected node: wbs_adr_i[0]
+Cell user_analog_project_wrapper disconnected node: wbs_ack_o
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[31]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[30]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[29]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[28]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[27]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[26]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[25]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[24]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[23]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[22]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[21]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[20]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[19]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[18]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[17]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[16]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[15]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[14]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[13]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[12]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[11]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[10]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[9]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[8]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[7]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[6]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[5]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[4]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[3]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[2]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[1]
+Cell user_analog_project_wrapper disconnected node: wbs_dat_o[0]
+Cell user_analog_project_wrapper disconnected node: la_data_in[127]
+Cell user_analog_project_wrapper disconnected node: la_data_in[126]
+Cell user_analog_project_wrapper disconnected node: la_data_in[125]
+Cell user_analog_project_wrapper disconnected node: la_data_in[124]
+Cell user_analog_project_wrapper disconnected node: la_data_in[123]
+Cell user_analog_project_wrapper disconnected node: la_data_in[122]
+Cell user_analog_project_wrapper disconnected node: la_data_in[121]
+Cell user_analog_project_wrapper disconnected node: la_data_in[120]
+Cell user_analog_project_wrapper disconnected node: la_data_in[119]
+Cell user_analog_project_wrapper disconnected node: la_data_in[118]
+Cell user_analog_project_wrapper disconnected node: la_data_in[117]
+Cell user_analog_project_wrapper disconnected node: la_data_in[116]
+Cell user_analog_project_wrapper disconnected node: la_data_in[115]
+Cell user_analog_project_wrapper disconnected node: la_data_in[114]
+Cell user_analog_project_wrapper disconnected node: la_data_in[113]
+Cell user_analog_project_wrapper disconnected node: la_data_in[112]
+Cell user_analog_project_wrapper disconnected node: la_data_in[111]
+Cell user_analog_project_wrapper disconnected node: la_data_in[110]
+Cell user_analog_project_wrapper disconnected node: la_data_in[109]
+Cell user_analog_project_wrapper disconnected node: la_data_in[108]
+Cell user_analog_project_wrapper disconnected node: la_data_in[107]
+Cell user_analog_project_wrapper disconnected node: la_data_in[106]
+Cell user_analog_project_wrapper disconnected node: la_data_in[105]
+Cell user_analog_project_wrapper disconnected node: la_data_in[104]
+Cell user_analog_project_wrapper disconnected node: la_data_in[103]
+Cell user_analog_project_wrapper disconnected node: la_data_in[102]
+Cell user_analog_project_wrapper disconnected node: la_data_in[101]
+Cell user_analog_project_wrapper disconnected node: la_data_in[100]
+Cell user_analog_project_wrapper disconnected node: la_data_in[99]
+Cell user_analog_project_wrapper disconnected node: la_data_in[98]
+Cell user_analog_project_wrapper disconnected node: la_data_in[97]
+Cell user_analog_project_wrapper disconnected node: la_data_in[96]
+Cell user_analog_project_wrapper disconnected node: la_data_in[95]
+Cell user_analog_project_wrapper disconnected node: la_data_in[94]
+Cell user_analog_project_wrapper disconnected node: la_data_in[93]
+Cell user_analog_project_wrapper disconnected node: la_data_in[92]
+Cell user_analog_project_wrapper disconnected node: la_data_in[91]
+Cell user_analog_project_wrapper disconnected node: la_data_in[90]
+Cell user_analog_project_wrapper disconnected node: la_data_in[89]
+Cell user_analog_project_wrapper disconnected node: la_data_in[88]
+Cell user_analog_project_wrapper disconnected node: la_data_in[87]
+Cell user_analog_project_wrapper disconnected node: la_data_in[86]
+Cell user_analog_project_wrapper disconnected node: la_data_in[85]
+Cell user_analog_project_wrapper disconnected node: la_data_in[84]
+Cell user_analog_project_wrapper disconnected node: la_data_in[83]
+Cell user_analog_project_wrapper disconnected node: la_data_in[82]
+Cell user_analog_project_wrapper disconnected node: la_data_in[81]
+Cell user_analog_project_wrapper disconnected node: la_data_in[80]
+Cell user_analog_project_wrapper disconnected node: la_data_in[79]
+Cell user_analog_project_wrapper disconnected node: la_data_in[78]
+Cell user_analog_project_wrapper disconnected node: la_data_in[77]
+Cell user_analog_project_wrapper disconnected node: la_data_in[76]
+Cell user_analog_project_wrapper disconnected node: la_data_in[75]
+Cell user_analog_project_wrapper disconnected node: la_data_in[74]
+Cell user_analog_project_wrapper disconnected node: la_data_in[73]
+Cell user_analog_project_wrapper disconnected node: la_data_in[72]
+Cell user_analog_project_wrapper disconnected node: la_data_in[71]
+Cell user_analog_project_wrapper disconnected node: la_data_in[70]
+Cell user_analog_project_wrapper disconnected node: la_data_in[69]
+Cell user_analog_project_wrapper disconnected node: la_data_in[68]
+Cell user_analog_project_wrapper disconnected node: la_data_in[67]
+Cell user_analog_project_wrapper disconnected node: la_data_in[66]
+Cell user_analog_project_wrapper disconnected node: la_data_in[65]
+Cell user_analog_project_wrapper disconnected node: la_data_in[64]
+Cell user_analog_project_wrapper disconnected node: la_data_in[63]
+Cell user_analog_project_wrapper disconnected node: la_data_in[62]
+Cell user_analog_project_wrapper disconnected node: la_data_in[61]
+Cell user_analog_project_wrapper disconnected node: la_data_in[60]
+Cell user_analog_project_wrapper disconnected node: la_data_in[59]
+Cell user_analog_project_wrapper disconnected node: la_data_in[58]
+Cell user_analog_project_wrapper disconnected node: la_data_in[57]
+Cell user_analog_project_wrapper disconnected node: la_data_in[56]
+Cell user_analog_project_wrapper disconnected node: la_data_in[55]
+Cell user_analog_project_wrapper disconnected node: la_data_in[54]
+Cell user_analog_project_wrapper disconnected node: la_data_in[53]
+Cell user_analog_project_wrapper disconnected node: la_data_in[52]
+Cell user_analog_project_wrapper disconnected node: la_data_in[51]
+Cell user_analog_project_wrapper disconnected node: la_data_in[50]
+Cell user_analog_project_wrapper disconnected node: la_data_in[49]
+Cell user_analog_project_wrapper disconnected node: la_data_in[48]
+Cell user_analog_project_wrapper disconnected node: la_data_in[47]
+Cell user_analog_project_wrapper disconnected node: la_data_in[46]
+Cell user_analog_project_wrapper disconnected node: la_data_in[45]
+Cell user_analog_project_wrapper disconnected node: la_data_in[44]
+Cell user_analog_project_wrapper disconnected node: la_data_in[43]
+Cell user_analog_project_wrapper disconnected node: la_data_in[42]
+Cell user_analog_project_wrapper disconnected node: la_data_in[41]
+Cell user_analog_project_wrapper disconnected node: la_data_in[40]
+Cell user_analog_project_wrapper disconnected node: la_data_in[39]
+Cell user_analog_project_wrapper disconnected node: la_data_in[38]
+Cell user_analog_project_wrapper disconnected node: la_data_in[37]
+Cell user_analog_project_wrapper disconnected node: la_data_in[36]
+Cell user_analog_project_wrapper disconnected node: la_data_in[35]
+Cell user_analog_project_wrapper disconnected node: la_data_in[34]
+Cell user_analog_project_wrapper disconnected node: la_data_in[33]
+Cell user_analog_project_wrapper disconnected node: la_data_in[32]
+Cell user_analog_project_wrapper disconnected node: la_data_in[31]
+Cell user_analog_project_wrapper disconnected node: la_data_in[30]
+Cell user_analog_project_wrapper disconnected node: la_data_in[29]
+Cell user_analog_project_wrapper disconnected node: la_data_in[28]
+Cell user_analog_project_wrapper disconnected node: la_data_in[27]
+Cell user_analog_project_wrapper disconnected node: la_data_in[26]
+Cell user_analog_project_wrapper disconnected node: la_data_in[25]
+Cell user_analog_project_wrapper disconnected node: la_data_in[24]
+Cell user_analog_project_wrapper disconnected node: la_data_in[23]
+Cell user_analog_project_wrapper disconnected node: la_data_in[22]
+Cell user_analog_project_wrapper disconnected node: la_data_in[21]
+Cell user_analog_project_wrapper disconnected node: la_data_in[20]
+Cell user_analog_project_wrapper disconnected node: la_data_in[19]
+Cell user_analog_project_wrapper disconnected node: la_data_in[18]
+Cell user_analog_project_wrapper disconnected node: la_data_in[17]
+Cell user_analog_project_wrapper disconnected node: la_data_in[16]
+Cell user_analog_project_wrapper disconnected node: la_data_in[15]
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+Cell user_analog_project_wrapper disconnected node: la_oenb[18]
+Cell user_analog_project_wrapper disconnected node: la_oenb[17]
+Cell user_analog_project_wrapper disconnected node: la_oenb[16]
+Cell user_analog_project_wrapper disconnected node: la_oenb[15]
+Cell user_analog_project_wrapper disconnected node: la_oenb[14]
+Cell user_analog_project_wrapper disconnected node: la_oenb[13]
+Cell user_analog_project_wrapper disconnected node: la_oenb[12]
+Cell user_analog_project_wrapper disconnected node: la_oenb[11]
+Cell user_analog_project_wrapper disconnected node: la_oenb[10]
+Cell user_analog_project_wrapper disconnected node: la_oenb[9]
+Cell user_analog_project_wrapper disconnected node: la_oenb[8]
+Cell user_analog_project_wrapper disconnected node: la_oenb[7]
+Cell user_analog_project_wrapper disconnected node: la_oenb[6]
+Cell user_analog_project_wrapper disconnected node: la_oenb[5]
+Cell user_analog_project_wrapper disconnected node: la_oenb[4]
+Cell user_analog_project_wrapper disconnected node: la_oenb[3]
+Cell user_analog_project_wrapper disconnected node: la_oenb[2]
+Cell user_analog_project_wrapper disconnected node: la_oenb[1]
+Cell user_analog_project_wrapper disconnected node: la_oenb[0]
+
+Subcircuit summary:
+Circuit 1: user_analog_project_wrapper |Circuit 2: user_analog_project_wrapper
+-------------------------------------------|-------------------------------------------
+detector (1) |detector (1)
+OTA (1) |OTA (1)
+Number of devices: 2 |Number of devices: 2
+Number of nets: 11 |Number of nets: 11
+---------------------------------------------------------------------------------------
+Circuits match uniquely.
+Netlists match uniquely.
+
+Subcircuit pins:
+Circuit 1: user_analog_project_wrapper |Circuit 2: user_analog_project_wrapper
+-------------------------------------------|-------------------------------------------
+io_analog[3] |io_analog[3]
+io_analog[2] |io_analog[2]
+io_analog[1] |io_analog[1]
+vssa1 |vssa1
+vccd1 |vccd1
+io_analog[7] |io_analog[7]
+io_analog[10] |io_analog[10]
+vssa2 |vssa2
+io_analog[8] |io_analog[8]
+io_analog[9] |io_analog[9]
+vccd2 |vccd2
+vdda1 |vdda1
+vdda2 |vdda2
+vssd1 |vssd1
+vssd2 |vssd2
+wb_clk_i |wb_clk_i
+wb_rst_i |wb_rst_i
+wbs_stb_i |wbs_stb_i
+wbs_cyc_i |wbs_cyc_i
+wbs_we_i |wbs_we_i
+wbs_sel_i[3] |wbs_sel_i[3]
+wbs_sel_i[2] |wbs_sel_i[2]
+wbs_sel_i[1] |wbs_sel_i[1]
+wbs_sel_i[0] |wbs_sel_i[0]
+wbs_dat_i[31] |wbs_dat_i[31]
+wbs_dat_i[30] |wbs_dat_i[30]
+wbs_dat_i[29] |wbs_dat_i[29]
+wbs_dat_i[28] |wbs_dat_i[28]
+wbs_dat_i[27] |wbs_dat_i[27]
+wbs_dat_i[26] |wbs_dat_i[26]
+wbs_dat_i[25] |wbs_dat_i[25]
+wbs_dat_i[24] |wbs_dat_i[24]
+wbs_dat_i[23] |wbs_dat_i[23]
+wbs_dat_i[22] |wbs_dat_i[22]
+wbs_dat_i[21] |wbs_dat_i[21]
+wbs_dat_i[20] |wbs_dat_i[20]
+wbs_dat_i[19] |wbs_dat_i[19]
+wbs_dat_i[18] |wbs_dat_i[18]
+wbs_dat_i[17] |wbs_dat_i[17]
+wbs_dat_i[16] |wbs_dat_i[16]
+wbs_dat_i[15] |wbs_dat_i[15]
+wbs_dat_i[14] |wbs_dat_i[14]
+wbs_dat_i[13] |wbs_dat_i[13]
+wbs_dat_i[12] |wbs_dat_i[12]
+wbs_dat_i[11] |wbs_dat_i[11]
+wbs_dat_i[10] |wbs_dat_i[10]
+wbs_dat_i[9] |wbs_dat_i[9]
+wbs_dat_i[8] |wbs_dat_i[8]
+wbs_dat_i[7] |wbs_dat_i[7]
+wbs_dat_i[6] |wbs_dat_i[6]
+wbs_dat_i[5] |wbs_dat_i[5]
+wbs_dat_i[4] |wbs_dat_i[4]
+wbs_dat_i[3] |wbs_dat_i[3]
+wbs_dat_i[2] |wbs_dat_i[2]
+wbs_dat_i[1] |wbs_dat_i[1]
+wbs_dat_i[0] |wbs_dat_i[0]
+wbs_adr_i[31] |wbs_adr_i[31]
+wbs_adr_i[30] |wbs_adr_i[30]
+wbs_adr_i[29] |wbs_adr_i[29]
+wbs_adr_i[28] |wbs_adr_i[28]
+wbs_adr_i[27] |wbs_adr_i[27]
+wbs_adr_i[26] |wbs_adr_i[26]
+wbs_adr_i[25] |wbs_adr_i[25]
+wbs_adr_i[24] |wbs_adr_i[24]
+wbs_adr_i[23] |wbs_adr_i[23]
+wbs_adr_i[22] |wbs_adr_i[22]
+wbs_adr_i[21] |wbs_adr_i[21]
+wbs_adr_i[20] |wbs_adr_i[20]
+wbs_adr_i[19] |wbs_adr_i[19]
+wbs_adr_i[18] |wbs_adr_i[18]
+wbs_adr_i[17] |wbs_adr_i[17]
+wbs_adr_i[16] |wbs_adr_i[16]
+wbs_adr_i[15] |wbs_adr_i[15]
+wbs_adr_i[14] |wbs_adr_i[14]
+wbs_adr_i[13] |wbs_adr_i[13]
+wbs_adr_i[12] |wbs_adr_i[12]
+wbs_adr_i[11] |wbs_adr_i[11]
+wbs_adr_i[10] |wbs_adr_i[10]
+wbs_adr_i[9] |wbs_adr_i[9]
+wbs_adr_i[8] |wbs_adr_i[8]
+wbs_adr_i[7] |wbs_adr_i[7]
+wbs_adr_i[6] |wbs_adr_i[6]
+wbs_adr_i[5] |wbs_adr_i[5]
+wbs_adr_i[4] |wbs_adr_i[4]
+wbs_adr_i[3] |wbs_adr_i[3]
+wbs_adr_i[2] |wbs_adr_i[2]
+wbs_adr_i[1] |wbs_adr_i[1]
+wbs_adr_i[0] |wbs_adr_i[0]
+wbs_ack_o |wbs_ack_o
+wbs_dat_o[31] |wbs_dat_o[31]
+wbs_dat_o[30] |wbs_dat_o[30]
+wbs_dat_o[29] |wbs_dat_o[29]
+wbs_dat_o[28] |wbs_dat_o[28]
+wbs_dat_o[27] |wbs_dat_o[27]
+wbs_dat_o[26] |wbs_dat_o[26]
+wbs_dat_o[25] |wbs_dat_o[25]
+wbs_dat_o[24] |wbs_dat_o[24]
+wbs_dat_o[23] |wbs_dat_o[23]
+wbs_dat_o[22] |wbs_dat_o[22]
+wbs_dat_o[21] |wbs_dat_o[21]
+wbs_dat_o[20] |wbs_dat_o[20]
+wbs_dat_o[19] |wbs_dat_o[19]
+wbs_dat_o[18] |wbs_dat_o[18]
+wbs_dat_o[17] |wbs_dat_o[17]
+wbs_dat_o[16] |wbs_dat_o[16]
+wbs_dat_o[15] |wbs_dat_o[15]
+wbs_dat_o[14] |wbs_dat_o[14]
+wbs_dat_o[13] |wbs_dat_o[13]
+wbs_dat_o[12] |wbs_dat_o[12]
+wbs_dat_o[11] |wbs_dat_o[11]
+wbs_dat_o[10] |wbs_dat_o[10]
+wbs_dat_o[9] |wbs_dat_o[9]
+wbs_dat_o[8] |wbs_dat_o[8]
+wbs_dat_o[7] |wbs_dat_o[7]
+wbs_dat_o[6] |wbs_dat_o[6]
+wbs_dat_o[5] |wbs_dat_o[5]
+wbs_dat_o[4] |wbs_dat_o[4]
+wbs_dat_o[3] |wbs_dat_o[3]
+wbs_dat_o[2] |wbs_dat_o[2]
+wbs_dat_o[1] |wbs_dat_o[1]
+wbs_dat_o[0] |wbs_dat_o[0]
+la_data_in[127] |la_data_in[127]
+la_data_in[126] |la_data_in[126]
+la_data_in[125] |la_data_in[125]
+la_data_in[124] |la_data_in[124]
+la_data_in[123] |la_data_in[123]
+la_data_in[122] |la_data_in[122]
+la_data_in[121] |la_data_in[121]
+la_data_in[120] |la_data_in[120]
+la_data_in[119] |la_data_in[119]
+la_data_in[118] |la_data_in[118]
+la_data_in[117] |la_data_in[117]
+la_data_in[116] |la_data_in[116]
+la_data_in[115] |la_data_in[115]
+la_data_in[114] |la_data_in[114]
+la_data_in[113] |la_data_in[113]
+la_data_in[112] |la_data_in[112]
+la_data_in[111] |la_data_in[111]
+la_data_in[110] |la_data_in[110]
+la_data_in[109] |la_data_in[109]
+la_data_in[108] |la_data_in[108]
+la_data_in[107] |la_data_in[107]
+la_data_in[106] |la_data_in[106]
+la_data_in[105] |la_data_in[105]
+la_data_in[104] |la_data_in[104]
+la_data_in[103] |la_data_in[103]
+la_data_in[102] |la_data_in[102]
+la_data_in[101] |la_data_in[101]
+la_data_in[100] |la_data_in[100]
+la_data_in[99] |la_data_in[99]
+la_data_in[98] |la_data_in[98]
+la_data_in[97] |la_data_in[97]
+la_data_in[96] |la_data_in[96]
+la_data_in[95] |la_data_in[95]
+la_data_in[94] |la_data_in[94]
+la_data_in[93] |la_data_in[93]
+la_data_in[92] |la_data_in[92]
+la_data_in[91] |la_data_in[91]
+la_data_in[90] |la_data_in[90]
+la_data_in[89] |la_data_in[89]
+la_data_in[88] |la_data_in[88]
+la_data_in[87] |la_data_in[87]
+la_data_in[86] |la_data_in[86]
+la_data_in[85] |la_data_in[85]
+la_data_in[84] |la_data_in[84]
+la_data_in[83] |la_data_in[83]
+la_data_in[82] |la_data_in[82]
+la_data_in[81] |la_data_in[81]
+la_data_in[80] |la_data_in[80]
+la_data_in[79] |la_data_in[79]
+la_data_in[78] |la_data_in[78]
+la_data_in[77] |la_data_in[77]
+la_data_in[76] |la_data_in[76]
+la_data_in[75] |la_data_in[75]
+la_data_in[74] |la_data_in[74]
+la_data_in[73] |la_data_in[73]
+la_data_in[72] |la_data_in[72]
+la_data_in[71] |la_data_in[71]
+la_data_in[70] |la_data_in[70]
+la_data_in[69] |la_data_in[69]
+la_data_in[68] |la_data_in[68]
+la_data_in[67] |la_data_in[67]
+la_data_in[66] |la_data_in[66]
+la_data_in[65] |la_data_in[65]
+la_data_in[64] |la_data_in[64]
+la_data_in[63] |la_data_in[63]
+la_data_in[62] |la_data_in[62]
+la_data_in[61] |la_data_in[61]
+la_data_in[60] |la_data_in[60]
+la_data_in[59] |la_data_in[59]
+la_data_in[58] |la_data_in[58]
+la_data_in[57] |la_data_in[57]
+la_data_in[56] |la_data_in[56]
+la_data_in[55] |la_data_in[55]
+la_data_in[54] |la_data_in[54]
+la_data_in[53] |la_data_in[53]
+la_data_in[52] |la_data_in[52]
+la_data_in[51] |la_data_in[51]
+la_data_in[50] |la_data_in[50]
+la_data_in[49] |la_data_in[49]
+la_data_in[48] |la_data_in[48]
+la_data_in[47] |la_data_in[47]
+la_data_in[46] |la_data_in[46]
+la_data_in[45] |la_data_in[45]
+la_data_in[44] |la_data_in[44]
+la_data_in[43] |la_data_in[43]
+la_data_in[42] |la_data_in[42]
+la_data_in[41] |la_data_in[41]
+la_data_in[40] |la_data_in[40]
+la_data_in[39] |la_data_in[39]
+la_data_in[38] |la_data_in[38]
+la_data_in[37] |la_data_in[37]
+la_data_in[36] |la_data_in[36]
+la_data_in[35] |la_data_in[35]
+la_data_in[34] |la_data_in[34]
+la_data_in[33] |la_data_in[33]
+la_data_in[32] |la_data_in[32]
+la_data_in[31] |la_data_in[31]
+la_data_in[30] |la_data_in[30]
+la_data_in[29] |la_data_in[29]
+la_data_in[28] |la_data_in[28]
+la_data_in[27] |la_data_in[27]
+la_data_in[26] |la_data_in[26]
+la_data_in[25] |la_data_in[25]
+la_data_in[24] |la_data_in[24]
+la_data_in[23] |la_data_in[23]
+la_data_in[22] |la_data_in[22]
+la_data_in[21] |la_data_in[21]
+la_data_in[20] |la_data_in[20]
+la_data_in[19] |la_data_in[19]
+la_data_in[18] |la_data_in[18]
+la_data_in[17] |la_data_in[17]
+la_data_in[16] |la_data_in[16]
+la_data_in[15] |la_data_in[15]
+la_data_in[14] |la_data_in[14]
+la_data_in[13] |la_data_in[13]
+la_data_in[12] |la_data_in[12]
+la_data_in[11] |la_data_in[11]
+la_data_in[10] |la_data_in[10]
+la_data_in[9] |la_data_in[9]
+la_data_in[8] |la_data_in[8]
+la_data_in[7] |la_data_in[7]
+la_data_in[6] |la_data_in[6]
+la_data_in[5] |la_data_in[5]
+la_data_in[4] |la_data_in[4]
+la_data_in[3] |la_data_in[3]
+la_data_in[2] |la_data_in[2]
+la_data_in[1] |la_data_in[1]
+la_data_in[0] |la_data_in[0]
+la_data_out[127] |la_data_out[127]
+la_data_out[126] |la_data_out[126]
+la_data_out[125] |la_data_out[125]
+la_data_out[124] |la_data_out[124]
+la_data_out[123] |la_data_out[123]
+la_data_out[122] |la_data_out[122]
+la_data_out[121] |la_data_out[121]
+la_data_out[120] |la_data_out[120]
+la_data_out[119] |la_data_out[119]
+la_data_out[118] |la_data_out[118]
+la_data_out[117] |la_data_out[117]
+la_data_out[116] |la_data_out[116]
+la_data_out[115] |la_data_out[115]
+la_data_out[114] |la_data_out[114]
+la_data_out[113] |la_data_out[113]
+la_data_out[112] |la_data_out[112]
+la_data_out[111] |la_data_out[111]
+la_data_out[110] |la_data_out[110]
+la_data_out[109] |la_data_out[109]
+la_data_out[108] |la_data_out[108]
+la_data_out[107] |la_data_out[107]
+la_data_out[106] |la_data_out[106]
+la_data_out[105] |la_data_out[105]
+la_data_out[104] |la_data_out[104]
+la_data_out[103] |la_data_out[103]
+la_data_out[102] |la_data_out[102]
+la_data_out[101] |la_data_out[101]
+la_data_out[100] |la_data_out[100]
+la_data_out[99] |la_data_out[99]
+la_data_out[98] |la_data_out[98]
+la_data_out[97] |la_data_out[97]
+la_data_out[96] |la_data_out[96]
+la_data_out[95] |la_data_out[95]
+la_data_out[94] |la_data_out[94]
+la_data_out[93] |la_data_out[93]
+la_data_out[92] |la_data_out[92]
+la_data_out[91] |la_data_out[91]
+la_data_out[90] |la_data_out[90]
+la_data_out[89] |la_data_out[89]
+la_data_out[88] |la_data_out[88]
+la_data_out[87] |la_data_out[87]
+la_data_out[86] |la_data_out[86]
+la_data_out[85] |la_data_out[85]
+la_data_out[84] |la_data_out[84]
+la_data_out[83] |la_data_out[83]
+la_data_out[82] |la_data_out[82]
+la_data_out[81] |la_data_out[81]
+la_data_out[80] |la_data_out[80]
+la_data_out[79] |la_data_out[79]
+la_data_out[78] |la_data_out[78]
+la_data_out[77] |la_data_out[77]
+la_data_out[76] |la_data_out[76]
+la_data_out[75] |la_data_out[75]
+la_data_out[74] |la_data_out[74]
+la_data_out[73] |la_data_out[73]
+la_data_out[72] |la_data_out[72]
+la_data_out[71] |la_data_out[71]
+la_data_out[70] |la_data_out[70]
+la_data_out[69] |la_data_out[69]
+la_data_out[68] |la_data_out[68]
+la_data_out[67] |la_data_out[67]
+la_data_out[66] |la_data_out[66]
+la_data_out[65] |la_data_out[65]
+la_data_out[64] |la_data_out[64]
+la_data_out[63] |la_data_out[63]
+la_data_out[62] |la_data_out[62]
+la_data_out[61] |la_data_out[61]
+la_data_out[60] |la_data_out[60]
+la_data_out[59] |la_data_out[59]
+la_data_out[58] |la_data_out[58]
+la_data_out[57] |la_data_out[57]
+la_data_out[56] |la_data_out[56]
+la_data_out[55] |la_data_out[55]
+la_data_out[54] |la_data_out[54]
+la_data_out[53] |la_data_out[53]
+la_data_out[52] |la_data_out[52]
+la_data_out[51] |la_data_out[51]
+la_data_out[50] |la_data_out[50]
+la_data_out[49] |la_data_out[49]
+la_data_out[48] |la_data_out[48]
+la_data_out[47] |la_data_out[47]
+la_data_out[46] |la_data_out[46]
+la_data_out[45] |la_data_out[45]
+la_data_out[44] |la_data_out[44]
+la_data_out[43] |la_data_out[43]
+la_data_out[42] |la_data_out[42]
+la_data_out[41] |la_data_out[41]
+la_data_out[40] |la_data_out[40]
+la_data_out[39] |la_data_out[39]
+la_data_out[38] |la_data_out[38]
+la_data_out[37] |la_data_out[37]
+la_data_out[36] |la_data_out[36]
+la_data_out[35] |la_data_out[35]
+la_data_out[34] |la_data_out[34]
+la_data_out[33] |la_data_out[33]
+la_data_out[32] |la_data_out[32]
+la_data_out[31] |la_data_out[31]
+la_data_out[30] |la_data_out[30]
+la_data_out[29] |la_data_out[29]
+la_data_out[28] |la_data_out[28]
+la_data_out[27] |la_data_out[27]
+la_data_out[26] |la_data_out[26]
+la_data_out[25] |la_data_out[25]
+la_data_out[24] |la_data_out[24]
+la_data_out[23] |la_data_out[23]
+la_data_out[22] |la_data_out[22]
+la_data_out[21] |la_data_out[21]
+la_data_out[20] |la_data_out[20]
+la_data_out[19] |la_data_out[19]
+la_data_out[18] |la_data_out[18]
+la_data_out[17] |la_data_out[17]
+la_data_out[16] |la_data_out[16]
+la_data_out[15] |la_data_out[15]
+la_data_out[14] |la_data_out[14]
+la_data_out[13] |la_data_out[13]
+la_data_out[12] |la_data_out[12]
+la_data_out[11] |la_data_out[11]
+la_data_out[10] |la_data_out[10]
+la_data_out[9] |la_data_out[9]
+la_data_out[8] |la_data_out[8]
+la_data_out[7] |la_data_out[7]
+la_data_out[6] |la_data_out[6]
+la_data_out[5] |la_data_out[5]
+la_data_out[4] |la_data_out[4]
+la_data_out[3] |la_data_out[3]
+la_data_out[2] |la_data_out[2]
+la_data_out[1] |la_data_out[1]
+la_data_out[0] |la_data_out[0]
+io_in[26] |io_in[26]
+io_in[25] |io_in[25]
+io_in[24] |io_in[24]
+io_in[23] |io_in[23]
+io_in[22] |io_in[22]
+io_in[21] |io_in[21]
+io_in[20] |io_in[20]
+io_in[19] |io_in[19]
+io_in[18] |io_in[18]
+io_in[17] |io_in[17]
+io_in[16] |io_in[16]
+io_in[15] |io_in[15]
+io_in[14] |io_in[14]
+io_in[13] |io_in[13]
+io_in[12] |io_in[12]
+io_in[11] |io_in[11]
+io_in[10] |io_in[10]
+io_in[9] |io_in[9]
+io_in[8] |io_in[8]
+io_in[7] |io_in[7]
+io_in[6] |io_in[6]
+io_in[5] |io_in[5]
+io_in[4] |io_in[4]
+io_in[3] |io_in[3]
+io_in[2] |io_in[2]
+io_in[1] |io_in[1]
+io_in[0] |io_in[0]
+io_in_3v3[26] |io_in_3v3[26]
+io_in_3v3[25] |io_in_3v3[25]
+io_in_3v3[24] |io_in_3v3[24]
+io_in_3v3[23] |io_in_3v3[23]
+io_in_3v3[22] |io_in_3v3[22]
+io_in_3v3[21] |io_in_3v3[21]
+io_in_3v3[20] |io_in_3v3[20]
+io_in_3v3[19] |io_in_3v3[19]
+io_in_3v3[18] |io_in_3v3[18]
+io_in_3v3[17] |io_in_3v3[17]
+io_in_3v3[16] |io_in_3v3[16]
+io_in_3v3[15] |io_in_3v3[15]
+io_in_3v3[14] |io_in_3v3[14]
+io_in_3v3[13] |io_in_3v3[13]
+io_in_3v3[12] |io_in_3v3[12]
+io_in_3v3[11] |io_in_3v3[11]
+io_in_3v3[10] |io_in_3v3[10]
+io_in_3v3[9] |io_in_3v3[9]
+io_in_3v3[8] |io_in_3v3[8]
+io_in_3v3[7] |io_in_3v3[7]
+io_in_3v3[6] |io_in_3v3[6]
+io_in_3v3[5] |io_in_3v3[5]
+io_in_3v3[4] |io_in_3v3[4]
+io_in_3v3[3] |io_in_3v3[3]
+io_in_3v3[2] |io_in_3v3[2]
+io_in_3v3[1] |io_in_3v3[1]
+io_in_3v3[0] |io_in_3v3[0]
+user_clock2 |user_clock2
+io_out[26] |io_out[26]
+io_out[25] |io_out[25]
+io_out[24] |io_out[24]
+io_out[23] |io_out[23]
+io_out[22] |io_out[22]
+io_out[21] |io_out[21]
+io_out[20] |io_out[20]
+io_out[19] |io_out[19]
+io_out[18] |io_out[18]
+io_out[17] |io_out[17]
+io_out[16] |io_out[16]
+io_out[15] |io_out[15]
+io_out[14] |io_out[14]
+io_out[13] |io_out[13]
+io_out[12] |io_out[12]
+io_out[11] |io_out[11]
+io_out[10] |io_out[10]
+io_out[9] |io_out[9]
+io_out[8] |io_out[8]
+io_out[7] |io_out[7]
+io_out[6] |io_out[6]
+io_out[5] |io_out[5]
+io_out[4] |io_out[4]
+io_out[3] |io_out[3]
+io_out[2] |io_out[2]
+io_out[1] |io_out[1]
+io_out[0] |io_out[0]
+io_oeb[26] |io_oeb[26]
+io_oeb[25] |io_oeb[25]
+io_oeb[24] |io_oeb[24]
+io_oeb[23] |io_oeb[23]
+io_oeb[22] |io_oeb[22]
+io_oeb[21] |io_oeb[21]
+io_oeb[20] |io_oeb[20]
+io_oeb[19] |io_oeb[19]
+io_oeb[18] |io_oeb[18]
+io_oeb[17] |io_oeb[17]
+io_oeb[16] |io_oeb[16]
+io_oeb[15] |io_oeb[15]
+io_oeb[14] |io_oeb[14]
+io_oeb[13] |io_oeb[13]
+io_oeb[12] |io_oeb[12]
+io_oeb[11] |io_oeb[11]
+io_oeb[10] |io_oeb[10]
+io_oeb[9] |io_oeb[9]
+io_oeb[8] |io_oeb[8]
+io_oeb[7] |io_oeb[7]
+io_oeb[6] |io_oeb[6]
+io_oeb[5] |io_oeb[5]
+io_oeb[4] |io_oeb[4]
+io_oeb[3] |io_oeb[3]
+io_oeb[2] |io_oeb[2]
+io_oeb[1] |io_oeb[1]
+io_oeb[0] |io_oeb[0]
+gpio_analog[17] |gpio_analog[17]
+gpio_analog[16] |gpio_analog[16]
+gpio_analog[15] |gpio_analog[15]
+gpio_analog[14] |gpio_analog[14]
+gpio_analog[13] |gpio_analog[13]
+gpio_analog[12] |gpio_analog[12]
+gpio_analog[11] |gpio_analog[11]
+gpio_analog[10] |gpio_analog[10]
+gpio_analog[9] |gpio_analog[9]
+gpio_analog[8] |gpio_analog[8]
+gpio_analog[7] |gpio_analog[7]
+gpio_analog[6] |gpio_analog[6]
+gpio_analog[5] |gpio_analog[5]
+gpio_analog[4] |gpio_analog[4]
+gpio_analog[3] |gpio_analog[3]
+gpio_analog[2] |gpio_analog[2]
+gpio_analog[1] |gpio_analog[1]
+gpio_analog[0] |gpio_analog[0]
+gpio_noesd[17] |gpio_noesd[17]
+gpio_noesd[16] |gpio_noesd[16]
+gpio_noesd[15] |gpio_noesd[15]
+gpio_noesd[14] |gpio_noesd[14]
+gpio_noesd[13] |gpio_noesd[13]
+gpio_noesd[12] |gpio_noesd[12]
+gpio_noesd[11] |gpio_noesd[11]
+gpio_noesd[10] |gpio_noesd[10]
+gpio_noesd[9] |gpio_noesd[9]
+gpio_noesd[8] |gpio_noesd[8]
+gpio_noesd[7] |gpio_noesd[7]
+gpio_noesd[6] |gpio_noesd[6]
+gpio_noesd[5] |gpio_noesd[5]
+gpio_noesd[4] |gpio_noesd[4]
+gpio_noesd[3] |gpio_noesd[3]
+gpio_noesd[2] |gpio_noesd[2]
+gpio_noesd[1] |gpio_noesd[1]
+gpio_noesd[0] |gpio_noesd[0]
+io_analog[6] |io_analog[6]
+io_analog[5] |io_analog[5]
+io_analog[4] |io_analog[4]
+io_analog[0] |io_analog[0]
+io_clamp_high[2] |io_clamp_high[2]
+io_clamp_high[1] |io_clamp_high[1]
+io_clamp_high[0] |io_clamp_high[0]
+io_clamp_low[2] |io_clamp_low[2]
+io_clamp_low[1] |io_clamp_low[1]
+io_clamp_low[0] |io_clamp_low[0]
+user_irq[2] |user_irq[2]
+user_irq[1] |user_irq[1]
+user_irq[0] |user_irq[0]
+la_oenb[127] |la_oenb[127]
+la_oenb[126] |la_oenb[126]
+la_oenb[125] |la_oenb[125]
+la_oenb[124] |la_oenb[124]
+la_oenb[123] |la_oenb[123]
+la_oenb[122] |la_oenb[122]
+la_oenb[121] |la_oenb[121]
+la_oenb[120] |la_oenb[120]
+la_oenb[119] |la_oenb[119]
+la_oenb[118] |la_oenb[118]
+la_oenb[117] |la_oenb[117]
+la_oenb[116] |la_oenb[116]
+la_oenb[115] |la_oenb[115]
+la_oenb[114] |la_oenb[114]
+la_oenb[113] |la_oenb[113]
+la_oenb[112] |la_oenb[112]
+la_oenb[111] |la_oenb[111]
+la_oenb[110] |la_oenb[110]
+la_oenb[109] |la_oenb[109]
+la_oenb[108] |la_oenb[108]
+la_oenb[107] |la_oenb[107]
+la_oenb[106] |la_oenb[106]
+la_oenb[105] |la_oenb[105]
+la_oenb[104] |la_oenb[104]
+la_oenb[103] |la_oenb[103]
+la_oenb[102] |la_oenb[102]
+la_oenb[101] |la_oenb[101]
+la_oenb[100] |la_oenb[100]
+la_oenb[99] |la_oenb[99]
+la_oenb[98] |la_oenb[98]
+la_oenb[97] |la_oenb[97]
+la_oenb[96] |la_oenb[96]
+la_oenb[95] |la_oenb[95]
+la_oenb[94] |la_oenb[94]
+la_oenb[93] |la_oenb[93]
+la_oenb[92] |la_oenb[92]
+la_oenb[91] |la_oenb[91]
+la_oenb[90] |la_oenb[90]
+la_oenb[89] |la_oenb[89]
+la_oenb[88] |la_oenb[88]
+la_oenb[87] |la_oenb[87]
+la_oenb[86] |la_oenb[86]
+la_oenb[85] |la_oenb[85]
+la_oenb[84] |la_oenb[84]
+la_oenb[83] |la_oenb[83]
+la_oenb[82] |la_oenb[82]
+la_oenb[81] |la_oenb[81]
+la_oenb[80] |la_oenb[80]
+la_oenb[79] |la_oenb[79]
+la_oenb[78] |la_oenb[78]
+la_oenb[77] |la_oenb[77]
+la_oenb[76] |la_oenb[76]
+la_oenb[75] |la_oenb[75]
+la_oenb[74] |la_oenb[74]
+la_oenb[73] |la_oenb[73]
+la_oenb[72] |la_oenb[72]
+la_oenb[71] |la_oenb[71]
+la_oenb[70] |la_oenb[70]
+la_oenb[69] |la_oenb[69]
+la_oenb[68] |la_oenb[68]
+la_oenb[67] |la_oenb[67]
+la_oenb[66] |la_oenb[66]
+la_oenb[65] |la_oenb[65]
+la_oenb[64] |la_oenb[64]
+la_oenb[63] |la_oenb[63]
+la_oenb[62] |la_oenb[62]
+la_oenb[61] |la_oenb[61]
+la_oenb[60] |la_oenb[60]
+la_oenb[59] |la_oenb[59]
+la_oenb[58] |la_oenb[58]
+la_oenb[57] |la_oenb[57]
+la_oenb[56] |la_oenb[56]
+la_oenb[55] |la_oenb[55]
+la_oenb[54] |la_oenb[54]
+la_oenb[53] |la_oenb[53]
+la_oenb[52] |la_oenb[52]
+la_oenb[51] |la_oenb[51]
+la_oenb[50] |la_oenb[50]
+la_oenb[49] |la_oenb[49]
+la_oenb[48] |la_oenb[48]
+la_oenb[47] |la_oenb[47]
+la_oenb[46] |la_oenb[46]
+la_oenb[45] |la_oenb[45]
+la_oenb[44] |la_oenb[44]
+la_oenb[43] |la_oenb[43]
+la_oenb[42] |la_oenb[42]
+la_oenb[41] |la_oenb[41]
+la_oenb[40] |la_oenb[40]
+la_oenb[39] |la_oenb[39]
+la_oenb[38] |la_oenb[38]
+la_oenb[37] |la_oenb[37]
+la_oenb[36] |la_oenb[36]
+la_oenb[35] |la_oenb[35]
+la_oenb[34] |la_oenb[34]
+la_oenb[33] |la_oenb[33]
+la_oenb[32] |la_oenb[32]
+la_oenb[31] |la_oenb[31]
+la_oenb[30] |la_oenb[30]
+la_oenb[29] |la_oenb[29]
+la_oenb[28] |la_oenb[28]
+la_oenb[27] |la_oenb[27]
+la_oenb[26] |la_oenb[26]
+la_oenb[25] |la_oenb[25]
+la_oenb[24] |la_oenb[24]
+la_oenb[23] |la_oenb[23]
+la_oenb[22] |la_oenb[22]
+la_oenb[21] |la_oenb[21]
+la_oenb[20] |la_oenb[20]
+la_oenb[19] |la_oenb[19]
+la_oenb[18] |la_oenb[18]
+la_oenb[17] |la_oenb[17]
+la_oenb[16] |la_oenb[16]
+la_oenb[15] |la_oenb[15]
+la_oenb[14] |la_oenb[14]
+la_oenb[13] |la_oenb[13]
+la_oenb[12] |la_oenb[12]
+la_oenb[11] |la_oenb[11]
+la_oenb[10] |la_oenb[10]
+la_oenb[9] |la_oenb[9]
+la_oenb[8] |la_oenb[8]
+la_oenb[7] |la_oenb[7]
+la_oenb[6] |la_oenb[6]
+la_oenb[5] |la_oenb[5]
+la_oenb[4] |la_oenb[4]
+la_oenb[3] |la_oenb[3]
+la_oenb[2] |la_oenb[2]
+la_oenb[1] |la_oenb[1]
+la_oenb[0] |la_oenb[0]
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes user_analog_project_wrapper and user_analog_project_wrapper are equivalent.
Circuits match uniquely.
diff --git a/netgen/det.out b/netgen/det.out
index 86633eb..6cf87e6 100644
--- a/netgen/det.out
+++ b/netgen/det.out
@@ -52,7 +52,7 @@
Circuit 1: detector |Circuit 2: detV2
-------------------------------------------|-------------------------------------------
do |do
-gnd |GND
+gnd |gnd
din |din
dB |db
---------------------------------------------------------------------------------------
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
index 95e25ff..9798fc6 100644
--- a/netgen/user_analog_project_wrapper.spice
+++ b/netgen/user_analog_project_wrapper.spice
@@ -1,137 +1,149 @@
-* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
-
-.subckt sky130_fd_pr__res_xhigh_po_0p35_HDW2JU a_n35_1860# a_n35_n2292# VSUBS
-X0 a_n35_n2292# a_n35_1860# VSUBS sky130_fd_pr__res_xhigh_po w=350000u l=1.86e+07u
+** sch_path:
+*+ /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/user_analog_project_wrapper.sch
+.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
++ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
++ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
++ wbs_dat_i[22] wbs_dat_i[21] wbs_dat_i[20] wbs_dat_i[19] wbs_dat_i[18] wbs_dat_i[17] wbs_dat_i[16] wbs_dat_i[15]
++ wbs_dat_i[14] wbs_dat_i[13] wbs_dat_i[12] wbs_dat_i[11] wbs_dat_i[10] wbs_dat_i[9] wbs_dat_i[8] wbs_dat_i[7]
++ wbs_dat_i[6] wbs_dat_i[5] wbs_dat_i[4] wbs_dat_i[3] wbs_dat_i[2] wbs_dat_i[1] wbs_dat_i[0] wbs_adr_i[31]
++ wbs_adr_i[30] wbs_adr_i[29] wbs_adr_i[28] wbs_adr_i[27] wbs_adr_i[26] wbs_adr_i[25] wbs_adr_i[24] wbs_adr_i[23]
++ wbs_adr_i[22] wbs_adr_i[21] wbs_adr_i[20] wbs_adr_i[19] wbs_adr_i[18] wbs_adr_i[17] wbs_adr_i[16] wbs_adr_i[15]
++ wbs_adr_i[14] wbs_adr_i[13] wbs_adr_i[12] wbs_adr_i[11] wbs_adr_i[10] wbs_adr_i[9] wbs_adr_i[8] wbs_adr_i[7]
++ wbs_adr_i[6] wbs_adr_i[5] wbs_adr_i[4] wbs_adr_i[3] wbs_adr_i[2] wbs_adr_i[1] wbs_adr_i[0] wbs_ack_o
++ wbs_dat_o[31] wbs_dat_o[30] wbs_dat_o[29] wbs_dat_o[28] wbs_dat_o[27] wbs_dat_o[26] wbs_dat_o[25] wbs_dat_o[24]
++ wbs_dat_o[23] wbs_dat_o[22] wbs_dat_o[21] wbs_dat_o[20] wbs_dat_o[19] wbs_dat_o[18] wbs_dat_o[17] wbs_dat_o[16]
++ wbs_dat_o[15] wbs_dat_o[14] wbs_dat_o[13] wbs_dat_o[12] wbs_dat_o[11] wbs_dat_o[10] wbs_dat_o[9] wbs_dat_o[8]
++ wbs_dat_o[7] wbs_dat_o[6] wbs_dat_o[5] wbs_dat_o[4] wbs_dat_o[3] wbs_dat_o[2] wbs_dat_o[1] wbs_dat_o[0]
++ la_data_in[127] la_data_in[126] la_data_in[125] la_data_in[124] la_data_in[123] la_data_in[122] la_data_in[121]
++ la_data_in[120] la_data_in[119] la_data_in[118] la_data_in[117] la_data_in[116] la_data_in[115] la_data_in[114]
++ la_data_in[113] la_data_in[112] la_data_in[111] la_data_in[110] la_data_in[109] la_data_in[108] la_data_in[107]
++ la_data_in[106] la_data_in[105] la_data_in[104] la_data_in[103] la_data_in[102] la_data_in[101] la_data_in[100]
++ la_data_in[99] la_data_in[98] la_data_in[97] la_data_in[96] la_data_in[95] la_data_in[94] la_data_in[93]
++ la_data_in[92] la_data_in[91] la_data_in[90] la_data_in[89] la_data_in[88] la_data_in[87] la_data_in[86]
++ la_data_in[85] la_data_in[84] la_data_in[83] la_data_in[82] la_data_in[81] la_data_in[80] la_data_in[79]
++ la_data_in[78] la_data_in[77] la_data_in[76] la_data_in[75] la_data_in[74] la_data_in[73] la_data_in[72]
++ la_data_in[71] la_data_in[70] la_data_in[69] la_data_in[68] la_data_in[67] la_data_in[66] la_data_in[65]
++ la_data_in[64] la_data_in[63] la_data_in[62] la_data_in[61] la_data_in[60] la_data_in[59] la_data_in[58]
++ la_data_in[57] la_data_in[56] la_data_in[55] la_data_in[54] la_data_in[53] la_data_in[52] la_data_in[51]
++ la_data_in[50] la_data_in[49] la_data_in[48] la_data_in[47] la_data_in[46] la_data_in[45] la_data_in[44]
++ la_data_in[43] la_data_in[42] la_data_in[41] la_data_in[40] la_data_in[39] la_data_in[38] la_data_in[37]
++ la_data_in[36] la_data_in[35] la_data_in[34] la_data_in[33] la_data_in[32] la_data_in[31] la_data_in[30]
++ la_data_in[29] la_data_in[28] la_data_in[27] la_data_in[26] la_data_in[25] la_data_in[24] la_data_in[23]
++ la_data_in[22] la_data_in[21] la_data_in[20] la_data_in[19] la_data_in[18] la_data_in[17] la_data_in[16]
++ la_data_in[15] la_data_in[14] la_data_in[13] la_data_in[12] la_data_in[11] la_data_in[10] la_data_in[9]
++ la_data_in[8] la_data_in[7] la_data_in[6] la_data_in[5] la_data_in[4] la_data_in[3] la_data_in[2] la_data_in[1]
++ la_data_in[0] la_data_out[127] la_data_out[126] la_data_out[125] la_data_out[124] la_data_out[123]
++ la_data_out[122] la_data_out[121] la_data_out[120] la_data_out[119] la_data_out[118] la_data_out[117]
++ la_data_out[116] la_data_out[115] la_data_out[114] la_data_out[113] la_data_out[112] la_data_out[111]
++ la_data_out[110] la_data_out[109] la_data_out[108] la_data_out[107] la_data_out[106] la_data_out[105]
++ la_data_out[104] la_data_out[103] la_data_out[102] la_data_out[101] la_data_out[100] la_data_out[99] la_data_out[98]
++ la_data_out[97] la_data_out[96] la_data_out[95] la_data_out[94] la_data_out[93] la_data_out[92] la_data_out[91]
++ la_data_out[90] la_data_out[89] la_data_out[88] la_data_out[87] la_data_out[86] la_data_out[85] la_data_out[84]
++ la_data_out[83] la_data_out[82] la_data_out[81] la_data_out[80] la_data_out[79] la_data_out[78] la_data_out[77]
++ la_data_out[76] la_data_out[75] la_data_out[74] la_data_out[73] la_data_out[72] la_data_out[71] la_data_out[70]
++ la_data_out[69] la_data_out[68] la_data_out[67] la_data_out[66] la_data_out[65] la_data_out[64] la_data_out[63]
++ la_data_out[62] la_data_out[61] la_data_out[60] la_data_out[59] la_data_out[58] la_data_out[57] la_data_out[56]
++ la_data_out[55] la_data_out[54] la_data_out[53] la_data_out[52] la_data_out[51] la_data_out[50] la_data_out[49]
++ la_data_out[48] la_data_out[47] la_data_out[46] la_data_out[45] la_data_out[44] la_data_out[43] la_data_out[42]
++ la_data_out[41] la_data_out[40] la_data_out[39] la_data_out[38] la_data_out[37] la_data_out[36] la_data_out[35]
++ la_data_out[34] la_data_out[33] la_data_out[32] la_data_out[31] la_data_out[30] la_data_out[29] la_data_out[28]
++ la_data_out[27] la_data_out[26] la_data_out[25] la_data_out[24] la_data_out[23] la_data_out[22] la_data_out[21]
++ la_data_out[20] la_data_out[19] la_data_out[18] la_data_out[17] la_data_out[16] la_data_out[15] la_data_out[14]
++ la_data_out[13] la_data_out[12] la_data_out[11] la_data_out[10] la_data_out[9] la_data_out[8] la_data_out[7]
++ la_data_out[6] la_data_out[5] la_data_out[4] la_data_out[3] la_data_out[2] la_data_out[1] la_data_out[0] io_in[26]
++ io_in[25] io_in[24] io_in[23] io_in[22] io_in[21] io_in[20] io_in[19] io_in[18] io_in[17] io_in[16] io_in[15]
++ io_in[14] io_in[13] io_in[12] io_in[11] io_in[10] io_in[9] io_in[8] io_in[7] io_in[6] io_in[5] io_in[4]
++ io_in[3] io_in[2] io_in[1] io_in[0] io_in_3v3[26] io_in_3v3[25] io_in_3v3[24] io_in_3v3[23] io_in_3v3[22]
++ io_in_3v3[21] io_in_3v3[20] io_in_3v3[19] io_in_3v3[18] io_in_3v3[17] io_in_3v3[16] io_in_3v3[15] io_in_3v3[14]
++ io_in_3v3[13] io_in_3v3[12] io_in_3v3[11] io_in_3v3[10] io_in_3v3[9] io_in_3v3[8] io_in_3v3[7] io_in_3v3[6]
++ io_in_3v3[5] io_in_3v3[4] io_in_3v3[3] io_in_3v3[2] io_in_3v3[1] io_in_3v3[0] user_clock2 io_out[26] io_out[25]
++ io_out[24] io_out[23] io_out[22] io_out[21] io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15]
++ io_out[14] io_out[13] io_out[12] io_out[11] io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5]
++ io_out[4] io_out[3] io_out[2] io_out[1] io_out[0] io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22]
++ io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17] io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12]
++ io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7] io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2]
++ io_oeb[1] io_oeb[0] gpio_analog[17] gpio_analog[16] gpio_analog[15] gpio_analog[14] gpio_analog[13]
++ gpio_analog[12] gpio_analog[11] gpio_analog[10] gpio_analog[9] gpio_analog[8] gpio_analog[7] gpio_analog[6]
++ gpio_analog[5] gpio_analog[4] gpio_analog[3] gpio_analog[2] gpio_analog[1] gpio_analog[0] gpio_noesd[17]
++ gpio_noesd[16] gpio_noesd[15] gpio_noesd[14] gpio_noesd[13] gpio_noesd[12] gpio_noesd[11] gpio_noesd[10]
++ gpio_noesd[9] gpio_noesd[8] gpio_noesd[7] gpio_noesd[6] gpio_noesd[5] gpio_noesd[4] gpio_noesd[3] gpio_noesd[2]
++ gpio_noesd[1] gpio_noesd[0] io_analog[10] io_analog[9] io_analog[8] io_analog[7] io_analog[6] io_analog[5]
++ io_analog[4] io_analog[3] io_analog[2] io_analog[1] io_analog[0] io_clamp_high[2] io_clamp_high[1]
++ io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_irq[2] user_irq[1] user_irq[0] la_oenb[127]
++ la_oenb[126] la_oenb[125] la_oenb[124] la_oenb[123] la_oenb[122] la_oenb[121] la_oenb[120] la_oenb[119]
++ la_oenb[118] la_oenb[117] la_oenb[116] la_oenb[115] la_oenb[114] la_oenb[113] la_oenb[112] la_oenb[111]
++ la_oenb[110] la_oenb[109] la_oenb[108] la_oenb[107] la_oenb[106] la_oenb[105] la_oenb[104] la_oenb[103]
++ la_oenb[102] la_oenb[101] la_oenb[100] la_oenb[99] la_oenb[98] la_oenb[97] la_oenb[96] la_oenb[95] la_oenb[94]
++ la_oenb[93] la_oenb[92] la_oenb[91] la_oenb[90] la_oenb[89] la_oenb[88] la_oenb[87] la_oenb[86] la_oenb[85]
++ la_oenb[84] la_oenb[83] la_oenb[82] la_oenb[81] la_oenb[80] la_oenb[79] la_oenb[78] la_oenb[77] la_oenb[76]
++ la_oenb[75] la_oenb[74] la_oenb[73] la_oenb[72] la_oenb[71] la_oenb[70] la_oenb[69] la_oenb[68] la_oenb[67]
++ la_oenb[66] la_oenb[65] la_oenb[64] la_oenb[63] la_oenb[62] la_oenb[61] la_oenb[60] la_oenb[59] la_oenb[58]
++ la_oenb[57] la_oenb[56] la_oenb[55] la_oenb[54] la_oenb[53] la_oenb[52] la_oenb[51] la_oenb[50] la_oenb[49]
++ la_oenb[48] la_oenb[47] la_oenb[46] la_oenb[45] la_oenb[44] la_oenb[43] la_oenb[42] la_oenb[41] la_oenb[40]
++ la_oenb[39] la_oenb[38] la_oenb[37] la_oenb[36] la_oenb[35] la_oenb[34] la_oenb[33] la_oenb[32] la_oenb[31]
++ la_oenb[30] la_oenb[29] la_oenb[28] la_oenb[27] la_oenb[26] la_oenb[25] la_oenb[24] la_oenb[23] la_oenb[22]
++ la_oenb[21] la_oenb[20] la_oenb[19] la_oenb[18] la_oenb[17] la_oenb[16] la_oenb[15] la_oenb[14] la_oenb[13]
++ la_oenb[12] la_oenb[11] la_oenb[10] la_oenb[9] la_oenb[8] la_oenb[7] la_oenb[6] la_oenb[5] la_oenb[4]
++ la_oenb[3] la_oenb[2] la_oenb[1] la_oenb[0]
+*.PININFO vdda1:B vdda2:B vssa1:B vssa2:B vccd1:B vccd2:B vssd1:B vssd2:B wb_clk_i:I wb_rst_i:I
+*+ wbs_stb_i:I wbs_cyc_i:I wbs_we_i:I wbs_sel_i[3:0]:I wbs_dat_i[31:0]:I wbs_adr_i[31:0]:I wbs_ack_o:O
+*+ wbs_dat_o[31:0]:O la_data_in[127:0]:I la_data_out[127:0]:O io_in[26:0]:I io_in_3v3[26:0]:I user_clock2:I
+*+ io_out[26:0]:O io_oeb[26:0]:O gpio_analog[17:0]:B gpio_noesd[17:0]:B io_analog[10:0]:B io_clamp_high[2:0]:B
+*+ io_clamp_low[2:0]:B user_irq[2:0]:O la_oenb[127:0]:I
+Xdet io_analog[3] io_analog[2] io_analog[1] vssa1 detector
+X1 vccd1 io_analog[7] io_analog[10] vssa2 io_analog[8] io_analog[9] vccd2 OTA
.ends
-.subckt detV2 din db do gnd
-XR bot_cin do gnd sky130_fd_pr__res_xhigh_po_0p35_HDW2JU
-X0 din bot_cin sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
-X1 do m2_n40996_n4008# sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
-X2 gnd db bot_cin gnd sky130_fd_pr__nfet_01v8 w=2.25e+07u l=150000u
+* expanding symbol: detector.sym # of pins=4
+** sym_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/detector.sym
+** sch_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/detector.sch
+.subckt detector din do dB gnd
+*.PININFO din:I dB:I do:O gnd:I
+XM1 net1 dB gnd gnd sky130_fd_pr__nfet_01v8 L=0.15 W=22.5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XC1 do gnd sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
+XC2 din net1 sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
+XR2 net1 do gnd sky130_fd_pr__res_xhigh_po W=0.35 L=18.6 mult=1 m=1
.ends
-.subckt otaV5 Inp Inn Vout Ib cltop Vp Vn
-X0 Vn a_6890_1010# a_6890_750# Vn sky130_fd_pr__nfet_01v8 w=800000u l=4e+06u
-X1 a_7570_1796# Inp a_6890_1010# Vp sky130_fd_pr__pfet_01v8 w=1.7e+06u l=2e+06u
-X2 Vn a_8070_1014# a_8070_1014# Vn sky130_fd_pr__nfet_01v8 w=800000u l=4e+06u
-X3 Vn a_6890_1010# a_6890_1010# Vn sky130_fd_pr__nfet_01v8 w=800000u l=4e+06u
-X4 Vp a_6890_750# Vout Vp sky130_fd_pr__pfet_01v8 w=1.4e+06u l=1e+06u
-X5 Vp Ib a_7570_1796# Vp sky130_fd_pr__pfet_01v8 w=5e+06u l=4e+06u
-X6 cltop Vout sky130_fd_pr__cap_mim_m3_1 l=3.2e+07u w=3.2e+07u
-X7 Vn a_8070_1014# Vout Vn sky130_fd_pr__nfet_01v8 w=800000u l=4e+06u
-X8 Vp a_6890_750# a_6890_750# Vp sky130_fd_pr__pfet_01v8 w=1.4e+06u l=1e+06u
-X9 a_8070_1014# Inn a_7570_1796# Vp sky130_fd_pr__pfet_01v8 w=1.7e+06u l=2e+06u
-X10 Vp Ib Ib Vp sky130_fd_pr__pfet_01v8 w=5e+06u l=4e+06u
+
+* expanding symbol: OTA.sym # of pins=7
+** sym_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/OTA.sym
+** sch_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/OTA.sch
+.subckt OTA Vp vout ib cltop inn inp Vn
+*.PININFO inp:I inn:I vout:O Vp:B Vn:B ib:I cltop:O
+XM7 net1 net1 Vp Vp sky130_fd_pr__pfet_01v8 L=1 W=1.4 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM8 vout net1 Vp Vp sky130_fd_pr__pfet_01v8 L=1 W=1.4 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM9 ib ib Vp Vp sky130_fd_pr__pfet_01v8 L=4 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM10 net4 ib Vp Vp sky130_fd_pr__pfet_01v8 L=4 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM1 net2 inp net4 Vp sky130_fd_pr__pfet_01v8 L=2 W=1.7 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM2 net3 inn net4 Vp sky130_fd_pr__pfet_01v8 L=2 W=1.7 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM3 net2 net2 Vn Vn sky130_fd_pr__nfet_01v8 L=4 W=0.8 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM4 net3 net3 Vn Vn sky130_fd_pr__nfet_01v8 L=4 W=0.8 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM6 vout net3 Vn Vn sky130_fd_pr__nfet_01v8 L=4 W=0.8 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM5 net1 net2 Vn Vn sky130_fd_pr__nfet_01v8 L=4 W=0.8 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XC1 cltop vout sky130_fd_pr__cap_mim_m3_1 W=32 L=32 MF=1 m=1
.ends
-.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
-+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
-+ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
-+ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
-+ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
-+ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
-+ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
-+ io_analog[1] io_analog[2] io_analog[3] io_analog[7] io_analog[8] io_analog[9] io_analog[4]
-+ io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
-+ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
-+ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
-+ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
-+ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
-+ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
-+ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
-+ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
-+ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
-+ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
-+ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
-+ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
-+ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
-+ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
-+ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
-+ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
-+ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
-+ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
-+ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
-+ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
-+ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
-+ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
-+ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
-+ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
-+ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
-+ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
-+ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
-+ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
-+ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
-+ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
-+ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
-+ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
-+ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
-+ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
-+ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
-+ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
-+ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
-+ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
-+ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
-+ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
-+ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
-+ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
-+ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
-+ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
-+ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
-+ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
-+ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
-+ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
-+ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
-+ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
-+ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
-+ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
-+ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
-+ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
-+ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
-+ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
-+ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
-+ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
-+ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
-+ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
-+ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
-+ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
-+ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
-+ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
-+ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
-+ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
-+ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
-+ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
-+ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
-+ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
-+ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
-+ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
-+ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
-+ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
-+ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
-+ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
-+ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
-+ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
-+ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
-+ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
-+ vccd1 vccd2 vdda1 vdda2 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
-+ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
-+ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
-+ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
-+ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
-+ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
-+ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
-+ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
-+ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
-+ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
-+ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
-+ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
-+ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
-+ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
-+ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
-+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
-+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
-+ wbs_stb_i wbs_we_i
-XdetV2_0 io_analog[3] io_analog[1] io_analog[2] vccd2 detV2
-XotaV5_0 io_analog[9] io_analog[8] io_analog[7] io_analog[10] vssa2 vccd2 vccd2 otaV5
-.ends
-
+.end
diff --git a/precheck_results/23_MAR_2022___16_40_33/logs/gds.info b/precheck_results/23_MAR_2022___16_40_33/logs/gds.info
new file mode 100644
index 0000000..6e6edaf
--- /dev/null
+++ b/precheck_results/23_MAR_2022___16_40_33/logs/gds.info
@@ -0,0 +1 @@
+user_analog_project_wrapper.gds: 684d08d407dd129f69dfd4a6f5abfbebcd9a7d69
\ No newline at end of file
diff --git a/precheck_results/23_MAR_2022___16_40_33/logs/pdks.info b/precheck_results/23_MAR_2022___16_40_33/logs/pdks.info
new file mode 100644
index 0000000..f6e2777
--- /dev/null
+++ b/precheck_results/23_MAR_2022___16_40_33/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 32cdb2097fd9a629c91e8ea33e1f6de08ab25946
+Skywater PDK f70d8ca46961ff92719d8870a18a076370b85f6c
\ No newline at end of file
diff --git a/precheck_results/23_MAR_2022___16_40_33/logs/precheck.log b/precheck_results/23_MAR_2022___16_40_33/logs/precheck.log
new file mode 100644
index 0000000..a25f386
--- /dev/null
+++ b/precheck_results/23_MAR_2022___16_40_33/logs/precheck.log
@@ -0,0 +1,24 @@
+2022-03-23 16:40:33 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: /home/wisla/sky130_skel/Myschematics/Receptor/receiver
+2022-03-23 16:40:33 - [INFO] - {{Project Type Info}} analog
+2022-03-23 16:40:33 - [INFO] - {{Project GDS Info}} user_analog_project_wrapper: 684d08d407dd129f69dfd4a6f5abfbebcd9a7d69
+2022-03-23 16:40:34 - [INFO] - {{Tools Info}} KLayout: v0.27.8 | Magic: v8.3.274
+2022-03-23 16:40:34 - [INFO] - {{PDKs Info}} Open PDKs: 32cdb2097fd9a629c91e8ea33e1f6de08ab25946 | Skywater PDK: f70d8ca46961ff92719d8870a18a076370b85f6c
+2022-03-23 16:40:34 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/precheck_results/23_MAR_2022___16_40_33/logs'
+2022-03-23 16:40:34 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2022-03-23 16:40:34 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 13: License
+2022-03-23 16:40:35 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/wisla/sky130_skel/Myschematics/Receptor/receiver.
+2022-03-23 16:40:35 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-03-23 16:40:36 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/wisla/sky130_skel/Myschematics/Receptor/receiver.
+2022-03-23 16:40:37 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/wisla/sky130_skel/Myschematics/Receptor/receiver.
+2022-03-23 16:40:37 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-03-23 16:40:37 - [WARNING] - {{SPDX COMPLIANCE CHECK FAILED}} Found 32 non-compliant file(s) with the SPDX Standard.
+2022-03-23 16:40:37 - [INFO] - SPDX COMPLIANCE: NON-COMPLIANT FILE(S) PREVIEW: ['/home/wisla/sky130_skel/Myschematics/Receptor/receiver/Makefile', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/docs/Makefile', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/docs/environment.yml', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/docs/source/conf.py', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/docs/source/index.rst', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/netgen/run_lvs_por.sh', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/netgen/run_lvs_wrapper_xschem.sh', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/netgen/setup.tcl', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/netgen/run_lvs_ota.sh', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/.spiceinit', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/analog_wrapper_tb.sch', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/user_analog_project_wrapper.sch', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/user_analog_project_wrapper.sym', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/xschemrc', '/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/detector.sch']
+2022-03-23 16:40:37 - [INFO] - For the full SPDX compliance report check: /home/wisla/sky130_skel/Myschematics/Receptor/receiver/precheck_results/23_MAR_2022___16_40_33/logs/spdx_compliance_report.log
+2022-03-23 16:40:37 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 13: Makefile
+2022-03-23 16:40:37 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2022-03-23 16:40:37 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 13: Default
+2022-03-23 16:40:37 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2022-03-23 16:40:37 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2022-03-23 16:40:37 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 13: Documentation
+2022-03-23 16:40:37 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2022-03-23 16:40:37 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 13: Consistency
diff --git a/precheck_results/23_MAR_2022___16_40_33/logs/spdx_compliance_report.log b/precheck_results/23_MAR_2022___16_40_33/logs/spdx_compliance_report.log
new file mode 100644
index 0000000..2a65058
--- /dev/null
+++ b/precheck_results/23_MAR_2022___16_40_33/logs/spdx_compliance_report.log
@@ -0,0 +1,32 @@
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/Makefile
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/docs/Makefile
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/docs/environment.yml
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/docs/source/conf.py
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/docs/source/index.rst
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/netgen/run_lvs_por.sh
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/netgen/run_lvs_wrapper_xschem.sh
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/netgen/setup.tcl
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/netgen/run_lvs_ota.sh
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/.spiceinit
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/analog_wrapper_tb.sch
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/user_analog_project_wrapper.sch
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/user_analog_project_wrapper.sym
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/xschemrc
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/detector.sch
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/detector.sym
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/OTA.sch
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/OTA.sym
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/xschem/Tb_OTA.sch
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag__/.magicrc
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag__/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.ext
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag__/user_analog_project_wrapper.ext
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag__/detV2.ext
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag__/otaV5.ext
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag/detV2.ext
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag/otaV5.ext
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.ext
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag/.magicrc
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/mag/user_analog_project_wrapper.ext
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/precheck_results/23_MAR_2022___16_40_33/logs/gds.info
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/precheck_results/23_MAR_2022___16_40_33/logs/tools.info
+/home/wisla/sky130_skel/Myschematics/Receptor/receiver/precheck_results/23_MAR_2022___16_40_33/logs/pdks.info
diff --git a/precheck_results/23_MAR_2022___16_40_33/logs/tools.info b/precheck_results/23_MAR_2022___16_40_33/logs/tools.info
new file mode 100644
index 0000000..9b2230a
--- /dev/null
+++ b/precheck_results/23_MAR_2022___16_40_33/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.8
+Magic: 8.3.274
\ No newline at end of file
diff --git a/xschem/detector.sch b/xschem/detector.sch
index 3df1cf7..07b7778 100644
--- a/xschem/detector.sch
+++ b/xschem/detector.sch
@@ -4,24 +4,24 @@
V {}
S {}
E {}
-N 130 90 130 110 { lab=gnd}
-N 130 110 130 140 { lab=gnd}
-N 130 60 220 60 { lab=gnd}
-N 220 60 220 120 { lab=gnd}
-N 130 120 220 120 { lab=gnd}
-N 130 -10 130 30 { lab=#net1}
-N 350 110 350 140 { lab=gnd}
+N 130 90 130 110 { lab=#net1}
+N 130 110 130 140 { lab=#net1}
+N 130 60 220 60 { lab=#net1}
+N 220 60 220 120 { lab=#net1}
+N 130 120 220 120 { lab=#net1}
+N 130 -10 130 30 { lab=#net2}
+N 350 110 350 140 { lab=#net1}
N 350 -10 350 50 { lab=do}
N -50 -10 -10 -10 { lab=din}
N 350 -10 410 -10 { lab=do}
N 50 60 90 60 { lab=dB}
-N 130 140 350 140 { lab=gnd}
-N 240 140 240 160 { lab=gnd}
-N 50 -10 130 -10 { lab=#net1}
-N 130 -10 200 -10 { lab=#net1}
+N 130 140 350 140 { lab=#net1}
+N 240 140 240 160 { lab=#net1}
+N 50 -10 130 -10 { lab=#net2}
+N 130 -10 200 -10 { lab=#net2}
N 260 -10 350 -10 { lab=do}
-N 230 10 230 80 { lab=gnd}
-N 220 80 230 80 { lab=gnd}
+N 230 10 230 80 { lab=#net1}
+N 220 80 230 80 { lab=#net1}
C {/home/wisla/sky130_skel/xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 110 60 0 0 {name=M1
L=0.15
W=22.5
@@ -39,12 +39,12 @@
C {/edatools/opentools/xschem/xschem_library/devices/ipin.sym} -50 -10 0 0 {name=p1 lab=din}
C {/edatools/opentools/xschem/xschem_library/devices/ipin.sym} 60 60 0 0 {name=p3 lab=dB}
C {/edatools/opentools/xschem/xschem_library/devices/opin.sym} 410 -10 0 0 {name=p2 lab=do}
-C {/edatools/opentools/xschem/xschem_library/devices/iopin.sym} 240 150 1 0 {name=p4 lab=gnd}
C {/home/wisla/sky130_skel/xschem_sky130/sky130_fd_pr/cap_mim_m3_1.sym} 350 80 0 0 {name=C1 model=cap_mim_m3_1 W=87 L=87 MF=1 spiceprefix=X}
C {/home/wisla/sky130_skel/xschem_sky130/sky130_fd_pr/cap_mim_m3_1.sym} 20 -10 3 0 {name=C2 model=cap_mim_m3_1 W=87 L=87 MF=1 spiceprefix=X}
-C {/home/wisla/sky130_skel/xschem_sky130/sky130_fd_pr/res_xhigh_po.sym} 230 -10 3 0 {name=R2
+C {/home/wisla/sky130_skel/xschem_sky130/sky130_fd_pr/res_xhigh_po.sym} 230 -10 1 1 {name=R2
W=0.35
L=18.6
model=res_xhigh_po
spiceprefix=X
mult=1}
+C {/edatools/opentools/xschem/xschem_library/devices/ipin.sym} 240 150 3 0 {name=p4 lab=gnd}
diff --git a/xschem/detector.spice b/xschem/detector.spice
index 667fdb1..a6424f8 100644
--- a/xschem/detector.spice
+++ b/xschem/detector.spice
@@ -1,5 +1,4 @@
-** sch_path:
-*+ /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/xschem/detector.sch
+** sch_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/detector.sch
.subckt detector din dB do gnd
*.PININFO din:I dB:I do:O gnd:B
XM1 net1 dB gnd gnd sky130_fd_pr__nfet_01v8 L=0.15 W=22.5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
@@ -7,6 +6,6 @@
+ sa=0 sb=0 sd=0 mult=1 m=1
XC1 do gnd sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
XC2 din net1 sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
-XR2 do net1 gnd sky130_fd_pr__res_xhigh_po W=0.35 L=18.6 mult=1 m=1
+XR2 net1 do gnd sky130_fd_pr__res_xhigh_po W=0.35 L=18.6 mult=1 m=1
.ends
.end
diff --git a/xschem/detector.sym b/xschem/detector.sym
index 1acfd42..6eea9e6 100644
--- a/xschem/detector.sym
+++ b/xschem/detector.sym
@@ -6,27 +6,27 @@
V {}
S {}
E {}
-L 4 130 20 130 40 {}
-L 4 130 40 150 30 {}
-L 4 130 20 150 30 {}
-L 4 150 20 150 40 {}
-L 4 150 30 160 30 {}
-L 4 120 30 130 30 {}
-L 4 90 20 110 20 {}
-L 4 90 40 110 40 {}
-L 4 140 50 140 60 {}
-L 4 170 30 180 30 {}
-B 5 87.5 17.5 92.5 22.5 {name=din
-dir=in}
-B 5 87.5 37.5 92.5 42.5 {name=dB
-dir=in}
-B 5 137.5 57.5 142.5 62.5 {name=ground
-dir=inout}
-B 5 177.5 27.5 182.5 32.5 {name=do
-dir=out}
-P 4 5 110 10 170 10 170 50 110 50 110 10 {}
-T {@name} 110 -5 0 0 0.2 0.2 {}
-T {din} 95 10 0 0 0.1 0.1 {}
-T {db} 90 30 0 0 0.1 0.1 {}
-T {do} 172.5 20 0 0 0.1 0.1 {}
-T {gnd} 145 55 0 0 0.1 0.1 {}
+L 4 -130 -30 130 -30 {}
+L 4 -130 30 130 30 {}
+L 4 -130 -30 -130 30 {}
+L 4 130 -30 130 30 {}
+L 4 -150 -20 -130 -20 {}
+L 4 130 0 150 0 {}
+L 4 -150 0 -130 0 {}
+L 4 -150 20 -130 20 {}
+L 4 -30 -20 -30 20 {}
+L 4 -30 -20 -0 -0 {}
+L 4 -30 20 -0 0 {}
+L 4 0 0 20 0 {}
+L 4 -60 -0 -30 0 {}
+L 4 -0 -10 0 10 {}
+B 5 -152.5 -22.5 -147.5 -17.5 {name=din dir=in }
+B 5 147.5 -2.5 152.5 2.5 {name=do dir=out }
+B 5 -152.5 -2.5 -147.5 2.5 {name=dB dir=in }
+B 5 -152.5 17.5 -147.5 22.5 {name=gnd dir=in }
+T {@symname} -114 -46 0 0 0.3 0.3 {}
+T {@name} 135 -42 0 0 0.2 0.2 {}
+T {din} -125 -24 0 0 0.2 0.2 {}
+T {do} 125 -4 0 1 0.2 0.2 {}
+T {dB} -125 -4 0 0 0.2 0.2 {}
+T {gnd} -125 16 0 0 0.2 0.2 {}
diff --git a/xschem/user_analog_project_wrapper.sch b/xschem/user_analog_project_wrapper.sch
index 7a73a03..20af011 100644
--- a/xschem/user_analog_project_wrapper.sch
+++ b/xschem/user_analog_project_wrapper.sch
@@ -4,24 +4,14 @@
V {}
S {}
E {}
-N 3630 -360 3730 -360 { lab=io_analog[3]}
-N 3850 -270 3850 -180 {
+N 3460 -350 3560 -350 { lab=io_analog[3]}
+N 3480 -310 3560 -310 {
lab=vssa1}
-N 3770 -180 3850 -180 {
-lab=vssa1}
-N 3630 -250 3730 -250 { lab=io_analog[1]}
-N 3730 -310 3800 -310 {
-lab=io_analog[3]}
-N 3730 -360 3730 -310 {
-lab=io_analog[3]}
-N 3730 -290 3800 -290 {
-lab=io_analog[1]}
-N 3730 -290 3730 -250 {
-lab=io_analog[1]}
-N 3890 -300 4020 -300 {
+N 3460 -330 3560 -330 { lab=io_analog[1]}
+N 3860 -330 3990 -330 {
lab=io_analog[2]}
N 3590 50 3700 50 {
-lab=io_analog[9]}
+lab=io_analog[10]}
N 3590 70 3700 70 {
lab=io_analog[8]}
N 3590 90 3700 90 {
@@ -29,7 +19,7 @@
N 3770 120 3770 160 {
lab=vccd2}
N 3770 -10 3770 40 {
-lab=vccd2}
+lab=vccd1}
N 3820 70 3860 70 {
lab=io_analog[7]}
N 3820 90 3860 90 {
@@ -66,16 +56,16 @@
C {devices/iopin.sym} 3250 530 0 0 {name=p31 lab=io_clamp_low[2:0]}
C {devices/opin.sym} 3270 600 0 0 {name=p32 lab=user_irq[2:0]}
C {devices/ipin.sym} 3290 210 0 0 {name=p28 lab=la_oenb[127:0]}
-C {devices/lab_pin.sym} 3630 -360 0 0 {name=l1 sig_type=std_logic lab=io_analog[3]}
-C {devices/lab_pin.sym} 3770 -180 0 0 {name=l2 sig_type=std_logic lab=vssa1}
-C {devices/lab_pin.sym} 4020 -300 0 1 {name=l3 sig_type=std_logic lab=io_analog[2]}
-C {devices/lab_pin.sym} 3630 -250 0 0 {name=l4 sig_type=std_logic lab=io_analog[1]}
+C {devices/lab_pin.sym} 3460 -350 0 0 {name=l1 sig_type=std_logic lab=io_analog[3]}
+C {devices/lab_pin.sym} 3480 -310 0 0 {name=l2 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 3990 -330 0 1 {name=l3 sig_type=std_logic lab=io_analog[2]}
+C {devices/lab_pin.sym} 3460 -330 0 0 {name=l4 sig_type=std_logic lab=io_analog[1]}
C {detector.sym} 3710 -330 0 0 {name=Xdet}
C {devices/lab_pin.sym} 3590 50 0 0 {name=l5 sig_type=std_logic lab=io_analog[10]}
C {devices/lab_pin.sym} 3590 70 0 0 {name=l6 sig_type=std_logic lab=io_analog[8]}
C {devices/lab_pin.sym} 3860 70 2 0 {name=l7 sig_type=std_logic lab=io_analog[7]}
C {devices/lab_pin.sym} 3590 90 0 0 {name=l8 sig_type=std_logic lab=io_analog[9]}
-C {devices/lab_pin.sym} 3770 0 0 0 {name=l9 sig_type=std_logic lab=vccd2}
+C {devices/lab_pin.sym} 3770 0 0 0 {name=l9 sig_type=std_logic lab=vccd1}
C {devices/lab_pin.sym} 3770 150 0 0 {name=l10 sig_type=std_logic lab=vccd2}
C {OTA.sym} 3840 80 0 0 {name=X1}
C {devices/lab_pin.sym} 3860 90 2 0 {name=l11 sig_type=std_logic lab=vssa2}
diff --git a/xschem/user_analog_project_wrapper.spice b/xschem/user_analog_project_wrapper.spice
index c5c4ca9..9798fc6 100644
--- a/xschem/user_analog_project_wrapper.spice
+++ b/xschem/user_analog_project_wrapper.spice
@@ -1,5 +1,5 @@
** sch_path:
-*+ /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/xschem/user_analog_project_wrapper.sch
+*+ /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/user_analog_project_wrapper.sch
.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
+ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
+ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
@@ -90,27 +90,27 @@
*+ wbs_dat_o[31:0]:O la_data_in[127:0]:I la_data_out[127:0]:O io_in[26:0]:I io_in_3v3[26:0]:I user_clock2:I
*+ io_out[26:0]:O io_oeb[26:0]:O gpio_analog[17:0]:B gpio_noesd[17:0]:B io_analog[10:0]:B io_clamp_high[2:0]:B
*+ io_clamp_low[2:0]:B user_irq[2:0]:O la_oenb[127:0]:I
-Xdet io_analog[3] io_analog[1] vssa1 io_analog[2] detector
-X1 vccd2 io_analog[7] io_analog[10] vssa2 io_analog[8] io_analog[9] vccd2 OTA
+Xdet io_analog[3] io_analog[2] io_analog[1] vssa1 detector
+X1 vccd1 io_analog[7] io_analog[10] vssa2 io_analog[8] io_analog[9] vccd2 OTA
.ends
* expanding symbol: detector.sym # of pins=4
-** sym_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/xschem/detector.sym
-** sch_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/xschem/detector.sch
-.subckt detector din dB ground do
-*.PININFO din:I dB:I do:O gnd:B
+** sym_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/detector.sym
+** sch_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/detector.sch
+.subckt detector din do dB gnd
+*.PININFO din:I dB:I do:O gnd:I
XM1 net1 dB gnd gnd sky130_fd_pr__nfet_01v8 L=0.15 W=22.5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=1 m=1
XC1 do gnd sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
XC2 din net1 sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
-XR2 do net1 gnd sky130_fd_pr__res_xhigh_po W=0.35 L=18.6 mult=1 m=1
+XR2 net1 do gnd sky130_fd_pr__res_xhigh_po W=0.35 L=18.6 mult=1 m=1
.ends
* expanding symbol: OTA.sym # of pins=7
-** sym_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/xschem/OTA.sym
-** sch_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/xschem/OTA.sch
+** sym_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/OTA.sym
+** sch_path: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip_V0/xschem/OTA.sch
.subckt OTA Vp vout ib cltop inn inp Vn
*.PININFO inp:I inn:I vout:O Vp:B Vn:B ib:I cltop:O
XM7 net1 net1 Vp Vp sky130_fd_pr__pfet_01v8 L=1 W=1.4 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
